Merge branch 'origin' into devel-stable
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / comedi / drivers / amplc_pci224.c
1 /*
2 comedi/drivers/amplc_pci224.c
3 Driver for Amplicon PCI224 and PCI234 AO boards.
4
5 Copyright (C) 2005 MEV Ltd. <http://www.mev.co.uk/>
6
7 COMEDI - Linux Control and Measurement Device Interface
8 Copyright (C) 1998,2000 David A. Schleef <ds@schleef.org>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23
24 */
25 /*
26 Driver: amplc_pci224
27 Description: Amplicon PCI224, PCI234
28 Author: Ian Abbott <abbotti@mev.co.uk>
29 Devices: [Amplicon] PCI224 (amplc_pci224 or pci224),
30 PCI234 (amplc_pci224 or pci234)
31 Updated: Wed, 22 Oct 2008 12:25:08 +0100
32 Status: works, but see caveats
33
34 Supports:
35
36 - ao_insn read/write
37 - ao_do_cmd mode with the following sources:
38
39 - start_src TRIG_INT TRIG_EXT
40 - scan_begin_src TRIG_TIMER TRIG_EXT
41 - convert_src TRIG_NOW
42 - scan_end_src TRIG_COUNT
43 - stop_src TRIG_COUNT TRIG_EXT TRIG_NONE
44
45 The channel list must contain at least one channel with no repeated
46 channels. The scan end count must equal the number of channels in
47 the channel list.
48
49 There is only one external trigger source so only one of start_src,
50 scan_begin_src or stop_src may use TRIG_EXT.
51
52 Configuration options - PCI224:
53 [0] - PCI bus of device (optional).
54 [1] - PCI slot of device (optional).
55 If bus/slot is not specified, the first available PCI device
56 will be used.
57 [2] - Select available ranges according to jumper LK1. All channels
58 are set to the same range:
59 0=Jumper position 1-2 (factory default), 4 software-selectable
60 internal voltage references, giving 4 bipolar and 4 unipolar
61 ranges:
62 [-10V,+10V], [-5V,+5V], [-2.5V,+2.5V], [-1.25V,+1.25V],
63 [0,+10V], [0,+5V], [0,+2.5V], [0,1.25V].
64 1=Jumper position 2-3, 1 external voltage reference, giving
65 1 bipolar and 1 unipolar range:
66 [-Vext,+Vext], [0,+Vext].
67
68 Configuration options - PCI234:
69 [0] - PCI bus of device (optional).
70 [1] - PCI slot of device (optional).
71 If bus/slot is not specified, the first available PCI device
72 will be used.
73 [2] - Select internal or external voltage reference according to
74 jumper LK1. This affects all channels:
75 0=Jumper position 1-2 (factory default), Vref=5V internal.
76 1=Jumper position 2-3, Vref=Vext external.
77 [3] - Select channel 0 range according to jumper LK2:
78 0=Jumper position 2-3 (factory default), range [-2*Vref,+2*Vref]
79 (10V bipolar when options[2]=0).
80 1=Jumper position 1-2, range [-Vref,+Vref]
81 (5V bipolar when options[2]=0).
82 [4] - Select channel 1 range according to jumper LK3: cf. options[3].
83 [5] - Select channel 2 range according to jumper LK4: cf. options[3].
84 [6] - Select channel 3 range according to jumper LK5: cf. options[3].
85
86 Passing a zero for an option is the same as leaving it unspecified.
87
88 Caveats:
89
90 1) All channels on the PCI224 share the same range. Any change to the
91 range as a result of insn_write or a streaming command will affect
92 the output voltages of all channels, including those not specified
93 by the instruction or command.
94
95 2) For the analog output command, the first scan may be triggered
96 falsely at the start of acquisition. This occurs when the DAC scan
97 trigger source is switched from 'none' to 'timer' (scan_begin_src =
98 TRIG_TIMER) or 'external' (scan_begin_src == TRIG_EXT) at the start
99 of acquisition and the trigger source is at logic level 1 at the
100 time of the switch. This is very likely for TRIG_TIMER. For
101 TRIG_EXT, it depends on the state of the external line and whether
102 the CR_INVERT flag has been set. The remaining scans are triggered
103 correctly.
104 */
105
106 #include <linux/interrupt.h>
107
108 #include "../comedidev.h"
109
110 #include "comedi_pci.h"
111
112 #include "comedi_fc.h"
113 #include "8253.h"
114
115 #define DRIVER_NAME "amplc_pci224"
116
117 /*
118 * PCI IDs.
119 */
120 /* #define PCI_VENDOR_ID_AMPLICON 0x14dc */
121 #define PCI_DEVICE_ID_AMPLICON_PCI224 0x0007
122 #define PCI_DEVICE_ID_AMPLICON_PCI234 0x0008
123 #define PCI_DEVICE_ID_INVALID 0xffff
124
125 /*
126 * PCI224/234 i/o space 1 (PCIBAR2) registers.
127 */
128 #define PCI224_IO1_SIZE 0x20 /* Size of i/o space 1 (8-bit registers) */
129 #define PCI224_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
130 #define PCI224_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
131 #define PCI224_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
132 #define PCI224_Z2_CTC 0x17 /* 82C54 counter/timer control word */
133 #define PCI224_ZCLK_SCE 0x1A /* Group Z Clock Configuration Register */
134 #define PCI224_ZGAT_SCE 0x1D /* Group Z Gate Configuration Register */
135 #define PCI224_INT_SCE 0x1E /* ISR Interrupt source mask register */
136 /* /Interrupt status */
137
138 /*
139 * PCI224/234 i/o space 2 (PCIBAR3) 16-bit registers.
140 */
141 #define PCI224_IO2_SIZE 0x10 /* Size of i/o space 2 (16-bit registers). */
142 #define PCI224_DACDATA 0x00 /* (w-o) DAC FIFO data. */
143 #define PCI224_SOFTTRIG 0x00 /* (r-o) DAC software scan trigger. */
144 #define PCI224_DACCON 0x02 /* (r/w) DAC status/configuration. */
145 #define PCI224_FIFOSIZ 0x04 /* (w-o) FIFO size for wraparound mode. */
146 #define PCI224_DACCEN 0x06 /* (w-o) DAC channel enable register. */
147
148 /*
149 * DACCON values.
150 */
151 /* (r/w) Scan trigger. */
152 #define PCI224_DACCON_TRIG_MASK (7 << 0)
153 #define PCI224_DACCON_TRIG_NONE (0 << 0) /* none */
154 #define PCI224_DACCON_TRIG_SW (1 << 0) /* software trig */
155 #define PCI224_DACCON_TRIG_EXTP (2 << 0) /* ext +ve edge */
156 #define PCI224_DACCON_TRIG_EXTN (3 << 0) /* ext -ve edge */
157 #define PCI224_DACCON_TRIG_Z2CT0 (4 << 0) /* Z2 CT0 out */
158 #define PCI224_DACCON_TRIG_Z2CT1 (5 << 0) /* Z2 CT1 out */
159 #define PCI224_DACCON_TRIG_Z2CT2 (6 << 0) /* Z2 CT2 out */
160 /* (r/w) Polarity (PCI224 only, PCI234 always bipolar!). */
161 #define PCI224_DACCON_POLAR_MASK (1 << 3)
162 #define PCI224_DACCON_POLAR_UNI (0 << 3) /* range [0,Vref] */
163 #define PCI224_DACCON_POLAR_BI (1 << 3) /* range [-Vref,Vref] */
164 /* (r/w) Internal Vref (PCI224 only, when LK1 in position 1-2). */
165 #define PCI224_DACCON_VREF_MASK (3 << 4)
166 #define PCI224_DACCON_VREF_1_25 (0 << 4) /* Vref = 1.25V */
167 #define PCI224_DACCON_VREF_2_5 (1 << 4) /* Vref = 2.5V */
168 #define PCI224_DACCON_VREF_5 (2 << 4) /* Vref = 5V */
169 #define PCI224_DACCON_VREF_10 (3 << 4) /* Vref = 10V */
170 /* (r/w) Wraparound mode enable (to play back stored waveform). */
171 #define PCI224_DACCON_FIFOWRAP (1 << 7)
172 /* (r/w) FIFO enable. It MUST be set! */
173 #define PCI224_DACCON_FIFOENAB (1 << 8)
174 /* (r/w) FIFO interrupt trigger level (most values are not very useful). */
175 #define PCI224_DACCON_FIFOINTR_MASK (7 << 9)
176 #define PCI224_DACCON_FIFOINTR_EMPTY (0 << 9) /* when empty */
177 #define PCI224_DACCON_FIFOINTR_NEMPTY (1 << 9) /* when not empty */
178 #define PCI224_DACCON_FIFOINTR_NHALF (2 << 9) /* when not half full */
179 #define PCI224_DACCON_FIFOINTR_HALF (3 << 9) /* when half full */
180 #define PCI224_DACCON_FIFOINTR_NFULL (4 << 9) /* when not full */
181 #define PCI224_DACCON_FIFOINTR_FULL (5 << 9) /* when full */
182 /* (r-o) FIFO fill level. */
183 #define PCI224_DACCON_FIFOFL_MASK (7 << 12)
184 #define PCI224_DACCON_FIFOFL_EMPTY (1 << 12) /* 0 */
185 #define PCI224_DACCON_FIFOFL_ONETOHALF (0 << 12) /* [1,2048] */
186 #define PCI224_DACCON_FIFOFL_HALFTOFULL (4 << 12) /* [2049,4095] */
187 #define PCI224_DACCON_FIFOFL_FULL (6 << 12) /* 4096 */
188 /* (r-o) DAC busy flag. */
189 #define PCI224_DACCON_BUSY (1 << 15)
190 /* (w-o) FIFO reset. */
191 #define PCI224_DACCON_FIFORESET (1 << 12)
192 /* (w-o) Global reset (not sure what it does). */
193 #define PCI224_DACCON_GLOBALRESET (1 << 13)
194
195 /*
196 * DAC FIFO size.
197 */
198 #define PCI224_FIFO_SIZE 4096
199
200 /*
201 * DAC FIFO guaranteed minimum room available, depending on reported fill level.
202 * The maximum room available depends on the reported fill level and how much
203 * has been written!
204 */
205 #define PCI224_FIFO_ROOM_EMPTY PCI224_FIFO_SIZE
206 #define PCI224_FIFO_ROOM_ONETOHALF (PCI224_FIFO_SIZE / 2)
207 #define PCI224_FIFO_ROOM_HALFTOFULL 1
208 #define PCI224_FIFO_ROOM_FULL 0
209
210 /*
211 * Counter/timer clock input configuration sources.
212 */
213 #define CLK_CLK 0 /* reserved (channel-specific clock) */
214 #define CLK_10MHZ 1 /* internal 10 MHz clock */
215 #define CLK_1MHZ 2 /* internal 1 MHz clock */
216 #define CLK_100KHZ 3 /* internal 100 kHz clock */
217 #define CLK_10KHZ 4 /* internal 10 kHz clock */
218 #define CLK_1KHZ 5 /* internal 1 kHz clock */
219 #define CLK_OUTNM1 6 /* output of channel-1 modulo total */
220 #define CLK_EXT 7 /* external clock */
221 /* Macro to construct clock input configuration register value. */
222 #define CLK_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
223 /* Timebases in ns. */
224 #define TIMEBASE_10MHZ 100
225 #define TIMEBASE_1MHZ 1000
226 #define TIMEBASE_100KHZ 10000
227 #define TIMEBASE_10KHZ 100000
228 #define TIMEBASE_1KHZ 1000000
229
230 /*
231 * Counter/timer gate input configuration sources.
232 */
233 #define GAT_VCC 0 /* VCC (i.e. enabled) */
234 #define GAT_GND 1 /* GND (i.e. disabled) */
235 #define GAT_EXT 2 /* reserved (external gate input) */
236 #define GAT_NOUTNM2 3 /* inverted output of channel-2 modulo total */
237 /* Macro to construct gate input configuration register value. */
238 #define GAT_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
239
240 /*
241 * Summary of CLK_OUTNM1 and GAT_NOUTNM2 connections for PCI224 and PCI234:
242 *
243 * Channel's Channel's
244 * clock input gate input
245 * Channel CLK_OUTNM1 GAT_NOUTNM2
246 * ------- ---------- -----------
247 * Z2-CT0 Z2-CT2-OUT /Z2-CT1-OUT
248 * Z2-CT1 Z2-CT0-OUT /Z2-CT2-OUT
249 * Z2-CT2 Z2-CT1-OUT /Z2-CT0-OUT
250 */
251
252 /*
253 * Interrupt enable/status bits
254 */
255 #define PCI224_INTR_EXT 0x01 /* rising edge on external input */
256 #define PCI224_INTR_DAC 0x04 /* DAC (FIFO) interrupt */
257 #define PCI224_INTR_Z2CT1 0x20 /* rising edge on Z2-CT1 output */
258
259 #define PCI224_INTR_EDGE_BITS (PCI224_INTR_EXT | PCI224_INTR_Z2CT1)
260 #define PCI224_INTR_LEVEL_BITS PCI224_INTR_DACFIFO
261
262 /*
263 * Handy macros.
264 */
265
266 /* Combine old and new bits. */
267 #define COMBINE(old, new, mask) (((old) & ~(mask)) | ((new) & (mask)))
268
269 /* A generic null function pointer value. */
270 #define NULLFUNC 0
271
272 /* Current CPU. XXX should this be hard_smp_processor_id()? */
273 #define THISCPU smp_processor_id()
274
275 /* State bits for use with atomic bit operations. */
276 #define AO_CMD_STARTED 0
277
278 /*
279 * Range tables.
280 */
281
282 /* The software selectable internal ranges for PCI224 (option[2] == 0). */
283 static const struct comedi_lrange range_pci224_internal = {
284 8,
285 {
286 BIP_RANGE(10),
287 BIP_RANGE(5),
288 BIP_RANGE(2.5),
289 BIP_RANGE(1.25),
290 UNI_RANGE(10),
291 UNI_RANGE(5),
292 UNI_RANGE(2.5),
293 UNI_RANGE(1.25),
294 }
295 };
296
297 static const unsigned short hwrange_pci224_internal[8] = {
298 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_10,
299 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_5,
300 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_2_5,
301 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_1_25,
302 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_10,
303 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_5,
304 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_2_5,
305 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_1_25,
306 };
307
308 /* The software selectable external ranges for PCI224 (option[2] == 1). */
309 static const struct comedi_lrange range_pci224_external = {
310 2,
311 {
312 RANGE_ext(-1, 1), /* bipolar [-Vref,+Vref] */
313 RANGE_ext(0, 1), /* unipolar [0,+Vref] */
314 }
315 };
316
317 static const unsigned short hwrange_pci224_external[2] = {
318 PCI224_DACCON_POLAR_BI,
319 PCI224_DACCON_POLAR_UNI,
320 };
321
322 /* The hardware selectable Vref*2 external range for PCI234
323 * (option[2] == 1, option[3+n] == 0). */
324 static const struct comedi_lrange range_pci234_ext2 = {
325 1,
326 {
327 RANGE_ext(-2, 2),
328 }
329 };
330
331 /* The hardware selectable Vref external range for PCI234
332 * (option[2] == 1, option[3+n] == 1). */
333 static const struct comedi_lrange range_pci234_ext = {
334 1,
335 {
336 RANGE_ext(-1, 1),
337 }
338 };
339
340 /* This serves for all the PCI234 ranges. */
341 static const unsigned short hwrange_pci234[1] = {
342 PCI224_DACCON_POLAR_BI, /* bipolar - hardware ignores it! */
343 };
344
345 /*
346 * Board descriptions.
347 */
348
349 enum pci224_model { any_model, pci224_model, pci234_model };
350
351 struct pci224_board {
352 const char *name;
353 unsigned short devid;
354 enum pci224_model model;
355 unsigned int ao_chans;
356 unsigned int ao_bits;
357 };
358
359 static const struct pci224_board pci224_boards[] = {
360 {
361 .name = "pci224",
362 .devid = PCI_DEVICE_ID_AMPLICON_PCI224,
363 .model = pci224_model,
364 .ao_chans = 16,
365 .ao_bits = 12,
366 },
367 {
368 .name = "pci234",
369 .devid = PCI_DEVICE_ID_AMPLICON_PCI234,
370 .model = pci234_model,
371 .ao_chans = 4,
372 .ao_bits = 16,
373 },
374 {
375 .name = DRIVER_NAME,
376 .devid = PCI_DEVICE_ID_INVALID,
377 .model = any_model, /* wildcard */
378 },
379 };
380
381 /*
382 * PCI driver table.
383 */
384
385 static DEFINE_PCI_DEVICE_TABLE(pci224_pci_table) = {
386 {
387 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI224,
388 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
389 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI234,
390 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
391 0}
392 };
393
394 MODULE_DEVICE_TABLE(pci, pci224_pci_table);
395
396 /*
397 * Useful for shorthand access to the particular board structure
398 */
399 #define thisboard ((struct pci224_board *)dev->board_ptr)
400
401 /* this structure is for data unique to this hardware driver. If
402 several hardware drivers keep similar information in this structure,
403 feel free to suggest moving the variable to the struct comedi_device struct. */
404 struct pci224_private {
405 struct pci_dev *pci_dev; /* PCI device */
406 const unsigned short *hwrange;
407 unsigned long iobase1;
408 unsigned long state;
409 spinlock_t ao_spinlock;
410 unsigned int *ao_readback;
411 short *ao_scan_vals;
412 unsigned char *ao_scan_order;
413 int intr_cpuid;
414 short intr_running;
415 unsigned short daccon;
416 unsigned int cached_div1;
417 unsigned int cached_div2;
418 unsigned int ao_stop_count;
419 short ao_stop_continuous;
420 unsigned short ao_enab; /* max 16 channels so 'short' will do */
421 unsigned char intsce;
422 };
423
424 #define devpriv ((struct pci224_private *)dev->private)
425
426 /*
427 * The struct comedi_driver structure tells the Comedi core module
428 * which functions to call to configure/deconfigure (attach/detach)
429 * the board, and also about the kernel module that contains
430 * the device code.
431 */
432 static int pci224_attach(struct comedi_device *dev,
433 struct comedi_devconfig *it);
434 static int pci224_detach(struct comedi_device *dev);
435 static struct comedi_driver driver_amplc_pci224 = {
436 .driver_name = DRIVER_NAME,
437 .module = THIS_MODULE,
438 .attach = pci224_attach,
439 .detach = pci224_detach,
440 .board_name = &pci224_boards[0].name,
441 .offset = sizeof(struct pci224_board),
442 .num_names = ARRAY_SIZE(pci224_boards),
443 };
444
445 COMEDI_PCI_INITCLEANUP(driver_amplc_pci224, pci224_pci_table);
446
447 /*
448 * Called from the 'insn_write' function to perform a single write.
449 */
450 static void
451 pci224_ao_set_data(struct comedi_device *dev, int chan, int range,
452 unsigned int data)
453 {
454 unsigned short mangled;
455
456 /* Store unmangled data for readback. */
457 devpriv->ao_readback[chan] = data;
458 /* Enable the channel. */
459 outw(1 << chan, dev->iobase + PCI224_DACCEN);
460 /* Set range and reset FIFO. */
461 devpriv->daccon = COMBINE(devpriv->daccon, devpriv->hwrange[range],
462 (PCI224_DACCON_POLAR_MASK |
463 PCI224_DACCON_VREF_MASK));
464 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
465 dev->iobase + PCI224_DACCON);
466 /*
467 * Mangle the data. The hardware expects:
468 * - bipolar: 16-bit 2's complement
469 * - unipolar: 16-bit unsigned
470 */
471 mangled = (unsigned short)data << (16 - thisboard->ao_bits);
472 if ((devpriv->daccon & PCI224_DACCON_POLAR_MASK) ==
473 PCI224_DACCON_POLAR_BI) {
474 mangled ^= 0x8000;
475 }
476 /* Write mangled data to the FIFO. */
477 outw(mangled, dev->iobase + PCI224_DACDATA);
478 /* Trigger the conversion. */
479 inw(dev->iobase + PCI224_SOFTTRIG);
480 }
481
482 /*
483 * 'insn_write' function for AO subdevice.
484 */
485 static int
486 pci224_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s,
487 struct comedi_insn *insn, unsigned int *data)
488 {
489 int i;
490 int chan, range;
491
492 /* Unpack channel and range. */
493 chan = CR_CHAN(insn->chanspec);
494 range = CR_RANGE(insn->chanspec);
495
496 /* Writing a list of values to an AO channel is probably not
497 * very useful, but that's how the interface is defined. */
498 for (i = 0; i < insn->n; i++) {
499 pci224_ao_set_data(dev, chan, range, data[i]);
500 }
501 return i;
502 }
503
504 /*
505 * 'insn_read' function for AO subdevice.
506 *
507 * N.B. The value read will not be valid if the DAC channel has
508 * never been written successfully since the device was attached
509 * or since the channel has been used by an AO streaming write
510 * command.
511 */
512 static int
513 pci224_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
514 struct comedi_insn *insn, unsigned int *data)
515 {
516 int i;
517 int chan;
518
519 chan = CR_CHAN(insn->chanspec);
520
521 for (i = 0; i < insn->n; i++) {
522 data[i] = devpriv->ao_readback[chan];
523 }
524
525 return i;
526 }
527
528 /*
529 * Just a wrapper for the inline function 'i8253_cascade_ns_to_timer'.
530 */
531 static void
532 pci224_cascade_ns_to_timer(int osc_base, unsigned int *d1, unsigned int *d2,
533 unsigned int *nanosec, int round_mode)
534 {
535 i8253_cascade_ns_to_timer(osc_base, d1, d2, nanosec, round_mode);
536 }
537
538 /*
539 * Kills a command running on the AO subdevice.
540 */
541 static void pci224_ao_stop(struct comedi_device *dev,
542 struct comedi_subdevice *s)
543 {
544 unsigned long flags;
545
546 if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state)) {
547 return;
548 }
549
550 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
551 /* Kill the interrupts. */
552 devpriv->intsce = 0;
553 outb(0, devpriv->iobase1 + PCI224_INT_SCE);
554 /*
555 * Interrupt routine may or may not be running. We may or may not
556 * have been called from the interrupt routine (directly or
557 * indirectly via a comedi_events() callback routine). It's highly
558 * unlikely that we've been called from some other interrupt routine
559 * but who knows what strange things coders get up to!
560 *
561 * If the interrupt routine is currently running, wait for it to
562 * finish, unless we appear to have been called via the interrupt
563 * routine.
564 */
565 while (devpriv->intr_running && devpriv->intr_cpuid != THISCPU) {
566 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
567 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
568 }
569 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
570 /* Reconfigure DAC for insn_write usage. */
571 outw(0, dev->iobase + PCI224_DACCEN); /* Disable channels. */
572 devpriv->daccon = COMBINE(devpriv->daccon,
573 PCI224_DACCON_TRIG_SW |
574 PCI224_DACCON_FIFOINTR_EMPTY,
575 PCI224_DACCON_TRIG_MASK |
576 PCI224_DACCON_FIFOINTR_MASK);
577 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
578 dev->iobase + PCI224_DACCON);
579 }
580
581 /*
582 * Handles start of acquisition for the AO subdevice.
583 */
584 static void pci224_ao_start(struct comedi_device *dev,
585 struct comedi_subdevice *s)
586 {
587 struct comedi_cmd *cmd = &s->async->cmd;
588 unsigned long flags;
589
590 set_bit(AO_CMD_STARTED, &devpriv->state);
591 if (!devpriv->ao_stop_continuous && devpriv->ao_stop_count == 0) {
592 /* An empty acquisition! */
593 pci224_ao_stop(dev, s);
594 s->async->events |= COMEDI_CB_EOA;
595 comedi_event(dev, s);
596 } else {
597 /* Enable interrupts. */
598 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
599 if (cmd->stop_src == TRIG_EXT) {
600 devpriv->intsce = PCI224_INTR_EXT | PCI224_INTR_DAC;
601 } else {
602 devpriv->intsce = PCI224_INTR_DAC;
603 }
604 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE);
605 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
606 }
607 }
608
609 /*
610 * Handles interrupts from the DAC FIFO.
611 */
612 static void pci224_ao_handle_fifo(struct comedi_device *dev,
613 struct comedi_subdevice *s)
614 {
615 struct comedi_cmd *cmd = &s->async->cmd;
616 unsigned int num_scans;
617 unsigned int room;
618 unsigned short dacstat;
619 unsigned int i, n;
620 unsigned int bytes_per_scan;
621
622 if (cmd->chanlist_len) {
623 bytes_per_scan = cmd->chanlist_len * sizeof(short);
624 } else {
625 /* Shouldn't get here! */
626 bytes_per_scan = sizeof(short);
627 }
628 /* Determine number of scans available in buffer. */
629 num_scans = comedi_buf_read_n_available(s->async) / bytes_per_scan;
630 if (!devpriv->ao_stop_continuous) {
631 /* Fixed number of scans. */
632 if (num_scans > devpriv->ao_stop_count) {
633 num_scans = devpriv->ao_stop_count;
634 }
635 }
636
637 /* Determine how much room is in the FIFO (in samples). */
638 dacstat = inw(dev->iobase + PCI224_DACCON);
639 switch (dacstat & PCI224_DACCON_FIFOFL_MASK) {
640 case PCI224_DACCON_FIFOFL_EMPTY:
641 room = PCI224_FIFO_ROOM_EMPTY;
642 if (!devpriv->ao_stop_continuous && devpriv->ao_stop_count == 0) {
643 /* FIFO empty at end of counted acquisition. */
644 pci224_ao_stop(dev, s);
645 s->async->events |= COMEDI_CB_EOA;
646 comedi_event(dev, s);
647 return;
648 }
649 break;
650 case PCI224_DACCON_FIFOFL_ONETOHALF:
651 room = PCI224_FIFO_ROOM_ONETOHALF;
652 break;
653 case PCI224_DACCON_FIFOFL_HALFTOFULL:
654 room = PCI224_FIFO_ROOM_HALFTOFULL;
655 break;
656 default:
657 room = PCI224_FIFO_ROOM_FULL;
658 break;
659 }
660 if (room >= PCI224_FIFO_ROOM_ONETOHALF) {
661 /* FIFO is less than half-full. */
662 if (num_scans == 0) {
663 /* Nothing left to put in the FIFO. */
664 pci224_ao_stop(dev, s);
665 s->async->events |= COMEDI_CB_OVERFLOW;
666 printk(KERN_ERR "comedi%d: "
667 "AO buffer underrun\n", dev->minor);
668 }
669 }
670 /* Determine how many new scans can be put in the FIFO. */
671 if (cmd->chanlist_len) {
672 room /= cmd->chanlist_len;
673 }
674 /* Determine how many scans to process. */
675 if (num_scans > room) {
676 num_scans = room;
677 }
678 /* Process scans. */
679 for (n = 0; n < num_scans; n++) {
680 cfc_read_array_from_buffer(s, &devpriv->ao_scan_vals[0],
681 bytes_per_scan);
682 for (i = 0; i < cmd->chanlist_len; i++) {
683 outw(devpriv->ao_scan_vals[devpriv->ao_scan_order[i]],
684 dev->iobase + PCI224_DACDATA);
685 }
686 }
687 if (!devpriv->ao_stop_continuous) {
688 devpriv->ao_stop_count -= num_scans;
689 if (devpriv->ao_stop_count == 0) {
690 /*
691 * Change FIFO interrupt trigger level to wait
692 * until FIFO is empty.
693 */
694 devpriv->daccon = COMBINE(devpriv->daccon,
695 PCI224_DACCON_FIFOINTR_EMPTY,
696 PCI224_DACCON_FIFOINTR_MASK);
697 outw(devpriv->daccon, dev->iobase + PCI224_DACCON);
698 }
699 }
700 if ((devpriv->daccon & PCI224_DACCON_TRIG_MASK) ==
701 PCI224_DACCON_TRIG_NONE) {
702 unsigned short trig;
703
704 /*
705 * This is the initial DAC FIFO interrupt at the
706 * start of the acquisition. The DAC's scan trigger
707 * has been set to 'none' up until now.
708 *
709 * Now that data has been written to the FIFO, the
710 * DAC's scan trigger source can be set to the
711 * correct value.
712 *
713 * BUG: The first scan will be triggered immediately
714 * if the scan trigger source is at logic level 1.
715 */
716 if (cmd->scan_begin_src == TRIG_TIMER) {
717 trig = PCI224_DACCON_TRIG_Z2CT0;
718 } else {
719 /* cmd->scan_begin_src == TRIG_EXT */
720 if (cmd->scan_begin_arg & CR_INVERT) {
721 trig = PCI224_DACCON_TRIG_EXTN;
722 } else {
723 trig = PCI224_DACCON_TRIG_EXTP;
724 }
725 }
726 devpriv->daccon = COMBINE(devpriv->daccon, trig,
727 PCI224_DACCON_TRIG_MASK);
728 outw(devpriv->daccon, dev->iobase + PCI224_DACCON);
729 }
730 if (s->async->events) {
731 comedi_event(dev, s);
732 }
733 }
734
735 /*
736 * Internal trigger function to start acquisition on AO subdevice.
737 */
738 static int
739 pci224_ao_inttrig_start(struct comedi_device *dev, struct comedi_subdevice *s,
740 unsigned int trignum)
741 {
742 if (trignum != 0)
743 return -EINVAL;
744
745 s->async->inttrig = NULLFUNC;
746 pci224_ao_start(dev, s);
747
748 return 1;
749 }
750
751 #define MAX_SCAN_PERIOD 0xFFFFFFFFU
752 #define MIN_SCAN_PERIOD 2500
753 #define CONVERT_PERIOD 625
754
755 /*
756 * 'do_cmdtest' function for AO subdevice.
757 */
758 static int
759 pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
760 struct comedi_cmd *cmd)
761 {
762 int err = 0;
763 unsigned int tmp;
764
765 /* Step 1: make sure trigger sources are trivially valid. */
766
767 tmp = cmd->start_src;
768 cmd->start_src &= TRIG_INT | TRIG_EXT;
769 if (!cmd->start_src || tmp != cmd->start_src)
770 err++;
771
772 tmp = cmd->scan_begin_src;
773 cmd->scan_begin_src &= TRIG_EXT | TRIG_TIMER;
774 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
775 err++;
776
777 tmp = cmd->convert_src;
778 cmd->convert_src &= TRIG_NOW;
779 if (!cmd->convert_src || tmp != cmd->convert_src)
780 err++;
781
782 tmp = cmd->scan_end_src;
783 cmd->scan_end_src &= TRIG_COUNT;
784 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
785 err++;
786
787 tmp = cmd->stop_src;
788 cmd->stop_src &= TRIG_COUNT | TRIG_EXT | TRIG_NONE;
789 if (!cmd->stop_src || tmp != cmd->stop_src)
790 err++;
791
792 if (err)
793 return 1;
794
795 /* Step 2: make sure trigger sources are unique and mutually
796 * compatible. */
797
798 /* these tests are true if more than one _src bit is set */
799 if ((cmd->start_src & (cmd->start_src - 1)) != 0)
800 err++;
801 if ((cmd->scan_begin_src & (cmd->scan_begin_src - 1)) != 0)
802 err++;
803 if ((cmd->convert_src & (cmd->convert_src - 1)) != 0)
804 err++;
805 if ((cmd->scan_end_src & (cmd->scan_end_src - 1)) != 0)
806 err++;
807 if ((cmd->stop_src & (cmd->stop_src - 1)) != 0)
808 err++;
809
810 /* There's only one external trigger signal (which makes these
811 * tests easier). Only one thing can use it. */
812 tmp = 0;
813 if (cmd->start_src & TRIG_EXT)
814 tmp++;
815 if (cmd->scan_begin_src & TRIG_EXT)
816 tmp++;
817 if (cmd->stop_src & TRIG_EXT)
818 tmp++;
819 if (tmp > 1)
820 err++;
821
822 if (err)
823 return 2;
824
825 /* Step 3: make sure arguments are trivially compatible. */
826
827 switch (cmd->start_src) {
828 case TRIG_INT:
829 if (cmd->start_arg != 0) {
830 cmd->start_arg = 0;
831 err++;
832 }
833 break;
834 case TRIG_EXT:
835 /* Force to external trigger 0. */
836 if ((cmd->start_arg & ~CR_FLAGS_MASK) != 0) {
837 cmd->start_arg = COMBINE(cmd->start_arg, 0,
838 ~CR_FLAGS_MASK);
839 err++;
840 }
841 /* The only flag allowed is CR_EDGE, which is ignored. */
842 if ((cmd->start_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
843 cmd->start_arg = COMBINE(cmd->start_arg, 0,
844 CR_FLAGS_MASK & ~CR_EDGE);
845 err++;
846 }
847 break;
848 }
849
850 switch (cmd->scan_begin_src) {
851 case TRIG_TIMER:
852 if (cmd->scan_begin_arg > MAX_SCAN_PERIOD) {
853 cmd->scan_begin_arg = MAX_SCAN_PERIOD;
854 err++;
855 }
856 tmp = cmd->chanlist_len * CONVERT_PERIOD;
857 if (tmp < MIN_SCAN_PERIOD) {
858 tmp = MIN_SCAN_PERIOD;
859 }
860 if (cmd->scan_begin_arg < tmp) {
861 cmd->scan_begin_arg = tmp;
862 err++;
863 }
864 break;
865 case TRIG_EXT:
866 /* Force to external trigger 0. */
867 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) {
868 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
869 ~CR_FLAGS_MASK);
870 err++;
871 }
872 /* Only allow flags CR_EDGE and CR_INVERT. Ignore CR_EDGE. */
873 if ((cmd->scan_begin_arg & CR_FLAGS_MASK &
874 ~(CR_EDGE | CR_INVERT)) != 0) {
875 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
876 CR_FLAGS_MASK & ~(CR_EDGE
877 |
878 CR_INVERT));
879 err++;
880 }
881 break;
882 }
883
884 /* cmd->convert_src == TRIG_NOW */
885 if (cmd->convert_arg != 0) {
886 cmd->convert_arg = 0;
887 err++;
888 }
889
890 /* cmd->scan_end_arg == TRIG_COUNT */
891 if (cmd->scan_end_arg != cmd->chanlist_len) {
892 cmd->scan_end_arg = cmd->chanlist_len;
893 err++;
894 }
895
896 switch (cmd->stop_src) {
897 case TRIG_COUNT:
898 /* Any count allowed. */
899 break;
900 case TRIG_EXT:
901 /* Force to external trigger 0. */
902 if ((cmd->stop_arg & ~CR_FLAGS_MASK) != 0) {
903 cmd->stop_arg = COMBINE(cmd->stop_arg, 0,
904 ~CR_FLAGS_MASK);
905 err++;
906 }
907 /* The only flag allowed is CR_EDGE, which is ignored. */
908 if ((cmd->stop_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
909 cmd->stop_arg = COMBINE(cmd->stop_arg, 0,
910 CR_FLAGS_MASK & ~CR_EDGE);
911 }
912 break;
913 case TRIG_NONE:
914 if (cmd->stop_arg != 0) {
915 cmd->stop_arg = 0;
916 err++;
917 }
918 break;
919 }
920
921 if (err)
922 return 3;
923
924 /* Step 4: fix up any arguments. */
925
926 if (cmd->scan_begin_src == TRIG_TIMER) {
927 unsigned int div1, div2, round;
928 int round_mode = cmd->flags & TRIG_ROUND_MASK;
929
930 tmp = cmd->scan_begin_arg;
931 /* Check whether to use a single timer. */
932 switch (round_mode) {
933 case TRIG_ROUND_NEAREST:
934 default:
935 round = TIMEBASE_10MHZ / 2;
936 break;
937 case TRIG_ROUND_DOWN:
938 round = 0;
939 break;
940 case TRIG_ROUND_UP:
941 round = TIMEBASE_10MHZ - 1;
942 break;
943 }
944 /* Be careful to avoid overflow! */
945 div2 = cmd->scan_begin_arg / TIMEBASE_10MHZ;
946 div2 += (round + cmd->scan_begin_arg % TIMEBASE_10MHZ) /
947 TIMEBASE_10MHZ;
948 if (div2 <= 0x10000) {
949 /* A single timer will suffice. */
950 if (div2 < 2)
951 div2 = 2;
952 cmd->scan_begin_arg = div2 * TIMEBASE_10MHZ;
953 if (cmd->scan_begin_arg < div2 ||
954 cmd->scan_begin_arg < TIMEBASE_10MHZ) {
955 /* Overflow! */
956 cmd->scan_begin_arg = MAX_SCAN_PERIOD;
957 }
958 } else {
959 /* Use two timers. */
960 div1 = devpriv->cached_div1;
961 div2 = devpriv->cached_div2;
962 pci224_cascade_ns_to_timer(TIMEBASE_10MHZ, &div1, &div2,
963 &cmd->scan_begin_arg,
964 round_mode);
965 devpriv->cached_div1 = div1;
966 devpriv->cached_div2 = div2;
967 }
968 if (tmp != cmd->scan_begin_arg) {
969 err++;
970 }
971 }
972
973 if (err)
974 return 4;
975
976 /* Step 5: check channel list. */
977
978 if (cmd->chanlist && (cmd->chanlist_len > 0)) {
979 unsigned int range;
980 enum { range_err = 1, dupchan_err = 2, };
981 unsigned errors;
982 unsigned int n;
983 unsigned int ch;
984
985 /*
986 * Check all channels have the same range index. Don't care
987 * about analogue reference, as we can't configure it.
988 *
989 * Check the list has no duplicate channels.
990 */
991 range = CR_RANGE(cmd->chanlist[0]);
992 errors = 0;
993 tmp = 0;
994 for (n = 0; n < cmd->chanlist_len; n++) {
995 ch = CR_CHAN(cmd->chanlist[n]);
996 if (tmp & (1U << ch)) {
997 errors |= dupchan_err;
998 }
999 tmp |= (1U << ch);
1000 if (CR_RANGE(cmd->chanlist[n]) != range) {
1001 errors |= range_err;
1002 }
1003 }
1004 if (errors) {
1005 if (errors & dupchan_err) {
1006 DPRINTK("comedi%d: " DRIVER_NAME
1007 ": ao_cmdtest: "
1008 "entries in chanlist must contain no "
1009 "duplicate channels\n", dev->minor);
1010 }
1011 if (errors & range_err) {
1012 DPRINTK("comedi%d: " DRIVER_NAME
1013 ": ao_cmdtest: "
1014 "entries in chanlist must all have "
1015 "the same range index\n", dev->minor);
1016 }
1017 err++;
1018 }
1019 }
1020
1021 if (err)
1022 return 5;
1023
1024 return 0;
1025 }
1026
1027 /*
1028 * 'do_cmd' function for AO subdevice.
1029 */
1030 static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1031 {
1032 struct comedi_cmd *cmd = &s->async->cmd;
1033 int range;
1034 unsigned int i, j;
1035 unsigned int ch;
1036 unsigned int rank;
1037 unsigned long flags;
1038
1039 /* Cannot handle null/empty chanlist. */
1040 if (cmd->chanlist == NULL || cmd->chanlist_len == 0) {
1041 return -EINVAL;
1042 }
1043
1044 /* Determine which channels are enabled and their load order. */
1045 devpriv->ao_enab = 0;
1046
1047 for (i = 0; i < cmd->chanlist_len; i++) {
1048 ch = CR_CHAN(cmd->chanlist[i]);
1049 devpriv->ao_enab |= 1U << ch;
1050 rank = 0;
1051 for (j = 0; j < cmd->chanlist_len; j++) {
1052 if (CR_CHAN(cmd->chanlist[j]) < ch) {
1053 rank++;
1054 }
1055 }
1056 devpriv->ao_scan_order[rank] = i;
1057 }
1058
1059 /* Set enabled channels. */
1060 outw(devpriv->ao_enab, dev->iobase + PCI224_DACCEN);
1061
1062 /* Determine range and polarity. All channels the same. */
1063 range = CR_RANGE(cmd->chanlist[0]);
1064
1065 /*
1066 * Set DAC range and polarity.
1067 * Set DAC scan trigger source to 'none'.
1068 * Set DAC FIFO interrupt trigger level to 'not half full'.
1069 * Reset DAC FIFO.
1070 *
1071 * N.B. DAC FIFO interrupts are currently disabled.
1072 */
1073 devpriv->daccon = COMBINE(devpriv->daccon,
1074 (devpriv->
1075 hwrange[range] | PCI224_DACCON_TRIG_NONE |
1076 PCI224_DACCON_FIFOINTR_NHALF),
1077 (PCI224_DACCON_POLAR_MASK |
1078 PCI224_DACCON_VREF_MASK |
1079 PCI224_DACCON_TRIG_MASK |
1080 PCI224_DACCON_FIFOINTR_MASK));
1081 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
1082 dev->iobase + PCI224_DACCON);
1083
1084 if (cmd->scan_begin_src == TRIG_TIMER) {
1085 unsigned int div1, div2, round;
1086 unsigned int ns = cmd->scan_begin_arg;
1087 int round_mode = cmd->flags & TRIG_ROUND_MASK;
1088
1089 /* Check whether to use a single timer. */
1090 switch (round_mode) {
1091 case TRIG_ROUND_NEAREST:
1092 default:
1093 round = TIMEBASE_10MHZ / 2;
1094 break;
1095 case TRIG_ROUND_DOWN:
1096 round = 0;
1097 break;
1098 case TRIG_ROUND_UP:
1099 round = TIMEBASE_10MHZ - 1;
1100 break;
1101 }
1102 /* Be careful to avoid overflow! */
1103 div2 = cmd->scan_begin_arg / TIMEBASE_10MHZ;
1104 div2 += (round + cmd->scan_begin_arg % TIMEBASE_10MHZ) /
1105 TIMEBASE_10MHZ;
1106 if (div2 <= 0x10000) {
1107 /* A single timer will suffice. */
1108 if (div2 < 2)
1109 div2 = 2;
1110 div2 &= 0xffff;
1111 div1 = 1; /* Flag that single timer to be used. */
1112 } else {
1113 /* Use two timers. */
1114 div1 = devpriv->cached_div1;
1115 div2 = devpriv->cached_div2;
1116 pci224_cascade_ns_to_timer(TIMEBASE_10MHZ, &div1, &div2,
1117 &ns, round_mode);
1118 }
1119
1120 /*
1121 * The output of timer Z2-0 will be used as the scan trigger
1122 * source.
1123 */
1124 /* Make sure Z2-0 is gated on. */
1125 outb(GAT_CONFIG(0, GAT_VCC),
1126 devpriv->iobase1 + PCI224_ZGAT_SCE);
1127 if (div1 == 1) {
1128 /* Not cascading. Z2-0 needs 10 MHz clock. */
1129 outb(CLK_CONFIG(0, CLK_10MHZ),
1130 devpriv->iobase1 + PCI224_ZCLK_SCE);
1131 } else {
1132 /* Cascading with Z2-2. */
1133 /* Make sure Z2-2 is gated on. */
1134 outb(GAT_CONFIG(2, GAT_VCC),
1135 devpriv->iobase1 + PCI224_ZGAT_SCE);
1136 /* Z2-2 needs 10 MHz clock. */
1137 outb(CLK_CONFIG(2, CLK_10MHZ),
1138 devpriv->iobase1 + PCI224_ZCLK_SCE);
1139 /* Load Z2-2 mode (2) and counter (div1). */
1140 i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0,
1141 2, div1, 2);
1142 /* Z2-0 is clocked from Z2-2's output. */
1143 outb(CLK_CONFIG(0, CLK_OUTNM1),
1144 devpriv->iobase1 + PCI224_ZCLK_SCE);
1145 }
1146 /* Load Z2-0 mode (2) and counter (div2). */
1147 i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0, 0, div2, 2);
1148 }
1149
1150 /*
1151 * Sort out end of acquisition.
1152 */
1153 switch (cmd->stop_src) {
1154 case TRIG_COUNT:
1155 /* Fixed number of scans. */
1156 devpriv->ao_stop_continuous = 0;
1157 devpriv->ao_stop_count = cmd->stop_arg;
1158 break;
1159 default:
1160 /* Continuous scans. */
1161 devpriv->ao_stop_continuous = 1;
1162 devpriv->ao_stop_count = 0;
1163 break;
1164 }
1165
1166 /*
1167 * Sort out start of acquisition.
1168 */
1169 switch (cmd->start_src) {
1170 case TRIG_INT:
1171 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1172 s->async->inttrig = &pci224_ao_inttrig_start;
1173 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1174 break;
1175 case TRIG_EXT:
1176 /* Enable external interrupt trigger to start acquisition. */
1177 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1178 devpriv->intsce |= PCI224_INTR_EXT;
1179 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE);
1180 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1181 break;
1182 }
1183
1184 return 0;
1185 }
1186
1187 /*
1188 * 'cancel' function for AO subdevice.
1189 */
1190 static int pci224_ao_cancel(struct comedi_device *dev,
1191 struct comedi_subdevice *s)
1192 {
1193 pci224_ao_stop(dev, s);
1194 return 0;
1195 }
1196
1197 /*
1198 * 'munge' data for AO command.
1199 */
1200 static void
1201 pci224_ao_munge(struct comedi_device *dev, struct comedi_subdevice *s,
1202 void *data, unsigned int num_bytes, unsigned int chan_index)
1203 {
1204 struct comedi_async *async = s->async;
1205 short *array = data;
1206 unsigned int length = num_bytes / sizeof(*array);
1207 unsigned int offset;
1208 unsigned int shift;
1209 unsigned int i;
1210
1211 /* The hardware expects 16-bit numbers. */
1212 shift = 16 - thisboard->ao_bits;
1213 /* Channels will be all bipolar or all unipolar. */
1214 if ((devpriv->hwrange[CR_RANGE(async->cmd.chanlist[0])] &
1215 PCI224_DACCON_POLAR_MASK) == PCI224_DACCON_POLAR_UNI) {
1216 /* Unipolar */
1217 offset = 0;
1218 } else {
1219 /* Bipolar */
1220 offset = 32768;
1221 }
1222 /* Munge the data. */
1223 for (i = 0; i < length; i++) {
1224 array[i] = (array[i] << shift) - offset;
1225 }
1226 }
1227
1228 /*
1229 * Interrupt handler.
1230 */
1231 static irqreturn_t pci224_interrupt(int irq, void *d)
1232 {
1233 struct comedi_device *dev = d;
1234 struct comedi_subdevice *s = &dev->subdevices[0];
1235 struct comedi_cmd *cmd;
1236 unsigned char intstat, valid_intstat;
1237 unsigned char curenab;
1238 int retval = 0;
1239 unsigned long flags;
1240
1241 intstat = inb(devpriv->iobase1 + PCI224_INT_SCE) & 0x3F;
1242 if (intstat) {
1243 retval = 1;
1244 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1245 valid_intstat = devpriv->intsce & intstat;
1246 /* Temporarily disable interrupt sources. */
1247 curenab = devpriv->intsce & ~intstat;
1248 outb(curenab, devpriv->iobase1 + PCI224_INT_SCE);
1249 devpriv->intr_running = 1;
1250 devpriv->intr_cpuid = THISCPU;
1251 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1252 if (valid_intstat != 0) {
1253 cmd = &s->async->cmd;
1254 if (valid_intstat & PCI224_INTR_EXT) {
1255 devpriv->intsce &= ~PCI224_INTR_EXT;
1256 if (cmd->start_src == TRIG_EXT) {
1257 pci224_ao_start(dev, s);
1258 } else if (cmd->stop_src == TRIG_EXT) {
1259 pci224_ao_stop(dev, s);
1260 }
1261 }
1262 if (valid_intstat & PCI224_INTR_DAC) {
1263 pci224_ao_handle_fifo(dev, s);
1264 }
1265 }
1266 /* Reenable interrupt sources. */
1267 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1268 if (curenab != devpriv->intsce) {
1269 outb(devpriv->intsce,
1270 devpriv->iobase1 + PCI224_INT_SCE);
1271 }
1272 devpriv->intr_running = 0;
1273 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1274 }
1275 return IRQ_RETVAL(retval);
1276 }
1277
1278 /*
1279 * This function looks for a PCI device matching the requested board name,
1280 * bus and slot.
1281 */
1282 static int
1283 pci224_find_pci(struct comedi_device *dev, int bus, int slot,
1284 struct pci_dev **pci_dev_p)
1285 {
1286 struct pci_dev *pci_dev = NULL;
1287
1288 *pci_dev_p = NULL;
1289
1290 /* Look for matching PCI device. */
1291 for (pci_dev = pci_get_device(PCI_VENDOR_ID_AMPLICON, PCI_ANY_ID, NULL);
1292 pci_dev != NULL;
1293 pci_dev = pci_get_device(PCI_VENDOR_ID_AMPLICON, PCI_ANY_ID,
1294 pci_dev)) {
1295 /* If bus/slot specified, check them. */
1296 if (bus || slot) {
1297 if (bus != pci_dev->bus->number
1298 || slot != PCI_SLOT(pci_dev->devfn))
1299 continue;
1300 }
1301 if (thisboard->model == any_model) {
1302 /* Match any supported model. */
1303 int i;
1304
1305 for (i = 0; i < ARRAY_SIZE(pci224_boards); i++) {
1306 if (pci_dev->device == pci224_boards[i].devid) {
1307 /* Change board_ptr to matched board. */
1308 dev->board_ptr = &pci224_boards[i];
1309 break;
1310 }
1311 }
1312 if (i == ARRAY_SIZE(pci224_boards))
1313 continue;
1314 } else {
1315 /* Match specific model name. */
1316 if (thisboard->devid != pci_dev->device)
1317 continue;
1318 }
1319
1320 /* Found a match. */
1321 *pci_dev_p = pci_dev;
1322 return 0;
1323 }
1324 /* No match found. */
1325 if (bus || slot) {
1326 printk(KERN_ERR "comedi%d: error! "
1327 "no %s found at pci %02x:%02x!\n",
1328 dev->minor, thisboard->name, bus, slot);
1329 } else {
1330 printk(KERN_ERR "comedi%d: error! no %s found!\n",
1331 dev->minor, thisboard->name);
1332 }
1333 return -EIO;
1334 }
1335
1336 /*
1337 * Attach is called by the Comedi core to configure the driver
1338 * for a particular board. If you specified a board_name array
1339 * in the driver structure, dev->board_ptr contains that
1340 * address.
1341 */
1342 static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1343 {
1344 struct comedi_subdevice *s;
1345 struct pci_dev *pci_dev;
1346 unsigned int irq;
1347 int bus = 0, slot = 0;
1348 unsigned n;
1349 int ret;
1350
1351 printk(KERN_DEBUG "comedi%d: %s: attach\n", dev->minor, DRIVER_NAME);
1352
1353 bus = it->options[0];
1354 slot = it->options[1];
1355 ret = alloc_private(dev, sizeof(struct pci224_private));
1356 if (ret < 0) {
1357 printk(KERN_ERR "comedi%d: error! out of memory!\n",
1358 dev->minor);
1359 return ret;
1360 }
1361
1362 ret = pci224_find_pci(dev, bus, slot, &pci_dev);
1363 if (ret < 0)
1364 return ret;
1365
1366 devpriv->pci_dev = pci_dev;
1367 ret = comedi_pci_enable(pci_dev, DRIVER_NAME);
1368 if (ret < 0) {
1369 printk(KERN_ERR
1370 "comedi%d: error! cannot enable PCI device "
1371 "and request regions!\n", dev->minor);
1372 return ret;
1373 }
1374 spin_lock_init(&devpriv->ao_spinlock);
1375
1376 devpriv->iobase1 = pci_resource_start(pci_dev, 2);
1377 dev->iobase = pci_resource_start(pci_dev, 3);
1378 irq = pci_dev->irq;
1379
1380 /* Allocate readback buffer for AO channels. */
1381 devpriv->ao_readback = kmalloc(sizeof(devpriv->ao_readback[0]) *
1382 thisboard->ao_chans, GFP_KERNEL);
1383 if (!devpriv->ao_readback) {
1384 return -ENOMEM;
1385 }
1386
1387 /* Allocate buffer to hold values for AO channel scan. */
1388 devpriv->ao_scan_vals = kmalloc(sizeof(devpriv->ao_scan_vals[0]) *
1389 thisboard->ao_chans, GFP_KERNEL);
1390 if (!devpriv->ao_scan_vals) {
1391 return -ENOMEM;
1392 }
1393
1394 /* Allocate buffer to hold AO channel scan order. */
1395 devpriv->ao_scan_order = kmalloc(sizeof(devpriv->ao_scan_order[0]) *
1396 thisboard->ao_chans, GFP_KERNEL);
1397 if (!devpriv->ao_scan_order) {
1398 return -ENOMEM;
1399 }
1400
1401 /* Disable interrupt sources. */
1402 devpriv->intsce = 0;
1403 outb(0, devpriv->iobase1 + PCI224_INT_SCE);
1404
1405 /* Initialize the DAC hardware. */
1406 outw(PCI224_DACCON_GLOBALRESET, dev->iobase + PCI224_DACCON);
1407 outw(0, dev->iobase + PCI224_DACCEN);
1408 outw(0, dev->iobase + PCI224_FIFOSIZ);
1409 devpriv->daccon = (PCI224_DACCON_TRIG_SW | PCI224_DACCON_POLAR_BI |
1410 PCI224_DACCON_FIFOENAB |
1411 PCI224_DACCON_FIFOINTR_EMPTY);
1412 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
1413 dev->iobase + PCI224_DACCON);
1414
1415 /* Allocate subdevices. There is only one! */
1416 ret = alloc_subdevices(dev, 1);
1417 if (ret < 0) {
1418 printk(KERN_ERR "comedi%d: error! out of memory!\n",
1419 dev->minor);
1420 return ret;
1421 }
1422
1423 s = dev->subdevices + 0;
1424 /* Analog output subdevice. */
1425 s->type = COMEDI_SUBD_AO;
1426 s->subdev_flags = SDF_WRITABLE | SDF_GROUND | SDF_CMD_WRITE;
1427 s->n_chan = thisboard->ao_chans;
1428 s->maxdata = (1 << thisboard->ao_bits) - 1;
1429 s->insn_write = &pci224_ao_insn_write;
1430 s->insn_read = &pci224_ao_insn_read;
1431 s->len_chanlist = s->n_chan;
1432
1433 dev->write_subdev = s;
1434 s->do_cmd = &pci224_ao_cmd;
1435 s->do_cmdtest = &pci224_ao_cmdtest;
1436 s->cancel = &pci224_ao_cancel;
1437 s->munge = &pci224_ao_munge;
1438
1439 /* Sort out channel range options. */
1440 if (thisboard->model == pci234_model) {
1441 /* PCI234 range options. */
1442 const struct comedi_lrange **range_table_list;
1443
1444 s->range_table_list = range_table_list =
1445 kmalloc(sizeof(struct comedi_lrange *) * s->n_chan,
1446 GFP_KERNEL);
1447 if (!s->range_table_list) {
1448 return -ENOMEM;
1449 }
1450 for (n = 2; n < 3 + s->n_chan; n++) {
1451 if (it->options[n] < 0 || it->options[n] > 1) {
1452 printk(KERN_WARNING "comedi%d: %s: warning! "
1453 "bad options[%u]=%d\n",
1454 dev->minor, DRIVER_NAME, n,
1455 it->options[n]);
1456 }
1457 }
1458 for (n = 0; n < s->n_chan; n++) {
1459 if (n < COMEDI_NDEVCONFOPTS - 3 &&
1460 it->options[3 + n] == 1) {
1461 if (it->options[2] == 1) {
1462 range_table_list[n] = &range_pci234_ext;
1463 } else {
1464 range_table_list[n] = &range_bipolar5;
1465 }
1466 } else {
1467 if (it->options[2] == 1) {
1468 range_table_list[n] =
1469 &range_pci234_ext2;
1470 } else {
1471 range_table_list[n] = &range_bipolar10;
1472 }
1473 }
1474 }
1475 devpriv->hwrange = hwrange_pci234;
1476 } else {
1477 /* PCI224 range options. */
1478 if (it->options[2] == 1) {
1479 s->range_table = &range_pci224_external;
1480 devpriv->hwrange = hwrange_pci224_external;
1481 } else {
1482 if (it->options[2] != 0) {
1483 printk(KERN_WARNING "comedi%d: %s: warning! "
1484 "bad options[2]=%d\n",
1485 dev->minor, DRIVER_NAME, it->options[2]);
1486 }
1487 s->range_table = &range_pci224_internal;
1488 devpriv->hwrange = hwrange_pci224_internal;
1489 }
1490 }
1491
1492 dev->board_name = thisboard->name;
1493
1494 if (irq) {
1495 ret = request_irq(irq, pci224_interrupt, IRQF_SHARED,
1496 DRIVER_NAME, dev);
1497 if (ret < 0) {
1498 printk(KERN_ERR "comedi%d: error! "
1499 "unable to allocate irq %u\n", dev->minor, irq);
1500 return ret;
1501 } else {
1502 dev->irq = irq;
1503 }
1504 }
1505
1506 printk(KERN_INFO "comedi%d: %s ", dev->minor, dev->board_name);
1507 printk("(pci %s) ", pci_name(pci_dev));
1508 if (irq) {
1509 printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE"));
1510 } else {
1511 printk("(no irq) ");
1512 }
1513
1514 printk("attached\n");
1515
1516 return 1;
1517 }
1518
1519 /*
1520 * _detach is called to deconfigure a device. It should deallocate
1521 * resources.
1522 * This function is also called when _attach() fails, so it should be
1523 * careful not to release resources that were not necessarily
1524 * allocated by _attach(). dev->private and dev->subdevices are
1525 * deallocated automatically by the core.
1526 */
1527 static int pci224_detach(struct comedi_device *dev)
1528 {
1529 printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, DRIVER_NAME);
1530
1531 if (dev->irq) {
1532 free_irq(dev->irq, dev);
1533 }
1534 if (dev->subdevices) {
1535 struct comedi_subdevice *s;
1536
1537 s = dev->subdevices + 0;
1538 /* AO subdevice */
1539 kfree(s->range_table_list);
1540 }
1541 if (devpriv) {
1542 kfree(devpriv->ao_readback);
1543 kfree(devpriv->ao_scan_vals);
1544 kfree(devpriv->ao_scan_order);
1545 if (devpriv->pci_dev) {
1546 if (dev->iobase) {
1547 comedi_pci_disable(devpriv->pci_dev);
1548 }
1549 pci_dev_put(devpriv->pci_dev);
1550 }
1551 }
1552 if (dev->board_name) {
1553 printk(KERN_INFO "comedi%d: %s removed\n",
1554 dev->minor, dev->board_name);
1555 }
1556
1557 return 0;
1558 }