staging: brcm80211: remove include file proto/802.1d.h
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / brcm80211 / brcmsmac / wlc_rate.c
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18
19 #include <proto/802.11.h>
20 #include <bcmdefs.h>
21 #include <osl.h>
22 #include <bcmutils.h>
23 #include <siutils.h>
24 #include <wlioctl.h>
25 #include <sbhnddma.h>
26
27 #include "wlc_types.h"
28 #include "sbhndpio.h"
29 #include "d11.h"
30 #include "wl_dbg.h"
31 #include "wlc_cfg.h"
32 #include "wlc_scb.h"
33 #include "wlc_pub.h"
34 #include "wlc_rate.h"
35
36 /* Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate value */
37 const u8 rate_info[WLC_MAXRATE + 1] = {
38 /* 0 1 2 3 4 5 6 7 8 9 */
39 /* 0 */ 0x00, 0x00, 0x0a, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
40 /* 10 */ 0x00, 0x37, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x00,
41 /* 20 */ 0x00, 0x00, 0x6e, 0x00, 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00,
42 /* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x00, 0x00, 0x00,
43 /* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00,
44 /* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
45 /* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
46 /* 70 */ 0x00, 0x00, 0x8d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
47 /* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
48 /* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00,
49 /* 100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8c
50 };
51
52 /* rates are in units of Kbps */
53 const mcs_info_t mcs_table[MCS_TABLE_SIZE] = {
54 /* MCS 0: SS 1, MOD: BPSK, CR 1/2 */
55 {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00,
56 WLC_RATE_6M},
57 /* MCS 1: SS 1, MOD: QPSK, CR 1/2 */
58 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08,
59 WLC_RATE_12M},
60 /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */
61 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A,
62 WLC_RATE_18M},
63 /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */
64 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10,
65 WLC_RATE_24M},
66 /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */
67 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12,
68 WLC_RATE_36M},
69 /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */
70 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19,
71 WLC_RATE_48M},
72 /* MCS 6: SS 1, MOD: 64QAM, CR 3/4 */
73 {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A,
74 WLC_RATE_54M},
75 /* MCS 7: SS 1, MOD: 64QAM, CR 5/6 */
76 {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C,
77 WLC_RATE_54M},
78 /* MCS 8: SS 2, MOD: BPSK, CR 1/2 */
79 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40,
80 WLC_RATE_6M},
81 /* MCS 9: SS 2, MOD: QPSK, CR 1/2 */
82 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48,
83 WLC_RATE_12M},
84 /* MCS 10: SS 2, MOD: QPSK, CR 3/4 */
85 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x4A,
86 WLC_RATE_18M},
87 /* MCS 11: SS 2, MOD: 16QAM, CR 1/2 */
88 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x50,
89 WLC_RATE_24M},
90 /* MCS 12: SS 2, MOD: 16QAM, CR 3/4 */
91 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x52,
92 WLC_RATE_36M},
93 /* MCS 13: SS 2, MOD: 64QAM, CR 2/3 */
94 {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0x59,
95 WLC_RATE_48M},
96 /* MCS 14: SS 2, MOD: 64QAM, CR 3/4 */
97 {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x5A,
98 WLC_RATE_54M},
99 /* MCS 15: SS 2, MOD: 64QAM, CR 5/6 */
100 {130000, 270000, CEIL(130000 * 10, 9), CEIL(270000 * 10, 9), 0x5C,
101 WLC_RATE_54M},
102 /* MCS 16: SS 3, MOD: BPSK, CR 1/2 */
103 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x80,
104 WLC_RATE_6M},
105 /* MCS 17: SS 3, MOD: QPSK, CR 1/2 */
106 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x88,
107 WLC_RATE_12M},
108 /* MCS 18: SS 3, MOD: QPSK, CR 3/4 */
109 {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x8A,
110 WLC_RATE_18M},
111 /* MCS 19: SS 3, MOD: 16QAM, CR 1/2 */
112 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x90,
113 WLC_RATE_24M},
114 /* MCS 20: SS 3, MOD: 16QAM, CR 3/4 */
115 {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x92,
116 WLC_RATE_36M},
117 /* MCS 21: SS 3, MOD: 64QAM, CR 2/3 */
118 {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0x99,
119 WLC_RATE_48M},
120 /* MCS 22: SS 3, MOD: 64QAM, CR 3/4 */
121 {175500, 364500, CEIL(175500 * 10, 9), CEIL(364500 * 10, 9), 0x9A,
122 WLC_RATE_54M},
123 /* MCS 23: SS 3, MOD: 64QAM, CR 5/6 */
124 {195000, 405000, CEIL(195000 * 10, 9), CEIL(405000 * 10, 9), 0x9B,
125 WLC_RATE_54M},
126 /* MCS 24: SS 4, MOD: BPSK, CR 1/2 */
127 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0xC0,
128 WLC_RATE_6M},
129 /* MCS 25: SS 4, MOD: QPSK, CR 1/2 */
130 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0xC8,
131 WLC_RATE_12M},
132 /* MCS 26: SS 4, MOD: QPSK, CR 3/4 */
133 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0xCA,
134 WLC_RATE_18M},
135 /* MCS 27: SS 4, MOD: 16QAM, CR 1/2 */
136 {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0xD0,
137 WLC_RATE_24M},
138 /* MCS 28: SS 4, MOD: 16QAM, CR 3/4 */
139 {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0xD2,
140 WLC_RATE_36M},
141 /* MCS 29: SS 4, MOD: 64QAM, CR 2/3 */
142 {208000, 432000, CEIL(208000 * 10, 9), CEIL(432000 * 10, 9), 0xD9,
143 WLC_RATE_48M},
144 /* MCS 30: SS 4, MOD: 64QAM, CR 3/4 */
145 {234000, 486000, CEIL(234000 * 10, 9), CEIL(486000 * 10, 9), 0xDA,
146 WLC_RATE_54M},
147 /* MCS 31: SS 4, MOD: 64QAM, CR 5/6 */
148 {260000, 540000, CEIL(260000 * 10, 9), CEIL(540000 * 10, 9), 0xDB,
149 WLC_RATE_54M},
150 /* MCS 32: SS 1, MOD: BPSK, CR 1/2 */
151 {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, WLC_RATE_6M},
152 };
153
154 /* phycfg for legacy OFDM frames: code rate, modulation scheme, spatial streams
155 * Number of spatial streams: always 1
156 * other fields: refer to table 78 of section 17.3.2.2 of the original .11a standard
157 */
158 typedef struct legacy_phycfg {
159 u32 rate_ofdm; /* ofdm mac rate */
160 u8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */
161 } legacy_phycfg_t;
162
163 #define LEGACY_PHYCFG_TABLE_SIZE 12 /* Number of legacy_rate_cfg entries in the table */
164
165 /* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */
166 /* Eventually MIMOPHY would also be converted to this format */
167 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
168 static const legacy_phycfg_t legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = {
169 {WLC_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */
170 {WLC_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */
171 {WLC_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */
172 {WLC_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */
173 {WLC_RATE_6M, 0x00}, /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */
174 {WLC_RATE_9M, 0x02}, /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */
175 {WLC_RATE_12M, 0x08}, /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */
176 {WLC_RATE_18M, 0x0A}, /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */
177 {WLC_RATE_24M, 0x10}, /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */
178 {WLC_RATE_36M, 0x12}, /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */
179 {WLC_RATE_48M, 0x19}, /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */
180 {WLC_RATE_54M, 0x1A}, /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */
181 };
182
183 /* Hardware rates (also encodes default basic rates) */
184
185 const wlc_rateset_t cck_ofdm_mimo_rates = {
186 12,
187 { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */
188 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
189 0x6c},
190 0x00,
191 {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
192 0x00, 0x00, 0x00, 0x00}
193 };
194
195 const wlc_rateset_t ofdm_mimo_rates = {
196 8,
197 { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
198 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
199 0x00,
200 {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
201 0x00, 0x00, 0x00, 0x00}
202 };
203
204 /* Default ratesets that include MCS32 for 40BW channels */
205 const wlc_rateset_t cck_ofdm_40bw_mimo_rates = {
206 12,
207 { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */
208 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
209 0x6c},
210 0x00,
211 {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
212 0x00, 0x00, 0x00, 0x00}
213 };
214
215 const wlc_rateset_t ofdm_40bw_mimo_rates = {
216 8,
217 { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
218 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
219 0x00,
220 {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
221 0x00, 0x00, 0x00, 0x00}
222 };
223
224 const wlc_rateset_t cck_ofdm_rates = {
225 12,
226 { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */
227 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
228 0x6c},
229 0x00,
230 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
231 0x00, 0x00, 0x00, 0x00}
232 };
233
234 const wlc_rateset_t gphy_legacy_rates = {
235 4,
236 { /* 1b, 2b, 5.5b, 11b Mbps */
237 0x82, 0x84, 0x8b, 0x96},
238 0x00,
239 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
240 0x00, 0x00, 0x00, 0x00}
241 };
242
243 const wlc_rateset_t ofdm_rates = {
244 8,
245 { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
246 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
247 0x00,
248 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
249 0x00, 0x00, 0x00, 0x00}
250 };
251
252 const wlc_rateset_t cck_rates = {
253 4,
254 { /* 1b, 2b, 5.5, 11 Mbps */
255 0x82, 0x84, 0x0b, 0x16},
256 0x00,
257 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
258 0x00, 0x00, 0x00, 0x00}
259 };
260
261 static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate);
262
263 /* check if rateset is valid.
264 * if check_brate is true, rateset without a basic rate is considered NOT valid.
265 */
266 static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate)
267 {
268 uint idx;
269
270 if (!rs->count)
271 return false;
272
273 if (!check_brate)
274 return true;
275
276 /* error if no basic rates */
277 for (idx = 0; idx < rs->count; idx++) {
278 if (rs->rates[idx] & WLC_RATE_FLAG)
279 return true;
280 }
281 return false;
282 }
283
284 void wlc_rateset_mcs_upd(wlc_rateset_t *rs, u8 txstreams)
285 {
286 int i;
287 for (i = txstreams; i < MAX_STREAMS_SUPPORTED; i++)
288 rs->mcs[i] = 0;
289 }
290
291 /* filter based on hardware rateset, and sort filtered rateset with basic bit(s) preserved,
292 * and check if resulting rateset is valid.
293 */
294 bool
295 wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs,
296 const wlc_rateset_t *hw_rs,
297 bool check_brate, u8 txstreams)
298 {
299 u8 rateset[WLC_MAXRATE + 1];
300 u8 r;
301 uint count;
302 uint i;
303
304 memset(rateset, 0, sizeof(rateset));
305 count = rs->count;
306
307 for (i = 0; i < count; i++) {
308 /* mask off "basic rate" bit, WLC_RATE_FLAG */
309 r = (int)rs->rates[i] & RATE_MASK;
310 if ((r > WLC_MAXRATE) || (rate_info[r] == 0)) {
311 continue;
312 }
313 rateset[r] = rs->rates[i]; /* preserve basic bit! */
314 }
315
316 /* fill out the rates in order, looking at only supported rates */
317 count = 0;
318 for (i = 0; i < hw_rs->count; i++) {
319 r = hw_rs->rates[i] & RATE_MASK;
320 ASSERT(r <= WLC_MAXRATE);
321 if (rateset[r])
322 rs->rates[count++] = rateset[r];
323 }
324
325 rs->count = count;
326
327 /* only set the mcs rate bit if the equivalent hw mcs bit is set */
328 for (i = 0; i < MCSSET_LEN; i++)
329 rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]);
330
331 if (wlc_rateset_valid(rs, check_brate))
332 return true;
333 else
334 return false;
335 }
336
337 /* caluclate the rate of a rx'd frame and return it as a ratespec */
338 ratespec_t BCMFASTPATH wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp)
339 {
340 int phy_type;
341 ratespec_t rspec = PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT;
342
343 phy_type =
344 ((rxh->RxChan & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT);
345
346 if ((phy_type == PHY_TYPE_N) || (phy_type == PHY_TYPE_SSN) ||
347 (phy_type == PHY_TYPE_LCN) || (phy_type == PHY_TYPE_HT)) {
348 switch (rxh->PhyRxStatus_0 & PRXS0_FT_MASK) {
349 case PRXS0_CCK:
350 rspec =
351 CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal);
352 break;
353 case PRXS0_OFDM:
354 rspec =
355 OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)->
356 rlpt[0]);
357 break;
358 case PRXS0_PREN:
359 rspec = (plcp[0] & MIMO_PLCP_MCS_MASK) | RSPEC_MIMORATE;
360 if (plcp[0] & MIMO_PLCP_40MHZ) {
361 /* indicate rspec is for 40 MHz mode */
362 rspec &= ~RSPEC_BW_MASK;
363 rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT);
364 }
365 break;
366 case PRXS0_STDN:
367 /* fallthru */
368 default:
369 /* not supported */
370 ASSERT(0);
371 break;
372 }
373 if (PLCP3_ISSGI(plcp[3]))
374 rspec |= RSPEC_SHORT_GI;
375 } else
376 if ((phy_type == PHY_TYPE_A) || (rxh->PhyRxStatus_0 & PRXS0_OFDM))
377 rspec = OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)->rlpt[0]);
378 else
379 rspec = CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal);
380
381 return rspec;
382 }
383
384 /* copy rateset src to dst as-is (no masking or sorting) */
385 void wlc_rateset_copy(const wlc_rateset_t *src, wlc_rateset_t *dst)
386 {
387 memcpy(dst, src, sizeof(wlc_rateset_t));
388 }
389
390 /*
391 * Copy and selectively filter one rateset to another.
392 * 'basic_only' means only copy basic rates.
393 * 'rates' indicates cck (11b) and ofdm rates combinations.
394 * - 0: cck and ofdm
395 * - 1: cck only
396 * - 2: ofdm only
397 * 'xmask' is the copy mask (typically 0x7f or 0xff).
398 */
399 void
400 wlc_rateset_filter(wlc_rateset_t *src, wlc_rateset_t *dst, bool basic_only,
401 u8 rates, uint xmask, bool mcsallow)
402 {
403 uint i;
404 uint r;
405 uint count;
406
407 count = 0;
408 for (i = 0; i < src->count; i++) {
409 r = src->rates[i];
410 if (basic_only && !(r & WLC_RATE_FLAG))
411 continue;
412 if ((rates == WLC_RATES_CCK) && IS_OFDM((r & RATE_MASK)))
413 continue;
414 if ((rates == WLC_RATES_OFDM) && IS_CCK((r & RATE_MASK)))
415 continue;
416 dst->rates[count++] = r & xmask;
417 }
418 dst->count = count;
419 dst->htphy_membership = src->htphy_membership;
420
421 if (mcsallow && rates != WLC_RATES_CCK)
422 memcpy(&dst->mcs[0], &src->mcs[0], MCSSET_LEN);
423 else
424 wlc_rateset_mcs_clear(dst);
425 }
426
427 /* select rateset for a given phy_type and bandtype and filter it, sort it
428 * and fill rs_tgt with result
429 */
430 void
431 wlc_rateset_default(wlc_rateset_t *rs_tgt, const wlc_rateset_t *rs_hw,
432 uint phy_type, int bandtype, bool cck_only, uint rate_mask,
433 bool mcsallow, u8 bw, u8 txstreams)
434 {
435 const wlc_rateset_t *rs_dflt;
436 wlc_rateset_t rs_sel;
437 if ((PHYTYPE_IS(phy_type, PHY_TYPE_HT)) ||
438 (PHYTYPE_IS(phy_type, PHY_TYPE_N)) ||
439 (PHYTYPE_IS(phy_type, PHY_TYPE_LCN)) ||
440 (PHYTYPE_IS(phy_type, PHY_TYPE_SSN))) {
441 if (BAND_5G(bandtype)) {
442 rs_dflt = (bw == WLC_20_MHZ ?
443 &ofdm_mimo_rates : &ofdm_40bw_mimo_rates);
444 } else {
445 rs_dflt = (bw == WLC_20_MHZ ?
446 &cck_ofdm_mimo_rates :
447 &cck_ofdm_40bw_mimo_rates);
448 }
449 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_LP)) {
450 rs_dflt = (BAND_5G(bandtype)) ? &ofdm_rates : &cck_ofdm_rates;
451 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_A)) {
452 rs_dflt = &ofdm_rates;
453 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_G)) {
454 rs_dflt = &cck_ofdm_rates;
455 } else {
456 ASSERT(0); /* should not happen */
457 rs_dflt = &cck_rates; /* force cck */
458 }
459
460 /* if hw rateset is not supplied, assign selected rateset to it */
461 if (!rs_hw)
462 rs_hw = rs_dflt;
463
464 wlc_rateset_copy(rs_dflt, &rs_sel);
465 wlc_rateset_mcs_upd(&rs_sel, txstreams);
466 wlc_rateset_filter(&rs_sel, rs_tgt, false,
467 cck_only ? WLC_RATES_CCK : WLC_RATES_CCK_OFDM,
468 rate_mask, mcsallow);
469 wlc_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, false,
470 mcsallow ? txstreams : 1);
471 }
472
473 s16 BCMFASTPATH wlc_rate_legacy_phyctl(uint rate)
474 {
475 uint i;
476 for (i = 0; i < LEGACY_PHYCFG_TABLE_SIZE; i++)
477 if (rate == legacy_phycfg_table[i].rate_ofdm)
478 return legacy_phycfg_table[i].tx_phy_ctl3;
479
480 return -1;
481 }
482
483 void wlc_rateset_mcs_clear(wlc_rateset_t *rateset)
484 {
485 uint i;
486 for (i = 0; i < MCSSET_LEN; i++)
487 rateset->mcs[i] = 0;
488 }
489
490 void wlc_rateset_mcs_build(wlc_rateset_t *rateset, u8 txstreams)
491 {
492 memcpy(&rateset->mcs[0], &cck_ofdm_mimo_rates.mcs[0], MCSSET_LEN);
493 wlc_rateset_mcs_upd(rateset, txstreams);
494 }
495
496 /* Based on bandwidth passed, allow/disallow MCS 32 in the rateset */
497 void wlc_rateset_bw_mcs_filter(wlc_rateset_t *rateset, u8 bw)
498 {
499 if (bw == WLC_40_MHZ)
500 setbit(rateset->mcs, 32);
501 else
502 clrbit(rateset->mcs, 32);
503 }