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Merge branches 'x86-rwsem-for-linus' and 'x86-gcc46-for-linus' of git://git.kernel...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ssb / main.c
1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20 #include <linux/mmc/sdio_func.h>
21 #include <linux/slab.h>
22
23 #include <pcmcia/cs_types.h>
24 #include <pcmcia/cs.h>
25 #include <pcmcia/cistpl.h>
26 #include <pcmcia/ds.h>
27
28
29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
30 MODULE_LICENSE("GPL");
31
32
33 /* Temporary list of yet-to-be-attached buses */
34 static LIST_HEAD(attach_queue);
35 /* List if running buses */
36 static LIST_HEAD(buses);
37 /* Software ID counter */
38 static unsigned int next_busnumber;
39 /* buses_mutes locks the two buslists and the next_busnumber.
40 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
41 static DEFINE_MUTEX(buses_mutex);
42
43 /* There are differences in the codeflow, if the bus is
44 * initialized from early boot, as various needed services
45 * are not available early. This is a mechanism to delay
46 * these initializations to after early boot has finished.
47 * It's also used to avoid mutex locking, as that's not
48 * available and needed early. */
49 static bool ssb_is_early_boot = 1;
50
51 static void ssb_buses_lock(void);
52 static void ssb_buses_unlock(void);
53
54
55 #ifdef CONFIG_SSB_PCIHOST
56 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
57 {
58 struct ssb_bus *bus;
59
60 ssb_buses_lock();
61 list_for_each_entry(bus, &buses, list) {
62 if (bus->bustype == SSB_BUSTYPE_PCI &&
63 bus->host_pci == pdev)
64 goto found;
65 }
66 bus = NULL;
67 found:
68 ssb_buses_unlock();
69
70 return bus;
71 }
72 #endif /* CONFIG_SSB_PCIHOST */
73
74 #ifdef CONFIG_SSB_PCMCIAHOST
75 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
76 {
77 struct ssb_bus *bus;
78
79 ssb_buses_lock();
80 list_for_each_entry(bus, &buses, list) {
81 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
82 bus->host_pcmcia == pdev)
83 goto found;
84 }
85 bus = NULL;
86 found:
87 ssb_buses_unlock();
88
89 return bus;
90 }
91 #endif /* CONFIG_SSB_PCMCIAHOST */
92
93 #ifdef CONFIG_SSB_SDIOHOST
94 struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func)
95 {
96 struct ssb_bus *bus;
97
98 ssb_buses_lock();
99 list_for_each_entry(bus, &buses, list) {
100 if (bus->bustype == SSB_BUSTYPE_SDIO &&
101 bus->host_sdio == func)
102 goto found;
103 }
104 bus = NULL;
105 found:
106 ssb_buses_unlock();
107
108 return bus;
109 }
110 #endif /* CONFIG_SSB_SDIOHOST */
111
112 int ssb_for_each_bus_call(unsigned long data,
113 int (*func)(struct ssb_bus *bus, unsigned long data))
114 {
115 struct ssb_bus *bus;
116 int res;
117
118 ssb_buses_lock();
119 list_for_each_entry(bus, &buses, list) {
120 res = func(bus, data);
121 if (res >= 0) {
122 ssb_buses_unlock();
123 return res;
124 }
125 }
126 ssb_buses_unlock();
127
128 return -ENODEV;
129 }
130
131 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
132 {
133 if (dev)
134 get_device(dev->dev);
135 return dev;
136 }
137
138 static void ssb_device_put(struct ssb_device *dev)
139 {
140 if (dev)
141 put_device(dev->dev);
142 }
143
144 static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv)
145 {
146 if (drv)
147 get_driver(&drv->drv);
148 return drv;
149 }
150
151 static inline void ssb_driver_put(struct ssb_driver *drv)
152 {
153 if (drv)
154 put_driver(&drv->drv);
155 }
156
157 static int ssb_device_resume(struct device *dev)
158 {
159 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
160 struct ssb_driver *ssb_drv;
161 int err = 0;
162
163 if (dev->driver) {
164 ssb_drv = drv_to_ssb_drv(dev->driver);
165 if (ssb_drv && ssb_drv->resume)
166 err = ssb_drv->resume(ssb_dev);
167 if (err)
168 goto out;
169 }
170 out:
171 return err;
172 }
173
174 static int ssb_device_suspend(struct device *dev, pm_message_t state)
175 {
176 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
177 struct ssb_driver *ssb_drv;
178 int err = 0;
179
180 if (dev->driver) {
181 ssb_drv = drv_to_ssb_drv(dev->driver);
182 if (ssb_drv && ssb_drv->suspend)
183 err = ssb_drv->suspend(ssb_dev, state);
184 if (err)
185 goto out;
186 }
187 out:
188 return err;
189 }
190
191 int ssb_bus_resume(struct ssb_bus *bus)
192 {
193 int err;
194
195 /* Reset HW state information in memory, so that HW is
196 * completely reinitialized. */
197 bus->mapped_device = NULL;
198 #ifdef CONFIG_SSB_DRIVER_PCICORE
199 bus->pcicore.setup_done = 0;
200 #endif
201
202 err = ssb_bus_powerup(bus, 0);
203 if (err)
204 return err;
205 err = ssb_pcmcia_hardware_setup(bus);
206 if (err) {
207 ssb_bus_may_powerdown(bus);
208 return err;
209 }
210 ssb_chipco_resume(&bus->chipco);
211 ssb_bus_may_powerdown(bus);
212
213 return 0;
214 }
215 EXPORT_SYMBOL(ssb_bus_resume);
216
217 int ssb_bus_suspend(struct ssb_bus *bus)
218 {
219 ssb_chipco_suspend(&bus->chipco);
220 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
221
222 return 0;
223 }
224 EXPORT_SYMBOL(ssb_bus_suspend);
225
226 #ifdef CONFIG_SSB_SPROM
227 /** ssb_devices_freeze - Freeze all devices on the bus.
228 *
229 * After freezing no device driver will be handling a device
230 * on this bus anymore. ssb_devices_thaw() must be called after
231 * a successful freeze to reactivate the devices.
232 *
233 * @bus: The bus.
234 * @ctx: Context structure. Pass this to ssb_devices_thaw().
235 */
236 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
237 {
238 struct ssb_device *sdev;
239 struct ssb_driver *sdrv;
240 unsigned int i;
241
242 memset(ctx, 0, sizeof(*ctx));
243 ctx->bus = bus;
244 SSB_WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen));
245
246 for (i = 0; i < bus->nr_devices; i++) {
247 sdev = ssb_device_get(&bus->devices[i]);
248
249 if (!sdev->dev || !sdev->dev->driver ||
250 !device_is_registered(sdev->dev)) {
251 ssb_device_put(sdev);
252 continue;
253 }
254 sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver));
255 if (!sdrv || SSB_WARN_ON(!sdrv->remove)) {
256 ssb_device_put(sdev);
257 continue;
258 }
259 sdrv->remove(sdev);
260 ctx->device_frozen[i] = 1;
261 }
262
263 return 0;
264 }
265
266 /** ssb_devices_thaw - Unfreeze all devices on the bus.
267 *
268 * This will re-attach the device drivers and re-init the devices.
269 *
270 * @ctx: The context structure from ssb_devices_freeze()
271 */
272 int ssb_devices_thaw(struct ssb_freeze_context *ctx)
273 {
274 struct ssb_bus *bus = ctx->bus;
275 struct ssb_device *sdev;
276 struct ssb_driver *sdrv;
277 unsigned int i;
278 int err, result = 0;
279
280 for (i = 0; i < bus->nr_devices; i++) {
281 if (!ctx->device_frozen[i])
282 continue;
283 sdev = &bus->devices[i];
284
285 if (SSB_WARN_ON(!sdev->dev || !sdev->dev->driver))
286 continue;
287 sdrv = drv_to_ssb_drv(sdev->dev->driver);
288 if (SSB_WARN_ON(!sdrv || !sdrv->probe))
289 continue;
290
291 err = sdrv->probe(sdev, &sdev->id);
292 if (err) {
293 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
294 dev_name(sdev->dev));
295 result = err;
296 }
297 ssb_driver_put(sdrv);
298 ssb_device_put(sdev);
299 }
300
301 return result;
302 }
303 #endif /* CONFIG_SSB_SPROM */
304
305 static void ssb_device_shutdown(struct device *dev)
306 {
307 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
308 struct ssb_driver *ssb_drv;
309
310 if (!dev->driver)
311 return;
312 ssb_drv = drv_to_ssb_drv(dev->driver);
313 if (ssb_drv && ssb_drv->shutdown)
314 ssb_drv->shutdown(ssb_dev);
315 }
316
317 static int ssb_device_remove(struct device *dev)
318 {
319 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
320 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
321
322 if (ssb_drv && ssb_drv->remove)
323 ssb_drv->remove(ssb_dev);
324 ssb_device_put(ssb_dev);
325
326 return 0;
327 }
328
329 static int ssb_device_probe(struct device *dev)
330 {
331 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
332 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
333 int err = 0;
334
335 ssb_device_get(ssb_dev);
336 if (ssb_drv && ssb_drv->probe)
337 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
338 if (err)
339 ssb_device_put(ssb_dev);
340
341 return err;
342 }
343
344 static int ssb_match_devid(const struct ssb_device_id *tabid,
345 const struct ssb_device_id *devid)
346 {
347 if ((tabid->vendor != devid->vendor) &&
348 tabid->vendor != SSB_ANY_VENDOR)
349 return 0;
350 if ((tabid->coreid != devid->coreid) &&
351 tabid->coreid != SSB_ANY_ID)
352 return 0;
353 if ((tabid->revision != devid->revision) &&
354 tabid->revision != SSB_ANY_REV)
355 return 0;
356 return 1;
357 }
358
359 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
360 {
361 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
362 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
363 const struct ssb_device_id *id;
364
365 for (id = ssb_drv->id_table;
366 id->vendor || id->coreid || id->revision;
367 id++) {
368 if (ssb_match_devid(id, &ssb_dev->id))
369 return 1; /* found */
370 }
371
372 return 0;
373 }
374
375 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
376 {
377 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
378
379 if (!dev)
380 return -ENODEV;
381
382 return add_uevent_var(env,
383 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
384 ssb_dev->id.vendor, ssb_dev->id.coreid,
385 ssb_dev->id.revision);
386 }
387
388 static struct bus_type ssb_bustype = {
389 .name = "ssb",
390 .match = ssb_bus_match,
391 .probe = ssb_device_probe,
392 .remove = ssb_device_remove,
393 .shutdown = ssb_device_shutdown,
394 .suspend = ssb_device_suspend,
395 .resume = ssb_device_resume,
396 .uevent = ssb_device_uevent,
397 };
398
399 static void ssb_buses_lock(void)
400 {
401 /* See the comment at the ssb_is_early_boot definition */
402 if (!ssb_is_early_boot)
403 mutex_lock(&buses_mutex);
404 }
405
406 static void ssb_buses_unlock(void)
407 {
408 /* See the comment at the ssb_is_early_boot definition */
409 if (!ssb_is_early_boot)
410 mutex_unlock(&buses_mutex);
411 }
412
413 static void ssb_devices_unregister(struct ssb_bus *bus)
414 {
415 struct ssb_device *sdev;
416 int i;
417
418 for (i = bus->nr_devices - 1; i >= 0; i--) {
419 sdev = &(bus->devices[i]);
420 if (sdev->dev)
421 device_unregister(sdev->dev);
422 }
423 }
424
425 void ssb_bus_unregister(struct ssb_bus *bus)
426 {
427 ssb_buses_lock();
428 ssb_devices_unregister(bus);
429 list_del(&bus->list);
430 ssb_buses_unlock();
431
432 ssb_pcmcia_exit(bus);
433 ssb_pci_exit(bus);
434 ssb_iounmap(bus);
435 }
436 EXPORT_SYMBOL(ssb_bus_unregister);
437
438 static void ssb_release_dev(struct device *dev)
439 {
440 struct __ssb_dev_wrapper *devwrap;
441
442 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
443 kfree(devwrap);
444 }
445
446 static int ssb_devices_register(struct ssb_bus *bus)
447 {
448 struct ssb_device *sdev;
449 struct device *dev;
450 struct __ssb_dev_wrapper *devwrap;
451 int i, err = 0;
452 int dev_idx = 0;
453
454 for (i = 0; i < bus->nr_devices; i++) {
455 sdev = &(bus->devices[i]);
456
457 /* We don't register SSB-system devices to the kernel,
458 * as the drivers for them are built into SSB. */
459 switch (sdev->id.coreid) {
460 case SSB_DEV_CHIPCOMMON:
461 case SSB_DEV_PCI:
462 case SSB_DEV_PCIE:
463 case SSB_DEV_PCMCIA:
464 case SSB_DEV_MIPS:
465 case SSB_DEV_MIPS_3302:
466 case SSB_DEV_EXTIF:
467 continue;
468 }
469
470 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
471 if (!devwrap) {
472 ssb_printk(KERN_ERR PFX
473 "Could not allocate device\n");
474 err = -ENOMEM;
475 goto error;
476 }
477 dev = &devwrap->dev;
478 devwrap->sdev = sdev;
479
480 dev->release = ssb_release_dev;
481 dev->bus = &ssb_bustype;
482 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
483
484 switch (bus->bustype) {
485 case SSB_BUSTYPE_PCI:
486 #ifdef CONFIG_SSB_PCIHOST
487 sdev->irq = bus->host_pci->irq;
488 dev->parent = &bus->host_pci->dev;
489 sdev->dma_dev = dev->parent;
490 #endif
491 break;
492 case SSB_BUSTYPE_PCMCIA:
493 #ifdef CONFIG_SSB_PCMCIAHOST
494 sdev->irq = bus->host_pcmcia->irq;
495 dev->parent = &bus->host_pcmcia->dev;
496 #endif
497 break;
498 case SSB_BUSTYPE_SDIO:
499 #ifdef CONFIG_SSB_SDIOHOST
500 dev->parent = &bus->host_sdio->dev;
501 #endif
502 break;
503 case SSB_BUSTYPE_SSB:
504 dev->dma_mask = &dev->coherent_dma_mask;
505 sdev->dma_dev = dev;
506 break;
507 }
508
509 sdev->dev = dev;
510 err = device_register(dev);
511 if (err) {
512 ssb_printk(KERN_ERR PFX
513 "Could not register %s\n",
514 dev_name(dev));
515 /* Set dev to NULL to not unregister
516 * dev on error unwinding. */
517 sdev->dev = NULL;
518 kfree(devwrap);
519 goto error;
520 }
521 dev_idx++;
522 }
523
524 return 0;
525 error:
526 /* Unwind the already registered devices. */
527 ssb_devices_unregister(bus);
528 return err;
529 }
530
531 /* Needs ssb_buses_lock() */
532 static int ssb_attach_queued_buses(void)
533 {
534 struct ssb_bus *bus, *n;
535 int err = 0;
536 int drop_them_all = 0;
537
538 list_for_each_entry_safe(bus, n, &attach_queue, list) {
539 if (drop_them_all) {
540 list_del(&bus->list);
541 continue;
542 }
543 /* Can't init the PCIcore in ssb_bus_register(), as that
544 * is too early in boot for embedded systems
545 * (no udelay() available). So do it here in attach stage.
546 */
547 err = ssb_bus_powerup(bus, 0);
548 if (err)
549 goto error;
550 ssb_pcicore_init(&bus->pcicore);
551 ssb_bus_may_powerdown(bus);
552
553 err = ssb_devices_register(bus);
554 error:
555 if (err) {
556 drop_them_all = 1;
557 list_del(&bus->list);
558 continue;
559 }
560 list_move_tail(&bus->list, &buses);
561 }
562
563 return err;
564 }
565
566 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
567 {
568 struct ssb_bus *bus = dev->bus;
569
570 offset += dev->core_index * SSB_CORE_SIZE;
571 return readb(bus->mmio + offset);
572 }
573
574 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
575 {
576 struct ssb_bus *bus = dev->bus;
577
578 offset += dev->core_index * SSB_CORE_SIZE;
579 return readw(bus->mmio + offset);
580 }
581
582 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
583 {
584 struct ssb_bus *bus = dev->bus;
585
586 offset += dev->core_index * SSB_CORE_SIZE;
587 return readl(bus->mmio + offset);
588 }
589
590 #ifdef CONFIG_SSB_BLOCKIO
591 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
592 size_t count, u16 offset, u8 reg_width)
593 {
594 struct ssb_bus *bus = dev->bus;
595 void __iomem *addr;
596
597 offset += dev->core_index * SSB_CORE_SIZE;
598 addr = bus->mmio + offset;
599
600 switch (reg_width) {
601 case sizeof(u8): {
602 u8 *buf = buffer;
603
604 while (count) {
605 *buf = __raw_readb(addr);
606 buf++;
607 count--;
608 }
609 break;
610 }
611 case sizeof(u16): {
612 __le16 *buf = buffer;
613
614 SSB_WARN_ON(count & 1);
615 while (count) {
616 *buf = (__force __le16)__raw_readw(addr);
617 buf++;
618 count -= 2;
619 }
620 break;
621 }
622 case sizeof(u32): {
623 __le32 *buf = buffer;
624
625 SSB_WARN_ON(count & 3);
626 while (count) {
627 *buf = (__force __le32)__raw_readl(addr);
628 buf++;
629 count -= 4;
630 }
631 break;
632 }
633 default:
634 SSB_WARN_ON(1);
635 }
636 }
637 #endif /* CONFIG_SSB_BLOCKIO */
638
639 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
640 {
641 struct ssb_bus *bus = dev->bus;
642
643 offset += dev->core_index * SSB_CORE_SIZE;
644 writeb(value, bus->mmio + offset);
645 }
646
647 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
648 {
649 struct ssb_bus *bus = dev->bus;
650
651 offset += dev->core_index * SSB_CORE_SIZE;
652 writew(value, bus->mmio + offset);
653 }
654
655 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
656 {
657 struct ssb_bus *bus = dev->bus;
658
659 offset += dev->core_index * SSB_CORE_SIZE;
660 writel(value, bus->mmio + offset);
661 }
662
663 #ifdef CONFIG_SSB_BLOCKIO
664 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
665 size_t count, u16 offset, u8 reg_width)
666 {
667 struct ssb_bus *bus = dev->bus;
668 void __iomem *addr;
669
670 offset += dev->core_index * SSB_CORE_SIZE;
671 addr = bus->mmio + offset;
672
673 switch (reg_width) {
674 case sizeof(u8): {
675 const u8 *buf = buffer;
676
677 while (count) {
678 __raw_writeb(*buf, addr);
679 buf++;
680 count--;
681 }
682 break;
683 }
684 case sizeof(u16): {
685 const __le16 *buf = buffer;
686
687 SSB_WARN_ON(count & 1);
688 while (count) {
689 __raw_writew((__force u16)(*buf), addr);
690 buf++;
691 count -= 2;
692 }
693 break;
694 }
695 case sizeof(u32): {
696 const __le32 *buf = buffer;
697
698 SSB_WARN_ON(count & 3);
699 while (count) {
700 __raw_writel((__force u32)(*buf), addr);
701 buf++;
702 count -= 4;
703 }
704 break;
705 }
706 default:
707 SSB_WARN_ON(1);
708 }
709 }
710 #endif /* CONFIG_SSB_BLOCKIO */
711
712 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
713 static const struct ssb_bus_ops ssb_ssb_ops = {
714 .read8 = ssb_ssb_read8,
715 .read16 = ssb_ssb_read16,
716 .read32 = ssb_ssb_read32,
717 .write8 = ssb_ssb_write8,
718 .write16 = ssb_ssb_write16,
719 .write32 = ssb_ssb_write32,
720 #ifdef CONFIG_SSB_BLOCKIO
721 .block_read = ssb_ssb_block_read,
722 .block_write = ssb_ssb_block_write,
723 #endif
724 };
725
726 static int ssb_fetch_invariants(struct ssb_bus *bus,
727 ssb_invariants_func_t get_invariants)
728 {
729 struct ssb_init_invariants iv;
730 int err;
731
732 memset(&iv, 0, sizeof(iv));
733 err = get_invariants(bus, &iv);
734 if (err)
735 goto out;
736 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
737 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
738 bus->has_cardbus_slot = iv.has_cardbus_slot;
739 out:
740 return err;
741 }
742
743 static int ssb_bus_register(struct ssb_bus *bus,
744 ssb_invariants_func_t get_invariants,
745 unsigned long baseaddr)
746 {
747 int err;
748
749 spin_lock_init(&bus->bar_lock);
750 INIT_LIST_HEAD(&bus->list);
751 #ifdef CONFIG_SSB_EMBEDDED
752 spin_lock_init(&bus->gpio_lock);
753 #endif
754
755 /* Powerup the bus */
756 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
757 if (err)
758 goto out;
759
760 /* Init SDIO-host device (if any), before the scan */
761 err = ssb_sdio_init(bus);
762 if (err)
763 goto err_disable_xtal;
764
765 ssb_buses_lock();
766 bus->busnumber = next_busnumber;
767 /* Scan for devices (cores) */
768 err = ssb_bus_scan(bus, baseaddr);
769 if (err)
770 goto err_sdio_exit;
771
772 /* Init PCI-host device (if any) */
773 err = ssb_pci_init(bus);
774 if (err)
775 goto err_unmap;
776 /* Init PCMCIA-host device (if any) */
777 err = ssb_pcmcia_init(bus);
778 if (err)
779 goto err_pci_exit;
780
781 /* Initialize basic system devices (if available) */
782 err = ssb_bus_powerup(bus, 0);
783 if (err)
784 goto err_pcmcia_exit;
785 ssb_chipcommon_init(&bus->chipco);
786 ssb_mipscore_init(&bus->mipscore);
787 err = ssb_fetch_invariants(bus, get_invariants);
788 if (err) {
789 ssb_bus_may_powerdown(bus);
790 goto err_pcmcia_exit;
791 }
792 ssb_bus_may_powerdown(bus);
793
794 /* Queue it for attach.
795 * See the comment at the ssb_is_early_boot definition. */
796 list_add_tail(&bus->list, &attach_queue);
797 if (!ssb_is_early_boot) {
798 /* This is not early boot, so we must attach the bus now */
799 err = ssb_attach_queued_buses();
800 if (err)
801 goto err_dequeue;
802 }
803 next_busnumber++;
804 ssb_buses_unlock();
805
806 out:
807 return err;
808
809 err_dequeue:
810 list_del(&bus->list);
811 err_pcmcia_exit:
812 ssb_pcmcia_exit(bus);
813 err_pci_exit:
814 ssb_pci_exit(bus);
815 err_unmap:
816 ssb_iounmap(bus);
817 err_sdio_exit:
818 ssb_sdio_exit(bus);
819 err_disable_xtal:
820 ssb_buses_unlock();
821 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
822 return err;
823 }
824
825 #ifdef CONFIG_SSB_PCIHOST
826 int ssb_bus_pcibus_register(struct ssb_bus *bus,
827 struct pci_dev *host_pci)
828 {
829 int err;
830
831 bus->bustype = SSB_BUSTYPE_PCI;
832 bus->host_pci = host_pci;
833 bus->ops = &ssb_pci_ops;
834
835 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
836 if (!err) {
837 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
838 "PCI device %s\n", dev_name(&host_pci->dev));
839 } else {
840 ssb_printk(KERN_ERR PFX "Failed to register PCI version"
841 " of SSB with error %d\n", err);
842 }
843
844 return err;
845 }
846 EXPORT_SYMBOL(ssb_bus_pcibus_register);
847 #endif /* CONFIG_SSB_PCIHOST */
848
849 #ifdef CONFIG_SSB_PCMCIAHOST
850 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
851 struct pcmcia_device *pcmcia_dev,
852 unsigned long baseaddr)
853 {
854 int err;
855
856 bus->bustype = SSB_BUSTYPE_PCMCIA;
857 bus->host_pcmcia = pcmcia_dev;
858 bus->ops = &ssb_pcmcia_ops;
859
860 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
861 if (!err) {
862 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
863 "PCMCIA device %s\n", pcmcia_dev->devname);
864 }
865
866 return err;
867 }
868 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
869 #endif /* CONFIG_SSB_PCMCIAHOST */
870
871 #ifdef CONFIG_SSB_SDIOHOST
872 int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
873 unsigned int quirks)
874 {
875 int err;
876
877 bus->bustype = SSB_BUSTYPE_SDIO;
878 bus->host_sdio = func;
879 bus->ops = &ssb_sdio_ops;
880 bus->quirks = quirks;
881
882 err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
883 if (!err) {
884 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
885 "SDIO device %s\n", sdio_func_id(func));
886 }
887
888 return err;
889 }
890 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
891 #endif /* CONFIG_SSB_PCMCIAHOST */
892
893 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
894 unsigned long baseaddr,
895 ssb_invariants_func_t get_invariants)
896 {
897 int err;
898
899 bus->bustype = SSB_BUSTYPE_SSB;
900 bus->ops = &ssb_ssb_ops;
901
902 err = ssb_bus_register(bus, get_invariants, baseaddr);
903 if (!err) {
904 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
905 "address 0x%08lX\n", baseaddr);
906 }
907
908 return err;
909 }
910
911 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
912 {
913 drv->drv.name = drv->name;
914 drv->drv.bus = &ssb_bustype;
915 drv->drv.owner = owner;
916
917 return driver_register(&drv->drv);
918 }
919 EXPORT_SYMBOL(__ssb_driver_register);
920
921 void ssb_driver_unregister(struct ssb_driver *drv)
922 {
923 driver_unregister(&drv->drv);
924 }
925 EXPORT_SYMBOL(ssb_driver_unregister);
926
927 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
928 {
929 struct ssb_bus *bus = dev->bus;
930 struct ssb_device *ent;
931 int i;
932
933 for (i = 0; i < bus->nr_devices; i++) {
934 ent = &(bus->devices[i]);
935 if (ent->id.vendor != dev->id.vendor)
936 continue;
937 if (ent->id.coreid != dev->id.coreid)
938 continue;
939
940 ent->devtypedata = data;
941 }
942 }
943 EXPORT_SYMBOL(ssb_set_devtypedata);
944
945 static u32 clkfactor_f6_resolve(u32 v)
946 {
947 /* map the magic values */
948 switch (v) {
949 case SSB_CHIPCO_CLK_F6_2:
950 return 2;
951 case SSB_CHIPCO_CLK_F6_3:
952 return 3;
953 case SSB_CHIPCO_CLK_F6_4:
954 return 4;
955 case SSB_CHIPCO_CLK_F6_5:
956 return 5;
957 case SSB_CHIPCO_CLK_F6_6:
958 return 6;
959 case SSB_CHIPCO_CLK_F6_7:
960 return 7;
961 }
962 return 0;
963 }
964
965 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
966 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
967 {
968 u32 n1, n2, clock, m1, m2, m3, mc;
969
970 n1 = (n & SSB_CHIPCO_CLK_N1);
971 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
972
973 switch (plltype) {
974 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
975 if (m & SSB_CHIPCO_CLK_T6_MMASK)
976 return SSB_CHIPCO_CLK_T6_M0;
977 return SSB_CHIPCO_CLK_T6_M1;
978 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
979 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
980 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
981 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
982 n1 = clkfactor_f6_resolve(n1);
983 n2 += SSB_CHIPCO_CLK_F5_BIAS;
984 break;
985 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
986 n1 += SSB_CHIPCO_CLK_T2_BIAS;
987 n2 += SSB_CHIPCO_CLK_T2_BIAS;
988 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
989 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
990 break;
991 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
992 return 100000000;
993 default:
994 SSB_WARN_ON(1);
995 }
996
997 switch (plltype) {
998 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
999 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1000 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
1001 break;
1002 default:
1003 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
1004 }
1005 if (!clock)
1006 return 0;
1007
1008 m1 = (m & SSB_CHIPCO_CLK_M1);
1009 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
1010 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
1011 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
1012
1013 switch (plltype) {
1014 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1015 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1016 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1017 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1018 m1 = clkfactor_f6_resolve(m1);
1019 if ((plltype == SSB_PLLTYPE_1) ||
1020 (plltype == SSB_PLLTYPE_3))
1021 m2 += SSB_CHIPCO_CLK_F5_BIAS;
1022 else
1023 m2 = clkfactor_f6_resolve(m2);
1024 m3 = clkfactor_f6_resolve(m3);
1025
1026 switch (mc) {
1027 case SSB_CHIPCO_CLK_MC_BYPASS:
1028 return clock;
1029 case SSB_CHIPCO_CLK_MC_M1:
1030 return (clock / m1);
1031 case SSB_CHIPCO_CLK_MC_M1M2:
1032 return (clock / (m1 * m2));
1033 case SSB_CHIPCO_CLK_MC_M1M2M3:
1034 return (clock / (m1 * m2 * m3));
1035 case SSB_CHIPCO_CLK_MC_M1M3:
1036 return (clock / (m1 * m3));
1037 }
1038 return 0;
1039 case SSB_PLLTYPE_2:
1040 m1 += SSB_CHIPCO_CLK_T2_BIAS;
1041 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
1042 m3 += SSB_CHIPCO_CLK_T2_BIAS;
1043 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
1044 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
1045 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
1046
1047 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
1048 clock /= m1;
1049 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
1050 clock /= m2;
1051 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
1052 clock /= m3;
1053 return clock;
1054 default:
1055 SSB_WARN_ON(1);
1056 }
1057 return 0;
1058 }
1059
1060 /* Get the current speed the backplane is running at */
1061 u32 ssb_clockspeed(struct ssb_bus *bus)
1062 {
1063 u32 rate;
1064 u32 plltype;
1065 u32 clkctl_n, clkctl_m;
1066
1067 if (ssb_extif_available(&bus->extif))
1068 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1069 &clkctl_n, &clkctl_m);
1070 else if (bus->chipco.dev)
1071 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1072 &clkctl_n, &clkctl_m);
1073 else
1074 return 0;
1075
1076 if (bus->chip_id == 0x5365) {
1077 rate = 100000000;
1078 } else {
1079 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1080 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1081 rate /= 2;
1082 }
1083
1084 return rate;
1085 }
1086 EXPORT_SYMBOL(ssb_clockspeed);
1087
1088 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1089 {
1090 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1091
1092 /* The REJECT bit changed position in TMSLOW between
1093 * Backplane revisions. */
1094 switch (rev) {
1095 case SSB_IDLOW_SSBREV_22:
1096 return SSB_TMSLOW_REJECT_22;
1097 case SSB_IDLOW_SSBREV_23:
1098 return SSB_TMSLOW_REJECT_23;
1099 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
1100 case SSB_IDLOW_SSBREV_25: /* same here */
1101 case SSB_IDLOW_SSBREV_26: /* same here */
1102 case SSB_IDLOW_SSBREV_27: /* same here */
1103 return SSB_TMSLOW_REJECT_23; /* this is a guess */
1104 default:
1105 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1106 WARN_ON(1);
1107 }
1108 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
1109 }
1110
1111 int ssb_device_is_enabled(struct ssb_device *dev)
1112 {
1113 u32 val;
1114 u32 reject;
1115
1116 reject = ssb_tmslow_reject_bitmask(dev);
1117 val = ssb_read32(dev, SSB_TMSLOW);
1118 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1119
1120 return (val == SSB_TMSLOW_CLOCK);
1121 }
1122 EXPORT_SYMBOL(ssb_device_is_enabled);
1123
1124 static void ssb_flush_tmslow(struct ssb_device *dev)
1125 {
1126 /* Make _really_ sure the device has finished the TMSLOW
1127 * register write transaction, as we risk running into
1128 * a machine check exception otherwise.
1129 * Do this by reading the register back to commit the
1130 * PCI write and delay an additional usec for the device
1131 * to react to the change. */
1132 ssb_read32(dev, SSB_TMSLOW);
1133 udelay(1);
1134 }
1135
1136 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1137 {
1138 u32 val;
1139
1140 ssb_device_disable(dev, core_specific_flags);
1141 ssb_write32(dev, SSB_TMSLOW,
1142 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1143 SSB_TMSLOW_FGC | core_specific_flags);
1144 ssb_flush_tmslow(dev);
1145
1146 /* Clear SERR if set. This is a hw bug workaround. */
1147 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1148 ssb_write32(dev, SSB_TMSHIGH, 0);
1149
1150 val = ssb_read32(dev, SSB_IMSTATE);
1151 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1152 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1153 ssb_write32(dev, SSB_IMSTATE, val);
1154 }
1155
1156 ssb_write32(dev, SSB_TMSLOW,
1157 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1158 core_specific_flags);
1159 ssb_flush_tmslow(dev);
1160
1161 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1162 core_specific_flags);
1163 ssb_flush_tmslow(dev);
1164 }
1165 EXPORT_SYMBOL(ssb_device_enable);
1166
1167 /* Wait for a bit in a register to get set or unset.
1168 * timeout is in units of ten-microseconds */
1169 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1170 int timeout, int set)
1171 {
1172 int i;
1173 u32 val;
1174
1175 for (i = 0; i < timeout; i++) {
1176 val = ssb_read32(dev, reg);
1177 if (set) {
1178 if (val & bitmask)
1179 return 0;
1180 } else {
1181 if (!(val & bitmask))
1182 return 0;
1183 }
1184 udelay(10);
1185 }
1186 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1187 "register %04X to %s.\n",
1188 bitmask, reg, (set ? "set" : "clear"));
1189
1190 return -ETIMEDOUT;
1191 }
1192
1193 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1194 {
1195 u32 reject;
1196
1197 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1198 return;
1199
1200 reject = ssb_tmslow_reject_bitmask(dev);
1201 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1202 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1203 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1204 ssb_write32(dev, SSB_TMSLOW,
1205 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1206 reject | SSB_TMSLOW_RESET |
1207 core_specific_flags);
1208 ssb_flush_tmslow(dev);
1209
1210 ssb_write32(dev, SSB_TMSLOW,
1211 reject | SSB_TMSLOW_RESET |
1212 core_specific_flags);
1213 ssb_flush_tmslow(dev);
1214 }
1215 EXPORT_SYMBOL(ssb_device_disable);
1216
1217 u32 ssb_dma_translation(struct ssb_device *dev)
1218 {
1219 switch (dev->bus->bustype) {
1220 case SSB_BUSTYPE_SSB:
1221 return 0;
1222 case SSB_BUSTYPE_PCI:
1223 return SSB_PCI_DMA;
1224 default:
1225 __ssb_dma_not_implemented(dev);
1226 }
1227 return 0;
1228 }
1229 EXPORT_SYMBOL(ssb_dma_translation);
1230
1231 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1232 {
1233 struct ssb_chipcommon *cc;
1234 int err = 0;
1235
1236 /* On buses where more than one core may be working
1237 * at a time, we must not powerdown stuff if there are
1238 * still cores that may want to run. */
1239 if (bus->bustype == SSB_BUSTYPE_SSB)
1240 goto out;
1241
1242 cc = &bus->chipco;
1243
1244 if (!cc->dev)
1245 goto out;
1246 if (cc->dev->id.revision < 5)
1247 goto out;
1248
1249 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1250 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1251 if (err)
1252 goto error;
1253 out:
1254 #ifdef CONFIG_SSB_DEBUG
1255 bus->powered_up = 0;
1256 #endif
1257 return err;
1258 error:
1259 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1260 goto out;
1261 }
1262 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1263
1264 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1265 {
1266 struct ssb_chipcommon *cc;
1267 int err;
1268 enum ssb_clkmode mode;
1269
1270 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1271 if (err)
1272 goto error;
1273 cc = &bus->chipco;
1274 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1275 ssb_chipco_set_clockmode(cc, mode);
1276
1277 #ifdef CONFIG_SSB_DEBUG
1278 bus->powered_up = 1;
1279 #endif
1280 return 0;
1281 error:
1282 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1283 return err;
1284 }
1285 EXPORT_SYMBOL(ssb_bus_powerup);
1286
1287 u32 ssb_admatch_base(u32 adm)
1288 {
1289 u32 base = 0;
1290
1291 switch (adm & SSB_ADM_TYPE) {
1292 case SSB_ADM_TYPE0:
1293 base = (adm & SSB_ADM_BASE0);
1294 break;
1295 case SSB_ADM_TYPE1:
1296 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1297 base = (adm & SSB_ADM_BASE1);
1298 break;
1299 case SSB_ADM_TYPE2:
1300 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1301 base = (adm & SSB_ADM_BASE2);
1302 break;
1303 default:
1304 SSB_WARN_ON(1);
1305 }
1306
1307 return base;
1308 }
1309 EXPORT_SYMBOL(ssb_admatch_base);
1310
1311 u32 ssb_admatch_size(u32 adm)
1312 {
1313 u32 size = 0;
1314
1315 switch (adm & SSB_ADM_TYPE) {
1316 case SSB_ADM_TYPE0:
1317 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1318 break;
1319 case SSB_ADM_TYPE1:
1320 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1321 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1322 break;
1323 case SSB_ADM_TYPE2:
1324 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1325 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1326 break;
1327 default:
1328 SSB_WARN_ON(1);
1329 }
1330 size = (1 << (size + 1));
1331
1332 return size;
1333 }
1334 EXPORT_SYMBOL(ssb_admatch_size);
1335
1336 static int __init ssb_modinit(void)
1337 {
1338 int err;
1339
1340 /* See the comment at the ssb_is_early_boot definition */
1341 ssb_is_early_boot = 0;
1342 err = bus_register(&ssb_bustype);
1343 if (err)
1344 return err;
1345
1346 /* Maybe we already registered some buses at early boot.
1347 * Check for this and attach them
1348 */
1349 ssb_buses_lock();
1350 err = ssb_attach_queued_buses();
1351 ssb_buses_unlock();
1352 if (err) {
1353 bus_unregister(&ssb_bustype);
1354 goto out;
1355 }
1356
1357 err = b43_pci_ssb_bridge_init();
1358 if (err) {
1359 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1360 "initialization failed\n");
1361 /* don't fail SSB init because of this */
1362 err = 0;
1363 }
1364 err = ssb_gige_init();
1365 if (err) {
1366 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1367 "driver initialization failed\n");
1368 /* don't fail SSB init because of this */
1369 err = 0;
1370 }
1371 out:
1372 return err;
1373 }
1374 /* ssb must be initialized after PCI but before the ssb drivers.
1375 * That means we must use some initcall between subsys_initcall
1376 * and device_initcall. */
1377 fs_initcall(ssb_modinit);
1378
1379 static void __exit ssb_modexit(void)
1380 {
1381 ssb_gige_exit();
1382 b43_pci_ssb_bridge_exit();
1383 bus_unregister(&ssb_bustype);
1384 }
1385 module_exit(ssb_modexit)
kernel source for telekom puls (alcatel/mediatek)