2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
51 #include <linux/dmaengine.h>
52 #include <linux/scatterlist.h>
53 #include <linux/timer.h>
56 #include <asm/sh_bios.h>
66 struct uart_port port
;
71 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
72 unsigned int irqs
[SCIx_NR_IRQS
];
74 /* Port enable callback */
75 void (*enable
)(struct uart_port
*port
);
77 /* Port disable callback */
78 void (*disable
)(struct uart_port
*port
);
81 struct timer_list break_timer
;
89 struct list_head node
;
90 struct dma_chan
*chan_tx
;
91 struct dma_chan
*chan_rx
;
92 #ifdef CONFIG_SERIAL_SH_SCI_DMA
93 struct device
*dma_dev
;
94 enum sh_dmae_slave_chan_id slave_tx
;
95 enum sh_dmae_slave_chan_id slave_rx
;
96 struct dma_async_tx_descriptor
*desc_tx
;
97 struct dma_async_tx_descriptor
*desc_rx
[2];
98 dma_cookie_t cookie_tx
;
99 dma_cookie_t cookie_rx
[2];
100 dma_cookie_t active_rx
;
101 struct scatterlist sg_tx
;
102 unsigned int sg_len_tx
;
103 struct scatterlist sg_rx
[2];
105 struct sh_dmae_slave param_tx
;
106 struct sh_dmae_slave param_rx
;
107 struct work_struct work_tx
;
108 struct work_struct work_rx
;
109 struct timer_list rx_timer
;
115 struct list_head ports
;
116 struct notifier_block clk_nb
;
119 /* Function prototypes */
120 static void sci_stop_tx(struct uart_port
*port
);
122 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
124 static struct sci_port sci_ports
[SCI_NPORTS
];
125 static struct uart_driver sci_uart_driver
;
127 static inline struct sci_port
*
128 to_sci_port(struct uart_port
*uart
)
130 return container_of(uart
, struct sci_port
, port
);
133 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
135 #ifdef CONFIG_CONSOLE_POLL
136 static inline void handle_error(struct uart_port
*port
)
138 /* Clear error flags */
139 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
142 static int sci_poll_get_char(struct uart_port
*port
)
144 unsigned short status
;
148 status
= sci_in(port
, SCxSR
);
149 if (status
& SCxSR_ERRORS(port
)) {
153 } while (!(status
& SCxSR_RDxF(port
)));
155 c
= sci_in(port
, SCxRDR
);
159 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
165 static void sci_poll_put_char(struct uart_port
*port
, unsigned char c
)
167 unsigned short status
;
170 status
= sci_in(port
, SCxSR
);
171 } while (!(status
& SCxSR_TDxE(port
)));
173 sci_out(port
, SCxTDR
, c
);
174 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
) & ~SCxSR_TEND(port
));
176 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
178 #if defined(__H8300H__) || defined(__H8300S__)
179 static void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
181 int ch
= (port
->mapbase
- SMR0
) >> 3;
184 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
185 h8300_sci_pins
[ch
].rx
,
187 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
188 h8300_sci_pins
[ch
].tx
,
192 H8300_SCI_DR(ch
) |= h8300_sci_pins
[ch
].tx
;
194 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
195 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
197 if (port
->mapbase
== 0xA4400000) {
198 __raw_writew(__raw_readw(PACR
) & 0xffc0, PACR
);
199 __raw_writew(__raw_readw(PBCR
) & 0x0fff, PBCR
);
200 } else if (port
->mapbase
== 0xA4410000)
201 __raw_writew(__raw_readw(PBCR
) & 0xf003, PBCR
);
203 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
204 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
208 if (cflag
& CRTSCTS
) {
210 if (port
->mapbase
== 0xa4430000) { /* SCIF0 */
211 /* Clear PTCR bit 9-2; enable all scif pins but sck */
212 data
= __raw_readw(PORT_PTCR
);
213 __raw_writew((data
& 0xfc03), PORT_PTCR
);
214 } else if (port
->mapbase
== 0xa4438000) { /* SCIF1 */
215 /* Clear PVCR bit 9-2 */
216 data
= __raw_readw(PORT_PVCR
);
217 __raw_writew((data
& 0xfc03), PORT_PVCR
);
220 if (port
->mapbase
== 0xa4430000) { /* SCIF0 */
221 /* Clear PTCR bit 5-2; enable only tx and rx */
222 data
= __raw_readw(PORT_PTCR
);
223 __raw_writew((data
& 0xffc3), PORT_PTCR
);
224 } else if (port
->mapbase
== 0xa4438000) { /* SCIF1 */
225 /* Clear PVCR bit 5-2 */
226 data
= __raw_readw(PORT_PVCR
);
227 __raw_writew((data
& 0xffc3), PORT_PVCR
);
231 #elif defined(CONFIG_CPU_SH3)
232 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
233 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
237 /* We need to set SCPCR to enable RTS/CTS */
238 data
= __raw_readw(SCPCR
);
239 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
240 __raw_writew(data
& 0x0fcf, SCPCR
);
242 if (!(cflag
& CRTSCTS
)) {
243 /* We need to set SCPCR to enable RTS/CTS */
244 data
= __raw_readw(SCPCR
);
245 /* Clear out SCP7MD1,0, SCP4MD1,0,
246 Set SCP6MD1,0 = {01} (output) */
247 __raw_writew((data
& 0x0fcf) | 0x1000, SCPCR
);
249 data
= __raw_readb(SCPDR
);
250 /* Set /RTS2 (bit6) = 0 */
251 __raw_writeb(data
& 0xbf, SCPDR
);
254 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
255 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
259 if (port
->mapbase
== 0xffe00000) {
260 data
= __raw_readw(PSCR
);
262 if (!(cflag
& CRTSCTS
))
265 __raw_writew(data
, PSCR
);
268 #elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
269 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
270 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
271 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
272 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
273 defined(CONFIG_CPU_SUBTYPE_SHX3)
274 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
276 if (!(cflag
& CRTSCTS
))
277 __raw_writew(0x0080, SCSPTR0
); /* Set RTS = 1 */
279 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
280 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
282 if (!(cflag
& CRTSCTS
))
283 __raw_writew(0x0080, SCSPTR2
); /* Set RTS = 1 */
286 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
292 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
293 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
294 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
295 defined(CONFIG_CPU_SUBTYPE_SH7786)
296 static int scif_txfill(struct uart_port
*port
)
298 return sci_in(port
, SCTFDR
) & 0xff;
301 static int scif_txroom(struct uart_port
*port
)
303 return SCIF_TXROOM_MAX
- scif_txfill(port
);
306 static int scif_rxfill(struct uart_port
*port
)
308 return sci_in(port
, SCRFDR
) & 0xff;
310 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
311 static int scif_txfill(struct uart_port
*port
)
313 if (port
->mapbase
== 0xffe00000 ||
314 port
->mapbase
== 0xffe08000)
316 return sci_in(port
, SCTFDR
) & 0xff;
319 return sci_in(port
, SCFDR
) >> 8;
322 static int scif_txroom(struct uart_port
*port
)
324 if (port
->mapbase
== 0xffe00000 ||
325 port
->mapbase
== 0xffe08000)
327 return SCIF_TXROOM_MAX
- scif_txfill(port
);
330 return SCIF2_TXROOM_MAX
- scif_txfill(port
);
333 static int scif_rxfill(struct uart_port
*port
)
335 if ((port
->mapbase
== 0xffe00000) ||
336 (port
->mapbase
== 0xffe08000)) {
338 return sci_in(port
, SCRFDR
) & 0xff;
341 return sci_in(port
, SCFDR
) & SCIF2_RFDC_MASK
;
345 static int scif_txfill(struct uart_port
*port
)
347 return sci_in(port
, SCFDR
) >> 8;
350 static int scif_txroom(struct uart_port
*port
)
352 return SCIF_TXROOM_MAX
- scif_txfill(port
);
355 static int scif_rxfill(struct uart_port
*port
)
357 return sci_in(port
, SCFDR
) & SCIF_RFDC_MASK
;
361 static int sci_txfill(struct uart_port
*port
)
363 return !(sci_in(port
, SCxSR
) & SCI_TDRE
);
366 static int sci_txroom(struct uart_port
*port
)
368 return !sci_txfill(port
);
371 static int sci_rxfill(struct uart_port
*port
)
373 return (sci_in(port
, SCxSR
) & SCxSR_RDxF(port
)) != 0;
376 /* ********************************************************************** *
377 * the interrupt related routines *
378 * ********************************************************************** */
380 static void sci_transmit_chars(struct uart_port
*port
)
382 struct circ_buf
*xmit
= &port
->state
->xmit
;
383 unsigned int stopped
= uart_tx_stopped(port
);
384 unsigned short status
;
388 status
= sci_in(port
, SCxSR
);
389 if (!(status
& SCxSR_TDxE(port
))) {
390 ctrl
= sci_in(port
, SCSCR
);
391 if (uart_circ_empty(xmit
))
392 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
394 ctrl
|= SCI_CTRL_FLAGS_TIE
;
395 sci_out(port
, SCSCR
, ctrl
);
399 if (port
->type
== PORT_SCI
)
400 count
= sci_txroom(port
);
402 count
= scif_txroom(port
);
410 } else if (!uart_circ_empty(xmit
) && !stopped
) {
411 c
= xmit
->buf
[xmit
->tail
];
412 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
417 sci_out(port
, SCxTDR
, c
);
420 } while (--count
> 0);
422 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
424 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
425 uart_write_wakeup(port
);
426 if (uart_circ_empty(xmit
)) {
429 ctrl
= sci_in(port
, SCSCR
);
431 if (port
->type
!= PORT_SCI
) {
432 sci_in(port
, SCxSR
); /* Dummy read */
433 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
436 ctrl
|= SCI_CTRL_FLAGS_TIE
;
437 sci_out(port
, SCSCR
, ctrl
);
441 /* On SH3, SCIF may read end-of-break as a space->mark char */
442 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
444 static inline void sci_receive_chars(struct uart_port
*port
)
446 struct sci_port
*sci_port
= to_sci_port(port
);
447 struct tty_struct
*tty
= port
->state
->port
.tty
;
448 int i
, count
, copied
= 0;
449 unsigned short status
;
452 status
= sci_in(port
, SCxSR
);
453 if (!(status
& SCxSR_RDxF(port
)))
457 if (port
->type
== PORT_SCI
)
458 count
= sci_rxfill(port
);
460 count
= scif_rxfill(port
);
462 /* Don't copy more bytes than there is room for in the buffer */
463 count
= tty_buffer_request_room(tty
, count
);
465 /* If for any reason we can't copy more data, we're done! */
469 if (port
->type
== PORT_SCI
) {
470 char c
= sci_in(port
, SCxRDR
);
471 if (uart_handle_sysrq_char(port
, c
) ||
472 sci_port
->break_flag
)
475 tty_insert_flip_char(tty
, c
, TTY_NORMAL
);
477 for (i
= 0; i
< count
; i
++) {
478 char c
= sci_in(port
, SCxRDR
);
479 status
= sci_in(port
, SCxSR
);
480 #if defined(CONFIG_CPU_SH3)
481 /* Skip "chars" during break */
482 if (sci_port
->break_flag
) {
484 (status
& SCxSR_FER(port
))) {
489 /* Nonzero => end-of-break */
490 dev_dbg(port
->dev
, "debounce<%02x>\n", c
);
491 sci_port
->break_flag
= 0;
498 #endif /* CONFIG_CPU_SH3 */
499 if (uart_handle_sysrq_char(port
, c
)) {
504 /* Store data and status */
505 if (status
& SCxSR_FER(port
)) {
507 dev_notice(port
->dev
, "frame error\n");
508 } else if (status
& SCxSR_PER(port
)) {
510 dev_notice(port
->dev
, "parity error\n");
514 tty_insert_flip_char(tty
, c
, flag
);
518 sci_in(port
, SCxSR
); /* dummy read */
519 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
522 port
->icount
.rx
+= count
;
526 /* Tell the rest of the system the news. New characters! */
527 tty_flip_buffer_push(tty
);
529 sci_in(port
, SCxSR
); /* dummy read */
530 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
534 #define SCI_BREAK_JIFFIES (HZ/20)
535 /* The sci generates interrupts during the break,
536 * 1 per millisecond or so during the break period, for 9600 baud.
537 * So dont bother disabling interrupts.
538 * But dont want more than 1 break event.
539 * Use a kernel timer to periodically poll the rx line until
540 * the break is finished.
542 static void sci_schedule_break_timer(struct sci_port
*port
)
544 port
->break_timer
.expires
= jiffies
+ SCI_BREAK_JIFFIES
;
545 add_timer(&port
->break_timer
);
547 /* Ensure that two consecutive samples find the break over. */
548 static void sci_break_timer(unsigned long data
)
550 struct sci_port
*port
= (struct sci_port
*)data
;
552 if (sci_rxd_in(&port
->port
) == 0) {
553 port
->break_flag
= 1;
554 sci_schedule_break_timer(port
);
555 } else if (port
->break_flag
== 1) {
557 port
->break_flag
= 2;
558 sci_schedule_break_timer(port
);
560 port
->break_flag
= 0;
563 static inline int sci_handle_errors(struct uart_port
*port
)
566 unsigned short status
= sci_in(port
, SCxSR
);
567 struct tty_struct
*tty
= port
->state
->port
.tty
;
569 if (status
& SCxSR_ORER(port
)) {
571 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
))
574 dev_notice(port
->dev
, "overrun error");
577 if (status
& SCxSR_FER(port
)) {
578 if (sci_rxd_in(port
) == 0) {
579 /* Notify of BREAK */
580 struct sci_port
*sci_port
= to_sci_port(port
);
582 if (!sci_port
->break_flag
) {
583 sci_port
->break_flag
= 1;
584 sci_schedule_break_timer(sci_port
);
586 /* Do sysrq handling. */
587 if (uart_handle_break(port
))
590 dev_dbg(port
->dev
, "BREAK detected\n");
592 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
598 if (tty_insert_flip_char(tty
, 0, TTY_FRAME
))
601 dev_notice(port
->dev
, "frame error\n");
605 if (status
& SCxSR_PER(port
)) {
607 if (tty_insert_flip_char(tty
, 0, TTY_PARITY
))
610 dev_notice(port
->dev
, "parity error");
614 tty_flip_buffer_push(tty
);
619 static inline int sci_handle_fifo_overrun(struct uart_port
*port
)
621 struct tty_struct
*tty
= port
->state
->port
.tty
;
624 if (port
->type
!= PORT_SCIF
)
627 if ((sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
628 sci_out(port
, SCLSR
, 0);
630 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
631 tty_flip_buffer_push(tty
);
633 dev_notice(port
->dev
, "overrun error\n");
640 static inline int sci_handle_breaks(struct uart_port
*port
)
643 unsigned short status
= sci_in(port
, SCxSR
);
644 struct tty_struct
*tty
= port
->state
->port
.tty
;
645 struct sci_port
*s
= to_sci_port(port
);
647 if (uart_handle_break(port
))
650 if (!s
->break_flag
&& status
& SCxSR_BRK(port
)) {
651 #if defined(CONFIG_CPU_SH3)
655 /* Notify of BREAK */
656 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
659 dev_dbg(port
->dev
, "BREAK detected\n");
663 tty_flip_buffer_push(tty
);
665 copied
+= sci_handle_fifo_overrun(port
);
670 static irqreturn_t
sci_rx_interrupt(int irq
, void *ptr
)
672 #ifdef CONFIG_SERIAL_SH_SCI_DMA
673 struct uart_port
*port
= ptr
;
674 struct sci_port
*s
= to_sci_port(port
);
678 u16 scr
= sci_in(port
, SCSCR
);
679 u16 ssr
= sci_in(port
, SCxSR
);
681 /* Disable future Rx interrupts */
682 sci_out(port
, SCSCR
, scr
& ~SCI_CTRL_FLAGS_RIE
);
683 /* Clear current interrupt */
684 sci_out(port
, SCxSR
, ssr
& ~(1 | SCxSR_RDxF(port
)));
685 /* Calculate delay for 1.5 DMA buffers */
686 tout
= (port
->timeout
- HZ
/ 50) * s
->buf_len_rx
* 3 /
688 dev_dbg(port
->dev
, "Rx IRQ: setup timeout in %lu ms\n",
692 mod_timer(&s
->rx_timer
, jiffies
+ tout
);
698 /* I think sci_receive_chars has to be called irrespective
699 * of whether the I_IXOFF is set, otherwise, how is the interrupt
702 sci_receive_chars(ptr
);
707 static irqreturn_t
sci_tx_interrupt(int irq
, void *ptr
)
709 struct uart_port
*port
= ptr
;
712 spin_lock_irqsave(&port
->lock
, flags
);
713 sci_transmit_chars(port
);
714 spin_unlock_irqrestore(&port
->lock
, flags
);
719 static irqreturn_t
sci_er_interrupt(int irq
, void *ptr
)
721 struct uart_port
*port
= ptr
;
724 if (port
->type
== PORT_SCI
) {
725 if (sci_handle_errors(port
)) {
726 /* discard character in rx buffer */
728 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
731 sci_handle_fifo_overrun(port
);
732 sci_rx_interrupt(irq
, ptr
);
735 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
737 /* Kick the transmission */
738 sci_tx_interrupt(irq
, ptr
);
743 static irqreturn_t
sci_br_interrupt(int irq
, void *ptr
)
745 struct uart_port
*port
= ptr
;
748 sci_handle_breaks(port
);
749 sci_out(port
, SCxSR
, SCxSR_BREAK_CLEAR(port
));
754 static irqreturn_t
sci_mpxed_interrupt(int irq
, void *ptr
)
756 unsigned short ssr_status
, scr_status
, err_enabled
;
757 struct uart_port
*port
= ptr
;
758 struct sci_port
*s
= to_sci_port(port
);
759 irqreturn_t ret
= IRQ_NONE
;
761 ssr_status
= sci_in(port
, SCxSR
);
762 scr_status
= sci_in(port
, SCSCR
);
763 err_enabled
= scr_status
& (SCI_CTRL_FLAGS_REIE
| SCI_CTRL_FLAGS_RIE
);
766 if ((ssr_status
& SCxSR_TDxE(port
)) && (scr_status
& SCI_CTRL_FLAGS_TIE
) &&
768 ret
= sci_tx_interrupt(irq
, ptr
);
770 * Rx Interrupt: if we're using DMA, the DMA controller clears RDF /
773 if (((ssr_status
& SCxSR_RDxF(port
)) || s
->chan_rx
) &&
774 (scr_status
& SCI_CTRL_FLAGS_RIE
))
775 ret
= sci_rx_interrupt(irq
, ptr
);
776 /* Error Interrupt */
777 if ((ssr_status
& SCxSR_ERRORS(port
)) && err_enabled
)
778 ret
= sci_er_interrupt(irq
, ptr
);
779 /* Break Interrupt */
780 if ((ssr_status
& SCxSR_BRK(port
)) && err_enabled
)
781 ret
= sci_br_interrupt(irq
, ptr
);
783 WARN_ONCE(ret
== IRQ_NONE
,
784 "%s: %d IRQ %d, status %x, control %x\n", __func__
,
785 irq
, port
->line
, ssr_status
, scr_status
);
791 * Here we define a transistion notifier so that we can update all of our
792 * ports' baud rate when the peripheral clock changes.
794 static int sci_notifier(struct notifier_block
*self
,
795 unsigned long phase
, void *p
)
797 struct sh_sci_priv
*priv
= container_of(self
,
798 struct sh_sci_priv
, clk_nb
);
799 struct sci_port
*sci_port
;
802 if ((phase
== CPUFREQ_POSTCHANGE
) ||
803 (phase
== CPUFREQ_RESUMECHANGE
)) {
804 spin_lock_irqsave(&priv
->lock
, flags
);
805 list_for_each_entry(sci_port
, &priv
->ports
, node
)
806 sci_port
->port
.uartclk
= clk_get_rate(sci_port
->dclk
);
807 spin_unlock_irqrestore(&priv
->lock
, flags
);
813 static void sci_clk_enable(struct uart_port
*port
)
815 struct sci_port
*sci_port
= to_sci_port(port
);
817 clk_enable(sci_port
->dclk
);
818 sci_port
->port
.uartclk
= clk_get_rate(sci_port
->dclk
);
821 clk_enable(sci_port
->iclk
);
824 static void sci_clk_disable(struct uart_port
*port
)
826 struct sci_port
*sci_port
= to_sci_port(port
);
829 clk_disable(sci_port
->iclk
);
831 clk_disable(sci_port
->dclk
);
834 static int sci_request_irq(struct sci_port
*port
)
837 irqreturn_t (*handlers
[4])(int irq
, void *ptr
) = {
838 sci_er_interrupt
, sci_rx_interrupt
, sci_tx_interrupt
,
841 const char *desc
[] = { "SCI Receive Error", "SCI Receive Data Full",
842 "SCI Transmit Data Empty", "SCI Break" };
844 if (port
->irqs
[0] == port
->irqs
[1]) {
845 if (unlikely(!port
->irqs
[0]))
848 if (request_irq(port
->irqs
[0], sci_mpxed_interrupt
,
849 IRQF_DISABLED
, "sci", port
)) {
850 dev_err(port
->port
.dev
, "Can't allocate IRQ\n");
854 for (i
= 0; i
< ARRAY_SIZE(handlers
); i
++) {
855 if (unlikely(!port
->irqs
[i
]))
858 if (request_irq(port
->irqs
[i
], handlers
[i
],
859 IRQF_DISABLED
, desc
[i
], port
)) {
860 dev_err(port
->port
.dev
, "Can't allocate IRQ\n");
869 static void sci_free_irq(struct sci_port
*port
)
873 if (port
->irqs
[0] == port
->irqs
[1])
874 free_irq(port
->irqs
[0], port
);
876 for (i
= 0; i
< ARRAY_SIZE(port
->irqs
); i
++) {
880 free_irq(port
->irqs
[i
], port
);
885 static unsigned int sci_tx_empty(struct uart_port
*port
)
887 unsigned short status
= sci_in(port
, SCxSR
);
888 unsigned short in_tx_fifo
= scif_txfill(port
);
890 return (status
& SCxSR_TEND(port
)) && !in_tx_fifo
? TIOCSER_TEMT
: 0;
893 static void sci_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
895 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
896 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
897 /* If you have signals for DTR and DCD, please implement here. */
900 static unsigned int sci_get_mctrl(struct uart_port
*port
)
902 /* This routine is used for getting signals of: DTR, DCD, DSR, RI,
905 return TIOCM_DTR
| TIOCM_RTS
| TIOCM_DSR
;
908 #ifdef CONFIG_SERIAL_SH_SCI_DMA
909 static void sci_dma_tx_complete(void *arg
)
911 struct sci_port
*s
= arg
;
912 struct uart_port
*port
= &s
->port
;
913 struct circ_buf
*xmit
= &port
->state
->xmit
;
916 dev_dbg(port
->dev
, "%s(%d)\n", __func__
, port
->line
);
918 spin_lock_irqsave(&port
->lock
, flags
);
920 xmit
->tail
+= s
->sg_tx
.length
;
921 xmit
->tail
&= UART_XMIT_SIZE
- 1;
923 port
->icount
.tx
+= s
->sg_tx
.length
;
925 async_tx_ack(s
->desc_tx
);
926 s
->cookie_tx
= -EINVAL
;
929 spin_unlock_irqrestore(&port
->lock
, flags
);
931 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
932 uart_write_wakeup(port
);
934 if (uart_circ_chars_pending(xmit
))
935 schedule_work(&s
->work_tx
);
938 /* Locking: called with port lock held */
939 static int sci_dma_rx_push(struct sci_port
*s
, struct tty_struct
*tty
,
942 struct uart_port
*port
= &s
->port
;
945 room
= tty_buffer_request_room(tty
, count
);
947 if (s
->active_rx
== s
->cookie_rx
[0]) {
949 } else if (s
->active_rx
== s
->cookie_rx
[1]) {
952 dev_err(port
->dev
, "cookie %d not found!\n", s
->active_rx
);
957 dev_warn(port
->dev
, "Rx overrun: dropping %u bytes\n",
962 for (i
= 0; i
< room
; i
++)
963 tty_insert_flip_char(tty
, ((u8
*)sg_virt(&s
->sg_rx
[active
]))[i
],
966 port
->icount
.rx
+= room
;
971 static void sci_dma_rx_complete(void *arg
)
973 struct sci_port
*s
= arg
;
974 struct uart_port
*port
= &s
->port
;
975 struct tty_struct
*tty
= port
->state
->port
.tty
;
979 dev_dbg(port
->dev
, "%s(%d)\n", __func__
, port
->line
);
981 spin_lock_irqsave(&port
->lock
, flags
);
983 count
= sci_dma_rx_push(s
, tty
, s
->buf_len_rx
);
985 mod_timer(&s
->rx_timer
, jiffies
+ msecs_to_jiffies(5));
987 spin_unlock_irqrestore(&port
->lock
, flags
);
990 tty_flip_buffer_push(tty
);
992 schedule_work(&s
->work_rx
);
995 static void sci_start_rx(struct uart_port
*port
);
996 static void sci_start_tx(struct uart_port
*port
);
998 static void sci_rx_dma_release(struct sci_port
*s
, bool enable_pio
)
1000 struct dma_chan
*chan
= s
->chan_rx
;
1001 struct uart_port
*port
= &s
->port
;
1004 s
->cookie_rx
[0] = s
->cookie_rx
[1] = -EINVAL
;
1005 dma_release_channel(chan
);
1006 dma_free_coherent(port
->dev
, s
->buf_len_rx
* 2,
1007 sg_virt(&s
->sg_rx
[0]), sg_dma_address(&s
->sg_rx
[0]));
1012 static void sci_tx_dma_release(struct sci_port
*s
, bool enable_pio
)
1014 struct dma_chan
*chan
= s
->chan_tx
;
1015 struct uart_port
*port
= &s
->port
;
1018 s
->cookie_tx
= -EINVAL
;
1019 dma_release_channel(chan
);
1024 static void sci_submit_rx(struct sci_port
*s
)
1026 struct dma_chan
*chan
= s
->chan_rx
;
1029 for (i
= 0; i
< 2; i
++) {
1030 struct scatterlist
*sg
= &s
->sg_rx
[i
];
1031 struct dma_async_tx_descriptor
*desc
;
1033 desc
= chan
->device
->device_prep_slave_sg(chan
,
1034 sg
, 1, DMA_FROM_DEVICE
, DMA_PREP_INTERRUPT
);
1037 s
->desc_rx
[i
] = desc
;
1038 desc
->callback
= sci_dma_rx_complete
;
1039 desc
->callback_param
= s
;
1040 s
->cookie_rx
[i
] = desc
->tx_submit(desc
);
1043 if (!desc
|| s
->cookie_rx
[i
] < 0) {
1045 async_tx_ack(s
->desc_rx
[0]);
1046 s
->cookie_rx
[0] = -EINVAL
;
1050 s
->cookie_rx
[i
] = -EINVAL
;
1052 dev_warn(s
->port
.dev
,
1053 "failed to re-start DMA, using PIO\n");
1054 sci_rx_dma_release(s
, true);
1059 s
->active_rx
= s
->cookie_rx
[0];
1061 dma_async_issue_pending(chan
);
1064 static void work_fn_rx(struct work_struct
*work
)
1066 struct sci_port
*s
= container_of(work
, struct sci_port
, work_rx
);
1067 struct uart_port
*port
= &s
->port
;
1068 struct dma_async_tx_descriptor
*desc
;
1071 if (s
->active_rx
== s
->cookie_rx
[0]) {
1073 } else if (s
->active_rx
== s
->cookie_rx
[1]) {
1076 dev_err(port
->dev
, "cookie %d not found!\n", s
->active_rx
);
1079 desc
= s
->desc_rx
[new];
1081 if (dma_async_is_tx_complete(s
->chan_rx
, s
->active_rx
, NULL
, NULL
) !=
1083 /* Handle incomplete DMA receive */
1084 struct tty_struct
*tty
= port
->state
->port
.tty
;
1085 struct dma_chan
*chan
= s
->chan_rx
;
1086 struct sh_desc
*sh_desc
= container_of(desc
, struct sh_desc
,
1088 unsigned long flags
;
1091 chan
->device
->device_terminate_all(chan
);
1092 dev_dbg(port
->dev
, "Read %u bytes with cookie %d\n",
1093 sh_desc
->partial
, sh_desc
->cookie
);
1095 spin_lock_irqsave(&port
->lock
, flags
);
1096 count
= sci_dma_rx_push(s
, tty
, sh_desc
->partial
);
1097 spin_unlock_irqrestore(&port
->lock
, flags
);
1100 tty_flip_buffer_push(tty
);
1107 s
->cookie_rx
[new] = desc
->tx_submit(desc
);
1108 if (s
->cookie_rx
[new] < 0) {
1109 dev_warn(port
->dev
, "Failed submitting Rx DMA descriptor\n");
1110 sci_rx_dma_release(s
, true);
1114 dev_dbg(port
->dev
, "%s: cookie %d #%d\n", __func__
,
1115 s
->cookie_rx
[new], new);
1117 s
->active_rx
= s
->cookie_rx
[!new];
1120 static void work_fn_tx(struct work_struct
*work
)
1122 struct sci_port
*s
= container_of(work
, struct sci_port
, work_tx
);
1123 struct dma_async_tx_descriptor
*desc
;
1124 struct dma_chan
*chan
= s
->chan_tx
;
1125 struct uart_port
*port
= &s
->port
;
1126 struct circ_buf
*xmit
= &port
->state
->xmit
;
1127 struct scatterlist
*sg
= &s
->sg_tx
;
1131 * Port xmit buffer is already mapped, and it is one page... Just adjust
1132 * offsets and lengths. Since it is a circular buffer, we have to
1133 * transmit till the end, and then the rest. Take the port lock to get a
1134 * consistent xmit buffer state.
1136 spin_lock_irq(&port
->lock
);
1137 sg
->offset
= xmit
->tail
& (UART_XMIT_SIZE
- 1);
1138 sg
->dma_address
= (sg_dma_address(sg
) & ~(UART_XMIT_SIZE
- 1)) +
1140 sg
->length
= min((int)CIRC_CNT(xmit
->head
, xmit
->tail
, UART_XMIT_SIZE
),
1141 CIRC_CNT_TO_END(xmit
->head
, xmit
->tail
, UART_XMIT_SIZE
));
1142 sg
->dma_length
= sg
->length
;
1143 spin_unlock_irq(&port
->lock
);
1145 BUG_ON(!sg
->length
);
1147 desc
= chan
->device
->device_prep_slave_sg(chan
,
1148 sg
, s
->sg_len_tx
, DMA_TO_DEVICE
,
1149 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
1152 sci_tx_dma_release(s
, true);
1156 dma_sync_sg_for_device(port
->dev
, sg
, 1, DMA_TO_DEVICE
);
1158 spin_lock_irq(&port
->lock
);
1160 desc
->callback
= sci_dma_tx_complete
;
1161 desc
->callback_param
= s
;
1162 spin_unlock_irq(&port
->lock
);
1163 s
->cookie_tx
= desc
->tx_submit(desc
);
1164 if (s
->cookie_tx
< 0) {
1165 dev_warn(port
->dev
, "Failed submitting Tx DMA descriptor\n");
1167 sci_tx_dma_release(s
, true);
1171 dev_dbg(port
->dev
, "%s: %p: %d...%d, cookie %d\n", __func__
,
1172 xmit
->buf
, xmit
->tail
, xmit
->head
, s
->cookie_tx
);
1174 dma_async_issue_pending(chan
);
1178 static void sci_start_tx(struct uart_port
*port
)
1180 unsigned short ctrl
;
1182 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1183 struct sci_port
*s
= to_sci_port(port
);
1186 if (!uart_circ_empty(&s
->port
.state
->xmit
) && s
->cookie_tx
< 0)
1187 schedule_work(&s
->work_tx
);
1193 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
1194 ctrl
= sci_in(port
, SCSCR
);
1195 ctrl
|= SCI_CTRL_FLAGS_TIE
;
1196 sci_out(port
, SCSCR
, ctrl
);
1199 static void sci_stop_tx(struct uart_port
*port
)
1201 unsigned short ctrl
;
1203 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
1204 ctrl
= sci_in(port
, SCSCR
);
1205 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
1206 sci_out(port
, SCSCR
, ctrl
);
1209 static void sci_start_rx(struct uart_port
*port
)
1211 unsigned short ctrl
= SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
;
1213 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
1214 ctrl
|= sci_in(port
, SCSCR
);
1215 sci_out(port
, SCSCR
, ctrl
);
1218 static void sci_stop_rx(struct uart_port
*port
)
1220 unsigned short ctrl
;
1222 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
1223 ctrl
= sci_in(port
, SCSCR
);
1224 ctrl
&= ~(SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
);
1225 sci_out(port
, SCSCR
, ctrl
);
1228 static void sci_enable_ms(struct uart_port
*port
)
1230 /* Nothing here yet .. */
1233 static void sci_break_ctl(struct uart_port
*port
, int break_state
)
1235 /* Nothing here yet .. */
1238 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1239 static bool filter(struct dma_chan
*chan
, void *slave
)
1241 struct sh_dmae_slave
*param
= slave
;
1243 dev_dbg(chan
->device
->dev
, "%s: slave ID %d\n", __func__
,
1246 if (param
->dma_dev
== chan
->device
->dev
) {
1247 chan
->private = param
;
1254 static void rx_timer_fn(unsigned long arg
)
1256 struct sci_port
*s
= (struct sci_port
*)arg
;
1257 struct uart_port
*port
= &s
->port
;
1259 u16 scr
= sci_in(port
, SCSCR
);
1260 sci_out(port
, SCSCR
, scr
| SCI_CTRL_FLAGS_RIE
);
1261 dev_dbg(port
->dev
, "DMA Rx timed out\n");
1262 schedule_work(&s
->work_rx
);
1265 static void sci_request_dma(struct uart_port
*port
)
1267 struct sci_port
*s
= to_sci_port(port
);
1268 struct sh_dmae_slave
*param
;
1269 struct dma_chan
*chan
;
1270 dma_cap_mask_t mask
;
1273 dev_dbg(port
->dev
, "%s: port %d DMA %p\n", __func__
,
1274 port
->line
, s
->dma_dev
);
1280 dma_cap_set(DMA_SLAVE
, mask
);
1282 param
= &s
->param_tx
;
1284 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_TX */
1285 param
->slave_id
= s
->slave_tx
;
1286 param
->dma_dev
= s
->dma_dev
;
1288 s
->cookie_tx
= -EINVAL
;
1289 chan
= dma_request_channel(mask
, filter
, param
);
1290 dev_dbg(port
->dev
, "%s: TX: got channel %p\n", __func__
, chan
);
1293 sg_init_table(&s
->sg_tx
, 1);
1294 /* UART circular tx buffer is an aligned page. */
1295 BUG_ON((int)port
->state
->xmit
.buf
& ~PAGE_MASK
);
1296 sg_set_page(&s
->sg_tx
, virt_to_page(port
->state
->xmit
.buf
),
1297 UART_XMIT_SIZE
, (int)port
->state
->xmit
.buf
& ~PAGE_MASK
);
1298 nent
= dma_map_sg(port
->dev
, &s
->sg_tx
, 1, DMA_TO_DEVICE
);
1300 sci_tx_dma_release(s
, false);
1302 dev_dbg(port
->dev
, "%s: mapped %d@%p to %x\n", __func__
,
1303 sg_dma_len(&s
->sg_tx
),
1304 port
->state
->xmit
.buf
, sg_dma_address(&s
->sg_tx
));
1306 s
->sg_len_tx
= nent
;
1308 INIT_WORK(&s
->work_tx
, work_fn_tx
);
1311 param
= &s
->param_rx
;
1313 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_RX */
1314 param
->slave_id
= s
->slave_rx
;
1315 param
->dma_dev
= s
->dma_dev
;
1317 chan
= dma_request_channel(mask
, filter
, param
);
1318 dev_dbg(port
->dev
, "%s: RX: got channel %p\n", __func__
, chan
);
1326 s
->buf_len_rx
= 2 * max(16, (int)port
->fifosize
);
1327 buf
[0] = dma_alloc_coherent(port
->dev
, s
->buf_len_rx
* 2,
1328 &dma
[0], GFP_KERNEL
);
1332 "failed to allocate dma buffer, using PIO\n");
1333 sci_rx_dma_release(s
, true);
1337 buf
[1] = buf
[0] + s
->buf_len_rx
;
1338 dma
[1] = dma
[0] + s
->buf_len_rx
;
1340 for (i
= 0; i
< 2; i
++) {
1341 struct scatterlist
*sg
= &s
->sg_rx
[i
];
1343 sg_init_table(sg
, 1);
1344 sg_set_page(sg
, virt_to_page(buf
[i
]), s
->buf_len_rx
,
1345 (int)buf
[i
] & ~PAGE_MASK
);
1346 sg
->dma_address
= dma
[i
];
1347 sg
->dma_length
= sg
->length
;
1350 INIT_WORK(&s
->work_rx
, work_fn_rx
);
1351 setup_timer(&s
->rx_timer
, rx_timer_fn
, (unsigned long)s
);
1357 static void sci_free_dma(struct uart_port
*port
)
1359 struct sci_port
*s
= to_sci_port(port
);
1365 sci_tx_dma_release(s
, false);
1367 sci_rx_dma_release(s
, false);
1371 static int sci_startup(struct uart_port
*port
)
1373 struct sci_port
*s
= to_sci_port(port
);
1375 dev_dbg(port
->dev
, "%s(%d)\n", __func__
, port
->line
);
1381 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1382 sci_request_dma(port
);
1390 static void sci_shutdown(struct uart_port
*port
)
1392 struct sci_port
*s
= to_sci_port(port
);
1394 dev_dbg(port
->dev
, "%s(%d)\n", __func__
, port
->line
);
1398 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1407 static void sci_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
1408 struct ktermios
*old
)
1410 unsigned int status
, baud
, smr_val
, max_baud
;
1414 * earlyprintk comes here early on with port->uartclk set to zero.
1415 * the clock framework is not up and running at this point so here
1416 * we assume that 115200 is the maximum baud rate. please note that
1417 * the baud rate is not programmed during earlyprintk - it is assumed
1418 * that the previous boot loader has enabled required clocks and
1419 * setup the baud rate generator hardware for us already.
1421 max_baud
= port
->uartclk
? port
->uartclk
/ 16 : 115200;
1423 baud
= uart_get_baud_rate(port
, termios
, old
, 0, max_baud
);
1424 if (likely(baud
&& port
->uartclk
))
1425 t
= SCBRR_VALUE(baud
, port
->uartclk
);
1428 status
= sci_in(port
, SCxSR
);
1429 } while (!(status
& SCxSR_TEND(port
)));
1431 sci_out(port
, SCSCR
, 0x00); /* TE=0, RE=0, CKE1=0 */
1433 if (port
->type
!= PORT_SCI
)
1434 sci_out(port
, SCFCR
, SCFCR_RFRST
| SCFCR_TFRST
);
1436 smr_val
= sci_in(port
, SCSMR
) & 3;
1437 if ((termios
->c_cflag
& CSIZE
) == CS7
)
1439 if (termios
->c_cflag
& PARENB
)
1441 if (termios
->c_cflag
& PARODD
)
1443 if (termios
->c_cflag
& CSTOPB
)
1446 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1448 sci_out(port
, SCSMR
, smr_val
);
1450 dev_dbg(port
->dev
, "%s: SMR %x, t %x, SCSCR %x\n", __func__
, smr_val
, t
,
1455 sci_out(port
, SCSMR
, (sci_in(port
, SCSMR
) & ~3) | 1);
1458 sci_out(port
, SCSMR
, sci_in(port
, SCSMR
) & ~3);
1460 sci_out(port
, SCBRR
, t
);
1461 udelay((1000000+(baud
-1)) / baud
); /* Wait one bit interval */
1464 sci_init_pins(port
, termios
->c_cflag
);
1465 sci_out(port
, SCFCR
, (termios
->c_cflag
& CRTSCTS
) ? SCFCR_MCE
: 0);
1467 sci_out(port
, SCSCR
, SCSCR_INIT(port
));
1469 if ((termios
->c_cflag
& CREAD
) != 0)
1473 static const char *sci_type(struct uart_port
*port
)
1475 switch (port
->type
) {
1489 static void sci_release_port(struct uart_port
*port
)
1491 /* Nothing here yet .. */
1494 static int sci_request_port(struct uart_port
*port
)
1496 /* Nothing here yet .. */
1500 static void sci_config_port(struct uart_port
*port
, int flags
)
1502 struct sci_port
*s
= to_sci_port(port
);
1504 port
->type
= s
->type
;
1509 if (port
->flags
& UPF_IOREMAP
) {
1510 port
->membase
= ioremap_nocache(port
->mapbase
, 0x40);
1512 if (IS_ERR(port
->membase
))
1513 dev_err(port
->dev
, "can't remap port#%d\n", port
->line
);
1516 * For the simple (and majority of) cases where we don't
1517 * need to do any remapping, just cast the cookie
1520 port
->membase
= (void __iomem
*)port
->mapbase
;
1524 static int sci_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1526 struct sci_port
*s
= to_sci_port(port
);
1528 if (ser
->irq
!= s
->irqs
[SCIx_TXI_IRQ
] || ser
->irq
> nr_irqs
)
1530 if (ser
->baud_base
< 2400)
1531 /* No paper tape reader for Mitch.. */
1537 static struct uart_ops sci_uart_ops
= {
1538 .tx_empty
= sci_tx_empty
,
1539 .set_mctrl
= sci_set_mctrl
,
1540 .get_mctrl
= sci_get_mctrl
,
1541 .start_tx
= sci_start_tx
,
1542 .stop_tx
= sci_stop_tx
,
1543 .stop_rx
= sci_stop_rx
,
1544 .enable_ms
= sci_enable_ms
,
1545 .break_ctl
= sci_break_ctl
,
1546 .startup
= sci_startup
,
1547 .shutdown
= sci_shutdown
,
1548 .set_termios
= sci_set_termios
,
1550 .release_port
= sci_release_port
,
1551 .request_port
= sci_request_port
,
1552 .config_port
= sci_config_port
,
1553 .verify_port
= sci_verify_port
,
1554 #ifdef CONFIG_CONSOLE_POLL
1555 .poll_get_char
= sci_poll_get_char
,
1556 .poll_put_char
= sci_poll_put_char
,
1560 static void __devinit
sci_init_single(struct platform_device
*dev
,
1561 struct sci_port
*sci_port
,
1563 struct plat_sci_port
*p
)
1565 struct uart_port
*port
= &sci_port
->port
;
1567 port
->ops
= &sci_uart_ops
;
1568 port
->iotype
= UPIO_MEM
;
1573 port
->fifosize
= 64;
1576 port
->fifosize
= 16;
1584 sci_port
->iclk
= p
->clk
? clk_get(&dev
->dev
, p
->clk
) : NULL
;
1585 sci_port
->dclk
= clk_get(&dev
->dev
, "peripheral_clk");
1586 sci_port
->enable
= sci_clk_enable
;
1587 sci_port
->disable
= sci_clk_disable
;
1588 port
->dev
= &dev
->dev
;
1591 sci_port
->break_timer
.data
= (unsigned long)sci_port
;
1592 sci_port
->break_timer
.function
= sci_break_timer
;
1593 init_timer(&sci_port
->break_timer
);
1595 port
->mapbase
= p
->mapbase
;
1596 port
->membase
= p
->membase
;
1598 port
->irq
= p
->irqs
[SCIx_TXI_IRQ
];
1599 port
->flags
= p
->flags
;
1600 sci_port
->type
= port
->type
= p
->type
;
1602 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1603 sci_port
->dma_dev
= p
->dma_dev
;
1604 sci_port
->slave_tx
= p
->dma_slave_tx
;
1605 sci_port
->slave_rx
= p
->dma_slave_rx
;
1607 dev_dbg(port
->dev
, "%s: DMA device %p, tx %d, rx %d\n", __func__
,
1608 p
->dma_dev
, p
->dma_slave_tx
, p
->dma_slave_rx
);
1611 memcpy(&sci_port
->irqs
, &p
->irqs
, sizeof(p
->irqs
));
1614 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1615 static struct tty_driver
*serial_console_device(struct console
*co
, int *index
)
1617 struct uart_driver
*p
= &sci_uart_driver
;
1619 return p
->tty_driver
;
1622 static void serial_console_putchar(struct uart_port
*port
, int ch
)
1624 sci_poll_put_char(port
, ch
);
1628 * Print a string to the serial port trying not to disturb
1629 * any possible real use of the port...
1631 static void serial_console_write(struct console
*co
, const char *s
,
1634 struct uart_port
*port
= co
->data
;
1635 struct sci_port
*sci_port
= to_sci_port(port
);
1636 unsigned short bits
;
1638 if (sci_port
->enable
)
1639 sci_port
->enable(port
);
1641 uart_console_write(port
, s
, count
, serial_console_putchar
);
1643 /* wait until fifo is empty and last bit has been transmitted */
1644 bits
= SCxSR_TDxE(port
) | SCxSR_TEND(port
);
1645 while ((sci_in(port
, SCxSR
) & bits
) != bits
)
1648 if (sci_port
->disable
)
1649 sci_port
->disable(port
);
1652 static int __devinit
serial_console_setup(struct console
*co
, char *options
)
1654 struct sci_port
*sci_port
;
1655 struct uart_port
*port
;
1663 * Check whether an invalid uart number has been specified, and
1664 * if so, search for the first available port that does have
1667 if (co
->index
>= SCI_NPORTS
)
1672 sci_port
= to_sci_port(port
);
1674 sci_port
= &sci_ports
[co
->index
];
1675 port
= &sci_port
->port
;
1680 * Also need to check port->type, we don't actually have any
1681 * UPIO_PORT ports, but uart_report_port() handily misreports
1682 * it anyways if we don't have a port available by the time this is
1688 sci_config_port(port
, 0);
1690 if (sci_port
->enable
)
1691 sci_port
->enable(port
);
1694 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1696 ret
= uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1697 #if defined(__H8300H__) || defined(__H8300S__)
1698 /* disable rx interrupt */
1702 /* TODO: disable clock */
1706 static struct console serial_console
= {
1708 .device
= serial_console_device
,
1709 .write
= serial_console_write
,
1710 .setup
= serial_console_setup
,
1711 .flags
= CON_PRINTBUFFER
,
1715 static int __init
sci_console_init(void)
1717 register_console(&serial_console
);
1720 console_initcall(sci_console_init
);
1722 static struct sci_port early_serial_port
;
1723 static struct console early_serial_console
= {
1724 .name
= "early_ttySC",
1725 .write
= serial_console_write
,
1726 .flags
= CON_PRINTBUFFER
,
1728 static char early_serial_buf
[32];
1730 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1732 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1733 #define SCI_CONSOLE (&serial_console)
1735 #define SCI_CONSOLE 0
1738 static char banner
[] __initdata
=
1739 KERN_INFO
"SuperH SCI(F) driver initialized\n";
1741 static struct uart_driver sci_uart_driver
= {
1742 .owner
= THIS_MODULE
,
1743 .driver_name
= "sci",
1744 .dev_name
= "ttySC",
1746 .minor
= SCI_MINOR_START
,
1748 .cons
= SCI_CONSOLE
,
1752 static int sci_remove(struct platform_device
*dev
)
1754 struct sh_sci_priv
*priv
= platform_get_drvdata(dev
);
1756 unsigned long flags
;
1758 cpufreq_unregister_notifier(&priv
->clk_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1760 spin_lock_irqsave(&priv
->lock
, flags
);
1761 list_for_each_entry(p
, &priv
->ports
, node
)
1762 uart_remove_one_port(&sci_uart_driver
, &p
->port
);
1763 spin_unlock_irqrestore(&priv
->lock
, flags
);
1769 static int __devinit
sci_probe_single(struct platform_device
*dev
,
1771 struct plat_sci_port
*p
,
1772 struct sci_port
*sciport
)
1774 struct sh_sci_priv
*priv
= platform_get_drvdata(dev
);
1775 unsigned long flags
;
1779 if (unlikely(index
>= SCI_NPORTS
)) {
1780 dev_notice(&dev
->dev
, "Attempting to register port "
1781 "%d when only %d are available.\n",
1782 index
+1, SCI_NPORTS
);
1783 dev_notice(&dev
->dev
, "Consider bumping "
1784 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1788 sci_init_single(dev
, sciport
, index
, p
);
1790 ret
= uart_add_one_port(&sci_uart_driver
, &sciport
->port
);
1794 INIT_LIST_HEAD(&sciport
->node
);
1796 spin_lock_irqsave(&priv
->lock
, flags
);
1797 list_add(&sciport
->node
, &priv
->ports
);
1798 spin_unlock_irqrestore(&priv
->lock
, flags
);
1804 * Register a set of serial devices attached to a platform device. The
1805 * list is terminated with a zero flags entry, which means we expect
1806 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1807 * remapping (such as sh64) should also set UPF_IOREMAP.
1809 static int __devinit
sci_probe(struct platform_device
*dev
)
1811 struct plat_sci_port
*p
= dev
->dev
.platform_data
;
1812 struct sh_sci_priv
*priv
;
1813 int i
, ret
= -EINVAL
;
1815 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1816 if (is_early_platform_device(dev
)) {
1819 early_serial_console
.index
= dev
->id
;
1820 early_serial_console
.data
= &early_serial_port
.port
;
1821 sci_init_single(NULL
, &early_serial_port
, dev
->id
, p
);
1822 serial_console_setup(&early_serial_console
, early_serial_buf
);
1823 if (!strstr(early_serial_buf
, "keep"))
1824 early_serial_console
.flags
|= CON_BOOT
;
1825 register_console(&early_serial_console
);
1830 priv
= kzalloc(sizeof(*priv
), GFP_KERNEL
);
1834 INIT_LIST_HEAD(&priv
->ports
);
1835 spin_lock_init(&priv
->lock
);
1836 platform_set_drvdata(dev
, priv
);
1838 priv
->clk_nb
.notifier_call
= sci_notifier
;
1839 cpufreq_register_notifier(&priv
->clk_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1841 if (dev
->id
!= -1) {
1842 ret
= sci_probe_single(dev
, dev
->id
, p
, &sci_ports
[dev
->id
]);
1846 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
1847 ret
= sci_probe_single(dev
, i
, p
, &sci_ports
[i
]);
1853 #ifdef CONFIG_SH_STANDARD_BIOS
1854 sh_bios_gdb_detach();
1864 static int sci_suspend(struct device
*dev
)
1866 struct sh_sci_priv
*priv
= dev_get_drvdata(dev
);
1868 unsigned long flags
;
1870 spin_lock_irqsave(&priv
->lock
, flags
);
1871 list_for_each_entry(p
, &priv
->ports
, node
)
1872 uart_suspend_port(&sci_uart_driver
, &p
->port
);
1873 spin_unlock_irqrestore(&priv
->lock
, flags
);
1878 static int sci_resume(struct device
*dev
)
1880 struct sh_sci_priv
*priv
= dev_get_drvdata(dev
);
1882 unsigned long flags
;
1884 spin_lock_irqsave(&priv
->lock
, flags
);
1885 list_for_each_entry(p
, &priv
->ports
, node
)
1886 uart_resume_port(&sci_uart_driver
, &p
->port
);
1887 spin_unlock_irqrestore(&priv
->lock
, flags
);
1892 static const struct dev_pm_ops sci_dev_pm_ops
= {
1893 .suspend
= sci_suspend
,
1894 .resume
= sci_resume
,
1897 static struct platform_driver sci_driver
= {
1899 .remove
= sci_remove
,
1902 .owner
= THIS_MODULE
,
1903 .pm
= &sci_dev_pm_ops
,
1907 static int __init
sci_init(void)
1913 ret
= uart_register_driver(&sci_uart_driver
);
1914 if (likely(ret
== 0)) {
1915 ret
= platform_driver_register(&sci_driver
);
1917 uart_unregister_driver(&sci_uart_driver
);
1923 static void __exit
sci_exit(void)
1925 platform_driver_unregister(&sci_driver
);
1926 uart_unregister_driver(&sci_uart_driver
);
1929 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1930 early_platform_init_buffer("earlyprintk", &sci_driver
,
1931 early_serial_buf
, ARRAY_SIZE(early_serial_buf
));
1933 module_init(sci_init
);
1934 module_exit(sci_exit
);
1936 MODULE_LICENSE("GPL");
1937 MODULE_ALIAS("platform:sh-sci");