2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <scsi/scsi_tcq.h>
17 #include <scsi/scsicam.h>
18 #include <scsi/scsi_transport.h>
19 #include <scsi/scsi_transport_fc.h>
21 #include "qla_target.h"
26 char qla2x00_version_str
[40];
28 static int apidev_major
;
31 * SRB allocation cache
33 static struct kmem_cache
*srb_cachep
;
36 * CT6 CTX allocation cache
38 static struct kmem_cache
*ctx_cachep
;
40 * error level for logging
42 int ql_errlev
= ql_log_all
;
44 static int ql2xenableclass2
;
45 module_param(ql2xenableclass2
, int, S_IRUGO
|S_IRUSR
);
46 MODULE_PARM_DESC(ql2xenableclass2
,
47 "Specify if Class 2 operations are supported from the very "
48 "beginning. Default is 0 - class 2 not supported.");
51 int ql2xlogintimeout
= 20;
52 module_param(ql2xlogintimeout
, int, S_IRUGO
);
53 MODULE_PARM_DESC(ql2xlogintimeout
,
54 "Login timeout value in seconds.");
56 int qlport_down_retry
;
57 module_param(qlport_down_retry
, int, S_IRUGO
);
58 MODULE_PARM_DESC(qlport_down_retry
,
59 "Maximum number of command retries to a port that returns "
60 "a PORT-DOWN status.");
62 int ql2xplogiabsentdevice
;
63 module_param(ql2xplogiabsentdevice
, int, S_IRUGO
|S_IWUSR
);
64 MODULE_PARM_DESC(ql2xplogiabsentdevice
,
65 "Option to enable PLOGI to devices that are not present after "
66 "a Fabric scan. This is needed for several broken switches. "
67 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
69 int ql2xloginretrycount
= 0;
70 module_param(ql2xloginretrycount
, int, S_IRUGO
);
71 MODULE_PARM_DESC(ql2xloginretrycount
,
72 "Specify an alternate value for the NVRAM login retry count.");
74 int ql2xallocfwdump
= 1;
75 module_param(ql2xallocfwdump
, int, S_IRUGO
);
76 MODULE_PARM_DESC(ql2xallocfwdump
,
77 "Option to enable allocation of memory for a firmware dump "
78 "during HBA initialization. Memory allocation requirements "
79 "vary by ISP type. Default is 1 - allocate memory.");
81 int ql2xextended_error_logging
;
82 module_param(ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
83 MODULE_PARM_DESC(ql2xextended_error_logging
,
84 "Option to enable extended error logging,\n"
85 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
86 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
87 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
88 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
89 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
90 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
91 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
92 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
93 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
94 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
95 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
96 "\t\t0x1e400000 - Preferred value for capturing essential "
97 "debug information (equivalent to old "
98 "ql2xextended_error_logging=1).\n"
99 "\t\tDo LOGICAL OR of the value to enable more than one level");
101 int ql2xshiftctondsd
= 6;
102 module_param(ql2xshiftctondsd
, int, S_IRUGO
);
103 MODULE_PARM_DESC(ql2xshiftctondsd
,
104 "Set to control shifting of command type processing "
105 "based on total number of SG elements.");
107 int ql2xfdmienable
=1;
108 module_param(ql2xfdmienable
, int, S_IRUGO
);
109 MODULE_PARM_DESC(ql2xfdmienable
,
110 "Enables FDMI registrations. "
111 "0 - no FDMI. Default is 1 - perform FDMI.");
113 int ql2xmaxqdepth
= MAX_Q_DEPTH
;
114 module_param(ql2xmaxqdepth
, int, S_IRUGO
|S_IWUSR
);
115 MODULE_PARM_DESC(ql2xmaxqdepth
,
116 "Maximum queue depth to set for each LUN. "
119 int ql2xenabledif
= 2;
120 module_param(ql2xenabledif
, int, S_IRUGO
);
121 MODULE_PARM_DESC(ql2xenabledif
,
122 " Enable T10-CRC-DIF "
123 " Default is 0 - No DIF Support. 1 - Enable it"
124 ", 2 - Enable DIF for all types, except Type 0.");
126 int ql2xenablehba_err_chk
= 2;
127 module_param(ql2xenablehba_err_chk
, int, S_IRUGO
|S_IWUSR
);
128 MODULE_PARM_DESC(ql2xenablehba_err_chk
,
129 " Enable T10-CRC-DIF Error isolation by HBA:\n"
131 " 0 -- Error isolation disabled\n"
132 " 1 -- Error isolation enabled only for DIX Type 0\n"
133 " 2 -- Error isolation enabled for all Types\n");
135 int ql2xiidmaenable
=1;
136 module_param(ql2xiidmaenable
, int, S_IRUGO
);
137 MODULE_PARM_DESC(ql2xiidmaenable
,
138 "Enables iIDMA settings "
139 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
141 int ql2xmaxqueues
= 1;
142 module_param(ql2xmaxqueues
, int, S_IRUGO
);
143 MODULE_PARM_DESC(ql2xmaxqueues
,
144 "Enables MQ settings "
145 "Default is 1 for single queue. Set it to number "
146 "of queues in MQ mode.");
148 int ql2xmultique_tag
;
149 module_param(ql2xmultique_tag
, int, S_IRUGO
);
150 MODULE_PARM_DESC(ql2xmultique_tag
,
151 "Enables CPU affinity settings for the driver "
152 "Default is 0 for no affinity of request and response IO. "
153 "Set it to 1 to turn on the cpu affinity.");
156 module_param(ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
157 MODULE_PARM_DESC(ql2xfwloadbin
,
158 "Option to specify location from which to load ISP firmware:.\n"
159 " 2 -- load firmware via the request_firmware() (hotplug).\n"
161 " 1 -- load firmware from flash.\n"
162 " 0 -- use default semantics.\n");
165 module_param(ql2xetsenable
, int, S_IRUGO
);
166 MODULE_PARM_DESC(ql2xetsenable
,
167 "Enables firmware ETS burst."
168 "Default is 0 - skip ETS enablement.");
171 module_param(ql2xdbwr
, int, S_IRUGO
|S_IWUSR
);
172 MODULE_PARM_DESC(ql2xdbwr
,
173 "Option to specify scheme for request queue posting.\n"
174 " 0 -- Regular doorbell.\n"
175 " 1 -- CAMRAM doorbell (faster).\n");
177 int ql2xtargetreset
= 1;
178 module_param(ql2xtargetreset
, int, S_IRUGO
);
179 MODULE_PARM_DESC(ql2xtargetreset
,
180 "Enable target reset."
181 "Default is 1 - use hw defaults.");
184 module_param(ql2xgffidenable
, int, S_IRUGO
);
185 MODULE_PARM_DESC(ql2xgffidenable
,
186 "Enables GFF_ID checks of port type. "
187 "Default is 0 - Do not use GFF_ID information.");
189 int ql2xasynctmfenable
;
190 module_param(ql2xasynctmfenable
, int, S_IRUGO
);
191 MODULE_PARM_DESC(ql2xasynctmfenable
,
192 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
193 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
195 int ql2xdontresethba
;
196 module_param(ql2xdontresethba
, int, S_IRUGO
|S_IWUSR
);
197 MODULE_PARM_DESC(ql2xdontresethba
,
198 "Option to specify reset behaviour.\n"
199 " 0 (Default) -- Reset on failure.\n"
200 " 1 -- Do not reset on failure.\n");
202 uint ql2xmaxlun
= MAX_LUNS
;
203 module_param(ql2xmaxlun
, uint
, S_IRUGO
);
204 MODULE_PARM_DESC(ql2xmaxlun
,
205 "Defines the maximum LU number to register with the SCSI "
206 "midlayer. Default is 65535.");
208 int ql2xmdcapmask
= 0x1F;
209 module_param(ql2xmdcapmask
, int, S_IRUGO
);
210 MODULE_PARM_DESC(ql2xmdcapmask
,
211 "Set the Minidump driver capture mask level. "
212 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
214 int ql2xmdenable
= 1;
215 module_param(ql2xmdenable
, int, S_IRUGO
);
216 MODULE_PARM_DESC(ql2xmdenable
,
217 "Enable/disable MiniDump. "
218 "0 - MiniDump disabled. "
219 "1 (Default) - MiniDump enabled.");
222 * SCSI host template entry points
224 static int qla2xxx_slave_configure(struct scsi_device
* device
);
225 static int qla2xxx_slave_alloc(struct scsi_device
*);
226 static int qla2xxx_scan_finished(struct Scsi_Host
*, unsigned long time
);
227 static void qla2xxx_scan_start(struct Scsi_Host
*);
228 static void qla2xxx_slave_destroy(struct scsi_device
*);
229 static int qla2xxx_queuecommand(struct Scsi_Host
*h
, struct scsi_cmnd
*cmd
);
230 static int qla2xxx_eh_abort(struct scsi_cmnd
*);
231 static int qla2xxx_eh_device_reset(struct scsi_cmnd
*);
232 static int qla2xxx_eh_target_reset(struct scsi_cmnd
*);
233 static int qla2xxx_eh_bus_reset(struct scsi_cmnd
*);
234 static int qla2xxx_eh_host_reset(struct scsi_cmnd
*);
236 static int qla2x00_change_queue_depth(struct scsi_device
*, int, int);
237 static int qla2x00_change_queue_type(struct scsi_device
*, int);
238 static void qla2x00_free_device(scsi_qla_host_t
*);
240 struct scsi_host_template qla2xxx_driver_template
= {
241 .module
= THIS_MODULE
,
242 .name
= QLA2XXX_DRIVER_NAME
,
243 .queuecommand
= qla2xxx_queuecommand
,
245 .eh_abort_handler
= qla2xxx_eh_abort
,
246 .eh_device_reset_handler
= qla2xxx_eh_device_reset
,
247 .eh_target_reset_handler
= qla2xxx_eh_target_reset
,
248 .eh_bus_reset_handler
= qla2xxx_eh_bus_reset
,
249 .eh_host_reset_handler
= qla2xxx_eh_host_reset
,
251 .slave_configure
= qla2xxx_slave_configure
,
253 .slave_alloc
= qla2xxx_slave_alloc
,
254 .slave_destroy
= qla2xxx_slave_destroy
,
255 .scan_finished
= qla2xxx_scan_finished
,
256 .scan_start
= qla2xxx_scan_start
,
257 .change_queue_depth
= qla2x00_change_queue_depth
,
258 .change_queue_type
= qla2x00_change_queue_type
,
261 .use_clustering
= ENABLE_CLUSTERING
,
262 .sg_tablesize
= SG_ALL
,
264 .max_sectors
= 0xFFFF,
265 .shost_attrs
= qla2x00_host_attrs
,
267 .supported_mode
= MODE_INITIATOR
,
270 static struct scsi_transport_template
*qla2xxx_transport_template
= NULL
;
271 struct scsi_transport_template
*qla2xxx_transport_vport_template
= NULL
;
273 /* TODO Convert to inlines
279 qla2x00_start_timer(scsi_qla_host_t
*vha
, void *func
, unsigned long interval
)
281 init_timer(&vha
->timer
);
282 vha
->timer
.expires
= jiffies
+ interval
* HZ
;
283 vha
->timer
.data
= (unsigned long)vha
;
284 vha
->timer
.function
= (void (*)(unsigned long))func
;
285 add_timer(&vha
->timer
);
286 vha
->timer_active
= 1;
290 qla2x00_restart_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
292 /* Currently used for 82XX only. */
293 if (vha
->device_flags
& DFLG_DEV_FAILED
) {
294 ql_dbg(ql_dbg_timer
, vha
, 0x600d,
295 "Device in a failed state, returning.\n");
299 mod_timer(&vha
->timer
, jiffies
+ interval
* HZ
);
302 static __inline__
void
303 qla2x00_stop_timer(scsi_qla_host_t
*vha
)
305 del_timer_sync(&vha
->timer
);
306 vha
->timer_active
= 0;
309 static int qla2x00_do_dpc(void *data
);
311 static void qla2x00_rst_aen(scsi_qla_host_t
*);
313 static int qla2x00_mem_alloc(struct qla_hw_data
*, uint16_t, uint16_t,
314 struct req_que
**, struct rsp_que
**);
315 static void qla2x00_free_fw_dump(struct qla_hw_data
*);
316 static void qla2x00_mem_free(struct qla_hw_data
*);
318 /* -------------------------------------------------------------------------- */
319 static int qla2x00_alloc_queues(struct qla_hw_data
*ha
, struct req_que
*req
,
322 scsi_qla_host_t
*vha
= pci_get_drvdata(ha
->pdev
);
323 ha
->req_q_map
= kzalloc(sizeof(struct req_que
*) * ha
->max_req_queues
,
325 if (!ha
->req_q_map
) {
326 ql_log(ql_log_fatal
, vha
, 0x003b,
327 "Unable to allocate memory for request queue ptrs.\n");
331 ha
->rsp_q_map
= kzalloc(sizeof(struct rsp_que
*) * ha
->max_rsp_queues
,
333 if (!ha
->rsp_q_map
) {
334 ql_log(ql_log_fatal
, vha
, 0x003c,
335 "Unable to allocate memory for response queue ptrs.\n");
339 * Make sure we record at least the request and response queue zero in
340 * case we need to free them if part of the probe fails.
342 ha
->rsp_q_map
[0] = rsp
;
343 ha
->req_q_map
[0] = req
;
344 set_bit(0, ha
->rsp_qid_map
);
345 set_bit(0, ha
->req_qid_map
);
349 kfree(ha
->req_q_map
);
350 ha
->req_q_map
= NULL
;
355 static void qla2x00_free_req_que(struct qla_hw_data
*ha
, struct req_que
*req
)
357 if (IS_QLAFX00(ha
)) {
358 if (req
&& req
->ring_fx00
)
359 dma_free_coherent(&ha
->pdev
->dev
,
360 (req
->length_fx00
+ 1) * sizeof(request_t
),
361 req
->ring_fx00
, req
->dma_fx00
);
362 } else if (req
&& req
->ring
)
363 dma_free_coherent(&ha
->pdev
->dev
,
364 (req
->length
+ 1) * sizeof(request_t
),
365 req
->ring
, req
->dma
);
368 kfree(req
->outstanding_cmds
);
374 static void qla2x00_free_rsp_que(struct qla_hw_data
*ha
, struct rsp_que
*rsp
)
376 if (IS_QLAFX00(ha
)) {
377 if (rsp
&& rsp
->ring
)
378 dma_free_coherent(&ha
->pdev
->dev
,
379 (rsp
->length_fx00
+ 1) * sizeof(request_t
),
380 rsp
->ring_fx00
, rsp
->dma_fx00
);
381 } else if (rsp
&& rsp
->ring
) {
382 dma_free_coherent(&ha
->pdev
->dev
,
383 (rsp
->length
+ 1) * sizeof(response_t
),
384 rsp
->ring
, rsp
->dma
);
390 static void qla2x00_free_queues(struct qla_hw_data
*ha
)
396 for (cnt
= 0; cnt
< ha
->max_req_queues
; cnt
++) {
397 req
= ha
->req_q_map
[cnt
];
398 qla2x00_free_req_que(ha
, req
);
400 kfree(ha
->req_q_map
);
401 ha
->req_q_map
= NULL
;
403 for (cnt
= 0; cnt
< ha
->max_rsp_queues
; cnt
++) {
404 rsp
= ha
->rsp_q_map
[cnt
];
405 qla2x00_free_rsp_que(ha
, rsp
);
407 kfree(ha
->rsp_q_map
);
408 ha
->rsp_q_map
= NULL
;
411 static int qla25xx_setup_mode(struct scsi_qla_host
*vha
)
413 uint16_t options
= 0;
415 struct qla_hw_data
*ha
= vha
->hw
;
417 if (!(ha
->fw_attributes
& BIT_6
)) {
418 ql_log(ql_log_warn
, vha
, 0x00d8,
419 "Firmware is not multi-queue capable.\n");
422 if (ql2xmultique_tag
) {
423 /* create a request queue for IO */
425 req
= qla25xx_create_req_que(ha
, options
, 0, 0, -1,
426 QLA_DEFAULT_QUE_QOS
);
428 ql_log(ql_log_warn
, vha
, 0x00e0,
429 "Failed to create request queue.\n");
432 ha
->wq
= alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM
, 1);
433 vha
->req
= ha
->req_q_map
[req
];
435 for (ques
= 1; ques
< ha
->max_rsp_queues
; ques
++) {
436 ret
= qla25xx_create_rsp_que(ha
, options
, 0, 0, req
);
438 ql_log(ql_log_warn
, vha
, 0x00e8,
439 "Failed to create response queue.\n");
443 ha
->flags
.cpu_affinity_enabled
= 1;
444 ql_dbg(ql_dbg_multiq
, vha
, 0xc007,
445 "CPU affinity mode enalbed, "
446 "no. of response queues:%d no. of request queues:%d.\n",
447 ha
->max_rsp_queues
, ha
->max_req_queues
);
448 ql_dbg(ql_dbg_init
, vha
, 0x00e9,
449 "CPU affinity mode enalbed, "
450 "no. of response queues:%d no. of request queues:%d.\n",
451 ha
->max_rsp_queues
, ha
->max_req_queues
);
455 qla25xx_delete_queues(vha
);
456 destroy_workqueue(ha
->wq
);
458 vha
->req
= ha
->req_q_map
[0];
461 kfree(ha
->req_q_map
);
462 kfree(ha
->rsp_q_map
);
463 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
468 qla2x00_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
470 struct qla_hw_data
*ha
= vha
->hw
;
471 static char *pci_bus_modes
[] = {
472 "33", "66", "100", "133",
477 pci_bus
= (ha
->pci_attr
& (BIT_9
| BIT_10
)) >> 9;
480 strcat(str
, pci_bus_modes
[pci_bus
]);
482 pci_bus
= (ha
->pci_attr
& BIT_8
) >> 8;
484 strcat(str
, pci_bus_modes
[pci_bus
]);
486 strcat(str
, " MHz)");
492 qla24xx_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
494 static char *pci_bus_modes
[] = { "33", "66", "100", "133", };
495 struct qla_hw_data
*ha
= vha
->hw
;
499 pcie_reg
= pci_pcie_cap(ha
->pdev
);
502 uint16_t pcie_lstat
, lspeed
, lwidth
;
504 pcie_reg
+= PCI_EXP_LNKCAP
;
505 pci_read_config_word(ha
->pdev
, pcie_reg
, &pcie_lstat
);
506 lspeed
= pcie_lstat
& (BIT_0
| BIT_1
| BIT_2
| BIT_3
);
507 lwidth
= (pcie_lstat
&
508 (BIT_4
| BIT_5
| BIT_6
| BIT_7
| BIT_8
| BIT_9
)) >> 4;
510 strcpy(str
, "PCIe (");
513 strcat(str
, "2.5GT/s ");
516 strcat(str
, "5.0GT/s ");
519 strcat(str
, "8.0GT/s ");
522 strcat(str
, "<unknown> ");
525 snprintf(lwstr
, sizeof(lwstr
), "x%d)", lwidth
);
532 pci_bus
= (ha
->pci_attr
& CSRX_PCIX_BUS_MODE_MASK
) >> 8;
533 if (pci_bus
== 0 || pci_bus
== 8) {
535 strcat(str
, pci_bus_modes
[pci_bus
>> 3]);
539 strcat(str
, "Mode 2");
541 strcat(str
, "Mode 1");
543 strcat(str
, pci_bus_modes
[pci_bus
& ~BIT_2
]);
545 strcat(str
, " MHz)");
551 qla2x00_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
554 struct qla_hw_data
*ha
= vha
->hw
;
556 sprintf(str
, "%d.%02d.%02d ", ha
->fw_major_version
,
557 ha
->fw_minor_version
,
558 ha
->fw_subminor_version
);
560 if (ha
->fw_attributes
& BIT_9
) {
565 switch (ha
->fw_attributes
& 0xFF) {
579 sprintf(un_str
, "(%x)", ha
->fw_attributes
);
583 if (ha
->fw_attributes
& 0x100)
590 qla24xx_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
592 struct qla_hw_data
*ha
= vha
->hw
;
594 sprintf(str
, "%d.%02d.%02d (%x)", ha
->fw_major_version
,
595 ha
->fw_minor_version
, ha
->fw_subminor_version
, ha
->fw_attributes
);
600 qla2x00_sp_free_dma(void *vha
, void *ptr
)
602 srb_t
*sp
= (srb_t
*)ptr
;
603 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
604 struct qla_hw_data
*ha
= sp
->fcport
->vha
->hw
;
605 void *ctx
= GET_CMD_CTX_SP(sp
);
607 if (sp
->flags
& SRB_DMA_VALID
) {
609 sp
->flags
&= ~SRB_DMA_VALID
;
612 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
613 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
614 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
615 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
618 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
619 /* List assured to be having elements */
620 qla2x00_clean_dsd_pool(ha
, sp
);
621 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
624 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
625 dma_pool_free(ha
->dl_dma_pool
, ctx
,
626 ((struct crc_context
*)ctx
)->crc_ctx_dma
);
627 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
630 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
631 struct ct6_dsd
*ctx1
= (struct ct6_dsd
*)ctx
;
633 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
635 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
636 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
637 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
638 mempool_free(ctx1
, ha
->ctx_mempool
);
643 qla2x00_rel_sp(sp
->fcport
->vha
, sp
);
647 qla2x00_sp_compl(void *data
, void *ptr
, int res
)
649 struct qla_hw_data
*ha
= (struct qla_hw_data
*)data
;
650 srb_t
*sp
= (srb_t
*)ptr
;
651 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
655 if (atomic_read(&sp
->ref_count
) == 0) {
656 ql_dbg(ql_dbg_io
, sp
->fcport
->vha
, 0x3015,
657 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
659 if (ql2xextended_error_logging
& ql_dbg_io
)
663 if (!atomic_dec_and_test(&sp
->ref_count
))
666 qla2x00_sp_free_dma(ha
, sp
);
670 /* If we are SP1 here, we need to still take and release the host_lock as SP1
671 * does not have the changes necessary to avoid taking host->host_lock.
674 qla2xxx_queuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
)
676 scsi_qla_host_t
*vha
= shost_priv(host
);
677 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
678 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
679 struct qla_hw_data
*ha
= vha
->hw
;
680 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
684 if (ha
->flags
.eeh_busy
) {
685 if (ha
->flags
.pci_channel_io_perm_failure
) {
686 ql_dbg(ql_dbg_aer
, vha
, 0x9010,
687 "PCI Channel IO permanent failure, exiting "
689 cmd
->result
= DID_NO_CONNECT
<< 16;
691 ql_dbg(ql_dbg_aer
, vha
, 0x9011,
692 "EEH_Busy, Requeuing the cmd=%p.\n", cmd
);
693 cmd
->result
= DID_REQUEUE
<< 16;
695 goto qc24_fail_command
;
698 rval
= fc_remote_port_chkready(rport
);
701 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3003,
702 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
704 goto qc24_fail_command
;
707 if (!vha
->flags
.difdix_supported
&&
708 scsi_get_prot_op(cmd
) != SCSI_PROT_NORMAL
) {
709 ql_dbg(ql_dbg_io
, vha
, 0x3004,
710 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
712 cmd
->result
= DID_NO_CONNECT
<< 16;
713 goto qc24_fail_command
;
717 cmd
->result
= DID_NO_CONNECT
<< 16;
718 goto qc24_fail_command
;
721 if (atomic_read(&fcport
->state
) != FCS_ONLINE
) {
722 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
723 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
724 ql_dbg(ql_dbg_io
, vha
, 0x3005,
725 "Returning DNC, fcport_state=%d loop_state=%d.\n",
726 atomic_read(&fcport
->state
),
727 atomic_read(&base_vha
->loop_state
));
728 cmd
->result
= DID_NO_CONNECT
<< 16;
729 goto qc24_fail_command
;
731 goto qc24_target_busy
;
734 sp
= qla2x00_get_sp(vha
, fcport
, GFP_ATOMIC
);
736 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
);
740 sp
->u
.scmd
.cmd
= cmd
;
741 sp
->type
= SRB_SCSI_CMD
;
742 atomic_set(&sp
->ref_count
, 1);
743 CMD_SP(cmd
) = (void *)sp
;
744 sp
->free
= qla2x00_sp_free_dma
;
745 sp
->done
= qla2x00_sp_compl
;
747 rval
= ha
->isp_ops
->start_scsi(sp
);
748 if (rval
!= QLA_SUCCESS
) {
749 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3013,
750 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
751 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
);
752 goto qc24_host_busy_free_sp
;
757 qc24_host_busy_free_sp
:
758 qla2x00_sp_free_dma(ha
, sp
);
761 return SCSI_MLQUEUE_HOST_BUSY
;
764 return SCSI_MLQUEUE_TARGET_BUSY
;
773 * qla2x00_eh_wait_on_command
774 * Waits for the command to be returned by the Firmware for some
778 * cmd = Scsi Command to wait on.
785 qla2x00_eh_wait_on_command(struct scsi_cmnd
*cmd
)
787 #define ABORT_POLLING_PERIOD 1000
788 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
789 unsigned long wait_iter
= ABORT_WAIT_ITER
;
790 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
791 struct qla_hw_data
*ha
= vha
->hw
;
792 int ret
= QLA_SUCCESS
;
794 if (unlikely(pci_channel_offline(ha
->pdev
)) || ha
->flags
.eeh_busy
) {
795 ql_dbg(ql_dbg_taskm
, vha
, 0x8005,
796 "Return:eh_wait.\n");
800 while (CMD_SP(cmd
) && wait_iter
--) {
801 msleep(ABORT_POLLING_PERIOD
);
804 ret
= QLA_FUNCTION_FAILED
;
810 * qla2x00_wait_for_hba_online
811 * Wait till the HBA is online after going through
812 * <= MAX_RETRIES_OF_ISP_ABORT or
813 * finally HBA is disabled ie marked offline
816 * ha - pointer to host adapter structure
819 * Does context switching-Release SPIN_LOCK
820 * (if any) before calling this routine.
823 * Success (Adapter is online) : 0
824 * Failed (Adapter is offline/disabled) : 1
827 qla2x00_wait_for_hba_online(scsi_qla_host_t
*vha
)
830 unsigned long wait_online
;
831 struct qla_hw_data
*ha
= vha
->hw
;
832 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
834 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
835 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
836 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
837 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
838 ha
->dpc_active
) && time_before(jiffies
, wait_online
)) {
842 if (base_vha
->flags
.online
)
843 return_status
= QLA_SUCCESS
;
845 return_status
= QLA_FUNCTION_FAILED
;
847 return (return_status
);
851 * qla2x00_wait_for_reset_ready
852 * Wait till the HBA is online after going through
853 * <= MAX_RETRIES_OF_ISP_ABORT or
854 * finally HBA is disabled ie marked offline or flash
855 * operations are in progress.
858 * ha - pointer to host adapter structure
861 * Does context switching-Release SPIN_LOCK
862 * (if any) before calling this routine.
865 * Success (Adapter is online/no flash ops) : 0
866 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
869 qla2x00_wait_for_reset_ready(scsi_qla_host_t
*vha
)
872 unsigned long wait_online
;
873 struct qla_hw_data
*ha
= vha
->hw
;
874 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
876 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
877 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
878 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
879 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
880 ha
->optrom_state
!= QLA_SWAITING
||
881 ha
->dpc_active
) && time_before(jiffies
, wait_online
))
884 if (base_vha
->flags
.online
&& ha
->optrom_state
== QLA_SWAITING
)
885 return_status
= QLA_SUCCESS
;
887 return_status
= QLA_FUNCTION_FAILED
;
889 ql_dbg(ql_dbg_taskm
, vha
, 0x8019,
890 "%s return status=%d.\n", __func__
, return_status
);
892 return return_status
;
896 qla2x00_wait_for_chip_reset(scsi_qla_host_t
*vha
)
899 unsigned long wait_reset
;
900 struct qla_hw_data
*ha
= vha
->hw
;
901 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
903 wait_reset
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
904 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
905 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
906 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
907 ha
->dpc_active
) && time_before(jiffies
, wait_reset
)) {
911 if (!test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
912 ha
->flags
.chip_reset_done
)
915 if (ha
->flags
.chip_reset_done
)
916 return_status
= QLA_SUCCESS
;
918 return_status
= QLA_FUNCTION_FAILED
;
920 return return_status
;
924 sp_get(struct srb
*sp
)
926 atomic_inc(&sp
->ref_count
);
929 /**************************************************************************
933 * The abort function will abort the specified command.
936 * cmd = Linux SCSI command packet to be aborted.
939 * Either SUCCESS or FAILED.
942 * Only return FAILED if command not returned by firmware.
943 **************************************************************************/
945 qla2xxx_eh_abort(struct scsi_cmnd
*cmd
)
947 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
950 unsigned int id
, lun
;
953 struct qla_hw_data
*ha
= vha
->hw
;
958 ret
= fc_block_scsi_eh(cmd
);
963 id
= cmd
->device
->id
;
964 lun
= cmd
->device
->lun
;
966 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
967 sp
= (srb_t
*) CMD_SP(cmd
);
969 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
973 ql_dbg(ql_dbg_taskm
, vha
, 0x8002,
974 "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
975 vha
->host_no
, id
, lun
, sp
, cmd
);
977 /* Get a reference to the sp and drop the lock.*/
980 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
981 if (ha
->isp_ops
->abort_command(sp
)) {
983 ql_dbg(ql_dbg_taskm
, vha
, 0x8003,
984 "Abort command mbx failed cmd=%p.\n", cmd
);
986 ql_dbg(ql_dbg_taskm
, vha
, 0x8004,
987 "Abort command mbx success cmd=%p.\n", cmd
);
991 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
993 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
995 /* Did the command return during mailbox execution? */
996 if (ret
== FAILED
&& !CMD_SP(cmd
))
999 /* Wait for the command to be returned. */
1001 if (qla2x00_eh_wait_on_command(cmd
) != QLA_SUCCESS
) {
1002 ql_log(ql_log_warn
, vha
, 0x8006,
1003 "Abort handler timed out cmd=%p.\n", cmd
);
1008 ql_log(ql_log_info
, vha
, 0x801c,
1009 "Abort command issued nexus=%ld:%d:%d -- %d %x.\n",
1010 vha
->host_no
, id
, lun
, wait
, ret
);
1016 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t
*vha
, unsigned int t
,
1017 unsigned int l
, enum nexus_wait_type type
)
1019 int cnt
, match
, status
;
1020 unsigned long flags
;
1021 struct qla_hw_data
*ha
= vha
->hw
;
1022 struct req_que
*req
;
1024 struct scsi_cmnd
*cmd
;
1026 status
= QLA_SUCCESS
;
1028 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1030 for (cnt
= 1; status
== QLA_SUCCESS
&&
1031 cnt
< req
->num_outstanding_cmds
; cnt
++) {
1032 sp
= req
->outstanding_cmds
[cnt
];
1035 if (sp
->type
!= SRB_SCSI_CMD
)
1037 if (vha
->vp_idx
!= sp
->fcport
->vha
->vp_idx
)
1040 cmd
= GET_CMD_SP(sp
);
1046 match
= cmd
->device
->id
== t
;
1049 match
= (cmd
->device
->id
== t
&&
1050 cmd
->device
->lun
== l
);
1056 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1057 status
= qla2x00_eh_wait_on_command(cmd
);
1058 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1060 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1065 static char *reset_errors
[] = {
1068 "Task management failed",
1069 "Waiting for command completions",
1073 __qla2xxx_eh_generic_reset(char *name
, enum nexus_wait_type type
,
1074 struct scsi_cmnd
*cmd
, int (*do_reset
)(struct fc_port
*, unsigned int, int))
1076 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1077 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1084 err
= fc_block_scsi_eh(cmd
);
1088 ql_log(ql_log_info
, vha
, 0x8009,
1089 "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name
, vha
->host_no
,
1090 cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1093 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1094 ql_log(ql_log_warn
, vha
, 0x800a,
1095 "Wait for hba online failed for cmd=%p.\n", cmd
);
1096 goto eh_reset_failed
;
1099 if (do_reset(fcport
, cmd
->device
->lun
, cmd
->request
->cpu
+ 1)
1101 ql_log(ql_log_warn
, vha
, 0x800c,
1102 "do_reset failed for cmd=%p.\n", cmd
);
1103 goto eh_reset_failed
;
1106 if (qla2x00_eh_wait_for_pending_commands(vha
, cmd
->device
->id
,
1107 cmd
->device
->lun
, type
) != QLA_SUCCESS
) {
1108 ql_log(ql_log_warn
, vha
, 0x800d,
1109 "wait for pending cmds failed for cmd=%p.\n", cmd
);
1110 goto eh_reset_failed
;
1113 ql_log(ql_log_info
, vha
, 0x800e,
1114 "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name
,
1115 vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1120 ql_log(ql_log_info
, vha
, 0x800f,
1121 "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name
,
1122 reset_errors
[err
], vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
,
1128 qla2xxx_eh_device_reset(struct scsi_cmnd
*cmd
)
1130 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1131 struct qla_hw_data
*ha
= vha
->hw
;
1133 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN
, cmd
,
1134 ha
->isp_ops
->lun_reset
);
1138 qla2xxx_eh_target_reset(struct scsi_cmnd
*cmd
)
1140 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1141 struct qla_hw_data
*ha
= vha
->hw
;
1143 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET
, cmd
,
1144 ha
->isp_ops
->target_reset
);
1147 /**************************************************************************
1148 * qla2xxx_eh_bus_reset
1151 * The bus reset function will reset the bus and abort any executing
1155 * cmd = Linux SCSI command packet of the command that cause the
1159 * SUCCESS/FAILURE (defined as macro in scsi.h).
1161 **************************************************************************/
1163 qla2xxx_eh_bus_reset(struct scsi_cmnd
*cmd
)
1165 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1166 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1168 unsigned int id
, lun
;
1170 id
= cmd
->device
->id
;
1171 lun
= cmd
->device
->lun
;
1177 ret
= fc_block_scsi_eh(cmd
);
1182 ql_log(ql_log_info
, vha
, 0x8012,
1183 "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1185 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1186 ql_log(ql_log_fatal
, vha
, 0x8013,
1187 "Wait for hba online failed board disabled.\n");
1188 goto eh_bus_reset_done
;
1191 if (qla2x00_loop_reset(vha
) == QLA_SUCCESS
)
1195 goto eh_bus_reset_done
;
1197 /* Flush outstanding commands. */
1198 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) !=
1200 ql_log(ql_log_warn
, vha
, 0x8014,
1201 "Wait for pending commands failed.\n");
1206 ql_log(ql_log_warn
, vha
, 0x802b,
1207 "BUS RESET %s nexus=%ld:%d:%d.\n",
1208 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1213 /**************************************************************************
1214 * qla2xxx_eh_host_reset
1217 * The reset function will reset the Adapter.
1220 * cmd = Linux SCSI command packet of the command that cause the
1224 * Either SUCCESS or FAILED.
1227 **************************************************************************/
1229 qla2xxx_eh_host_reset(struct scsi_cmnd
*cmd
)
1231 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1232 struct qla_hw_data
*ha
= vha
->hw
;
1234 unsigned int id
, lun
;
1235 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1237 id
= cmd
->device
->id
;
1238 lun
= cmd
->device
->lun
;
1240 ql_log(ql_log_info
, vha
, 0x8018,
1241 "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1243 if (qla2x00_wait_for_reset_ready(vha
) != QLA_SUCCESS
)
1244 goto eh_host_reset_lock
;
1246 if (vha
!= base_vha
) {
1247 if (qla2x00_vp_abort_isp(vha
))
1248 goto eh_host_reset_lock
;
1250 if (IS_P3P_TYPE(vha
->hw
)) {
1251 if (!qla82xx_fcoe_ctx_reset(vha
)) {
1252 /* Ctx reset success */
1254 goto eh_host_reset_lock
;
1256 /* fall thru if ctx reset failed */
1259 flush_workqueue(ha
->wq
);
1261 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1262 if (ha
->isp_ops
->abort_isp(base_vha
)) {
1263 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1264 /* failed. schedule dpc to try */
1265 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
1267 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1268 ql_log(ql_log_warn
, vha
, 0x802a,
1269 "wait for hba online failed.\n");
1270 goto eh_host_reset_lock
;
1273 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1276 /* Waiting for command to be returned to OS.*/
1277 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) ==
1282 ql_log(ql_log_info
, vha
, 0x8017,
1283 "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1284 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1290 * qla2x00_loop_reset
1294 * ha = adapter block pointer.
1300 qla2x00_loop_reset(scsi_qla_host_t
*vha
)
1303 struct fc_port
*fcport
;
1304 struct qla_hw_data
*ha
= vha
->hw
;
1306 if (IS_QLAFX00(ha
)) {
1307 return qlafx00_loop_reset(vha
);
1310 if (ql2xtargetreset
== 1 && ha
->flags
.enable_target_reset
) {
1311 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
1312 if (fcport
->port_type
!= FCT_TARGET
)
1315 ret
= ha
->isp_ops
->target_reset(fcport
, 0, 0);
1316 if (ret
!= QLA_SUCCESS
) {
1317 ql_dbg(ql_dbg_taskm
, vha
, 0x802c,
1318 "Bus Reset failed: Reset=%d "
1319 "d_id=%x.\n", ret
, fcport
->d_id
.b24
);
1325 if (ha
->flags
.enable_lip_full_login
&& !IS_CNA_CAPABLE(ha
)) {
1326 atomic_set(&vha
->loop_state
, LOOP_DOWN
);
1327 atomic_set(&vha
->loop_down_timer
, LOOP_DOWN_TIME
);
1328 qla2x00_mark_all_devices_lost(vha
, 0);
1329 ret
= qla2x00_full_login_lip(vha
);
1330 if (ret
!= QLA_SUCCESS
) {
1331 ql_dbg(ql_dbg_taskm
, vha
, 0x802d,
1332 "full_login_lip=%d.\n", ret
);
1336 if (ha
->flags
.enable_lip_reset
) {
1337 ret
= qla2x00_lip_reset(vha
);
1338 if (ret
!= QLA_SUCCESS
)
1339 ql_dbg(ql_dbg_taskm
, vha
, 0x802e,
1340 "lip_reset failed (%d).\n", ret
);
1343 /* Issue marker command only when we are going to start the I/O */
1344 vha
->marker_needed
= 1;
1350 qla2x00_abort_all_cmds(scsi_qla_host_t
*vha
, int res
)
1353 unsigned long flags
;
1355 struct qla_hw_data
*ha
= vha
->hw
;
1356 struct req_que
*req
;
1358 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1359 for (que
= 0; que
< ha
->max_req_queues
; que
++) {
1360 req
= ha
->req_q_map
[que
];
1363 if (!req
->outstanding_cmds
)
1365 for (cnt
= 1; cnt
< req
->num_outstanding_cmds
; cnt
++) {
1366 sp
= req
->outstanding_cmds
[cnt
];
1368 req
->outstanding_cmds
[cnt
] = NULL
;
1369 sp
->done(vha
, sp
, res
);
1373 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1377 qla2xxx_slave_alloc(struct scsi_device
*sdev
)
1379 struct fc_rport
*rport
= starget_to_rport(scsi_target(sdev
));
1381 if (!rport
|| fc_remote_port_chkready(rport
))
1384 sdev
->hostdata
= *(fc_port_t
**)rport
->dd_data
;
1390 qla2xxx_slave_configure(struct scsi_device
*sdev
)
1392 scsi_qla_host_t
*vha
= shost_priv(sdev
->host
);
1393 struct req_que
*req
= vha
->req
;
1395 if (IS_T10_PI_CAPABLE(vha
->hw
))
1396 blk_queue_update_dma_alignment(sdev
->request_queue
, 0x7);
1398 if (sdev
->tagged_supported
)
1399 scsi_activate_tcq(sdev
, req
->max_q_depth
);
1401 scsi_deactivate_tcq(sdev
, req
->max_q_depth
);
1406 qla2xxx_slave_destroy(struct scsi_device
*sdev
)
1408 sdev
->hostdata
= NULL
;
1411 static void qla2x00_handle_queue_full(struct scsi_device
*sdev
, int qdepth
)
1413 fc_port_t
*fcport
= (struct fc_port
*) sdev
->hostdata
;
1415 if (!scsi_track_queue_full(sdev
, qdepth
))
1418 ql_dbg(ql_dbg_io
, fcport
->vha
, 0x3029,
1419 "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1420 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1423 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device
*sdev
, int qdepth
)
1425 fc_port_t
*fcport
= sdev
->hostdata
;
1426 struct scsi_qla_host
*vha
= fcport
->vha
;
1427 struct req_que
*req
= NULL
;
1433 if (req
->max_q_depth
<= sdev
->queue_depth
|| req
->max_q_depth
< qdepth
)
1436 if (sdev
->ordered_tags
)
1437 scsi_adjust_queue_depth(sdev
, MSG_ORDERED_TAG
, qdepth
);
1439 scsi_adjust_queue_depth(sdev
, MSG_SIMPLE_TAG
, qdepth
);
1441 ql_dbg(ql_dbg_io
, vha
, 0x302a,
1442 "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1443 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1447 qla2x00_change_queue_depth(struct scsi_device
*sdev
, int qdepth
, int reason
)
1450 case SCSI_QDEPTH_DEFAULT
:
1451 scsi_adjust_queue_depth(sdev
, scsi_get_tag_type(sdev
), qdepth
);
1453 case SCSI_QDEPTH_QFULL
:
1454 qla2x00_handle_queue_full(sdev
, qdepth
);
1456 case SCSI_QDEPTH_RAMP_UP
:
1457 qla2x00_adjust_sdev_qdepth_up(sdev
, qdepth
);
1463 return sdev
->queue_depth
;
1467 qla2x00_change_queue_type(struct scsi_device
*sdev
, int tag_type
)
1469 if (sdev
->tagged_supported
) {
1470 scsi_set_tag_type(sdev
, tag_type
);
1472 scsi_activate_tcq(sdev
, sdev
->queue_depth
);
1474 scsi_deactivate_tcq(sdev
, sdev
->queue_depth
);
1482 qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t
*vha
)
1484 scsi_qla_host_t
*vp
;
1485 struct Scsi_Host
*shost
;
1486 struct scsi_device
*sdev
;
1487 struct qla_hw_data
*ha
= vha
->hw
;
1488 unsigned long flags
;
1490 ha
->host_last_rampdown_time
= jiffies
;
1492 if (ha
->cfg_lun_q_depth
<= vha
->host
->cmd_per_lun
)
1495 if ((ha
->cfg_lun_q_depth
/ 2) < vha
->host
->cmd_per_lun
)
1496 ha
->cfg_lun_q_depth
= vha
->host
->cmd_per_lun
;
1498 ha
->cfg_lun_q_depth
= ha
->cfg_lun_q_depth
/ 2;
1501 * Geometrically ramp down the queue depth for all devices on this
1504 spin_lock_irqsave(&ha
->vport_slock
, flags
);
1505 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
1507 shost_for_each_device(sdev
, shost
) {
1508 if (sdev
->queue_depth
> shost
->cmd_per_lun
) {
1509 if (sdev
->queue_depth
< ha
->cfg_lun_q_depth
)
1511 ql_dbg(ql_dbg_io
, vp
, 0x3031,
1512 "%ld:%d:%d: Ramping down queue depth to %d",
1513 vp
->host_no
, sdev
->id
, sdev
->lun
,
1514 ha
->cfg_lun_q_depth
);
1515 qla2x00_change_queue_depth(sdev
,
1516 ha
->cfg_lun_q_depth
, SCSI_QDEPTH_DEFAULT
);
1520 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
1526 qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t
*vha
)
1528 scsi_qla_host_t
*vp
;
1529 struct Scsi_Host
*shost
;
1530 struct scsi_device
*sdev
;
1531 struct qla_hw_data
*ha
= vha
->hw
;
1532 unsigned long flags
;
1534 ha
->host_last_rampup_time
= jiffies
;
1535 ha
->cfg_lun_q_depth
++;
1538 * Linearly ramp up the queue depth for all devices on this
1541 spin_lock_irqsave(&ha
->vport_slock
, flags
);
1542 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
1544 shost_for_each_device(sdev
, shost
) {
1545 if (sdev
->queue_depth
> ha
->cfg_lun_q_depth
)
1547 qla2x00_change_queue_depth(sdev
, ha
->cfg_lun_q_depth
,
1548 SCSI_QDEPTH_RAMP_UP
);
1551 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
1557 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1560 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1561 * supported addressing method.
1564 qla2x00_config_dma_addressing(struct qla_hw_data
*ha
)
1566 /* Assume a 32bit DMA mask. */
1567 ha
->flags
.enable_64bit_addressing
= 0;
1569 if (!dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(64))) {
1570 /* Any upper-dword bits set? */
1571 if (MSD(dma_get_required_mask(&ha
->pdev
->dev
)) &&
1572 !pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(64))) {
1573 /* Ok, a 64bit DMA mask is applicable. */
1574 ha
->flags
.enable_64bit_addressing
= 1;
1575 ha
->isp_ops
->calc_req_entries
= qla2x00_calc_iocbs_64
;
1576 ha
->isp_ops
->build_iocbs
= qla2x00_build_scsi_iocbs_64
;
1581 dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(32));
1582 pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(32));
1586 qla2x00_enable_intrs(struct qla_hw_data
*ha
)
1588 unsigned long flags
= 0;
1589 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1591 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1592 ha
->interrupts_on
= 1;
1593 /* enable risc and host interrupts */
1594 WRT_REG_WORD(®
->ictrl
, ICR_EN_INT
| ICR_EN_RISC
);
1595 RD_REG_WORD(®
->ictrl
);
1596 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1601 qla2x00_disable_intrs(struct qla_hw_data
*ha
)
1603 unsigned long flags
= 0;
1604 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1606 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1607 ha
->interrupts_on
= 0;
1608 /* disable risc and host interrupts */
1609 WRT_REG_WORD(®
->ictrl
, 0);
1610 RD_REG_WORD(®
->ictrl
);
1611 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1615 qla24xx_enable_intrs(struct qla_hw_data
*ha
)
1617 unsigned long flags
= 0;
1618 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1620 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1621 ha
->interrupts_on
= 1;
1622 WRT_REG_DWORD(®
->ictrl
, ICRX_EN_RISC_INT
);
1623 RD_REG_DWORD(®
->ictrl
);
1624 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1628 qla24xx_disable_intrs(struct qla_hw_data
*ha
)
1630 unsigned long flags
= 0;
1631 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1633 if (IS_NOPOLLING_TYPE(ha
))
1635 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1636 ha
->interrupts_on
= 0;
1637 WRT_REG_DWORD(®
->ictrl
, 0);
1638 RD_REG_DWORD(®
->ictrl
);
1639 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1643 qla2x00_iospace_config(struct qla_hw_data
*ha
)
1645 resource_size_t pio
;
1649 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1650 QLA2XXX_DRIVER_NAME
)) {
1651 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0011,
1652 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1653 pci_name(ha
->pdev
));
1654 goto iospace_error_exit
;
1656 if (!(ha
->bars
& 1))
1659 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1660 pio
= pci_resource_start(ha
->pdev
, 0);
1661 if (pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_IO
) {
1662 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1663 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0012,
1664 "Invalid pci I/O region size (%s).\n",
1665 pci_name(ha
->pdev
));
1669 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0013,
1670 "Region #0 no a PIO resource (%s).\n",
1671 pci_name(ha
->pdev
));
1674 ha
->pio_address
= pio
;
1675 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0014,
1676 "PIO address=%llu.\n",
1677 (unsigned long long)ha
->pio_address
);
1680 /* Use MMIO operations for all accesses. */
1681 if (!(pci_resource_flags(ha
->pdev
, 1) & IORESOURCE_MEM
)) {
1682 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0015,
1683 "Region #1 not an MMIO resource (%s), aborting.\n",
1684 pci_name(ha
->pdev
));
1685 goto iospace_error_exit
;
1687 if (pci_resource_len(ha
->pdev
, 1) < MIN_IOBASE_LEN
) {
1688 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0016,
1689 "Invalid PCI mem region size (%s), aborting.\n",
1690 pci_name(ha
->pdev
));
1691 goto iospace_error_exit
;
1694 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 1), MIN_IOBASE_LEN
);
1696 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0017,
1697 "Cannot remap MMIO (%s), aborting.\n",
1698 pci_name(ha
->pdev
));
1699 goto iospace_error_exit
;
1702 /* Determine queue resources */
1703 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1704 if ((ql2xmaxqueues
<= 1 && !ql2xmultique_tag
) ||
1705 (ql2xmaxqueues
> 1 && ql2xmultique_tag
) ||
1706 (!IS_QLA25XX(ha
) && !IS_QLA81XX(ha
)))
1709 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 3),
1710 pci_resource_len(ha
->pdev
, 3));
1712 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0018,
1713 "MQIO Base=%p.\n", ha
->mqiobase
);
1714 /* Read MSIX vector size of the board */
1715 pci_read_config_word(ha
->pdev
, QLA_PCI_MSIX_CONTROL
, &msix
);
1716 ha
->msix_count
= msix
;
1717 /* Max queues are bounded by available msix vectors */
1718 /* queue 0 uses two msix vectors */
1719 if (ql2xmultique_tag
) {
1720 cpus
= num_online_cpus();
1721 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1722 (cpus
+ 1) : (ha
->msix_count
- 1);
1723 ha
->max_req_queues
= 2;
1724 } else if (ql2xmaxqueues
> 1) {
1725 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1726 QLA_MQ_SIZE
: ql2xmaxqueues
;
1727 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc008,
1728 "QoS mode set, max no of request queues:%d.\n",
1729 ha
->max_req_queues
);
1730 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0019,
1731 "QoS mode set, max no of request queues:%d.\n",
1732 ha
->max_req_queues
);
1734 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001a,
1735 "MSI-X vector count: %d.\n", msix
);
1737 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001b,
1738 "BAR 3 not enabled.\n");
1741 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1742 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x001c,
1743 "MSIX Count:%d.\n", ha
->msix_count
);
1752 qla83xx_iospace_config(struct qla_hw_data
*ha
)
1757 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1758 QLA2XXX_DRIVER_NAME
)) {
1759 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0117,
1760 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1761 pci_name(ha
->pdev
));
1763 goto iospace_error_exit
;
1766 /* Use MMIO operations for all accesses. */
1767 if (!(pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_MEM
)) {
1768 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0118,
1769 "Invalid pci I/O region size (%s).\n",
1770 pci_name(ha
->pdev
));
1771 goto iospace_error_exit
;
1773 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1774 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0119,
1775 "Invalid PCI mem region size (%s), aborting\n",
1776 pci_name(ha
->pdev
));
1777 goto iospace_error_exit
;
1780 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 0), MIN_IOBASE_LEN
);
1782 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011a,
1783 "Cannot remap MMIO (%s), aborting.\n",
1784 pci_name(ha
->pdev
));
1785 goto iospace_error_exit
;
1788 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1789 /* 83XX 26XX always use MQ type access for queues
1790 * - mbar 2, a.k.a region 4 */
1791 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1792 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 4),
1793 pci_resource_len(ha
->pdev
, 4));
1795 if (!ha
->mqiobase
) {
1796 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011d,
1797 "BAR2/region4 not enabled\n");
1801 ha
->msixbase
= ioremap(pci_resource_start(ha
->pdev
, 2),
1802 pci_resource_len(ha
->pdev
, 2));
1804 /* Read MSIX vector size of the board */
1805 pci_read_config_word(ha
->pdev
,
1806 QLA_83XX_PCI_MSIX_CONTROL
, &msix
);
1807 ha
->msix_count
= msix
;
1808 /* Max queues are bounded by available msix vectors */
1809 /* queue 0 uses two msix vectors */
1810 if (ql2xmultique_tag
) {
1811 cpus
= num_online_cpus();
1812 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1813 (cpus
+ 1) : (ha
->msix_count
- 1);
1814 ha
->max_req_queues
= 2;
1815 } else if (ql2xmaxqueues
> 1) {
1816 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1817 QLA_MQ_SIZE
: ql2xmaxqueues
;
1818 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc00c,
1819 "QoS mode set, max no of request queues:%d.\n",
1820 ha
->max_req_queues
);
1821 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
1822 "QoS mode set, max no of request queues:%d.\n",
1823 ha
->max_req_queues
);
1825 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011c,
1826 "MSI-X vector count: %d.\n", msix
);
1828 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011e,
1829 "BAR 1 not enabled.\n");
1832 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1834 qlt_83xx_iospace_config(ha
);
1836 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011f,
1837 "MSIX Count:%d.\n", ha
->msix_count
);
1844 static struct isp_operations qla2100_isp_ops
= {
1845 .pci_config
= qla2100_pci_config
,
1846 .reset_chip
= qla2x00_reset_chip
,
1847 .chip_diag
= qla2x00_chip_diag
,
1848 .config_rings
= qla2x00_config_rings
,
1849 .reset_adapter
= qla2x00_reset_adapter
,
1850 .nvram_config
= qla2x00_nvram_config
,
1851 .update_fw_options
= qla2x00_update_fw_options
,
1852 .load_risc
= qla2x00_load_risc
,
1853 .pci_info_str
= qla2x00_pci_info_str
,
1854 .fw_version_str
= qla2x00_fw_version_str
,
1855 .intr_handler
= qla2100_intr_handler
,
1856 .enable_intrs
= qla2x00_enable_intrs
,
1857 .disable_intrs
= qla2x00_disable_intrs
,
1858 .abort_command
= qla2x00_abort_command
,
1859 .target_reset
= qla2x00_abort_target
,
1860 .lun_reset
= qla2x00_lun_reset
,
1861 .fabric_login
= qla2x00_login_fabric
,
1862 .fabric_logout
= qla2x00_fabric_logout
,
1863 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1864 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1865 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1866 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1867 .read_nvram
= qla2x00_read_nvram_data
,
1868 .write_nvram
= qla2x00_write_nvram_data
,
1869 .fw_dump
= qla2100_fw_dump
,
1872 .beacon_blink
= NULL
,
1873 .read_optrom
= qla2x00_read_optrom_data
,
1874 .write_optrom
= qla2x00_write_optrom_data
,
1875 .get_flash_version
= qla2x00_get_flash_version
,
1876 .start_scsi
= qla2x00_start_scsi
,
1877 .abort_isp
= qla2x00_abort_isp
,
1878 .iospace_config
= qla2x00_iospace_config
,
1879 .initialize_adapter
= qla2x00_initialize_adapter
,
1882 static struct isp_operations qla2300_isp_ops
= {
1883 .pci_config
= qla2300_pci_config
,
1884 .reset_chip
= qla2x00_reset_chip
,
1885 .chip_diag
= qla2x00_chip_diag
,
1886 .config_rings
= qla2x00_config_rings
,
1887 .reset_adapter
= qla2x00_reset_adapter
,
1888 .nvram_config
= qla2x00_nvram_config
,
1889 .update_fw_options
= qla2x00_update_fw_options
,
1890 .load_risc
= qla2x00_load_risc
,
1891 .pci_info_str
= qla2x00_pci_info_str
,
1892 .fw_version_str
= qla2x00_fw_version_str
,
1893 .intr_handler
= qla2300_intr_handler
,
1894 .enable_intrs
= qla2x00_enable_intrs
,
1895 .disable_intrs
= qla2x00_disable_intrs
,
1896 .abort_command
= qla2x00_abort_command
,
1897 .target_reset
= qla2x00_abort_target
,
1898 .lun_reset
= qla2x00_lun_reset
,
1899 .fabric_login
= qla2x00_login_fabric
,
1900 .fabric_logout
= qla2x00_fabric_logout
,
1901 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1902 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1903 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1904 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1905 .read_nvram
= qla2x00_read_nvram_data
,
1906 .write_nvram
= qla2x00_write_nvram_data
,
1907 .fw_dump
= qla2300_fw_dump
,
1908 .beacon_on
= qla2x00_beacon_on
,
1909 .beacon_off
= qla2x00_beacon_off
,
1910 .beacon_blink
= qla2x00_beacon_blink
,
1911 .read_optrom
= qla2x00_read_optrom_data
,
1912 .write_optrom
= qla2x00_write_optrom_data
,
1913 .get_flash_version
= qla2x00_get_flash_version
,
1914 .start_scsi
= qla2x00_start_scsi
,
1915 .abort_isp
= qla2x00_abort_isp
,
1916 .iospace_config
= qla2x00_iospace_config
,
1917 .initialize_adapter
= qla2x00_initialize_adapter
,
1920 static struct isp_operations qla24xx_isp_ops
= {
1921 .pci_config
= qla24xx_pci_config
,
1922 .reset_chip
= qla24xx_reset_chip
,
1923 .chip_diag
= qla24xx_chip_diag
,
1924 .config_rings
= qla24xx_config_rings
,
1925 .reset_adapter
= qla24xx_reset_adapter
,
1926 .nvram_config
= qla24xx_nvram_config
,
1927 .update_fw_options
= qla24xx_update_fw_options
,
1928 .load_risc
= qla24xx_load_risc
,
1929 .pci_info_str
= qla24xx_pci_info_str
,
1930 .fw_version_str
= qla24xx_fw_version_str
,
1931 .intr_handler
= qla24xx_intr_handler
,
1932 .enable_intrs
= qla24xx_enable_intrs
,
1933 .disable_intrs
= qla24xx_disable_intrs
,
1934 .abort_command
= qla24xx_abort_command
,
1935 .target_reset
= qla24xx_abort_target
,
1936 .lun_reset
= qla24xx_lun_reset
,
1937 .fabric_login
= qla24xx_login_fabric
,
1938 .fabric_logout
= qla24xx_fabric_logout
,
1939 .calc_req_entries
= NULL
,
1940 .build_iocbs
= NULL
,
1941 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1942 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1943 .read_nvram
= qla24xx_read_nvram_data
,
1944 .write_nvram
= qla24xx_write_nvram_data
,
1945 .fw_dump
= qla24xx_fw_dump
,
1946 .beacon_on
= qla24xx_beacon_on
,
1947 .beacon_off
= qla24xx_beacon_off
,
1948 .beacon_blink
= qla24xx_beacon_blink
,
1949 .read_optrom
= qla24xx_read_optrom_data
,
1950 .write_optrom
= qla24xx_write_optrom_data
,
1951 .get_flash_version
= qla24xx_get_flash_version
,
1952 .start_scsi
= qla24xx_start_scsi
,
1953 .abort_isp
= qla2x00_abort_isp
,
1954 .iospace_config
= qla2x00_iospace_config
,
1955 .initialize_adapter
= qla2x00_initialize_adapter
,
1958 static struct isp_operations qla25xx_isp_ops
= {
1959 .pci_config
= qla25xx_pci_config
,
1960 .reset_chip
= qla24xx_reset_chip
,
1961 .chip_diag
= qla24xx_chip_diag
,
1962 .config_rings
= qla24xx_config_rings
,
1963 .reset_adapter
= qla24xx_reset_adapter
,
1964 .nvram_config
= qla24xx_nvram_config
,
1965 .update_fw_options
= qla24xx_update_fw_options
,
1966 .load_risc
= qla24xx_load_risc
,
1967 .pci_info_str
= qla24xx_pci_info_str
,
1968 .fw_version_str
= qla24xx_fw_version_str
,
1969 .intr_handler
= qla24xx_intr_handler
,
1970 .enable_intrs
= qla24xx_enable_intrs
,
1971 .disable_intrs
= qla24xx_disable_intrs
,
1972 .abort_command
= qla24xx_abort_command
,
1973 .target_reset
= qla24xx_abort_target
,
1974 .lun_reset
= qla24xx_lun_reset
,
1975 .fabric_login
= qla24xx_login_fabric
,
1976 .fabric_logout
= qla24xx_fabric_logout
,
1977 .calc_req_entries
= NULL
,
1978 .build_iocbs
= NULL
,
1979 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1980 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1981 .read_nvram
= qla25xx_read_nvram_data
,
1982 .write_nvram
= qla25xx_write_nvram_data
,
1983 .fw_dump
= qla25xx_fw_dump
,
1984 .beacon_on
= qla24xx_beacon_on
,
1985 .beacon_off
= qla24xx_beacon_off
,
1986 .beacon_blink
= qla24xx_beacon_blink
,
1987 .read_optrom
= qla25xx_read_optrom_data
,
1988 .write_optrom
= qla24xx_write_optrom_data
,
1989 .get_flash_version
= qla24xx_get_flash_version
,
1990 .start_scsi
= qla24xx_dif_start_scsi
,
1991 .abort_isp
= qla2x00_abort_isp
,
1992 .iospace_config
= qla2x00_iospace_config
,
1993 .initialize_adapter
= qla2x00_initialize_adapter
,
1996 static struct isp_operations qla81xx_isp_ops
= {
1997 .pci_config
= qla25xx_pci_config
,
1998 .reset_chip
= qla24xx_reset_chip
,
1999 .chip_diag
= qla24xx_chip_diag
,
2000 .config_rings
= qla24xx_config_rings
,
2001 .reset_adapter
= qla24xx_reset_adapter
,
2002 .nvram_config
= qla81xx_nvram_config
,
2003 .update_fw_options
= qla81xx_update_fw_options
,
2004 .load_risc
= qla81xx_load_risc
,
2005 .pci_info_str
= qla24xx_pci_info_str
,
2006 .fw_version_str
= qla24xx_fw_version_str
,
2007 .intr_handler
= qla24xx_intr_handler
,
2008 .enable_intrs
= qla24xx_enable_intrs
,
2009 .disable_intrs
= qla24xx_disable_intrs
,
2010 .abort_command
= qla24xx_abort_command
,
2011 .target_reset
= qla24xx_abort_target
,
2012 .lun_reset
= qla24xx_lun_reset
,
2013 .fabric_login
= qla24xx_login_fabric
,
2014 .fabric_logout
= qla24xx_fabric_logout
,
2015 .calc_req_entries
= NULL
,
2016 .build_iocbs
= NULL
,
2017 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2018 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2020 .write_nvram
= NULL
,
2021 .fw_dump
= qla81xx_fw_dump
,
2022 .beacon_on
= qla24xx_beacon_on
,
2023 .beacon_off
= qla24xx_beacon_off
,
2024 .beacon_blink
= qla83xx_beacon_blink
,
2025 .read_optrom
= qla25xx_read_optrom_data
,
2026 .write_optrom
= qla24xx_write_optrom_data
,
2027 .get_flash_version
= qla24xx_get_flash_version
,
2028 .start_scsi
= qla24xx_dif_start_scsi
,
2029 .abort_isp
= qla2x00_abort_isp
,
2030 .iospace_config
= qla2x00_iospace_config
,
2031 .initialize_adapter
= qla2x00_initialize_adapter
,
2034 static struct isp_operations qla82xx_isp_ops
= {
2035 .pci_config
= qla82xx_pci_config
,
2036 .reset_chip
= qla82xx_reset_chip
,
2037 .chip_diag
= qla24xx_chip_diag
,
2038 .config_rings
= qla82xx_config_rings
,
2039 .reset_adapter
= qla24xx_reset_adapter
,
2040 .nvram_config
= qla81xx_nvram_config
,
2041 .update_fw_options
= qla24xx_update_fw_options
,
2042 .load_risc
= qla82xx_load_risc
,
2043 .pci_info_str
= qla24xx_pci_info_str
,
2044 .fw_version_str
= qla24xx_fw_version_str
,
2045 .intr_handler
= qla82xx_intr_handler
,
2046 .enable_intrs
= qla82xx_enable_intrs
,
2047 .disable_intrs
= qla82xx_disable_intrs
,
2048 .abort_command
= qla24xx_abort_command
,
2049 .target_reset
= qla24xx_abort_target
,
2050 .lun_reset
= qla24xx_lun_reset
,
2051 .fabric_login
= qla24xx_login_fabric
,
2052 .fabric_logout
= qla24xx_fabric_logout
,
2053 .calc_req_entries
= NULL
,
2054 .build_iocbs
= NULL
,
2055 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2056 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2057 .read_nvram
= qla24xx_read_nvram_data
,
2058 .write_nvram
= qla24xx_write_nvram_data
,
2059 .fw_dump
= qla24xx_fw_dump
,
2060 .beacon_on
= qla82xx_beacon_on
,
2061 .beacon_off
= qla82xx_beacon_off
,
2062 .beacon_blink
= NULL
,
2063 .read_optrom
= qla82xx_read_optrom_data
,
2064 .write_optrom
= qla82xx_write_optrom_data
,
2065 .get_flash_version
= qla82xx_get_flash_version
,
2066 .start_scsi
= qla82xx_start_scsi
,
2067 .abort_isp
= qla82xx_abort_isp
,
2068 .iospace_config
= qla82xx_iospace_config
,
2069 .initialize_adapter
= qla2x00_initialize_adapter
,
2072 static struct isp_operations qla8044_isp_ops
= {
2073 .pci_config
= qla82xx_pci_config
,
2074 .reset_chip
= qla82xx_reset_chip
,
2075 .chip_diag
= qla24xx_chip_diag
,
2076 .config_rings
= qla82xx_config_rings
,
2077 .reset_adapter
= qla24xx_reset_adapter
,
2078 .nvram_config
= qla81xx_nvram_config
,
2079 .update_fw_options
= qla24xx_update_fw_options
,
2080 .load_risc
= qla82xx_load_risc
,
2081 .pci_info_str
= qla24xx_pci_info_str
,
2082 .fw_version_str
= qla24xx_fw_version_str
,
2083 .intr_handler
= qla8044_intr_handler
,
2084 .enable_intrs
= qla82xx_enable_intrs
,
2085 .disable_intrs
= qla82xx_disable_intrs
,
2086 .abort_command
= qla24xx_abort_command
,
2087 .target_reset
= qla24xx_abort_target
,
2088 .lun_reset
= qla24xx_lun_reset
,
2089 .fabric_login
= qla24xx_login_fabric
,
2090 .fabric_logout
= qla24xx_fabric_logout
,
2091 .calc_req_entries
= NULL
,
2092 .build_iocbs
= NULL
,
2093 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2094 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2096 .write_nvram
= NULL
,
2097 .fw_dump
= qla24xx_fw_dump
,
2098 .beacon_on
= qla82xx_beacon_on
,
2099 .beacon_off
= qla82xx_beacon_off
,
2100 .beacon_blink
= NULL
,
2101 .read_optrom
= qla82xx_read_optrom_data
,
2102 .write_optrom
= qla8044_write_optrom_data
,
2103 .get_flash_version
= qla82xx_get_flash_version
,
2104 .start_scsi
= qla82xx_start_scsi
,
2105 .abort_isp
= qla8044_abort_isp
,
2106 .iospace_config
= qla82xx_iospace_config
,
2107 .initialize_adapter
= qla2x00_initialize_adapter
,
2110 static struct isp_operations qla83xx_isp_ops
= {
2111 .pci_config
= qla25xx_pci_config
,
2112 .reset_chip
= qla24xx_reset_chip
,
2113 .chip_diag
= qla24xx_chip_diag
,
2114 .config_rings
= qla24xx_config_rings
,
2115 .reset_adapter
= qla24xx_reset_adapter
,
2116 .nvram_config
= qla81xx_nvram_config
,
2117 .update_fw_options
= qla81xx_update_fw_options
,
2118 .load_risc
= qla81xx_load_risc
,
2119 .pci_info_str
= qla24xx_pci_info_str
,
2120 .fw_version_str
= qla24xx_fw_version_str
,
2121 .intr_handler
= qla24xx_intr_handler
,
2122 .enable_intrs
= qla24xx_enable_intrs
,
2123 .disable_intrs
= qla24xx_disable_intrs
,
2124 .abort_command
= qla24xx_abort_command
,
2125 .target_reset
= qla24xx_abort_target
,
2126 .lun_reset
= qla24xx_lun_reset
,
2127 .fabric_login
= qla24xx_login_fabric
,
2128 .fabric_logout
= qla24xx_fabric_logout
,
2129 .calc_req_entries
= NULL
,
2130 .build_iocbs
= NULL
,
2131 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2132 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2134 .write_nvram
= NULL
,
2135 .fw_dump
= qla83xx_fw_dump
,
2136 .beacon_on
= qla24xx_beacon_on
,
2137 .beacon_off
= qla24xx_beacon_off
,
2138 .beacon_blink
= qla83xx_beacon_blink
,
2139 .read_optrom
= qla25xx_read_optrom_data
,
2140 .write_optrom
= qla24xx_write_optrom_data
,
2141 .get_flash_version
= qla24xx_get_flash_version
,
2142 .start_scsi
= qla24xx_dif_start_scsi
,
2143 .abort_isp
= qla2x00_abort_isp
,
2144 .iospace_config
= qla83xx_iospace_config
,
2145 .initialize_adapter
= qla2x00_initialize_adapter
,
2148 static struct isp_operations qlafx00_isp_ops
= {
2149 .pci_config
= qlafx00_pci_config
,
2150 .reset_chip
= qlafx00_soft_reset
,
2151 .chip_diag
= qlafx00_chip_diag
,
2152 .config_rings
= qlafx00_config_rings
,
2153 .reset_adapter
= qlafx00_soft_reset
,
2154 .nvram_config
= NULL
,
2155 .update_fw_options
= NULL
,
2157 .pci_info_str
= qlafx00_pci_info_str
,
2158 .fw_version_str
= qlafx00_fw_version_str
,
2159 .intr_handler
= qlafx00_intr_handler
,
2160 .enable_intrs
= qlafx00_enable_intrs
,
2161 .disable_intrs
= qlafx00_disable_intrs
,
2162 .abort_command
= qlafx00_abort_command
,
2163 .target_reset
= qlafx00_abort_target
,
2164 .lun_reset
= qlafx00_lun_reset
,
2165 .fabric_login
= NULL
,
2166 .fabric_logout
= NULL
,
2167 .calc_req_entries
= NULL
,
2168 .build_iocbs
= NULL
,
2169 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2170 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2171 .read_nvram
= qla24xx_read_nvram_data
,
2172 .write_nvram
= qla24xx_write_nvram_data
,
2174 .beacon_on
= qla24xx_beacon_on
,
2175 .beacon_off
= qla24xx_beacon_off
,
2176 .beacon_blink
= NULL
,
2177 .read_optrom
= qla24xx_read_optrom_data
,
2178 .write_optrom
= qla24xx_write_optrom_data
,
2179 .get_flash_version
= qla24xx_get_flash_version
,
2180 .start_scsi
= qlafx00_start_scsi
,
2181 .abort_isp
= qlafx00_abort_isp
,
2182 .iospace_config
= qlafx00_iospace_config
,
2183 .initialize_adapter
= qlafx00_initialize_adapter
,
2187 qla2x00_set_isp_flags(struct qla_hw_data
*ha
)
2189 ha
->device_type
= DT_EXTENDED_IDS
;
2190 switch (ha
->pdev
->device
) {
2191 case PCI_DEVICE_ID_QLOGIC_ISP2100
:
2192 ha
->device_type
|= DT_ISP2100
;
2193 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2194 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2196 case PCI_DEVICE_ID_QLOGIC_ISP2200
:
2197 ha
->device_type
|= DT_ISP2200
;
2198 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2199 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2201 case PCI_DEVICE_ID_QLOGIC_ISP2300
:
2202 ha
->device_type
|= DT_ISP2300
;
2203 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2204 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2206 case PCI_DEVICE_ID_QLOGIC_ISP2312
:
2207 ha
->device_type
|= DT_ISP2312
;
2208 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2209 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2211 case PCI_DEVICE_ID_QLOGIC_ISP2322
:
2212 ha
->device_type
|= DT_ISP2322
;
2213 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2214 if (ha
->pdev
->subsystem_vendor
== 0x1028 &&
2215 ha
->pdev
->subsystem_device
== 0x0170)
2216 ha
->device_type
|= DT_OEM_001
;
2217 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2219 case PCI_DEVICE_ID_QLOGIC_ISP6312
:
2220 ha
->device_type
|= DT_ISP6312
;
2221 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2223 case PCI_DEVICE_ID_QLOGIC_ISP6322
:
2224 ha
->device_type
|= DT_ISP6322
;
2225 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2227 case PCI_DEVICE_ID_QLOGIC_ISP2422
:
2228 ha
->device_type
|= DT_ISP2422
;
2229 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2230 ha
->device_type
|= DT_FWI2
;
2231 ha
->device_type
|= DT_IIDMA
;
2232 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2234 case PCI_DEVICE_ID_QLOGIC_ISP2432
:
2235 ha
->device_type
|= DT_ISP2432
;
2236 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2237 ha
->device_type
|= DT_FWI2
;
2238 ha
->device_type
|= DT_IIDMA
;
2239 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2241 case PCI_DEVICE_ID_QLOGIC_ISP8432
:
2242 ha
->device_type
|= DT_ISP8432
;
2243 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2244 ha
->device_type
|= DT_FWI2
;
2245 ha
->device_type
|= DT_IIDMA
;
2246 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2248 case PCI_DEVICE_ID_QLOGIC_ISP5422
:
2249 ha
->device_type
|= DT_ISP5422
;
2250 ha
->device_type
|= DT_FWI2
;
2251 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2253 case PCI_DEVICE_ID_QLOGIC_ISP5432
:
2254 ha
->device_type
|= DT_ISP5432
;
2255 ha
->device_type
|= DT_FWI2
;
2256 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2258 case PCI_DEVICE_ID_QLOGIC_ISP2532
:
2259 ha
->device_type
|= DT_ISP2532
;
2260 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2261 ha
->device_type
|= DT_FWI2
;
2262 ha
->device_type
|= DT_IIDMA
;
2263 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2265 case PCI_DEVICE_ID_QLOGIC_ISP8001
:
2266 ha
->device_type
|= DT_ISP8001
;
2267 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2268 ha
->device_type
|= DT_FWI2
;
2269 ha
->device_type
|= DT_IIDMA
;
2270 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2272 case PCI_DEVICE_ID_QLOGIC_ISP8021
:
2273 ha
->device_type
|= DT_ISP8021
;
2274 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2275 ha
->device_type
|= DT_FWI2
;
2276 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2277 /* Initialize 82XX ISP flags */
2278 qla82xx_init_flags(ha
);
2280 case PCI_DEVICE_ID_QLOGIC_ISP8044
:
2281 ha
->device_type
|= DT_ISP8044
;
2282 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2283 ha
->device_type
|= DT_FWI2
;
2284 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2285 /* Initialize 82XX ISP flags */
2286 qla82xx_init_flags(ha
);
2288 case PCI_DEVICE_ID_QLOGIC_ISP2031
:
2289 ha
->device_type
|= DT_ISP2031
;
2290 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2291 ha
->device_type
|= DT_FWI2
;
2292 ha
->device_type
|= DT_IIDMA
;
2293 ha
->device_type
|= DT_T10_PI
;
2294 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2296 case PCI_DEVICE_ID_QLOGIC_ISP8031
:
2297 ha
->device_type
|= DT_ISP8031
;
2298 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2299 ha
->device_type
|= DT_FWI2
;
2300 ha
->device_type
|= DT_IIDMA
;
2301 ha
->device_type
|= DT_T10_PI
;
2302 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2304 case PCI_DEVICE_ID_QLOGIC_ISPF001
:
2305 ha
->device_type
|= DT_ISPFX00
;
2310 ha
->port_no
= !(ha
->portnum
& 1);
2312 /* Get adapter physical port no from interrupt pin register. */
2313 pci_read_config_byte(ha
->pdev
, PCI_INTERRUPT_PIN
, &ha
->port_no
);
2315 if (ha
->port_no
& 1)
2316 ha
->flags
.port0
= 1;
2318 ha
->flags
.port0
= 0;
2319 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x000b,
2320 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2321 ha
->device_type
, ha
->flags
.port0
, ha
->fw_srisc_address
);
2325 qla2xxx_scan_start(struct Scsi_Host
*shost
)
2327 scsi_qla_host_t
*vha
= shost_priv(shost
);
2329 if (vha
->hw
->flags
.running_gold_fw
)
2332 set_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
);
2333 set_bit(LOCAL_LOOP_UPDATE
, &vha
->dpc_flags
);
2334 set_bit(RSCN_UPDATE
, &vha
->dpc_flags
);
2335 set_bit(NPIV_CONFIG_NEEDED
, &vha
->dpc_flags
);
2339 qla2xxx_scan_finished(struct Scsi_Host
*shost
, unsigned long time
)
2341 scsi_qla_host_t
*vha
= shost_priv(shost
);
2345 if (time
> vha
->hw
->loop_reset_delay
* HZ
)
2348 return atomic_read(&vha
->loop_state
) == LOOP_READY
;
2352 * PCI driver interface
2355 qla2x00_probe_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2358 struct Scsi_Host
*host
;
2359 scsi_qla_host_t
*base_vha
= NULL
;
2360 struct qla_hw_data
*ha
;
2362 char fw_str
[30], wq_name
[30];
2363 struct scsi_host_template
*sht
;
2364 int bars
, mem_only
= 0;
2365 uint16_t req_length
= 0, rsp_length
= 0;
2366 struct req_que
*req
= NULL
;
2367 struct rsp_que
*rsp
= NULL
;
2368 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
2369 sht
= &qla2xxx_driver_template
;
2370 if (pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2422
||
2371 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2432
||
2372 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8432
||
2373 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5422
||
2374 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5432
||
2375 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2532
||
2376 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8001
||
2377 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8021
||
2378 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2031
||
2379 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8031
||
2380 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISPF001
||
2381 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8044
) {
2382 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2384 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0007,
2385 "Mem only adapter.\n");
2387 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0008,
2388 "Bars=%d.\n", bars
);
2391 if (pci_enable_device_mem(pdev
))
2394 if (pci_enable_device(pdev
))
2398 /* This may fail but that's ok */
2399 pci_enable_pcie_error_reporting(pdev
);
2401 ha
= kzalloc(sizeof(struct qla_hw_data
), GFP_KERNEL
);
2403 ql_log_pci(ql_log_fatal
, pdev
, 0x0009,
2404 "Unable to allocate memory for ha.\n");
2407 ql_dbg_pci(ql_dbg_init
, pdev
, 0x000a,
2408 "Memory allocated for ha=%p.\n", ha
);
2410 ha
->tgt
.enable_class_2
= ql2xenableclass2
;
2412 /* Clear our data area */
2414 ha
->mem_only
= mem_only
;
2415 spin_lock_init(&ha
->hardware_lock
);
2416 spin_lock_init(&ha
->vport_slock
);
2417 mutex_init(&ha
->selflogin_lock
);
2419 /* Set ISP-type information. */
2420 qla2x00_set_isp_flags(ha
);
2422 /* Set EEH reset type to fundamental if required by hba */
2423 if (IS_QLA24XX(ha
) || IS_QLA25XX(ha
) || IS_QLA81XX(ha
) ||
2425 pdev
->needs_freset
= 1;
2427 ha
->prev_topology
= 0;
2428 ha
->init_cb_size
= sizeof(init_cb_t
);
2429 ha
->link_data_rate
= PORT_SPEED_UNKNOWN
;
2430 ha
->optrom_size
= OPTROM_SIZE_2300
;
2431 ha
->cfg_lun_q_depth
= ql2xmaxqdepth
;
2433 /* Assign ISP specific operations. */
2434 if (IS_QLA2100(ha
)) {
2435 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2436 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2100
;
2437 req_length
= REQUEST_ENTRY_CNT_2100
;
2438 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2439 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2440 ha
->gid_list_info_size
= 4;
2441 ha
->flash_conf_off
= ~0;
2442 ha
->flash_data_off
= ~0;
2443 ha
->nvram_conf_off
= ~0;
2444 ha
->nvram_data_off
= ~0;
2445 ha
->isp_ops
= &qla2100_isp_ops
;
2446 } else if (IS_QLA2200(ha
)) {
2447 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2448 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2200
;
2449 req_length
= REQUEST_ENTRY_CNT_2200
;
2450 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2451 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2452 ha
->gid_list_info_size
= 4;
2453 ha
->flash_conf_off
= ~0;
2454 ha
->flash_data_off
= ~0;
2455 ha
->nvram_conf_off
= ~0;
2456 ha
->nvram_data_off
= ~0;
2457 ha
->isp_ops
= &qla2100_isp_ops
;
2458 } else if (IS_QLA23XX(ha
)) {
2459 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2460 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2461 req_length
= REQUEST_ENTRY_CNT_2200
;
2462 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2463 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2464 ha
->gid_list_info_size
= 6;
2465 if (IS_QLA2322(ha
) || IS_QLA6322(ha
))
2466 ha
->optrom_size
= OPTROM_SIZE_2322
;
2467 ha
->flash_conf_off
= ~0;
2468 ha
->flash_data_off
= ~0;
2469 ha
->nvram_conf_off
= ~0;
2470 ha
->nvram_data_off
= ~0;
2471 ha
->isp_ops
= &qla2300_isp_ops
;
2472 } else if (IS_QLA24XX_TYPE(ha
)) {
2473 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2474 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2475 req_length
= REQUEST_ENTRY_CNT_24XX
;
2476 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2477 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2478 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2479 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2480 ha
->gid_list_info_size
= 8;
2481 ha
->optrom_size
= OPTROM_SIZE_24XX
;
2482 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA24XX
;
2483 ha
->isp_ops
= &qla24xx_isp_ops
;
2484 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2485 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2486 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2487 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2488 } else if (IS_QLA25XX(ha
)) {
2489 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2490 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2491 req_length
= REQUEST_ENTRY_CNT_24XX
;
2492 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2493 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2494 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2495 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2496 ha
->gid_list_info_size
= 8;
2497 ha
->optrom_size
= OPTROM_SIZE_25XX
;
2498 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2499 ha
->isp_ops
= &qla25xx_isp_ops
;
2500 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2501 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2502 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2503 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2504 } else if (IS_QLA81XX(ha
)) {
2505 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2506 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2507 req_length
= REQUEST_ENTRY_CNT_24XX
;
2508 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2509 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2510 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2511 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2512 ha
->gid_list_info_size
= 8;
2513 ha
->optrom_size
= OPTROM_SIZE_81XX
;
2514 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2515 ha
->isp_ops
= &qla81xx_isp_ops
;
2516 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2517 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2518 ha
->nvram_conf_off
= ~0;
2519 ha
->nvram_data_off
= ~0;
2520 } else if (IS_QLA82XX(ha
)) {
2521 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2522 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2523 req_length
= REQUEST_ENTRY_CNT_82XX
;
2524 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2525 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2526 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2527 ha
->gid_list_info_size
= 8;
2528 ha
->optrom_size
= OPTROM_SIZE_82XX
;
2529 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2530 ha
->isp_ops
= &qla82xx_isp_ops
;
2531 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2532 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2533 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2534 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2535 } else if (IS_QLA8044(ha
)) {
2536 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2537 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2538 req_length
= REQUEST_ENTRY_CNT_82XX
;
2539 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2540 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2541 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2542 ha
->gid_list_info_size
= 8;
2543 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2544 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2545 ha
->isp_ops
= &qla8044_isp_ops
;
2546 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2547 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2548 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2549 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2550 } else if (IS_QLA83XX(ha
)) {
2551 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2552 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2553 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2554 req_length
= REQUEST_ENTRY_CNT_24XX
;
2555 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2556 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2557 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2558 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2559 ha
->gid_list_info_size
= 8;
2560 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2561 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2562 ha
->isp_ops
= &qla83xx_isp_ops
;
2563 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2564 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2565 ha
->nvram_conf_off
= ~0;
2566 ha
->nvram_data_off
= ~0;
2567 } else if (IS_QLAFX00(ha
)) {
2568 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_FX00
;
2569 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_FX00
;
2570 ha
->aen_mbx_count
= AEN_MAILBOX_REGISTER_COUNT_FX00
;
2571 req_length
= REQUEST_ENTRY_CNT_FX00
;
2572 rsp_length
= RESPONSE_ENTRY_CNT_FX00
;
2573 ha
->init_cb_size
= sizeof(struct init_cb_fx
);
2574 ha
->isp_ops
= &qlafx00_isp_ops
;
2575 ha
->port_down_retry_count
= 30; /* default value */
2576 ha
->mr
.fw_hbt_cnt
= QLAFX00_HEARTBEAT_INTERVAL
;
2577 ha
->mr
.fw_reset_timer_tick
= QLAFX00_RESET_INTERVAL
;
2578 ha
->mr
.fw_critemp_timer_tick
= QLAFX00_CRITEMP_INTERVAL
;
2579 ha
->mr
.fw_hbt_en
= 1;
2582 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001e,
2583 "mbx_count=%d, req_length=%d, "
2584 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2585 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2586 "max_fibre_devices=%d.\n",
2587 ha
->mbx_count
, req_length
, rsp_length
, ha
->max_loop_id
,
2588 ha
->init_cb_size
, ha
->gid_list_info_size
, ha
->optrom_size
,
2589 ha
->nvram_npiv_size
, ha
->max_fibre_devices
);
2590 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001f,
2591 "isp_ops=%p, flash_conf_off=%d, "
2592 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2593 ha
->isp_ops
, ha
->flash_conf_off
, ha
->flash_data_off
,
2594 ha
->nvram_conf_off
, ha
->nvram_data_off
);
2596 /* Configure PCI I/O space */
2597 ret
= ha
->isp_ops
->iospace_config(ha
);
2599 goto iospace_config_failed
;
2601 ql_log_pci(ql_log_info
, pdev
, 0x001d,
2602 "Found an ISP%04X irq %d iobase 0x%p.\n",
2603 pdev
->device
, pdev
->irq
, ha
->iobase
);
2604 mutex_init(&ha
->vport_lock
);
2605 init_completion(&ha
->mbx_cmd_comp
);
2606 complete(&ha
->mbx_cmd_comp
);
2607 init_completion(&ha
->mbx_intr_comp
);
2608 init_completion(&ha
->dcbx_comp
);
2609 init_completion(&ha
->lb_portup_comp
);
2611 set_bit(0, (unsigned long *) ha
->vp_idx_map
);
2613 qla2x00_config_dma_addressing(ha
);
2614 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0020,
2615 "64 Bit addressing is %s.\n",
2616 ha
->flags
.enable_64bit_addressing
? "enable" :
2618 ret
= qla2x00_mem_alloc(ha
, req_length
, rsp_length
, &req
, &rsp
);
2620 ql_log_pci(ql_log_fatal
, pdev
, 0x0031,
2621 "Failed to allocate memory for adapter, aborting.\n");
2623 goto probe_hw_failed
;
2626 req
->max_q_depth
= MAX_Q_DEPTH
;
2627 if (ql2xmaxqdepth
!= 0 && ql2xmaxqdepth
<= 0xffffU
)
2628 req
->max_q_depth
= ql2xmaxqdepth
;
2631 base_vha
= qla2x00_create_host(sht
, ha
);
2634 qla2x00_mem_free(ha
);
2635 qla2x00_free_req_que(ha
, req
);
2636 qla2x00_free_rsp_que(ha
, rsp
);
2637 goto probe_hw_failed
;
2640 pci_set_drvdata(pdev
, base_vha
);
2642 host
= base_vha
->host
;
2643 base_vha
->req
= req
;
2645 host
->can_queue
= 1024;
2647 host
->can_queue
= req
->length
+ 128;
2648 if (IS_QLA2XXX_MIDTYPE(ha
))
2649 base_vha
->mgmt_svr_loop_id
= 10 + base_vha
->vp_idx
;
2651 base_vha
->mgmt_svr_loop_id
= MANAGEMENT_SERVER
+
2654 /* Setup fcport template structure. */
2655 ha
->mr
.fcport
.vha
= base_vha
;
2656 ha
->mr
.fcport
.port_type
= FCT_UNKNOWN
;
2657 ha
->mr
.fcport
.loop_id
= FC_NO_LOOP_ID
;
2658 qla2x00_set_fcport_state(&ha
->mr
.fcport
, FCS_UNCONFIGURED
);
2659 ha
->mr
.fcport
.supported_classes
= FC_COS_UNSPECIFIED
;
2660 ha
->mr
.fcport
.scan_state
= 1;
2662 /* Set the SG table size based on ISP type */
2663 if (!IS_FWI2_CAPABLE(ha
)) {
2665 host
->sg_tablesize
= 32;
2667 if (!IS_QLA82XX(ha
))
2668 host
->sg_tablesize
= QLA_SG_ALL
;
2670 ql_dbg(ql_dbg_init
, base_vha
, 0x0032,
2671 "can_queue=%d, req=%p, "
2672 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2673 host
->can_queue
, base_vha
->req
,
2674 base_vha
->mgmt_svr_loop_id
, host
->sg_tablesize
);
2675 host
->max_id
= ha
->max_fibre_devices
;
2676 host
->cmd_per_lun
= 3;
2677 host
->unique_id
= host
->host_no
;
2678 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
)
2679 host
->max_cmd_len
= 32;
2681 host
->max_cmd_len
= MAX_CMDSZ
;
2682 host
->max_channel
= MAX_BUSES
- 1;
2683 host
->max_lun
= ql2xmaxlun
;
2684 host
->transportt
= qla2xxx_transport_template
;
2685 sht
->vendor_id
= (SCSI_NL_VID_TYPE_PCI
| PCI_VENDOR_ID_QLOGIC
);
2687 ql_dbg(ql_dbg_init
, base_vha
, 0x0033,
2688 "max_id=%d this_id=%d "
2689 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2690 "max_lun=%d transportt=%p, vendor_id=%llu.\n", host
->max_id
,
2691 host
->this_id
, host
->cmd_per_lun
, host
->unique_id
,
2692 host
->max_cmd_len
, host
->max_channel
, host
->max_lun
,
2693 host
->transportt
, sht
->vendor_id
);
2696 /* Alloc arrays of request and response ring ptrs */
2697 if (!qla2x00_alloc_queues(ha
, req
, rsp
)) {
2698 ql_log(ql_log_fatal
, base_vha
, 0x003d,
2699 "Failed to allocate memory for queue pointers..."
2701 goto probe_init_failed
;
2704 qlt_probe_one_stage1(base_vha
, ha
);
2706 /* Set up the irqs */
2707 ret
= qla2x00_request_irqs(ha
, rsp
);
2709 goto probe_init_failed
;
2711 pci_save_state(pdev
);
2713 /* Assign back pointers */
2717 if (IS_QLAFX00(ha
)) {
2718 ha
->rsp_q_map
[0] = rsp
;
2719 ha
->req_q_map
[0] = req
;
2720 set_bit(0, ha
->req_qid_map
);
2721 set_bit(0, ha
->rsp_qid_map
);
2724 /* FWI2-capable only. */
2725 req
->req_q_in
= &ha
->iobase
->isp24
.req_q_in
;
2726 req
->req_q_out
= &ha
->iobase
->isp24
.req_q_out
;
2727 rsp
->rsp_q_in
= &ha
->iobase
->isp24
.rsp_q_in
;
2728 rsp
->rsp_q_out
= &ha
->iobase
->isp24
.rsp_q_out
;
2729 if (ha
->mqenable
|| IS_QLA83XX(ha
)) {
2730 req
->req_q_in
= &ha
->mqiobase
->isp25mq
.req_q_in
;
2731 req
->req_q_out
= &ha
->mqiobase
->isp25mq
.req_q_out
;
2732 rsp
->rsp_q_in
= &ha
->mqiobase
->isp25mq
.rsp_q_in
;
2733 rsp
->rsp_q_out
= &ha
->mqiobase
->isp25mq
.rsp_q_out
;
2736 if (IS_QLAFX00(ha
)) {
2737 req
->req_q_in
= &ha
->iobase
->ispfx00
.req_q_in
;
2738 req
->req_q_out
= &ha
->iobase
->ispfx00
.req_q_out
;
2739 rsp
->rsp_q_in
= &ha
->iobase
->ispfx00
.rsp_q_in
;
2740 rsp
->rsp_q_out
= &ha
->iobase
->ispfx00
.rsp_q_out
;
2743 if (IS_P3P_TYPE(ha
)) {
2744 req
->req_q_out
= &ha
->iobase
->isp82
.req_q_out
[0];
2745 rsp
->rsp_q_in
= &ha
->iobase
->isp82
.rsp_q_in
[0];
2746 rsp
->rsp_q_out
= &ha
->iobase
->isp82
.rsp_q_out
[0];
2749 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc009,
2750 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2751 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2752 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc00a,
2753 "req->req_q_in=%p req->req_q_out=%p "
2754 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2755 req
->req_q_in
, req
->req_q_out
,
2756 rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2757 ql_dbg(ql_dbg_init
, base_vha
, 0x003e,
2758 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2759 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2760 ql_dbg(ql_dbg_init
, base_vha
, 0x003f,
2761 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2762 req
->req_q_in
, req
->req_q_out
, rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2764 if (ha
->isp_ops
->initialize_adapter(base_vha
)) {
2765 ql_log(ql_log_fatal
, base_vha
, 0x00d6,
2766 "Failed to initialize adapter - Adapter flags %x.\n",
2767 base_vha
->device_flags
);
2769 if (IS_QLA82XX(ha
)) {
2770 qla82xx_idc_lock(ha
);
2771 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
2772 QLA8XXX_DEV_FAILED
);
2773 qla82xx_idc_unlock(ha
);
2774 ql_log(ql_log_fatal
, base_vha
, 0x00d7,
2775 "HW State: FAILED.\n");
2776 } else if (IS_QLA8044(ha
)) {
2777 qla8044_idc_lock(ha
);
2778 qla8044_wr_direct(base_vha
,
2779 QLA8044_CRB_DEV_STATE_INDEX
,
2780 QLA8XXX_DEV_FAILED
);
2781 qla8044_idc_unlock(ha
);
2782 ql_log(ql_log_fatal
, base_vha
, 0x0150,
2783 "HW State: FAILED.\n");
2791 if (qla25xx_setup_mode(base_vha
)) {
2792 ql_log(ql_log_warn
, base_vha
, 0x00ec,
2793 "Failed to create queues, falling back to single queue mode.\n");
2798 if (ha
->flags
.running_gold_fw
)
2802 * Startup the kernel thread for this host adapter
2804 ha
->dpc_thread
= kthread_create(qla2x00_do_dpc
, ha
,
2805 "%s_dpc", base_vha
->host_str
);
2806 if (IS_ERR(ha
->dpc_thread
)) {
2807 ql_log(ql_log_fatal
, base_vha
, 0x00ed,
2808 "Failed to start DPC thread.\n");
2809 ret
= PTR_ERR(ha
->dpc_thread
);
2812 ql_dbg(ql_dbg_init
, base_vha
, 0x00ee,
2813 "DPC thread started successfully.\n");
2816 * If we're not coming up in initiator mode, we might sit for
2817 * a while without waking up the dpc thread, which leads to a
2818 * stuck process warning. So just kick the dpc once here and
2819 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2821 qla2xxx_wake_dpc(base_vha
);
2823 if (IS_QLA8031(ha
) || IS_MCTP_CAPABLE(ha
)) {
2824 sprintf(wq_name
, "qla2xxx_%lu_dpc_lp_wq", base_vha
->host_no
);
2825 ha
->dpc_lp_wq
= create_singlethread_workqueue(wq_name
);
2826 INIT_WORK(&ha
->idc_aen
, qla83xx_service_idc_aen
);
2828 sprintf(wq_name
, "qla2xxx_%lu_dpc_hp_wq", base_vha
->host_no
);
2829 ha
->dpc_hp_wq
= create_singlethread_workqueue(wq_name
);
2830 INIT_WORK(&ha
->nic_core_reset
, qla83xx_nic_core_reset_work
);
2831 INIT_WORK(&ha
->idc_state_handler
,
2832 qla83xx_idc_state_handler_work
);
2833 INIT_WORK(&ha
->nic_core_unrecoverable
,
2834 qla83xx_nic_core_unrecoverable_work
);
2838 list_add_tail(&base_vha
->list
, &ha
->vp_list
);
2839 base_vha
->host
->irq
= ha
->pdev
->irq
;
2841 /* Initialized the timer */
2842 qla2x00_start_timer(base_vha
, qla2x00_timer
, WATCH_INTERVAL
);
2843 ql_dbg(ql_dbg_init
, base_vha
, 0x00ef,
2844 "Started qla2x00_timer with "
2845 "interval=%d.\n", WATCH_INTERVAL
);
2846 ql_dbg(ql_dbg_init
, base_vha
, 0x00f0,
2847 "Detected hba at address=%p.\n",
2850 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
) {
2851 if (ha
->fw_attributes
& BIT_4
) {
2852 int prot
= 0, guard
;
2853 base_vha
->flags
.difdix_supported
= 1;
2854 ql_dbg(ql_dbg_init
, base_vha
, 0x00f1,
2855 "Registering for DIF/DIX type 1 and 3 protection.\n");
2856 if (ql2xenabledif
== 1)
2857 prot
= SHOST_DIX_TYPE0_PROTECTION
;
2858 scsi_host_set_prot(host
,
2859 prot
| SHOST_DIF_TYPE1_PROTECTION
2860 | SHOST_DIF_TYPE2_PROTECTION
2861 | SHOST_DIF_TYPE3_PROTECTION
2862 | SHOST_DIX_TYPE1_PROTECTION
2863 | SHOST_DIX_TYPE2_PROTECTION
2864 | SHOST_DIX_TYPE3_PROTECTION
);
2866 guard
= SHOST_DIX_GUARD_CRC
;
2868 if (IS_PI_IPGUARD_CAPABLE(ha
) &&
2869 (ql2xenabledif
> 1 || IS_PI_DIFB_DIX0_CAPABLE(ha
)))
2870 guard
|= SHOST_DIX_GUARD_IP
;
2872 scsi_host_set_guard(host
, guard
);
2874 base_vha
->flags
.difdix_supported
= 0;
2877 ha
->isp_ops
->enable_intrs(ha
);
2879 if (IS_QLAFX00(ha
)) {
2880 ret
= qlafx00_fx_disc(base_vha
,
2881 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_CONFIG_INFO
);
2882 host
->sg_tablesize
= (ha
->mr
.extended_io_enabled
) ?
2886 ret
= scsi_add_host(host
, &pdev
->dev
);
2890 base_vha
->flags
.init_done
= 1;
2891 base_vha
->flags
.online
= 1;
2893 ql_dbg(ql_dbg_init
, base_vha
, 0x00f2,
2894 "Init done and hba is online.\n");
2896 if (qla_ini_mode_enabled(base_vha
))
2897 scsi_scan_host(host
);
2899 ql_dbg(ql_dbg_init
, base_vha
, 0x0122,
2900 "skipping scsi_scan_host() for non-initiator port\n");
2902 qla2x00_alloc_sysfs_attr(base_vha
);
2904 if (IS_QLAFX00(ha
)) {
2905 ret
= qlafx00_fx_disc(base_vha
,
2906 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_PORT_INFO
);
2908 /* Register system information */
2909 ret
= qlafx00_fx_disc(base_vha
,
2910 &base_vha
->hw
->mr
.fcport
, FXDISC_REG_HOST_INFO
);
2913 qla2x00_init_host_attr(base_vha
);
2915 qla2x00_dfs_setup(base_vha
);
2917 ql_log(ql_log_info
, base_vha
, 0x00fb,
2918 "QLogic %s - %s.\n", ha
->model_number
, ha
->model_desc
);
2919 ql_log(ql_log_info
, base_vha
, 0x00fc,
2920 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2921 pdev
->device
, ha
->isp_ops
->pci_info_str(base_vha
, pci_info
),
2922 pci_name(pdev
), ha
->flags
.enable_64bit_addressing
? '+' : '-',
2924 ha
->isp_ops
->fw_version_str(base_vha
, fw_str
));
2926 qlt_add_target(ha
, base_vha
);
2931 qla2x00_free_req_que(ha
, req
);
2932 ha
->req_q_map
[0] = NULL
;
2933 clear_bit(0, ha
->req_qid_map
);
2934 qla2x00_free_rsp_que(ha
, rsp
);
2935 ha
->rsp_q_map
[0] = NULL
;
2936 clear_bit(0, ha
->rsp_qid_map
);
2937 ha
->max_req_queues
= ha
->max_rsp_queues
= 0;
2940 if (base_vha
->timer_active
)
2941 qla2x00_stop_timer(base_vha
);
2942 base_vha
->flags
.online
= 0;
2943 if (ha
->dpc_thread
) {
2944 struct task_struct
*t
= ha
->dpc_thread
;
2946 ha
->dpc_thread
= NULL
;
2950 qla2x00_free_device(base_vha
);
2952 scsi_host_put(base_vha
->host
);
2955 if (IS_QLA82XX(ha
)) {
2956 qla82xx_idc_lock(ha
);
2957 qla82xx_clear_drv_active(ha
);
2958 qla82xx_idc_unlock(ha
);
2960 if (IS_QLA8044(ha
)) {
2961 qla8044_idc_lock(ha
);
2962 qla8044_clear_drv_active(base_vha
);
2963 qla8044_idc_unlock(ha
);
2965 iospace_config_failed
:
2966 if (IS_P3P_TYPE(ha
)) {
2967 if (!ha
->nx_pcibase
)
2968 iounmap((device_reg_t __iomem
*)ha
->nx_pcibase
);
2970 iounmap((device_reg_t __iomem
*)ha
->nxdb_wr_ptr
);
2973 iounmap(ha
->iobase
);
2975 iounmap(ha
->cregbase
);
2977 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
2982 pci_disable_device(pdev
);
2987 qla2x00_stop_dpc_thread(scsi_qla_host_t
*vha
)
2989 struct qla_hw_data
*ha
= vha
->hw
;
2990 struct task_struct
*t
= ha
->dpc_thread
;
2992 if (ha
->dpc_thread
== NULL
)
2995 * qla2xxx_wake_dpc checks for ->dpc_thread
2996 * so we need to zero it out.
2998 ha
->dpc_thread
= NULL
;
3003 qla2x00_shutdown(struct pci_dev
*pdev
)
3005 scsi_qla_host_t
*vha
;
3006 struct qla_hw_data
*ha
;
3008 if (!atomic_read(&pdev
->enable_cnt
))
3011 vha
= pci_get_drvdata(pdev
);
3014 /* Notify ISPFX00 firmware */
3016 qlafx00_driver_shutdown(vha
, 20);
3018 /* Turn-off FCE trace */
3019 if (ha
->flags
.fce_enabled
) {
3020 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
3021 ha
->flags
.fce_enabled
= 0;
3024 /* Turn-off EFT trace */
3026 qla2x00_disable_eft_trace(vha
);
3028 /* Stop currently executing firmware. */
3029 qla2x00_try_to_stop_firmware(vha
);
3031 /* Turn adapter off line */
3032 vha
->flags
.online
= 0;
3034 /* turn-off interrupts on the card */
3035 if (ha
->interrupts_on
) {
3036 vha
->flags
.init_done
= 0;
3037 ha
->isp_ops
->disable_intrs(ha
);
3040 qla2x00_free_irqs(vha
);
3042 qla2x00_free_fw_dump(ha
);
3046 qla2x00_remove_one(struct pci_dev
*pdev
)
3048 scsi_qla_host_t
*base_vha
, *vha
;
3049 struct qla_hw_data
*ha
;
3050 unsigned long flags
;
3053 * If the PCI device is disabled that means that probe failed and any
3054 * resources should be have cleaned up on probe exit.
3056 if (!atomic_read(&pdev
->enable_cnt
))
3059 base_vha
= pci_get_drvdata(pdev
);
3062 ha
->flags
.host_shutting_down
= 1;
3064 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
3066 qlafx00_driver_shutdown(base_vha
, 20);
3068 mutex_lock(&ha
->vport_lock
);
3069 while (ha
->cur_vport_count
) {
3070 spin_lock_irqsave(&ha
->vport_slock
, flags
);
3072 BUG_ON(base_vha
->list
.next
== &ha
->vp_list
);
3073 /* This assumes first entry in ha->vp_list is always base vha */
3074 vha
= list_first_entry(&base_vha
->list
, scsi_qla_host_t
, list
);
3075 scsi_host_get(vha
->host
);
3077 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
3078 mutex_unlock(&ha
->vport_lock
);
3080 fc_vport_terminate(vha
->fc_vport
);
3081 scsi_host_put(vha
->host
);
3083 mutex_lock(&ha
->vport_lock
);
3085 mutex_unlock(&ha
->vport_lock
);
3087 if (IS_QLA8031(ha
)) {
3088 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07e,
3089 "Clearing fcoe driver presence.\n");
3090 if (qla83xx_clear_drv_presence(base_vha
) != QLA_SUCCESS
)
3091 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb079,
3092 "Error while clearing DRV-Presence.\n");
3095 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
3097 qla2x00_dfs_remove(base_vha
);
3099 qla84xx_put_chip(base_vha
);
3102 if (base_vha
->timer_active
)
3103 qla2x00_stop_timer(base_vha
);
3105 base_vha
->flags
.online
= 0;
3107 /* Flush the work queue and remove it */
3109 flush_workqueue(ha
->wq
);
3110 destroy_workqueue(ha
->wq
);
3114 /* Cancel all work and destroy DPC workqueues */
3115 if (ha
->dpc_lp_wq
) {
3116 cancel_work_sync(&ha
->idc_aen
);
3117 destroy_workqueue(ha
->dpc_lp_wq
);
3118 ha
->dpc_lp_wq
= NULL
;
3121 if (ha
->dpc_hp_wq
) {
3122 cancel_work_sync(&ha
->nic_core_reset
);
3123 cancel_work_sync(&ha
->idc_state_handler
);
3124 cancel_work_sync(&ha
->nic_core_unrecoverable
);
3125 destroy_workqueue(ha
->dpc_hp_wq
);
3126 ha
->dpc_hp_wq
= NULL
;
3129 /* Kill the kernel thread for this host */
3130 if (ha
->dpc_thread
) {
3131 struct task_struct
*t
= ha
->dpc_thread
;
3134 * qla2xxx_wake_dpc checks for ->dpc_thread
3135 * so we need to zero it out.
3137 ha
->dpc_thread
= NULL
;
3140 qlt_remove_target(ha
, base_vha
);
3142 qla2x00_free_sysfs_attr(base_vha
);
3144 fc_remove_host(base_vha
->host
);
3146 scsi_remove_host(base_vha
->host
);
3148 qla2x00_free_device(base_vha
);
3150 scsi_host_put(base_vha
->host
);
3152 if (IS_QLA8044(ha
)) {
3153 qla8044_idc_lock(ha
);
3154 qla8044_clear_drv_active(base_vha
);
3155 qla8044_idc_unlock(ha
);
3157 if (IS_QLA82XX(ha
)) {
3158 qla82xx_idc_lock(ha
);
3159 qla82xx_clear_drv_active(ha
);
3160 qla82xx_idc_unlock(ha
);
3162 iounmap((device_reg_t __iomem
*)ha
->nx_pcibase
);
3164 iounmap((device_reg_t __iomem
*)ha
->nxdb_wr_ptr
);
3167 iounmap(ha
->iobase
);
3170 iounmap(ha
->cregbase
);
3173 iounmap(ha
->mqiobase
);
3175 if (IS_QLA83XX(ha
) && ha
->msixbase
)
3176 iounmap(ha
->msixbase
);
3179 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
3183 pci_disable_pcie_error_reporting(pdev
);
3185 pci_disable_device(pdev
);
3189 qla2x00_free_device(scsi_qla_host_t
*vha
)
3191 struct qla_hw_data
*ha
= vha
->hw
;
3193 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
3196 if (vha
->timer_active
)
3197 qla2x00_stop_timer(vha
);
3199 qla2x00_stop_dpc_thread(vha
);
3201 qla25xx_delete_queues(vha
);
3202 if (ha
->flags
.fce_enabled
)
3203 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
3206 qla2x00_disable_eft_trace(vha
);
3208 /* Stop currently executing firmware. */
3209 qla2x00_try_to_stop_firmware(vha
);
3211 vha
->flags
.online
= 0;
3213 /* turn-off interrupts on the card */
3214 if (ha
->interrupts_on
) {
3215 vha
->flags
.init_done
= 0;
3216 ha
->isp_ops
->disable_intrs(ha
);
3219 qla2x00_free_irqs(vha
);
3221 qla2x00_free_fcports(vha
);
3223 qla2x00_mem_free(ha
);
3225 qla82xx_md_free(vha
);
3227 qla2x00_free_queues(ha
);
3230 void qla2x00_free_fcports(struct scsi_qla_host
*vha
)
3232 fc_port_t
*fcport
, *tfcport
;
3234 list_for_each_entry_safe(fcport
, tfcport
, &vha
->vp_fcports
, list
) {
3235 list_del(&fcport
->list
);
3236 qla2x00_clear_loop_id(fcport
);
3243 qla2x00_schedule_rport_del(struct scsi_qla_host
*vha
, fc_port_t
*fcport
,
3246 struct fc_rport
*rport
;
3247 scsi_qla_host_t
*base_vha
;
3248 unsigned long flags
;
3253 rport
= fcport
->rport
;
3255 base_vha
= pci_get_drvdata(vha
->hw
->pdev
);
3256 spin_lock_irqsave(vha
->host
->host_lock
, flags
);
3257 fcport
->drport
= rport
;
3258 spin_unlock_irqrestore(vha
->host
->host_lock
, flags
);
3259 set_bit(FCPORT_UPDATE_NEEDED
, &base_vha
->dpc_flags
);
3260 qla2xxx_wake_dpc(base_vha
);
3262 fc_remote_port_delete(rport
);
3263 qlt_fc_port_deleted(vha
, fcport
);
3268 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3270 * Input: ha = adapter block pointer. fcport = port structure pointer.
3276 void qla2x00_mark_device_lost(scsi_qla_host_t
*vha
, fc_port_t
*fcport
,
3277 int do_login
, int defer
)
3279 if (IS_QLAFX00(vha
->hw
)) {
3280 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3281 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3285 if (atomic_read(&fcport
->state
) == FCS_ONLINE
&&
3286 vha
->vp_idx
== fcport
->vha
->vp_idx
) {
3287 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3288 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3291 * We may need to retry the login, so don't change the state of the
3292 * port but do the retries.
3294 if (atomic_read(&fcport
->state
) != FCS_DEVICE_DEAD
)
3295 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3300 if (fcport
->login_retry
== 0) {
3301 fcport
->login_retry
= vha
->hw
->login_retry_count
;
3302 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
3304 ql_dbg(ql_dbg_disc
, vha
, 0x2067,
3305 "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3306 fcport
->port_name
, fcport
->loop_id
, fcport
->login_retry
);
3311 * qla2x00_mark_all_devices_lost
3312 * Updates fcport state when device goes offline.
3315 * ha = adapter block pointer.
3316 * fcport = port structure pointer.
3324 qla2x00_mark_all_devices_lost(scsi_qla_host_t
*vha
, int defer
)
3328 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3329 if (vha
->vp_idx
!= 0 && vha
->vp_idx
!= fcport
->vha
->vp_idx
)
3333 * No point in marking the device as lost, if the device is
3336 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
)
3338 if (atomic_read(&fcport
->state
) == FCS_ONLINE
) {
3339 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3341 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3342 else if (vha
->vp_idx
== fcport
->vha
->vp_idx
)
3343 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3350 * Allocates adapter memory.
3357 qla2x00_mem_alloc(struct qla_hw_data
*ha
, uint16_t req_len
, uint16_t rsp_len
,
3358 struct req_que
**req
, struct rsp_que
**rsp
)
3362 ha
->init_cb
= dma_alloc_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3363 &ha
->init_cb_dma
, GFP_KERNEL
);
3367 if (qlt_mem_alloc(ha
) < 0)
3368 goto fail_free_init_cb
;
3370 ha
->gid_list
= dma_alloc_coherent(&ha
->pdev
->dev
,
3371 qla2x00_gid_list_size(ha
), &ha
->gid_list_dma
, GFP_KERNEL
);
3373 goto fail_free_tgt_mem
;
3375 ha
->srb_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
, srb_cachep
);
3376 if (!ha
->srb_mempool
)
3377 goto fail_free_gid_list
;
3379 if (IS_P3P_TYPE(ha
)) {
3380 /* Allocate cache for CT6 Ctx. */
3382 ctx_cachep
= kmem_cache_create("qla2xxx_ctx",
3383 sizeof(struct ct6_dsd
), 0,
3384 SLAB_HWCACHE_ALIGN
, NULL
);
3386 goto fail_free_gid_list
;
3388 ha
->ctx_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
,
3390 if (!ha
->ctx_mempool
)
3391 goto fail_free_srb_mempool
;
3392 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0021,
3393 "ctx_cachep=%p ctx_mempool=%p.\n",
3394 ctx_cachep
, ha
->ctx_mempool
);
3397 /* Get memory for cached NVRAM */
3398 ha
->nvram
= kzalloc(MAX_NVRAM_SIZE
, GFP_KERNEL
);
3400 goto fail_free_ctx_mempool
;
3402 snprintf(name
, sizeof(name
), "%s_%d", QLA2XXX_DRIVER_NAME
,
3404 ha
->s_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3405 DMA_POOL_SIZE
, 8, 0);
3406 if (!ha
->s_dma_pool
)
3407 goto fail_free_nvram
;
3409 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0022,
3410 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3411 ha
->init_cb
, ha
->gid_list
, ha
->srb_mempool
, ha
->s_dma_pool
);
3413 if (IS_P3P_TYPE(ha
) || ql2xenabledif
) {
3414 ha
->dl_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3415 DSD_LIST_DMA_POOL_SIZE
, 8, 0);
3416 if (!ha
->dl_dma_pool
) {
3417 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0023,
3418 "Failed to allocate memory for dl_dma_pool.\n");
3419 goto fail_s_dma_pool
;
3422 ha
->fcp_cmnd_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3423 FCP_CMND_DMA_POOL_SIZE
, 8, 0);
3424 if (!ha
->fcp_cmnd_dma_pool
) {
3425 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0024,
3426 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3427 goto fail_dl_dma_pool
;
3429 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0025,
3430 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3431 ha
->dl_dma_pool
, ha
->fcp_cmnd_dma_pool
);
3434 /* Allocate memory for SNS commands */
3435 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)) {
3436 /* Get consistent memory allocated for SNS commands */
3437 ha
->sns_cmd
= dma_alloc_coherent(&ha
->pdev
->dev
,
3438 sizeof(struct sns_cmd_pkt
), &ha
->sns_cmd_dma
, GFP_KERNEL
);
3441 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0026,
3442 "sns_cmd: %p.\n", ha
->sns_cmd
);
3444 /* Get consistent memory allocated for MS IOCB */
3445 ha
->ms_iocb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3449 /* Get consistent memory allocated for CT SNS commands */
3450 ha
->ct_sns
= dma_alloc_coherent(&ha
->pdev
->dev
,
3451 sizeof(struct ct_sns_pkt
), &ha
->ct_sns_dma
, GFP_KERNEL
);
3453 goto fail_free_ms_iocb
;
3454 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0027,
3455 "ms_iocb=%p ct_sns=%p.\n",
3456 ha
->ms_iocb
, ha
->ct_sns
);
3459 /* Allocate memory for request ring */
3460 *req
= kzalloc(sizeof(struct req_que
), GFP_KERNEL
);
3462 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0028,
3463 "Failed to allocate memory for req.\n");
3466 (*req
)->length
= req_len
;
3467 (*req
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3468 ((*req
)->length
+ 1) * sizeof(request_t
),
3469 &(*req
)->dma
, GFP_KERNEL
);
3470 if (!(*req
)->ring
) {
3471 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0029,
3472 "Failed to allocate memory for req_ring.\n");
3475 /* Allocate memory for response ring */
3476 *rsp
= kzalloc(sizeof(struct rsp_que
), GFP_KERNEL
);
3478 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002a,
3479 "Failed to allocate memory for rsp.\n");
3483 (*rsp
)->length
= rsp_len
;
3484 (*rsp
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3485 ((*rsp
)->length
+ 1) * sizeof(response_t
),
3486 &(*rsp
)->dma
, GFP_KERNEL
);
3487 if (!(*rsp
)->ring
) {
3488 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002b,
3489 "Failed to allocate memory for rsp_ring.\n");
3494 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002c,
3495 "req=%p req->length=%d req->ring=%p rsp=%p "
3496 "rsp->length=%d rsp->ring=%p.\n",
3497 *req
, (*req
)->length
, (*req
)->ring
, *rsp
, (*rsp
)->length
,
3499 /* Allocate memory for NVRAM data for vports */
3500 if (ha
->nvram_npiv_size
) {
3501 ha
->npiv_info
= kzalloc(sizeof(struct qla_npiv_entry
) *
3502 ha
->nvram_npiv_size
, GFP_KERNEL
);
3503 if (!ha
->npiv_info
) {
3504 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002d,
3505 "Failed to allocate memory for npiv_info.\n");
3506 goto fail_npiv_info
;
3509 ha
->npiv_info
= NULL
;
3511 /* Get consistent memory allocated for EX-INIT-CB. */
3512 if (IS_CNA_CAPABLE(ha
) || IS_QLA2031(ha
)) {
3513 ha
->ex_init_cb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3514 &ha
->ex_init_cb_dma
);
3515 if (!ha
->ex_init_cb
)
3516 goto fail_ex_init_cb
;
3517 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002e,
3518 "ex_init_cb=%p.\n", ha
->ex_init_cb
);
3521 INIT_LIST_HEAD(&ha
->gbl_dsd_list
);
3523 /* Get consistent memory allocated for Async Port-Database. */
3524 if (!IS_FWI2_CAPABLE(ha
)) {
3525 ha
->async_pd
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3529 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002f,
3530 "async_pd=%p.\n", ha
->async_pd
);
3533 INIT_LIST_HEAD(&ha
->vp_list
);
3535 /* Allocate memory for our loop_id bitmap */
3536 ha
->loop_id_map
= kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE
) * sizeof(long),
3538 if (!ha
->loop_id_map
)
3541 qla2x00_set_reserved_loop_ids(ha
);
3542 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0123,
3543 "loop_id_map=%p. \n", ha
->loop_id_map
);
3549 dma_pool_free(ha
->s_dma_pool
, ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3551 kfree(ha
->npiv_info
);
3553 dma_free_coherent(&ha
->pdev
->dev
, ((*rsp
)->length
+ 1) *
3554 sizeof(response_t
), (*rsp
)->ring
, (*rsp
)->dma
);
3555 (*rsp
)->ring
= NULL
;
3560 dma_free_coherent(&ha
->pdev
->dev
, ((*req
)->length
+ 1) *
3561 sizeof(request_t
), (*req
)->ring
, (*req
)->dma
);
3562 (*req
)->ring
= NULL
;
3567 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3568 ha
->ct_sns
, ha
->ct_sns_dma
);
3572 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3574 ha
->ms_iocb_dma
= 0;
3576 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3577 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3578 ha
->fcp_cmnd_dma_pool
= NULL
;
3581 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3582 dma_pool_destroy(ha
->dl_dma_pool
);
3583 ha
->dl_dma_pool
= NULL
;
3586 dma_pool_destroy(ha
->s_dma_pool
);
3587 ha
->s_dma_pool
= NULL
;
3591 fail_free_ctx_mempool
:
3592 mempool_destroy(ha
->ctx_mempool
);
3593 ha
->ctx_mempool
= NULL
;
3594 fail_free_srb_mempool
:
3595 mempool_destroy(ha
->srb_mempool
);
3596 ha
->srb_mempool
= NULL
;
3598 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3601 ha
->gid_list
= NULL
;
3602 ha
->gid_list_dma
= 0;
3606 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
, ha
->init_cb
,
3609 ha
->init_cb_dma
= 0;
3611 ql_log(ql_log_fatal
, NULL
, 0x0030,
3612 "Memory allocation failure.\n");
3617 * qla2x00_free_fw_dump
3618 * Frees fw dump stuff.
3621 * ha = adapter block pointer
3624 qla2x00_free_fw_dump(struct qla_hw_data
*ha
)
3627 dma_free_coherent(&ha
->pdev
->dev
, FCE_SIZE
, ha
->fce
,
3632 dma_free_coherent(&ha
->pdev
->dev
,
3633 ntohl(ha
->fw_dump
->eft_size
), ha
->eft
, ha
->eft_dma
);
3642 ha
->fw_dump_reading
= 0;
3647 * Frees all adapter allocated memory.
3650 * ha = adapter block pointer.
3653 qla2x00_mem_free(struct qla_hw_data
*ha
)
3655 qla2x00_free_fw_dump(ha
);
3658 dma_free_coherent(&ha
->pdev
->dev
, MCTP_DUMP_SIZE
, ha
->mctp_dump
,
3661 if (ha
->srb_mempool
)
3662 mempool_destroy(ha
->srb_mempool
);
3665 dma_free_coherent(&ha
->pdev
->dev
, DCBX_TLV_DATA_SIZE
,
3666 ha
->dcbx_tlv
, ha
->dcbx_tlv_dma
);
3669 dma_free_coherent(&ha
->pdev
->dev
, XGMAC_DATA_SIZE
,
3670 ha
->xgmac_data
, ha
->xgmac_data_dma
);
3673 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
3674 ha
->sns_cmd
, ha
->sns_cmd_dma
);
3677 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3678 ha
->ct_sns
, ha
->ct_sns_dma
);
3681 dma_pool_free(ha
->s_dma_pool
, ha
->sfp_data
, ha
->sfp_data_dma
);
3684 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3687 dma_pool_free(ha
->s_dma_pool
,
3688 ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3691 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
3694 dma_pool_destroy(ha
->s_dma_pool
);
3697 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3698 ha
->gid_list
, ha
->gid_list_dma
);
3700 if (IS_QLA82XX(ha
)) {
3701 if (!list_empty(&ha
->gbl_dsd_list
)) {
3702 struct dsd_dma
*dsd_ptr
, *tdsd_ptr
;
3704 /* clean up allocated prev pool */
3705 list_for_each_entry_safe(dsd_ptr
,
3706 tdsd_ptr
, &ha
->gbl_dsd_list
, list
) {
3707 dma_pool_free(ha
->dl_dma_pool
,
3708 dsd_ptr
->dsd_addr
, dsd_ptr
->dsd_list_dma
);
3709 list_del(&dsd_ptr
->list
);
3715 if (ha
->dl_dma_pool
)
3716 dma_pool_destroy(ha
->dl_dma_pool
);
3718 if (ha
->fcp_cmnd_dma_pool
)
3719 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3721 if (ha
->ctx_mempool
)
3722 mempool_destroy(ha
->ctx_mempool
);
3727 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3728 ha
->init_cb
, ha
->init_cb_dma
);
3729 vfree(ha
->optrom_buffer
);
3731 kfree(ha
->npiv_info
);
3733 kfree(ha
->loop_id_map
);
3735 ha
->srb_mempool
= NULL
;
3736 ha
->ctx_mempool
= NULL
;
3738 ha
->sns_cmd_dma
= 0;
3742 ha
->ms_iocb_dma
= 0;
3744 ha
->init_cb_dma
= 0;
3745 ha
->ex_init_cb
= NULL
;
3746 ha
->ex_init_cb_dma
= 0;
3747 ha
->async_pd
= NULL
;
3748 ha
->async_pd_dma
= 0;
3750 ha
->s_dma_pool
= NULL
;
3751 ha
->dl_dma_pool
= NULL
;
3752 ha
->fcp_cmnd_dma_pool
= NULL
;
3754 ha
->gid_list
= NULL
;
3755 ha
->gid_list_dma
= 0;
3757 ha
->tgt
.atio_ring
= NULL
;
3758 ha
->tgt
.atio_dma
= 0;
3759 ha
->tgt
.tgt_vp_map
= NULL
;
3762 struct scsi_qla_host
*qla2x00_create_host(struct scsi_host_template
*sht
,
3763 struct qla_hw_data
*ha
)
3765 struct Scsi_Host
*host
;
3766 struct scsi_qla_host
*vha
= NULL
;
3768 host
= scsi_host_alloc(sht
, sizeof(scsi_qla_host_t
));
3770 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0107,
3771 "Failed to allocate host from the scsi layer, aborting.\n");
3775 /* Clear our data area */
3776 vha
= shost_priv(host
);
3777 memset(vha
, 0, sizeof(scsi_qla_host_t
));
3780 vha
->host_no
= host
->host_no
;
3783 INIT_LIST_HEAD(&vha
->vp_fcports
);
3784 INIT_LIST_HEAD(&vha
->work_list
);
3785 INIT_LIST_HEAD(&vha
->list
);
3787 spin_lock_init(&vha
->work_lock
);
3789 sprintf(vha
->host_str
, "%s_%ld", QLA2XXX_DRIVER_NAME
, vha
->host_no
);
3790 ql_dbg(ql_dbg_init
, vha
, 0x0041,
3791 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3792 vha
->host
, vha
->hw
, vha
,
3793 dev_name(&(ha
->pdev
->dev
)));
3801 static struct qla_work_evt
*
3802 qla2x00_alloc_work(struct scsi_qla_host
*vha
, enum qla_work_type type
)
3804 struct qla_work_evt
*e
;
3807 QLA_VHA_MARK_BUSY(vha
, bail
);
3811 e
= kzalloc(sizeof(struct qla_work_evt
), GFP_ATOMIC
);
3813 QLA_VHA_MARK_NOT_BUSY(vha
);
3817 INIT_LIST_HEAD(&e
->list
);
3819 e
->flags
= QLA_EVT_FLAG_FREE
;
3824 qla2x00_post_work(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
3826 unsigned long flags
;
3828 spin_lock_irqsave(&vha
->work_lock
, flags
);
3829 list_add_tail(&e
->list
, &vha
->work_list
);
3830 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3831 qla2xxx_wake_dpc(vha
);
3837 qla2x00_post_aen_work(struct scsi_qla_host
*vha
, enum fc_host_event_code code
,
3840 struct qla_work_evt
*e
;
3842 e
= qla2x00_alloc_work(vha
, QLA_EVT_AEN
);
3844 return QLA_FUNCTION_FAILED
;
3846 e
->u
.aen
.code
= code
;
3847 e
->u
.aen
.data
= data
;
3848 return qla2x00_post_work(vha
, e
);
3852 qla2x00_post_idc_ack_work(struct scsi_qla_host
*vha
, uint16_t *mb
)
3854 struct qla_work_evt
*e
;
3856 e
= qla2x00_alloc_work(vha
, QLA_EVT_IDC_ACK
);
3858 return QLA_FUNCTION_FAILED
;
3860 memcpy(e
->u
.idc_ack
.mb
, mb
, QLA_IDC_ACK_REGS
* sizeof(uint16_t));
3861 return qla2x00_post_work(vha
, e
);
3864 #define qla2x00_post_async_work(name, type) \
3865 int qla2x00_post_async_##name##_work( \
3866 struct scsi_qla_host *vha, \
3867 fc_port_t *fcport, uint16_t *data) \
3869 struct qla_work_evt *e; \
3871 e = qla2x00_alloc_work(vha, type); \
3873 return QLA_FUNCTION_FAILED; \
3875 e->u.logio.fcport = fcport; \
3877 e->u.logio.data[0] = data[0]; \
3878 e->u.logio.data[1] = data[1]; \
3880 return qla2x00_post_work(vha, e); \
3883 qla2x00_post_async_work(login
, QLA_EVT_ASYNC_LOGIN
);
3884 qla2x00_post_async_work(login_done
, QLA_EVT_ASYNC_LOGIN_DONE
);
3885 qla2x00_post_async_work(logout
, QLA_EVT_ASYNC_LOGOUT
);
3886 qla2x00_post_async_work(logout_done
, QLA_EVT_ASYNC_LOGOUT_DONE
);
3887 qla2x00_post_async_work(adisc
, QLA_EVT_ASYNC_ADISC
);
3888 qla2x00_post_async_work(adisc_done
, QLA_EVT_ASYNC_ADISC_DONE
);
3891 qla2x00_post_uevent_work(struct scsi_qla_host
*vha
, u32 code
)
3893 struct qla_work_evt
*e
;
3895 e
= qla2x00_alloc_work(vha
, QLA_EVT_UEVENT
);
3897 return QLA_FUNCTION_FAILED
;
3899 e
->u
.uevent
.code
= code
;
3900 return qla2x00_post_work(vha
, e
);
3904 qla2x00_uevent_emit(struct scsi_qla_host
*vha
, u32 code
)
3906 char event_string
[40];
3907 char *envp
[] = { event_string
, NULL
};
3910 case QLA_UEVENT_CODE_FW_DUMP
:
3911 snprintf(event_string
, sizeof(event_string
), "FW_DUMP=%ld",
3918 kobject_uevent_env(&vha
->hw
->pdev
->dev
.kobj
, KOBJ_CHANGE
, envp
);
3922 qlafx00_post_aenfx_work(struct scsi_qla_host
*vha
, uint32_t evtcode
,
3923 uint32_t *data
, int cnt
)
3925 struct qla_work_evt
*e
;
3927 e
= qla2x00_alloc_work(vha
, QLA_EVT_AENFX
);
3929 return QLA_FUNCTION_FAILED
;
3931 e
->u
.aenfx
.evtcode
= evtcode
;
3932 e
->u
.aenfx
.count
= cnt
;
3933 memcpy(e
->u
.aenfx
.mbx
, data
, sizeof(*data
) * cnt
);
3934 return qla2x00_post_work(vha
, e
);
3938 qla2x00_do_work(struct scsi_qla_host
*vha
)
3940 struct qla_work_evt
*e
, *tmp
;
3941 unsigned long flags
;
3944 spin_lock_irqsave(&vha
->work_lock
, flags
);
3945 list_splice_init(&vha
->work_list
, &work
);
3946 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3948 list_for_each_entry_safe(e
, tmp
, &work
, list
) {
3949 list_del_init(&e
->list
);
3953 fc_host_post_event(vha
->host
, fc_get_event_number(),
3954 e
->u
.aen
.code
, e
->u
.aen
.data
);
3956 case QLA_EVT_IDC_ACK
:
3957 qla81xx_idc_ack(vha
, e
->u
.idc_ack
.mb
);
3959 case QLA_EVT_ASYNC_LOGIN
:
3960 qla2x00_async_login(vha
, e
->u
.logio
.fcport
,
3963 case QLA_EVT_ASYNC_LOGIN_DONE
:
3964 qla2x00_async_login_done(vha
, e
->u
.logio
.fcport
,
3967 case QLA_EVT_ASYNC_LOGOUT
:
3968 qla2x00_async_logout(vha
, e
->u
.logio
.fcport
);
3970 case QLA_EVT_ASYNC_LOGOUT_DONE
:
3971 qla2x00_async_logout_done(vha
, e
->u
.logio
.fcport
,
3974 case QLA_EVT_ASYNC_ADISC
:
3975 qla2x00_async_adisc(vha
, e
->u
.logio
.fcport
,
3978 case QLA_EVT_ASYNC_ADISC_DONE
:
3979 qla2x00_async_adisc_done(vha
, e
->u
.logio
.fcport
,
3982 case QLA_EVT_UEVENT
:
3983 qla2x00_uevent_emit(vha
, e
->u
.uevent
.code
);
3986 qlafx00_process_aen(vha
, e
);
3989 if (e
->flags
& QLA_EVT_FLAG_FREE
)
3992 /* For each work completed decrement vha ref count */
3993 QLA_VHA_MARK_NOT_BUSY(vha
);
3997 /* Relogins all the fcports of a vport
3998 * Context: dpc thread
4000 void qla2x00_relogin(struct scsi_qla_host
*vha
)
4004 uint16_t next_loopid
= 0;
4005 struct qla_hw_data
*ha
= vha
->hw
;
4008 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
4010 * If the port is not ONLINE then try to login
4011 * to it if we haven't run out of retries.
4013 if (atomic_read(&fcport
->state
) != FCS_ONLINE
&&
4014 fcport
->login_retry
&& !(fcport
->flags
& FCF_ASYNC_SENT
)) {
4015 fcport
->login_retry
--;
4016 if (fcport
->flags
& FCF_FABRIC_DEVICE
) {
4017 if (fcport
->flags
& FCF_FCP2_DEVICE
)
4018 ha
->isp_ops
->fabric_logout(vha
,
4020 fcport
->d_id
.b
.domain
,
4021 fcport
->d_id
.b
.area
,
4022 fcport
->d_id
.b
.al_pa
);
4024 if (fcport
->loop_id
== FC_NO_LOOP_ID
) {
4025 fcport
->loop_id
= next_loopid
=
4026 ha
->min_external_loopid
;
4027 status
= qla2x00_find_new_loop_id(
4029 if (status
!= QLA_SUCCESS
) {
4030 /* Ran out of IDs to use */
4035 if (IS_ALOGIO_CAPABLE(ha
)) {
4036 fcport
->flags
|= FCF_ASYNC_SENT
;
4038 data
[1] = QLA_LOGIO_LOGIN_RETRIED
;
4039 status
= qla2x00_post_async_login_work(
4041 if (status
== QLA_SUCCESS
)
4043 /* Attempt a retry. */
4046 status
= qla2x00_fabric_login(vha
,
4047 fcport
, &next_loopid
);
4048 if (status
== QLA_SUCCESS
) {
4057 qla2x00_get_port_database(
4059 if (status2
!= QLA_SUCCESS
)
4064 status
= qla2x00_local_device_login(vha
,
4067 if (status
== QLA_SUCCESS
) {
4068 fcport
->old_loop_id
= fcport
->loop_id
;
4070 ql_dbg(ql_dbg_disc
, vha
, 0x2003,
4071 "Port login OK: logged in ID 0x%x.\n",
4074 qla2x00_update_fcport(vha
, fcport
);
4076 } else if (status
== 1) {
4077 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
4078 /* retry the login again */
4079 ql_dbg(ql_dbg_disc
, vha
, 0x2007,
4080 "Retrying %d login again loop_id 0x%x.\n",
4081 fcport
->login_retry
, fcport
->loop_id
);
4083 fcport
->login_retry
= 0;
4086 if (fcport
->login_retry
== 0 && status
!= QLA_SUCCESS
)
4087 qla2x00_clear_loop_id(fcport
);
4089 if (test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
))
4094 /* Schedule work on any of the dpc-workqueues */
4096 qla83xx_schedule_work(scsi_qla_host_t
*base_vha
, int work_code
)
4098 struct qla_hw_data
*ha
= base_vha
->hw
;
4100 switch (work_code
) {
4101 case MBA_IDC_AEN
: /* 0x8200 */
4103 queue_work(ha
->dpc_lp_wq
, &ha
->idc_aen
);
4106 case QLA83XX_NIC_CORE_RESET
: /* 0x1 */
4107 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
4109 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_reset
);
4111 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb05e,
4112 "NIC Core reset is already active. Skip "
4113 "scheduling it again.\n");
4115 case QLA83XX_IDC_STATE_HANDLER
: /* 0x2 */
4117 queue_work(ha
->dpc_hp_wq
, &ha
->idc_state_handler
);
4119 case QLA83XX_NIC_CORE_UNRECOVERABLE
: /* 0x3 */
4121 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_unrecoverable
);
4124 ql_log(ql_log_warn
, base_vha
, 0xb05f,
4125 "Unknow work-code=0x%x.\n", work_code
);
4131 /* Work: Perform NIC Core Unrecoverable state handling */
4133 qla83xx_nic_core_unrecoverable_work(struct work_struct
*work
)
4135 struct qla_hw_data
*ha
=
4136 container_of(work
, struct qla_hw_data
, nic_core_unrecoverable
);
4137 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4138 uint32_t dev_state
= 0;
4140 qla83xx_idc_lock(base_vha
, 0);
4141 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4142 qla83xx_reset_ownership(base_vha
);
4143 if (ha
->flags
.nic_core_reset_owner
) {
4144 ha
->flags
.nic_core_reset_owner
= 0;
4145 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4146 QLA8XXX_DEV_FAILED
);
4147 ql_log(ql_log_info
, base_vha
, 0xb060, "HW State: FAILED.\n");
4148 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
4150 qla83xx_idc_unlock(base_vha
, 0);
4153 /* Work: Execute IDC state handler */
4155 qla83xx_idc_state_handler_work(struct work_struct
*work
)
4157 struct qla_hw_data
*ha
=
4158 container_of(work
, struct qla_hw_data
, idc_state_handler
);
4159 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4160 uint32_t dev_state
= 0;
4162 qla83xx_idc_lock(base_vha
, 0);
4163 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4164 if (dev_state
== QLA8XXX_DEV_FAILED
||
4165 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
)
4166 qla83xx_idc_state_handler(base_vha
);
4167 qla83xx_idc_unlock(base_vha
, 0);
4171 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t
*base_vha
)
4173 int rval
= QLA_SUCCESS
;
4174 unsigned long heart_beat_wait
= jiffies
+ (1 * HZ
);
4175 uint32_t heart_beat_counter1
, heart_beat_counter2
;
4178 if (time_after(jiffies
, heart_beat_wait
)) {
4179 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07c,
4180 "Nic Core f/w is not alive.\n");
4181 rval
= QLA_FUNCTION_FAILED
;
4185 qla83xx_idc_lock(base_vha
, 0);
4186 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
4187 &heart_beat_counter1
);
4188 qla83xx_idc_unlock(base_vha
, 0);
4190 qla83xx_idc_lock(base_vha
, 0);
4191 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
4192 &heart_beat_counter2
);
4193 qla83xx_idc_unlock(base_vha
, 0);
4194 } while (heart_beat_counter1
== heart_beat_counter2
);
4199 /* Work: Perform NIC Core Reset handling */
4201 qla83xx_nic_core_reset_work(struct work_struct
*work
)
4203 struct qla_hw_data
*ha
=
4204 container_of(work
, struct qla_hw_data
, nic_core_reset
);
4205 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4206 uint32_t dev_state
= 0;
4208 if (IS_QLA2031(ha
)) {
4209 if (qla2xxx_mctp_dump(base_vha
) != QLA_SUCCESS
)
4210 ql_log(ql_log_warn
, base_vha
, 0xb081,
4211 "Failed to dump mctp\n");
4215 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
4216 if (qla83xx_check_nic_core_fw_alive(base_vha
) == QLA_SUCCESS
) {
4217 qla83xx_idc_lock(base_vha
, 0);
4218 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4220 qla83xx_idc_unlock(base_vha
, 0);
4221 if (dev_state
!= QLA8XXX_DEV_NEED_RESET
) {
4222 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07a,
4223 "Nic Core f/w is alive.\n");
4228 ha
->flags
.nic_core_reset_hdlr_active
= 1;
4229 if (qla83xx_nic_core_reset(base_vha
)) {
4230 /* NIC Core reset failed. */
4231 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb061,
4232 "NIC Core reset failed.\n");
4234 ha
->flags
.nic_core_reset_hdlr_active
= 0;
4238 /* Work: Handle 8200 IDC aens */
4240 qla83xx_service_idc_aen(struct work_struct
*work
)
4242 struct qla_hw_data
*ha
=
4243 container_of(work
, struct qla_hw_data
, idc_aen
);
4244 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4245 uint32_t dev_state
, idc_control
;
4247 qla83xx_idc_lock(base_vha
, 0);
4248 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4249 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_CONTROL
, &idc_control
);
4250 qla83xx_idc_unlock(base_vha
, 0);
4251 if (dev_state
== QLA8XXX_DEV_NEED_RESET
) {
4252 if (idc_control
& QLA83XX_IDC_GRACEFUL_RESET
) {
4253 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb062,
4254 "Application requested NIC Core Reset.\n");
4255 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4256 } else if (qla83xx_check_nic_core_fw_alive(base_vha
) ==
4258 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07b,
4259 "Other protocol driver requested NIC Core Reset.\n");
4260 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4262 } else if (dev_state
== QLA8XXX_DEV_FAILED
||
4263 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
) {
4264 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
4269 qla83xx_wait_logic(void)
4274 if (!in_interrupt()) {
4276 * Wait about 200ms before retrying again.
4277 * This controls the number of retries for single
4283 for (i
= 0; i
< 20; i
++)
4284 cpu_relax(); /* This a nop instr on i386 */
4289 qla83xx_force_lock_recovery(scsi_qla_host_t
*base_vha
)
4293 uint32_t idc_lck_rcvry_stage_mask
= 0x3;
4294 uint32_t idc_lck_rcvry_owner_mask
= 0x3c;
4295 struct qla_hw_data
*ha
= base_vha
->hw
;
4296 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb086,
4297 "Trying force recovery of the IDC lock.\n");
4299 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
, &data
);
4303 if ((data
& idc_lck_rcvry_stage_mask
) > 0) {
4306 data
= (IDC_LOCK_RECOVERY_STAGE1
) | (ha
->portnum
<< 2);
4307 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4314 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4319 if (((data
& idc_lck_rcvry_owner_mask
) >> 2) == ha
->portnum
) {
4320 data
&= (IDC_LOCK_RECOVERY_STAGE2
|
4321 ~(idc_lck_rcvry_stage_mask
));
4322 rval
= qla83xx_wr_reg(base_vha
,
4323 QLA83XX_IDC_LOCK_RECOVERY
, data
);
4327 /* Forcefully perform IDC UnLock */
4328 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
,
4332 /* Clear lock-id by setting 0xff */
4333 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4337 /* Clear lock-recovery by setting 0x0 */
4338 rval
= qla83xx_wr_reg(base_vha
,
4339 QLA83XX_IDC_LOCK_RECOVERY
, 0x0);
4350 qla83xx_idc_lock_recovery(scsi_qla_host_t
*base_vha
)
4352 int rval
= QLA_SUCCESS
;
4353 uint32_t o_drv_lockid
, n_drv_lockid
;
4354 unsigned long lock_recovery_timeout
;
4356 lock_recovery_timeout
= jiffies
+ QLA83XX_MAX_LOCK_RECOVERY_WAIT
;
4358 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &o_drv_lockid
);
4362 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4363 if (time_after_eq(jiffies
, lock_recovery_timeout
)) {
4364 if (qla83xx_force_lock_recovery(base_vha
) == QLA_SUCCESS
)
4367 return QLA_FUNCTION_FAILED
;
4370 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &n_drv_lockid
);
4374 if (o_drv_lockid
== n_drv_lockid
) {
4375 qla83xx_wait_logic();
4385 qla83xx_idc_lock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4387 uint16_t options
= (requester_id
<< 15) | BIT_6
;
4389 uint32_t lock_owner
;
4390 struct qla_hw_data
*ha
= base_vha
->hw
;
4392 /* IDC-lock implementation using driver-lock/lock-id remote registers */
4394 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCK
, &data
)
4397 /* Setting lock-id to our function-number */
4398 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4401 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4403 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb063,
4404 "Failed to acquire IDC lock, acquired by %d, "
4405 "retrying...\n", lock_owner
);
4407 /* Retry/Perform IDC-Lock recovery */
4408 if (qla83xx_idc_lock_recovery(base_vha
)
4410 qla83xx_wait_logic();
4413 ql_log(ql_log_warn
, base_vha
, 0xb075,
4414 "IDC Lock recovery FAILED.\n");
4421 /* XXX: IDC-lock implementation using access-control mbx */
4423 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4424 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb072,
4425 "Failed to acquire IDC lock. retrying...\n");
4426 /* Retry/Perform IDC-Lock recovery */
4427 if (qla83xx_idc_lock_recovery(base_vha
) == QLA_SUCCESS
) {
4428 qla83xx_wait_logic();
4431 ql_log(ql_log_warn
, base_vha
, 0xb076,
4432 "IDC Lock recovery FAILED.\n");
4439 qla83xx_idc_unlock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4441 uint16_t options
= (requester_id
<< 15) | BIT_7
, retry
;
4443 struct qla_hw_data
*ha
= base_vha
->hw
;
4445 /* IDC-unlock implementation using driver-unlock/lock-id
4450 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &data
)
4452 if (data
== ha
->portnum
) {
4453 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
, &data
);
4454 /* Clearing lock-id by setting 0xff */
4455 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, 0xff);
4456 } else if (retry
< 10) {
4457 /* SV: XXX: IDC unlock retrying needed here? */
4459 /* Retry for IDC-unlock */
4460 qla83xx_wait_logic();
4462 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb064,
4463 "Failed to release IDC lock, retyring=%d\n", retry
);
4466 } else if (retry
< 10) {
4467 /* Retry for IDC-unlock */
4468 qla83xx_wait_logic();
4470 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb065,
4471 "Failed to read drv-lockid, retyring=%d\n", retry
);
4477 /* XXX: IDC-unlock implementation using access-control mbx */
4480 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4482 /* Retry for IDC-unlock */
4483 qla83xx_wait_logic();
4485 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb066,
4486 "Failed to release IDC lock, retyring=%d\n", retry
);
4495 __qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4497 int rval
= QLA_SUCCESS
;
4498 struct qla_hw_data
*ha
= vha
->hw
;
4499 uint32_t drv_presence
;
4501 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4502 if (rval
== QLA_SUCCESS
) {
4503 drv_presence
|= (1 << ha
->portnum
);
4504 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4512 qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4514 int rval
= QLA_SUCCESS
;
4516 qla83xx_idc_lock(vha
, 0);
4517 rval
= __qla83xx_set_drv_presence(vha
);
4518 qla83xx_idc_unlock(vha
, 0);
4524 __qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4526 int rval
= QLA_SUCCESS
;
4527 struct qla_hw_data
*ha
= vha
->hw
;
4528 uint32_t drv_presence
;
4530 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4531 if (rval
== QLA_SUCCESS
) {
4532 drv_presence
&= ~(1 << ha
->portnum
);
4533 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4541 qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4543 int rval
= QLA_SUCCESS
;
4545 qla83xx_idc_lock(vha
, 0);
4546 rval
= __qla83xx_clear_drv_presence(vha
);
4547 qla83xx_idc_unlock(vha
, 0);
4553 qla83xx_need_reset_handler(scsi_qla_host_t
*vha
)
4555 struct qla_hw_data
*ha
= vha
->hw
;
4556 uint32_t drv_ack
, drv_presence
;
4557 unsigned long ack_timeout
;
4559 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4560 ack_timeout
= jiffies
+ (ha
->fcoe_reset_timeout
* HZ
);
4562 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRIVER_ACK
, &drv_ack
);
4563 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4564 if ((drv_ack
& drv_presence
) == drv_presence
)
4567 if (time_after_eq(jiffies
, ack_timeout
)) {
4568 ql_log(ql_log_warn
, vha
, 0xb067,
4569 "RESET ACK TIMEOUT! drv_presence=0x%x "
4570 "drv_ack=0x%x\n", drv_presence
, drv_ack
);
4572 * The function(s) which did not ack in time are forced
4573 * to withdraw any further participation in the IDC
4576 if (drv_ack
!= drv_presence
)
4577 qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4582 qla83xx_idc_unlock(vha
, 0);
4584 qla83xx_idc_lock(vha
, 0);
4587 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_COLD
);
4588 ql_log(ql_log_info
, vha
, 0xb068, "HW State: COLD/RE-INIT.\n");
4592 qla83xx_device_bootstrap(scsi_qla_host_t
*vha
)
4594 int rval
= QLA_SUCCESS
;
4595 uint32_t idc_control
;
4597 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_INITIALIZING
);
4598 ql_log(ql_log_info
, vha
, 0xb069, "HW State: INITIALIZING.\n");
4600 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4601 __qla83xx_get_idc_control(vha
, &idc_control
);
4602 idc_control
&= ~QLA83XX_IDC_GRACEFUL_RESET
;
4603 __qla83xx_set_idc_control(vha
, 0);
4605 qla83xx_idc_unlock(vha
, 0);
4606 rval
= qla83xx_restart_nic_firmware(vha
);
4607 qla83xx_idc_lock(vha
, 0);
4609 if (rval
!= QLA_SUCCESS
) {
4610 ql_log(ql_log_fatal
, vha
, 0xb06a,
4611 "Failed to restart NIC f/w.\n");
4612 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_FAILED
);
4613 ql_log(ql_log_info
, vha
, 0xb06b, "HW State: FAILED.\n");
4615 ql_dbg(ql_dbg_p3p
, vha
, 0xb06c,
4616 "Success in restarting nic f/w.\n");
4617 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_READY
);
4618 ql_log(ql_log_info
, vha
, 0xb06d, "HW State: READY.\n");
4624 /* Assumes idc_lock always held on entry */
4626 qla83xx_idc_state_handler(scsi_qla_host_t
*base_vha
)
4628 struct qla_hw_data
*ha
= base_vha
->hw
;
4629 int rval
= QLA_SUCCESS
;
4630 unsigned long dev_init_timeout
;
4633 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4634 dev_init_timeout
= jiffies
+ (ha
->fcoe_dev_init_timeout
* HZ
);
4638 if (time_after_eq(jiffies
, dev_init_timeout
)) {
4639 ql_log(ql_log_warn
, base_vha
, 0xb06e,
4640 "Initialization TIMEOUT!\n");
4641 /* Init timeout. Disable further NIC Core
4644 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4645 QLA8XXX_DEV_FAILED
);
4646 ql_log(ql_log_info
, base_vha
, 0xb06f,
4647 "HW State: FAILED.\n");
4650 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4651 switch (dev_state
) {
4652 case QLA8XXX_DEV_READY
:
4653 if (ha
->flags
.nic_core_reset_owner
)
4654 qla83xx_idc_audit(base_vha
,
4655 IDC_AUDIT_COMPLETION
);
4656 ha
->flags
.nic_core_reset_owner
= 0;
4657 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb070,
4658 "Reset_owner reset by 0x%x.\n",
4661 case QLA8XXX_DEV_COLD
:
4662 if (ha
->flags
.nic_core_reset_owner
)
4663 rval
= qla83xx_device_bootstrap(base_vha
);
4665 /* Wait for AEN to change device-state */
4666 qla83xx_idc_unlock(base_vha
, 0);
4668 qla83xx_idc_lock(base_vha
, 0);
4671 case QLA8XXX_DEV_INITIALIZING
:
4672 /* Wait for AEN to change device-state */
4673 qla83xx_idc_unlock(base_vha
, 0);
4675 qla83xx_idc_lock(base_vha
, 0);
4677 case QLA8XXX_DEV_NEED_RESET
:
4678 if (!ql2xdontresethba
&& ha
->flags
.nic_core_reset_owner
)
4679 qla83xx_need_reset_handler(base_vha
);
4681 /* Wait for AEN to change device-state */
4682 qla83xx_idc_unlock(base_vha
, 0);
4684 qla83xx_idc_lock(base_vha
, 0);
4686 /* reset timeout value after need reset handler */
4687 dev_init_timeout
= jiffies
+
4688 (ha
->fcoe_dev_init_timeout
* HZ
);
4690 case QLA8XXX_DEV_NEED_QUIESCENT
:
4691 /* XXX: DEBUG for now */
4692 qla83xx_idc_unlock(base_vha
, 0);
4694 qla83xx_idc_lock(base_vha
, 0);
4696 case QLA8XXX_DEV_QUIESCENT
:
4697 /* XXX: DEBUG for now */
4698 if (ha
->flags
.quiesce_owner
)
4701 qla83xx_idc_unlock(base_vha
, 0);
4703 qla83xx_idc_lock(base_vha
, 0);
4704 dev_init_timeout
= jiffies
+
4705 (ha
->fcoe_dev_init_timeout
* HZ
);
4707 case QLA8XXX_DEV_FAILED
:
4708 if (ha
->flags
.nic_core_reset_owner
)
4709 qla83xx_idc_audit(base_vha
,
4710 IDC_AUDIT_COMPLETION
);
4711 ha
->flags
.nic_core_reset_owner
= 0;
4712 __qla83xx_clear_drv_presence(base_vha
);
4713 qla83xx_idc_unlock(base_vha
, 0);
4714 qla8xxx_dev_failed_handler(base_vha
);
4715 rval
= QLA_FUNCTION_FAILED
;
4716 qla83xx_idc_lock(base_vha
, 0);
4718 case QLA8XXX_BAD_VALUE
:
4719 qla83xx_idc_unlock(base_vha
, 0);
4721 qla83xx_idc_lock(base_vha
, 0);
4724 ql_log(ql_log_warn
, base_vha
, 0xb071,
4725 "Unknow Device State: %x.\n", dev_state
);
4726 qla83xx_idc_unlock(base_vha
, 0);
4727 qla8xxx_dev_failed_handler(base_vha
);
4728 rval
= QLA_FUNCTION_FAILED
;
4729 qla83xx_idc_lock(base_vha
, 0);
4738 /**************************************************************************
4740 * This kernel thread is a task that is schedule by the interrupt handler
4741 * to perform the background processing for interrupts.
4744 * This task always run in the context of a kernel thread. It
4745 * is kick-off by the driver's detect code and starts up
4746 * up one per adapter. It immediately goes to sleep and waits for
4747 * some fibre event. When either the interrupt handler or
4748 * the timer routine detects a event it will one of the task
4749 * bits then wake us up.
4750 **************************************************************************/
4752 qla2x00_do_dpc(void *data
)
4755 scsi_qla_host_t
*base_vha
;
4756 struct qla_hw_data
*ha
;
4758 ha
= (struct qla_hw_data
*)data
;
4759 base_vha
= pci_get_drvdata(ha
->pdev
);
4761 set_user_nice(current
, -20);
4763 set_current_state(TASK_INTERRUPTIBLE
);
4764 while (!kthread_should_stop()) {
4765 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4000,
4766 "DPC handler sleeping.\n");
4769 __set_current_state(TASK_RUNNING
);
4771 if (!base_vha
->flags
.init_done
|| ha
->flags
.mbox_busy
)
4774 if (ha
->flags
.eeh_busy
) {
4775 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4003,
4776 "eeh_busy=%d.\n", ha
->flags
.eeh_busy
);
4782 ql_dbg(ql_dbg_dpc
+ ql_dbg_verbose
, base_vha
, 0x4001,
4783 "DPC handler waking up, dpc_flags=0x%lx.\n",
4784 base_vha
->dpc_flags
);
4786 qla2x00_do_work(base_vha
);
4788 if (IS_P3P_TYPE(ha
)) {
4789 if (IS_QLA8044(ha
)) {
4790 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4791 &base_vha
->dpc_flags
)) {
4792 qla8044_idc_lock(ha
);
4793 qla8044_wr_direct(base_vha
,
4794 QLA8044_CRB_DEV_STATE_INDEX
,
4795 QLA8XXX_DEV_FAILED
);
4796 qla8044_idc_unlock(ha
);
4797 ql_log(ql_log_info
, base_vha
, 0x4004,
4798 "HW State: FAILED.\n");
4799 qla8044_device_state_handler(base_vha
);
4804 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4805 &base_vha
->dpc_flags
)) {
4806 qla82xx_idc_lock(ha
);
4807 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
4808 QLA8XXX_DEV_FAILED
);
4809 qla82xx_idc_unlock(ha
);
4810 ql_log(ql_log_info
, base_vha
, 0x0151,
4811 "HW State: FAILED.\n");
4812 qla82xx_device_state_handler(base_vha
);
4817 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED
,
4818 &base_vha
->dpc_flags
)) {
4820 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4005,
4821 "FCoE context reset scheduled.\n");
4822 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4823 &base_vha
->dpc_flags
))) {
4824 if (qla82xx_fcoe_ctx_reset(base_vha
)) {
4825 /* FCoE-ctx reset failed.
4826 * Escalate to chip-reset
4828 set_bit(ISP_ABORT_NEEDED
,
4829 &base_vha
->dpc_flags
);
4831 clear_bit(ABORT_ISP_ACTIVE
,
4832 &base_vha
->dpc_flags
);
4835 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4006,
4836 "FCoE context reset end.\n");
4838 } else if (IS_QLAFX00(ha
)) {
4839 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4840 &base_vha
->dpc_flags
)) {
4841 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4020,
4842 "Firmware Reset Recovery\n");
4843 if (qlafx00_reset_initialize(base_vha
)) {
4844 /* Failed. Abort isp later. */
4845 if (!test_bit(UNLOADING
,
4846 &base_vha
->dpc_flags
))
4847 set_bit(ISP_UNRECOVERABLE
,
4848 &base_vha
->dpc_flags
);
4849 ql_dbg(ql_dbg_dpc
, base_vha
,
4851 "Reset Recovery Failed\n");
4855 if (test_and_clear_bit(FX00_TARGET_SCAN
,
4856 &base_vha
->dpc_flags
)) {
4857 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4022,
4858 "ISPFx00 Target Scan scheduled\n");
4859 if (qlafx00_rescan_isp(base_vha
)) {
4860 if (!test_bit(UNLOADING
,
4861 &base_vha
->dpc_flags
))
4862 set_bit(ISP_UNRECOVERABLE
,
4863 &base_vha
->dpc_flags
);
4864 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401e,
4865 "ISPFx00 Target Scan Failed\n");
4867 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401f,
4868 "ISPFx00 Target Scan End\n");
4872 if (test_and_clear_bit(ISP_ABORT_NEEDED
,
4873 &base_vha
->dpc_flags
)) {
4875 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4007,
4876 "ISP abort scheduled.\n");
4877 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4878 &base_vha
->dpc_flags
))) {
4880 if (ha
->isp_ops
->abort_isp(base_vha
)) {
4881 /* failed. retry later */
4882 set_bit(ISP_ABORT_NEEDED
,
4883 &base_vha
->dpc_flags
);
4885 clear_bit(ABORT_ISP_ACTIVE
,
4886 &base_vha
->dpc_flags
);
4889 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4008,
4890 "ISP abort end.\n");
4893 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED
,
4894 &base_vha
->dpc_flags
)) {
4895 qla2x00_update_fcports(base_vha
);
4898 if (test_bit(SCR_PENDING
, &base_vha
->dpc_flags
)) {
4900 ret
= qla2x00_send_change_request(base_vha
, 0x3, 0);
4901 if (ret
!= QLA_SUCCESS
)
4902 ql_log(ql_log_warn
, base_vha
, 0x121,
4903 "Failed to enable receiving of RSCN "
4904 "requests: 0x%x.\n", ret
);
4905 clear_bit(SCR_PENDING
, &base_vha
->dpc_flags
);
4909 goto loop_resync_check
;
4911 if (test_bit(ISP_QUIESCE_NEEDED
, &base_vha
->dpc_flags
)) {
4912 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4009,
4913 "Quiescence mode scheduled.\n");
4914 if (IS_P3P_TYPE(ha
)) {
4916 qla82xx_device_state_handler(base_vha
);
4918 qla8044_device_state_handler(base_vha
);
4919 clear_bit(ISP_QUIESCE_NEEDED
,
4920 &base_vha
->dpc_flags
);
4921 if (!ha
->flags
.quiesce_owner
) {
4922 qla2x00_perform_loop_resync(base_vha
);
4923 if (IS_QLA82XX(ha
)) {
4924 qla82xx_idc_lock(ha
);
4925 qla82xx_clear_qsnt_ready(
4927 qla82xx_idc_unlock(ha
);
4928 } else if (IS_QLA8044(ha
)) {
4929 qla8044_idc_lock(ha
);
4930 qla8044_clear_qsnt_ready(
4932 qla8044_idc_unlock(ha
);
4936 clear_bit(ISP_QUIESCE_NEEDED
,
4937 &base_vha
->dpc_flags
);
4938 qla2x00_quiesce_io(base_vha
);
4940 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400a,
4941 "Quiescence mode end.\n");
4944 if (test_and_clear_bit(RESET_MARKER_NEEDED
,
4945 &base_vha
->dpc_flags
) &&
4946 (!(test_and_set_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
)))) {
4948 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400b,
4949 "Reset marker scheduled.\n");
4950 qla2x00_rst_aen(base_vha
);
4951 clear_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
);
4952 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400c,
4953 "Reset marker end.\n");
4956 /* Retry each device up to login retry count */
4957 if ((test_and_clear_bit(RELOGIN_NEEDED
,
4958 &base_vha
->dpc_flags
)) &&
4959 !test_bit(LOOP_RESYNC_NEEDED
, &base_vha
->dpc_flags
) &&
4960 atomic_read(&base_vha
->loop_state
) != LOOP_DOWN
) {
4962 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400d,
4963 "Relogin scheduled.\n");
4964 qla2x00_relogin(base_vha
);
4965 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400e,
4969 if (test_and_clear_bit(LOOP_RESYNC_NEEDED
,
4970 &base_vha
->dpc_flags
)) {
4972 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400f,
4973 "Loop resync scheduled.\n");
4975 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE
,
4976 &base_vha
->dpc_flags
))) {
4978 rval
= qla2x00_loop_resync(base_vha
);
4980 clear_bit(LOOP_RESYNC_ACTIVE
,
4981 &base_vha
->dpc_flags
);
4984 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4010,
4985 "Loop resync end.\n");
4991 if (test_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
) &&
4992 atomic_read(&base_vha
->loop_state
) == LOOP_READY
) {
4993 clear_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
);
4994 qla2xxx_flash_npiv_conf(base_vha
);
4997 if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
,
4998 &base_vha
->dpc_flags
)) {
4999 /* Prevents simultaneous ramp up and down */
5000 clear_bit(HOST_RAMP_UP_QUEUE_DEPTH
,
5001 &base_vha
->dpc_flags
);
5002 qla2x00_host_ramp_down_queuedepth(base_vha
);
5005 if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH
,
5006 &base_vha
->dpc_flags
))
5007 qla2x00_host_ramp_up_queuedepth(base_vha
);
5009 if (!ha
->interrupts_on
)
5010 ha
->isp_ops
->enable_intrs(ha
);
5012 if (test_and_clear_bit(BEACON_BLINK_NEEDED
,
5013 &base_vha
->dpc_flags
))
5014 ha
->isp_ops
->beacon_blink(base_vha
);
5016 if (!IS_QLAFX00(ha
))
5017 qla2x00_do_dpc_all_vps(base_vha
);
5021 set_current_state(TASK_INTERRUPTIBLE
);
5022 } /* End of while(1) */
5023 __set_current_state(TASK_RUNNING
);
5025 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4011,
5026 "DPC handler exiting.\n");
5029 * Make sure that nobody tries to wake us up again.
5033 /* Cleanup any residual CTX SRBs. */
5034 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
5040 qla2xxx_wake_dpc(struct scsi_qla_host
*vha
)
5042 struct qla_hw_data
*ha
= vha
->hw
;
5043 struct task_struct
*t
= ha
->dpc_thread
;
5045 if (!test_bit(UNLOADING
, &vha
->dpc_flags
) && t
)
5051 * Processes asynchronous reset.
5054 * ha = adapter block pointer.
5057 qla2x00_rst_aen(scsi_qla_host_t
*vha
)
5059 if (vha
->flags
.online
&& !vha
->flags
.reset_active
&&
5060 !atomic_read(&vha
->loop_down_timer
) &&
5061 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
))) {
5063 clear_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
);
5066 * Issue marker command only when we are going to start
5069 vha
->marker_needed
= 1;
5070 } while (!atomic_read(&vha
->loop_down_timer
) &&
5071 (test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
)));
5075 /**************************************************************************
5081 * Context: Interrupt
5082 ***************************************************************************/
5084 qla2x00_timer(scsi_qla_host_t
*vha
)
5086 unsigned long cpu_flags
= 0;
5091 struct qla_hw_data
*ha
= vha
->hw
;
5092 struct req_que
*req
;
5094 if (ha
->flags
.eeh_busy
) {
5095 ql_dbg(ql_dbg_timer
, vha
, 0x6000,
5096 "EEH = %d, restarting timer.\n",
5097 ha
->flags
.eeh_busy
);
5098 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
5102 /* Hardware read to raise pending EEH errors during mailbox waits. */
5103 if (!pci_channel_offline(ha
->pdev
))
5104 pci_read_config_word(ha
->pdev
, PCI_VENDOR_ID
, &w
);
5106 /* Make sure qla82xx_watchdog is run only for physical port */
5107 if (!vha
->vp_idx
&& IS_P3P_TYPE(ha
)) {
5108 if (test_bit(ISP_QUIESCE_NEEDED
, &vha
->dpc_flags
))
5111 qla82xx_watchdog(vha
);
5112 else if (IS_QLA8044(ha
))
5113 qla8044_watchdog(vha
);
5116 if (!vha
->vp_idx
&& IS_QLAFX00(ha
))
5117 qlafx00_timer_routine(vha
);
5119 /* Loop down handler. */
5120 if (atomic_read(&vha
->loop_down_timer
) > 0 &&
5121 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
)) &&
5122 !(test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
))
5123 && vha
->flags
.online
) {
5125 if (atomic_read(&vha
->loop_down_timer
) ==
5126 vha
->loop_down_abort_time
) {
5128 ql_log(ql_log_info
, vha
, 0x6008,
5129 "Loop down - aborting the queues before time expires.\n");
5131 if (!IS_QLA2100(ha
) && vha
->link_down_timeout
)
5132 atomic_set(&vha
->loop_state
, LOOP_DEAD
);
5135 * Schedule an ISP abort to return any FCP2-device
5138 /* NPIV - scan physical port only */
5140 spin_lock_irqsave(&ha
->hardware_lock
,
5142 req
= ha
->req_q_map
[0];
5144 index
< req
->num_outstanding_cmds
;
5148 sp
= req
->outstanding_cmds
[index
];
5151 if (sp
->type
!= SRB_SCSI_CMD
)
5154 if (!(sfcp
->flags
& FCF_FCP2_DEVICE
))
5158 set_bit(FCOE_CTX_RESET_NEEDED
,
5161 set_bit(ISP_ABORT_NEEDED
,
5165 spin_unlock_irqrestore(&ha
->hardware_lock
,
5171 /* if the loop has been down for 4 minutes, reinit adapter */
5172 if (atomic_dec_and_test(&vha
->loop_down_timer
) != 0) {
5173 if (!(vha
->device_flags
& DFLG_NO_CABLE
)) {
5174 ql_log(ql_log_warn
, vha
, 0x6009,
5175 "Loop down - aborting ISP.\n");
5178 set_bit(FCOE_CTX_RESET_NEEDED
,
5181 set_bit(ISP_ABORT_NEEDED
,
5185 ql_dbg(ql_dbg_timer
, vha
, 0x600a,
5186 "Loop down - seconds remaining %d.\n",
5187 atomic_read(&vha
->loop_down_timer
));
5190 /* Check if beacon LED needs to be blinked for physical host only */
5191 if (!vha
->vp_idx
&& (ha
->beacon_blink_led
== 1)) {
5192 /* There is no beacon_blink function for ISP82xx */
5193 if (!IS_P3P_TYPE(ha
)) {
5194 set_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
);
5199 /* Process any deferred work. */
5200 if (!list_empty(&vha
->work_list
))
5203 /* Schedule the DPC routine if needed */
5204 if ((test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
) ||
5205 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
) ||
5206 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
) ||
5208 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
) ||
5209 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
) ||
5210 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
) ||
5211 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
) ||
5212 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
) ||
5213 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
) ||
5214 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
) ||
5215 test_bit(HOST_RAMP_UP_QUEUE_DEPTH
, &vha
->dpc_flags
))) {
5216 ql_dbg(ql_dbg_timer
, vha
, 0x600b,
5217 "isp_abort_needed=%d loop_resync_needed=%d "
5218 "fcport_update_needed=%d start_dpc=%d "
5219 "reset_marker_needed=%d",
5220 test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
),
5221 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
),
5222 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
),
5224 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
));
5225 ql_dbg(ql_dbg_timer
, vha
, 0x600c,
5226 "beacon_blink_needed=%d isp_unrecoverable=%d "
5227 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5228 "relogin_needed=%d, host_ramp_down_needed=%d "
5229 "host_ramp_up_needed=%d.\n",
5230 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
),
5231 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
),
5232 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
),
5233 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
),
5234 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
),
5235 test_bit(HOST_RAMP_UP_QUEUE_DEPTH
, &vha
->dpc_flags
),
5236 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
));
5237 qla2xxx_wake_dpc(vha
);
5240 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
5243 /* Firmware interface routines. */
5246 #define FW_ISP21XX 0
5247 #define FW_ISP22XX 1
5248 #define FW_ISP2300 2
5249 #define FW_ISP2322 3
5250 #define FW_ISP24XX 4
5251 #define FW_ISP25XX 5
5252 #define FW_ISP81XX 6
5253 #define FW_ISP82XX 7
5254 #define FW_ISP2031 8
5255 #define FW_ISP8031 9
5257 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5258 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5259 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5260 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5261 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5262 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5263 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5264 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5265 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5266 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5268 static DEFINE_MUTEX(qla_fw_lock
);
5270 static struct fw_blob qla_fw_blobs
[FW_BLOBS
] = {
5271 { .name
= FW_FILE_ISP21XX
, .segs
= { 0x1000, 0 }, },
5272 { .name
= FW_FILE_ISP22XX
, .segs
= { 0x1000, 0 }, },
5273 { .name
= FW_FILE_ISP2300
, .segs
= { 0x800, 0 }, },
5274 { .name
= FW_FILE_ISP2322
, .segs
= { 0x800, 0x1c000, 0x1e000, 0 }, },
5275 { .name
= FW_FILE_ISP24XX
, },
5276 { .name
= FW_FILE_ISP25XX
, },
5277 { .name
= FW_FILE_ISP81XX
, },
5278 { .name
= FW_FILE_ISP82XX
, },
5279 { .name
= FW_FILE_ISP2031
, },
5280 { .name
= FW_FILE_ISP8031
, },
5284 qla2x00_request_firmware(scsi_qla_host_t
*vha
)
5286 struct qla_hw_data
*ha
= vha
->hw
;
5287 struct fw_blob
*blob
;
5289 if (IS_QLA2100(ha
)) {
5290 blob
= &qla_fw_blobs
[FW_ISP21XX
];
5291 } else if (IS_QLA2200(ha
)) {
5292 blob
= &qla_fw_blobs
[FW_ISP22XX
];
5293 } else if (IS_QLA2300(ha
) || IS_QLA2312(ha
) || IS_QLA6312(ha
)) {
5294 blob
= &qla_fw_blobs
[FW_ISP2300
];
5295 } else if (IS_QLA2322(ha
) || IS_QLA6322(ha
)) {
5296 blob
= &qla_fw_blobs
[FW_ISP2322
];
5297 } else if (IS_QLA24XX_TYPE(ha
)) {
5298 blob
= &qla_fw_blobs
[FW_ISP24XX
];
5299 } else if (IS_QLA25XX(ha
)) {
5300 blob
= &qla_fw_blobs
[FW_ISP25XX
];
5301 } else if (IS_QLA81XX(ha
)) {
5302 blob
= &qla_fw_blobs
[FW_ISP81XX
];
5303 } else if (IS_QLA82XX(ha
)) {
5304 blob
= &qla_fw_blobs
[FW_ISP82XX
];
5305 } else if (IS_QLA2031(ha
)) {
5306 blob
= &qla_fw_blobs
[FW_ISP2031
];
5307 } else if (IS_QLA8031(ha
)) {
5308 blob
= &qla_fw_blobs
[FW_ISP8031
];
5313 mutex_lock(&qla_fw_lock
);
5317 if (request_firmware(&blob
->fw
, blob
->name
, &ha
->pdev
->dev
)) {
5318 ql_log(ql_log_warn
, vha
, 0x0063,
5319 "Failed to load firmware image (%s).\n", blob
->name
);
5326 mutex_unlock(&qla_fw_lock
);
5331 qla2x00_release_firmware(void)
5335 mutex_lock(&qla_fw_lock
);
5336 for (idx
= 0; idx
< FW_BLOBS
; idx
++)
5337 release_firmware(qla_fw_blobs
[idx
].fw
);
5338 mutex_unlock(&qla_fw_lock
);
5341 static pci_ers_result_t
5342 qla2xxx_pci_error_detected(struct pci_dev
*pdev
, pci_channel_state_t state
)
5344 scsi_qla_host_t
*vha
= pci_get_drvdata(pdev
);
5345 struct qla_hw_data
*ha
= vha
->hw
;
5347 ql_dbg(ql_dbg_aer
, vha
, 0x9000,
5348 "PCI error detected, state %x.\n", state
);
5351 case pci_channel_io_normal
:
5352 ha
->flags
.eeh_busy
= 0;
5353 return PCI_ERS_RESULT_CAN_RECOVER
;
5354 case pci_channel_io_frozen
:
5355 ha
->flags
.eeh_busy
= 1;
5356 /* For ISP82XX complete any pending mailbox cmd */
5357 if (IS_QLA82XX(ha
)) {
5358 ha
->flags
.isp82xx_fw_hung
= 1;
5359 ql_dbg(ql_dbg_aer
, vha
, 0x9001, "Pci channel io frozen\n");
5360 qla82xx_clear_pending_mbx(vha
);
5362 qla2x00_free_irqs(vha
);
5363 pci_disable_device(pdev
);
5364 /* Return back all IOs */
5365 qla2x00_abort_all_cmds(vha
, DID_RESET
<< 16);
5366 return PCI_ERS_RESULT_NEED_RESET
;
5367 case pci_channel_io_perm_failure
:
5368 ha
->flags
.pci_channel_io_perm_failure
= 1;
5369 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
5370 return PCI_ERS_RESULT_DISCONNECT
;
5372 return PCI_ERS_RESULT_NEED_RESET
;
5375 static pci_ers_result_t
5376 qla2xxx_pci_mmio_enabled(struct pci_dev
*pdev
)
5378 int risc_paused
= 0;
5380 unsigned long flags
;
5381 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5382 struct qla_hw_data
*ha
= base_vha
->hw
;
5383 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
5384 struct device_reg_24xx __iomem
*reg24
= &ha
->iobase
->isp24
;
5387 return PCI_ERS_RESULT_RECOVERED
;
5389 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
5390 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)){
5391 stat
= RD_REG_DWORD(®
->hccr
);
5392 if (stat
& HCCR_RISC_PAUSE
)
5394 } else if (IS_QLA23XX(ha
)) {
5395 stat
= RD_REG_DWORD(®
->u
.isp2300
.host_status
);
5396 if (stat
& HSR_RISC_PAUSED
)
5398 } else if (IS_FWI2_CAPABLE(ha
)) {
5399 stat
= RD_REG_DWORD(®24
->host_status
);
5400 if (stat
& HSRX_RISC_PAUSED
)
5403 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
5406 ql_log(ql_log_info
, base_vha
, 0x9003,
5407 "RISC paused -- mmio_enabled, Dumping firmware.\n");
5408 ha
->isp_ops
->fw_dump(base_vha
, 0);
5410 return PCI_ERS_RESULT_NEED_RESET
;
5412 return PCI_ERS_RESULT_RECOVERED
;
5416 qla82xx_error_recovery(scsi_qla_host_t
*base_vha
)
5418 uint32_t rval
= QLA_FUNCTION_FAILED
;
5419 uint32_t drv_active
= 0;
5420 struct qla_hw_data
*ha
= base_vha
->hw
;
5422 struct pci_dev
*other_pdev
= NULL
;
5424 ql_dbg(ql_dbg_aer
, base_vha
, 0x9006,
5425 "Entered %s.\n", __func__
);
5427 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5429 if (base_vha
->flags
.online
) {
5430 /* Abort all outstanding commands,
5431 * so as to be requeued later */
5432 qla2x00_abort_isp_cleanup(base_vha
);
5436 fn
= PCI_FUNC(ha
->pdev
->devfn
);
5439 ql_dbg(ql_dbg_aer
, base_vha
, 0x9007,
5440 "Finding pci device at function = 0x%x.\n", fn
);
5442 pci_get_domain_bus_and_slot(pci_domain_nr(ha
->pdev
->bus
),
5443 ha
->pdev
->bus
->number
, PCI_DEVFN(PCI_SLOT(ha
->pdev
->devfn
),
5448 if (atomic_read(&other_pdev
->enable_cnt
)) {
5449 ql_dbg(ql_dbg_aer
, base_vha
, 0x9008,
5450 "Found PCI func available and enable at 0x%x.\n",
5452 pci_dev_put(other_pdev
);
5455 pci_dev_put(other_pdev
);
5460 ql_dbg(ql_dbg_aer
, base_vha
, 0x9009,
5461 "This devfn is reset owner = 0x%x.\n",
5463 qla82xx_idc_lock(ha
);
5465 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5466 QLA8XXX_DEV_INITIALIZING
);
5468 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_IDC_VERSION
,
5469 QLA82XX_IDC_VERSION
);
5471 drv_active
= qla82xx_rd_32(ha
, QLA82XX_CRB_DRV_ACTIVE
);
5472 ql_dbg(ql_dbg_aer
, base_vha
, 0x900a,
5473 "drv_active = 0x%x.\n", drv_active
);
5475 qla82xx_idc_unlock(ha
);
5476 /* Reset if device is not already reset
5477 * drv_active would be 0 if a reset has already been done
5480 rval
= qla82xx_start_firmware(base_vha
);
5483 qla82xx_idc_lock(ha
);
5485 if (rval
!= QLA_SUCCESS
) {
5486 ql_log(ql_log_info
, base_vha
, 0x900b,
5487 "HW State: FAILED.\n");
5488 qla82xx_clear_drv_active(ha
);
5489 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5490 QLA8XXX_DEV_FAILED
);
5492 ql_log(ql_log_info
, base_vha
, 0x900c,
5493 "HW State: READY.\n");
5494 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5496 qla82xx_idc_unlock(ha
);
5497 ha
->flags
.isp82xx_fw_hung
= 0;
5498 rval
= qla82xx_restart_isp(base_vha
);
5499 qla82xx_idc_lock(ha
);
5500 /* Clear driver state register */
5501 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_STATE
, 0);
5502 qla82xx_set_drv_active(base_vha
);
5504 qla82xx_idc_unlock(ha
);
5506 ql_dbg(ql_dbg_aer
, base_vha
, 0x900d,
5507 "This devfn is not reset owner = 0x%x.\n",
5509 if ((qla82xx_rd_32(ha
, QLA82XX_CRB_DEV_STATE
) ==
5510 QLA8XXX_DEV_READY
)) {
5511 ha
->flags
.isp82xx_fw_hung
= 0;
5512 rval
= qla82xx_restart_isp(base_vha
);
5513 qla82xx_idc_lock(ha
);
5514 qla82xx_set_drv_active(base_vha
);
5515 qla82xx_idc_unlock(ha
);
5518 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5523 static pci_ers_result_t
5524 qla2xxx_pci_slot_reset(struct pci_dev
*pdev
)
5526 pci_ers_result_t ret
= PCI_ERS_RESULT_DISCONNECT
;
5527 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5528 struct qla_hw_data
*ha
= base_vha
->hw
;
5529 struct rsp_que
*rsp
;
5530 int rc
, retries
= 10;
5532 ql_dbg(ql_dbg_aer
, base_vha
, 0x9004,
5535 /* Workaround: qla2xxx driver which access hardware earlier
5536 * needs error state to be pci_channel_io_online.
5537 * Otherwise mailbox command timesout.
5539 pdev
->error_state
= pci_channel_io_normal
;
5541 pci_restore_state(pdev
);
5543 /* pci_restore_state() clears the saved_state flag of the device
5544 * save restored state which resets saved_state flag
5546 pci_save_state(pdev
);
5549 rc
= pci_enable_device_mem(pdev
);
5551 rc
= pci_enable_device(pdev
);
5554 ql_log(ql_log_warn
, base_vha
, 0x9005,
5555 "Can't re-enable PCI device after reset.\n");
5556 goto exit_slot_reset
;
5559 rsp
= ha
->rsp_q_map
[0];
5560 if (qla2x00_request_irqs(ha
, rsp
))
5561 goto exit_slot_reset
;
5563 if (ha
->isp_ops
->pci_config(base_vha
))
5564 goto exit_slot_reset
;
5566 if (IS_QLA82XX(ha
)) {
5567 if (qla82xx_error_recovery(base_vha
) == QLA_SUCCESS
) {
5568 ret
= PCI_ERS_RESULT_RECOVERED
;
5569 goto exit_slot_reset
;
5571 goto exit_slot_reset
;
5574 while (ha
->flags
.mbox_busy
&& retries
--)
5577 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5578 if (ha
->isp_ops
->abort_isp(base_vha
) == QLA_SUCCESS
)
5579 ret
= PCI_ERS_RESULT_RECOVERED
;
5580 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5584 ql_dbg(ql_dbg_aer
, base_vha
, 0x900e,
5585 "slot_reset return %x.\n", ret
);
5591 qla2xxx_pci_resume(struct pci_dev
*pdev
)
5593 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5594 struct qla_hw_data
*ha
= base_vha
->hw
;
5597 ql_dbg(ql_dbg_aer
, base_vha
, 0x900f,
5600 ret
= qla2x00_wait_for_hba_online(base_vha
);
5601 if (ret
!= QLA_SUCCESS
) {
5602 ql_log(ql_log_fatal
, base_vha
, 0x9002,
5603 "The device failed to resume I/O from slot/link_reset.\n");
5606 pci_cleanup_aer_uncorrect_error_status(pdev
);
5608 ha
->flags
.eeh_busy
= 0;
5611 static const struct pci_error_handlers qla2xxx_err_handler
= {
5612 .error_detected
= qla2xxx_pci_error_detected
,
5613 .mmio_enabled
= qla2xxx_pci_mmio_enabled
,
5614 .slot_reset
= qla2xxx_pci_slot_reset
,
5615 .resume
= qla2xxx_pci_resume
,
5618 static struct pci_device_id qla2xxx_pci_tbl
[] = {
5619 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2100
) },
5620 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2200
) },
5621 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2300
) },
5622 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2312
) },
5623 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2322
) },
5624 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6312
) },
5625 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6322
) },
5626 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2422
) },
5627 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2432
) },
5628 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8432
) },
5629 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5422
) },
5630 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5432
) },
5631 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2532
) },
5632 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2031
) },
5633 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8001
) },
5634 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8021
) },
5635 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8031
) },
5636 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISPF001
) },
5637 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8044
) },
5640 MODULE_DEVICE_TABLE(pci
, qla2xxx_pci_tbl
);
5642 static struct pci_driver qla2xxx_pci_driver
= {
5643 .name
= QLA2XXX_DRIVER_NAME
,
5645 .owner
= THIS_MODULE
,
5647 .id_table
= qla2xxx_pci_tbl
,
5648 .probe
= qla2x00_probe_one
,
5649 .remove
= qla2x00_remove_one
,
5650 .shutdown
= qla2x00_shutdown
,
5651 .err_handler
= &qla2xxx_err_handler
,
5654 static const struct file_operations apidev_fops
= {
5655 .owner
= THIS_MODULE
,
5656 .llseek
= noop_llseek
,
5660 * qla2x00_module_init - Module initialization.
5663 qla2x00_module_init(void)
5667 /* Allocate cache for SRBs. */
5668 srb_cachep
= kmem_cache_create("qla2xxx_srbs", sizeof(srb_t
), 0,
5669 SLAB_HWCACHE_ALIGN
, NULL
);
5670 if (srb_cachep
== NULL
) {
5671 ql_log(ql_log_fatal
, NULL
, 0x0001,
5672 "Unable to allocate SRB cache...Failing load!.\n");
5676 /* Initialize target kmem_cache and mem_pools */
5679 kmem_cache_destroy(srb_cachep
);
5681 } else if (ret
> 0) {
5683 * If initiator mode is explictly disabled by qlt_init(),
5684 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5685 * performing scsi_scan_target() during LOOP UP event.
5687 qla2xxx_transport_functions
.disable_target_scan
= 1;
5688 qla2xxx_transport_vport_functions
.disable_target_scan
= 1;
5691 /* Derive version string. */
5692 strcpy(qla2x00_version_str
, QLA2XXX_VERSION
);
5693 if (ql2xextended_error_logging
)
5694 strcat(qla2x00_version_str
, "-debug");
5696 qla2xxx_transport_template
=
5697 fc_attach_transport(&qla2xxx_transport_functions
);
5698 if (!qla2xxx_transport_template
) {
5699 kmem_cache_destroy(srb_cachep
);
5700 ql_log(ql_log_fatal
, NULL
, 0x0002,
5701 "fc_attach_transport failed...Failing load!.\n");
5706 apidev_major
= register_chrdev(0, QLA2XXX_APIDEV
, &apidev_fops
);
5707 if (apidev_major
< 0) {
5708 ql_log(ql_log_fatal
, NULL
, 0x0003,
5709 "Unable to register char device %s.\n", QLA2XXX_APIDEV
);
5712 qla2xxx_transport_vport_template
=
5713 fc_attach_transport(&qla2xxx_transport_vport_functions
);
5714 if (!qla2xxx_transport_vport_template
) {
5715 kmem_cache_destroy(srb_cachep
);
5717 fc_release_transport(qla2xxx_transport_template
);
5718 ql_log(ql_log_fatal
, NULL
, 0x0004,
5719 "fc_attach_transport vport failed...Failing load!.\n");
5722 ql_log(ql_log_info
, NULL
, 0x0005,
5723 "QLogic Fibre Channel HBA Driver: %s.\n",
5724 qla2x00_version_str
);
5725 ret
= pci_register_driver(&qla2xxx_pci_driver
);
5727 kmem_cache_destroy(srb_cachep
);
5729 fc_release_transport(qla2xxx_transport_template
);
5730 fc_release_transport(qla2xxx_transport_vport_template
);
5731 ql_log(ql_log_fatal
, NULL
, 0x0006,
5732 "pci_register_driver failed...ret=%d Failing load!.\n",
5739 * qla2x00_module_exit - Module cleanup.
5742 qla2x00_module_exit(void)
5744 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
5745 pci_unregister_driver(&qla2xxx_pci_driver
);
5746 qla2x00_release_firmware();
5747 kmem_cache_destroy(srb_cachep
);
5750 kmem_cache_destroy(ctx_cachep
);
5751 fc_release_transport(qla2xxx_transport_template
);
5752 fc_release_transport(qla2xxx_transport_vport_template
);
5755 module_init(qla2x00_module_init
);
5756 module_exit(qla2x00_module_exit
);
5758 MODULE_AUTHOR("QLogic Corporation");
5759 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5760 MODULE_LICENSE("GPL");
5761 MODULE_VERSION(QLA2XXX_VERSION
);
5762 MODULE_FIRMWARE(FW_FILE_ISP21XX
);
5763 MODULE_FIRMWARE(FW_FILE_ISP22XX
);
5764 MODULE_FIRMWARE(FW_FILE_ISP2300
);
5765 MODULE_FIRMWARE(FW_FILE_ISP2322
);
5766 MODULE_FIRMWARE(FW_FILE_ISP24XX
);
5767 MODULE_FIRMWARE(FW_FILE_ISP25XX
);