projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / qla2xxx / qla_isr.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_target.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <scsi/scsi_tcq.h>
13 #include <scsi/scsi_bsg_fc.h>
14 #include <scsi/scsi_eh.h>
15
16 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
17 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
18 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
19 static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
20 sts_entry_t *);
21
22 /**
23 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
24 * @irq:
25 * @dev_id: SCSI driver HA context
26 *
27 * Called by system whenever the host adapter generates an interrupt.
28 *
29 * Returns handled flag.
30 */
31 irqreturn_t
32 qla2100_intr_handler(int irq, void *dev_id)
33 {
34 scsi_qla_host_t *vha;
35 struct qla_hw_data *ha;
36 struct device_reg_2xxx __iomem *reg;
37 int status;
38 unsigned long iter;
39 uint16_t hccr;
40 uint16_t mb[4];
41 struct rsp_que *rsp;
42 unsigned long flags;
43
44 rsp = (struct rsp_que *) dev_id;
45 if (!rsp) {
46 ql_log(ql_log_info, NULL, 0x505d,
47 "%s: NULL response queue pointer.\n", __func__);
48 return (IRQ_NONE);
49 }
50
51 ha = rsp->hw;
52 reg = &ha->iobase->isp;
53 status = 0;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 vha = pci_get_drvdata(ha->pdev);
57 for (iter = 50; iter--; ) {
58 hccr = RD_REG_WORD(&reg->hccr);
59 if (hccr & HCCR_RISC_PAUSE) {
60 if (pci_channel_offline(ha->pdev))
61 break;
62
63 /*
64 * Issue a "HARD" reset in order for the RISC interrupt
65 * bit to be cleared. Schedule a big hammer to get
66 * out of the RISC PAUSED state.
67 */
68 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
69 RD_REG_WORD(&reg->hccr);
70
71 ha->isp_ops->fw_dump(vha, 1);
72 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
73 break;
74 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
75 break;
76
77 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
78 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
79 RD_REG_WORD(&reg->hccr);
80
81 /* Get mailbox data. */
82 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
83 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
84 qla2x00_mbx_completion(vha, mb[0]);
85 status |= MBX_INTERRUPT;
86 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
87 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
88 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
89 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
90 qla2x00_async_event(vha, rsp, mb);
91 } else {
92 /*EMPTY*/
93 ql_dbg(ql_dbg_async, vha, 0x5025,
94 "Unrecognized interrupt type (%d).\n",
95 mb[0]);
96 }
97 /* Release mailbox registers. */
98 WRT_REG_WORD(&reg->semaphore, 0);
99 RD_REG_WORD(&reg->semaphore);
100 } else {
101 qla2x00_process_response_queue(rsp);
102
103 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
104 RD_REG_WORD(&reg->hccr);
105 }
106 }
107 qla2x00_handle_mbx_completion(ha, status);
108 spin_unlock_irqrestore(&ha->hardware_lock, flags);
109
110 return (IRQ_HANDLED);
111 }
112
113 /**
114 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
115 * @irq:
116 * @dev_id: SCSI driver HA context
117 *
118 * Called by system whenever the host adapter generates an interrupt.
119 *
120 * Returns handled flag.
121 */
122 irqreturn_t
123 qla2300_intr_handler(int irq, void *dev_id)
124 {
125 scsi_qla_host_t *vha;
126 struct device_reg_2xxx __iomem *reg;
127 int status;
128 unsigned long iter;
129 uint32_t stat;
130 uint16_t hccr;
131 uint16_t mb[4];
132 struct rsp_que *rsp;
133 struct qla_hw_data *ha;
134 unsigned long flags;
135
136 rsp = (struct rsp_que *) dev_id;
137 if (!rsp) {
138 ql_log(ql_log_info, NULL, 0x5058,
139 "%s: NULL response queue pointer.\n", __func__);
140 return (IRQ_NONE);
141 }
142
143 ha = rsp->hw;
144 reg = &ha->iobase->isp;
145 status = 0;
146
147 spin_lock_irqsave(&ha->hardware_lock, flags);
148 vha = pci_get_drvdata(ha->pdev);
149 for (iter = 50; iter--; ) {
150 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
151 if (stat & HSR_RISC_PAUSED) {
152 if (unlikely(pci_channel_offline(ha->pdev)))
153 break;
154
155 hccr = RD_REG_WORD(&reg->hccr);
156 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
157 ql_log(ql_log_warn, vha, 0x5026,
158 "Parity error -- HCCR=%x, Dumping "
159 "firmware.\n", hccr);
160 else
161 ql_log(ql_log_warn, vha, 0x5027,
162 "RISC paused -- HCCR=%x, Dumping "
163 "firmware.\n", hccr);
164
165 /*
166 * Issue a "HARD" reset in order for the RISC
167 * interrupt bit to be cleared. Schedule a big
168 * hammer to get out of the RISC PAUSED state.
169 */
170 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
171 RD_REG_WORD(&reg->hccr);
172
173 ha->isp_ops->fw_dump(vha, 1);
174 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
175 break;
176 } else if ((stat & HSR_RISC_INT) == 0)
177 break;
178
179 switch (stat & 0xff) {
180 case 0x1:
181 case 0x2:
182 case 0x10:
183 case 0x11:
184 qla2x00_mbx_completion(vha, MSW(stat));
185 status |= MBX_INTERRUPT;
186
187 /* Release mailbox registers. */
188 WRT_REG_WORD(&reg->semaphore, 0);
189 break;
190 case 0x12:
191 mb[0] = MSW(stat);
192 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
193 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
194 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
195 qla2x00_async_event(vha, rsp, mb);
196 break;
197 case 0x13:
198 qla2x00_process_response_queue(rsp);
199 break;
200 case 0x15:
201 mb[0] = MBA_CMPLT_1_16BIT;
202 mb[1] = MSW(stat);
203 qla2x00_async_event(vha, rsp, mb);
204 break;
205 case 0x16:
206 mb[0] = MBA_SCSI_COMPLETION;
207 mb[1] = MSW(stat);
208 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
209 qla2x00_async_event(vha, rsp, mb);
210 break;
211 default:
212 ql_dbg(ql_dbg_async, vha, 0x5028,
213 "Unrecognized interrupt type (%d).\n", stat & 0xff);
214 break;
215 }
216 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
217 RD_REG_WORD_RELAXED(&reg->hccr);
218 }
219 qla2x00_handle_mbx_completion(ha, status);
220 spin_unlock_irqrestore(&ha->hardware_lock, flags);
221
222 return (IRQ_HANDLED);
223 }
224
225 /**
226 * qla2x00_mbx_completion() - Process mailbox command completions.
227 * @ha: SCSI driver HA context
228 * @mb0: Mailbox0 register
229 */
230 static void
231 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
232 {
233 uint16_t cnt;
234 uint32_t mboxes;
235 uint16_t __iomem *wptr;
236 struct qla_hw_data *ha = vha->hw;
237 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
238
239 /* Read all mbox registers? */
240 mboxes = (1 << ha->mbx_count) - 1;
241 if (!ha->mcp)
242 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
243 else
244 mboxes = ha->mcp->in_mb;
245
246 /* Load return mailbox registers. */
247 ha->flags.mbox_int = 1;
248 ha->mailbox_out[0] = mb0;
249 mboxes >>= 1;
250 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
251
252 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
253 if (IS_QLA2200(ha) && cnt == 8)
254 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
255 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
256 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
257 else if (mboxes & BIT_0)
258 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
259
260 wptr++;
261 mboxes >>= 1;
262 }
263 }
264
265 static void
266 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
267 {
268 static char *event[] =
269 { "Complete", "Request Notification", "Time Extension" };
270 int rval;
271 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
272 uint16_t __iomem *wptr;
273 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
274
275 /* Seed data -- mailbox1 -> mailbox7. */
276 wptr = (uint16_t __iomem *)&reg24->mailbox1;
277 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
278 mb[cnt] = RD_REG_WORD(wptr);
279
280 ql_dbg(ql_dbg_async, vha, 0x5021,
281 "Inter-Driver Communication %s -- "
282 "%04x %04x %04x %04x %04x %04x %04x.\n",
283 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
284 mb[4], mb[5], mb[6]);
285 if ((aen == MBA_IDC_COMPLETE && mb[1] >> 15)) {
286 vha->hw->flags.idc_compl_status = 1;
287 if (vha->hw->notify_dcbx_comp)
288 complete(&vha->hw->dcbx_comp);
289 }
290
291 /* Acknowledgement needed? [Notify && non-zero timeout]. */
292 timeout = (descr >> 8) & 0xf;
293 if (aen != MBA_IDC_NOTIFY || !timeout)
294 return;
295
296 ql_dbg(ql_dbg_async, vha, 0x5022,
297 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
298 vha->host_no, event[aen & 0xff], timeout);
299
300 rval = qla2x00_post_idc_ack_work(vha, mb);
301 if (rval != QLA_SUCCESS)
302 ql_log(ql_log_warn, vha, 0x5023,
303 "IDC failed to post ACK.\n");
304 }
305
306 #define LS_UNKNOWN 2
307 const char *
308 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
309 {
310 static const char * const link_speeds[] = {
311 "1", "2", "?", "4", "8", "16", "10"
312 };
313
314 if (IS_QLA2100(ha) || IS_QLA2200(ha))
315 return link_speeds[0];
316 else if (speed == 0x13)
317 return link_speeds[6];
318 else if (speed < 6)
319 return link_speeds[speed];
320 else
321 return link_speeds[LS_UNKNOWN];
322 }
323
324 static void
325 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
326 {
327 struct qla_hw_data *ha = vha->hw;
328
329 /*
330 * 8200 AEN Interpretation:
331 * mb[0] = AEN code
332 * mb[1] = AEN Reason code
333 * mb[2] = LSW of Peg-Halt Status-1 Register
334 * mb[6] = MSW of Peg-Halt Status-1 Register
335 * mb[3] = LSW of Peg-Halt Status-2 register
336 * mb[7] = MSW of Peg-Halt Status-2 register
337 * mb[4] = IDC Device-State Register value
338 * mb[5] = IDC Driver-Presence Register value
339 */
340 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
341 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
342 mb[0], mb[1], mb[2], mb[6]);
343 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
344 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
345 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
346
347 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
348 IDC_HEARTBEAT_FAILURE)) {
349 ha->flags.nic_core_hung = 1;
350 ql_log(ql_log_warn, vha, 0x5060,
351 "83XX: F/W Error Reported: Check if reset required.\n");
352
353 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
354 uint32_t protocol_engine_id, fw_err_code, err_level;
355
356 /*
357 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
358 * - PEG-Halt Status-1 Register:
359 * (LSW = mb[2], MSW = mb[6])
360 * Bits 0-7 = protocol-engine ID
361 * Bits 8-28 = f/w error code
362 * Bits 29-31 = Error-level
363 * Error-level 0x1 = Non-Fatal error
364 * Error-level 0x2 = Recoverable Fatal error
365 * Error-level 0x4 = UnRecoverable Fatal error
366 * - PEG-Halt Status-2 Register:
367 * (LSW = mb[3], MSW = mb[7])
368 */
369 protocol_engine_id = (mb[2] & 0xff);
370 fw_err_code = (((mb[2] & 0xff00) >> 8) |
371 ((mb[6] & 0x1fff) << 8));
372 err_level = ((mb[6] & 0xe000) >> 13);
373 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
374 "Register: protocol_engine_id=0x%x "
375 "fw_err_code=0x%x err_level=0x%x.\n",
376 protocol_engine_id, fw_err_code, err_level);
377 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
378 "Register: 0x%x%x.\n", mb[7], mb[3]);
379 if (err_level == ERR_LEVEL_NON_FATAL) {
380 ql_log(ql_log_warn, vha, 0x5063,
381 "Not a fatal error, f/w has recovered "
382 "iteself.\n");
383 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
384 ql_log(ql_log_fatal, vha, 0x5064,
385 "Recoverable Fatal error: Chip reset "
386 "required.\n");
387 qla83xx_schedule_work(vha,
388 QLA83XX_NIC_CORE_RESET);
389 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
390 ql_log(ql_log_fatal, vha, 0x5065,
391 "Unrecoverable Fatal error: Set FAILED "
392 "state, reboot required.\n");
393 qla83xx_schedule_work(vha,
394 QLA83XX_NIC_CORE_UNRECOVERABLE);
395 }
396 }
397
398 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
399 uint16_t peg_fw_state, nw_interface_link_up;
400 uint16_t nw_interface_signal_detect, sfp_status;
401 uint16_t htbt_counter, htbt_monitor_enable;
402 uint16_t sfp_additonal_info, sfp_multirate;
403 uint16_t sfp_tx_fault, link_speed, dcbx_status;
404
405 /*
406 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
407 * - PEG-to-FC Status Register:
408 * (LSW = mb[2], MSW = mb[6])
409 * Bits 0-7 = Peg-Firmware state
410 * Bit 8 = N/W Interface Link-up
411 * Bit 9 = N/W Interface signal detected
412 * Bits 10-11 = SFP Status
413 * SFP Status 0x0 = SFP+ transceiver not expected
414 * SFP Status 0x1 = SFP+ transceiver not present
415 * SFP Status 0x2 = SFP+ transceiver invalid
416 * SFP Status 0x3 = SFP+ transceiver present and
417 * valid
418 * Bits 12-14 = Heartbeat Counter
419 * Bit 15 = Heartbeat Monitor Enable
420 * Bits 16-17 = SFP Additional Info
421 * SFP info 0x0 = Unregocnized transceiver for
422 * Ethernet
423 * SFP info 0x1 = SFP+ brand validation failed
424 * SFP info 0x2 = SFP+ speed validation failed
425 * SFP info 0x3 = SFP+ access error
426 * Bit 18 = SFP Multirate
427 * Bit 19 = SFP Tx Fault
428 * Bits 20-22 = Link Speed
429 * Bits 23-27 = Reserved
430 * Bits 28-30 = DCBX Status
431 * DCBX Status 0x0 = DCBX Disabled
432 * DCBX Status 0x1 = DCBX Enabled
433 * DCBX Status 0x2 = DCBX Exchange error
434 * Bit 31 = Reserved
435 */
436 peg_fw_state = (mb[2] & 0x00ff);
437 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
438 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
439 sfp_status = ((mb[2] & 0x0c00) >> 10);
440 htbt_counter = ((mb[2] & 0x7000) >> 12);
441 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
442 sfp_additonal_info = (mb[6] & 0x0003);
443 sfp_multirate = ((mb[6] & 0x0004) >> 2);
444 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
445 link_speed = ((mb[6] & 0x0070) >> 4);
446 dcbx_status = ((mb[6] & 0x7000) >> 12);
447
448 ql_log(ql_log_warn, vha, 0x5066,
449 "Peg-to-Fc Status Register:\n"
450 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
451 "nw_interface_signal_detect=0x%x"
452 "\nsfp_statis=0x%x.\n ", peg_fw_state,
453 nw_interface_link_up, nw_interface_signal_detect,
454 sfp_status);
455 ql_log(ql_log_warn, vha, 0x5067,
456 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
457 "sfp_additonal_info=0x%x, sfp_multirate=0x%x.\n ",
458 htbt_counter, htbt_monitor_enable,
459 sfp_additonal_info, sfp_multirate);
460 ql_log(ql_log_warn, vha, 0x5068,
461 "sfp_tx_fault=0x%x, link_state=0x%x, "
462 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
463 dcbx_status);
464
465 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
466 }
467
468 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
469 ql_log(ql_log_warn, vha, 0x5069,
470 "Heartbeat Failure encountered, chip reset "
471 "required.\n");
472
473 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
474 }
475 }
476
477 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
478 ql_log(ql_log_info, vha, 0x506a,
479 "IDC Device-State changed = 0x%x.\n", mb[4]);
480 if (ha->flags.nic_core_reset_owner)
481 return;
482 qla83xx_schedule_work(vha, MBA_IDC_AEN);
483 }
484 }
485
486 int
487 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
488 {
489 struct qla_hw_data *ha = vha->hw;
490 scsi_qla_host_t *vp;
491 uint32_t vp_did;
492 unsigned long flags;
493 int ret = 0;
494
495 if (!ha->num_vhosts)
496 return ret;
497
498 spin_lock_irqsave(&ha->vport_slock, flags);
499 list_for_each_entry(vp, &ha->vp_list, list) {
500 vp_did = vp->d_id.b24;
501 if (vp_did == rscn_entry) {
502 ret = 1;
503 break;
504 }
505 }
506 spin_unlock_irqrestore(&ha->vport_slock, flags);
507
508 return ret;
509 }
510
511 /**
512 * qla2x00_async_event() - Process aynchronous events.
513 * @ha: SCSI driver HA context
514 * @mb: Mailbox registers (0 - 3)
515 */
516 void
517 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
518 {
519 uint16_t handle_cnt;
520 uint16_t cnt, mbx;
521 uint32_t handles[5];
522 struct qla_hw_data *ha = vha->hw;
523 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
524 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
525 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
526 uint32_t rscn_entry, host_pid, tmp_pid;
527 unsigned long flags;
528 fc_port_t *fcport = NULL;
529
530 /* Setup to process RIO completion. */
531 handle_cnt = 0;
532 if (IS_CNA_CAPABLE(ha))
533 goto skip_rio;
534 switch (mb[0]) {
535 case MBA_SCSI_COMPLETION:
536 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
537 handle_cnt = 1;
538 break;
539 case MBA_CMPLT_1_16BIT:
540 handles[0] = mb[1];
541 handle_cnt = 1;
542 mb[0] = MBA_SCSI_COMPLETION;
543 break;
544 case MBA_CMPLT_2_16BIT:
545 handles[0] = mb[1];
546 handles[1] = mb[2];
547 handle_cnt = 2;
548 mb[0] = MBA_SCSI_COMPLETION;
549 break;
550 case MBA_CMPLT_3_16BIT:
551 handles[0] = mb[1];
552 handles[1] = mb[2];
553 handles[2] = mb[3];
554 handle_cnt = 3;
555 mb[0] = MBA_SCSI_COMPLETION;
556 break;
557 case MBA_CMPLT_4_16BIT:
558 handles[0] = mb[1];
559 handles[1] = mb[2];
560 handles[2] = mb[3];
561 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
562 handle_cnt = 4;
563 mb[0] = MBA_SCSI_COMPLETION;
564 break;
565 case MBA_CMPLT_5_16BIT:
566 handles[0] = mb[1];
567 handles[1] = mb[2];
568 handles[2] = mb[3];
569 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
570 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
571 handle_cnt = 5;
572 mb[0] = MBA_SCSI_COMPLETION;
573 break;
574 case MBA_CMPLT_2_32BIT:
575 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
576 handles[1] = le32_to_cpu(
577 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
578 RD_MAILBOX_REG(ha, reg, 6));
579 handle_cnt = 2;
580 mb[0] = MBA_SCSI_COMPLETION;
581 break;
582 default:
583 break;
584 }
585 skip_rio:
586 switch (mb[0]) {
587 case MBA_SCSI_COMPLETION: /* Fast Post */
588 if (!vha->flags.online)
589 break;
590
591 for (cnt = 0; cnt < handle_cnt; cnt++)
592 qla2x00_process_completed_request(vha, rsp->req,
593 handles[cnt]);
594 break;
595
596 case MBA_RESET: /* Reset */
597 ql_dbg(ql_dbg_async, vha, 0x5002,
598 "Asynchronous RESET.\n");
599
600 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
601 break;
602
603 case MBA_SYSTEM_ERR: /* System Error */
604 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha)) ?
605 RD_REG_WORD(&reg24->mailbox7) : 0;
606 ql_log(ql_log_warn, vha, 0x5003,
607 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
608 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
609
610 ha->isp_ops->fw_dump(vha, 1);
611
612 if (IS_FWI2_CAPABLE(ha)) {
613 if (mb[1] == 0 && mb[2] == 0) {
614 ql_log(ql_log_fatal, vha, 0x5004,
615 "Unrecoverable Hardware Error: adapter "
616 "marked OFFLINE!\n");
617 vha->flags.online = 0;
618 vha->device_flags |= DFLG_DEV_FAILED;
619 } else {
620 /* Check to see if MPI timeout occurred */
621 if ((mbx & MBX_3) && (ha->flags.port0))
622 set_bit(MPI_RESET_NEEDED,
623 &vha->dpc_flags);
624
625 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
626 }
627 } else if (mb[1] == 0) {
628 ql_log(ql_log_fatal, vha, 0x5005,
629 "Unrecoverable Hardware Error: adapter marked "
630 "OFFLINE!\n");
631 vha->flags.online = 0;
632 vha->device_flags |= DFLG_DEV_FAILED;
633 } else
634 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
635 break;
636
637 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
638 ql_log(ql_log_warn, vha, 0x5006,
639 "ISP Request Transfer Error (%x).\n", mb[1]);
640
641 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
642 break;
643
644 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
645 ql_log(ql_log_warn, vha, 0x5007,
646 "ISP Response Transfer Error.\n");
647
648 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
649 break;
650
651 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
652 ql_dbg(ql_dbg_async, vha, 0x5008,
653 "Asynchronous WAKEUP_THRES.\n");
654
655 break;
656 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
657 ql_dbg(ql_dbg_async, vha, 0x5009,
658 "LIP occurred (%x).\n", mb[1]);
659
660 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
661 atomic_set(&vha->loop_state, LOOP_DOWN);
662 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
663 qla2x00_mark_all_devices_lost(vha, 1);
664 }
665
666 if (vha->vp_idx) {
667 atomic_set(&vha->vp_state, VP_FAILED);
668 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
669 }
670
671 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
672 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
673
674 vha->flags.management_server_logged_in = 0;
675 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
676 break;
677
678 case MBA_LOOP_UP: /* Loop Up Event */
679 if (IS_QLA2100(ha) || IS_QLA2200(ha))
680 ha->link_data_rate = PORT_SPEED_1GB;
681 else
682 ha->link_data_rate = mb[1];
683
684 ql_dbg(ql_dbg_async, vha, 0x500a,
685 "LOOP UP detected (%s Gbps).\n",
686 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
687
688 vha->flags.management_server_logged_in = 0;
689 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
690 break;
691
692 case MBA_LOOP_DOWN: /* Loop Down Event */
693 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
694 ? RD_REG_WORD(&reg24->mailbox4) : 0;
695 mbx = IS_QLA82XX(ha) ? RD_REG_WORD(&reg82->mailbox_out[4]) : mbx;
696 ql_dbg(ql_dbg_async, vha, 0x500b,
697 "LOOP DOWN detected (%x %x %x %x).\n",
698 mb[1], mb[2], mb[3], mbx);
699
700 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
701 atomic_set(&vha->loop_state, LOOP_DOWN);
702 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
703 vha->device_flags |= DFLG_NO_CABLE;
704 qla2x00_mark_all_devices_lost(vha, 1);
705 }
706
707 if (vha->vp_idx) {
708 atomic_set(&vha->vp_state, VP_FAILED);
709 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
710 }
711
712 vha->flags.management_server_logged_in = 0;
713 ha->link_data_rate = PORT_SPEED_UNKNOWN;
714 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
715 break;
716
717 case MBA_LIP_RESET: /* LIP reset occurred */
718 ql_dbg(ql_dbg_async, vha, 0x500c,
719 "LIP reset occurred (%x).\n", mb[1]);
720
721 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
722 atomic_set(&vha->loop_state, LOOP_DOWN);
723 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
724 qla2x00_mark_all_devices_lost(vha, 1);
725 }
726
727 if (vha->vp_idx) {
728 atomic_set(&vha->vp_state, VP_FAILED);
729 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
730 }
731
732 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
733
734 ha->operating_mode = LOOP;
735 vha->flags.management_server_logged_in = 0;
736 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
737 break;
738
739 /* case MBA_DCBX_COMPLETE: */
740 case MBA_POINT_TO_POINT: /* Point-to-Point */
741 if (IS_QLA2100(ha))
742 break;
743
744 if (IS_QLA81XX(ha) || IS_QLA82XX(ha) || IS_QLA8031(ha)) {
745 ql_dbg(ql_dbg_async, vha, 0x500d,
746 "DCBX Completed -- %04x %04x %04x.\n",
747 mb[1], mb[2], mb[3]);
748 if (ha->notify_dcbx_comp)
749 complete(&ha->dcbx_comp);
750
751 } else
752 ql_dbg(ql_dbg_async, vha, 0x500e,
753 "Asynchronous P2P MODE received.\n");
754
755 /*
756 * Until there's a transition from loop down to loop up, treat
757 * this as loop down only.
758 */
759 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
760 atomic_set(&vha->loop_state, LOOP_DOWN);
761 if (!atomic_read(&vha->loop_down_timer))
762 atomic_set(&vha->loop_down_timer,
763 LOOP_DOWN_TIME);
764 qla2x00_mark_all_devices_lost(vha, 1);
765 }
766
767 if (vha->vp_idx) {
768 atomic_set(&vha->vp_state, VP_FAILED);
769 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
770 }
771
772 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
773 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
774
775 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
776 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
777
778 ha->flags.gpsc_supported = 1;
779 vha->flags.management_server_logged_in = 0;
780 break;
781
782 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
783 if (IS_QLA2100(ha))
784 break;
785
786 ql_dbg(ql_dbg_async, vha, 0x500f,
787 "Configuration change detected: value=%x.\n", mb[1]);
788
789 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
790 atomic_set(&vha->loop_state, LOOP_DOWN);
791 if (!atomic_read(&vha->loop_down_timer))
792 atomic_set(&vha->loop_down_timer,
793 LOOP_DOWN_TIME);
794 qla2x00_mark_all_devices_lost(vha, 1);
795 }
796
797 if (vha->vp_idx) {
798 atomic_set(&vha->vp_state, VP_FAILED);
799 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
800 }
801
802 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
803 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
804 break;
805
806 case MBA_PORT_UPDATE: /* Port database update */
807 /*
808 * Handle only global and vn-port update events
809 *
810 * Relevant inputs:
811 * mb[1] = N_Port handle of changed port
812 * OR 0xffff for global event
813 * mb[2] = New login state
814 * 7 = Port logged out
815 * mb[3] = LSB is vp_idx, 0xff = all vps
816 *
817 * Skip processing if:
818 * Event is global, vp_idx is NOT all vps,
819 * vp_idx does not match
820 * Event is not global, vp_idx does not match
821 */
822 if (IS_QLA2XXX_MIDTYPE(ha) &&
823 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
824 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
825 break;
826
827 /* Global event -- port logout or port unavailable. */
828 if (mb[1] == 0xffff && mb[2] == 0x7) {
829 ql_dbg(ql_dbg_async, vha, 0x5010,
830 "Port unavailable %04x %04x %04x.\n",
831 mb[1], mb[2], mb[3]);
832 ql_log(ql_log_warn, vha, 0x505e,
833 "Link is offline.\n");
834
835 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
836 atomic_set(&vha->loop_state, LOOP_DOWN);
837 atomic_set(&vha->loop_down_timer,
838 LOOP_DOWN_TIME);
839 vha->device_flags |= DFLG_NO_CABLE;
840 qla2x00_mark_all_devices_lost(vha, 1);
841 }
842
843 if (vha->vp_idx) {
844 atomic_set(&vha->vp_state, VP_FAILED);
845 fc_vport_set_state(vha->fc_vport,
846 FC_VPORT_FAILED);
847 qla2x00_mark_all_devices_lost(vha, 1);
848 }
849
850 vha->flags.management_server_logged_in = 0;
851 ha->link_data_rate = PORT_SPEED_UNKNOWN;
852 break;
853 }
854
855 /*
856 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
857 * event etc. earlier indicating loop is down) then process
858 * it. Otherwise ignore it and Wait for RSCN to come in.
859 */
860 atomic_set(&vha->loop_down_timer, 0);
861 if (mb[1] != 0xffff || (mb[2] != 0x6 && mb[2] != 0x4)) {
862 ql_dbg(ql_dbg_async, vha, 0x5011,
863 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
864 mb[1], mb[2], mb[3]);
865
866 qlt_async_event(mb[0], vha, mb);
867 break;
868 }
869
870 ql_dbg(ql_dbg_async, vha, 0x5012,
871 "Port database changed %04x %04x %04x.\n",
872 mb[1], mb[2], mb[3]);
873 ql_log(ql_log_warn, vha, 0x505f,
874 "Link is operational (%s Gbps).\n",
875 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
876
877 /*
878 * Mark all devices as missing so we will login again.
879 */
880 atomic_set(&vha->loop_state, LOOP_UP);
881
882 qla2x00_mark_all_devices_lost(vha, 1);
883
884 if (vha->vp_idx == 0 && !qla_ini_mode_enabled(vha))
885 set_bit(SCR_PENDING, &vha->dpc_flags);
886
887 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
888 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
889
890 qlt_async_event(mb[0], vha, mb);
891 break;
892
893 case MBA_RSCN_UPDATE: /* State Change Registration */
894 /* Check if the Vport has issued a SCR */
895 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
896 break;
897 /* Only handle SCNs for our Vport index. */
898 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
899 break;
900
901 ql_dbg(ql_dbg_async, vha, 0x5013,
902 "RSCN database changed -- %04x %04x %04x.\n",
903 mb[1], mb[2], mb[3]);
904
905 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
906 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
907 | vha->d_id.b.al_pa;
908 if (rscn_entry == host_pid) {
909 ql_dbg(ql_dbg_async, vha, 0x5014,
910 "Ignoring RSCN update to local host "
911 "port ID (%06x).\n", host_pid);
912 break;
913 }
914
915 /* Ignore reserved bits from RSCN-payload. */
916 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
917
918 /* Skip RSCNs for virtual ports on the same physical port */
919 if (qla2x00_is_a_vp_did(vha, rscn_entry))
920 break;
921
922 /*
923 * Search for the rport related to this RSCN entry and mark it
924 * as lost.
925 */
926 list_for_each_entry(fcport, &vha->vp_fcports, list) {
927 if (atomic_read(&fcport->state) != FCS_ONLINE)
928 continue;
929 tmp_pid = fcport->d_id.b24;
930 if (fcport->d_id.b24 == rscn_entry) {
931 qla2x00_mark_device_lost(vha, fcport, 0, 0);
932 break;
933 }
934 }
935
936 atomic_set(&vha->loop_down_timer, 0);
937 vha->flags.management_server_logged_in = 0;
938
939 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
940 set_bit(RSCN_UPDATE, &vha->dpc_flags);
941 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
942 break;
943
944 /* case MBA_RIO_RESPONSE: */
945 case MBA_ZIO_RESPONSE:
946 ql_dbg(ql_dbg_async, vha, 0x5015,
947 "[R|Z]IO update completion.\n");
948
949 if (IS_FWI2_CAPABLE(ha))
950 qla24xx_process_response_queue(vha, rsp);
951 else
952 qla2x00_process_response_queue(rsp);
953 break;
954
955 case MBA_DISCARD_RND_FRAME:
956 ql_dbg(ql_dbg_async, vha, 0x5016,
957 "Discard RND Frame -- %04x %04x %04x.\n",
958 mb[1], mb[2], mb[3]);
959 break;
960
961 case MBA_TRACE_NOTIFICATION:
962 ql_dbg(ql_dbg_async, vha, 0x5017,
963 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
964 break;
965
966 case MBA_ISP84XX_ALERT:
967 ql_dbg(ql_dbg_async, vha, 0x5018,
968 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
969 mb[1], mb[2], mb[3]);
970
971 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
972 switch (mb[1]) {
973 case A84_PANIC_RECOVERY:
974 ql_log(ql_log_info, vha, 0x5019,
975 "Alert 84XX: panic recovery %04x %04x.\n",
976 mb[2], mb[3]);
977 break;
978 case A84_OP_LOGIN_COMPLETE:
979 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
980 ql_log(ql_log_info, vha, 0x501a,
981 "Alert 84XX: firmware version %x.\n",
982 ha->cs84xx->op_fw_version);
983 break;
984 case A84_DIAG_LOGIN_COMPLETE:
985 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
986 ql_log(ql_log_info, vha, 0x501b,
987 "Alert 84XX: diagnostic firmware version %x.\n",
988 ha->cs84xx->diag_fw_version);
989 break;
990 case A84_GOLD_LOGIN_COMPLETE:
991 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
992 ha->cs84xx->fw_update = 1;
993 ql_log(ql_log_info, vha, 0x501c,
994 "Alert 84XX: gold firmware version %x.\n",
995 ha->cs84xx->gold_fw_version);
996 break;
997 default:
998 ql_log(ql_log_warn, vha, 0x501d,
999 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
1000 mb[1], mb[2], mb[3]);
1001 }
1002 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1003 break;
1004 case MBA_DCBX_START:
1005 ql_dbg(ql_dbg_async, vha, 0x501e,
1006 "DCBX Started -- %04x %04x %04x.\n",
1007 mb[1], mb[2], mb[3]);
1008 break;
1009 case MBA_DCBX_PARAM_UPDATE:
1010 ql_dbg(ql_dbg_async, vha, 0x501f,
1011 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1012 mb[1], mb[2], mb[3]);
1013 break;
1014 case MBA_FCF_CONF_ERR:
1015 ql_dbg(ql_dbg_async, vha, 0x5020,
1016 "FCF Configuration Error -- %04x %04x %04x.\n",
1017 mb[1], mb[2], mb[3]);
1018 break;
1019 case MBA_IDC_NOTIFY:
1020 if (IS_QLA8031(vha->hw)) {
1021 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1022 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1023 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1024 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
1025 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
1026 /*
1027 * Extend loop down timer since port is active.
1028 */
1029 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1030 atomic_set(&vha->loop_down_timer,
1031 LOOP_DOWN_TIME);
1032 qla2xxx_wake_dpc(vha);
1033 }
1034 }
1035 case MBA_IDC_COMPLETE:
1036 if (ha->notify_lb_portup_comp)
1037 complete(&ha->lb_portup_comp);
1038 /* Fallthru */
1039 case MBA_IDC_TIME_EXT:
1040 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw))
1041 qla81xx_idc_event(vha, mb[0], mb[1]);
1042 break;
1043
1044 case MBA_IDC_AEN:
1045 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1046 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1047 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1048 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1049 qla83xx_handle_8200_aen(vha, mb);
1050 break;
1051
1052 default:
1053 ql_dbg(ql_dbg_async, vha, 0x5057,
1054 "Unknown AEN:%04x %04x %04x %04x\n",
1055 mb[0], mb[1], mb[2], mb[3]);
1056 }
1057
1058 qlt_async_event(mb[0], vha, mb);
1059
1060 if (!vha->vp_idx && ha->num_vhosts)
1061 qla2x00_alert_all_vps(rsp, mb);
1062 }
1063
1064 /**
1065 * qla2x00_process_completed_request() - Process a Fast Post response.
1066 * @ha: SCSI driver HA context
1067 * @index: SRB index
1068 */
1069 void
1070 qla2x00_process_completed_request(struct scsi_qla_host *vha,
1071 struct req_que *req, uint32_t index)
1072 {
1073 srb_t *sp;
1074 struct qla_hw_data *ha = vha->hw;
1075
1076 /* Validate handle. */
1077 if (index >= req->num_outstanding_cmds) {
1078 ql_log(ql_log_warn, vha, 0x3014,
1079 "Invalid SCSI command index (%x).\n", index);
1080
1081 if (IS_QLA82XX(ha))
1082 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1083 else
1084 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1085 return;
1086 }
1087
1088 sp = req->outstanding_cmds[index];
1089 if (sp) {
1090 /* Free outstanding command slot. */
1091 req->outstanding_cmds[index] = NULL;
1092
1093 /* Save ISP completion status */
1094 sp->done(ha, sp, DID_OK << 16);
1095 } else {
1096 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1097
1098 if (IS_QLA82XX(ha))
1099 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1100 else
1101 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1102 }
1103 }
1104
1105 srb_t *
1106 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1107 struct req_que *req, void *iocb)
1108 {
1109 struct qla_hw_data *ha = vha->hw;
1110 sts_entry_t *pkt = iocb;
1111 srb_t *sp = NULL;
1112 uint16_t index;
1113
1114 index = LSW(pkt->handle);
1115 if (index >= req->num_outstanding_cmds) {
1116 ql_log(ql_log_warn, vha, 0x5031,
1117 "Invalid command index (%x).\n", index);
1118 if (IS_QLA82XX(ha))
1119 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1120 else
1121 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1122 goto done;
1123 }
1124 sp = req->outstanding_cmds[index];
1125 if (!sp) {
1126 ql_log(ql_log_warn, vha, 0x5032,
1127 "Invalid completion handle (%x) -- timed-out.\n", index);
1128 return sp;
1129 }
1130 if (sp->handle != index) {
1131 ql_log(ql_log_warn, vha, 0x5033,
1132 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
1133 return NULL;
1134 }
1135
1136 req->outstanding_cmds[index] = NULL;
1137
1138 done:
1139 return sp;
1140 }
1141
1142 static void
1143 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1144 struct mbx_entry *mbx)
1145 {
1146 const char func[] = "MBX-IOCB";
1147 const char *type;
1148 fc_port_t *fcport;
1149 srb_t *sp;
1150 struct srb_iocb *lio;
1151 uint16_t *data;
1152 uint16_t status;
1153
1154 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1155 if (!sp)
1156 return;
1157
1158 lio = &sp->u.iocb_cmd;
1159 type = sp->name;
1160 fcport = sp->fcport;
1161 data = lio->u.logio.data;
1162
1163 data[0] = MBS_COMMAND_ERROR;
1164 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1165 QLA_LOGIO_LOGIN_RETRIED : 0;
1166 if (mbx->entry_status) {
1167 ql_dbg(ql_dbg_async, vha, 0x5043,
1168 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
1169 "entry-status=%x status=%x state-flag=%x "
1170 "status-flags=%x.\n", type, sp->handle,
1171 fcport->d_id.b.domain, fcport->d_id.b.area,
1172 fcport->d_id.b.al_pa, mbx->entry_status,
1173 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
1174 le16_to_cpu(mbx->status_flags));
1175
1176 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
1177 (uint8_t *)mbx, sizeof(*mbx));
1178
1179 goto logio_done;
1180 }
1181
1182 status = le16_to_cpu(mbx->status);
1183 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
1184 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1185 status = 0;
1186 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
1187 ql_dbg(ql_dbg_async, vha, 0x5045,
1188 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1189 type, sp->handle, fcport->d_id.b.domain,
1190 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1191 le16_to_cpu(mbx->mb1));
1192
1193 data[0] = MBS_COMMAND_COMPLETE;
1194 if (sp->type == SRB_LOGIN_CMD) {
1195 fcport->port_type = FCT_TARGET;
1196 if (le16_to_cpu(mbx->mb1) & BIT_0)
1197 fcport->port_type = FCT_INITIATOR;
1198 else if (le16_to_cpu(mbx->mb1) & BIT_1)
1199 fcport->flags |= FCF_FCP2_DEVICE;
1200 }
1201 goto logio_done;
1202 }
1203
1204 data[0] = le16_to_cpu(mbx->mb0);
1205 switch (data[0]) {
1206 case MBS_PORT_ID_USED:
1207 data[1] = le16_to_cpu(mbx->mb1);
1208 break;
1209 case MBS_LOOP_ID_USED:
1210 break;
1211 default:
1212 data[0] = MBS_COMMAND_ERROR;
1213 break;
1214 }
1215
1216 ql_log(ql_log_warn, vha, 0x5046,
1217 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1218 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1219 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1220 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
1221 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
1222 le16_to_cpu(mbx->mb7));
1223
1224 logio_done:
1225 sp->done(vha, sp, 0);
1226 }
1227
1228 static void
1229 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1230 sts_entry_t *pkt, int iocb_type)
1231 {
1232 const char func[] = "CT_IOCB";
1233 const char *type;
1234 srb_t *sp;
1235 struct fc_bsg_job *bsg_job;
1236 uint16_t comp_status;
1237 int res;
1238
1239 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1240 if (!sp)
1241 return;
1242
1243 bsg_job = sp->u.bsg_job;
1244
1245 type = "ct pass-through";
1246
1247 comp_status = le16_to_cpu(pkt->comp_status);
1248
1249 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1250 * fc payload to the caller
1251 */
1252 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1253 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1254
1255 if (comp_status != CS_COMPLETE) {
1256 if (comp_status == CS_DATA_UNDERRUN) {
1257 res = DID_OK << 16;
1258 bsg_job->reply->reply_payload_rcv_len =
1259 le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
1260
1261 ql_log(ql_log_warn, vha, 0x5048,
1262 "CT pass-through-%s error "
1263 "comp_status-status=0x%x total_byte = 0x%x.\n",
1264 type, comp_status,
1265 bsg_job->reply->reply_payload_rcv_len);
1266 } else {
1267 ql_log(ql_log_warn, vha, 0x5049,
1268 "CT pass-through-%s error "
1269 "comp_status-status=0x%x.\n", type, comp_status);
1270 res = DID_ERROR << 16;
1271 bsg_job->reply->reply_payload_rcv_len = 0;
1272 }
1273 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
1274 (uint8_t *)pkt, sizeof(*pkt));
1275 } else {
1276 res = DID_OK << 16;
1277 bsg_job->reply->reply_payload_rcv_len =
1278 bsg_job->reply_payload.payload_len;
1279 bsg_job->reply_len = 0;
1280 }
1281
1282 sp->done(vha, sp, res);
1283 }
1284
1285 static void
1286 qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1287 struct sts_entry_24xx *pkt, int iocb_type)
1288 {
1289 const char func[] = "ELS_CT_IOCB";
1290 const char *type;
1291 srb_t *sp;
1292 struct fc_bsg_job *bsg_job;
1293 uint16_t comp_status;
1294 uint32_t fw_status[3];
1295 uint8_t* fw_sts_ptr;
1296 int res;
1297
1298 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1299 if (!sp)
1300 return;
1301 bsg_job = sp->u.bsg_job;
1302
1303 type = NULL;
1304 switch (sp->type) {
1305 case SRB_ELS_CMD_RPT:
1306 case SRB_ELS_CMD_HST:
1307 type = "els";
1308 break;
1309 case SRB_CT_CMD:
1310 type = "ct pass-through";
1311 break;
1312 default:
1313 ql_dbg(ql_dbg_user, vha, 0x503e,
1314 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
1315 return;
1316 }
1317
1318 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1319 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
1320 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
1321
1322 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1323 * fc payload to the caller
1324 */
1325 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1326 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1327
1328 if (comp_status != CS_COMPLETE) {
1329 if (comp_status == CS_DATA_UNDERRUN) {
1330 res = DID_OK << 16;
1331 bsg_job->reply->reply_payload_rcv_len =
1332 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
1333
1334 ql_dbg(ql_dbg_user, vha, 0x503f,
1335 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
1336 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
1337 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1338 le16_to_cpu(((struct els_sts_entry_24xx *)
1339 pkt)->total_byte_count));
1340 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1341 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1342 }
1343 else {
1344 ql_dbg(ql_dbg_user, vha, 0x5040,
1345 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
1346 "error subcode 1=0x%x error subcode 2=0x%x.\n",
1347 type, sp->handle, comp_status,
1348 le16_to_cpu(((struct els_sts_entry_24xx *)
1349 pkt)->error_subcode_1),
1350 le16_to_cpu(((struct els_sts_entry_24xx *)
1351 pkt)->error_subcode_2));
1352 res = DID_ERROR << 16;
1353 bsg_job->reply->reply_payload_rcv_len = 0;
1354 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1355 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1356 }
1357 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
1358 (uint8_t *)pkt, sizeof(*pkt));
1359 }
1360 else {
1361 res = DID_OK << 16;
1362 bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
1363 bsg_job->reply_len = 0;
1364 }
1365
1366 sp->done(vha, sp, res);
1367 }
1368
1369 static void
1370 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1371 struct logio_entry_24xx *logio)
1372 {
1373 const char func[] = "LOGIO-IOCB";
1374 const char *type;
1375 fc_port_t *fcport;
1376 srb_t *sp;
1377 struct srb_iocb *lio;
1378 uint16_t *data;
1379 uint32_t iop[2];
1380
1381 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1382 if (!sp)
1383 return;
1384
1385 lio = &sp->u.iocb_cmd;
1386 type = sp->name;
1387 fcport = sp->fcport;
1388 data = lio->u.logio.data;
1389
1390 data[0] = MBS_COMMAND_ERROR;
1391 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1392 QLA_LOGIO_LOGIN_RETRIED : 0;
1393 if (logio->entry_status) {
1394 ql_log(ql_log_warn, fcport->vha, 0x5034,
1395 "Async-%s error entry - hdl=%x"
1396 "portid=%02x%02x%02x entry-status=%x.\n",
1397 type, sp->handle, fcport->d_id.b.domain,
1398 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1399 logio->entry_status);
1400 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
1401 (uint8_t *)logio, sizeof(*logio));
1402
1403 goto logio_done;
1404 }
1405
1406 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
1407 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
1408 "Async-%s complete - hdl=%x portid=%02x%02x%02x "
1409 "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain,
1410 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1411 le32_to_cpu(logio->io_parameter[0]));
1412
1413 data[0] = MBS_COMMAND_COMPLETE;
1414 if (sp->type != SRB_LOGIN_CMD)
1415 goto logio_done;
1416
1417 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1418 if (iop[0] & BIT_4) {
1419 fcport->port_type = FCT_TARGET;
1420 if (iop[0] & BIT_8)
1421 fcport->flags |= FCF_FCP2_DEVICE;
1422 } else if (iop[0] & BIT_5)
1423 fcport->port_type = FCT_INITIATOR;
1424
1425 if (iop[0] & BIT_7)
1426 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1427
1428 if (logio->io_parameter[7] || logio->io_parameter[8])
1429 fcport->supported_classes |= FC_COS_CLASS2;
1430 if (logio->io_parameter[9] || logio->io_parameter[10])
1431 fcport->supported_classes |= FC_COS_CLASS3;
1432
1433 goto logio_done;
1434 }
1435
1436 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1437 iop[1] = le32_to_cpu(logio->io_parameter[1]);
1438 switch (iop[0]) {
1439 case LSC_SCODE_PORTID_USED:
1440 data[0] = MBS_PORT_ID_USED;
1441 data[1] = LSW(iop[1]);
1442 break;
1443 case LSC_SCODE_NPORT_USED:
1444 data[0] = MBS_LOOP_ID_USED;
1445 break;
1446 default:
1447 data[0] = MBS_COMMAND_ERROR;
1448 break;
1449 }
1450
1451 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
1452 "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x "
1453 "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain,
1454 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1455 le16_to_cpu(logio->comp_status),
1456 le32_to_cpu(logio->io_parameter[0]),
1457 le32_to_cpu(logio->io_parameter[1]));
1458
1459 logio_done:
1460 sp->done(vha, sp, 0);
1461 }
1462
1463 static void
1464 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1465 struct tsk_mgmt_entry *tsk)
1466 {
1467 const char func[] = "TMF-IOCB";
1468 const char *type;
1469 fc_port_t *fcport;
1470 srb_t *sp;
1471 struct srb_iocb *iocb;
1472 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
1473 int error = 1;
1474
1475 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1476 if (!sp)
1477 return;
1478
1479 iocb = &sp->u.iocb_cmd;
1480 type = sp->name;
1481 fcport = sp->fcport;
1482
1483 if (sts->entry_status) {
1484 ql_log(ql_log_warn, fcport->vha, 0x5038,
1485 "Async-%s error - hdl=%x entry-status(%x).\n",
1486 type, sp->handle, sts->entry_status);
1487 } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
1488 ql_log(ql_log_warn, fcport->vha, 0x5039,
1489 "Async-%s error - hdl=%x completion status(%x).\n",
1490 type, sp->handle, sts->comp_status);
1491 } else if (!(le16_to_cpu(sts->scsi_status) &
1492 SS_RESPONSE_INFO_LEN_VALID)) {
1493 ql_log(ql_log_warn, fcport->vha, 0x503a,
1494 "Async-%s error - hdl=%x no response info(%x).\n",
1495 type, sp->handle, sts->scsi_status);
1496 } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
1497 ql_log(ql_log_warn, fcport->vha, 0x503b,
1498 "Async-%s error - hdl=%x not enough response(%d).\n",
1499 type, sp->handle, sts->rsp_data_len);
1500 } else if (sts->data[3]) {
1501 ql_log(ql_log_warn, fcport->vha, 0x503c,
1502 "Async-%s error - hdl=%x response(%x).\n",
1503 type, sp->handle, sts->data[3]);
1504 } else {
1505 error = 0;
1506 }
1507
1508 if (error) {
1509 iocb->u.tmf.data = error;
1510 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
1511 (uint8_t *)sts, sizeof(*sts));
1512 }
1513
1514 sp->done(vha, sp, 0);
1515 }
1516
1517 /**
1518 * qla2x00_process_response_queue() - Process response queue entries.
1519 * @ha: SCSI driver HA context
1520 */
1521 void
1522 qla2x00_process_response_queue(struct rsp_que *rsp)
1523 {
1524 struct scsi_qla_host *vha;
1525 struct qla_hw_data *ha = rsp->hw;
1526 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1527 sts_entry_t *pkt;
1528 uint16_t handle_cnt;
1529 uint16_t cnt;
1530
1531 vha = pci_get_drvdata(ha->pdev);
1532
1533 if (!vha->flags.online)
1534 return;
1535
1536 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
1537 pkt = (sts_entry_t *)rsp->ring_ptr;
1538
1539 rsp->ring_index++;
1540 if (rsp->ring_index == rsp->length) {
1541 rsp->ring_index = 0;
1542 rsp->ring_ptr = rsp->ring;
1543 } else {
1544 rsp->ring_ptr++;
1545 }
1546
1547 if (pkt->entry_status != 0) {
1548 qla2x00_error_entry(vha, rsp, pkt);
1549 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1550 wmb();
1551 continue;
1552 }
1553
1554 switch (pkt->entry_type) {
1555 case STATUS_TYPE:
1556 qla2x00_status_entry(vha, rsp, pkt);
1557 break;
1558 case STATUS_TYPE_21:
1559 handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
1560 for (cnt = 0; cnt < handle_cnt; cnt++) {
1561 qla2x00_process_completed_request(vha, rsp->req,
1562 ((sts21_entry_t *)pkt)->handle[cnt]);
1563 }
1564 break;
1565 case STATUS_TYPE_22:
1566 handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
1567 for (cnt = 0; cnt < handle_cnt; cnt++) {
1568 qla2x00_process_completed_request(vha, rsp->req,
1569 ((sts22_entry_t *)pkt)->handle[cnt]);
1570 }
1571 break;
1572 case STATUS_CONT_TYPE:
1573 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
1574 break;
1575 case MBX_IOCB_TYPE:
1576 qla2x00_mbx_iocb_entry(vha, rsp->req,
1577 (struct mbx_entry *)pkt);
1578 break;
1579 case CT_IOCB_TYPE:
1580 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
1581 break;
1582 default:
1583 /* Type Not Supported. */
1584 ql_log(ql_log_warn, vha, 0x504a,
1585 "Received unknown response pkt type %x "
1586 "entry status=%x.\n",
1587 pkt->entry_type, pkt->entry_status);
1588 break;
1589 }
1590 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1591 wmb();
1592 }
1593
1594 /* Adjust ring index */
1595 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1596 }
1597
1598 static inline void
1599 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
1600 uint32_t sense_len, struct rsp_que *rsp, int res)
1601 {
1602 struct scsi_qla_host *vha = sp->fcport->vha;
1603 struct scsi_cmnd *cp = GET_CMD_SP(sp);
1604 uint32_t track_sense_len;
1605
1606 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
1607 sense_len = SCSI_SENSE_BUFFERSIZE;
1608
1609 SET_CMD_SENSE_LEN(sp, sense_len);
1610 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
1611 track_sense_len = sense_len;
1612
1613 if (sense_len > par_sense_len)
1614 sense_len = par_sense_len;
1615
1616 memcpy(cp->sense_buffer, sense_data, sense_len);
1617
1618 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
1619 track_sense_len -= sense_len;
1620 SET_CMD_SENSE_LEN(sp, track_sense_len);
1621
1622 if (track_sense_len != 0) {
1623 rsp->status_srb = sp;
1624 cp->result = res;
1625 }
1626
1627 if (sense_len) {
1628 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
1629 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
1630 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
1631 cp);
1632 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
1633 cp->sense_buffer, sense_len);
1634 }
1635 }
1636
1637 struct scsi_dif_tuple {
1638 __be16 guard; /* Checksum */
1639 __be16 app_tag; /* APPL identifier */
1640 __be32 ref_tag; /* Target LBA or indirect LBA */
1641 };
1642
1643 /*
1644 * Checks the guard or meta-data for the type of error
1645 * detected by the HBA. In case of errors, we set the
1646 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
1647 * to indicate to the kernel that the HBA detected error.
1648 */
1649 static inline int
1650 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
1651 {
1652 struct scsi_qla_host *vha = sp->fcport->vha;
1653 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1654 uint8_t *ap = &sts24->data[12];
1655 uint8_t *ep = &sts24->data[20];
1656 uint32_t e_ref_tag, a_ref_tag;
1657 uint16_t e_app_tag, a_app_tag;
1658 uint16_t e_guard, a_guard;
1659
1660 /*
1661 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
1662 * would make guard field appear at offset 2
1663 */
1664 a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
1665 a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
1666 a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
1667 e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
1668 e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
1669 e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
1670
1671 ql_dbg(ql_dbg_io, vha, 0x3023,
1672 "iocb(s) %p Returned STATUS.\n", sts24);
1673
1674 ql_dbg(ql_dbg_io, vha, 0x3024,
1675 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
1676 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
1677 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
1678 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
1679 a_app_tag, e_app_tag, a_guard, e_guard);
1680
1681 /*
1682 * Ignore sector if:
1683 * For type 3: ref & app tag is all 'f's
1684 * For type 0,1,2: app tag is all 'f's
1685 */
1686 if ((a_app_tag == 0xffff) &&
1687 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
1688 (a_ref_tag == 0xffffffff))) {
1689 uint32_t blocks_done, resid;
1690 sector_t lba_s = scsi_get_lba(cmd);
1691
1692 /* 2TB boundary case covered automatically with this */
1693 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
1694
1695 resid = scsi_bufflen(cmd) - (blocks_done *
1696 cmd->device->sector_size);
1697
1698 scsi_set_resid(cmd, resid);
1699 cmd->result = DID_OK << 16;
1700
1701 /* Update protection tag */
1702 if (scsi_prot_sg_count(cmd)) {
1703 uint32_t i, j = 0, k = 0, num_ent;
1704 struct scatterlist *sg;
1705 struct sd_dif_tuple *spt;
1706
1707 /* Patch the corresponding protection tags */
1708 scsi_for_each_prot_sg(cmd, sg,
1709 scsi_prot_sg_count(cmd), i) {
1710 num_ent = sg_dma_len(sg) / 8;
1711 if (k + num_ent < blocks_done) {
1712 k += num_ent;
1713 continue;
1714 }
1715 j = blocks_done - k - 1;
1716 k = blocks_done;
1717 break;
1718 }
1719
1720 if (k != blocks_done) {
1721 ql_log(ql_log_warn, vha, 0x302f,
1722 "unexpected tag values tag:lba=%x:%llx)\n",
1723 e_ref_tag, (unsigned long long)lba_s);
1724 return 1;
1725 }
1726
1727 spt = page_address(sg_page(sg)) + sg->offset;
1728 spt += j;
1729
1730 spt->app_tag = 0xffff;
1731 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
1732 spt->ref_tag = 0xffffffff;
1733 }
1734
1735 return 0;
1736 }
1737
1738 /* check guard */
1739 if (e_guard != a_guard) {
1740 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1741 0x10, 0x1);
1742 set_driver_byte(cmd, DRIVER_SENSE);
1743 set_host_byte(cmd, DID_ABORT);
1744 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
1745 return 1;
1746 }
1747
1748 /* check ref tag */
1749 if (e_ref_tag != a_ref_tag) {
1750 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1751 0x10, 0x3);
1752 set_driver_byte(cmd, DRIVER_SENSE);
1753 set_host_byte(cmd, DID_ABORT);
1754 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
1755 return 1;
1756 }
1757
1758 /* check appl tag */
1759 if (e_app_tag != a_app_tag) {
1760 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1761 0x10, 0x2);
1762 set_driver_byte(cmd, DRIVER_SENSE);
1763 set_host_byte(cmd, DID_ABORT);
1764 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
1765 return 1;
1766 }
1767
1768 return 1;
1769 }
1770
1771 static void
1772 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
1773 struct req_que *req, uint32_t index)
1774 {
1775 struct qla_hw_data *ha = vha->hw;
1776 srb_t *sp;
1777 uint16_t comp_status;
1778 uint16_t scsi_status;
1779 uint16_t thread_id;
1780 uint32_t rval = EXT_STATUS_OK;
1781 struct fc_bsg_job *bsg_job = NULL;
1782 sts_entry_t *sts;
1783 struct sts_entry_24xx *sts24;
1784 sts = (sts_entry_t *) pkt;
1785 sts24 = (struct sts_entry_24xx *) pkt;
1786
1787 /* Validate handle. */
1788 if (index >= req->num_outstanding_cmds) {
1789 ql_log(ql_log_warn, vha, 0x70af,
1790 "Invalid SCSI completion handle 0x%x.\n", index);
1791 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1792 return;
1793 }
1794
1795 sp = req->outstanding_cmds[index];
1796 if (sp) {
1797 /* Free outstanding command slot. */
1798 req->outstanding_cmds[index] = NULL;
1799 bsg_job = sp->u.bsg_job;
1800 } else {
1801 ql_log(ql_log_warn, vha, 0x70b0,
1802 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
1803 req->id, index);
1804
1805 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1806 return;
1807 }
1808
1809 if (IS_FWI2_CAPABLE(ha)) {
1810 comp_status = le16_to_cpu(sts24->comp_status);
1811 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
1812 } else {
1813 comp_status = le16_to_cpu(sts->comp_status);
1814 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
1815 }
1816
1817 thread_id = bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
1818 switch (comp_status) {
1819 case CS_COMPLETE:
1820 if (scsi_status == 0) {
1821 bsg_job->reply->reply_payload_rcv_len =
1822 bsg_job->reply_payload.payload_len;
1823 rval = EXT_STATUS_OK;
1824 }
1825 goto done;
1826
1827 case CS_DATA_OVERRUN:
1828 ql_dbg(ql_dbg_user, vha, 0x70b1,
1829 "Command completed with date overrun thread_id=%d\n",
1830 thread_id);
1831 rval = EXT_STATUS_DATA_OVERRUN;
1832 break;
1833
1834 case CS_DATA_UNDERRUN:
1835 ql_dbg(ql_dbg_user, vha, 0x70b2,
1836 "Command completed with date underrun thread_id=%d\n",
1837 thread_id);
1838 rval = EXT_STATUS_DATA_UNDERRUN;
1839 break;
1840 case CS_BIDIR_RD_OVERRUN:
1841 ql_dbg(ql_dbg_user, vha, 0x70b3,
1842 "Command completed with read data overrun thread_id=%d\n",
1843 thread_id);
1844 rval = EXT_STATUS_DATA_OVERRUN;
1845 break;
1846
1847 case CS_BIDIR_RD_WR_OVERRUN:
1848 ql_dbg(ql_dbg_user, vha, 0x70b4,
1849 "Command completed with read and write data overrun "
1850 "thread_id=%d\n", thread_id);
1851 rval = EXT_STATUS_DATA_OVERRUN;
1852 break;
1853
1854 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
1855 ql_dbg(ql_dbg_user, vha, 0x70b5,
1856 "Command completed with read data over and write data "
1857 "underrun thread_id=%d\n", thread_id);
1858 rval = EXT_STATUS_DATA_OVERRUN;
1859 break;
1860
1861 case CS_BIDIR_RD_UNDERRUN:
1862 ql_dbg(ql_dbg_user, vha, 0x70b6,
1863 "Command completed with read data data underrun "
1864 "thread_id=%d\n", thread_id);
1865 rval = EXT_STATUS_DATA_UNDERRUN;
1866 break;
1867
1868 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
1869 ql_dbg(ql_dbg_user, vha, 0x70b7,
1870 "Command completed with read data under and write data "
1871 "overrun thread_id=%d\n", thread_id);
1872 rval = EXT_STATUS_DATA_UNDERRUN;
1873 break;
1874
1875 case CS_BIDIR_RD_WR_UNDERRUN:
1876 ql_dbg(ql_dbg_user, vha, 0x70b8,
1877 "Command completed with read and write data underrun "
1878 "thread_id=%d\n", thread_id);
1879 rval = EXT_STATUS_DATA_UNDERRUN;
1880 break;
1881
1882 case CS_BIDIR_DMA:
1883 ql_dbg(ql_dbg_user, vha, 0x70b9,
1884 "Command completed with data DMA error thread_id=%d\n",
1885 thread_id);
1886 rval = EXT_STATUS_DMA_ERR;
1887 break;
1888
1889 case CS_TIMEOUT:
1890 ql_dbg(ql_dbg_user, vha, 0x70ba,
1891 "Command completed with timeout thread_id=%d\n",
1892 thread_id);
1893 rval = EXT_STATUS_TIMEOUT;
1894 break;
1895 default:
1896 ql_dbg(ql_dbg_user, vha, 0x70bb,
1897 "Command completed with completion status=0x%x "
1898 "thread_id=%d\n", comp_status, thread_id);
1899 rval = EXT_STATUS_ERR;
1900 break;
1901 }
1902 bsg_job->reply->reply_payload_rcv_len = 0;
1903
1904 done:
1905 /* Return the vendor specific reply to API */
1906 bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
1907 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1908 /* Always return DID_OK, bsg will send the vendor specific response
1909 * in this case only */
1910 sp->done(vha, sp, (DID_OK << 6));
1911
1912 }
1913
1914 /**
1915 * qla2x00_status_entry() - Process a Status IOCB entry.
1916 * @ha: SCSI driver HA context
1917 * @pkt: Entry pointer
1918 */
1919 static void
1920 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1921 {
1922 srb_t *sp;
1923 fc_port_t *fcport;
1924 struct scsi_cmnd *cp;
1925 sts_entry_t *sts;
1926 struct sts_entry_24xx *sts24;
1927 uint16_t comp_status;
1928 uint16_t scsi_status;
1929 uint16_t ox_id;
1930 uint8_t lscsi_status;
1931 int32_t resid;
1932 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
1933 fw_resid_len;
1934 uint8_t *rsp_info, *sense_data;
1935 struct qla_hw_data *ha = vha->hw;
1936 uint32_t handle;
1937 uint16_t que;
1938 struct req_que *req;
1939 int logit = 1;
1940 int res = 0;
1941 uint16_t state_flags = 0;
1942
1943 sts = (sts_entry_t *) pkt;
1944 sts24 = (struct sts_entry_24xx *) pkt;
1945 if (IS_FWI2_CAPABLE(ha)) {
1946 comp_status = le16_to_cpu(sts24->comp_status);
1947 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
1948 state_flags = le16_to_cpu(sts24->state_flags);
1949 } else {
1950 comp_status = le16_to_cpu(sts->comp_status);
1951 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
1952 }
1953 handle = (uint32_t) LSW(sts->handle);
1954 que = MSW(sts->handle);
1955 req = ha->req_q_map[que];
1956
1957 /* Validate handle. */
1958 if (handle < req->num_outstanding_cmds)
1959 sp = req->outstanding_cmds[handle];
1960 else
1961 sp = NULL;
1962
1963 if (sp == NULL) {
1964 ql_dbg(ql_dbg_io, vha, 0x3017,
1965 "Invalid status handle (0x%x).\n", sts->handle);
1966
1967 if (IS_QLA82XX(ha))
1968 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1969 else
1970 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1971 qla2xxx_wake_dpc(vha);
1972 return;
1973 }
1974
1975 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
1976 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
1977 return;
1978 }
1979
1980 /* Fast path completion. */
1981 if (comp_status == CS_COMPLETE && scsi_status == 0) {
1982 qla2x00_do_host_ramp_up(vha);
1983 qla2x00_process_completed_request(vha, req, handle);
1984
1985 return;
1986 }
1987
1988 req->outstanding_cmds[handle] = NULL;
1989 cp = GET_CMD_SP(sp);
1990 if (cp == NULL) {
1991 ql_dbg(ql_dbg_io, vha, 0x3018,
1992 "Command already returned (0x%x/%p).\n",
1993 sts->handle, sp);
1994
1995 return;
1996 }
1997
1998 lscsi_status = scsi_status & STATUS_MASK;
1999
2000 fcport = sp->fcport;
2001
2002 ox_id = 0;
2003 sense_len = par_sense_len = rsp_info_len = resid_len =
2004 fw_resid_len = 0;
2005 if (IS_FWI2_CAPABLE(ha)) {
2006 if (scsi_status & SS_SENSE_LEN_VALID)
2007 sense_len = le32_to_cpu(sts24->sense_len);
2008 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2009 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2010 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2011 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2012 if (comp_status == CS_DATA_UNDERRUN)
2013 fw_resid_len = le32_to_cpu(sts24->residual_len);
2014 rsp_info = sts24->data;
2015 sense_data = sts24->data;
2016 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
2017 ox_id = le16_to_cpu(sts24->ox_id);
2018 par_sense_len = sizeof(sts24->data);
2019 } else {
2020 if (scsi_status & SS_SENSE_LEN_VALID)
2021 sense_len = le16_to_cpu(sts->req_sense_length);
2022 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2023 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
2024 resid_len = le32_to_cpu(sts->residual_length);
2025 rsp_info = sts->rsp_info;
2026 sense_data = sts->req_sense_data;
2027 par_sense_len = sizeof(sts->req_sense_data);
2028 }
2029
2030 /* Check for any FCP transport errors. */
2031 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
2032 /* Sense data lies beyond any FCP RESPONSE data. */
2033 if (IS_FWI2_CAPABLE(ha)) {
2034 sense_data += rsp_info_len;
2035 par_sense_len -= rsp_info_len;
2036 }
2037 if (rsp_info_len > 3 && rsp_info[3]) {
2038 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
2039 "FCP I/O protocol failure (0x%x/0x%x).\n",
2040 rsp_info_len, rsp_info[3]);
2041
2042 res = DID_BUS_BUSY << 16;
2043 goto out;
2044 }
2045 }
2046
2047 /* Check for overrun. */
2048 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2049 scsi_status & SS_RESIDUAL_OVER)
2050 comp_status = CS_DATA_OVERRUN;
2051
2052 /*
2053 * Based on Host and scsi status generate status code for Linux
2054 */
2055 switch (comp_status) {
2056 case CS_COMPLETE:
2057 case CS_QUEUE_FULL:
2058 if (scsi_status == 0) {
2059 res = DID_OK << 16;
2060 break;
2061 }
2062 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
2063 resid = resid_len;
2064 scsi_set_resid(cp, resid);
2065
2066 if (!lscsi_status &&
2067 ((unsigned)(scsi_bufflen(cp) - resid) <
2068 cp->underflow)) {
2069 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
2070 "Mid-layer underflow "
2071 "detected (0x%x of 0x%x bytes).\n",
2072 resid, scsi_bufflen(cp));
2073
2074 res = DID_ERROR << 16;
2075 break;
2076 }
2077 }
2078 res = DID_OK << 16 | lscsi_status;
2079
2080 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
2081 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
2082 "QUEUE FULL detected.\n");
2083 break;
2084 }
2085 logit = 0;
2086 if (lscsi_status != SS_CHECK_CONDITION)
2087 break;
2088
2089 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2090 if (!(scsi_status & SS_SENSE_LEN_VALID))
2091 break;
2092
2093 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2094 rsp, res);
2095 break;
2096
2097 case CS_DATA_UNDERRUN:
2098 /* Use F/W calculated residual length. */
2099 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2100 scsi_set_resid(cp, resid);
2101 if (scsi_status & SS_RESIDUAL_UNDER) {
2102 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
2103 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
2104 "Dropped frame(s) detected "
2105 "(0x%x of 0x%x bytes).\n",
2106 resid, scsi_bufflen(cp));
2107
2108 res = DID_ERROR << 16 | lscsi_status;
2109 goto check_scsi_status;
2110 }
2111
2112 if (!lscsi_status &&
2113 ((unsigned)(scsi_bufflen(cp) - resid) <
2114 cp->underflow)) {
2115 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
2116 "Mid-layer underflow "
2117 "detected (0x%x of 0x%x bytes).\n",
2118 resid, scsi_bufflen(cp));
2119
2120 res = DID_ERROR << 16;
2121 break;
2122 }
2123 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2124 lscsi_status != SAM_STAT_BUSY) {
2125 /*
2126 * scsi status of task set and busy are considered to be
2127 * task not completed.
2128 */
2129
2130 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
2131 "Dropped frame(s) detected (0x%x "
2132 "of 0x%x bytes).\n", resid,
2133 scsi_bufflen(cp));
2134
2135 res = DID_ERROR << 16 | lscsi_status;
2136 goto check_scsi_status;
2137 } else {
2138 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2139 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2140 scsi_status, lscsi_status);
2141 }
2142
2143 res = DID_OK << 16 | lscsi_status;
2144 logit = 0;
2145
2146 check_scsi_status:
2147 /*
2148 * Check to see if SCSI Status is non zero. If so report SCSI
2149 * Status.
2150 */
2151 if (lscsi_status != 0) {
2152 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
2153 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
2154 "QUEUE FULL detected.\n");
2155 logit = 1;
2156 break;
2157 }
2158 if (lscsi_status != SS_CHECK_CONDITION)
2159 break;
2160
2161 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2162 if (!(scsi_status & SS_SENSE_LEN_VALID))
2163 break;
2164
2165 qla2x00_handle_sense(sp, sense_data, par_sense_len,
2166 sense_len, rsp, res);
2167 }
2168 break;
2169
2170 case CS_PORT_LOGGED_OUT:
2171 case CS_PORT_CONFIG_CHG:
2172 case CS_PORT_BUSY:
2173 case CS_INCOMPLETE:
2174 case CS_PORT_UNAVAILABLE:
2175 case CS_TIMEOUT:
2176 case CS_RESET:
2177
2178 /*
2179 * We are going to have the fc class block the rport
2180 * while we try to recover so instruct the mid layer
2181 * to requeue until the class decides how to handle this.
2182 */
2183 res = DID_TRANSPORT_DISRUPTED << 16;
2184
2185 if (comp_status == CS_TIMEOUT) {
2186 if (IS_FWI2_CAPABLE(ha))
2187 break;
2188 else if ((le16_to_cpu(sts->status_flags) &
2189 SF_LOGOUT_SENT) == 0)
2190 break;
2191 }
2192
2193 ql_dbg(ql_dbg_io, fcport->vha, 0x3021,
2194 "Port down status: port-state=0x%x.\n",
2195 atomic_read(&fcport->state));
2196
2197 if (atomic_read(&fcport->state) == FCS_ONLINE)
2198 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2199 break;
2200
2201 case CS_ABORTED:
2202 res = DID_RESET << 16;
2203 break;
2204
2205 case CS_DIF_ERROR:
2206 logit = qla2x00_handle_dif_error(sp, sts24);
2207 res = cp->result;
2208 break;
2209
2210 case CS_TRANSPORT:
2211 res = DID_ERROR << 16;
2212
2213 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2214 break;
2215
2216 if (state_flags & BIT_4)
2217 scmd_printk(KERN_WARNING, cp,
2218 "Unsupported device '%s' found.\n",
2219 cp->device->vendor);
2220 break;
2221
2222 default:
2223 res = DID_ERROR << 16;
2224 break;
2225 }
2226
2227 out:
2228 if (logit)
2229 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
2230 "FCP command status: 0x%x-0x%x (0x%x) "
2231 "nexus=%ld:%d:%d portid=%02x%02x%02x oxid=0x%x "
2232 "cdb=%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x len=0x%x "
2233 "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n",
2234 comp_status, scsi_status, res, vha->host_no,
2235 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2236 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
2237 cp->cmnd[0], cp->cmnd[1], cp->cmnd[2], cp->cmnd[3],
2238 cp->cmnd[4], cp->cmnd[5], cp->cmnd[6], cp->cmnd[7],
2239 cp->cmnd[8], cp->cmnd[9], scsi_bufflen(cp), rsp_info_len,
2240 resid_len, fw_resid_len);
2241
2242 if (!res)
2243 qla2x00_do_host_ramp_up(vha);
2244
2245 if (rsp->status_srb == NULL)
2246 sp->done(ha, sp, res);
2247 }
2248
2249 /**
2250 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2251 * @ha: SCSI driver HA context
2252 * @pkt: Entry pointer
2253 *
2254 * Extended sense data.
2255 */
2256 static void
2257 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2258 {
2259 uint8_t sense_sz = 0;
2260 struct qla_hw_data *ha = rsp->hw;
2261 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2262 srb_t *sp = rsp->status_srb;
2263 struct scsi_cmnd *cp;
2264 uint32_t sense_len;
2265 uint8_t *sense_ptr;
2266
2267 if (!sp || !GET_CMD_SENSE_LEN(sp))
2268 return;
2269
2270 sense_len = GET_CMD_SENSE_LEN(sp);
2271 sense_ptr = GET_CMD_SENSE_PTR(sp);
2272
2273 cp = GET_CMD_SP(sp);
2274 if (cp == NULL) {
2275 ql_log(ql_log_warn, vha, 0x3025,
2276 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2277
2278 rsp->status_srb = NULL;
2279 return;
2280 }
2281
2282 if (sense_len > sizeof(pkt->data))
2283 sense_sz = sizeof(pkt->data);
2284 else
2285 sense_sz = sense_len;
2286
2287 /* Move sense data. */
2288 if (IS_FWI2_CAPABLE(ha))
2289 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2290 memcpy(sense_ptr, pkt->data, sense_sz);
2291 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2292 sense_ptr, sense_sz);
2293
2294 sense_len -= sense_sz;
2295 sense_ptr += sense_sz;
2296
2297 SET_CMD_SENSE_PTR(sp, sense_ptr);
2298 SET_CMD_SENSE_LEN(sp, sense_len);
2299
2300 /* Place command on done queue. */
2301 if (sense_len == 0) {
2302 rsp->status_srb = NULL;
2303 sp->done(ha, sp, cp->result);
2304 }
2305 }
2306
2307 /**
2308 * qla2x00_error_entry() - Process an error entry.
2309 * @ha: SCSI driver HA context
2310 * @pkt: Entry pointer
2311 */
2312 static void
2313 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
2314 {
2315 srb_t *sp;
2316 struct qla_hw_data *ha = vha->hw;
2317 const char func[] = "ERROR-IOCB";
2318 uint16_t que = MSW(pkt->handle);
2319 struct req_que *req = NULL;
2320 int res = DID_ERROR << 16;
2321
2322 ql_dbg(ql_dbg_async, vha, 0x502a,
2323 "type of error status in response: 0x%x\n", pkt->entry_status);
2324
2325 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2326 goto fatal;
2327
2328 req = ha->req_q_map[que];
2329
2330 if (pkt->entry_status & RF_BUSY)
2331 res = DID_BUS_BUSY << 16;
2332
2333 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2334 if (sp) {
2335 sp->done(ha, sp, res);
2336 return;
2337 }
2338 fatal:
2339 ql_log(ql_log_warn, vha, 0x5030,
2340 "Error entry - invalid handle/queue.\n");
2341
2342 if (IS_QLA82XX(ha))
2343 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2344 else
2345 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2346 qla2xxx_wake_dpc(vha);
2347 }
2348
2349 /**
2350 * qla24xx_mbx_completion() - Process mailbox command completions.
2351 * @ha: SCSI driver HA context
2352 * @mb0: Mailbox0 register
2353 */
2354 static void
2355 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
2356 {
2357 uint16_t cnt;
2358 uint32_t mboxes;
2359 uint16_t __iomem *wptr;
2360 struct qla_hw_data *ha = vha->hw;
2361 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2362
2363 /* Read all mbox registers? */
2364 mboxes = (1 << ha->mbx_count) - 1;
2365 if (!ha->mcp)
2366 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
2367 else
2368 mboxes = ha->mcp->in_mb;
2369
2370 /* Load return mailbox registers. */
2371 ha->flags.mbox_int = 1;
2372 ha->mailbox_out[0] = mb0;
2373 mboxes >>= 1;
2374 wptr = (uint16_t __iomem *)&reg->mailbox1;
2375
2376 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2377 if (mboxes & BIT_0)
2378 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2379
2380 mboxes >>= 1;
2381 wptr++;
2382 }
2383 }
2384
2385 /**
2386 * qla24xx_process_response_queue() - Process response queue entries.
2387 * @ha: SCSI driver HA context
2388 */
2389 void qla24xx_process_response_queue(struct scsi_qla_host *vha,
2390 struct rsp_que *rsp)
2391 {
2392 struct sts_entry_24xx *pkt;
2393 struct qla_hw_data *ha = vha->hw;
2394
2395 if (!vha->flags.online)
2396 return;
2397
2398 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2399 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
2400
2401 rsp->ring_index++;
2402 if (rsp->ring_index == rsp->length) {
2403 rsp->ring_index = 0;
2404 rsp->ring_ptr = rsp->ring;
2405 } else {
2406 rsp->ring_ptr++;
2407 }
2408
2409 if (pkt->entry_status != 0) {
2410 qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
2411
2412 (void)qlt_24xx_process_response_error(vha, pkt);
2413
2414 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2415 wmb();
2416 continue;
2417 }
2418
2419 switch (pkt->entry_type) {
2420 case STATUS_TYPE:
2421 qla2x00_status_entry(vha, rsp, pkt);
2422 break;
2423 case STATUS_CONT_TYPE:
2424 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2425 break;
2426 case VP_RPT_ID_IOCB_TYPE:
2427 qla24xx_report_id_acquisition(vha,
2428 (struct vp_rpt_id_entry_24xx *)pkt);
2429 break;
2430 case LOGINOUT_PORT_IOCB_TYPE:
2431 qla24xx_logio_entry(vha, rsp->req,
2432 (struct logio_entry_24xx *)pkt);
2433 break;
2434 case TSK_MGMT_IOCB_TYPE:
2435 qla24xx_tm_iocb_entry(vha, rsp->req,
2436 (struct tsk_mgmt_entry *)pkt);
2437 break;
2438 case CT_IOCB_TYPE:
2439 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2440 break;
2441 case ELS_IOCB_TYPE:
2442 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
2443 break;
2444 case ABTS_RECV_24XX:
2445 /* ensure that the ATIO queue is empty */
2446 qlt_24xx_process_atio_queue(vha);
2447 case ABTS_RESP_24XX:
2448 case CTIO_TYPE7:
2449 case NOTIFY_ACK_TYPE:
2450 qlt_response_pkt_all_vps(vha, (response_t *)pkt);
2451 break;
2452 case MARKER_TYPE:
2453 /* Do nothing in this case, this check is to prevent it
2454 * from falling into default case
2455 */
2456 break;
2457 default:
2458 /* Type Not Supported. */
2459 ql_dbg(ql_dbg_async, vha, 0x5042,
2460 "Received unknown response pkt type %x "
2461 "entry status=%x.\n",
2462 pkt->entry_type, pkt->entry_status);
2463 break;
2464 }
2465 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2466 wmb();
2467 }
2468
2469 /* Adjust ring index */
2470 if (IS_QLA82XX(ha)) {
2471 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
2472 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
2473 } else
2474 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2475 }
2476
2477 static void
2478 qla2xxx_check_risc_status(scsi_qla_host_t *vha)
2479 {
2480 int rval;
2481 uint32_t cnt;
2482 struct qla_hw_data *ha = vha->hw;
2483 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2484
2485 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
2486 return;
2487
2488 rval = QLA_SUCCESS;
2489 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
2490 RD_REG_DWORD(&reg->iobase_addr);
2491 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2492 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2493 rval == QLA_SUCCESS; cnt--) {
2494 if (cnt) {
2495 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2496 udelay(10);
2497 } else
2498 rval = QLA_FUNCTION_TIMEOUT;
2499 }
2500 if (rval == QLA_SUCCESS)
2501 goto next_test;
2502
2503 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2504 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2505 rval == QLA_SUCCESS; cnt--) {
2506 if (cnt) {
2507 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2508 udelay(10);
2509 } else
2510 rval = QLA_FUNCTION_TIMEOUT;
2511 }
2512 if (rval != QLA_SUCCESS)
2513 goto done;
2514
2515 next_test:
2516 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
2517 ql_log(ql_log_info, vha, 0x504c,
2518 "Additional code -- 0x55AA.\n");
2519
2520 done:
2521 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
2522 RD_REG_DWORD(&reg->iobase_window);
2523 }
2524
2525 /**
2526 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
2527 * @irq:
2528 * @dev_id: SCSI driver HA context
2529 *
2530 * Called by system whenever the host adapter generates an interrupt.
2531 *
2532 * Returns handled flag.
2533 */
2534 irqreturn_t
2535 qla24xx_intr_handler(int irq, void *dev_id)
2536 {
2537 scsi_qla_host_t *vha;
2538 struct qla_hw_data *ha;
2539 struct device_reg_24xx __iomem *reg;
2540 int status;
2541 unsigned long iter;
2542 uint32_t stat;
2543 uint32_t hccr;
2544 uint16_t mb[8];
2545 struct rsp_que *rsp;
2546 unsigned long flags;
2547
2548 rsp = (struct rsp_que *) dev_id;
2549 if (!rsp) {
2550 ql_log(ql_log_info, NULL, 0x5059,
2551 "%s: NULL response queue pointer.\n", __func__);
2552 return IRQ_NONE;
2553 }
2554
2555 ha = rsp->hw;
2556 reg = &ha->iobase->isp24;
2557 status = 0;
2558
2559 if (unlikely(pci_channel_offline(ha->pdev)))
2560 return IRQ_HANDLED;
2561
2562 spin_lock_irqsave(&ha->hardware_lock, flags);
2563 vha = pci_get_drvdata(ha->pdev);
2564 for (iter = 50; iter--; ) {
2565 stat = RD_REG_DWORD(&reg->host_status);
2566 if (stat & HSRX_RISC_PAUSED) {
2567 if (unlikely(pci_channel_offline(ha->pdev)))
2568 break;
2569
2570 hccr = RD_REG_DWORD(&reg->hccr);
2571
2572 ql_log(ql_log_warn, vha, 0x504b,
2573 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2574 hccr);
2575
2576 qla2xxx_check_risc_status(vha);
2577
2578 ha->isp_ops->fw_dump(vha, 1);
2579 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2580 break;
2581 } else if ((stat & HSRX_RISC_INT) == 0)
2582 break;
2583
2584 switch (stat & 0xff) {
2585 case INTR_ROM_MB_SUCCESS:
2586 case INTR_ROM_MB_FAILED:
2587 case INTR_MB_SUCCESS:
2588 case INTR_MB_FAILED:
2589 qla24xx_mbx_completion(vha, MSW(stat));
2590 status |= MBX_INTERRUPT;
2591
2592 break;
2593 case INTR_ASYNC_EVENT:
2594 mb[0] = MSW(stat);
2595 mb[1] = RD_REG_WORD(&reg->mailbox1);
2596 mb[2] = RD_REG_WORD(&reg->mailbox2);
2597 mb[3] = RD_REG_WORD(&reg->mailbox3);
2598 qla2x00_async_event(vha, rsp, mb);
2599 break;
2600 case INTR_RSP_QUE_UPDATE:
2601 case INTR_RSP_QUE_UPDATE_83XX:
2602 qla24xx_process_response_queue(vha, rsp);
2603 break;
2604 case INTR_ATIO_QUE_UPDATE:
2605 qlt_24xx_process_atio_queue(vha);
2606 break;
2607 case INTR_ATIO_RSP_QUE_UPDATE:
2608 qlt_24xx_process_atio_queue(vha);
2609 qla24xx_process_response_queue(vha, rsp);
2610 break;
2611 default:
2612 ql_dbg(ql_dbg_async, vha, 0x504f,
2613 "Unrecognized interrupt type (%d).\n", stat * 0xff);
2614 break;
2615 }
2616 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2617 RD_REG_DWORD_RELAXED(&reg->hccr);
2618 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
2619 ndelay(3500);
2620 }
2621 qla2x00_handle_mbx_completion(ha, status);
2622 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2623
2624 return IRQ_HANDLED;
2625 }
2626
2627 static irqreturn_t
2628 qla24xx_msix_rsp_q(int irq, void *dev_id)
2629 {
2630 struct qla_hw_data *ha;
2631 struct rsp_que *rsp;
2632 struct device_reg_24xx __iomem *reg;
2633 struct scsi_qla_host *vha;
2634 unsigned long flags;
2635
2636 rsp = (struct rsp_que *) dev_id;
2637 if (!rsp) {
2638 ql_log(ql_log_info, NULL, 0x505a,
2639 "%s: NULL response queue pointer.\n", __func__);
2640 return IRQ_NONE;
2641 }
2642 ha = rsp->hw;
2643 reg = &ha->iobase->isp24;
2644
2645 spin_lock_irqsave(&ha->hardware_lock, flags);
2646
2647 vha = pci_get_drvdata(ha->pdev);
2648 qla24xx_process_response_queue(vha, rsp);
2649 if (!ha->flags.disable_msix_handshake) {
2650 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2651 RD_REG_DWORD_RELAXED(&reg->hccr);
2652 }
2653 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2654
2655 return IRQ_HANDLED;
2656 }
2657
2658 static irqreturn_t
2659 qla25xx_msix_rsp_q(int irq, void *dev_id)
2660 {
2661 struct qla_hw_data *ha;
2662 struct rsp_que *rsp;
2663 struct device_reg_24xx __iomem *reg;
2664 unsigned long flags;
2665
2666 rsp = (struct rsp_que *) dev_id;
2667 if (!rsp) {
2668 ql_log(ql_log_info, NULL, 0x505b,
2669 "%s: NULL response queue pointer.\n", __func__);
2670 return IRQ_NONE;
2671 }
2672 ha = rsp->hw;
2673
2674 /* Clear the interrupt, if enabled, for this response queue */
2675 if (!ha->flags.disable_msix_handshake) {
2676 reg = &ha->iobase->isp24;
2677 spin_lock_irqsave(&ha->hardware_lock, flags);
2678 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2679 RD_REG_DWORD_RELAXED(&reg->hccr);
2680 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2681 }
2682 queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
2683
2684 return IRQ_HANDLED;
2685 }
2686
2687 static irqreturn_t
2688 qla24xx_msix_default(int irq, void *dev_id)
2689 {
2690 scsi_qla_host_t *vha;
2691 struct qla_hw_data *ha;
2692 struct rsp_que *rsp;
2693 struct device_reg_24xx __iomem *reg;
2694 int status;
2695 uint32_t stat;
2696 uint32_t hccr;
2697 uint16_t mb[8];
2698 unsigned long flags;
2699
2700 rsp = (struct rsp_que *) dev_id;
2701 if (!rsp) {
2702 ql_log(ql_log_info, NULL, 0x505c,
2703 "%s: NULL response queue pointer.\n", __func__);
2704 return IRQ_NONE;
2705 }
2706 ha = rsp->hw;
2707 reg = &ha->iobase->isp24;
2708 status = 0;
2709
2710 spin_lock_irqsave(&ha->hardware_lock, flags);
2711 vha = pci_get_drvdata(ha->pdev);
2712 do {
2713 stat = RD_REG_DWORD(&reg->host_status);
2714 if (stat & HSRX_RISC_PAUSED) {
2715 if (unlikely(pci_channel_offline(ha->pdev)))
2716 break;
2717
2718 hccr = RD_REG_DWORD(&reg->hccr);
2719
2720 ql_log(ql_log_info, vha, 0x5050,
2721 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2722 hccr);
2723
2724 qla2xxx_check_risc_status(vha);
2725
2726 ha->isp_ops->fw_dump(vha, 1);
2727 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2728 break;
2729 } else if ((stat & HSRX_RISC_INT) == 0)
2730 break;
2731
2732 switch (stat & 0xff) {
2733 case INTR_ROM_MB_SUCCESS:
2734 case INTR_ROM_MB_FAILED:
2735 case INTR_MB_SUCCESS:
2736 case INTR_MB_FAILED:
2737 qla24xx_mbx_completion(vha, MSW(stat));
2738 status |= MBX_INTERRUPT;
2739
2740 break;
2741 case INTR_ASYNC_EVENT:
2742 mb[0] = MSW(stat);
2743 mb[1] = RD_REG_WORD(&reg->mailbox1);
2744 mb[2] = RD_REG_WORD(&reg->mailbox2);
2745 mb[3] = RD_REG_WORD(&reg->mailbox3);
2746 qla2x00_async_event(vha, rsp, mb);
2747 break;
2748 case INTR_RSP_QUE_UPDATE:
2749 case INTR_RSP_QUE_UPDATE_83XX:
2750 qla24xx_process_response_queue(vha, rsp);
2751 break;
2752 case INTR_ATIO_QUE_UPDATE:
2753 qlt_24xx_process_atio_queue(vha);
2754 break;
2755 case INTR_ATIO_RSP_QUE_UPDATE:
2756 qlt_24xx_process_atio_queue(vha);
2757 qla24xx_process_response_queue(vha, rsp);
2758 break;
2759 default:
2760 ql_dbg(ql_dbg_async, vha, 0x5051,
2761 "Unrecognized interrupt type (%d).\n", stat & 0xff);
2762 break;
2763 }
2764 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2765 } while (0);
2766 qla2x00_handle_mbx_completion(ha, status);
2767 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2768
2769 return IRQ_HANDLED;
2770 }
2771
2772 /* Interrupt handling helpers. */
2773
2774 struct qla_init_msix_entry {
2775 const char *name;
2776 irq_handler_t handler;
2777 };
2778
2779 static struct qla_init_msix_entry msix_entries[3] = {
2780 { "qla2xxx (default)", qla24xx_msix_default },
2781 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
2782 { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
2783 };
2784
2785 static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
2786 { "qla2xxx (default)", qla82xx_msix_default },
2787 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
2788 };
2789
2790 static struct qla_init_msix_entry qla83xx_msix_entries[3] = {
2791 { "qla2xxx (default)", qla24xx_msix_default },
2792 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
2793 { "qla2xxx (atio_q)", qla83xx_msix_atio_q },
2794 };
2795
2796 static void
2797 qla24xx_disable_msix(struct qla_hw_data *ha)
2798 {
2799 int i;
2800 struct qla_msix_entry *qentry;
2801 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
2802
2803 for (i = 0; i < ha->msix_count; i++) {
2804 qentry = &ha->msix_entries[i];
2805 if (qentry->have_irq)
2806 free_irq(qentry->vector, qentry->rsp);
2807 }
2808 pci_disable_msix(ha->pdev);
2809 kfree(ha->msix_entries);
2810 ha->msix_entries = NULL;
2811 ha->flags.msix_enabled = 0;
2812 ql_dbg(ql_dbg_init, vha, 0x0042,
2813 "Disabled the MSI.\n");
2814 }
2815
2816 static int
2817 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
2818 {
2819 #define MIN_MSIX_COUNT 2
2820 int i, ret;
2821 struct msix_entry *entries;
2822 struct qla_msix_entry *qentry;
2823 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
2824
2825 entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
2826 GFP_KERNEL);
2827 if (!entries) {
2828 ql_log(ql_log_warn, vha, 0x00bc,
2829 "Failed to allocate memory for msix_entry.\n");
2830 return -ENOMEM;
2831 }
2832
2833 for (i = 0; i < ha->msix_count; i++)
2834 entries[i].entry = i;
2835
2836 ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
2837 if (ret) {
2838 if (ret < MIN_MSIX_COUNT)
2839 goto msix_failed;
2840
2841 ql_log(ql_log_warn, vha, 0x00c6,
2842 "MSI-X: Failed to enable support "
2843 "-- %d/%d\n Retry with %d vectors.\n",
2844 ha->msix_count, ret, ret);
2845 ha->msix_count = ret;
2846 ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
2847 if (ret) {
2848 msix_failed:
2849 ql_log(ql_log_fatal, vha, 0x00c7,
2850 "MSI-X: Failed to enable support, "
2851 "giving up -- %d/%d.\n",
2852 ha->msix_count, ret);
2853 goto msix_out;
2854 }
2855 ha->max_rsp_queues = ha->msix_count - 1;
2856 }
2857 ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
2858 ha->msix_count, GFP_KERNEL);
2859 if (!ha->msix_entries) {
2860 ql_log(ql_log_fatal, vha, 0x00c8,
2861 "Failed to allocate memory for ha->msix_entries.\n");
2862 ret = -ENOMEM;
2863 goto msix_out;
2864 }
2865 ha->flags.msix_enabled = 1;
2866
2867 for (i = 0; i < ha->msix_count; i++) {
2868 qentry = &ha->msix_entries[i];
2869 qentry->vector = entries[i].vector;
2870 qentry->entry = entries[i].entry;
2871 qentry->have_irq = 0;
2872 qentry->rsp = NULL;
2873 }
2874
2875 /* Enable MSI-X vectors for the base queue */
2876 for (i = 0; i < ha->msix_count; i++) {
2877 qentry = &ha->msix_entries[i];
2878 if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) {
2879 ret = request_irq(qentry->vector,
2880 qla83xx_msix_entries[i].handler,
2881 0, qla83xx_msix_entries[i].name, rsp);
2882 } else if (IS_QLA82XX(ha)) {
2883 ret = request_irq(qentry->vector,
2884 qla82xx_msix_entries[i].handler,
2885 0, qla82xx_msix_entries[i].name, rsp);
2886 } else {
2887 ret = request_irq(qentry->vector,
2888 msix_entries[i].handler,
2889 0, msix_entries[i].name, rsp);
2890 }
2891 if (ret) {
2892 ql_log(ql_log_fatal, vha, 0x00cb,
2893 "MSI-X: unable to register handler -- %x/%d.\n",
2894 qentry->vector, ret);
2895 qla24xx_disable_msix(ha);
2896 ha->mqenable = 0;
2897 goto msix_out;
2898 }
2899 qentry->have_irq = 1;
2900 qentry->rsp = rsp;
2901 rsp->msix = qentry;
2902 }
2903
2904 /* Enable MSI-X vector for response queue update for queue 0 */
2905 if (IS_QLA83XX(ha)) {
2906 if (ha->msixbase && ha->mqiobase &&
2907 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
2908 ha->mqenable = 1;
2909 } else
2910 if (ha->mqiobase
2911 && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
2912 ha->mqenable = 1;
2913 ql_dbg(ql_dbg_multiq, vha, 0xc005,
2914 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
2915 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
2916 ql_dbg(ql_dbg_init, vha, 0x0055,
2917 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
2918 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
2919
2920 msix_out:
2921 kfree(entries);
2922 return ret;
2923 }
2924
2925 int
2926 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
2927 {
2928 int ret;
2929 device_reg_t __iomem *reg = ha->iobase;
2930 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
2931
2932 /* If possible, enable MSI-X. */
2933 if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
2934 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLAFX00(ha))
2935 goto skip_msi;
2936
2937 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
2938 (ha->pdev->subsystem_device == 0x7040 ||
2939 ha->pdev->subsystem_device == 0x7041 ||
2940 ha->pdev->subsystem_device == 0x1705)) {
2941 ql_log(ql_log_warn, vha, 0x0034,
2942 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
2943 ha->pdev->subsystem_vendor,
2944 ha->pdev->subsystem_device);
2945 goto skip_msi;
2946 }
2947
2948 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
2949 ql_log(ql_log_warn, vha, 0x0035,
2950 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
2951 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
2952 goto skip_msix;
2953 }
2954
2955 ret = qla24xx_enable_msix(ha, rsp);
2956 if (!ret) {
2957 ql_dbg(ql_dbg_init, vha, 0x0036,
2958 "MSI-X: Enabled (0x%X, 0x%X).\n",
2959 ha->chip_revision, ha->fw_attributes);
2960 goto clear_risc_ints;
2961 }
2962 ql_log(ql_log_info, vha, 0x0037,
2963 "MSI-X Falling back-to MSI mode -%d.\n", ret);
2964 skip_msix:
2965
2966 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
2967 !IS_QLA8001(ha) && !IS_QLA82XX(ha) && !IS_QLAFX00(ha))
2968 goto skip_msi;
2969
2970 ret = pci_enable_msi(ha->pdev);
2971 if (!ret) {
2972 ql_dbg(ql_dbg_init, vha, 0x0038,
2973 "MSI: Enabled.\n");
2974 ha->flags.msi_enabled = 1;
2975 } else
2976 ql_log(ql_log_warn, vha, 0x0039,
2977 "MSI-X; Falling back-to INTa mode -- %d.\n", ret);
2978
2979 /* Skip INTx on ISP82xx. */
2980 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
2981 return QLA_FUNCTION_FAILED;
2982
2983 skip_msi:
2984
2985 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
2986 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
2987 QLA2XXX_DRIVER_NAME, rsp);
2988 if (ret) {
2989 ql_log(ql_log_warn, vha, 0x003a,
2990 "Failed to reserve interrupt %d already in use.\n",
2991 ha->pdev->irq);
2992 goto fail;
2993 } else if (!ha->flags.msi_enabled) {
2994 ql_dbg(ql_dbg_init, vha, 0x0125,
2995 "INTa mode: Enabled.\n");
2996 ha->flags.mr_intr_valid = 1;
2997 }
2998
2999 clear_risc_ints:
3000
3001 spin_lock_irq(&ha->hardware_lock);
3002 if (!IS_FWI2_CAPABLE(ha))
3003 WRT_REG_WORD(&reg->isp.semaphore, 0);
3004 spin_unlock_irq(&ha->hardware_lock);
3005
3006 fail:
3007 return ret;
3008 }
3009
3010 void
3011 qla2x00_free_irqs(scsi_qla_host_t *vha)
3012 {
3013 struct qla_hw_data *ha = vha->hw;
3014 struct rsp_que *rsp;
3015
3016 /*
3017 * We need to check that ha->rsp_q_map is valid in case we are called
3018 * from a probe failure context.
3019 */
3020 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
3021 return;
3022 rsp = ha->rsp_q_map[0];
3023
3024 if (ha->flags.msix_enabled)
3025 qla24xx_disable_msix(ha);
3026 else if (ha->flags.msi_enabled) {
3027 free_irq(ha->pdev->irq, rsp);
3028 pci_disable_msi(ha->pdev);
3029 } else
3030 free_irq(ha->pdev->irq, rsp);
3031 }
3032
3033
3034 int qla25xx_request_irq(struct rsp_que *rsp)
3035 {
3036 struct qla_hw_data *ha = rsp->hw;
3037 struct qla_init_msix_entry *intr = &msix_entries[2];
3038 struct qla_msix_entry *msix = rsp->msix;
3039 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3040 int ret;
3041
3042 ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
3043 if (ret) {
3044 ql_log(ql_log_fatal, vha, 0x00e6,
3045 "MSI-X: Unable to register handler -- %x/%d.\n",
3046 msix->vector, ret);
3047 return ret;
3048 }
3049 msix->have_irq = 1;
3050 msix->rsp = rsp;
3051 return ret;
3052 }
kernel source for telekom puls (alcatel/mediatek)