projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / nsp32.c
1 /*
2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
3 * Copyright (C) 2001, 2002, 2003
4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
5 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 *
18 * Revision History:
19 * 1.0: Initial Release.
20 * 1.1: Add /proc SDTR status.
21 * Remove obsolete error handler nsp32_reset.
22 * Some clean up.
23 * 1.2: PowerPC (big endian) support.
24 */
25
26 #include <linux/version.h>
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
33 #include <linux/timer.h>
34 #include <linux/ioport.h>
35 #include <linux/major.h>
36 #include <linux/blkdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/ctype.h>
41 #include <linux/dma-mapping.h>
42
43 #include <asm/dma.h>
44 #include <asm/system.h>
45 #include <asm/io.h>
46
47 #include <scsi/scsi.h>
48 #include <scsi/scsi_cmnd.h>
49 #include <scsi/scsi_device.h>
50 #include <scsi/scsi_host.h>
51 #include <scsi/scsi_ioctl.h>
52
53 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
54 # include <linux/blk.h>
55 #endif
56
57 #include "nsp32.h"
58
59
60 /***********************************************************************
61 * Module parameters
62 */
63 static int trans_mode = 0; /* default: BIOS */
64 module_param (trans_mode, int, 0);
65 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
66 #define ASYNC_MODE 1
67 #define ULTRA20M_MODE 2
68
69 static int auto_param = 0; /* default: ON */
70 module_param (auto_param, bool, 0);
71 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
72
73 static int disc_priv = 1; /* default: OFF */
74 module_param (disc_priv, bool, 0);
75 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
76
77 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
78 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
79 MODULE_LICENSE("GPL");
80
81 static const char *nsp32_release_version = "1.2";
82
83
84 /****************************************************************************
85 * Supported hardware
86 */
87 static struct pci_device_id nsp32_pci_table[] __devinitdata = {
88 {
89 .vendor = PCI_VENDOR_ID_IODATA,
90 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
91 .subvendor = PCI_ANY_ID,
92 .subdevice = PCI_ANY_ID,
93 .driver_data = MODEL_IODATA,
94 },
95 {
96 .vendor = PCI_VENDOR_ID_WORKBIT,
97 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
98 .subvendor = PCI_ANY_ID,
99 .subdevice = PCI_ANY_ID,
100 .driver_data = MODEL_KME,
101 },
102 {
103 .vendor = PCI_VENDOR_ID_WORKBIT,
104 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
105 .subvendor = PCI_ANY_ID,
106 .subdevice = PCI_ANY_ID,
107 .driver_data = MODEL_WORKBIT,
108 },
109 {
110 .vendor = PCI_VENDOR_ID_WORKBIT,
111 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
112 .subvendor = PCI_ANY_ID,
113 .subdevice = PCI_ANY_ID,
114 .driver_data = MODEL_PCI_WORKBIT,
115 },
116 {
117 .vendor = PCI_VENDOR_ID_WORKBIT,
118 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
119 .subvendor = PCI_ANY_ID,
120 .subdevice = PCI_ANY_ID,
121 .driver_data = MODEL_LOGITEC,
122 },
123 {
124 .vendor = PCI_VENDOR_ID_WORKBIT,
125 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
126 .subvendor = PCI_ANY_ID,
127 .subdevice = PCI_ANY_ID,
128 .driver_data = MODEL_PCI_LOGITEC,
129 },
130 {
131 .vendor = PCI_VENDOR_ID_WORKBIT,
132 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
133 .subvendor = PCI_ANY_ID,
134 .subdevice = PCI_ANY_ID,
135 .driver_data = MODEL_PCI_MELCO,
136 },
137 {
138 .vendor = PCI_VENDOR_ID_WORKBIT,
139 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
140 .subvendor = PCI_ANY_ID,
141 .subdevice = PCI_ANY_ID,
142 .driver_data = MODEL_PCI_MELCO,
143 },
144 {0,0,},
145 };
146 MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
147
148 static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
149
150
151 /*
152 * Period/AckWidth speed conversion table
153 *
154 * Note: This period/ackwidth speed table must be in descending order.
155 */
156 static nsp32_sync_table nsp32_sync_table_40M[] = {
157 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
158 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
159 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
160 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
161 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
162 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
163 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
164 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
165 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
166 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
167 };
168
169 static nsp32_sync_table nsp32_sync_table_20M[] = {
170 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
171 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
172 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
173 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
174 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
175 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
176 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
177 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
178 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
179 };
180
181 static nsp32_sync_table nsp32_sync_table_pci[] = {
182 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
183 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
184 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
185 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
186 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
187 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
188 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
189 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
190 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
191 };
192
193 /*
194 * function declaration
195 */
196 /* module entry point */
197 static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
198 static void __devexit nsp32_remove(struct pci_dev *);
199 static int __init init_nsp32 (void);
200 static void __exit exit_nsp32 (void);
201
202 /* struct struct scsi_host_template */
203 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
204 static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
205 #else
206 static int nsp32_proc_info (char *, char **, off_t, int, int, int);
207 #endif
208
209 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
210 static int nsp32_detect (struct pci_dev *pdev);
211 #else
212 static int nsp32_detect (struct scsi_host_template *);
213 #endif
214 static int nsp32_queuecommand(struct scsi_cmnd *,
215 void (*done)(struct scsi_cmnd *));
216 static const char *nsp32_info (struct Scsi_Host *);
217 static int nsp32_release (struct Scsi_Host *);
218
219 /* SCSI error handler */
220 static int nsp32_eh_abort (struct scsi_cmnd *);
221 static int nsp32_eh_bus_reset (struct scsi_cmnd *);
222 static int nsp32_eh_host_reset(struct scsi_cmnd *);
223
224 /* generate SCSI message */
225 static void nsp32_build_identify(struct scsi_cmnd *);
226 static void nsp32_build_nop (struct scsi_cmnd *);
227 static void nsp32_build_reject (struct scsi_cmnd *);
228 static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
229
230 /* SCSI message handler */
231 static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
232 static void nsp32_msgout_occur (struct scsi_cmnd *);
233 static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
234
235 static int nsp32_setup_sg_table (struct scsi_cmnd *);
236 static int nsp32_selection_autopara(struct scsi_cmnd *);
237 static int nsp32_selection_autoscsi(struct scsi_cmnd *);
238 static void nsp32_scsi_done (struct scsi_cmnd *);
239 static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
240 static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
241 static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
242 static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
243
244 /* SCSI SDTR */
245 static void nsp32_analyze_sdtr (struct scsi_cmnd *);
246 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
247 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
248 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
249 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
250
251 /* SCSI bus status handler */
252 static void nsp32_wait_req (nsp32_hw_data *, int);
253 static void nsp32_wait_sack (nsp32_hw_data *, int);
254 static void nsp32_sack_assert (nsp32_hw_data *);
255 static void nsp32_sack_negate (nsp32_hw_data *);
256 static void nsp32_do_bus_reset(nsp32_hw_data *);
257
258 /* hardware interrupt handler */
259 static irqreturn_t do_nsp32_isr(int, void *);
260
261 /* initialize hardware */
262 static int nsp32hw_init(nsp32_hw_data *);
263
264 /* EEPROM handler */
265 static int nsp32_getprom_param (nsp32_hw_data *);
266 static int nsp32_getprom_at24 (nsp32_hw_data *);
267 static int nsp32_getprom_c16 (nsp32_hw_data *);
268 static void nsp32_prom_start (nsp32_hw_data *);
269 static void nsp32_prom_stop (nsp32_hw_data *);
270 static int nsp32_prom_read (nsp32_hw_data *, int);
271 static int nsp32_prom_read_bit (nsp32_hw_data *);
272 static void nsp32_prom_write_bit(nsp32_hw_data *, int);
273 static void nsp32_prom_set (nsp32_hw_data *, int, int);
274 static int nsp32_prom_get (nsp32_hw_data *, int);
275
276 /* debug/warning/info message */
277 static void nsp32_message (const char *, int, char *, char *, ...);
278 #ifdef NSP32_DEBUG
279 static void nsp32_dmessage(const char *, int, int, char *, ...);
280 #endif
281
282 /*
283 * max_sectors is currently limited up to 128.
284 */
285 static struct scsi_host_template nsp32_template = {
286 .proc_name = "nsp32",
287 .name = "Workbit NinjaSCSI-32Bi/UDE",
288 .proc_info = nsp32_proc_info,
289 .info = nsp32_info,
290 .queuecommand = nsp32_queuecommand,
291 .can_queue = 1,
292 .sg_tablesize = NSP32_SG_SIZE,
293 .max_sectors = 128,
294 .cmd_per_lun = 1,
295 .this_id = NSP32_HOST_SCSIID,
296 .use_clustering = DISABLE_CLUSTERING,
297 .eh_abort_handler = nsp32_eh_abort,
298 .eh_bus_reset_handler = nsp32_eh_bus_reset,
299 .eh_host_reset_handler = nsp32_eh_host_reset,
300 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,74))
301 .detect = nsp32_detect,
302 .release = nsp32_release,
303 #endif
304 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,2))
305 .use_new_eh_code = 1,
306 #else
307 /* .highmem_io = 1, */
308 #endif
309 };
310
311 #include "nsp32_io.h"
312
313 /***********************************************************************
314 * debug, error print
315 */
316 #ifndef NSP32_DEBUG
317 # define NSP32_DEBUG_MASK 0x000000
318 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
319 # define nsp32_dbg(mask, args...) /* */
320 #else
321 # define NSP32_DEBUG_MASK 0xffffff
322 # define nsp32_msg(type, args...) \
323 nsp32_message (__FUNCTION__, __LINE__, (type), args)
324 # define nsp32_dbg(mask, args...) \
325 nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
326 #endif
327
328 #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
329 #define NSP32_DEBUG_REGISTER BIT(1)
330 #define NSP32_DEBUG_AUTOSCSI BIT(2)
331 #define NSP32_DEBUG_INTR BIT(3)
332 #define NSP32_DEBUG_SGLIST BIT(4)
333 #define NSP32_DEBUG_BUSFREE BIT(5)
334 #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
335 #define NSP32_DEBUG_RESELECTION BIT(7)
336 #define NSP32_DEBUG_MSGINOCCUR BIT(8)
337 #define NSP32_DEBUG_EEPROM BIT(9)
338 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
339 #define NSP32_DEBUG_BUSRESET BIT(11)
340 #define NSP32_DEBUG_RESTART BIT(12)
341 #define NSP32_DEBUG_SYNC BIT(13)
342 #define NSP32_DEBUG_WAIT BIT(14)
343 #define NSP32_DEBUG_TARGETFLAG BIT(15)
344 #define NSP32_DEBUG_PROC BIT(16)
345 #define NSP32_DEBUG_INIT BIT(17)
346 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
347
348 #define NSP32_DEBUG_BUF_LEN 100
349
350 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
351 {
352 va_list args;
353 char buf[NSP32_DEBUG_BUF_LEN];
354
355 va_start(args, fmt);
356 vsnprintf(buf, sizeof(buf), fmt, args);
357 va_end(args);
358
359 #ifndef NSP32_DEBUG
360 printk("%snsp32: %s\n", type, buf);
361 #else
362 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
363 #endif
364 }
365
366 #ifdef NSP32_DEBUG
367 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
368 {
369 va_list args;
370 char buf[NSP32_DEBUG_BUF_LEN];
371
372 va_start(args, fmt);
373 vsnprintf(buf, sizeof(buf), fmt, args);
374 va_end(args);
375
376 if (mask & NSP32_DEBUG_MASK) {
377 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
378 }
379 }
380 #endif
381
382 #ifdef NSP32_DEBUG
383 # include "nsp32_debug.c"
384 #else
385 # define show_command(arg) /* */
386 # define show_busphase(arg) /* */
387 # define show_autophase(arg) /* */
388 #endif
389
390 /*
391 * IDENTIFY Message
392 */
393 static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
394 {
395 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
396 int pos = data->msgout_len;
397 int mode = FALSE;
398
399 /* XXX: Auto DiscPriv detection is progressing... */
400 if (disc_priv == 0) {
401 /* mode = TRUE; */
402 }
403
404 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
405
406 data->msgout_len = pos;
407 }
408
409 /*
410 * SDTR Message Routine
411 */
412 static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
413 unsigned char period,
414 unsigned char offset)
415 {
416 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
417 int pos = data->msgout_len;
418
419 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
420 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
421 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
422 data->msgoutbuf[pos] = period; pos++;
423 data->msgoutbuf[pos] = offset; pos++;
424
425 data->msgout_len = pos;
426 }
427
428 /*
429 * No Operation Message
430 */
431 static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
432 {
433 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
434 int pos = data->msgout_len;
435
436 if (pos != 0) {
437 nsp32_msg(KERN_WARNING,
438 "Some messages are already contained!");
439 return;
440 }
441
442 data->msgoutbuf[pos] = NOP; pos++;
443 data->msgout_len = pos;
444 }
445
446 /*
447 * Reject Message
448 */
449 static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
450 {
451 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
452 int pos = data->msgout_len;
453
454 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
455 data->msgout_len = pos;
456 }
457
458 /*
459 * timer
460 */
461 #if 0
462 static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
463 {
464 unsigned int base = SCpnt->host->io_port;
465
466 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
467
468 if (time & (~TIMER_CNT_MASK)) {
469 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
470 }
471
472 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
473 }
474 #endif
475
476
477 /*
478 * set SCSI command and other parameter to asic, and start selection phase
479 */
480 static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
481 {
482 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
483 unsigned int base = SCpnt->device->host->io_port;
484 unsigned int host_id = SCpnt->device->host->this_id;
485 unsigned char target = scmd_id(SCpnt);
486 nsp32_autoparam *param = data->autoparam;
487 unsigned char phase;
488 int i, ret;
489 unsigned int msgout;
490 u16_le s;
491
492 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
493
494 /*
495 * check bus free
496 */
497 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
498 if (phase != BUSMON_BUS_FREE) {
499 nsp32_msg(KERN_WARNING, "bus busy");
500 show_busphase(phase & BUSMON_PHASE_MASK);
501 SCpnt->result = DID_BUS_BUSY << 16;
502 return FALSE;
503 }
504
505 /*
506 * message out
507 *
508 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
509 * over 3 messages needs another routine.
510 */
511 if (data->msgout_len == 0) {
512 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
513 SCpnt->result = DID_ERROR << 16;
514 return FALSE;
515 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
516 msgout = 0;
517 for (i = 0; i < data->msgout_len; i++) {
518 /*
519 * the sending order of the message is:
520 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
521 * MCNT 2: MSG#1 -> MSG#2
522 * MCNT 1: MSG#2
523 */
524 msgout >>= 8;
525 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
526 }
527 msgout |= MV_VALID; /* MV valid */
528 msgout |= (unsigned int)data->msgout_len; /* len */
529 } else {
530 /* data->msgout_len > 3 */
531 msgout = 0;
532 }
533
534 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
535 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
536
537 /*
538 * setup asic parameter
539 */
540 memset(param, 0, sizeof(nsp32_autoparam));
541
542 /* cdb */
543 for (i = 0; i < SCpnt->cmd_len; i++) {
544 param->cdb[4 * i] = SCpnt->cmnd[i];
545 }
546
547 /* outgoing messages */
548 param->msgout = cpu_to_le32(msgout);
549
550 /* syncreg, ackwidth, target id, SREQ sampling rate */
551 param->syncreg = data->cur_target->syncreg;
552 param->ackwidth = data->cur_target->ackwidth;
553 param->target_id = BIT(host_id) | BIT(target);
554 param->sample_reg = data->cur_target->sample_reg;
555
556 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
557
558 /* command control */
559 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
560 AUTOSCSI_START |
561 AUTO_MSGIN_00_OR_04 |
562 AUTO_MSGIN_02 |
563 AUTO_ATN );
564
565
566 /* transfer control */
567 s = 0;
568 switch (data->trans_method) {
569 case NSP32_TRANSFER_BUSMASTER:
570 s |= BM_START;
571 break;
572 case NSP32_TRANSFER_MMIO:
573 s |= CB_MMIO_MODE;
574 break;
575 case NSP32_TRANSFER_PIO:
576 s |= CB_IO_MODE;
577 break;
578 default:
579 nsp32_msg(KERN_ERR, "unknown trans_method");
580 break;
581 }
582 /*
583 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
584 * For bus master transfer, it's taken off.
585 */
586 s |= (TRANSFER_GO | ALL_COUNTER_CLR);
587 param->transfer_control = cpu_to_le16(s);
588
589 /* sg table addr */
590 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
591
592 /*
593 * transfer parameter to ASIC
594 */
595 nsp32_write4(base, SGT_ADR, data->auto_paddr);
596 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
597 AUTO_PARAMETER );
598
599 /*
600 * Check arbitration
601 */
602 ret = nsp32_arbitration(SCpnt, base);
603
604 return ret;
605 }
606
607
608 /*
609 * Selection with AUTO SCSI (without AUTO PARAMETER)
610 */
611 static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
612 {
613 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
614 unsigned int base = SCpnt->device->host->io_port;
615 unsigned int host_id = SCpnt->device->host->this_id;
616 unsigned char target = scmd_id(SCpnt);
617 unsigned char phase;
618 int status;
619 unsigned short command = 0;
620 unsigned int msgout = 0;
621 unsigned short execph;
622 int i;
623
624 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
625
626 /*
627 * IRQ disable
628 */
629 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
630
631 /*
632 * check bus line
633 */
634 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
635 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
636 nsp32_msg(KERN_WARNING, "bus busy");
637 SCpnt->result = DID_BUS_BUSY << 16;
638 status = 1;
639 goto out;
640 }
641
642 /*
643 * clear execph
644 */
645 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
646
647 /*
648 * clear FIFO counter to set CDBs
649 */
650 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
651
652 /*
653 * set CDB0 - CDB15
654 */
655 for (i = 0; i < SCpnt->cmd_len; i++) {
656 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
657 }
658 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
659
660 /*
661 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
662 */
663 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
664
665 /*
666 * set SCSI MSGOUT REG
667 *
668 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
669 * over 3 messages needs another routine.
670 */
671 if (data->msgout_len == 0) {
672 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
673 SCpnt->result = DID_ERROR << 16;
674 status = 1;
675 goto out;
676 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
677 msgout = 0;
678 for (i = 0; i < data->msgout_len; i++) {
679 /*
680 * the sending order of the message is:
681 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
682 * MCNT 2: MSG#1 -> MSG#2
683 * MCNT 1: MSG#2
684 */
685 msgout >>= 8;
686 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
687 }
688 msgout |= MV_VALID; /* MV valid */
689 msgout |= (unsigned int)data->msgout_len; /* len */
690 nsp32_write4(base, SCSI_MSG_OUT, msgout);
691 } else {
692 /* data->msgout_len > 3 */
693 nsp32_write4(base, SCSI_MSG_OUT, 0);
694 }
695
696 /*
697 * set selection timeout(= 250ms)
698 */
699 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
700
701 /*
702 * set SREQ hazard killer sampling rate
703 *
704 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
705 * check other internal clock!
706 */
707 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
708
709 /*
710 * clear Arbit
711 */
712 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
713
714 /*
715 * set SYNCREG
716 * Don't set BM_START_ADR before setting this register.
717 */
718 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
719
720 /*
721 * set ACKWIDTH
722 */
723 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
724
725 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
726 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
727 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
728 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
729 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
730 data->msgout_len, msgout);
731
732 /*
733 * set SGT ADDR (physical address)
734 */
735 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
736
737 /*
738 * set TRANSFER CONTROL REG
739 */
740 command = 0;
741 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
742 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
743 if (SCpnt->request_bufflen > 0) {
744 command |= BM_START;
745 }
746 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
747 command |= CB_MMIO_MODE;
748 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
749 command |= CB_IO_MODE;
750 }
751 nsp32_write2(base, TRANSFER_CONTROL, command);
752
753 /*
754 * start AUTO SCSI, kick off arbitration
755 */
756 command = (CLEAR_CDB_FIFO_POINTER |
757 AUTOSCSI_START |
758 AUTO_MSGIN_00_OR_04 |
759 AUTO_MSGIN_02 |
760 AUTO_ATN );
761 nsp32_write2(base, COMMAND_CONTROL, command);
762
763 /*
764 * Check arbitration
765 */
766 status = nsp32_arbitration(SCpnt, base);
767
768 out:
769 /*
770 * IRQ enable
771 */
772 nsp32_write2(base, IRQ_CONTROL, 0);
773
774 return status;
775 }
776
777
778 /*
779 * Arbitration Status Check
780 *
781 * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
782 * Using udelay(1) consumes CPU time and system time, but
783 * arbitration delay time is defined minimal 2.4us in SCSI
784 * specification, thus udelay works as coarse grained wait timer.
785 */
786 static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
787 {
788 unsigned char arbit;
789 int status = TRUE;
790 int time = 0;
791
792 do {
793 arbit = nsp32_read1(base, ARBIT_STATUS);
794 time++;
795 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
796 (time <= ARBIT_TIMEOUT_TIME));
797
798 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
799 "arbit: 0x%x, delay time: %d", arbit, time);
800
801 if (arbit & ARBIT_WIN) {
802 /* Arbitration succeeded */
803 SCpnt->result = DID_OK << 16;
804 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
805 } else if (arbit & ARBIT_FAIL) {
806 /* Arbitration failed */
807 SCpnt->result = DID_BUS_BUSY << 16;
808 status = FALSE;
809 } else {
810 /*
811 * unknown error or ARBIT_GO timeout,
812 * something lock up! guess no connection.
813 */
814 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
815 SCpnt->result = DID_NO_CONNECT << 16;
816 status = FALSE;
817 }
818
819 /*
820 * clear Arbit
821 */
822 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
823
824 return status;
825 }
826
827
828 /*
829 * reselection
830 *
831 * Note: This reselection routine is called from msgin_occur,
832 * reselection target id&lun must be already set.
833 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
834 */
835 static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
836 {
837 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
838 unsigned int host_id = SCpnt->device->host->this_id;
839 unsigned int base = SCpnt->device->host->io_port;
840 unsigned char tmpid, newid;
841
842 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
843
844 /*
845 * calculate reselected SCSI ID
846 */
847 tmpid = nsp32_read1(base, RESELECT_ID);
848 tmpid &= (~BIT(host_id));
849 newid = 0;
850 while (tmpid) {
851 if (tmpid & 1) {
852 break;
853 }
854 tmpid >>= 1;
855 newid++;
856 }
857
858 /*
859 * If reselected New ID:LUN is not existed
860 * or current nexus is not existed, unexpected
861 * reselection is occurred. Send reject message.
862 */
863 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
864 nsp32_msg(KERN_WARNING, "unknown id/lun");
865 return FALSE;
866 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
867 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
868 return FALSE;
869 }
870
871 data->cur_id = newid;
872 data->cur_lun = newlun;
873 data->cur_target = &(data->target[newid]);
874 data->cur_lunt = &(data->lunt[newid][newlun]);
875
876 /* reset SACK/SavedACK counter (or ALL clear?) */
877 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
878
879 return TRUE;
880 }
881
882
883 /*
884 * nsp32_setup_sg_table - build scatter gather list for transfer data
885 * with bus master.
886 *
887 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
888 */
889 static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
890 {
891 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
892 struct scatterlist *sgl;
893 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
894 int num, i;
895 u32_le l;
896
897 if (SCpnt->request_bufflen == 0) {
898 return TRUE;
899 }
900
901 if (sgt == NULL) {
902 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
903 return FALSE;
904 }
905
906 if (SCpnt->use_sg) {
907 sgl = (struct scatterlist *)SCpnt->request_buffer;
908 num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg,
909 SCpnt->sc_data_direction);
910 for (i = 0; i < num; i++) {
911 /*
912 * Build nsp32_sglist, substitute sg dma addresses.
913 */
914 sgt[i].addr = cpu_to_le32(sg_dma_address(sgl));
915 sgt[i].len = cpu_to_le32(sg_dma_len(sgl));
916 sgl++;
917
918 if (le32_to_cpu(sgt[i].len) > 0x10000) {
919 nsp32_msg(KERN_ERR,
920 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
921 return FALSE;
922 }
923 nsp32_dbg(NSP32_DEBUG_SGLIST,
924 "num 0x%x : addr 0x%lx len 0x%lx",
925 i,
926 le32_to_cpu(sgt[i].addr),
927 le32_to_cpu(sgt[i].len ));
928 }
929
930 /* set end mark */
931 l = le32_to_cpu(sgt[num-1].len);
932 sgt[num-1].len = cpu_to_le32(l | SGTEND);
933
934 } else {
935 SCpnt->SCp.have_data_in = pci_map_single(data->Pci,
936 SCpnt->request_buffer, SCpnt->request_bufflen,
937 SCpnt->sc_data_direction);
938
939 sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in);
940 sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */
941
942 if (SCpnt->request_bufflen > 0x10000) {
943 nsp32_msg(KERN_ERR,
944 "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen);
945 return FALSE;
946 }
947 nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx",
948 le32_to_cpu(sgt[0].addr),
949 le32_to_cpu(sgt[0].len ));
950 }
951
952 return TRUE;
953 }
954
955 static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
956 {
957 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
958 nsp32_target *target;
959 nsp32_lunt *cur_lunt;
960 int ret;
961
962 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
963 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
964 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
965 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
966 SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen);
967
968 if (data->CurrentSC != NULL) {
969 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
970 data->CurrentSC = NULL;
971 SCpnt->result = DID_NO_CONNECT << 16;
972 done(SCpnt);
973 return 0;
974 }
975
976 /* check target ID is not same as this initiator ID */
977 if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
978 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
979 SCpnt->result = DID_BAD_TARGET << 16;
980 done(SCpnt);
981 return 0;
982 }
983
984 /* check target LUN is allowable value */
985 if (SCpnt->device->lun >= MAX_LUN) {
986 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
987 SCpnt->result = DID_BAD_TARGET << 16;
988 done(SCpnt);
989 return 0;
990 }
991
992 show_command(SCpnt);
993
994 SCpnt->scsi_done = done;
995 data->CurrentSC = SCpnt;
996 SCpnt->SCp.Status = CHECK_CONDITION;
997 SCpnt->SCp.Message = 0;
998 SCpnt->resid = SCpnt->request_bufflen;
999
1000 SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
1001 SCpnt->SCp.this_residual = SCpnt->request_bufflen;
1002 SCpnt->SCp.buffer = NULL;
1003 SCpnt->SCp.buffers_residual = 0;
1004
1005 /* initialize data */
1006 data->msgout_len = 0;
1007 data->msgin_len = 0;
1008 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
1009 cur_lunt->SCpnt = SCpnt;
1010 cur_lunt->save_datp = 0;
1011 cur_lunt->msgin03 = FALSE;
1012 data->cur_lunt = cur_lunt;
1013 data->cur_id = SCpnt->device->id;
1014 data->cur_lun = SCpnt->device->lun;
1015
1016 ret = nsp32_setup_sg_table(SCpnt);
1017 if (ret == FALSE) {
1018 nsp32_msg(KERN_ERR, "SGT fail");
1019 SCpnt->result = DID_ERROR << 16;
1020 nsp32_scsi_done(SCpnt);
1021 return 0;
1022 }
1023
1024 /* Build IDENTIFY */
1025 nsp32_build_identify(SCpnt);
1026
1027 /*
1028 * If target is the first time to transfer after the reset
1029 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
1030 * message SDTR is needed to do synchronous transfer.
1031 */
1032 target = &data->target[scmd_id(SCpnt)];
1033 data->cur_target = target;
1034
1035 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
1036 unsigned char period, offset;
1037
1038 if (trans_mode != ASYNC_MODE) {
1039 nsp32_set_max_sync(data, target, &period, &offset);
1040 nsp32_build_sdtr(SCpnt, period, offset);
1041 target->sync_flag |= SDTR_INITIATOR;
1042 } else {
1043 nsp32_set_async(data, target);
1044 target->sync_flag |= SDTR_DONE;
1045 }
1046
1047 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1048 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1049 target->limit_entry, period, offset);
1050 } else if (target->sync_flag & SDTR_INITIATOR) {
1051 /*
1052 * It was negotiating SDTR with target, sending from the
1053 * initiator, but there are no chance to remove this flag.
1054 * Set async because we don't get proper negotiation.
1055 */
1056 nsp32_set_async(data, target);
1057 target->sync_flag &= ~SDTR_INITIATOR;
1058 target->sync_flag |= SDTR_DONE;
1059
1060 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1061 "SDTR_INITIATOR: fall back to async");
1062 } else if (target->sync_flag & SDTR_TARGET) {
1063 /*
1064 * It was negotiating SDTR with target, sending from target,
1065 * but there are no chance to remove this flag. Set async
1066 * because we don't get proper negotiation.
1067 */
1068 nsp32_set_async(data, target);
1069 target->sync_flag &= ~SDTR_TARGET;
1070 target->sync_flag |= SDTR_DONE;
1071
1072 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1073 "Unknown SDTR from target is reached, fall back to async.");
1074 }
1075
1076 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1077 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1078 SCpnt->device->id, target->sync_flag, target->syncreg,
1079 target->ackwidth);
1080
1081 /* Selection */
1082 if (auto_param == 0) {
1083 ret = nsp32_selection_autopara(SCpnt);
1084 } else {
1085 ret = nsp32_selection_autoscsi(SCpnt);
1086 }
1087
1088 if (ret != TRUE) {
1089 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1090 nsp32_scsi_done(SCpnt);
1091 }
1092
1093 return 0;
1094 }
1095
1096 /* initialize asic */
1097 static int nsp32hw_init(nsp32_hw_data *data)
1098 {
1099 unsigned int base = data->BaseAddress;
1100 unsigned short irq_stat;
1101 unsigned long lc_reg;
1102 unsigned char power;
1103
1104 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1105 if ((lc_reg & 0xff00) == 0) {
1106 lc_reg |= (0x20 << 8);
1107 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1108 }
1109
1110 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1111 nsp32_write2(base, TRANSFER_CONTROL, 0);
1112 nsp32_write4(base, BM_CNT, 0);
1113 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1114
1115 do {
1116 irq_stat = nsp32_read2(base, IRQ_STATUS);
1117 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1118 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1119
1120 /*
1121 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1122 * designated by specification.
1123 */
1124 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1125 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1126 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1127 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1128 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1129 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1130 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1131 } else {
1132 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1133 }
1134
1135 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1136 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1137 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1138
1139 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1140 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1141 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
1142
1143 /*
1144 * initialize MISC_WRRD register
1145 *
1146 * Note: Designated parameters is obeyed as following:
1147 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1148 * MISC_MASTER_TERMINATION_SELECT: It must be set.
1149 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
1150 * MISC_AUTOSEL_TIMING_SEL: It should be set.
1151 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
1152 * MISC_DELAYED_BMSTART: It's selected for safety.
1153 *
1154 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1155 * we have to set TRANSFERCONTROL_BM_START as 0 and set
1156 * appropriate value before restarting bus master transfer.
1157 */
1158 nsp32_index_write2(base, MISC_WR,
1159 (SCSI_DIRECTION_DETECTOR_SELECT |
1160 DELAYED_BMSTART |
1161 MASTER_TERMINATION_SELECT |
1162 BMREQ_NEGATE_TIMING_SEL |
1163 AUTOSEL_TIMING_SEL |
1164 BMSTOP_CHANGE2_NONDATA_PHASE));
1165
1166 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1167 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1168 if (!(power & SENSE)) {
1169 nsp32_msg(KERN_INFO, "term power on");
1170 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1171 }
1172
1173 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1174 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1175
1176 nsp32_write1(base, SYNC_REG, 0);
1177 nsp32_write1(base, ACK_WIDTH, 0);
1178 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1179
1180 /*
1181 * enable to select designated IRQ (except for
1182 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1183 */
1184 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1185 IRQSELECT_SCSIRESET_IRQ |
1186 IRQSELECT_FIFO_SHLD_IRQ |
1187 IRQSELECT_RESELECT_IRQ |
1188 IRQSELECT_PHASE_CHANGE_IRQ |
1189 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1190 // IRQSELECT_BMCNTERR_IRQ |
1191 IRQSELECT_TARGET_ABORT_IRQ |
1192 IRQSELECT_MASTER_ABORT_IRQ );
1193 nsp32_write2(base, IRQ_CONTROL, 0);
1194
1195 /* PCI LED off */
1196 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1197 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1198
1199 return TRUE;
1200 }
1201
1202
1203 /* interrupt routine */
1204 static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
1205 {
1206 nsp32_hw_data *data = dev_id;
1207 unsigned int base = data->BaseAddress;
1208 struct scsi_cmnd *SCpnt = data->CurrentSC;
1209 unsigned short auto_stat, irq_stat, trans_stat;
1210 unsigned char busmon, busphase;
1211 unsigned long flags;
1212 int ret;
1213 int handled = 0;
1214
1215 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
1216 struct Scsi_Host *host = data->Host;
1217 spin_lock_irqsave(host->host_lock, flags);
1218 #else
1219 spin_lock_irqsave(&io_request_lock, flags);
1220 #endif
1221
1222 /*
1223 * IRQ check, then enable IRQ mask
1224 */
1225 irq_stat = nsp32_read2(base, IRQ_STATUS);
1226 nsp32_dbg(NSP32_DEBUG_INTR,
1227 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1228 /* is this interrupt comes from Ninja asic? */
1229 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1230 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1231 goto out2;
1232 }
1233 handled = 1;
1234 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1235
1236 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1237 busphase = busmon & BUSMON_PHASE_MASK;
1238
1239 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1240 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1241 nsp32_msg(KERN_INFO, "card disconnect");
1242 if (data->CurrentSC != NULL) {
1243 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1244 SCpnt->result = DID_BAD_TARGET << 16;
1245 nsp32_scsi_done(SCpnt);
1246 }
1247 goto out;
1248 }
1249
1250 /* Timer IRQ */
1251 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1252 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1253 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1254 goto out;
1255 }
1256
1257 /* SCSI reset */
1258 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1259 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1260 nsp32_do_bus_reset(data);
1261 if (SCpnt != NULL) {
1262 SCpnt->result = DID_RESET << 16;
1263 nsp32_scsi_done(SCpnt);
1264 }
1265 goto out;
1266 }
1267
1268 if (SCpnt == NULL) {
1269 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1270 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1271 goto out;
1272 }
1273
1274 /*
1275 * AutoSCSI Interrupt.
1276 * Note: This interrupt is occurred when AutoSCSI is finished. Then
1277 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
1278 * recorded when AutoSCSI sequencer has been processed.
1279 */
1280 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1281 /* getting SCSI executed phase */
1282 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1283 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1284
1285 /* Selection Timeout, go busfree phase. */
1286 if (auto_stat & SELECTION_TIMEOUT) {
1287 nsp32_dbg(NSP32_DEBUG_INTR,
1288 "selection timeout occurred");
1289
1290 SCpnt->result = DID_TIME_OUT << 16;
1291 nsp32_scsi_done(SCpnt);
1292 goto out;
1293 }
1294
1295 if (auto_stat & MSGOUT_PHASE) {
1296 /*
1297 * MsgOut phase was processed.
1298 * If MSG_IN_OCCUER is not set, then MsgOut phase is
1299 * completed. Thus, msgout_len must reset. Otherwise,
1300 * nothing to do here. If MSG_OUT_OCCUER is occurred,
1301 * then we will encounter the condition and check.
1302 */
1303 if (!(auto_stat & MSG_IN_OCCUER) &&
1304 (data->msgout_len <= 3)) {
1305 /*
1306 * !MSG_IN_OCCUER && msgout_len <=3
1307 * ---> AutoSCSI with MSGOUTreg is processed.
1308 */
1309 data->msgout_len = 0;
1310 };
1311
1312 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1313 }
1314
1315 if ((auto_stat & DATA_IN_PHASE) &&
1316 (SCpnt->resid > 0) &&
1317 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1318 printk( "auto+fifo\n");
1319 //nsp32_pio_read(SCpnt);
1320 }
1321
1322 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1323 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1324 nsp32_dbg(NSP32_DEBUG_INTR,
1325 "Data in/out phase processed");
1326
1327 /* read BMCNT, SGT pointer addr */
1328 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1329 nsp32_read4(base, BM_CNT));
1330 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1331 nsp32_read4(base, SGT_ADR));
1332 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1333 nsp32_read4(base, SACK_CNT));
1334 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1335 nsp32_read4(base, SAVED_SACK_CNT));
1336
1337 SCpnt->resid = 0; /* all data transfered! */
1338 }
1339
1340 /*
1341 * MsgIn Occur
1342 */
1343 if (auto_stat & MSG_IN_OCCUER) {
1344 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1345 }
1346
1347 /*
1348 * MsgOut Occur
1349 */
1350 if (auto_stat & MSG_OUT_OCCUER) {
1351 nsp32_msgout_occur(SCpnt);
1352 }
1353
1354 /*
1355 * Bus Free Occur
1356 */
1357 if (auto_stat & BUS_FREE_OCCUER) {
1358 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1359 if (ret == TRUE) {
1360 goto out;
1361 }
1362 }
1363
1364 if (auto_stat & STATUS_PHASE) {
1365 /*
1366 * Read CSB and substitute CSB for SCpnt->result
1367 * to save status phase stutas byte.
1368 * scsi error handler checks host_byte (DID_*:
1369 * low level driver to indicate status), then checks
1370 * status_byte (SCSI status byte).
1371 */
1372 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1373 }
1374
1375 if (auto_stat & ILLEGAL_PHASE) {
1376 /* Illegal phase is detected. SACK is not back. */
1377 nsp32_msg(KERN_WARNING,
1378 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1379
1380 /* TODO: currently we don't have any action... bus reset? */
1381
1382 /*
1383 * To send back SACK, assert, wait, and negate.
1384 */
1385 nsp32_sack_assert(data);
1386 nsp32_wait_req(data, NEGATE);
1387 nsp32_sack_negate(data);
1388
1389 }
1390
1391 if (auto_stat & COMMAND_PHASE) {
1392 /* nothing to do */
1393 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1394 }
1395
1396 if (auto_stat & AUTOSCSI_BUSY) {
1397 /* AutoSCSI is running */
1398 }
1399
1400 show_autophase(auto_stat);
1401 }
1402
1403 /* FIFO_SHLD_IRQ */
1404 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1405 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1406
1407 switch(busphase) {
1408 case BUSPHASE_DATA_OUT:
1409 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1410
1411 //nsp32_pio_write(SCpnt);
1412
1413 break;
1414
1415 case BUSPHASE_DATA_IN:
1416 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1417
1418 //nsp32_pio_read(SCpnt);
1419
1420 break;
1421
1422 case BUSPHASE_STATUS:
1423 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1424
1425 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1426
1427 break;
1428 default:
1429 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1430 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1431 show_busphase(busphase);
1432 break;
1433 }
1434
1435 goto out;
1436 }
1437
1438 /* Phase Change IRQ */
1439 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1440 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1441
1442 switch(busphase) {
1443 case BUSPHASE_MESSAGE_IN:
1444 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1445 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1446 break;
1447 default:
1448 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1449 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1450 irq_stat, trans_stat);
1451 show_busphase(busphase);
1452 break;
1453 }
1454 goto out;
1455 }
1456
1457 /* PCI_IRQ */
1458 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1459 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1460 /* Do nothing */
1461 }
1462
1463 /* BMCNTERR_IRQ */
1464 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1465 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1466 /*
1467 * TODO: To be implemented improving bus master
1468 * transfer reliablity when BMCNTERR is occurred in
1469 * AutoSCSI phase described in specification.
1470 */
1471 }
1472
1473 #if 0
1474 nsp32_dbg(NSP32_DEBUG_INTR,
1475 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1476 show_busphase(busphase);
1477 #endif
1478
1479 out:
1480 /* disable IRQ mask */
1481 nsp32_write2(base, IRQ_CONTROL, 0);
1482
1483 out2:
1484 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
1485 spin_unlock_irqrestore(host->host_lock, flags);
1486 #else
1487 spin_unlock_irqrestore(&io_request_lock, flags);
1488 #endif
1489
1490 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1491
1492 return IRQ_RETVAL(handled);
1493 }
1494
1495 #undef SPRINTF
1496 #define SPRINTF(args...) \
1497 do { \
1498 if(length > (pos - buffer)) { \
1499 pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
1500 nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
1501 } \
1502 } while(0)
1503 static int nsp32_proc_info(
1504 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1505 struct Scsi_Host *host,
1506 #endif
1507 char *buffer,
1508 char **start,
1509 off_t offset,
1510 int length,
1511 #if !(LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1512 int hostno,
1513 #endif
1514 int inout)
1515 {
1516 char *pos = buffer;
1517 int thislength;
1518 unsigned long flags;
1519 nsp32_hw_data *data;
1520 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1521 int hostno;
1522 #else
1523 struct Scsi_Host *host;
1524 #endif
1525 unsigned int base;
1526 unsigned char mode_reg;
1527 int id, speed;
1528 long model;
1529
1530 /* Write is not supported, just return. */
1531 if (inout == TRUE) {
1532 return -EINVAL;
1533 }
1534
1535 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1536 hostno = host->host_no;
1537 #else
1538 /* search this HBA host */
1539 host = scsi_host_hn_get(hostno);
1540 if (host == NULL) {
1541 return -ESRCH;
1542 }
1543 #endif
1544 data = (nsp32_hw_data *)host->hostdata;
1545 base = host->io_port;
1546
1547 SPRINTF("NinjaSCSI-32 status\n\n");
1548 SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
1549 SPRINTF("SCSI host No.: %d\n", hostno);
1550 SPRINTF("IRQ: %d\n", host->irq);
1551 SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1552 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1553 SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
1554 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1555
1556 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1557 model = data->pci_devid->driver_data;
1558
1559 #ifdef CONFIG_PM
1560 SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1561 #endif
1562 SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1563
1564 spin_lock_irqsave(&(data->Lock), flags);
1565 SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
1566 spin_unlock_irqrestore(&(data->Lock), flags);
1567
1568
1569 SPRINTF("SDTR status\n");
1570 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1571
1572 SPRINTF("id %d: ", id);
1573
1574 if (id == host->this_id) {
1575 SPRINTF("----- NinjaSCSI-32 host adapter\n");
1576 continue;
1577 }
1578
1579 if (data->target[id].sync_flag == SDTR_DONE) {
1580 if (data->target[id].period == 0 &&
1581 data->target[id].offset == ASYNC_OFFSET ) {
1582 SPRINTF("async");
1583 } else {
1584 SPRINTF(" sync");
1585 }
1586 } else {
1587 SPRINTF(" none");
1588 }
1589
1590 if (data->target[id].period != 0) {
1591
1592 speed = 1000000 / (data->target[id].period * 4);
1593
1594 SPRINTF(" transfer %d.%dMB/s, offset %d",
1595 speed / 1000,
1596 speed % 1000,
1597 data->target[id].offset
1598 );
1599 }
1600 SPRINTF("\n");
1601 }
1602
1603
1604 thislength = pos - (buffer + offset);
1605
1606 if(thislength < 0) {
1607 *start = NULL;
1608 return 0;
1609 }
1610
1611
1612 thislength = min(thislength, length);
1613 *start = buffer + offset;
1614
1615 return thislength;
1616 }
1617 #undef SPRINTF
1618
1619
1620
1621 /*
1622 * Reset parameters and call scsi_done for data->cur_lunt.
1623 * Be careful setting SCpnt->result = DID_* before calling this function.
1624 */
1625 static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1626 {
1627 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1628 unsigned int base = SCpnt->device->host->io_port;
1629
1630 /*
1631 * unmap pci
1632 */
1633 if (SCpnt->request_bufflen == 0) {
1634 goto skip;
1635 }
1636
1637 if (SCpnt->use_sg) {
1638 pci_unmap_sg(data->Pci,
1639 (struct scatterlist *)SCpnt->request_buffer,
1640 SCpnt->use_sg, SCpnt->sc_data_direction);
1641 } else {
1642 pci_unmap_single(data->Pci,
1643 (u32)SCpnt->SCp.have_data_in,
1644 SCpnt->request_bufflen,
1645 SCpnt->sc_data_direction);
1646 }
1647
1648 skip:
1649 /*
1650 * clear TRANSFERCONTROL_BM_START
1651 */
1652 nsp32_write2(base, TRANSFER_CONTROL, 0);
1653 nsp32_write4(base, BM_CNT, 0);
1654
1655 /*
1656 * call scsi_done
1657 */
1658 (*SCpnt->scsi_done)(SCpnt);
1659
1660 /*
1661 * reset parameters
1662 */
1663 data->cur_lunt->SCpnt = NULL;
1664 data->cur_lunt = NULL;
1665 data->cur_target = NULL;
1666 data->CurrentSC = NULL;
1667 }
1668
1669
1670 /*
1671 * Bus Free Occur
1672 *
1673 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
1674 * with ACK reply when below condition is matched:
1675 * MsgIn 00: Command Complete.
1676 * MsgIn 02: Save Data Pointer.
1677 * MsgIn 04: Diconnect.
1678 * In other case, unexpected BUSFREE is detected.
1679 */
1680 static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1681 {
1682 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1683 unsigned int base = SCpnt->device->host->io_port;
1684
1685 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1686 show_autophase(execph);
1687
1688 nsp32_write4(base, BM_CNT, 0);
1689 nsp32_write2(base, TRANSFER_CONTROL, 0);
1690
1691 /*
1692 * MsgIn 02: Save Data Pointer
1693 *
1694 * VALID:
1695 * Save Data Pointer is received. Adjust pointer.
1696 *
1697 * NO-VALID:
1698 * SCSI-3 says if Save Data Pointer is not received, then we restart
1699 * processing and we can't adjust any SCSI data pointer in next data
1700 * phase.
1701 */
1702 if (execph & MSGIN_02_VALID) {
1703 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1704
1705 /*
1706 * Check sack_cnt/saved_sack_cnt, then adjust sg table if
1707 * needed.
1708 */
1709 if (!(execph & MSGIN_00_VALID) &&
1710 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1711 unsigned int sacklen, s_sacklen;
1712
1713 /*
1714 * Read SACK count and SAVEDSACK count, then compare.
1715 */
1716 sacklen = nsp32_read4(base, SACK_CNT );
1717 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1718
1719 /*
1720 * If SAVEDSACKCNT == 0, it means SavedDataPointer is
1721 * come after data transfering.
1722 */
1723 if (s_sacklen > 0) {
1724 /*
1725 * Comparing between sack and savedsack to
1726 * check the condition of AutoMsgIn03.
1727 *
1728 * If they are same, set msgin03 == TRUE,
1729 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
1730 * reselection. On the other hand, if they
1731 * aren't same, set msgin03 == FALSE, and
1732 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
1733 * reselection.
1734 */
1735 if (sacklen != s_sacklen) {
1736 data->cur_lunt->msgin03 = FALSE;
1737 } else {
1738 data->cur_lunt->msgin03 = TRUE;
1739 }
1740
1741 nsp32_adjust_busfree(SCpnt, s_sacklen);
1742 }
1743 }
1744
1745 /* This value has not substitude with valid value yet... */
1746 //data->cur_lunt->save_datp = data->cur_datp;
1747 } else {
1748 /*
1749 * no processing.
1750 */
1751 }
1752
1753 if (execph & MSGIN_03_VALID) {
1754 /* MsgIn03 was valid to be processed. No need processing. */
1755 }
1756
1757 /*
1758 * target SDTR check
1759 */
1760 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1761 /*
1762 * SDTR negotiation pulled by the initiator has not
1763 * finished yet. Fall back to ASYNC mode.
1764 */
1765 nsp32_set_async(data, data->cur_target);
1766 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1767 data->cur_target->sync_flag |= SDTR_DONE;
1768 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1769 /*
1770 * SDTR negotiation pulled by the target has been
1771 * negotiating.
1772 */
1773 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1774 /*
1775 * If valid message is received, then
1776 * negotiation is succeeded.
1777 */
1778 } else {
1779 /*
1780 * On the contrary, if unexpected bus free is
1781 * occurred, then negotiation is failed. Fall
1782 * back to ASYNC mode.
1783 */
1784 nsp32_set_async(data, data->cur_target);
1785 }
1786 data->cur_target->sync_flag &= ~SDTR_TARGET;
1787 data->cur_target->sync_flag |= SDTR_DONE;
1788 }
1789
1790 /*
1791 * It is always ensured by SCSI standard that initiator
1792 * switches into Bus Free Phase after
1793 * receiving message 00 (Command Complete), 04 (Disconnect).
1794 * It's the reason that processing here is valid.
1795 */
1796 if (execph & MSGIN_00_VALID) {
1797 /* MsgIn 00: Command Complete */
1798 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1799
1800 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1801 SCpnt->SCp.Message = 0;
1802 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1803 "normal end stat=0x%x resid=0x%x\n",
1804 SCpnt->SCp.Status, SCpnt->resid);
1805 SCpnt->result = (DID_OK << 16) |
1806 (SCpnt->SCp.Message << 8) |
1807 (SCpnt->SCp.Status << 0);
1808 nsp32_scsi_done(SCpnt);
1809 /* All operation is done */
1810 return TRUE;
1811 } else if (execph & MSGIN_04_VALID) {
1812 /* MsgIn 04: Disconnect */
1813 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1814 SCpnt->SCp.Message = 4;
1815
1816 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1817 return TRUE;
1818 } else {
1819 /* Unexpected bus free */
1820 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1821
1822 /* DID_ERROR? */
1823 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
1824 SCpnt->result = DID_ERROR << 16;
1825 nsp32_scsi_done(SCpnt);
1826 return TRUE;
1827 }
1828 return FALSE;
1829 }
1830
1831
1832 /*
1833 * nsp32_adjust_busfree - adjusting SG table
1834 *
1835 * Note: This driver adjust the SG table using SCSI ACK
1836 * counter instead of BMCNT counter!
1837 */
1838 static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1839 {
1840 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1841 int old_entry = data->cur_entry;
1842 int new_entry;
1843 int sg_num = data->cur_lunt->sg_num;
1844 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1845 unsigned int restlen, sentlen;
1846 u32_le len, addr;
1847
1848 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid);
1849
1850 /* adjust saved SACK count with 4 byte start address boundary */
1851 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1852
1853 /*
1854 * calculate new_entry from sack count and each sgt[].len
1855 * calculate the byte which is intent to send
1856 */
1857 sentlen = 0;
1858 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1859 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1860 if (sentlen > s_sacklen) {
1861 break;
1862 }
1863 }
1864
1865 /* all sgt is processed */
1866 if (new_entry == sg_num) {
1867 goto last;
1868 }
1869
1870 if (sentlen == s_sacklen) {
1871 /* XXX: confirm it's ok or not */
1872 /* In this case, it's ok because we are at
1873 the head element of the sg. restlen is correctly calculated. */
1874 }
1875
1876 /* calculate the rest length for transfering */
1877 restlen = sentlen - s_sacklen;
1878
1879 /* update adjusting current SG table entry */
1880 len = le32_to_cpu(sgt[new_entry].len);
1881 addr = le32_to_cpu(sgt[new_entry].addr);
1882 addr += (len - restlen);
1883 sgt[new_entry].addr = cpu_to_le32(addr);
1884 sgt[new_entry].len = cpu_to_le32(restlen);
1885
1886 /* set cur_entry with new_entry */
1887 data->cur_entry = new_entry;
1888
1889 return;
1890
1891 last:
1892 if (SCpnt->resid < sentlen) {
1893 nsp32_msg(KERN_ERR, "resid underflow");
1894 }
1895
1896 SCpnt->resid -= sentlen;
1897 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid);
1898
1899 /* update hostdata and lun */
1900
1901 return;
1902 }
1903
1904
1905 /*
1906 * It's called MsgOut phase occur.
1907 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
1908 * message out phase. It, however, has more than 3 messages,
1909 * HBA creates the interrupt and we have to process by hand.
1910 */
1911 static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1912 {
1913 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1914 unsigned int base = SCpnt->device->host->io_port;
1915 //unsigned short command;
1916 long new_sgtp;
1917 int i;
1918
1919 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1920 "enter: msgout_len: 0x%x", data->msgout_len);
1921
1922 /*
1923 * If MsgOut phase is occurred without having any
1924 * message, then No_Operation is sent (SCSI-2).
1925 */
1926 if (data->msgout_len == 0) {
1927 nsp32_build_nop(SCpnt);
1928 }
1929
1930 /*
1931 * Set SGTP ADDR current entry for restarting AUTOSCSI,
1932 * because SGTP is incremented next point.
1933 * There is few statement in the specification...
1934 */
1935 new_sgtp = data->cur_lunt->sglun_paddr +
1936 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1937
1938 /*
1939 * send messages
1940 */
1941 for (i = 0; i < data->msgout_len; i++) {
1942 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1943 "%d : 0x%x", i, data->msgoutbuf[i]);
1944
1945 /*
1946 * Check REQ is asserted.
1947 */
1948 nsp32_wait_req(data, ASSERT);
1949
1950 if (i == (data->msgout_len - 1)) {
1951 /*
1952 * If the last message, set the AutoSCSI restart
1953 * before send back the ack message. AutoSCSI
1954 * restart automatically negate ATN signal.
1955 */
1956 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
1957 //nsp32_restart_autoscsi(SCpnt, command);
1958 nsp32_write2(base, COMMAND_CONTROL,
1959 (CLEAR_CDB_FIFO_POINTER |
1960 AUTO_COMMAND_PHASE |
1961 AUTOSCSI_RESTART |
1962 AUTO_MSGIN_00_OR_04 |
1963 AUTO_MSGIN_02 ));
1964 }
1965 /*
1966 * Write data with SACK, then wait sack is
1967 * automatically negated.
1968 */
1969 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1970 nsp32_wait_sack(data, NEGATE);
1971
1972 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1973 nsp32_read1(base, SCSI_BUS_MONITOR));
1974 };
1975
1976 data->msgout_len = 0;
1977
1978 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1979 }
1980
1981 /*
1982 * Restart AutoSCSI
1983 *
1984 * Note: Restarting AutoSCSI needs set:
1985 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
1986 */
1987 static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1988 {
1989 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1990 unsigned int base = data->BaseAddress;
1991 unsigned short transfer = 0;
1992
1993 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1994
1995 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1996 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1997 }
1998
1999 /*
2000 * set SYNC_REG
2001 * Don't set BM_START_ADR before setting this register.
2002 */
2003 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
2004
2005 /*
2006 * set ACKWIDTH
2007 */
2008 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
2009
2010 /*
2011 * set SREQ hazard killer sampling rate
2012 */
2013 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
2014
2015 /*
2016 * set SGT ADDR (physical address)
2017 */
2018 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
2019
2020 /*
2021 * set TRANSFER CONTROL REG
2022 */
2023 transfer = 0;
2024 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
2025 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
2026 if (SCpnt->request_bufflen > 0) {
2027 transfer |= BM_START;
2028 }
2029 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
2030 transfer |= CB_MMIO_MODE;
2031 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
2032 transfer |= CB_IO_MODE;
2033 }
2034 nsp32_write2(base, TRANSFER_CONTROL, transfer);
2035
2036 /*
2037 * restart AutoSCSI
2038 *
2039 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
2040 */
2041 command |= (CLEAR_CDB_FIFO_POINTER |
2042 AUTO_COMMAND_PHASE |
2043 AUTOSCSI_RESTART );
2044 nsp32_write2(base, COMMAND_CONTROL, command);
2045
2046 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
2047 }
2048
2049
2050 /*
2051 * cannot run automatically message in occur
2052 */
2053 static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
2054 unsigned long irq_status,
2055 unsigned short execph)
2056 {
2057 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2058 unsigned int base = SCpnt->device->host->io_port;
2059 unsigned char msg;
2060 unsigned char msgtype;
2061 unsigned char newlun;
2062 unsigned short command = 0;
2063 int msgclear = TRUE;
2064 long new_sgtp;
2065 int ret;
2066
2067 /*
2068 * read first message
2069 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
2070 * of Message-In have to be processed before sending back SCSI ACK.
2071 */
2072 msg = nsp32_read1(base, SCSI_DATA_IN);
2073 data->msginbuf[(unsigned char)data->msgin_len] = msg;
2074 msgtype = data->msginbuf[0];
2075 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
2076 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
2077 data->msgin_len, msg, msgtype);
2078
2079 /*
2080 * TODO: We need checking whether bus phase is message in?
2081 */
2082
2083 /*
2084 * assert SCSI ACK
2085 */
2086 nsp32_sack_assert(data);
2087
2088 /*
2089 * processing IDENTIFY
2090 */
2091 if (msgtype & 0x80) {
2092 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
2093 /* Invalid (non reselect) phase */
2094 goto reject;
2095 }
2096
2097 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
2098 ret = nsp32_reselection(SCpnt, newlun);
2099 if (ret == TRUE) {
2100 goto restart;
2101 } else {
2102 goto reject;
2103 }
2104 }
2105
2106 /*
2107 * processing messages except for IDENTIFY
2108 *
2109 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
2110 */
2111 switch (msgtype) {
2112 /*
2113 * 1-byte message
2114 */
2115 case COMMAND_COMPLETE:
2116 case DISCONNECT:
2117 /*
2118 * These messages should not be occurred.
2119 * They should be processed on AutoSCSI sequencer.
2120 */
2121 nsp32_msg(KERN_WARNING,
2122 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
2123 break;
2124
2125 case RESTORE_POINTERS:
2126 /*
2127 * AutoMsgIn03 is disabled, and HBA gets this message.
2128 */
2129
2130 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2131 unsigned int s_sacklen;
2132
2133 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2134 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2135 nsp32_adjust_busfree(SCpnt, s_sacklen);
2136 } else {
2137 /* No need to rewrite SGT */
2138 }
2139 }
2140 data->cur_lunt->msgin03 = FALSE;
2141
2142 /* Update with the new value */
2143
2144 /* reset SACK/SavedACK counter (or ALL clear?) */
2145 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2146
2147 /*
2148 * set new sg pointer
2149 */
2150 new_sgtp = data->cur_lunt->sglun_paddr +
2151 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2152 nsp32_write4(base, SGT_ADR, new_sgtp);
2153
2154 break;
2155
2156 case SAVE_POINTERS:
2157 /*
2158 * These messages should not be occurred.
2159 * They should be processed on AutoSCSI sequencer.
2160 */
2161 nsp32_msg (KERN_WARNING,
2162 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2163
2164 break;
2165
2166 case MESSAGE_REJECT:
2167 /* If previous message_out is sending SDTR, and get
2168 message_reject from target, SDTR negotiation is failed */
2169 if (data->cur_target->sync_flag &
2170 (SDTR_INITIATOR | SDTR_TARGET)) {
2171 /*
2172 * Current target is negotiating SDTR, but it's
2173 * failed. Fall back to async transfer mode, and set
2174 * SDTR_DONE.
2175 */
2176 nsp32_set_async(data, data->cur_target);
2177 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2178 data->cur_target->sync_flag |= SDTR_DONE;
2179
2180 }
2181 break;
2182
2183 case LINKED_CMD_COMPLETE:
2184 case LINKED_FLG_CMD_COMPLETE:
2185 /* queue tag is not supported currently */
2186 nsp32_msg (KERN_WARNING,
2187 "unsupported message: 0x%x", msgtype);
2188 break;
2189
2190 case INITIATE_RECOVERY:
2191 /* staring ECA (Extended Contingent Allegiance) state. */
2192 /* This message is declined in SPI2 or later. */
2193
2194 goto reject;
2195
2196 /*
2197 * 2-byte message
2198 */
2199 case SIMPLE_QUEUE_TAG:
2200 case 0x23:
2201 /*
2202 * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2203 * No support is needed.
2204 */
2205 if (data->msgin_len >= 1) {
2206 goto reject;
2207 }
2208
2209 /* current position is 1-byte of 2 byte */
2210 msgclear = FALSE;
2211
2212 break;
2213
2214 /*
2215 * extended message
2216 */
2217 case EXTENDED_MESSAGE:
2218 if (data->msgin_len < 1) {
2219 /*
2220 * Current position does not reach 2-byte
2221 * (2-byte is extended message length).
2222 */
2223 msgclear = FALSE;
2224 break;
2225 }
2226
2227 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2228 /*
2229 * Current extended message has msginbuf[1] + 2
2230 * (msgin_len starts counting from 0, so buf[1] + 1).
2231 * If current message position is not finished,
2232 * continue receiving message.
2233 */
2234 msgclear = FALSE;
2235 break;
2236 }
2237
2238 /*
2239 * Reach here means regular length of each type of
2240 * extended messages.
2241 */
2242 switch (data->msginbuf[2]) {
2243 case EXTENDED_MODIFY_DATA_POINTER:
2244 /* TODO */
2245 goto reject; /* not implemented yet */
2246 break;
2247
2248 case EXTENDED_SDTR:
2249 /*
2250 * Exchange this message between initiator and target.
2251 */
2252 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2253 /*
2254 * received inappropriate message.
2255 */
2256 goto reject;
2257 break;
2258 }
2259
2260 nsp32_analyze_sdtr(SCpnt);
2261
2262 break;
2263
2264 case EXTENDED_EXTENDED_IDENTIFY:
2265 /* SCSI-I only, not supported. */
2266 goto reject; /* not implemented yet */
2267
2268 break;
2269
2270 case EXTENDED_WDTR:
2271 goto reject; /* not implemented yet */
2272
2273 break;
2274
2275 default:
2276 goto reject;
2277 }
2278 break;
2279
2280 default:
2281 goto reject;
2282 }
2283
2284 restart:
2285 if (msgclear == TRUE) {
2286 data->msgin_len = 0;
2287
2288 /*
2289 * If restarting AutoSCSI, but there are some message to out
2290 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
2291 * (MV_VALID = 0). When commandcontrol is written with
2292 * AutoSCSI restart, at the same time MsgOutOccur should be
2293 * happened (however, such situation is really possible...?).
2294 */
2295 if (data->msgout_len > 0) {
2296 nsp32_write4(base, SCSI_MSG_OUT, 0);
2297 command |= AUTO_ATN;
2298 }
2299
2300 /*
2301 * restart AutoSCSI
2302 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2303 */
2304 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2305
2306 /*
2307 * If current msgin03 is TRUE, then flag on.
2308 */
2309 if (data->cur_lunt->msgin03 == TRUE) {
2310 command |= AUTO_MSGIN_03;
2311 }
2312 data->cur_lunt->msgin03 = FALSE;
2313 } else {
2314 data->msgin_len++;
2315 }
2316
2317 /*
2318 * restart AutoSCSI
2319 */
2320 nsp32_restart_autoscsi(SCpnt, command);
2321
2322 /*
2323 * wait SCSI REQ negate for REQ-ACK handshake
2324 */
2325 nsp32_wait_req(data, NEGATE);
2326
2327 /*
2328 * negate SCSI ACK
2329 */
2330 nsp32_sack_negate(data);
2331
2332 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2333
2334 return;
2335
2336 reject:
2337 nsp32_msg(KERN_WARNING,
2338 "invalid or unsupported MessageIn, rejected. "
2339 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2340 msg, data->msgin_len, msgtype);
2341 nsp32_build_reject(SCpnt);
2342 data->msgin_len = 0;
2343
2344 goto restart;
2345 }
2346
2347 /*
2348 *
2349 */
2350 static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2351 {
2352 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2353 nsp32_target *target = data->cur_target;
2354 nsp32_sync_table *synct;
2355 unsigned char get_period = data->msginbuf[3];
2356 unsigned char get_offset = data->msginbuf[4];
2357 int entry;
2358 int syncnum;
2359
2360 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2361
2362 synct = data->synct;
2363 syncnum = data->syncnum;
2364
2365 /*
2366 * If this inititor sent the SDTR message, then target responds SDTR,
2367 * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2368 * Messages are not appropriate, then send back reject message.
2369 * If initiator did not send the SDTR, but target sends SDTR,
2370 * initiator calculator the appropriate parameter and send back SDTR.
2371 */
2372 if (target->sync_flag & SDTR_INITIATOR) {
2373 /*
2374 * Initiator sent SDTR, the target responds and
2375 * send back negotiation SDTR.
2376 */
2377 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2378
2379 target->sync_flag &= ~SDTR_INITIATOR;
2380 target->sync_flag |= SDTR_DONE;
2381
2382 /*
2383 * offset:
2384 */
2385 if (get_offset > SYNC_OFFSET) {
2386 /*
2387 * Negotiation is failed, the target send back
2388 * unexpected offset value.
2389 */
2390 goto reject;
2391 }
2392
2393 if (get_offset == ASYNC_OFFSET) {
2394 /*
2395 * Negotiation is succeeded, the target want
2396 * to fall back into asynchronous transfer mode.
2397 */
2398 goto async;
2399 }
2400
2401 /*
2402 * period:
2403 * Check whether sync period is too short. If too short,
2404 * fall back to async mode. If it's ok, then investigate
2405 * the received sync period. If sync period is acceptable
2406 * between sync table start_period and end_period, then
2407 * set this I_T nexus as sent offset and period.
2408 * If it's not acceptable, send back reject and fall back
2409 * to async mode.
2410 */
2411 if (get_period < data->synct[0].period_num) {
2412 /*
2413 * Negotiation is failed, the target send back
2414 * unexpected period value.
2415 */
2416 goto reject;
2417 }
2418
2419 entry = nsp32_search_period_entry(data, target, get_period);
2420
2421 if (entry < 0) {
2422 /*
2423 * Target want to use long period which is not
2424 * acceptable NinjaSCSI-32Bi/UDE.
2425 */
2426 goto reject;
2427 }
2428
2429 /*
2430 * Set new sync table and offset in this I_T nexus.
2431 */
2432 nsp32_set_sync_entry(data, target, entry, get_offset);
2433 } else {
2434 /* Target send SDTR to initiator. */
2435 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2436
2437 target->sync_flag |= SDTR_INITIATOR;
2438
2439 /* offset: */
2440 if (get_offset > SYNC_OFFSET) {
2441 /* send back as SYNC_OFFSET */
2442 get_offset = SYNC_OFFSET;
2443 }
2444
2445 /* period: */
2446 if (get_period < data->synct[0].period_num) {
2447 get_period = data->synct[0].period_num;
2448 }
2449
2450 entry = nsp32_search_period_entry(data, target, get_period);
2451
2452 if (get_offset == ASYNC_OFFSET || entry < 0) {
2453 nsp32_set_async(data, target);
2454 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2455 } else {
2456 nsp32_set_sync_entry(data, target, entry, get_offset);
2457 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2458 }
2459 }
2460
2461 target->period = get_period;
2462 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2463 return;
2464
2465 reject:
2466 /*
2467 * If the current message is unacceptable, send back to the target
2468 * with reject message.
2469 */
2470 nsp32_build_reject(SCpnt);
2471
2472 async:
2473 nsp32_set_async(data, target); /* set as ASYNC transfer mode */
2474
2475 target->period = 0;
2476 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2477 return;
2478 }
2479
2480
2481 /*
2482 * Search config entry number matched in sync_table from given
2483 * target and speed period value. If failed to search, return negative value.
2484 */
2485 static int nsp32_search_period_entry(nsp32_hw_data *data,
2486 nsp32_target *target,
2487 unsigned char period)
2488 {
2489 int i;
2490
2491 if (target->limit_entry >= data->syncnum) {
2492 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2493 target->limit_entry = 0;
2494 }
2495
2496 for (i = target->limit_entry; i < data->syncnum; i++) {
2497 if (period >= data->synct[i].start_period &&
2498 period <= data->synct[i].end_period) {
2499 break;
2500 }
2501 }
2502
2503 /*
2504 * Check given period value is over the sync_table value.
2505 * If so, return max value.
2506 */
2507 if (i == data->syncnum) {
2508 i = -1;
2509 }
2510
2511 return i;
2512 }
2513
2514
2515 /*
2516 * target <-> initiator use ASYNC transfer
2517 */
2518 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2519 {
2520 unsigned char period = data->synct[target->limit_entry].period_num;
2521
2522 target->offset = ASYNC_OFFSET;
2523 target->period = 0;
2524 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2525 target->ackwidth = 0;
2526 target->sample_reg = 0;
2527
2528 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2529 }
2530
2531
2532 /*
2533 * target <-> initiator use maximum SYNC transfer
2534 */
2535 static void nsp32_set_max_sync(nsp32_hw_data *data,
2536 nsp32_target *target,
2537 unsigned char *period,
2538 unsigned char *offset)
2539 {
2540 unsigned char period_num, ackwidth;
2541
2542 period_num = data->synct[target->limit_entry].period_num;
2543 *period = data->synct[target->limit_entry].start_period;
2544 ackwidth = data->synct[target->limit_entry].ackwidth;
2545 *offset = SYNC_OFFSET;
2546
2547 target->syncreg = TO_SYNCREG(period_num, *offset);
2548 target->ackwidth = ackwidth;
2549 target->offset = *offset;
2550 target->sample_reg = 0; /* disable SREQ sampling */
2551 }
2552
2553
2554 /*
2555 * target <-> initiator use entry number speed
2556 */
2557 static void nsp32_set_sync_entry(nsp32_hw_data *data,
2558 nsp32_target *target,
2559 int entry,
2560 unsigned char offset)
2561 {
2562 unsigned char period, ackwidth, sample_rate;
2563
2564 period = data->synct[entry].period_num;
2565 ackwidth = data->synct[entry].ackwidth;
2566 offset = offset;
2567 sample_rate = data->synct[entry].sample_rate;
2568
2569 target->syncreg = TO_SYNCREG(period, offset);
2570 target->ackwidth = ackwidth;
2571 target->offset = offset;
2572 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2573
2574 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2575 }
2576
2577
2578 /*
2579 * It waits until SCSI REQ becomes assertion or negation state.
2580 *
2581 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
2582 * connected target responds SCSI REQ negation. We have to wait
2583 * SCSI REQ becomes negation in order to negate SCSI ACK signal for
2584 * REQ-ACK handshake.
2585 */
2586 static void nsp32_wait_req(nsp32_hw_data *data, int state)
2587 {
2588 unsigned int base = data->BaseAddress;
2589 int wait_time = 0;
2590 unsigned char bus, req_bit;
2591
2592 if (!((state == ASSERT) || (state == NEGATE))) {
2593 nsp32_msg(KERN_ERR, "unknown state designation");
2594 }
2595 /* REQ is BIT(5) */
2596 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2597
2598 do {
2599 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2600 if ((bus & BUSMON_REQ) == req_bit) {
2601 nsp32_dbg(NSP32_DEBUG_WAIT,
2602 "wait_time: %d", wait_time);
2603 return;
2604 }
2605 udelay(1);
2606 wait_time++;
2607 } while (wait_time < REQSACK_TIMEOUT_TIME);
2608
2609 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2610 }
2611
2612 /*
2613 * It waits until SCSI SACK becomes assertion or negation state.
2614 */
2615 static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2616 {
2617 unsigned int base = data->BaseAddress;
2618 int wait_time = 0;
2619 unsigned char bus, ack_bit;
2620
2621 if (!((state == ASSERT) || (state == NEGATE))) {
2622 nsp32_msg(KERN_ERR, "unknown state designation");
2623 }
2624 /* ACK is BIT(4) */
2625 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2626
2627 do {
2628 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2629 if ((bus & BUSMON_ACK) == ack_bit) {
2630 nsp32_dbg(NSP32_DEBUG_WAIT,
2631 "wait_time: %d", wait_time);
2632 return;
2633 }
2634 udelay(1);
2635 wait_time++;
2636 } while (wait_time < REQSACK_TIMEOUT_TIME);
2637
2638 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2639 }
2640
2641 /*
2642 * assert SCSI ACK
2643 *
2644 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
2645 */
2646 static void nsp32_sack_assert(nsp32_hw_data *data)
2647 {
2648 unsigned int base = data->BaseAddress;
2649 unsigned char busctrl;
2650
2651 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2652 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2653 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2654 }
2655
2656 /*
2657 * negate SCSI ACK
2658 */
2659 static void nsp32_sack_negate(nsp32_hw_data *data)
2660 {
2661 unsigned int base = data->BaseAddress;
2662 unsigned char busctrl;
2663
2664 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2665 busctrl &= ~BUSCTL_ACK;
2666 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2667 }
2668
2669
2670
2671 /*
2672 * Note: n_io_port is defined as 0x7f because I/O register port is
2673 * assigned as:
2674 * 0x800-0x8ff: memory mapped I/O port
2675 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
2676 * 0xc00-0xfff: CardBus status registers
2677 */
2678 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2679 #define DETECT_OK 0
2680 #define DETECT_NG 1
2681 #define PCIDEV pdev
2682 static int nsp32_detect(struct pci_dev *pdev)
2683 #else
2684 #define DETECT_OK 1
2685 #define DETECT_NG 0
2686 #define PCIDEV (data->Pci)
2687 static int nsp32_detect(struct scsi_host_template *sht)
2688 #endif
2689 {
2690 struct Scsi_Host *host; /* registered host structure */
2691 struct resource *res;
2692 nsp32_hw_data *data;
2693 int ret;
2694 int i, j;
2695
2696 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2697
2698 /*
2699 * register this HBA as SCSI device
2700 */
2701 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2702 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2703 #else
2704 host = scsi_register(sht, sizeof(nsp32_hw_data));
2705 #endif
2706 if (host == NULL) {
2707 nsp32_msg (KERN_ERR, "failed to scsi register");
2708 goto err;
2709 }
2710
2711 /*
2712 * set nsp32_hw_data
2713 */
2714 data = (nsp32_hw_data *)host->hostdata;
2715
2716 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2717
2718 host->irq = data->IrqNumber;
2719 host->io_port = data->BaseAddress;
2720 host->unique_id = data->BaseAddress;
2721 host->n_io_port = data->NumAddress;
2722 host->base = (unsigned long)data->MmioAddress;
2723 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,63))
2724 scsi_set_pci_device(host, PCIDEV);
2725 #endif
2726
2727 data->Host = host;
2728 spin_lock_init(&(data->Lock));
2729
2730 data->cur_lunt = NULL;
2731 data->cur_target = NULL;
2732
2733 /*
2734 * Bus master transfer mode is supported currently.
2735 */
2736 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2737
2738 /*
2739 * Set clock div, CLOCK_4 (HBA has own external clock, and
2740 * dividing * 100ns/4).
2741 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
2742 */
2743 data->clock = CLOCK_4;
2744
2745 /*
2746 * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
2747 */
2748 switch (data->clock) {
2749 case CLOCK_4:
2750 /* If data->clock is CLOCK_4, then select 40M sync table. */
2751 data->synct = nsp32_sync_table_40M;
2752 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2753 break;
2754 case CLOCK_2:
2755 /* If data->clock is CLOCK_2, then select 20M sync table. */
2756 data->synct = nsp32_sync_table_20M;
2757 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2758 break;
2759 case PCICLK:
2760 /* If data->clock is PCICLK, then select pci sync table. */
2761 data->synct = nsp32_sync_table_pci;
2762 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2763 break;
2764 default:
2765 nsp32_msg(KERN_WARNING,
2766 "Invalid clock div is selected, set CLOCK_4.");
2767 /* Use default value CLOCK_4 */
2768 data->clock = CLOCK_4;
2769 data->synct = nsp32_sync_table_40M;
2770 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2771 }
2772
2773 /*
2774 * setup nsp32_lunt
2775 */
2776
2777 /*
2778 * setup DMA
2779 */
2780 if (pci_set_dma_mask(PCIDEV, DMA_32BIT_MASK) != 0) {
2781 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2782 goto scsi_unregister;
2783 }
2784
2785 /*
2786 * allocate autoparam DMA resource.
2787 */
2788 data->autoparam = pci_alloc_consistent(PCIDEV, sizeof(nsp32_autoparam), &(data->auto_paddr));
2789 if (data->autoparam == NULL) {
2790 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2791 goto scsi_unregister;
2792 }
2793
2794 /*
2795 * allocate scatter-gather DMA resource.
2796 */
2797 data->sg_list = pci_alloc_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2798 &(data->sg_paddr));
2799 if (data->sg_list == NULL) {
2800 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2801 goto free_autoparam;
2802 }
2803
2804 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2805 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2806 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2807 nsp32_lunt tmp = {
2808 .SCpnt = NULL,
2809 .save_datp = 0,
2810 .msgin03 = FALSE,
2811 .sg_num = 0,
2812 .cur_entry = 0,
2813 .sglun = &(data->sg_list[offset]),
2814 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2815 };
2816
2817 data->lunt[i][j] = tmp;
2818 }
2819 }
2820
2821 /*
2822 * setup target
2823 */
2824 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2825 nsp32_target *target = &(data->target[i]);
2826
2827 target->limit_entry = 0;
2828 target->sync_flag = 0;
2829 nsp32_set_async(data, target);
2830 }
2831
2832 /*
2833 * EEPROM check
2834 */
2835 ret = nsp32_getprom_param(data);
2836 if (ret == FALSE) {
2837 data->resettime = 3; /* default 3 */
2838 }
2839
2840 /*
2841 * setup HBA
2842 */
2843 nsp32hw_init(data);
2844
2845 snprintf(data->info_str, sizeof(data->info_str),
2846 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2847 host->irq, host->io_port, host->n_io_port);
2848
2849 /*
2850 * SCSI bus reset
2851 *
2852 * Note: It's important to reset SCSI bus in initialization phase.
2853 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
2854 * system is coming up, so SCSI devices connected to HBA is set as
2855 * un-asynchronous mode. It brings the merit that this HBA is
2856 * ready to start synchronous transfer without any preparation,
2857 * but we are difficult to control transfer speed. In addition,
2858 * it prevents device transfer speed from effecting EEPROM start-up
2859 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
2860 * Auto Mode, then FAST-10M is selected when SCSI devices are
2861 * connected same or more than 4 devices. It should be avoided
2862 * depending on this specification. Thus, resetting the SCSI bus
2863 * restores all connected SCSI devices to asynchronous mode, then
2864 * this driver set SDTR safely later, and we can control all SCSI
2865 * device transfer mode.
2866 */
2867 nsp32_do_bus_reset(data);
2868
2869 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2870 if (ret < 0) {
2871 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2872 "SCSI PCI controller. Interrupt: %d", host->irq);
2873 goto free_sg_list;
2874 }
2875
2876 /*
2877 * PCI IO register
2878 */
2879 res = request_region(host->io_port, host->n_io_port, "nsp32");
2880 if (res == NULL) {
2881 nsp32_msg(KERN_ERR,
2882 "I/O region 0x%lx+0x%lx is already used",
2883 data->BaseAddress, data->NumAddress);
2884 goto free_irq;
2885 }
2886
2887 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2888 ret = scsi_add_host(host, &PCIDEV->dev);
2889 if (ret) {
2890 nsp32_msg(KERN_ERR, "failed to add scsi host");
2891 goto free_region;
2892 }
2893 scsi_scan_host(host);
2894 #endif
2895 pci_set_drvdata(PCIDEV, host);
2896 return DETECT_OK;
2897
2898 free_region:
2899 release_region(host->io_port, host->n_io_port);
2900
2901 free_irq:
2902 free_irq(host->irq, data);
2903
2904 free_sg_list:
2905 pci_free_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2906 data->sg_list, data->sg_paddr);
2907
2908 free_autoparam:
2909 pci_free_consistent(PCIDEV, sizeof(nsp32_autoparam),
2910 data->autoparam, data->auto_paddr);
2911
2912 scsi_unregister:
2913 scsi_host_put(host);
2914
2915 err:
2916 return DETECT_NG;
2917 }
2918 #undef DETECT_OK
2919 #undef DETECT_NG
2920 #undef PCIDEV
2921
2922 static int nsp32_release(struct Scsi_Host *host)
2923 {
2924 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2925
2926 if (data->autoparam) {
2927 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
2928 data->autoparam, data->auto_paddr);
2929 }
2930
2931 if (data->sg_list) {
2932 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
2933 data->sg_list, data->sg_paddr);
2934 }
2935
2936 if (host->irq) {
2937 free_irq(host->irq, data);
2938 }
2939
2940 if (host->io_port && host->n_io_port) {
2941 release_region(host->io_port, host->n_io_port);
2942 }
2943
2944 if (data->MmioAddress) {
2945 iounmap(data->MmioAddress);
2946 }
2947
2948 return 0;
2949 }
2950
2951 static const char *nsp32_info(struct Scsi_Host *shpnt)
2952 {
2953 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2954
2955 return data->info_str;
2956 }
2957
2958
2959 /****************************************************************************
2960 * error handler
2961 */
2962 static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2963 {
2964 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2965 unsigned int base = SCpnt->device->host->io_port;
2966
2967 nsp32_msg(KERN_WARNING, "abort");
2968
2969 if (data->cur_lunt->SCpnt == NULL) {
2970 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2971 return FAILED;
2972 }
2973
2974 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2975 /* reset SDTR negotiation */
2976 data->cur_target->sync_flag = 0;
2977 nsp32_set_async(data, data->cur_target);
2978 }
2979
2980 nsp32_write2(base, TRANSFER_CONTROL, 0);
2981 nsp32_write2(base, BM_CNT, 0);
2982
2983 SCpnt->result = DID_ABORT << 16;
2984 nsp32_scsi_done(SCpnt);
2985
2986 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2987 return SUCCESS;
2988 }
2989
2990 static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
2991 {
2992 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2993 unsigned int base = SCpnt->device->host->io_port;
2994
2995 spin_lock_irq(SCpnt->device->host->host_lock);
2996
2997 nsp32_msg(KERN_INFO, "Bus Reset");
2998 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2999
3000 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
3001 nsp32_do_bus_reset(data);
3002 nsp32_write2(base, IRQ_CONTROL, 0);
3003
3004 spin_unlock_irq(SCpnt->device->host->host_lock);
3005 return SUCCESS; /* SCSI bus reset is succeeded at any time. */
3006 }
3007
3008 static void nsp32_do_bus_reset(nsp32_hw_data *data)
3009 {
3010 unsigned int base = data->BaseAddress;
3011 unsigned short intrdat;
3012 int i;
3013
3014 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
3015
3016 /*
3017 * stop all transfer
3018 * clear TRANSFERCONTROL_BM_START
3019 * clear counter
3020 */
3021 nsp32_write2(base, TRANSFER_CONTROL, 0);
3022 nsp32_write4(base, BM_CNT, 0);
3023 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
3024
3025 /*
3026 * fall back to asynchronous transfer mode
3027 * initialize SDTR negotiation flag
3028 */
3029 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
3030 nsp32_target *target = &data->target[i];
3031
3032 target->sync_flag = 0;
3033 nsp32_set_async(data, target);
3034 }
3035
3036 /*
3037 * reset SCSI bus
3038 */
3039 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
3040 udelay(RESET_HOLD_TIME);
3041 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
3042 for(i = 0; i < 5; i++) {
3043 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
3044 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
3045 }
3046
3047 data->CurrentSC = NULL;
3048 }
3049
3050 static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
3051 {
3052 struct Scsi_Host *host = SCpnt->device->host;
3053 unsigned int base = SCpnt->device->host->io_port;
3054 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3055
3056 nsp32_msg(KERN_INFO, "Host Reset");
3057 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
3058
3059 spin_lock_irq(SCpnt->device->host->host_lock);
3060
3061 nsp32hw_init(data);
3062 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
3063 nsp32_do_bus_reset(data);
3064 nsp32_write2(base, IRQ_CONTROL, 0);
3065
3066 spin_unlock_irq(SCpnt->device->host->host_lock);
3067 return SUCCESS; /* Host reset is succeeded at any time. */
3068 }
3069
3070
3071 /**************************************************************************
3072 * EEPROM handler
3073 */
3074
3075 /*
3076 * getting EEPROM parameter
3077 */
3078 static int nsp32_getprom_param(nsp32_hw_data *data)
3079 {
3080 int vendor = data->pci_devid->vendor;
3081 int device = data->pci_devid->device;
3082 int ret, val, i;
3083
3084 /*
3085 * EEPROM checking.
3086 */
3087 ret = nsp32_prom_read(data, 0x7e);
3088 if (ret != 0x55) {
3089 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
3090 return FALSE;
3091 }
3092 ret = nsp32_prom_read(data, 0x7f);
3093 if (ret != 0xaa) {
3094 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
3095 return FALSE;
3096 }
3097
3098 /*
3099 * check EEPROM type
3100 */
3101 if (vendor == PCI_VENDOR_ID_WORKBIT &&
3102 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
3103 ret = nsp32_getprom_c16(data);
3104 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3105 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
3106 ret = nsp32_getprom_at24(data);
3107 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3108 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
3109 ret = nsp32_getprom_at24(data);
3110 } else {
3111 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
3112 ret = FALSE;
3113 }
3114
3115 /* for debug : SPROM data full checking */
3116 for (i = 0; i <= 0x1f; i++) {
3117 val = nsp32_prom_read(data, i);
3118 nsp32_dbg(NSP32_DEBUG_EEPROM,
3119 "rom address 0x%x : 0x%x", i, val);
3120 }
3121
3122 return ret;
3123 }
3124
3125
3126 /*
3127 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
3128 *
3129 * ROMADDR
3130 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3131 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
3132 * 0x07 : HBA Synchronous Transfer Period
3133 * Value 0: AutoSync, 1: Manual Setting
3134 * 0x08 - 0x0f : Not Used? (0x0)
3135 * 0x10 : Bus Termination
3136 * Value 0: Auto[ON], 1: ON, 2: OFF
3137 * 0x11 : Not Used? (0)
3138 * 0x12 : Bus Reset Delay Time (0x03)
3139 * 0x13 : Bootable CD Support
3140 * Value 0: Disable, 1: Enable
3141 * 0x14 : Device Scan
3142 * Bit 7 6 5 4 3 2 1 0
3143 * | <----------------->
3144 * | SCSI ID: Value 0: Skip, 1: YES
3145 * |-> Value 0: ALL scan, Value 1: Manual
3146 * 0x15 - 0x1b : Not Used? (0)
3147 * 0x1c : Constant? (0x01) (clock div?)
3148 * 0x1d - 0x7c : Not Used (0xff)
3149 * 0x7d : Not Used? (0xff)
3150 * 0x7e : Constant (0x55), Validity signature
3151 * 0x7f : Constant (0xaa), Validity signature
3152 */
3153 static int nsp32_getprom_at24(nsp32_hw_data *data)
3154 {
3155 int ret, i;
3156 int auto_sync;
3157 nsp32_target *target;
3158 int entry;
3159
3160 /*
3161 * Reset time which is designated by EEPROM.
3162 *
3163 * TODO: Not used yet.
3164 */
3165 data->resettime = nsp32_prom_read(data, 0x12);
3166
3167 /*
3168 * HBA Synchronous Transfer Period
3169 *
3170 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
3171 * that if auto_sync is 0 (auto), and connected SCSI devices are
3172 * same or lower than 3, then transfer speed is set as ULTRA-20M.
3173 * On the contrary if connected SCSI devices are same or higher
3174 * than 4, then transfer speed is set as FAST-10M.
3175 *
3176 * I break this rule. The number of connected SCSI devices are
3177 * only ignored. If auto_sync is 0 (auto), then transfer speed is
3178 * forced as ULTRA-20M.
3179 */
3180 ret = nsp32_prom_read(data, 0x07);
3181 switch (ret) {
3182 case 0:
3183 auto_sync = TRUE;
3184 break;
3185 case 1:
3186 auto_sync = FALSE;
3187 break;
3188 default:
3189 nsp32_msg(KERN_WARNING,
3190 "Unsupported Auto Sync mode. Fall back to manual mode.");
3191 auto_sync = TRUE;
3192 }
3193
3194 if (trans_mode == ULTRA20M_MODE) {
3195 auto_sync = TRUE;
3196 }
3197
3198 /*
3199 * each device Synchronous Transfer Period
3200 */
3201 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3202 target = &data->target[i];
3203 if (auto_sync == TRUE) {
3204 target->limit_entry = 0; /* set as ULTRA20M */
3205 } else {
3206 ret = nsp32_prom_read(data, i);
3207 entry = nsp32_search_period_entry(data, target, ret);
3208 if (entry < 0) {
3209 /* search failed... set maximum speed */
3210 entry = 0;
3211 }
3212 target->limit_entry = entry;
3213 }
3214 }
3215
3216 return TRUE;
3217 }
3218
3219
3220 /*
3221 * C16 110 (I-O Data: SC-NBD) data map:
3222 *
3223 * ROMADDR
3224 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3225 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3226 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
3227 * 0x08 - 0x0f : Not Used? (0x0)
3228 * 0x10 : Transfer Mode
3229 * Value 0: PIO, 1: Busmater
3230 * 0x11 : Bus Reset Delay Time (0x00-0x20)
3231 * 0x12 : Bus Termination
3232 * Value 0: Disable, 1: Enable
3233 * 0x13 - 0x19 : Disconnection
3234 * Value 0: Disable, 1: Enable
3235 * 0x1a - 0x7c : Not Used? (0)
3236 * 0x7d : Not Used? (0xf8)
3237 * 0x7e : Constant (0x55), Validity signature
3238 * 0x7f : Constant (0xaa), Validity signature
3239 */
3240 static int nsp32_getprom_c16(nsp32_hw_data *data)
3241 {
3242 int ret, i;
3243 nsp32_target *target;
3244 int entry, val;
3245
3246 /*
3247 * Reset time which is designated by EEPROM.
3248 *
3249 * TODO: Not used yet.
3250 */
3251 data->resettime = nsp32_prom_read(data, 0x11);
3252
3253 /*
3254 * each device Synchronous Transfer Period
3255 */
3256 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3257 target = &data->target[i];
3258 ret = nsp32_prom_read(data, i);
3259 switch (ret) {
3260 case 0: /* 20MB/s */
3261 val = 0x0c;
3262 break;
3263 case 1: /* 10MB/s */
3264 val = 0x19;
3265 break;
3266 case 2: /* 5MB/s */
3267 val = 0x32;
3268 break;
3269 case 3: /* ASYNC */
3270 val = 0x00;
3271 break;
3272 default: /* default 20MB/s */
3273 val = 0x0c;
3274 break;
3275 }
3276 entry = nsp32_search_period_entry(data, target, val);
3277 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3278 /* search failed... set maximum speed */
3279 entry = 0;
3280 }
3281 target->limit_entry = entry;
3282 }
3283
3284 return TRUE;
3285 }
3286
3287
3288 /*
3289 * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3290 */
3291 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3292 {
3293 int i, val;
3294
3295 /* start condition */
3296 nsp32_prom_start(data);
3297
3298 /* device address */
3299 nsp32_prom_write_bit(data, 1); /* 1 */
3300 nsp32_prom_write_bit(data, 0); /* 0 */
3301 nsp32_prom_write_bit(data, 1); /* 1 */
3302 nsp32_prom_write_bit(data, 0); /* 0 */
3303 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3304 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3305 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3306
3307 /* R/W: W for dummy write */
3308 nsp32_prom_write_bit(data, 0);
3309
3310 /* ack */
3311 nsp32_prom_write_bit(data, 0);
3312
3313 /* word address */
3314 for (i = 7; i >= 0; i--) {
3315 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3316 }
3317
3318 /* ack */
3319 nsp32_prom_write_bit(data, 0);
3320
3321 /* start condition */
3322 nsp32_prom_start(data);
3323
3324 /* device address */
3325 nsp32_prom_write_bit(data, 1); /* 1 */
3326 nsp32_prom_write_bit(data, 0); /* 0 */
3327 nsp32_prom_write_bit(data, 1); /* 1 */
3328 nsp32_prom_write_bit(data, 0); /* 0 */
3329 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3330 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3331 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3332
3333 /* R/W: R */
3334 nsp32_prom_write_bit(data, 1);
3335
3336 /* ack */
3337 nsp32_prom_write_bit(data, 0);
3338
3339 /* data... */
3340 val = 0;
3341 for (i = 7; i >= 0; i--) {
3342 val += (nsp32_prom_read_bit(data) << i);
3343 }
3344
3345 /* no ack */
3346 nsp32_prom_write_bit(data, 1);
3347
3348 /* stop condition */
3349 nsp32_prom_stop(data);
3350
3351 return val;
3352 }
3353
3354 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3355 {
3356 int base = data->BaseAddress;
3357 int tmp;
3358
3359 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3360
3361 if (val == 0) {
3362 tmp &= ~bit;
3363 } else {
3364 tmp |= bit;
3365 }
3366
3367 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3368
3369 udelay(10);
3370 }
3371
3372 static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3373 {
3374 int base = data->BaseAddress;
3375 int tmp, ret;
3376
3377 if (bit != SDA) {
3378 nsp32_msg(KERN_ERR, "return value is not appropriate");
3379 return 0;
3380 }
3381
3382
3383 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3384
3385 if (tmp == 0) {
3386 ret = 0;
3387 } else {
3388 ret = 1;
3389 }
3390
3391 udelay(10);
3392
3393 return ret;
3394 }
3395
3396 static void nsp32_prom_start (nsp32_hw_data *data)
3397 {
3398 /* start condition */
3399 nsp32_prom_set(data, SCL, 1);
3400 nsp32_prom_set(data, SDA, 1);
3401 nsp32_prom_set(data, ENA, 1); /* output mode */
3402 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
3403 * SDA 1->0 is start condition */
3404 nsp32_prom_set(data, SCL, 0);
3405 }
3406
3407 static void nsp32_prom_stop (nsp32_hw_data *data)
3408 {
3409 /* stop condition */
3410 nsp32_prom_set(data, SCL, 1);
3411 nsp32_prom_set(data, SDA, 0);
3412 nsp32_prom_set(data, ENA, 1); /* output mode */
3413 nsp32_prom_set(data, SDA, 1);
3414 nsp32_prom_set(data, SCL, 0);
3415 }
3416
3417 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3418 {
3419 /* write */
3420 nsp32_prom_set(data, SDA, val);
3421 nsp32_prom_set(data, SCL, 1 );
3422 nsp32_prom_set(data, SCL, 0 );
3423 }
3424
3425 static int nsp32_prom_read_bit(nsp32_hw_data *data)
3426 {
3427 int val;
3428
3429 /* read */
3430 nsp32_prom_set(data, ENA, 0); /* input mode */
3431 nsp32_prom_set(data, SCL, 1);
3432
3433 val = nsp32_prom_get(data, SDA);
3434
3435 nsp32_prom_set(data, SCL, 0);
3436 nsp32_prom_set(data, ENA, 1); /* output mode */
3437
3438 return val;
3439 }
3440
3441
3442 /**************************************************************************
3443 * Power Management
3444 */
3445 #ifdef CONFIG_PM
3446
3447 /* Device suspended */
3448 static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
3449 {
3450 struct Scsi_Host *host = pci_get_drvdata(pdev);
3451
3452 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3453
3454 pci_save_state (pdev);
3455 pci_disable_device (pdev);
3456 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3457
3458 return 0;
3459 }
3460
3461 /* Device woken up */
3462 static int nsp32_resume(struct pci_dev *pdev)
3463 {
3464 struct Scsi_Host *host = pci_get_drvdata(pdev);
3465 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3466 unsigned short reg;
3467
3468 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3469
3470 pci_set_power_state(pdev, PCI_D0);
3471 pci_enable_wake (pdev, PCI_D0, 0);
3472 pci_restore_state (pdev);
3473
3474 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3475
3476 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3477
3478 if (reg == 0xffff) {
3479 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3480 return 0;
3481 }
3482
3483 nsp32hw_init (data);
3484 nsp32_do_bus_reset(data);
3485
3486 nsp32_msg(KERN_INFO, "resume success");
3487
3488 return 0;
3489 }
3490
3491 /* Enable wake event */
3492 static int nsp32_enable_wake(struct pci_dev *pdev, pci_power_t state, int enable)
3493 {
3494 struct Scsi_Host *host = pci_get_drvdata(pdev);
3495
3496 nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
3497
3498 return 0;
3499 }
3500 #endif
3501
3502 /************************************************************************
3503 * PCI/Cardbus probe/remove routine
3504 */
3505 static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3506 {
3507 int ret;
3508 nsp32_hw_data *data = &nsp32_data_base;
3509
3510 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3511
3512 ret = pci_enable_device(pdev);
3513 if (ret) {
3514 nsp32_msg(KERN_ERR, "failed to enable pci device");
3515 return ret;
3516 }
3517
3518 data->Pci = pdev;
3519 data->pci_devid = id;
3520 data->IrqNumber = pdev->irq;
3521 data->BaseAddress = pci_resource_start(pdev, 0);
3522 data->NumAddress = pci_resource_len (pdev, 0);
3523 data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1),
3524 pci_resource_len (pdev, 1));
3525 data->MmioLength = pci_resource_len (pdev, 1);
3526
3527 pci_set_master(pdev);
3528
3529 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3530 ret = nsp32_detect(pdev);
3531 #else
3532 ret = scsi_register_host(&nsp32_template);
3533 #endif
3534
3535 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3536 pdev->irq,
3537 data->MmioAddress, data->MmioLength,
3538 pci_name(pdev),
3539 nsp32_model[id->driver_data]);
3540
3541 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3542
3543 return ret;
3544 }
3545
3546 static void __devexit nsp32_remove(struct pci_dev *pdev)
3547 {
3548 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3549 struct Scsi_Host *host = pci_get_drvdata(pdev);
3550 #endif
3551
3552 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3553
3554 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3555 scsi_remove_host(host);
3556
3557 nsp32_release(host);
3558
3559 scsi_host_put(host);
3560 #else
3561 scsi_unregister_host(&nsp32_template);
3562 #endif
3563 }
3564
3565
3566
3567 static struct pci_driver nsp32_driver = {
3568 .name = "nsp32",
3569 .id_table = nsp32_pci_table,
3570 .probe = nsp32_probe,
3571 .remove = __devexit_p(nsp32_remove),
3572 #ifdef CONFIG_PM
3573 .suspend = nsp32_suspend,
3574 .resume = nsp32_resume,
3575 .enable_wake = nsp32_enable_wake,
3576 #endif
3577 };
3578
3579 /*********************************************************************
3580 * Moule entry point
3581 */
3582 static int __init init_nsp32(void) {
3583 nsp32_msg(KERN_INFO, "loading...");
3584 return pci_register_driver(&nsp32_driver);
3585 }
3586
3587 static void __exit exit_nsp32(void) {
3588 nsp32_msg(KERN_INFO, "unloading...");
3589 pci_unregister_driver(&nsp32_driver);
3590 }
3591
3592 module_init(init_nsp32);
3593 module_exit(exit_nsp32);
3594
3595 /* end */
kernel source for telekom puls (alcatel/mediatek)