675a049a7a5da61b7d4f51dd47b67a5d1599ee24
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2009 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60
61 #include "mpt2sas_base.h"
62
63 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
64
65 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
66 #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
67
68 static int max_queue_depth = -1;
69 module_param(max_queue_depth, int, 0);
70 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
71
72 static int max_sgl_entries = -1;
73 module_param(max_sgl_entries, int, 0);
74 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
75
76 static int msix_disable = -1;
77 module_param(msix_disable, int, 0);
78 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
79
80 /**
81 * _base_fault_reset_work - workq handling ioc fault conditions
82 * @work: input argument, used to derive ioc
83 * Context: sleep.
84 *
85 * Return nothing.
86 */
87 static void
88 _base_fault_reset_work(struct work_struct *work)
89 {
90 struct MPT2SAS_ADAPTER *ioc =
91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
92 unsigned long flags;
93 u32 doorbell;
94 int rc;
95
96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
97 if (ioc->shost_recovery)
98 goto rearm_timer;
99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
100
101 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
104 FORCE_BIG_HAMMER);
105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
106 __func__, (rc == 0) ? "success" : "failed");
107 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
109 mpt2sas_base_fault_info(ioc, doorbell &
110 MPI2_DOORBELL_DATA_MASK);
111 }
112
113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
114 rearm_timer:
115 if (ioc->fault_reset_work_q)
116 queue_delayed_work(ioc->fault_reset_work_q,
117 &ioc->fault_reset_work,
118 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
120 }
121
122 /**
123 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
124 * @ioc: pointer to scsi command object
125 * Context: sleep.
126 *
127 * Return nothing.
128 */
129 void
130 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
131 {
132 unsigned long flags;
133
134 if (ioc->fault_reset_work_q)
135 return;
136
137 /* initialize fault polling */
138 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
139 snprintf(ioc->fault_reset_work_q_name,
140 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
141 ioc->fault_reset_work_q =
142 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
143 if (!ioc->fault_reset_work_q) {
144 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
145 ioc->name, __func__, __LINE__);
146 return;
147 }
148 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
149 if (ioc->fault_reset_work_q)
150 queue_delayed_work(ioc->fault_reset_work_q,
151 &ioc->fault_reset_work,
152 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
153 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
154 }
155
156 /**
157 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
158 * @ioc: pointer to scsi command object
159 * Context: sleep.
160 *
161 * Return nothing.
162 */
163 void
164 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
165 {
166 unsigned long flags;
167 struct workqueue_struct *wq;
168
169 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
170 wq = ioc->fault_reset_work_q;
171 ioc->fault_reset_work_q = NULL;
172 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
173 if (wq) {
174 if (!cancel_delayed_work(&ioc->fault_reset_work))
175 flush_workqueue(wq);
176 destroy_workqueue(wq);
177 }
178 }
179
180 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
181 /**
182 * _base_sas_ioc_info - verbose translation of the ioc status
183 * @ioc: pointer to scsi command object
184 * @mpi_reply: reply mf payload returned from firmware
185 * @request_hdr: request mf
186 *
187 * Return nothing.
188 */
189 static void
190 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
191 MPI2RequestHeader_t *request_hdr)
192 {
193 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
194 MPI2_IOCSTATUS_MASK;
195 char *desc = NULL;
196 u16 frame_sz;
197 char *func_str = NULL;
198
199 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
200 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
201 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
202 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
203 return;
204
205 switch (ioc_status) {
206
207 /****************************************************************************
208 * Common IOCStatus values for all replies
209 ****************************************************************************/
210
211 case MPI2_IOCSTATUS_INVALID_FUNCTION:
212 desc = "invalid function";
213 break;
214 case MPI2_IOCSTATUS_BUSY:
215 desc = "busy";
216 break;
217 case MPI2_IOCSTATUS_INVALID_SGL:
218 desc = "invalid sgl";
219 break;
220 case MPI2_IOCSTATUS_INTERNAL_ERROR:
221 desc = "internal error";
222 break;
223 case MPI2_IOCSTATUS_INVALID_VPID:
224 desc = "invalid vpid";
225 break;
226 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
227 desc = "insufficient resources";
228 break;
229 case MPI2_IOCSTATUS_INVALID_FIELD:
230 desc = "invalid field";
231 break;
232 case MPI2_IOCSTATUS_INVALID_STATE:
233 desc = "invalid state";
234 break;
235 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
236 desc = "op state not supported";
237 break;
238
239 /****************************************************************************
240 * Config IOCStatus values
241 ****************************************************************************/
242
243 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
244 desc = "config invalid action";
245 break;
246 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
247 desc = "config invalid type";
248 break;
249 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
250 desc = "config invalid page";
251 break;
252 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
253 desc = "config invalid data";
254 break;
255 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
256 desc = "config no defaults";
257 break;
258 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
259 desc = "config cant commit";
260 break;
261
262 /****************************************************************************
263 * SCSI IO Reply
264 ****************************************************************************/
265
266 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
267 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
268 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
269 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
270 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
271 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
272 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
273 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
274 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
275 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
276 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
277 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
278 break;
279
280 /****************************************************************************
281 * For use by SCSI Initiator and SCSI Target end-to-end data protection
282 ****************************************************************************/
283
284 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
285 desc = "eedp guard error";
286 break;
287 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
288 desc = "eedp ref tag error";
289 break;
290 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
291 desc = "eedp app tag error";
292 break;
293
294 /****************************************************************************
295 * SCSI Target values
296 ****************************************************************************/
297
298 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
299 desc = "target invalid io index";
300 break;
301 case MPI2_IOCSTATUS_TARGET_ABORTED:
302 desc = "target aborted";
303 break;
304 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
305 desc = "target no conn retryable";
306 break;
307 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
308 desc = "target no connection";
309 break;
310 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
311 desc = "target xfer count mismatch";
312 break;
313 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
314 desc = "target data offset error";
315 break;
316 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
317 desc = "target too much write data";
318 break;
319 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
320 desc = "target iu too short";
321 break;
322 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
323 desc = "target ack nak timeout";
324 break;
325 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
326 desc = "target nak received";
327 break;
328
329 /****************************************************************************
330 * Serial Attached SCSI values
331 ****************************************************************************/
332
333 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
334 desc = "smp request failed";
335 break;
336 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
337 desc = "smp data overrun";
338 break;
339
340 /****************************************************************************
341 * Diagnostic Buffer Post / Diagnostic Release values
342 ****************************************************************************/
343
344 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
345 desc = "diagnostic released";
346 break;
347 default:
348 break;
349 }
350
351 if (!desc)
352 return;
353
354 switch (request_hdr->Function) {
355 case MPI2_FUNCTION_CONFIG:
356 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
357 func_str = "config_page";
358 break;
359 case MPI2_FUNCTION_SCSI_TASK_MGMT:
360 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
361 func_str = "task_mgmt";
362 break;
363 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
364 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
365 func_str = "sas_iounit_ctl";
366 break;
367 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
368 frame_sz = sizeof(Mpi2SepRequest_t);
369 func_str = "enclosure";
370 break;
371 case MPI2_FUNCTION_IOC_INIT:
372 frame_sz = sizeof(Mpi2IOCInitRequest_t);
373 func_str = "ioc_init";
374 break;
375 case MPI2_FUNCTION_PORT_ENABLE:
376 frame_sz = sizeof(Mpi2PortEnableRequest_t);
377 func_str = "port_enable";
378 break;
379 case MPI2_FUNCTION_SMP_PASSTHROUGH:
380 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
381 func_str = "smp_passthru";
382 break;
383 default:
384 frame_sz = 32;
385 func_str = "unknown";
386 break;
387 }
388
389 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
390 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
391
392 _debug_dump_mf(request_hdr, frame_sz/4);
393 }
394
395 /**
396 * _base_display_event_data - verbose translation of firmware asyn events
397 * @ioc: pointer to scsi command object
398 * @mpi_reply: reply mf payload returned from firmware
399 *
400 * Return nothing.
401 */
402 static void
403 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
404 Mpi2EventNotificationReply_t *mpi_reply)
405 {
406 char *desc = NULL;
407 u16 event;
408
409 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
410 return;
411
412 event = le16_to_cpu(mpi_reply->Event);
413
414 switch (event) {
415 case MPI2_EVENT_LOG_DATA:
416 desc = "Log Data";
417 break;
418 case MPI2_EVENT_STATE_CHANGE:
419 desc = "Status Change";
420 break;
421 case MPI2_EVENT_HARD_RESET_RECEIVED:
422 desc = "Hard Reset Received";
423 break;
424 case MPI2_EVENT_EVENT_CHANGE:
425 desc = "Event Change";
426 break;
427 case MPI2_EVENT_TASK_SET_FULL:
428 desc = "Task Set Full";
429 break;
430 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
431 desc = "Device Status Change";
432 break;
433 case MPI2_EVENT_IR_OPERATION_STATUS:
434 desc = "IR Operation Status";
435 break;
436 case MPI2_EVENT_SAS_DISCOVERY:
437 desc = "Discovery";
438 break;
439 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
440 desc = "SAS Broadcast Primitive";
441 break;
442 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
443 desc = "SAS Init Device Status Change";
444 break;
445 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
446 desc = "SAS Init Table Overflow";
447 break;
448 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
449 desc = "SAS Topology Change List";
450 break;
451 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
452 desc = "SAS Enclosure Device Status Change";
453 break;
454 case MPI2_EVENT_IR_VOLUME:
455 desc = "IR Volume";
456 break;
457 case MPI2_EVENT_IR_PHYSICAL_DISK:
458 desc = "IR Physical Disk";
459 break;
460 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
461 desc = "IR Configuration Change List";
462 break;
463 case MPI2_EVENT_LOG_ENTRY_ADDED:
464 desc = "Log Entry Added";
465 break;
466 }
467
468 if (!desc)
469 return;
470
471 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
472 }
473 #endif
474
475 /**
476 * _base_sas_log_info - verbose translation of firmware log info
477 * @ioc: pointer to scsi command object
478 * @log_info: log info
479 *
480 * Return nothing.
481 */
482 static void
483 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
484 {
485 union loginfo_type {
486 u32 loginfo;
487 struct {
488 u32 subcode:16;
489 u32 code:8;
490 u32 originator:4;
491 u32 bus_type:4;
492 } dw;
493 };
494 union loginfo_type sas_loginfo;
495 char *originator_str = NULL;
496
497 sas_loginfo.loginfo = log_info;
498 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
499 return;
500
501 /* each nexus loss loginfo */
502 if (log_info == 0x31170000)
503 return;
504
505 /* eat the loginfos associated with task aborts */
506 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
507 0x31140000 || log_info == 0x31130000))
508 return;
509
510 switch (sas_loginfo.dw.originator) {
511 case 0:
512 originator_str = "IOP";
513 break;
514 case 1:
515 originator_str = "PL";
516 break;
517 case 2:
518 originator_str = "IR";
519 break;
520 }
521
522 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
523 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
524 originator_str, sas_loginfo.dw.code,
525 sas_loginfo.dw.subcode);
526 }
527
528 /**
529 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
530 * @ioc: pointer to scsi command object
531 * @fault_code: fault code
532 *
533 * Return nothing.
534 */
535 void
536 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
537 {
538 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
539 ioc->name, fault_code);
540 }
541
542 /**
543 * _base_display_reply_info -
544 * @ioc: pointer to scsi command object
545 * @smid: system request message index
546 * @msix_index: MSIX table index supplied by the OS
547 * @reply: reply message frame(lower 32bit addr)
548 *
549 * Return nothing.
550 */
551 static void
552 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
553 u32 reply)
554 {
555 MPI2DefaultReply_t *mpi_reply;
556 u16 ioc_status;
557
558 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
559 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
560 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
561 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
562 (ioc->logging_level & MPT_DEBUG_REPLY)) {
563 _base_sas_ioc_info(ioc , mpi_reply,
564 mpt2sas_base_get_msg_frame(ioc, smid));
565 }
566 #endif
567 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
568 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
569 }
570
571 /**
572 * mpt2sas_base_done - base internal command completion routine
573 * @ioc: pointer to scsi command object
574 * @smid: system request message index
575 * @msix_index: MSIX table index supplied by the OS
576 * @reply: reply message frame(lower 32bit addr)
577 *
578 * Return nothing.
579 */
580 void
581 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
582 u32 reply)
583 {
584 MPI2DefaultReply_t *mpi_reply;
585
586 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
587 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
588 return;
589
590 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
591 return;
592
593 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
594 if (mpi_reply) {
595 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
596 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
597 }
598 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
599 complete(&ioc->base_cmds.done);
600 }
601
602 /**
603 * _base_async_event - main callback handler for firmware asyn events
604 * @ioc: pointer to scsi command object
605 * @msix_index: MSIX table index supplied by the OS
606 * @reply: reply message frame(lower 32bit addr)
607 *
608 * Return nothing.
609 */
610 static void
611 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
612 {
613 Mpi2EventNotificationReply_t *mpi_reply;
614 Mpi2EventAckRequest_t *ack_request;
615 u16 smid;
616
617 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
618 if (!mpi_reply)
619 return;
620 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
621 return;
622 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
623 _base_display_event_data(ioc, mpi_reply);
624 #endif
625 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
626 goto out;
627 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
628 if (!smid) {
629 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
630 ioc->name, __func__);
631 goto out;
632 }
633
634 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
635 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
636 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
637 ack_request->Event = mpi_reply->Event;
638 ack_request->EventContext = mpi_reply->EventContext;
639 ack_request->VF_ID = 0; /* TODO */
640 ack_request->VP_ID = 0;
641 mpt2sas_base_put_smid_default(ioc, smid);
642
643 out:
644
645 /* scsih callback handler */
646 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
647
648 /* ctl callback handler */
649 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
650 }
651
652 /**
653 * _base_mask_interrupts - disable interrupts
654 * @ioc: pointer to scsi command object
655 *
656 * Disabling ResetIRQ, Reply and Doorbell Interrupts
657 *
658 * Return nothing.
659 */
660 static void
661 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
662 {
663 u32 him_register;
664
665 ioc->mask_interrupts = 1;
666 him_register = readl(&ioc->chip->HostInterruptMask);
667 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
668 writel(him_register, &ioc->chip->HostInterruptMask);
669 readl(&ioc->chip->HostInterruptMask);
670 }
671
672 /**
673 * _base_unmask_interrupts - enable interrupts
674 * @ioc: pointer to scsi command object
675 *
676 * Enabling only Reply Interrupts
677 *
678 * Return nothing.
679 */
680 static void
681 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
682 {
683 u32 him_register;
684
685 writel(0, &ioc->chip->HostInterruptStatus);
686 him_register = readl(&ioc->chip->HostInterruptMask);
687 him_register &= ~MPI2_HIM_RIM;
688 writel(him_register, &ioc->chip->HostInterruptMask);
689 ioc->mask_interrupts = 0;
690 }
691
692 union reply_descriptor {
693 u64 word;
694 struct {
695 u32 low;
696 u32 high;
697 } u;
698 };
699
700 /**
701 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
702 * @irq: irq number (not used)
703 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
704 * @r: pt_regs pointer (not used)
705 *
706 * Return IRQ_HANDLE if processed, else IRQ_NONE.
707 */
708 static irqreturn_t
709 _base_interrupt(int irq, void *bus_id)
710 {
711 union reply_descriptor rd;
712 u32 completed_cmds;
713 u8 request_desript_type;
714 u16 smid;
715 u8 cb_idx;
716 u32 reply;
717 u8 msix_index;
718 struct MPT2SAS_ADAPTER *ioc = bus_id;
719 Mpi2ReplyDescriptorsUnion_t *rpf;
720
721 if (ioc->mask_interrupts)
722 return IRQ_NONE;
723
724 rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
725 request_desript_type = rpf->Default.ReplyFlags
726 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
727 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
728 return IRQ_NONE;
729
730 completed_cmds = 0;
731 do {
732 rd.word = rpf->Words;
733 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
734 goto out;
735 reply = 0;
736 cb_idx = 0xFF;
737 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
738 msix_index = rpf->Default.MSIxIndex;
739 if (request_desript_type ==
740 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
741 reply = le32_to_cpu
742 (rpf->AddressReply.ReplyFrameAddress);
743 } else if (request_desript_type ==
744 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
745 goto next;
746 else if (request_desript_type ==
747 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
748 goto next;
749 if (smid)
750 cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
751 if (smid && cb_idx != 0xFF) {
752 mpt_callbacks[cb_idx](ioc, smid, msix_index, reply);
753 if (reply)
754 _base_display_reply_info(ioc, smid, msix_index,
755 reply);
756 mpt2sas_base_free_smid(ioc, smid);
757 }
758 if (!smid)
759 _base_async_event(ioc, msix_index, reply);
760
761 /* reply free queue handling */
762 if (reply) {
763 ioc->reply_free_host_index =
764 (ioc->reply_free_host_index ==
765 (ioc->reply_free_queue_depth - 1)) ?
766 0 : ioc->reply_free_host_index + 1;
767 ioc->reply_free[ioc->reply_free_host_index] =
768 cpu_to_le32(reply);
769 wmb();
770 writel(ioc->reply_free_host_index,
771 &ioc->chip->ReplyFreeHostIndex);
772 }
773
774 next:
775
776 rpf->Words = ULLONG_MAX;
777 ioc->reply_post_host_index = (ioc->reply_post_host_index ==
778 (ioc->reply_post_queue_depth - 1)) ? 0 :
779 ioc->reply_post_host_index + 1;
780 request_desript_type =
781 ioc->reply_post_free[ioc->reply_post_host_index].Default.
782 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
783 completed_cmds++;
784 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
785 goto out;
786 if (!ioc->reply_post_host_index)
787 rpf = ioc->reply_post_free;
788 else
789 rpf++;
790 } while (1);
791
792 out:
793
794 if (!completed_cmds)
795 return IRQ_NONE;
796
797 wmb();
798 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
799 return IRQ_HANDLED;
800 }
801
802 /**
803 * mpt2sas_base_release_callback_handler - clear interupt callback handler
804 * @cb_idx: callback index
805 *
806 * Return nothing.
807 */
808 void
809 mpt2sas_base_release_callback_handler(u8 cb_idx)
810 {
811 mpt_callbacks[cb_idx] = NULL;
812 }
813
814 /**
815 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
816 * @cb_func: callback function
817 *
818 * Returns cb_func.
819 */
820 u8
821 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
822 {
823 u8 cb_idx;
824
825 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
826 if (mpt_callbacks[cb_idx] == NULL)
827 break;
828
829 mpt_callbacks[cb_idx] = cb_func;
830 return cb_idx;
831 }
832
833 /**
834 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
835 *
836 * Return nothing.
837 */
838 void
839 mpt2sas_base_initialize_callback_handler(void)
840 {
841 u8 cb_idx;
842
843 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
844 mpt2sas_base_release_callback_handler(cb_idx);
845 }
846
847 /**
848 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
849 * @ioc: per adapter object
850 * @paddr: virtual address for SGE
851 *
852 * Create a zero length scatter gather entry to insure the IOCs hardware has
853 * something to use if the target device goes brain dead and tries
854 * to send data even when none is asked for.
855 *
856 * Return nothing.
857 */
858 void
859 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
860 {
861 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
862 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
863 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
864 MPI2_SGE_FLAGS_SHIFT);
865 ioc->base_add_sg_single(paddr, flags_length, -1);
866 }
867
868 /**
869 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
870 * @paddr: virtual address for SGE
871 * @flags_length: SGE flags and data transfer length
872 * @dma_addr: Physical address
873 *
874 * Return nothing.
875 */
876 static void
877 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
878 {
879 Mpi2SGESimple32_t *sgel = paddr;
880
881 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
882 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
883 sgel->FlagsLength = cpu_to_le32(flags_length);
884 sgel->Address = cpu_to_le32(dma_addr);
885 }
886
887
888 /**
889 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
890 * @paddr: virtual address for SGE
891 * @flags_length: SGE flags and data transfer length
892 * @dma_addr: Physical address
893 *
894 * Return nothing.
895 */
896 static void
897 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
898 {
899 Mpi2SGESimple64_t *sgel = paddr;
900
901 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
902 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
903 sgel->FlagsLength = cpu_to_le32(flags_length);
904 sgel->Address = cpu_to_le64(dma_addr);
905 }
906
907 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
908
909 /**
910 * _base_config_dma_addressing - set dma addressing
911 * @ioc: per adapter object
912 * @pdev: PCI device struct
913 *
914 * Returns 0 for success, non-zero for failure.
915 */
916 static int
917 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
918 {
919 struct sysinfo s;
920 char *desc = NULL;
921
922 if (sizeof(dma_addr_t) > 4) {
923 const uint64_t required_mask =
924 dma_get_required_mask(&pdev->dev);
925 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
926 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
927 DMA_BIT_MASK(64))) {
928 ioc->base_add_sg_single = &_base_add_sg_single_64;
929 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
930 desc = "64";
931 goto out;
932 }
933 }
934
935 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
936 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
937 ioc->base_add_sg_single = &_base_add_sg_single_32;
938 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
939 desc = "32";
940 } else
941 return -ENODEV;
942
943 out:
944 si_meminfo(&s);
945 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
946 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
947
948 return 0;
949 }
950
951 /**
952 * _base_save_msix_table - backup msix vector table
953 * @ioc: per adapter object
954 *
955 * This address an errata where diag reset clears out the table
956 */
957 static void
958 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
959 {
960 int i;
961
962 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
963 return;
964
965 for (i = 0; i < ioc->msix_vector_count; i++)
966 ioc->msix_table_backup[i] = ioc->msix_table[i];
967 }
968
969 /**
970 * _base_restore_msix_table - this restores the msix vector table
971 * @ioc: per adapter object
972 *
973 */
974 static void
975 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
976 {
977 int i;
978
979 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
980 return;
981
982 for (i = 0; i < ioc->msix_vector_count; i++)
983 ioc->msix_table[i] = ioc->msix_table_backup[i];
984 }
985
986 /**
987 * _base_check_enable_msix - checks MSIX capabable.
988 * @ioc: per adapter object
989 *
990 * Check to see if card is capable of MSIX, and set number
991 * of avaliable msix vectors
992 */
993 static int
994 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
995 {
996 int base;
997 u16 message_control;
998 u32 msix_table_offset;
999
1000 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1001 if (!base) {
1002 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1003 "supported\n", ioc->name));
1004 return -EINVAL;
1005 }
1006
1007 /* get msix vector count */
1008 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1009 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1010
1011 /* get msix table */
1012 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1013 msix_table_offset &= 0xFFFFFFF8;
1014 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1015
1016 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1017 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1018 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1019 return 0;
1020 }
1021
1022 /**
1023 * _base_disable_msix - disables msix
1024 * @ioc: per adapter object
1025 *
1026 */
1027 static void
1028 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1029 {
1030 if (ioc->msix_enable) {
1031 pci_disable_msix(ioc->pdev);
1032 kfree(ioc->msix_table_backup);
1033 ioc->msix_table_backup = NULL;
1034 ioc->msix_enable = 0;
1035 }
1036 }
1037
1038 /**
1039 * _base_enable_msix - enables msix, failback to io_apic
1040 * @ioc: per adapter object
1041 *
1042 */
1043 static int
1044 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1045 {
1046 struct msix_entry entries;
1047 int r;
1048 u8 try_msix = 0;
1049
1050 if (msix_disable == -1 || msix_disable == 0)
1051 try_msix = 1;
1052
1053 if (!try_msix)
1054 goto try_ioapic;
1055
1056 if (_base_check_enable_msix(ioc) != 0)
1057 goto try_ioapic;
1058
1059 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1060 sizeof(u32), GFP_KERNEL);
1061 if (!ioc->msix_table_backup) {
1062 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1063 "msix_table_backup failed!!!\n", ioc->name));
1064 goto try_ioapic;
1065 }
1066
1067 memset(&entries, 0, sizeof(struct msix_entry));
1068 r = pci_enable_msix(ioc->pdev, &entries, 1);
1069 if (r) {
1070 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1071 "failed (r=%d) !!!\n", ioc->name, r));
1072 goto try_ioapic;
1073 }
1074
1075 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1076 ioc->name, ioc);
1077 if (r) {
1078 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1079 "interrupt %d !!!\n", ioc->name, entries.vector));
1080 pci_disable_msix(ioc->pdev);
1081 goto try_ioapic;
1082 }
1083
1084 ioc->pci_irq = entries.vector;
1085 ioc->msix_enable = 1;
1086 return 0;
1087
1088 /* failback to io_apic interrupt routing */
1089 try_ioapic:
1090
1091 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1092 ioc->name, ioc);
1093 if (r) {
1094 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1095 ioc->name, ioc->pdev->irq);
1096 r = -EBUSY;
1097 goto out_fail;
1098 }
1099
1100 ioc->pci_irq = ioc->pdev->irq;
1101 return 0;
1102
1103 out_fail:
1104 return r;
1105 }
1106
1107 /**
1108 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1109 * @ioc: per adapter object
1110 *
1111 * Returns 0 for success, non-zero for failure.
1112 */
1113 int
1114 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1115 {
1116 struct pci_dev *pdev = ioc->pdev;
1117 u32 memap_sz;
1118 u32 pio_sz;
1119 int i, r = 0;
1120
1121 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
1122 ioc->name, __func__));
1123
1124 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1125 if (pci_enable_device_mem(pdev)) {
1126 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1127 "failed\n", ioc->name);
1128 return -ENODEV;
1129 }
1130
1131
1132 if (pci_request_selected_regions(pdev, ioc->bars,
1133 MPT2SAS_DRIVER_NAME)) {
1134 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1135 "failed\n", ioc->name);
1136 r = -ENODEV;
1137 goto out_fail;
1138 }
1139
1140 pci_set_master(pdev);
1141
1142 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1143 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1144 ioc->name, pci_name(pdev));
1145 r = -ENODEV;
1146 goto out_fail;
1147 }
1148
1149 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1150 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
1151 if (pio_sz)
1152 continue;
1153 ioc->pio_chip = pci_resource_start(pdev, i);
1154 pio_sz = pci_resource_len(pdev, i);
1155 } else {
1156 if (memap_sz)
1157 continue;
1158 ioc->chip_phys = pci_resource_start(pdev, i);
1159 memap_sz = pci_resource_len(pdev, i);
1160 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1161 if (ioc->chip == NULL) {
1162 printk(MPT2SAS_ERR_FMT "unable to map adapter "
1163 "memory!\n", ioc->name);
1164 r = -EINVAL;
1165 goto out_fail;
1166 }
1167 }
1168 }
1169
1170 _base_mask_interrupts(ioc);
1171 r = _base_enable_msix(ioc);
1172 if (r)
1173 goto out_fail;
1174
1175 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1176 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1177 "IO-APIC enabled"), ioc->pci_irq);
1178 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
1179 ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
1180 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
1181 ioc->name, ioc->pio_chip, pio_sz);
1182
1183 return 0;
1184
1185 out_fail:
1186 if (ioc->chip_phys)
1187 iounmap(ioc->chip);
1188 ioc->chip_phys = 0;
1189 ioc->pci_irq = -1;
1190 pci_release_selected_regions(ioc->pdev, ioc->bars);
1191 pci_disable_device(pdev);
1192 return r;
1193 }
1194
1195 /**
1196 * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
1197 * @ioc: per adapter object
1198 * @smid: system request message index(smid zero is invalid)
1199 *
1200 * Returns phys pointer to message frame.
1201 */
1202 dma_addr_t
1203 mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1204 {
1205 return ioc->request_dma + (smid * ioc->request_sz);
1206 }
1207
1208 /**
1209 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1210 * @ioc: per adapter object
1211 * @smid: system request message index(smid zero is invalid)
1212 *
1213 * Returns virt pointer to message frame.
1214 */
1215 void *
1216 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1217 {
1218 return (void *)(ioc->request + (smid * ioc->request_sz));
1219 }
1220
1221 /**
1222 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1223 * @ioc: per adapter object
1224 * @smid: system request message index
1225 *
1226 * Returns virt pointer to sense buffer.
1227 */
1228 void *
1229 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1230 {
1231 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1232 }
1233
1234 /**
1235 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1236 * @ioc: per adapter object
1237 * @smid: system request message index
1238 *
1239 * Returns phys pointer to sense buffer.
1240 */
1241 dma_addr_t
1242 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1243 {
1244 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
1245 }
1246
1247 /**
1248 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1249 * @ioc: per adapter object
1250 * @phys_addr: lower 32 physical addr of the reply
1251 *
1252 * Converts 32bit lower physical addr into a virt address.
1253 */
1254 void *
1255 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1256 {
1257 if (!phys_addr)
1258 return NULL;
1259 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1260 }
1261
1262 /**
1263 * mpt2sas_base_get_smid - obtain a free smid
1264 * @ioc: per adapter object
1265 * @cb_idx: callback index
1266 *
1267 * Returns smid (zero is invalid)
1268 */
1269 u16
1270 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1271 {
1272 unsigned long flags;
1273 struct request_tracker *request;
1274 u16 smid;
1275
1276 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1277 if (list_empty(&ioc->free_list)) {
1278 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1279 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1280 ioc->name, __func__);
1281 return 0;
1282 }
1283
1284 request = list_entry(ioc->free_list.next,
1285 struct request_tracker, tracker_list);
1286 request->cb_idx = cb_idx;
1287 smid = request->smid;
1288 list_del(&request->tracker_list);
1289 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1290 return smid;
1291 }
1292
1293
1294 /**
1295 * mpt2sas_base_free_smid - put smid back on free_list
1296 * @ioc: per adapter object
1297 * @smid: system request message index
1298 *
1299 * Return nothing.
1300 */
1301 void
1302 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1303 {
1304 unsigned long flags;
1305
1306 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1307 ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
1308 list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
1309 &ioc->free_list);
1310 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1311
1312 /*
1313 * See _wait_for_commands_to_complete() call with regards to this code.
1314 */
1315 if (ioc->shost_recovery && ioc->pending_io_count) {
1316 if (ioc->pending_io_count == 1)
1317 wake_up(&ioc->reset_wq);
1318 ioc->pending_io_count--;
1319 }
1320 }
1321
1322 /**
1323 * _base_writeq - 64 bit write to MMIO
1324 * @ioc: per adapter object
1325 * @b: data payload
1326 * @addr: address in MMIO space
1327 * @writeq_lock: spin lock
1328 *
1329 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1330 * care of 32 bit environment where its not quarenteed to send the entire word
1331 * in one transfer.
1332 */
1333 #ifndef writeq
1334 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1335 spinlock_t *writeq_lock)
1336 {
1337 unsigned long flags;
1338 __u64 data_out = cpu_to_le64(b);
1339
1340 spin_lock_irqsave(writeq_lock, flags);
1341 writel((u32)(data_out), addr);
1342 writel((u32)(data_out >> 32), (addr + 4));
1343 spin_unlock_irqrestore(writeq_lock, flags);
1344 }
1345 #else
1346 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1347 spinlock_t *writeq_lock)
1348 {
1349 writeq(cpu_to_le64(b), addr);
1350 }
1351 #endif
1352
1353 /**
1354 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1355 * @ioc: per adapter object
1356 * @smid: system request message index
1357 * @handle: device handle
1358 *
1359 * Return nothing.
1360 */
1361 void
1362 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1363 {
1364 Mpi2RequestDescriptorUnion_t descriptor;
1365 u64 *request = (u64 *)&descriptor;
1366
1367
1368 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1369 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
1370 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1371 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1372 descriptor.SCSIIO.LMID = 0;
1373 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1374 &ioc->scsi_lookup_lock);
1375 }
1376
1377
1378 /**
1379 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
1380 * @ioc: per adapter object
1381 * @smid: system request message index
1382 *
1383 * Return nothing.
1384 */
1385 void
1386 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1387 {
1388 Mpi2RequestDescriptorUnion_t descriptor;
1389 u64 *request = (u64 *)&descriptor;
1390
1391 descriptor.HighPriority.RequestFlags =
1392 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1393 descriptor.HighPriority.MSIxIndex = 0; /* TODO */
1394 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1395 descriptor.HighPriority.LMID = 0;
1396 descriptor.HighPriority.Reserved1 = 0;
1397 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1398 &ioc->scsi_lookup_lock);
1399 }
1400
1401 /**
1402 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1403 * @ioc: per adapter object
1404 * @smid: system request message index
1405 *
1406 * Return nothing.
1407 */
1408 void
1409 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1410 {
1411 Mpi2RequestDescriptorUnion_t descriptor;
1412 u64 *request = (u64 *)&descriptor;
1413
1414 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1415 descriptor.Default.MSIxIndex = 0; /* TODO */
1416 descriptor.Default.SMID = cpu_to_le16(smid);
1417 descriptor.Default.LMID = 0;
1418 descriptor.Default.DescriptorTypeDependent = 0;
1419 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1420 &ioc->scsi_lookup_lock);
1421 }
1422
1423 /**
1424 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1425 * @ioc: per adapter object
1426 * @smid: system request message index
1427 * @io_index: value used to track the IO
1428 *
1429 * Return nothing.
1430 */
1431 void
1432 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1433 u16 io_index)
1434 {
1435 Mpi2RequestDescriptorUnion_t descriptor;
1436 u64 *request = (u64 *)&descriptor;
1437
1438 descriptor.SCSITarget.RequestFlags =
1439 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1440 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
1441 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1442 descriptor.SCSITarget.LMID = 0;
1443 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1444 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1445 &ioc->scsi_lookup_lock);
1446 }
1447
1448 /**
1449 * _base_display_dell_branding - Disply branding string
1450 * @ioc: per adapter object
1451 *
1452 * Return nothing.
1453 */
1454 static void
1455 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1456 {
1457 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1458
1459 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1460 return;
1461
1462 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1463 switch (ioc->pdev->subsystem_device) {
1464 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1465 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1466 MPT2SAS_DELL_BRANDING_SIZE - 1);
1467 break;
1468 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1469 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1470 MPT2SAS_DELL_BRANDING_SIZE - 1);
1471 break;
1472 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1473 strncpy(dell_branding,
1474 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1475 MPT2SAS_DELL_BRANDING_SIZE - 1);
1476 break;
1477 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1478 strncpy(dell_branding,
1479 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1480 MPT2SAS_DELL_BRANDING_SIZE - 1);
1481 break;
1482 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1483 strncpy(dell_branding,
1484 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1485 MPT2SAS_DELL_BRANDING_SIZE - 1);
1486 break;
1487 case MPT2SAS_DELL_PERC_H200_SSDID:
1488 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1489 MPT2SAS_DELL_BRANDING_SIZE - 1);
1490 break;
1491 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1492 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1493 MPT2SAS_DELL_BRANDING_SIZE - 1);
1494 break;
1495 default:
1496 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1497 break;
1498 }
1499
1500 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1501 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1502 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1503 ioc->pdev->subsystem_device);
1504 }
1505
1506 /**
1507 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1508 * @ioc: per adapter object
1509 *
1510 * Return nothing.
1511 */
1512 static void
1513 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1514 {
1515 int i = 0;
1516 char desc[16];
1517 u8 revision;
1518 u32 iounit_pg1_flags;
1519
1520 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1521 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1522 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1523 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1524 ioc->name, desc,
1525 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1526 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1527 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1528 ioc->facts.FWVersion.Word & 0x000000FF,
1529 revision,
1530 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1531 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1532 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1533 ioc->bios_pg3.BiosVersion & 0x000000FF);
1534
1535 _base_display_dell_branding(ioc);
1536
1537 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1538
1539 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1540 printk("Initiator");
1541 i++;
1542 }
1543
1544 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1545 printk("%sTarget", i ? "," : "");
1546 i++;
1547 }
1548
1549 i = 0;
1550 printk("), ");
1551 printk("Capabilities=(");
1552
1553 if (ioc->facts.IOCCapabilities &
1554 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1555 printk("Raid");
1556 i++;
1557 }
1558
1559 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1560 printk("%sTLR", i ? "," : "");
1561 i++;
1562 }
1563
1564 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1565 printk("%sMulticast", i ? "," : "");
1566 i++;
1567 }
1568
1569 if (ioc->facts.IOCCapabilities &
1570 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1571 printk("%sBIDI Target", i ? "," : "");
1572 i++;
1573 }
1574
1575 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1576 printk("%sEEDP", i ? "," : "");
1577 i++;
1578 }
1579
1580 if (ioc->facts.IOCCapabilities &
1581 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1582 printk("%sSnapshot Buffer", i ? "," : "");
1583 i++;
1584 }
1585
1586 if (ioc->facts.IOCCapabilities &
1587 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1588 printk("%sDiag Trace Buffer", i ? "," : "");
1589 i++;
1590 }
1591
1592 if (ioc->facts.IOCCapabilities &
1593 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1594 printk("%sTask Set Full", i ? "," : "");
1595 i++;
1596 }
1597
1598 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1599 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1600 printk("%sNCQ", i ? "," : "");
1601 i++;
1602 }
1603
1604 printk(")\n");
1605 }
1606
1607 /**
1608 * _base_static_config_pages - static start of day config pages
1609 * @ioc: per adapter object
1610 *
1611 * Return nothing.
1612 */
1613 static void
1614 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
1615 {
1616 Mpi2ConfigReply_t mpi_reply;
1617 u32 iounit_pg1_flags;
1618
1619 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
1620 if (ioc->ir_firmware)
1621 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
1622 &ioc->manu_pg10);
1623 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
1624 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
1625 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
1626 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
1627 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1628 _base_display_ioc_capabilities(ioc);
1629
1630 /*
1631 * Enable task_set_full handling in iounit_pg1 when the
1632 * facts capabilities indicate that its supported.
1633 */
1634 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1635 if ((ioc->facts.IOCCapabilities &
1636 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
1637 iounit_pg1_flags &=
1638 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1639 else
1640 iounit_pg1_flags |=
1641 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1642 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
1643 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1644 }
1645
1646 /**
1647 * _base_release_memory_pools - release memory
1648 * @ioc: per adapter object
1649 *
1650 * Free memory allocated from _base_allocate_memory_pools.
1651 *
1652 * Return nothing.
1653 */
1654 static void
1655 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
1656 {
1657 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1658 __func__));
1659
1660 if (ioc->request) {
1661 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
1662 ioc->request, ioc->request_dma);
1663 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
1664 ": free\n", ioc->name, ioc->request));
1665 ioc->request = NULL;
1666 }
1667
1668 if (ioc->sense) {
1669 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
1670 if (ioc->sense_dma_pool)
1671 pci_pool_destroy(ioc->sense_dma_pool);
1672 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
1673 ": free\n", ioc->name, ioc->sense));
1674 ioc->sense = NULL;
1675 }
1676
1677 if (ioc->reply) {
1678 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
1679 if (ioc->reply_dma_pool)
1680 pci_pool_destroy(ioc->reply_dma_pool);
1681 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
1682 ": free\n", ioc->name, ioc->reply));
1683 ioc->reply = NULL;
1684 }
1685
1686 if (ioc->reply_free) {
1687 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
1688 ioc->reply_free_dma);
1689 if (ioc->reply_free_dma_pool)
1690 pci_pool_destroy(ioc->reply_free_dma_pool);
1691 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
1692 "(0x%p): free\n", ioc->name, ioc->reply_free));
1693 ioc->reply_free = NULL;
1694 }
1695
1696 if (ioc->reply_post_free) {
1697 pci_pool_free(ioc->reply_post_free_dma_pool,
1698 ioc->reply_post_free, ioc->reply_post_free_dma);
1699 if (ioc->reply_post_free_dma_pool)
1700 pci_pool_destroy(ioc->reply_post_free_dma_pool);
1701 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1702 "reply_post_free_pool(0x%p): free\n", ioc->name,
1703 ioc->reply_post_free));
1704 ioc->reply_post_free = NULL;
1705 }
1706
1707 if (ioc->config_page) {
1708 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1709 "config_page(0x%p): free\n", ioc->name,
1710 ioc->config_page));
1711 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
1712 ioc->config_page, ioc->config_page_dma);
1713 }
1714
1715 kfree(ioc->scsi_lookup);
1716 }
1717
1718
1719 /**
1720 * _base_allocate_memory_pools - allocate start of day memory pools
1721 * @ioc: per adapter object
1722 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1723 *
1724 * Returns 0 success, anything else error
1725 */
1726 static int
1727 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
1728 {
1729 Mpi2IOCFactsReply_t *facts;
1730 u32 queue_size, queue_diff;
1731 u16 max_sge_elements;
1732 u16 num_of_reply_frames;
1733 u16 chains_needed_per_io;
1734 u32 sz, total_sz;
1735 u16 i;
1736 u32 retry_sz;
1737 u16 max_request_credit;
1738
1739 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1740 __func__));
1741
1742 retry_sz = 0;
1743 facts = &ioc->facts;
1744
1745 /* command line tunables for max sgl entries */
1746 if (max_sgl_entries != -1) {
1747 ioc->shost->sg_tablesize = (max_sgl_entries <
1748 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
1749 MPT2SAS_SG_DEPTH;
1750 } else {
1751 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
1752 }
1753
1754 /* command line tunables for max controller queue depth */
1755 if (max_queue_depth != -1) {
1756 max_request_credit = (max_queue_depth < facts->RequestCredit)
1757 ? max_queue_depth : facts->RequestCredit;
1758 } else {
1759 max_request_credit = (facts->RequestCredit >
1760 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
1761 facts->RequestCredit;
1762 }
1763 ioc->request_depth = max_request_credit;
1764
1765 /* request frame size */
1766 ioc->request_sz = facts->IOCRequestFrameSize * 4;
1767
1768 /* reply frame size */
1769 ioc->reply_sz = facts->ReplyFrameSize * 4;
1770
1771 retry_allocation:
1772 total_sz = 0;
1773 /* calculate number of sg elements left over in the 1st frame */
1774 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
1775 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
1776 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
1777
1778 /* now do the same for a chain buffer */
1779 max_sge_elements = ioc->request_sz - ioc->sge_size;
1780 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
1781
1782 ioc->chain_offset_value_for_main_message =
1783 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
1784 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
1785
1786 /*
1787 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
1788 */
1789 chains_needed_per_io = ((ioc->shost->sg_tablesize -
1790 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
1791 + 1;
1792 if (chains_needed_per_io > facts->MaxChainDepth) {
1793 chains_needed_per_io = facts->MaxChainDepth;
1794 ioc->shost->sg_tablesize = min_t(u16,
1795 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
1796 * chains_needed_per_io), ioc->shost->sg_tablesize);
1797 }
1798 ioc->chains_needed_per_io = chains_needed_per_io;
1799
1800 /* reply free queue sizing - taking into account for events */
1801 num_of_reply_frames = ioc->request_depth + 32;
1802
1803 /* number of replies frames can't be a multiple of 16 */
1804 /* decrease number of reply frames by 1 */
1805 if (!(num_of_reply_frames % 16))
1806 num_of_reply_frames--;
1807
1808 /* calculate number of reply free queue entries
1809 * (must be multiple of 16)
1810 */
1811
1812 /* (we know reply_free_queue_depth is not a multiple of 16) */
1813 queue_size = num_of_reply_frames;
1814 queue_size += 16 - (queue_size % 16);
1815 ioc->reply_free_queue_depth = queue_size;
1816
1817 /* reply descriptor post queue sizing */
1818 /* this size should be the number of request frames + number of reply
1819 * frames
1820 */
1821
1822 queue_size = ioc->request_depth + num_of_reply_frames + 1;
1823 /* round up to 16 byte boundary */
1824 if (queue_size % 16)
1825 queue_size += 16 - (queue_size % 16);
1826
1827 /* check against IOC maximum reply post queue depth */
1828 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
1829 queue_diff = queue_size -
1830 facts->MaxReplyDescriptorPostQueueDepth;
1831
1832 /* round queue_diff up to multiple of 16 */
1833 if (queue_diff % 16)
1834 queue_diff += 16 - (queue_diff % 16);
1835
1836 /* adjust request_depth, reply_free_queue_depth,
1837 * and queue_size
1838 */
1839 ioc->request_depth -= queue_diff;
1840 ioc->reply_free_queue_depth -= queue_diff;
1841 queue_size -= queue_diff;
1842 }
1843 ioc->reply_post_queue_depth = queue_size;
1844
1845 /* max scsi host queue depth */
1846 ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
1847 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
1848 "(%d)\n", ioc->name, ioc->shost->can_queue));
1849
1850 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
1851 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
1852 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
1853 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
1854 ioc->chains_needed_per_io));
1855
1856 /* contiguous pool for request and chains, 16 byte align, one extra "
1857 * "frame for smid=0
1858 */
1859 ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
1860 sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
1861
1862 ioc->request_dma_sz = sz;
1863 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
1864 if (!ioc->request) {
1865 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
1866 "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
1867 "total(%d kB)\n", ioc->name, ioc->request_depth,
1868 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
1869 if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
1870 goto out;
1871 retry_sz += 64;
1872 ioc->request_depth = max_request_credit - retry_sz;
1873 goto retry_allocation;
1874 }
1875
1876 if (retry_sz)
1877 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
1878 "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
1879 "total(%d kb)\n", ioc->name, ioc->request_depth,
1880 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
1881
1882 ioc->chain = ioc->request + ((ioc->request_depth + 1) *
1883 ioc->request_sz);
1884 ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
1885 ioc->request_sz);
1886 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
1887 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
1888 ioc->request, ioc->request_depth, ioc->request_sz,
1889 ((ioc->request_depth + 1) * ioc->request_sz)/1024));
1890 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
1891 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
1892 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
1893 ioc->request_sz))/1024));
1894 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
1895 ioc->name, (unsigned long long) ioc->request_dma));
1896 total_sz += sz;
1897
1898 ioc->scsi_lookup = kcalloc(ioc->request_depth,
1899 sizeof(struct request_tracker), GFP_KERNEL);
1900 if (!ioc->scsi_lookup) {
1901 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
1902 ioc->name);
1903 goto out;
1904 }
1905
1906 /* initialize some bits */
1907 for (i = 0; i < ioc->request_depth; i++)
1908 ioc->scsi_lookup[i].smid = i + 1;
1909
1910 /* sense buffers, 4 byte align */
1911 sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
1912 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
1913 0);
1914 if (!ioc->sense_dma_pool) {
1915 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
1916 ioc->name);
1917 goto out;
1918 }
1919 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
1920 &ioc->sense_dma);
1921 if (!ioc->sense) {
1922 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
1923 ioc->name);
1924 goto out;
1925 }
1926 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
1927 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
1928 "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
1929 SCSI_SENSE_BUFFERSIZE, sz/1024));
1930 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
1931 ioc->name, (unsigned long long)ioc->sense_dma));
1932 total_sz += sz;
1933
1934 /* reply pool, 4 byte align */
1935 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
1936 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
1937 0);
1938 if (!ioc->reply_dma_pool) {
1939 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
1940 ioc->name);
1941 goto out;
1942 }
1943 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
1944 &ioc->reply_dma);
1945 if (!ioc->reply) {
1946 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
1947 ioc->name);
1948 goto out;
1949 }
1950 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
1951 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
1952 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
1953 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
1954 ioc->name, (unsigned long long)ioc->reply_dma));
1955 total_sz += sz;
1956
1957 /* reply free queue, 16 byte align */
1958 sz = ioc->reply_free_queue_depth * 4;
1959 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
1960 ioc->pdev, sz, 16, 0);
1961 if (!ioc->reply_free_dma_pool) {
1962 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
1963 "failed\n", ioc->name);
1964 goto out;
1965 }
1966 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
1967 &ioc->reply_free_dma);
1968 if (!ioc->reply_free) {
1969 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
1970 "failed\n", ioc->name);
1971 goto out;
1972 }
1973 memset(ioc->reply_free, 0, sz);
1974 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
1975 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
1976 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
1977 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
1978 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
1979 total_sz += sz;
1980
1981 /* reply post queue, 16 byte align */
1982 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
1983 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
1984 ioc->pdev, sz, 16, 0);
1985 if (!ioc->reply_post_free_dma_pool) {
1986 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
1987 "failed\n", ioc->name);
1988 goto out;
1989 }
1990 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
1991 GFP_KERNEL, &ioc->reply_post_free_dma);
1992 if (!ioc->reply_post_free) {
1993 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
1994 "failed\n", ioc->name);
1995 goto out;
1996 }
1997 memset(ioc->reply_post_free, 0, sz);
1998 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
1999 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2000 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2001 sz/1024));
2002 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2003 "(0x%llx)\n", ioc->name, (unsigned long long)
2004 ioc->reply_post_free_dma));
2005 total_sz += sz;
2006
2007 ioc->config_page_sz = 512;
2008 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2009 ioc->config_page_sz, &ioc->config_page_dma);
2010 if (!ioc->config_page) {
2011 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2012 "failed\n", ioc->name);
2013 goto out;
2014 }
2015 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2016 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2017 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2018 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2019 total_sz += ioc->config_page_sz;
2020
2021 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2022 ioc->name, total_sz/1024);
2023 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2024 "Max Controller Queue Depth(%d)\n",
2025 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2026 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2027 ioc->name, ioc->shost->sg_tablesize);
2028 return 0;
2029
2030 out:
2031 _base_release_memory_pools(ioc);
2032 return -ENOMEM;
2033 }
2034
2035
2036 /**
2037 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2038 * @ioc: Pointer to MPT_ADAPTER structure
2039 * @cooked: Request raw or cooked IOC state
2040 *
2041 * Returns all IOC Doorbell register bits if cooked==0, else just the
2042 * Doorbell bits in MPI_IOC_STATE_MASK.
2043 */
2044 u32
2045 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2046 {
2047 u32 s, sc;
2048
2049 s = readl(&ioc->chip->Doorbell);
2050 sc = s & MPI2_IOC_STATE_MASK;
2051 return cooked ? sc : s;
2052 }
2053
2054 /**
2055 * _base_wait_on_iocstate - waiting on a particular ioc state
2056 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2057 * @timeout: timeout in second
2058 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2059 *
2060 * Returns 0 for success, non-zero for failure.
2061 */
2062 static int
2063 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2064 int sleep_flag)
2065 {
2066 u32 count, cntdn;
2067 u32 current_state;
2068
2069 count = 0;
2070 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2071 do {
2072 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2073 if (current_state == ioc_state)
2074 return 0;
2075 if (count && current_state == MPI2_IOC_STATE_FAULT)
2076 break;
2077 if (sleep_flag == CAN_SLEEP)
2078 msleep(1);
2079 else
2080 udelay(500);
2081 count++;
2082 } while (--cntdn);
2083
2084 return current_state;
2085 }
2086
2087 /**
2088 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2089 * a write to the doorbell)
2090 * @ioc: per adapter object
2091 * @timeout: timeout in second
2092 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2093 *
2094 * Returns 0 for success, non-zero for failure.
2095 *
2096 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2097 */
2098 static int
2099 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2100 int sleep_flag)
2101 {
2102 u32 cntdn, count;
2103 u32 int_status;
2104
2105 count = 0;
2106 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2107 do {
2108 int_status = readl(&ioc->chip->HostInterruptStatus);
2109 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2110 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2111 "successfull count(%d), timeout(%d)\n", ioc->name,
2112 __func__, count, timeout));
2113 return 0;
2114 }
2115 if (sleep_flag == CAN_SLEEP)
2116 msleep(1);
2117 else
2118 udelay(500);
2119 count++;
2120 } while (--cntdn);
2121
2122 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2123 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2124 return -EFAULT;
2125 }
2126
2127 /**
2128 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2129 * @ioc: per adapter object
2130 * @timeout: timeout in second
2131 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2132 *
2133 * Returns 0 for success, non-zero for failure.
2134 *
2135 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2136 * doorbell.
2137 */
2138 static int
2139 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2140 int sleep_flag)
2141 {
2142 u32 cntdn, count;
2143 u32 int_status;
2144 u32 doorbell;
2145
2146 count = 0;
2147 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2148 do {
2149 int_status = readl(&ioc->chip->HostInterruptStatus);
2150 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2151 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2152 "successfull count(%d), timeout(%d)\n", ioc->name,
2153 __func__, count, timeout));
2154 return 0;
2155 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2156 doorbell = readl(&ioc->chip->Doorbell);
2157 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2158 MPI2_IOC_STATE_FAULT) {
2159 mpt2sas_base_fault_info(ioc , doorbell);
2160 return -EFAULT;
2161 }
2162 } else if (int_status == 0xFFFFFFFF)
2163 goto out;
2164
2165 if (sleep_flag == CAN_SLEEP)
2166 msleep(1);
2167 else
2168 udelay(500);
2169 count++;
2170 } while (--cntdn);
2171
2172 out:
2173 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2174 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2175 return -EFAULT;
2176 }
2177
2178 /**
2179 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2180 * @ioc: per adapter object
2181 * @timeout: timeout in second
2182 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2183 *
2184 * Returns 0 for success, non-zero for failure.
2185 *
2186 */
2187 static int
2188 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2189 int sleep_flag)
2190 {
2191 u32 cntdn, count;
2192 u32 doorbell_reg;
2193
2194 count = 0;
2195 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2196 do {
2197 doorbell_reg = readl(&ioc->chip->Doorbell);
2198 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2199 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2200 "successfull count(%d), timeout(%d)\n", ioc->name,
2201 __func__, count, timeout));
2202 return 0;
2203 }
2204 if (sleep_flag == CAN_SLEEP)
2205 msleep(1);
2206 else
2207 udelay(500);
2208 count++;
2209 } while (--cntdn);
2210
2211 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2212 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2213 return -EFAULT;
2214 }
2215
2216 /**
2217 * _base_send_ioc_reset - send doorbell reset
2218 * @ioc: per adapter object
2219 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2220 * @timeout: timeout in second
2221 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2222 *
2223 * Returns 0 for success, non-zero for failure.
2224 */
2225 static int
2226 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2227 int sleep_flag)
2228 {
2229 u32 ioc_state;
2230 int r = 0;
2231
2232 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2233 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2234 ioc->name, __func__);
2235 return -EFAULT;
2236 }
2237
2238 if (!(ioc->facts.IOCCapabilities &
2239 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2240 return -EFAULT;
2241
2242 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2243
2244 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2245 &ioc->chip->Doorbell);
2246 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2247 r = -EFAULT;
2248 goto out;
2249 }
2250 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2251 timeout, sleep_flag);
2252 if (ioc_state) {
2253 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2254 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2255 r = -EFAULT;
2256 goto out;
2257 }
2258 out:
2259 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2260 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2261 return r;
2262 }
2263
2264 /**
2265 * _base_handshake_req_reply_wait - send request thru doorbell interface
2266 * @ioc: per adapter object
2267 * @request_bytes: request length
2268 * @request: pointer having request payload
2269 * @reply_bytes: reply length
2270 * @reply: pointer to reply payload
2271 * @timeout: timeout in second
2272 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2273 *
2274 * Returns 0 for success, non-zero for failure.
2275 */
2276 static int
2277 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2278 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2279 {
2280 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2281 int i;
2282 u8 failed;
2283 u16 dummy;
2284 u32 *mfp;
2285
2286 /* make sure doorbell is not in use */
2287 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2288 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2289 " (line=%d)\n", ioc->name, __LINE__);
2290 return -EFAULT;
2291 }
2292
2293 /* clear pending doorbell interrupts from previous state changes */
2294 if (readl(&ioc->chip->HostInterruptStatus) &
2295 MPI2_HIS_IOC2SYS_DB_STATUS)
2296 writel(0, &ioc->chip->HostInterruptStatus);
2297
2298 /* send message to ioc */
2299 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2300 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2301 &ioc->chip->Doorbell);
2302
2303 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2304 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2305 "int failed (line=%d)\n", ioc->name, __LINE__);
2306 return -EFAULT;
2307 }
2308 writel(0, &ioc->chip->HostInterruptStatus);
2309
2310 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2311 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2312 "ack failed (line=%d)\n", ioc->name, __LINE__);
2313 return -EFAULT;
2314 }
2315
2316 /* send message 32-bits at a time */
2317 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2318 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2319 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2320 failed = 1;
2321 }
2322
2323 if (failed) {
2324 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2325 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2326 return -EFAULT;
2327 }
2328
2329 /* now wait for the reply */
2330 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2331 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2332 "int failed (line=%d)\n", ioc->name, __LINE__);
2333 return -EFAULT;
2334 }
2335
2336 /* read the first two 16-bits, it gives the total length of the reply */
2337 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2338 & MPI2_DOORBELL_DATA_MASK);
2339 writel(0, &ioc->chip->HostInterruptStatus);
2340 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2341 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2342 "int failed (line=%d)\n", ioc->name, __LINE__);
2343 return -EFAULT;
2344 }
2345 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2346 & MPI2_DOORBELL_DATA_MASK);
2347 writel(0, &ioc->chip->HostInterruptStatus);
2348
2349 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2350 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2351 printk(MPT2SAS_ERR_FMT "doorbell "
2352 "handshake int failed (line=%d)\n", ioc->name,
2353 __LINE__);
2354 return -EFAULT;
2355 }
2356 if (i >= reply_bytes/2) /* overflow case */
2357 dummy = readl(&ioc->chip->Doorbell);
2358 else
2359 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2360 & MPI2_DOORBELL_DATA_MASK);
2361 writel(0, &ioc->chip->HostInterruptStatus);
2362 }
2363
2364 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2365 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2366 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2367 " (line=%d)\n", ioc->name, __LINE__));
2368 }
2369 writel(0, &ioc->chip->HostInterruptStatus);
2370
2371 if (ioc->logging_level & MPT_DEBUG_INIT) {
2372 mfp = (u32 *)reply;
2373 printk(KERN_DEBUG "\toffset:data\n");
2374 for (i = 0; i < reply_bytes/4; i++)
2375 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2376 le32_to_cpu(mfp[i]));
2377 }
2378 return 0;
2379 }
2380
2381 /**
2382 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2383 * @ioc: per adapter object
2384 * @mpi_reply: the reply payload from FW
2385 * @mpi_request: the request payload sent to FW
2386 *
2387 * The SAS IO Unit Control Request message allows the host to perform low-level
2388 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2389 * to obtain the IOC assigned device handles for a device if it has other
2390 * identifying information about the device, in addition allows the host to
2391 * remove IOC resources associated with the device.
2392 *
2393 * Returns 0 for success, non-zero for failure.
2394 */
2395 int
2396 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2397 Mpi2SasIoUnitControlReply_t *mpi_reply,
2398 Mpi2SasIoUnitControlRequest_t *mpi_request)
2399 {
2400 u16 smid;
2401 u32 ioc_state;
2402 unsigned long timeleft;
2403 u8 issue_reset;
2404 int rc;
2405 void *request;
2406 u16 wait_state_count;
2407
2408 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2409 __func__));
2410
2411 mutex_lock(&ioc->base_cmds.mutex);
2412
2413 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2414 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2415 ioc->name, __func__);
2416 rc = -EAGAIN;
2417 goto out;
2418 }
2419
2420 wait_state_count = 0;
2421 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2422 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2423 if (wait_state_count++ == 10) {
2424 printk(MPT2SAS_ERR_FMT
2425 "%s: failed due to ioc not operational\n",
2426 ioc->name, __func__);
2427 rc = -EFAULT;
2428 goto out;
2429 }
2430 ssleep(1);
2431 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2432 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2433 "operational state(count=%d)\n", ioc->name,
2434 __func__, wait_state_count);
2435 }
2436
2437 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2438 if (!smid) {
2439 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2440 ioc->name, __func__);
2441 rc = -EAGAIN;
2442 goto out;
2443 }
2444
2445 rc = 0;
2446 ioc->base_cmds.status = MPT2_CMD_PENDING;
2447 request = mpt2sas_base_get_msg_frame(ioc, smid);
2448 ioc->base_cmds.smid = smid;
2449 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2450 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2451 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2452 ioc->ioc_link_reset_in_progress = 1;
2453 mpt2sas_base_put_smid_default(ioc, smid);
2454 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2455 msecs_to_jiffies(10000));
2456 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2457 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2458 ioc->ioc_link_reset_in_progress)
2459 ioc->ioc_link_reset_in_progress = 0;
2460 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2461 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2462 ioc->name, __func__);
2463 _debug_dump_mf(mpi_request,
2464 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2465 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2466 issue_reset = 1;
2467 goto issue_host_reset;
2468 }
2469 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2470 memcpy(mpi_reply, ioc->base_cmds.reply,
2471 sizeof(Mpi2SasIoUnitControlReply_t));
2472 else
2473 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2474 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2475 goto out;
2476
2477 issue_host_reset:
2478 if (issue_reset)
2479 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2480 FORCE_BIG_HAMMER);
2481 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2482 rc = -EFAULT;
2483 out:
2484 mutex_unlock(&ioc->base_cmds.mutex);
2485 return rc;
2486 }
2487
2488
2489 /**
2490 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2491 * @ioc: per adapter object
2492 * @mpi_reply: the reply payload from FW
2493 * @mpi_request: the request payload sent to FW
2494 *
2495 * The SCSI Enclosure Processor request message causes the IOC to
2496 * communicate with SES devices to control LED status signals.
2497 *
2498 * Returns 0 for success, non-zero for failure.
2499 */
2500 int
2501 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2502 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2503 {
2504 u16 smid;
2505 u32 ioc_state;
2506 unsigned long timeleft;
2507 u8 issue_reset;
2508 int rc;
2509 void *request;
2510 u16 wait_state_count;
2511
2512 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2513 __func__));
2514
2515 mutex_lock(&ioc->base_cmds.mutex);
2516
2517 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2518 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2519 ioc->name, __func__);
2520 rc = -EAGAIN;
2521 goto out;
2522 }
2523
2524 wait_state_count = 0;
2525 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2526 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2527 if (wait_state_count++ == 10) {
2528 printk(MPT2SAS_ERR_FMT
2529 "%s: failed due to ioc not operational\n",
2530 ioc->name, __func__);
2531 rc = -EFAULT;
2532 goto out;
2533 }
2534 ssleep(1);
2535 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2536 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2537 "operational state(count=%d)\n", ioc->name,
2538 __func__, wait_state_count);
2539 }
2540
2541 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2542 if (!smid) {
2543 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2544 ioc->name, __func__);
2545 rc = -EAGAIN;
2546 goto out;
2547 }
2548
2549 rc = 0;
2550 ioc->base_cmds.status = MPT2_CMD_PENDING;
2551 request = mpt2sas_base_get_msg_frame(ioc, smid);
2552 ioc->base_cmds.smid = smid;
2553 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
2554 mpt2sas_base_put_smid_default(ioc, smid);
2555 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2556 msecs_to_jiffies(10000));
2557 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2558 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2559 ioc->name, __func__);
2560 _debug_dump_mf(mpi_request,
2561 sizeof(Mpi2SepRequest_t)/4);
2562 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2563 issue_reset = 1;
2564 goto issue_host_reset;
2565 }
2566 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2567 memcpy(mpi_reply, ioc->base_cmds.reply,
2568 sizeof(Mpi2SepReply_t));
2569 else
2570 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
2571 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2572 goto out;
2573
2574 issue_host_reset:
2575 if (issue_reset)
2576 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2577 FORCE_BIG_HAMMER);
2578 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2579 rc = -EFAULT;
2580 out:
2581 mutex_unlock(&ioc->base_cmds.mutex);
2582 return rc;
2583 }
2584
2585 /**
2586 * _base_get_port_facts - obtain port facts reply and save in ioc
2587 * @ioc: per adapter object
2588 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2589 *
2590 * Returns 0 for success, non-zero for failure.
2591 */
2592 static int
2593 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
2594 {
2595 Mpi2PortFactsRequest_t mpi_request;
2596 Mpi2PortFactsReply_t mpi_reply, *pfacts;
2597 int mpi_reply_sz, mpi_request_sz, r;
2598
2599 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2600 __func__));
2601
2602 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
2603 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
2604 memset(&mpi_request, 0, mpi_request_sz);
2605 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
2606 mpi_request.PortNumber = port;
2607 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2608 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2609
2610 if (r != 0) {
2611 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2612 ioc->name, __func__, r);
2613 return r;
2614 }
2615
2616 pfacts = &ioc->pfacts[port];
2617 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
2618 pfacts->PortNumber = mpi_reply.PortNumber;
2619 pfacts->VP_ID = mpi_reply.VP_ID;
2620 pfacts->VF_ID = mpi_reply.VF_ID;
2621 pfacts->MaxPostedCmdBuffers =
2622 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
2623
2624 return 0;
2625 }
2626
2627 /**
2628 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
2629 * @ioc: per adapter object
2630 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2631 *
2632 * Returns 0 for success, non-zero for failure.
2633 */
2634 static int
2635 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2636 {
2637 Mpi2IOCFactsRequest_t mpi_request;
2638 Mpi2IOCFactsReply_t mpi_reply, *facts;
2639 int mpi_reply_sz, mpi_request_sz, r;
2640
2641 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2642 __func__));
2643
2644 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
2645 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
2646 memset(&mpi_request, 0, mpi_request_sz);
2647 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
2648 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2649 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2650
2651 if (r != 0) {
2652 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2653 ioc->name, __func__, r);
2654 return r;
2655 }
2656
2657 facts = &ioc->facts;
2658 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
2659 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
2660 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
2661 facts->VP_ID = mpi_reply.VP_ID;
2662 facts->VF_ID = mpi_reply.VF_ID;
2663 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
2664 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
2665 facts->WhoInit = mpi_reply.WhoInit;
2666 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
2667 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
2668 facts->MaxReplyDescriptorPostQueueDepth =
2669 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
2670 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
2671 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
2672 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
2673 ioc->ir_firmware = 1;
2674 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
2675 facts->IOCRequestFrameSize =
2676 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
2677 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
2678 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
2679 ioc->shost->max_id = -1;
2680 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
2681 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
2682 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
2683 facts->HighPriorityCredit =
2684 le16_to_cpu(mpi_reply.HighPriorityCredit);
2685 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
2686 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
2687
2688 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
2689 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
2690 facts->MaxChainDepth));
2691 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
2692 "reply frame size(%d)\n", ioc->name,
2693 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
2694 return 0;
2695 }
2696
2697 /**
2698 * _base_send_ioc_init - send ioc_init to firmware
2699 * @ioc: per adapter object
2700 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2701 *
2702 * Returns 0 for success, non-zero for failure.
2703 */
2704 static int
2705 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2706 {
2707 Mpi2IOCInitRequest_t mpi_request;
2708 Mpi2IOCInitReply_t mpi_reply;
2709 int r;
2710
2711 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2712 __func__));
2713
2714 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
2715 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
2716 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
2717 mpi_request.VF_ID = 0; /* TODO */
2718 mpi_request.VP_ID = 0;
2719 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
2720 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
2721
2722 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
2723 * removed and made reserved. For those with older firmware will need
2724 * this fix. It was decided that the Reply and Request frame sizes are
2725 * the same.
2726 */
2727 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
2728 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
2729 /* mpi_request.SystemReplyFrameSize =
2730 * cpu_to_le16(ioc->reply_sz);
2731 */
2732 }
2733
2734 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
2735 mpi_request.ReplyDescriptorPostQueueDepth =
2736 cpu_to_le16(ioc->reply_post_queue_depth);
2737 mpi_request.ReplyFreeQueueDepth =
2738 cpu_to_le16(ioc->reply_free_queue_depth);
2739
2740 #if BITS_PER_LONG > 32
2741 mpi_request.SenseBufferAddressHigh =
2742 cpu_to_le32(ioc->sense_dma >> 32);
2743 mpi_request.SystemReplyAddressHigh =
2744 cpu_to_le32(ioc->reply_dma >> 32);
2745 mpi_request.SystemRequestFrameBaseAddress =
2746 cpu_to_le64(ioc->request_dma);
2747 mpi_request.ReplyFreeQueueAddress =
2748 cpu_to_le64(ioc->reply_free_dma);
2749 mpi_request.ReplyDescriptorPostQueueAddress =
2750 cpu_to_le64(ioc->reply_post_free_dma);
2751 #else
2752 mpi_request.SystemRequestFrameBaseAddress =
2753 cpu_to_le32(ioc->request_dma);
2754 mpi_request.ReplyFreeQueueAddress =
2755 cpu_to_le32(ioc->reply_free_dma);
2756 mpi_request.ReplyDescriptorPostQueueAddress =
2757 cpu_to_le32(ioc->reply_post_free_dma);
2758 #endif
2759
2760 if (ioc->logging_level & MPT_DEBUG_INIT) {
2761 u32 *mfp;
2762 int i;
2763
2764 mfp = (u32 *)&mpi_request;
2765 printk(KERN_DEBUG "\toffset:data\n");
2766 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
2767 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2768 le32_to_cpu(mfp[i]));
2769 }
2770
2771 r = _base_handshake_req_reply_wait(ioc,
2772 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
2773 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
2774 sleep_flag);
2775
2776 if (r != 0) {
2777 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2778 ioc->name, __func__, r);
2779 return r;
2780 }
2781
2782 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
2783 mpi_reply.IOCLogInfo) {
2784 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
2785 r = -EIO;
2786 }
2787
2788 return 0;
2789 }
2790
2791 /**
2792 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
2793 * @ioc: per adapter object
2794 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2795 *
2796 * Returns 0 for success, non-zero for failure.
2797 */
2798 static int
2799 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2800 {
2801 Mpi2PortEnableRequest_t *mpi_request;
2802 u32 ioc_state;
2803 unsigned long timeleft;
2804 int r = 0;
2805 u16 smid;
2806
2807 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
2808
2809 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
2810 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
2811 ioc->name, __func__);
2812 return -EAGAIN;
2813 }
2814
2815 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2816 if (!smid) {
2817 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2818 ioc->name, __func__);
2819 return -EAGAIN;
2820 }
2821
2822 ioc->base_cmds.status = MPT2_CMD_PENDING;
2823 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2824 ioc->base_cmds.smid = smid;
2825 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
2826 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
2827 mpi_request->VF_ID = 0; /* TODO */
2828 mpi_request->VP_ID = 0;
2829
2830 mpt2sas_base_put_smid_default(ioc, smid);
2831 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2832 300*HZ);
2833 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2834 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2835 ioc->name, __func__);
2836 _debug_dump_mf(mpi_request,
2837 sizeof(Mpi2PortEnableRequest_t)/4);
2838 if (ioc->base_cmds.status & MPT2_CMD_RESET)
2839 r = -EFAULT;
2840 else
2841 r = -ETIME;
2842 goto out;
2843 } else
2844 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
2845 ioc->name, __func__));
2846
2847 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
2848 60, sleep_flag);
2849 if (ioc_state) {
2850 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
2851 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2852 r = -EFAULT;
2853 }
2854 out:
2855 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2856 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
2857 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2858 return r;
2859 }
2860
2861 /**
2862 * _base_unmask_events - turn on notification for this event
2863 * @ioc: per adapter object
2864 * @event: firmware event
2865 *
2866 * The mask is stored in ioc->event_masks.
2867 */
2868 static void
2869 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
2870 {
2871 u32 desired_event;
2872
2873 if (event >= 128)
2874 return;
2875
2876 desired_event = (1 << (event % 32));
2877
2878 if (event < 32)
2879 ioc->event_masks[0] &= ~desired_event;
2880 else if (event < 64)
2881 ioc->event_masks[1] &= ~desired_event;
2882 else if (event < 96)
2883 ioc->event_masks[2] &= ~desired_event;
2884 else if (event < 128)
2885 ioc->event_masks[3] &= ~desired_event;
2886 }
2887
2888 /**
2889 * _base_event_notification - send event notification
2890 * @ioc: per adapter object
2891 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2892 *
2893 * Returns 0 for success, non-zero for failure.
2894 */
2895 static int
2896 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2897 {
2898 Mpi2EventNotificationRequest_t *mpi_request;
2899 unsigned long timeleft;
2900 u16 smid;
2901 int r = 0;
2902 int i;
2903
2904 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2905 __func__));
2906
2907 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
2908 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
2909 ioc->name, __func__);
2910 return -EAGAIN;
2911 }
2912
2913 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2914 if (!smid) {
2915 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2916 ioc->name, __func__);
2917 return -EAGAIN;
2918 }
2919 ioc->base_cmds.status = MPT2_CMD_PENDING;
2920 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2921 ioc->base_cmds.smid = smid;
2922 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
2923 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2924 mpi_request->VF_ID = 0; /* TODO */
2925 mpi_request->VP_ID = 0;
2926 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2927 mpi_request->EventMasks[i] =
2928 le32_to_cpu(ioc->event_masks[i]);
2929 mpt2sas_base_put_smid_default(ioc, smid);
2930 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
2931 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2932 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2933 ioc->name, __func__);
2934 _debug_dump_mf(mpi_request,
2935 sizeof(Mpi2EventNotificationRequest_t)/4);
2936 if (ioc->base_cmds.status & MPT2_CMD_RESET)
2937 r = -EFAULT;
2938 else
2939 r = -ETIME;
2940 } else
2941 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
2942 ioc->name, __func__));
2943 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2944 return r;
2945 }
2946
2947 /**
2948 * mpt2sas_base_validate_event_type - validating event types
2949 * @ioc: per adapter object
2950 * @event: firmware event
2951 *
2952 * This will turn on firmware event notification when application
2953 * ask for that event. We don't mask events that are already enabled.
2954 */
2955 void
2956 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
2957 {
2958 int i, j;
2959 u32 event_mask, desired_event;
2960 u8 send_update_to_fw;
2961
2962 for (i = 0, send_update_to_fw = 0; i <
2963 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
2964 event_mask = ~event_type[i];
2965 desired_event = 1;
2966 for (j = 0; j < 32; j++) {
2967 if (!(event_mask & desired_event) &&
2968 (ioc->event_masks[i] & desired_event)) {
2969 ioc->event_masks[i] &= ~desired_event;
2970 send_update_to_fw = 1;
2971 }
2972 desired_event = (desired_event << 1);
2973 }
2974 }
2975
2976 if (!send_update_to_fw)
2977 return;
2978
2979 mutex_lock(&ioc->base_cmds.mutex);
2980 _base_event_notification(ioc, CAN_SLEEP);
2981 mutex_unlock(&ioc->base_cmds.mutex);
2982 }
2983
2984 /**
2985 * _base_diag_reset - the "big hammer" start of day reset
2986 * @ioc: per adapter object
2987 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2988 *
2989 * Returns 0 for success, non-zero for failure.
2990 */
2991 static int
2992 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2993 {
2994 u32 host_diagnostic;
2995 u32 ioc_state;
2996 u32 count;
2997 u32 hcb_size;
2998
2999 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3000
3001 _base_save_msix_table(ioc);
3002
3003 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
3004 ioc->name));
3005 writel(0, &ioc->chip->HostInterruptStatus);
3006
3007 count = 0;
3008 do {
3009 /* Write magic sequence to WriteSequence register
3010 * Loop until in diagnostic mode
3011 */
3012 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
3013 "sequence\n", ioc->name));
3014 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3015 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3016 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3017 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3018 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3019 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3020 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3021
3022 /* wait 100 msec */
3023 if (sleep_flag == CAN_SLEEP)
3024 msleep(100);
3025 else
3026 mdelay(100);
3027
3028 if (count++ > 20)
3029 goto out;
3030
3031 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3032 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
3033 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3034 ioc->name, count, host_diagnostic));
3035
3036 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3037
3038 hcb_size = readl(&ioc->chip->HCBSize);
3039
3040 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
3041 ioc->name));
3042 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3043 &ioc->chip->HostDiagnostic);
3044
3045 /* don't access any registers for 50 milliseconds */
3046 msleep(50);
3047
3048 /* 300 second max wait */
3049 for (count = 0; count < 3000000 ; count++) {
3050
3051 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3052
3053 if (host_diagnostic == 0xFFFFFFFF)
3054 goto out;
3055 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3056 break;
3057
3058 /* wait 100 msec */
3059 if (sleep_flag == CAN_SLEEP)
3060 msleep(1);
3061 else
3062 mdelay(1);
3063 }
3064
3065 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3066
3067 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
3068 "assuming the HCB Address points to good F/W\n",
3069 ioc->name));
3070 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3071 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3072 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3073
3074 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
3075 "re-enable the HCDW\n", ioc->name));
3076 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3077 &ioc->chip->HCBSize);
3078 }
3079
3080 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
3081 ioc->name));
3082 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3083 &ioc->chip->HostDiagnostic);
3084
3085 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
3086 "diagnostic register\n", ioc->name));
3087 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3088
3089 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
3090 "READY state\n", ioc->name));
3091 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3092 sleep_flag);
3093 if (ioc_state) {
3094 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3095 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3096 goto out;
3097 }
3098
3099 _base_restore_msix_table(ioc);
3100 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3101 return 0;
3102
3103 out:
3104 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3105 return -EFAULT;
3106 }
3107
3108 /**
3109 * _base_make_ioc_ready - put controller in READY state
3110 * @ioc: per adapter object
3111 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3112 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3113 *
3114 * Returns 0 for success, non-zero for failure.
3115 */
3116 static int
3117 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3118 enum reset_type type)
3119 {
3120 u32 ioc_state;
3121
3122 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3123 __func__));
3124
3125 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3126 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
3127 ioc->name, __func__, ioc_state));
3128
3129 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3130 return 0;
3131
3132 if (ioc_state & MPI2_DOORBELL_USED) {
3133 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
3134 "active!\n", ioc->name));
3135 goto issue_diag_reset;
3136 }
3137
3138 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3139 mpt2sas_base_fault_info(ioc, ioc_state &
3140 MPI2_DOORBELL_DATA_MASK);
3141 goto issue_diag_reset;
3142 }
3143
3144 if (type == FORCE_BIG_HAMMER)
3145 goto issue_diag_reset;
3146
3147 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3148 if (!(_base_send_ioc_reset(ioc,
3149 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
3150 return 0;
3151
3152 issue_diag_reset:
3153 return _base_diag_reset(ioc, CAN_SLEEP);
3154 }
3155
3156 /**
3157 * _base_make_ioc_operational - put controller in OPERATIONAL state
3158 * @ioc: per adapter object
3159 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3160 *
3161 * Returns 0 for success, non-zero for failure.
3162 */
3163 static int
3164 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3165 {
3166 int r, i;
3167 unsigned long flags;
3168 u32 reply_address;
3169
3170 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3171 __func__));
3172
3173 /* initialize the scsi lookup free list */
3174 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3175 INIT_LIST_HEAD(&ioc->free_list);
3176 for (i = 0; i < ioc->request_depth; i++) {
3177 ioc->scsi_lookup[i].cb_idx = 0xFF;
3178 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3179 &ioc->free_list);
3180 }
3181 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3182
3183 /* initialize Reply Free Queue */
3184 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3185 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3186 ioc->reply_sz)
3187 ioc->reply_free[i] = cpu_to_le32(reply_address);
3188
3189 /* initialize Reply Post Free Queue */
3190 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3191 ioc->reply_post_free[i].Words = ULLONG_MAX;
3192
3193 r = _base_send_ioc_init(ioc, sleep_flag);
3194 if (r)
3195 return r;
3196
3197 /* initialize the index's */
3198 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3199 ioc->reply_post_host_index = 0;
3200 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3201 writel(0, &ioc->chip->ReplyPostHostIndex);
3202
3203 _base_unmask_interrupts(ioc);
3204 r = _base_event_notification(ioc, sleep_flag);
3205 if (r)
3206 return r;
3207
3208 if (sleep_flag == CAN_SLEEP)
3209 _base_static_config_pages(ioc);
3210
3211 r = _base_send_port_enable(ioc, sleep_flag);
3212 if (r)
3213 return r;
3214
3215 return r;
3216 }
3217
3218 /**
3219 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3220 * @ioc: per adapter object
3221 *
3222 * Return nothing.
3223 */
3224 void
3225 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3226 {
3227 struct pci_dev *pdev = ioc->pdev;
3228
3229 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3230 __func__));
3231
3232 _base_mask_interrupts(ioc);
3233 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3234 if (ioc->pci_irq) {
3235 synchronize_irq(pdev->irq);
3236 free_irq(ioc->pci_irq, ioc);
3237 }
3238 _base_disable_msix(ioc);
3239 if (ioc->chip_phys)
3240 iounmap(ioc->chip);
3241 ioc->pci_irq = -1;
3242 ioc->chip_phys = 0;
3243 pci_release_selected_regions(ioc->pdev, ioc->bars);
3244 pci_disable_device(pdev);
3245 return;
3246 }
3247
3248 /**
3249 * mpt2sas_base_attach - attach controller instance
3250 * @ioc: per adapter object
3251 *
3252 * Returns 0 for success, non-zero for failure.
3253 */
3254 int
3255 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3256 {
3257 int r, i;
3258
3259 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3260 __func__));
3261
3262 r = mpt2sas_base_map_resources(ioc);
3263 if (r)
3264 return r;
3265
3266 pci_set_drvdata(ioc->pdev, ioc->shost);
3267 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3268 if (r)
3269 goto out_free_resources;
3270
3271 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3272 if (r)
3273 goto out_free_resources;
3274
3275 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3276 if (r)
3277 goto out_free_resources;
3278
3279 init_waitqueue_head(&ioc->reset_wq);
3280
3281 /* base internal command bits */
3282 mutex_init(&ioc->base_cmds.mutex);
3283 init_completion(&ioc->base_cmds.done);
3284 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3285 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3286
3287 /* transport internal command bits */
3288 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3289 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3290 mutex_init(&ioc->transport_cmds.mutex);
3291 init_completion(&ioc->transport_cmds.done);
3292
3293 /* task management internal command bits */
3294 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3295 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3296 mutex_init(&ioc->tm_cmds.mutex);
3297
3298 /* config page internal command bits */
3299 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3300 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3301 mutex_init(&ioc->config_cmds.mutex);
3302
3303 /* ctl module internal command bits */
3304 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3305 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3306 mutex_init(&ioc->ctl_cmds.mutex);
3307 init_completion(&ioc->ctl_cmds.done);
3308
3309 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3310 ioc->event_masks[i] = -1;
3311
3312 /* here we enable the events we care about */
3313 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3314 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3315 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3316 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3317 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3318 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3319 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3320 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3321 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3322 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
3323 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3324
3325 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3326 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3327 if (!ioc->pfacts)
3328 goto out_free_resources;
3329
3330 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3331 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3332 if (r)
3333 goto out_free_resources;
3334 }
3335 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
3336 if (r)
3337 goto out_free_resources;
3338
3339 mpt2sas_base_start_watchdog(ioc);
3340 return 0;
3341
3342 out_free_resources:
3343
3344 ioc->remove_host = 1;
3345 mpt2sas_base_free_resources(ioc);
3346 _base_release_memory_pools(ioc);
3347 pci_set_drvdata(ioc->pdev, NULL);
3348 kfree(ioc->tm_cmds.reply);
3349 kfree(ioc->transport_cmds.reply);
3350 kfree(ioc->config_cmds.reply);
3351 kfree(ioc->base_cmds.reply);
3352 kfree(ioc->ctl_cmds.reply);
3353 kfree(ioc->pfacts);
3354 ioc->ctl_cmds.reply = NULL;
3355 ioc->base_cmds.reply = NULL;
3356 ioc->tm_cmds.reply = NULL;
3357 ioc->transport_cmds.reply = NULL;
3358 ioc->config_cmds.reply = NULL;
3359 ioc->pfacts = NULL;
3360 return r;
3361 }
3362
3363
3364 /**
3365 * mpt2sas_base_detach - remove controller instance
3366 * @ioc: per adapter object
3367 *
3368 * Return nothing.
3369 */
3370 void
3371 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3372 {
3373
3374 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3375 __func__));
3376
3377 mpt2sas_base_stop_watchdog(ioc);
3378 mpt2sas_base_free_resources(ioc);
3379 _base_release_memory_pools(ioc);
3380 pci_set_drvdata(ioc->pdev, NULL);
3381 kfree(ioc->pfacts);
3382 kfree(ioc->ctl_cmds.reply);
3383 kfree(ioc->base_cmds.reply);
3384 kfree(ioc->tm_cmds.reply);
3385 kfree(ioc->transport_cmds.reply);
3386 kfree(ioc->config_cmds.reply);
3387 }
3388
3389 /**
3390 * _base_reset_handler - reset callback handler (for base)
3391 * @ioc: per adapter object
3392 * @reset_phase: phase
3393 *
3394 * The handler for doing any required cleanup or initialization.
3395 *
3396 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
3397 * MPT2_IOC_DONE_RESET
3398 *
3399 * Return nothing.
3400 */
3401 static void
3402 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
3403 {
3404 switch (reset_phase) {
3405 case MPT2_IOC_PRE_RESET:
3406 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3407 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
3408 break;
3409 case MPT2_IOC_AFTER_RESET:
3410 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3411 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
3412 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
3413 ioc->transport_cmds.status |= MPT2_CMD_RESET;
3414 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
3415 complete(&ioc->transport_cmds.done);
3416 }
3417 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3418 ioc->base_cmds.status |= MPT2_CMD_RESET;
3419 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
3420 complete(&ioc->base_cmds.done);
3421 }
3422 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
3423 ioc->config_cmds.status |= MPT2_CMD_RESET;
3424 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
3425 ioc->config_cmds.smid = USHORT_MAX;
3426 complete(&ioc->config_cmds.done);
3427 }
3428 break;
3429 case MPT2_IOC_DONE_RESET:
3430 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3431 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
3432 break;
3433 }
3434 mpt2sas_scsih_reset_handler(ioc, reset_phase);
3435 mpt2sas_ctl_reset_handler(ioc, reset_phase);
3436 }
3437
3438 /**
3439 * _wait_for_commands_to_complete - reset controller
3440 * @ioc: Pointer to MPT_ADAPTER structure
3441 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3442 *
3443 * This function waiting(3s) for all pending commands to complete
3444 * prior to putting controller in reset.
3445 */
3446 static void
3447 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3448 {
3449 u32 ioc_state;
3450 unsigned long flags;
3451 u16 i;
3452
3453 ioc->pending_io_count = 0;
3454 if (sleep_flag != CAN_SLEEP)
3455 return;
3456
3457 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3458 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
3459 return;
3460
3461 /* pending command count */
3462 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3463 for (i = 0; i < ioc->request_depth; i++)
3464 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
3465 ioc->pending_io_count++;
3466 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3467
3468 if (!ioc->pending_io_count)
3469 return;
3470
3471 /* wait for pending commands to complete */
3472 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
3473 }
3474
3475 /**
3476 * mpt2sas_base_hard_reset_handler - reset controller
3477 * @ioc: Pointer to MPT_ADAPTER structure
3478 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3479 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3480 *
3481 * Returns 0 for success, non-zero for failure.
3482 */
3483 int
3484 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3485 enum reset_type type)
3486 {
3487 int r;
3488 unsigned long flags;
3489
3490 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
3491 __func__));
3492
3493 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3494 if (ioc->shost_recovery) {
3495 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3496 printk(MPT2SAS_ERR_FMT "%s: busy\n",
3497 ioc->name, __func__);
3498 return -EBUSY;
3499 }
3500 ioc->shost_recovery = 1;
3501 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3502
3503 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
3504 _wait_for_commands_to_complete(ioc, sleep_flag);
3505 _base_mask_interrupts(ioc);
3506 r = _base_make_ioc_ready(ioc, sleep_flag, type);
3507 if (r)
3508 goto out;
3509 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
3510 r = _base_make_ioc_operational(ioc, sleep_flag);
3511 if (!r)
3512 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
3513 out:
3514 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
3515 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
3516
3517 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3518 ioc->shost_recovery = 0;
3519 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3520
3521 if (!r)
3522 _base_reset_handler(ioc, MPT2_IOC_RUNNING);
3523 return r;
3524 }