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Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / lpfc / lpfc_sli.c
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
8 * *
9 * This program is free software; you can redistribute it and/or *
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
20 *******************************************************************/
21
22 #include <linux/blkdev.h>
23 #include <linux/pci.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
26
27 #include <scsi/scsi.h>
28 #include <scsi/scsi_cmnd.h>
29 #include <scsi/scsi_device.h>
30 #include <scsi/scsi_host.h>
31 #include <scsi/scsi_transport_fc.h>
32
33 #include "lpfc_hw.h"
34 #include "lpfc_sli.h"
35 #include "lpfc_disc.h"
36 #include "lpfc_scsi.h"
37 #include "lpfc.h"
38 #include "lpfc_crtn.h"
39 #include "lpfc_logmsg.h"
40 #include "lpfc_compat.h"
41
42 /*
43 * Define macro to log: Mailbox command x%x cannot issue Data
44 * This allows multiple uses of lpfc_msgBlk0311
45 * w/o perturbing log msg utility.
46 */
47 #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
48 lpfc_printf_log(phba, \
49 KERN_INFO, \
50 LOG_MBOX | LOG_SLI, \
51 "%d:0311 Mailbox command x%x cannot issue " \
52 "Data: x%x x%x x%x\n", \
53 phba->brd_no, \
54 mb->mbxCommand, \
55 phba->hba_state, \
56 psli->sli_flag, \
57 flag);
58
59
60 /* There are only four IOCB completion types. */
61 typedef enum _lpfc_iocb_type {
62 LPFC_UNKNOWN_IOCB,
63 LPFC_UNSOL_IOCB,
64 LPFC_SOL_IOCB,
65 LPFC_ABORT_IOCB
66 } lpfc_iocb_type;
67
68 struct lpfc_iocbq *
69 lpfc_sli_get_iocbq(struct lpfc_hba * phba)
70 {
71 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
72 struct lpfc_iocbq * iocbq = NULL;
73
74 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
75 return iocbq;
76 }
77
78 void
79 lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
80 {
81 size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
82
83 /*
84 * Clean all volatile data fields, preserve iotag and node struct.
85 */
86 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
87 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
88 }
89
90 /*
91 * Translate the iocb command to an iocb command type used to decide the final
92 * disposition of each completed IOCB.
93 */
94 static lpfc_iocb_type
95 lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
96 {
97 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
98
99 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
100 return 0;
101
102 switch (iocb_cmnd) {
103 case CMD_XMIT_SEQUENCE_CR:
104 case CMD_XMIT_SEQUENCE_CX:
105 case CMD_XMIT_BCAST_CN:
106 case CMD_XMIT_BCAST_CX:
107 case CMD_ELS_REQUEST_CR:
108 case CMD_ELS_REQUEST_CX:
109 case CMD_CREATE_XRI_CR:
110 case CMD_CREATE_XRI_CX:
111 case CMD_GET_RPI_CN:
112 case CMD_XMIT_ELS_RSP_CX:
113 case CMD_GET_RPI_CR:
114 case CMD_FCP_IWRITE_CR:
115 case CMD_FCP_IWRITE_CX:
116 case CMD_FCP_IREAD_CR:
117 case CMD_FCP_IREAD_CX:
118 case CMD_FCP_ICMND_CR:
119 case CMD_FCP_ICMND_CX:
120 case CMD_ADAPTER_MSG:
121 case CMD_ADAPTER_DUMP:
122 case CMD_XMIT_SEQUENCE64_CR:
123 case CMD_XMIT_SEQUENCE64_CX:
124 case CMD_XMIT_BCAST64_CN:
125 case CMD_XMIT_BCAST64_CX:
126 case CMD_ELS_REQUEST64_CR:
127 case CMD_ELS_REQUEST64_CX:
128 case CMD_FCP_IWRITE64_CR:
129 case CMD_FCP_IWRITE64_CX:
130 case CMD_FCP_IREAD64_CR:
131 case CMD_FCP_IREAD64_CX:
132 case CMD_FCP_ICMND64_CR:
133 case CMD_FCP_ICMND64_CX:
134 case CMD_GEN_REQUEST64_CR:
135 case CMD_GEN_REQUEST64_CX:
136 case CMD_XMIT_ELS_RSP64_CX:
137 type = LPFC_SOL_IOCB;
138 break;
139 case CMD_ABORT_XRI_CN:
140 case CMD_ABORT_XRI_CX:
141 case CMD_CLOSE_XRI_CN:
142 case CMD_CLOSE_XRI_CX:
143 case CMD_XRI_ABORTED_CX:
144 case CMD_ABORT_MXRI64_CN:
145 type = LPFC_ABORT_IOCB;
146 break;
147 case CMD_RCV_SEQUENCE_CX:
148 case CMD_RCV_ELS_REQ_CX:
149 case CMD_RCV_SEQUENCE64_CX:
150 case CMD_RCV_ELS_REQ64_CX:
151 type = LPFC_UNSOL_IOCB;
152 break;
153 default:
154 type = LPFC_UNKNOWN_IOCB;
155 break;
156 }
157
158 return type;
159 }
160
161 static int
162 lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
163 {
164 struct lpfc_sli *psli = &phba->sli;
165 MAILBOX_t *pmbox = &pmb->mb;
166 int i, rc;
167
168 for (i = 0; i < psli->num_rings; i++) {
169 phba->hba_state = LPFC_INIT_MBX_CMDS;
170 lpfc_config_ring(phba, i, pmb);
171 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
172 if (rc != MBX_SUCCESS) {
173 lpfc_printf_log(phba,
174 KERN_ERR,
175 LOG_INIT,
176 "%d:0446 Adapter failed to init, "
177 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
178 "ring %d\n",
179 phba->brd_no,
180 pmbox->mbxCommand,
181 pmbox->mbxStatus,
182 i);
183 phba->hba_state = LPFC_HBA_ERROR;
184 return -ENXIO;
185 }
186 }
187 return 0;
188 }
189
190 static int
191 lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
192 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
193 {
194 uint16_t iotag;
195
196 list_add_tail(&piocb->list, &pring->txcmplq);
197 pring->txcmplq_cnt++;
198 if (unlikely(pring->ringno == LPFC_ELS_RING))
199 mod_timer(&phba->els_tmofunc,
200 jiffies + HZ * (phba->fc_ratov << 1));
201
202 if (pring->fast_lookup) {
203 /* Setup fast lookup based on iotag for completion */
204 iotag = piocb->iocb.ulpIoTag;
205 if (iotag && (iotag < pring->fast_iotag))
206 *(pring->fast_lookup + iotag) = piocb;
207 else {
208
209 /* Cmd ring <ringno> put: iotag <iotag> greater then
210 configured max <fast_iotag> wd0 <icmd> */
211 lpfc_printf_log(phba,
212 KERN_ERR,
213 LOG_SLI,
214 "%d:0316 Cmd ring %d put: iotag x%x "
215 "greater then configured max x%x "
216 "wd0 x%x\n",
217 phba->brd_no,
218 pring->ringno, iotag,
219 pring->fast_iotag,
220 *(((uint32_t *)(&piocb->iocb)) + 7));
221 }
222 }
223 return (0);
224 }
225
226 static struct lpfc_iocbq *
227 lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
228 {
229 struct list_head *dlp;
230 struct lpfc_iocbq *cmd_iocb;
231
232 dlp = &pring->txq;
233 cmd_iocb = NULL;
234 list_remove_head((&pring->txq), cmd_iocb,
235 struct lpfc_iocbq,
236 list);
237 if (cmd_iocb) {
238 /* If the first ptr is not equal to the list header,
239 * deque the IOCBQ_t and return it.
240 */
241 pring->txq_cnt--;
242 }
243 return (cmd_iocb);
244 }
245
246 static IOCB_t *
247 lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
248 {
249 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
250 uint32_t max_cmd_idx = pring->numCiocb;
251 IOCB_t *iocb = NULL;
252
253 if ((pring->next_cmdidx == pring->cmdidx) &&
254 (++pring->next_cmdidx >= max_cmd_idx))
255 pring->next_cmdidx = 0;
256
257 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
258
259 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
260
261 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
262 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
263 "%d:0315 Ring %d issue: portCmdGet %d "
264 "is bigger then cmd ring %d\n",
265 phba->brd_no, pring->ringno,
266 pring->local_getidx, max_cmd_idx);
267
268 phba->hba_state = LPFC_HBA_ERROR;
269 /*
270 * All error attention handlers are posted to
271 * worker thread
272 */
273 phba->work_ha |= HA_ERATT;
274 phba->work_hs = HS_FFER3;
275 if (phba->work_wait)
276 wake_up(phba->work_wait);
277
278 return NULL;
279 }
280
281 if (pring->local_getidx == pring->next_cmdidx)
282 return NULL;
283 }
284
285 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
286
287 return iocb;
288 }
289
290 uint16_t
291 lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
292 {
293 struct lpfc_iocbq ** new_arr;
294 struct lpfc_iocbq ** old_arr;
295 size_t new_len;
296 struct lpfc_sli *psli = &phba->sli;
297 uint16_t iotag;
298
299 spin_lock_irq(phba->host->host_lock);
300 iotag = psli->last_iotag;
301 if(++iotag < psli->iocbq_lookup_len) {
302 psli->last_iotag = iotag;
303 psli->iocbq_lookup[iotag] = iocbq;
304 spin_unlock_irq(phba->host->host_lock);
305 iocbq->iotag = iotag;
306 return iotag;
307 }
308 else if (psli->iocbq_lookup_len < (0xffff
309 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
310 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
311 spin_unlock_irq(phba->host->host_lock);
312 new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
313 GFP_KERNEL);
314 if (new_arr) {
315 memset((char *)new_arr, 0,
316 new_len * sizeof (struct lpfc_iocbq *));
317 spin_lock_irq(phba->host->host_lock);
318 old_arr = psli->iocbq_lookup;
319 if (new_len <= psli->iocbq_lookup_len) {
320 /* highly unprobable case */
321 kfree(new_arr);
322 iotag = psli->last_iotag;
323 if(++iotag < psli->iocbq_lookup_len) {
324 psli->last_iotag = iotag;
325 psli->iocbq_lookup[iotag] = iocbq;
326 spin_unlock_irq(phba->host->host_lock);
327 iocbq->iotag = iotag;
328 return iotag;
329 }
330 spin_unlock_irq(phba->host->host_lock);
331 return 0;
332 }
333 if (psli->iocbq_lookup)
334 memcpy(new_arr, old_arr,
335 ((psli->last_iotag + 1) *
336 sizeof (struct lpfc_iocbq *)));
337 psli->iocbq_lookup = new_arr;
338 psli->iocbq_lookup_len = new_len;
339 psli->last_iotag = iotag;
340 psli->iocbq_lookup[iotag] = iocbq;
341 spin_unlock_irq(phba->host->host_lock);
342 iocbq->iotag = iotag;
343 kfree(old_arr);
344 return iotag;
345 }
346 }
347
348 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
349 "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
350 phba->brd_no, psli->last_iotag);
351
352 return 0;
353 }
354
355 static void
356 lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
357 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
358 {
359 /*
360 * Set up an iotag
361 */
362 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
363
364 /*
365 * Issue iocb command to adapter
366 */
367 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
368 wmb();
369 pring->stats.iocb_cmd++;
370
371 /*
372 * If there is no completion routine to call, we can release the
373 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
374 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
375 */
376 if (nextiocb->iocb_cmpl)
377 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
378 else
379 lpfc_sli_release_iocbq(phba, nextiocb);
380
381 /*
382 * Let the HBA know what IOCB slot will be the next one the
383 * driver will put a command into.
384 */
385 pring->cmdidx = pring->next_cmdidx;
386 writel(pring->cmdidx, phba->MBslimaddr
387 + (SLIMOFF + (pring->ringno * 2)) * 4);
388 }
389
390 static void
391 lpfc_sli_update_full_ring(struct lpfc_hba * phba,
392 struct lpfc_sli_ring *pring)
393 {
394 int ringno = pring->ringno;
395
396 pring->flag |= LPFC_CALL_RING_AVAILABLE;
397
398 wmb();
399
400 /*
401 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
402 * The HBA will tell us when an IOCB entry is available.
403 */
404 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
405 readl(phba->CAregaddr); /* flush */
406
407 pring->stats.iocb_cmd_full++;
408 }
409
410 static void
411 lpfc_sli_update_ring(struct lpfc_hba * phba,
412 struct lpfc_sli_ring *pring)
413 {
414 int ringno = pring->ringno;
415
416 /*
417 * Tell the HBA that there is work to do in this ring.
418 */
419 wmb();
420 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
421 readl(phba->CAregaddr); /* flush */
422 }
423
424 static void
425 lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
426 {
427 IOCB_t *iocb;
428 struct lpfc_iocbq *nextiocb;
429
430 /*
431 * Check to see if:
432 * (a) there is anything on the txq to send
433 * (b) link is up
434 * (c) link attention events can be processed (fcp ring only)
435 * (d) IOCB processing is not blocked by the outstanding mbox command.
436 */
437 if (pring->txq_cnt &&
438 (phba->hba_state > LPFC_LINK_DOWN) &&
439 (pring->ringno != phba->sli.fcp_ring ||
440 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
441 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
442
443 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
444 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
445 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
446
447 if (iocb)
448 lpfc_sli_update_ring(phba, pring);
449 else
450 lpfc_sli_update_full_ring(phba, pring);
451 }
452
453 return;
454 }
455
456 /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
457 static void
458 lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
459 {
460 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
461
462 /* If the ring is active, flag it */
463 if (phba->sli.ring[ringno].cmdringaddr) {
464 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
465 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
466 /*
467 * Force update of the local copy of cmdGetInx
468 */
469 phba->sli.ring[ringno].local_getidx
470 = le32_to_cpu(pgp->cmdGetInx);
471 spin_lock_irq(phba->host->host_lock);
472 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
473 spin_unlock_irq(phba->host->host_lock);
474 }
475 }
476 }
477
478 static int
479 lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
480 {
481 uint8_t ret;
482
483 switch (mbxCommand) {
484 case MBX_LOAD_SM:
485 case MBX_READ_NV:
486 case MBX_WRITE_NV:
487 case MBX_RUN_BIU_DIAG:
488 case MBX_INIT_LINK:
489 case MBX_DOWN_LINK:
490 case MBX_CONFIG_LINK:
491 case MBX_CONFIG_RING:
492 case MBX_RESET_RING:
493 case MBX_READ_CONFIG:
494 case MBX_READ_RCONFIG:
495 case MBX_READ_SPARM:
496 case MBX_READ_STATUS:
497 case MBX_READ_RPI:
498 case MBX_READ_XRI:
499 case MBX_READ_REV:
500 case MBX_READ_LNK_STAT:
501 case MBX_REG_LOGIN:
502 case MBX_UNREG_LOGIN:
503 case MBX_READ_LA:
504 case MBX_CLEAR_LA:
505 case MBX_DUMP_MEMORY:
506 case MBX_DUMP_CONTEXT:
507 case MBX_RUN_DIAGS:
508 case MBX_RESTART:
509 case MBX_UPDATE_CFG:
510 case MBX_DOWN_LOAD:
511 case MBX_DEL_LD_ENTRY:
512 case MBX_RUN_PROGRAM:
513 case MBX_SET_MASK:
514 case MBX_SET_SLIM:
515 case MBX_UNREG_D_ID:
516 case MBX_CONFIG_FARP:
517 case MBX_LOAD_AREA:
518 case MBX_RUN_BIU_DIAG64:
519 case MBX_CONFIG_PORT:
520 case MBX_READ_SPARM64:
521 case MBX_READ_RPI64:
522 case MBX_REG_LOGIN64:
523 case MBX_READ_LA64:
524 case MBX_FLASH_WR_ULA:
525 case MBX_SET_DEBUG:
526 case MBX_LOAD_EXP_ROM:
527 ret = mbxCommand;
528 break;
529 default:
530 ret = MBX_SHUTDOWN;
531 break;
532 }
533 return (ret);
534 }
535 static void
536 lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
537 {
538 wait_queue_head_t *pdone_q;
539
540 /*
541 * If pdone_q is empty, the driver thread gave up waiting and
542 * continued running.
543 */
544 pdone_q = (wait_queue_head_t *) pmboxq->context1;
545 if (pdone_q)
546 wake_up_interruptible(pdone_q);
547 return;
548 }
549
550 void
551 lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
552 {
553 struct lpfc_dmabuf *mp;
554 mp = (struct lpfc_dmabuf *) (pmb->context1);
555 if (mp) {
556 lpfc_mbuf_free(phba, mp->virt, mp->phys);
557 kfree(mp);
558 }
559 mempool_free( pmb, phba->mbox_mem_pool);
560 return;
561 }
562
563 int
564 lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
565 {
566 MAILBOX_t *mbox;
567 MAILBOX_t *pmbox;
568 LPFC_MBOXQ_t *pmb;
569 struct lpfc_sli *psli;
570 int i, rc;
571 uint32_t process_next;
572
573 psli = &phba->sli;
574 /* We should only get here if we are in SLI2 mode */
575 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
576 return (1);
577 }
578
579 phba->sli.slistat.mbox_event++;
580
581 /* Get a Mailbox buffer to setup mailbox commands for callback */
582 if ((pmb = phba->sli.mbox_active)) {
583 pmbox = &pmb->mb;
584 mbox = &phba->slim2p->mbx;
585
586 /* First check out the status word */
587 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
588
589 /* Sanity check to ensure the host owns the mailbox */
590 if (pmbox->mbxOwner != OWN_HOST) {
591 /* Lets try for a while */
592 for (i = 0; i < 10240; i++) {
593 /* First copy command data */
594 lpfc_sli_pcimem_bcopy(mbox, pmbox,
595 sizeof (uint32_t));
596 if (pmbox->mbxOwner == OWN_HOST)
597 goto mbout;
598 }
599 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
600 <status> */
601 lpfc_printf_log(phba,
602 KERN_ERR,
603 LOG_MBOX | LOG_SLI,
604 "%d:0304 Stray Mailbox Interrupt "
605 "mbxCommand x%x mbxStatus x%x\n",
606 phba->brd_no,
607 pmbox->mbxCommand,
608 pmbox->mbxStatus);
609
610 spin_lock_irq(phba->host->host_lock);
611 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
612 spin_unlock_irq(phba->host->host_lock);
613 return (1);
614 }
615
616 mbout:
617 del_timer_sync(&phba->sli.mbox_tmo);
618 phba->work_hba_events &= ~WORKER_MBOX_TMO;
619
620 /*
621 * It is a fatal error if unknown mbox command completion.
622 */
623 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
624 MBX_SHUTDOWN) {
625
626 /* Unknow mailbox command compl */
627 lpfc_printf_log(phba,
628 KERN_ERR,
629 LOG_MBOX | LOG_SLI,
630 "%d:0323 Unknown Mailbox command %x Cmpl\n",
631 phba->brd_no,
632 pmbox->mbxCommand);
633 phba->hba_state = LPFC_HBA_ERROR;
634 phba->work_hs = HS_FFER3;
635 lpfc_handle_eratt(phba);
636 return (0);
637 }
638
639 phba->sli.mbox_active = NULL;
640 if (pmbox->mbxStatus) {
641 phba->sli.slistat.mbox_stat_err++;
642 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
643 /* Mbox cmd cmpl error - RETRYing */
644 lpfc_printf_log(phba,
645 KERN_INFO,
646 LOG_MBOX | LOG_SLI,
647 "%d:0305 Mbox cmd cmpl error - "
648 "RETRYing Data: x%x x%x x%x x%x\n",
649 phba->brd_no,
650 pmbox->mbxCommand,
651 pmbox->mbxStatus,
652 pmbox->un.varWords[0],
653 phba->hba_state);
654 pmbox->mbxStatus = 0;
655 pmbox->mbxOwner = OWN_HOST;
656 spin_lock_irq(phba->host->host_lock);
657 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
658 spin_unlock_irq(phba->host->host_lock);
659 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
660 if (rc == MBX_SUCCESS)
661 return (0);
662 }
663 }
664
665 /* Mailbox cmd <cmd> Cmpl <cmpl> */
666 lpfc_printf_log(phba,
667 KERN_INFO,
668 LOG_MBOX | LOG_SLI,
669 "%d:0307 Mailbox cmd x%x Cmpl x%p "
670 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
671 phba->brd_no,
672 pmbox->mbxCommand,
673 pmb->mbox_cmpl,
674 *((uint32_t *) pmbox),
675 pmbox->un.varWords[0],
676 pmbox->un.varWords[1],
677 pmbox->un.varWords[2],
678 pmbox->un.varWords[3],
679 pmbox->un.varWords[4],
680 pmbox->un.varWords[5],
681 pmbox->un.varWords[6],
682 pmbox->un.varWords[7]);
683
684 if (pmb->mbox_cmpl) {
685 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
686 pmb->mbox_cmpl(phba,pmb);
687 }
688 }
689
690
691 do {
692 process_next = 0; /* by default don't loop */
693 spin_lock_irq(phba->host->host_lock);
694 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
695
696 /* Process next mailbox command if there is one */
697 if ((pmb = lpfc_mbox_get(phba))) {
698 spin_unlock_irq(phba->host->host_lock);
699 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
700 if (rc == MBX_NOT_FINISHED) {
701 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
702 pmb->mbox_cmpl(phba,pmb);
703 process_next = 1;
704 continue; /* loop back */
705 }
706 } else {
707 spin_unlock_irq(phba->host->host_lock);
708 /* Turn on IOCB processing */
709 for (i = 0; i < phba->sli.num_rings; i++) {
710 lpfc_sli_turn_on_ring(phba, i);
711 }
712
713 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
714 while (!list_empty(&phba->freebufList)) {
715 struct lpfc_dmabuf *mp;
716
717 mp = NULL;
718 list_remove_head((&phba->freebufList),
719 mp,
720 struct lpfc_dmabuf,
721 list);
722 if (mp) {
723 lpfc_mbuf_free(phba, mp->virt,
724 mp->phys);
725 kfree(mp);
726 }
727 }
728 }
729
730 } while (process_next);
731
732 return (0);
733 }
734 static int
735 lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
736 struct lpfc_iocbq *saveq)
737 {
738 IOCB_t * irsp;
739 WORD5 * w5p;
740 uint32_t Rctl, Type;
741 uint32_t match, i;
742
743 match = 0;
744 irsp = &(saveq->iocb);
745 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
746 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
747 Rctl = FC_ELS_REQ;
748 Type = FC_ELS_DATA;
749 } else {
750 w5p =
751 (WORD5 *) & (saveq->iocb.un.
752 ulpWord[5]);
753 Rctl = w5p->hcsw.Rctl;
754 Type = w5p->hcsw.Type;
755
756 /* Firmware Workaround */
757 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
758 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
759 Rctl = FC_ELS_REQ;
760 Type = FC_ELS_DATA;
761 w5p->hcsw.Rctl = Rctl;
762 w5p->hcsw.Type = Type;
763 }
764 }
765 /* unSolicited Responses */
766 if (pring->prt[0].profile) {
767 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
768 match = 1;
769 } else {
770 /* We must search, based on rctl / type
771 for the right routine */
772 for (i = 0; i < pring->num_mask;
773 i++) {
774 if ((pring->prt[i].rctl ==
775 Rctl)
776 && (pring->prt[i].
777 type == Type)) {
778 (pring->prt[i].lpfc_sli_rcv_unsol_event)
779 (phba, pring, saveq);
780 match = 1;
781 break;
782 }
783 }
784 }
785 if (match == 0) {
786 /* Unexpected Rctl / Type received */
787 /* Ring <ringno> handler: unexpected
788 Rctl <Rctl> Type <Type> received */
789 lpfc_printf_log(phba,
790 KERN_WARNING,
791 LOG_SLI,
792 "%d:0313 Ring %d handler: unexpected Rctl x%x "
793 "Type x%x received \n",
794 phba->brd_no,
795 pring->ringno,
796 Rctl,
797 Type);
798 }
799 return(1);
800 }
801
802 static struct lpfc_iocbq *
803 lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
804 struct lpfc_sli_ring * pring,
805 struct lpfc_iocbq * prspiocb)
806 {
807 struct lpfc_iocbq *cmd_iocb = NULL;
808 uint16_t iotag;
809
810 iotag = prspiocb->iocb.ulpIoTag;
811
812 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
813 cmd_iocb = phba->sli.iocbq_lookup[iotag];
814 list_del(&cmd_iocb->list);
815 pring->txcmplq_cnt--;
816 return cmd_iocb;
817 }
818
819 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
820 "%d:0317 iotag x%x is out off "
821 "range: max iotag x%x wd0 x%x\n",
822 phba->brd_no, iotag,
823 phba->sli.last_iotag,
824 *(((uint32_t *) &prspiocb->iocb) + 7));
825 return NULL;
826 }
827
828 static int
829 lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
830 struct lpfc_iocbq *saveq)
831 {
832 struct lpfc_iocbq * cmdiocbp;
833 int rc = 1;
834 unsigned long iflag;
835
836 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
837 spin_lock_irqsave(phba->host->host_lock, iflag);
838 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
839 if (cmdiocbp) {
840 if (cmdiocbp->iocb_cmpl) {
841 /*
842 * Post all ELS completions to the worker thread.
843 * All other are passed to the completion callback.
844 */
845 if (pring->ringno == LPFC_ELS_RING) {
846 spin_unlock_irqrestore(phba->host->host_lock,
847 iflag);
848 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
849 spin_lock_irqsave(phba->host->host_lock, iflag);
850 }
851 else {
852 spin_unlock_irqrestore(phba->host->host_lock,
853 iflag);
854 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
855 spin_lock_irqsave(phba->host->host_lock, iflag);
856 }
857 } else
858 lpfc_sli_release_iocbq(phba, cmdiocbp);
859 } else {
860 /*
861 * Unknown initiating command based on the response iotag.
862 * This could be the case on the ELS ring because of
863 * lpfc_els_abort().
864 */
865 if (pring->ringno != LPFC_ELS_RING) {
866 /*
867 * Ring <ringno> handler: unexpected completion IoTag
868 * <IoTag>
869 */
870 lpfc_printf_log(phba,
871 KERN_WARNING,
872 LOG_SLI,
873 "%d:0322 Ring %d handler: unexpected "
874 "completion IoTag x%x Data: x%x x%x x%x x%x\n",
875 phba->brd_no,
876 pring->ringno,
877 saveq->iocb.ulpIoTag,
878 saveq->iocb.ulpStatus,
879 saveq->iocb.un.ulpWord[4],
880 saveq->iocb.ulpCommand,
881 saveq->iocb.ulpContext);
882 }
883 }
884
885 spin_unlock_irqrestore(phba->host->host_lock, iflag);
886 return rc;
887 }
888
889 /*
890 * This routine presumes LPFC_FCP_RING handling and doesn't bother
891 * to check it explicitly.
892 */
893 static int
894 lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
895 struct lpfc_sli_ring * pring, uint32_t mask)
896 {
897 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
898 IOCB_t *irsp = NULL;
899 IOCB_t *entry = NULL;
900 struct lpfc_iocbq *cmdiocbq = NULL;
901 struct lpfc_iocbq rspiocbq;
902 uint32_t status;
903 uint32_t portRspPut, portRspMax;
904 int rc = 1;
905 lpfc_iocb_type type;
906 unsigned long iflag;
907 uint32_t rsp_cmpl = 0;
908 void __iomem *to_slim;
909
910 spin_lock_irqsave(phba->host->host_lock, iflag);
911 pring->stats.iocb_event++;
912
913 /*
914 * The next available response entry should never exceed the maximum
915 * entries. If it does, treat it as an adapter hardware error.
916 */
917 portRspMax = pring->numRiocb;
918 portRspPut = le32_to_cpu(pgp->rspPutInx);
919 if (unlikely(portRspPut >= portRspMax)) {
920 /*
921 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
922 * rsp ring <portRspMax>
923 */
924 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
925 "%d:0312 Ring %d handler: portRspPut %d "
926 "is bigger then rsp ring %d\n",
927 phba->brd_no, pring->ringno, portRspPut,
928 portRspMax);
929
930 phba->hba_state = LPFC_HBA_ERROR;
931
932 /* All error attention handlers are posted to worker thread */
933 phba->work_ha |= HA_ERATT;
934 phba->work_hs = HS_FFER3;
935 if (phba->work_wait)
936 wake_up(phba->work_wait);
937
938 spin_unlock_irqrestore(phba->host->host_lock, iflag);
939 return 1;
940 }
941
942 rmb();
943 while (pring->rspidx != portRspPut) {
944 /*
945 * Fetch an entry off the ring and copy it into a local data
946 * structure. The copy involves a byte-swap since the
947 * network byte order and pci byte orders are different.
948 */
949 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
950 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
951 (uint32_t *) &rspiocbq.iocb,
952 sizeof (IOCB_t));
953 irsp = &rspiocbq.iocb;
954
955 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
956 pring->stats.iocb_rsp++;
957 rsp_cmpl++;
958
959 if (unlikely(irsp->ulpStatus)) {
960 /* Rsp ring <ringno> error: IOCB */
961 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
962 "%d:0326 Rsp Ring %d error: IOCB Data: "
963 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
964 phba->brd_no, pring->ringno,
965 irsp->un.ulpWord[0], irsp->un.ulpWord[1],
966 irsp->un.ulpWord[2], irsp->un.ulpWord[3],
967 irsp->un.ulpWord[4], irsp->un.ulpWord[5],
968 *(((uint32_t *) irsp) + 6),
969 *(((uint32_t *) irsp) + 7));
970 }
971
972 switch (type) {
973 case LPFC_ABORT_IOCB:
974 case LPFC_SOL_IOCB:
975 /*
976 * Idle exchange closed via ABTS from port. No iocb
977 * resources need to be recovered.
978 */
979 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
980 printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
981 "Skipping completion\n", __FUNCTION__,
982 irsp->ulpCommand);
983 break;
984 }
985
986 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
987 &rspiocbq);
988 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
989 spin_unlock_irqrestore(
990 phba->host->host_lock, iflag);
991 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
992 &rspiocbq);
993 spin_lock_irqsave(phba->host->host_lock,
994 iflag);
995 }
996 break;
997 default:
998 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
999 char adaptermsg[LPFC_MAX_ADPTMSG];
1000 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1001 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1002 MAX_MSG_DATA);
1003 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
1004 phba->brd_no, adaptermsg);
1005 } else {
1006 /* Unknown IOCB command */
1007 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1008 "%d:0321 Unknown IOCB command "
1009 "Data: x%x, x%x x%x x%x x%x\n",
1010 phba->brd_no, type, irsp->ulpCommand,
1011 irsp->ulpStatus, irsp->ulpIoTag,
1012 irsp->ulpContext);
1013 }
1014 break;
1015 }
1016
1017 /*
1018 * The response IOCB has been processed. Update the ring
1019 * pointer in SLIM. If the port response put pointer has not
1020 * been updated, sync the pgp->rspPutInx and fetch the new port
1021 * response put pointer.
1022 */
1023 if (++pring->rspidx >= portRspMax)
1024 pring->rspidx = 0;
1025
1026 to_slim = phba->MBslimaddr +
1027 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
1028 writel(pring->rspidx, to_slim);
1029
1030 if (pring->rspidx == portRspPut)
1031 portRspPut = le32_to_cpu(pgp->rspPutInx);
1032 }
1033
1034 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1035 pring->stats.iocb_rsp_full++;
1036 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1037 writel(status, phba->CAregaddr);
1038 readl(phba->CAregaddr);
1039 }
1040 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1041 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1042 pring->stats.iocb_cmd_empty++;
1043
1044 /* Force update of the local copy of cmdGetInx */
1045 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1046 lpfc_sli_resume_iocb(phba, pring);
1047
1048 if ((pring->lpfc_sli_cmd_available))
1049 (pring->lpfc_sli_cmd_available) (phba, pring);
1050
1051 }
1052
1053 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1054 return rc;
1055 }
1056
1057
1058 int
1059 lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
1060 struct lpfc_sli_ring * pring, uint32_t mask)
1061 {
1062 IOCB_t *entry;
1063 IOCB_t *irsp = NULL;
1064 struct lpfc_iocbq *rspiocbp = NULL;
1065 struct lpfc_iocbq *next_iocb;
1066 struct lpfc_iocbq *cmdiocbp;
1067 struct lpfc_iocbq *saveq;
1068 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
1069 uint8_t iocb_cmd_type;
1070 lpfc_iocb_type type;
1071 uint32_t status, free_saveq;
1072 uint32_t portRspPut, portRspMax;
1073 int rc = 1;
1074 unsigned long iflag;
1075 void __iomem *to_slim;
1076
1077 spin_lock_irqsave(phba->host->host_lock, iflag);
1078 pring->stats.iocb_event++;
1079
1080 /*
1081 * The next available response entry should never exceed the maximum
1082 * entries. If it does, treat it as an adapter hardware error.
1083 */
1084 portRspMax = pring->numRiocb;
1085 portRspPut = le32_to_cpu(pgp->rspPutInx);
1086 if (portRspPut >= portRspMax) {
1087 /*
1088 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1089 * rsp ring <portRspMax>
1090 */
1091 lpfc_printf_log(phba,
1092 KERN_ERR,
1093 LOG_SLI,
1094 "%d:0312 Ring %d handler: portRspPut %d "
1095 "is bigger then rsp ring %d\n",
1096 phba->brd_no,
1097 pring->ringno, portRspPut, portRspMax);
1098
1099 phba->hba_state = LPFC_HBA_ERROR;
1100 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1101
1102 phba->work_hs = HS_FFER3;
1103 lpfc_handle_eratt(phba);
1104
1105 return 1;
1106 }
1107
1108 rmb();
1109 while (pring->rspidx != portRspPut) {
1110 /*
1111 * Build a completion list and call the appropriate handler.
1112 * The process is to get the next available response iocb, get
1113 * a free iocb from the list, copy the response data into the
1114 * free iocb, insert to the continuation list, and update the
1115 * next response index to slim. This process makes response
1116 * iocb's in the ring available to DMA as fast as possible but
1117 * pays a penalty for a copy operation. Since the iocb is
1118 * only 32 bytes, this penalty is considered small relative to
1119 * the PCI reads for register values and a slim write. When
1120 * the ulpLe field is set, the entire Command has been
1121 * received.
1122 */
1123 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
1124 rspiocbp = lpfc_sli_get_iocbq(phba);
1125 if (rspiocbp == NULL) {
1126 printk(KERN_ERR "%s: out of buffers! Failing "
1127 "completion.\n", __FUNCTION__);
1128 break;
1129 }
1130
1131 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
1132 irsp = &rspiocbp->iocb;
1133
1134 if (++pring->rspidx >= portRspMax)
1135 pring->rspidx = 0;
1136
1137 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
1138 + 1) * 4;
1139 writel(pring->rspidx, to_slim);
1140
1141 if (list_empty(&(pring->iocb_continueq))) {
1142 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1143 } else {
1144 list_add_tail(&rspiocbp->list,
1145 &(pring->iocb_continueq));
1146 }
1147
1148 pring->iocb_continueq_cnt++;
1149 if (irsp->ulpLe) {
1150 /*
1151 * By default, the driver expects to free all resources
1152 * associated with this iocb completion.
1153 */
1154 free_saveq = 1;
1155 saveq = list_get_first(&pring->iocb_continueq,
1156 struct lpfc_iocbq, list);
1157 irsp = &(saveq->iocb);
1158 list_del_init(&pring->iocb_continueq);
1159 pring->iocb_continueq_cnt = 0;
1160
1161 pring->stats.iocb_rsp++;
1162
1163 if (irsp->ulpStatus) {
1164 /* Rsp ring <ringno> error: IOCB */
1165 lpfc_printf_log(phba,
1166 KERN_WARNING,
1167 LOG_SLI,
1168 "%d:0328 Rsp Ring %d error: IOCB Data: "
1169 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1170 phba->brd_no,
1171 pring->ringno,
1172 irsp->un.ulpWord[0],
1173 irsp->un.ulpWord[1],
1174 irsp->un.ulpWord[2],
1175 irsp->un.ulpWord[3],
1176 irsp->un.ulpWord[4],
1177 irsp->un.ulpWord[5],
1178 *(((uint32_t *) irsp) + 6),
1179 *(((uint32_t *) irsp) + 7));
1180 }
1181
1182 /*
1183 * Fetch the IOCB command type and call the correct
1184 * completion routine. Solicited and Unsolicited
1185 * IOCBs on the ELS ring get freed back to the
1186 * lpfc_iocb_list by the discovery kernel thread.
1187 */
1188 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1189 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1190 if (type == LPFC_SOL_IOCB) {
1191 spin_unlock_irqrestore(phba->host->host_lock,
1192 iflag);
1193 rc = lpfc_sli_process_sol_iocb(phba, pring,
1194 saveq);
1195 spin_lock_irqsave(phba->host->host_lock, iflag);
1196 } else if (type == LPFC_UNSOL_IOCB) {
1197 spin_unlock_irqrestore(phba->host->host_lock,
1198 iflag);
1199 rc = lpfc_sli_process_unsol_iocb(phba, pring,
1200 saveq);
1201 spin_lock_irqsave(phba->host->host_lock, iflag);
1202 } else if (type == LPFC_ABORT_IOCB) {
1203 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1204 ((cmdiocbp =
1205 lpfc_sli_iocbq_lookup(phba, pring,
1206 saveq)))) {
1207 /* Call the specified completion
1208 routine */
1209 if (cmdiocbp->iocb_cmpl) {
1210 spin_unlock_irqrestore(
1211 phba->host->host_lock,
1212 iflag);
1213 (cmdiocbp->iocb_cmpl) (phba,
1214 cmdiocbp, saveq);
1215 spin_lock_irqsave(
1216 phba->host->host_lock,
1217 iflag);
1218 } else
1219 lpfc_sli_release_iocbq(phba,
1220 cmdiocbp);
1221 }
1222 } else if (type == LPFC_UNKNOWN_IOCB) {
1223 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1224
1225 char adaptermsg[LPFC_MAX_ADPTMSG];
1226
1227 memset(adaptermsg, 0,
1228 LPFC_MAX_ADPTMSG);
1229 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1230 MAX_MSG_DATA);
1231 dev_warn(&((phba->pcidev)->dev),
1232 "lpfc%d: %s",
1233 phba->brd_no, adaptermsg);
1234 } else {
1235 /* Unknown IOCB command */
1236 lpfc_printf_log(phba,
1237 KERN_ERR,
1238 LOG_SLI,
1239 "%d:0321 Unknown IOCB command "
1240 "Data: x%x x%x x%x x%x\n",
1241 phba->brd_no,
1242 irsp->ulpCommand,
1243 irsp->ulpStatus,
1244 irsp->ulpIoTag,
1245 irsp->ulpContext);
1246 }
1247 }
1248
1249 if (free_saveq) {
1250 if (!list_empty(&saveq->list)) {
1251 list_for_each_entry_safe(rspiocbp,
1252 next_iocb,
1253 &saveq->list,
1254 list) {
1255 lpfc_sli_release_iocbq(phba,
1256 rspiocbp);
1257 }
1258 }
1259
1260 lpfc_sli_release_iocbq(phba, saveq);
1261 }
1262 }
1263
1264 /*
1265 * If the port response put pointer has not been updated, sync
1266 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1267 * response put pointer.
1268 */
1269 if (pring->rspidx == portRspPut) {
1270 portRspPut = le32_to_cpu(pgp->rspPutInx);
1271 }
1272 } /* while (pring->rspidx != portRspPut) */
1273
1274 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
1275 /* At least one response entry has been freed */
1276 pring->stats.iocb_rsp_full++;
1277 /* SET RxRE_RSP in Chip Att register */
1278 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1279 writel(status, phba->CAregaddr);
1280 readl(phba->CAregaddr); /* flush */
1281 }
1282 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1283 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1284 pring->stats.iocb_cmd_empty++;
1285
1286 /* Force update of the local copy of cmdGetInx */
1287 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1288 lpfc_sli_resume_iocb(phba, pring);
1289
1290 if ((pring->lpfc_sli_cmd_available))
1291 (pring->lpfc_sli_cmd_available) (phba, pring);
1292
1293 }
1294
1295 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1296 return rc;
1297 }
1298
1299 int
1300 lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1301 {
1302 struct lpfc_iocbq *iocb, *next_iocb;
1303 IOCB_t *icmd = NULL, *cmd = NULL;
1304 int errcnt;
1305
1306 errcnt = 0;
1307
1308 /* Error everything on txq and txcmplq
1309 * First do the txq.
1310 */
1311 spin_lock_irq(phba->host->host_lock);
1312 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
1313 list_del_init(&iocb->list);
1314 if (iocb->iocb_cmpl) {
1315 icmd = &iocb->iocb;
1316 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1317 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1318 spin_unlock_irq(phba->host->host_lock);
1319 (iocb->iocb_cmpl) (phba, iocb, iocb);
1320 spin_lock_irq(phba->host->host_lock);
1321 } else
1322 lpfc_sli_release_iocbq(phba, iocb);
1323 }
1324 pring->txq_cnt = 0;
1325 INIT_LIST_HEAD(&(pring->txq));
1326
1327 /* Next issue ABTS for everything on the txcmplq */
1328 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
1329 cmd = &iocb->iocb;
1330
1331 /*
1332 * Imediate abort of IOCB, deque and call compl
1333 */
1334
1335 list_del_init(&iocb->list);
1336 pring->txcmplq_cnt--;
1337
1338 if (iocb->iocb_cmpl) {
1339 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1340 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1341 spin_unlock_irq(phba->host->host_lock);
1342 (iocb->iocb_cmpl) (phba, iocb, iocb);
1343 spin_lock_irq(phba->host->host_lock);
1344 } else
1345 lpfc_sli_release_iocbq(phba, iocb);
1346 }
1347
1348 INIT_LIST_HEAD(&pring->txcmplq);
1349 pring->txcmplq_cnt = 0;
1350 spin_unlock_irq(phba->host->host_lock);
1351
1352 return errcnt;
1353 }
1354
1355 /******************************************************************************
1356 * lpfc_sli_send_reset
1357 *
1358 * Note: After returning from this function, the HBA cannot be accessed for
1359 * 1 ms. Since we do not wish to delay in interrupt context, it is the
1360 * responsibility of the caller to perform the mdelay(1) and flush via readl().
1361 ******************************************************************************/
1362 static int
1363 lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
1364 {
1365 MAILBOX_t *swpmb;
1366 volatile uint32_t word0;
1367 void __iomem *to_slim;
1368 unsigned long flags = 0;
1369
1370 spin_lock_irqsave(phba->host->host_lock, flags);
1371
1372 /* A board reset must use REAL SLIM. */
1373 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1374
1375 word0 = 0;
1376 swpmb = (MAILBOX_t *) & word0;
1377 swpmb->mbxCommand = MBX_RESTART;
1378 swpmb->mbxHc = 1;
1379
1380 to_slim = phba->MBslimaddr;
1381 writel(*(uint32_t *) swpmb, to_slim);
1382 readl(to_slim); /* flush */
1383
1384 /* Only skip post after fc_ffinit is completed */
1385 if (skip_post) {
1386 word0 = 1; /* This is really setting up word1 */
1387 } else {
1388 word0 = 0; /* This is really setting up word1 */
1389 }
1390 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1391 writel(*(uint32_t *) swpmb, to_slim);
1392 readl(to_slim); /* flush */
1393
1394 /* Turn off parity checking and serr during the physical reset */
1395 pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
1396 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1397 (phba->pci_cfg_value &
1398 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1399
1400 writel(HC_INITFF, phba->HCregaddr);
1401
1402 phba->hba_state = LPFC_INIT_START;
1403 spin_unlock_irqrestore(phba->host->host_lock, flags);
1404
1405 return 0;
1406 }
1407
1408 static int
1409 lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
1410 {
1411 struct lpfc_sli_ring *pring;
1412 int i;
1413 struct lpfc_dmabuf *mp, *next_mp;
1414 unsigned long flags = 0;
1415
1416 lpfc_sli_send_reset(phba, skip_post);
1417 mdelay(1);
1418
1419 spin_lock_irqsave(phba->host->host_lock, flags);
1420 /* Risk the write on flush case ie no delay after the readl */
1421 readl(phba->HCregaddr); /* flush */
1422 /* Now toggle INITFF bit set by lpfc_sli_send_reset */
1423 writel(0, phba->HCregaddr);
1424 readl(phba->HCregaddr); /* flush */
1425
1426 /* Restore PCI cmd register */
1427 pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
1428
1429 /* perform board reset */
1430 phba->fc_eventTag = 0;
1431 phba->fc_myDID = 0;
1432 phba->fc_prevDID = Mask_DID;
1433
1434 /* Reset HBA */
1435 lpfc_printf_log(phba,
1436 KERN_INFO,
1437 LOG_SLI,
1438 "%d:0325 Reset HBA Data: x%x x%x x%x\n",
1439 phba->brd_no,
1440 phba->hba_state,
1441 phba->sli.sli_flag,
1442 skip_post);
1443
1444 /* Initialize relevant SLI info */
1445 for (i = 0; i < phba->sli.num_rings; i++) {
1446 pring = &phba->sli.ring[i];
1447 pring->flag = 0;
1448 pring->rspidx = 0;
1449 pring->next_cmdidx = 0;
1450 pring->local_getidx = 0;
1451 pring->cmdidx = 0;
1452 pring->missbufcnt = 0;
1453 }
1454 spin_unlock_irqrestore(phba->host->host_lock, flags);
1455
1456 if (skip_post) {
1457 mdelay(100);
1458 } else {
1459 mdelay(2000);
1460 }
1461
1462 spin_lock_irqsave(phba->host->host_lock, flags);
1463 /* Cleanup preposted buffers on the ELS ring */
1464 pring = &phba->sli.ring[LPFC_ELS_RING];
1465 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
1466 list_del(&mp->list);
1467 pring->postbufq_cnt--;
1468 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1469 kfree(mp);
1470 }
1471 spin_unlock_irqrestore(phba->host->host_lock, flags);
1472
1473 for (i = 0; i < phba->sli.num_rings; i++)
1474 lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
1475
1476 return 0;
1477 }
1478
1479 static int
1480 lpfc_sli_chipset_init(struct lpfc_hba *phba)
1481 {
1482 uint32_t status, i = 0;
1483
1484 /* Read the HBA Host Status Register */
1485 status = readl(phba->HSregaddr);
1486
1487 /* Check status register to see what current state is */
1488 i = 0;
1489 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
1490
1491 /* Check every 100ms for 5 retries, then every 500ms for 5, then
1492 * every 2.5 sec for 5, then reset board and every 2.5 sec for
1493 * 4.
1494 */
1495 if (i++ >= 20) {
1496 /* Adapter failed to init, timeout, status reg
1497 <status> */
1498 lpfc_printf_log(phba,
1499 KERN_ERR,
1500 LOG_INIT,
1501 "%d:0436 Adapter failed to init, "
1502 "timeout, status reg x%x\n",
1503 phba->brd_no,
1504 status);
1505 phba->hba_state = LPFC_HBA_ERROR;
1506 return -ETIMEDOUT;
1507 }
1508
1509 /* Check to see if any errors occurred during init */
1510 if (status & HS_FFERM) {
1511 /* ERROR: During chipset initialization */
1512 /* Adapter failed to init, chipset, status reg
1513 <status> */
1514 lpfc_printf_log(phba,
1515 KERN_ERR,
1516 LOG_INIT,
1517 "%d:0437 Adapter failed to init, "
1518 "chipset, status reg x%x\n",
1519 phba->brd_no,
1520 status);
1521 phba->hba_state = LPFC_HBA_ERROR;
1522 return -EIO;
1523 }
1524
1525 if (i <= 5) {
1526 msleep(10);
1527 } else if (i <= 10) {
1528 msleep(500);
1529 } else {
1530 msleep(2500);
1531 }
1532
1533 if (i == 15) {
1534 lpfc_sli_brdreset(phba, 0);
1535 }
1536 /* Read the HBA Host Status Register */
1537 status = readl(phba->HSregaddr);
1538 }
1539
1540 /* Check to see if any errors occurred during init */
1541 if (status & HS_FFERM) {
1542 /* ERROR: During chipset initialization */
1543 /* Adapter failed to init, chipset, status reg <status> */
1544 lpfc_printf_log(phba,
1545 KERN_ERR,
1546 LOG_INIT,
1547 "%d:0438 Adapter failed to init, chipset, "
1548 "status reg x%x\n",
1549 phba->brd_no,
1550 status);
1551 phba->hba_state = LPFC_HBA_ERROR;
1552 return -EIO;
1553 }
1554
1555 /* Clear all interrupt enable conditions */
1556 writel(0, phba->HCregaddr);
1557 readl(phba->HCregaddr); /* flush */
1558
1559 /* setup host attn register */
1560 writel(0xffffffff, phba->HAregaddr);
1561 readl(phba->HAregaddr); /* flush */
1562 return 0;
1563 }
1564
1565 int
1566 lpfc_sli_hba_setup(struct lpfc_hba * phba)
1567 {
1568 LPFC_MBOXQ_t *pmb;
1569 uint32_t resetcount = 0, rc = 0, done = 0;
1570
1571 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1572 if (!pmb) {
1573 phba->hba_state = LPFC_HBA_ERROR;
1574 return -ENOMEM;
1575 }
1576
1577 while (resetcount < 2 && !done) {
1578 phba->hba_state = 0;
1579 lpfc_sli_brdreset(phba, 0);
1580 msleep(2500);
1581 rc = lpfc_sli_chipset_init(phba);
1582 if (rc)
1583 break;
1584
1585 resetcount++;
1586
1587 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
1588 * means the call was successful. Any other nonzero value is a failure,
1589 * but if ERESTART is returned, the driver may reset the HBA and try
1590 * again.
1591 */
1592 rc = lpfc_config_port_prep(phba);
1593 if (rc == -ERESTART) {
1594 phba->hba_state = 0;
1595 continue;
1596 } else if (rc) {
1597 break;
1598 }
1599
1600 phba->hba_state = LPFC_INIT_MBX_CMDS;
1601 lpfc_config_port(phba, pmb);
1602 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1603 if (rc == MBX_SUCCESS)
1604 done = 1;
1605 else {
1606 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1607 "%d:0442 Adapter failed to init, mbxCmd x%x "
1608 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
1609 phba->brd_no, pmb->mb.mbxCommand,
1610 pmb->mb.mbxStatus, 0);
1611 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1612 }
1613 }
1614 if (!done)
1615 goto lpfc_sli_hba_setup_error;
1616
1617 rc = lpfc_sli_ring_map(phba, pmb);
1618
1619 if (rc)
1620 goto lpfc_sli_hba_setup_error;
1621
1622 phba->sli.sli_flag |= LPFC_PROCESS_LA;
1623
1624 rc = lpfc_config_port_post(phba);
1625 if (rc)
1626 goto lpfc_sli_hba_setup_error;
1627
1628 goto lpfc_sli_hba_setup_exit;
1629 lpfc_sli_hba_setup_error:
1630 phba->hba_state = LPFC_HBA_ERROR;
1631 lpfc_sli_hba_setup_exit:
1632 mempool_free(pmb, phba->mbox_mem_pool);
1633 return rc;
1634 }
1635
1636 static void
1637 lpfc_mbox_abort(struct lpfc_hba * phba)
1638 {
1639 LPFC_MBOXQ_t *pmbox;
1640 MAILBOX_t *mb;
1641
1642 if (phba->sli.mbox_active) {
1643 del_timer_sync(&phba->sli.mbox_tmo);
1644 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1645 pmbox = phba->sli.mbox_active;
1646 mb = &pmbox->mb;
1647 phba->sli.mbox_active = NULL;
1648 if (pmbox->mbox_cmpl) {
1649 mb->mbxStatus = MBX_NOT_FINISHED;
1650 (pmbox->mbox_cmpl) (phba, pmbox);
1651 }
1652 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1653 }
1654
1655 /* Abort all the non active mailbox commands. */
1656 spin_lock_irq(phba->host->host_lock);
1657 pmbox = lpfc_mbox_get(phba);
1658 while (pmbox) {
1659 mb = &pmbox->mb;
1660 if (pmbox->mbox_cmpl) {
1661 mb->mbxStatus = MBX_NOT_FINISHED;
1662 spin_unlock_irq(phba->host->host_lock);
1663 (pmbox->mbox_cmpl) (phba, pmbox);
1664 spin_lock_irq(phba->host->host_lock);
1665 }
1666 pmbox = lpfc_mbox_get(phba);
1667 }
1668 spin_unlock_irq(phba->host->host_lock);
1669 return;
1670 }
1671
1672 /*! lpfc_mbox_timeout
1673 *
1674 * \pre
1675 * \post
1676 * \param hba Pointer to per struct lpfc_hba structure
1677 * \param l1 Pointer to the driver's mailbox queue.
1678 * \return
1679 * void
1680 *
1681 * \b Description:
1682 *
1683 * This routine handles mailbox timeout events at timer interrupt context.
1684 */
1685 void
1686 lpfc_mbox_timeout(unsigned long ptr)
1687 {
1688 struct lpfc_hba *phba;
1689 unsigned long iflag;
1690
1691 phba = (struct lpfc_hba *)ptr;
1692 spin_lock_irqsave(phba->host->host_lock, iflag);
1693 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1694 phba->work_hba_events |= WORKER_MBOX_TMO;
1695 if (phba->work_wait)
1696 wake_up(phba->work_wait);
1697 }
1698 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1699 }
1700
1701 void
1702 lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
1703 {
1704 LPFC_MBOXQ_t *pmbox;
1705 MAILBOX_t *mb;
1706
1707 spin_lock_irq(phba->host->host_lock);
1708 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1709 spin_unlock_irq(phba->host->host_lock);
1710 return;
1711 }
1712
1713 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1714
1715 pmbox = phba->sli.mbox_active;
1716 mb = &pmbox->mb;
1717
1718 /* Mbox cmd <mbxCommand> timeout */
1719 lpfc_printf_log(phba,
1720 KERN_ERR,
1721 LOG_MBOX | LOG_SLI,
1722 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
1723 phba->brd_no,
1724 mb->mbxCommand,
1725 phba->hba_state,
1726 phba->sli.sli_flag,
1727 phba->sli.mbox_active);
1728
1729 phba->sli.mbox_active = NULL;
1730 if (pmbox->mbox_cmpl) {
1731 mb->mbxStatus = MBX_NOT_FINISHED;
1732 spin_unlock_irq(phba->host->host_lock);
1733 (pmbox->mbox_cmpl) (phba, pmbox);
1734 spin_lock_irq(phba->host->host_lock);
1735 }
1736 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1737
1738 spin_unlock_irq(phba->host->host_lock);
1739 lpfc_mbox_abort(phba);
1740 return;
1741 }
1742
1743 int
1744 lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
1745 {
1746 MAILBOX_t *mb;
1747 struct lpfc_sli *psli;
1748 uint32_t status, evtctr;
1749 uint32_t ha_copy;
1750 int i;
1751 unsigned long drvr_flag = 0;
1752 volatile uint32_t word0, ldata;
1753 void __iomem *to_slim;
1754
1755 psli = &phba->sli;
1756
1757 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1758
1759
1760 mb = &pmbox->mb;
1761 status = MBX_SUCCESS;
1762
1763 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
1764 /* Polling for a mbox command when another one is already active
1765 * is not allowed in SLI. Also, the driver must have established
1766 * SLI2 mode to queue and process multiple mbox commands.
1767 */
1768
1769 if (flag & MBX_POLL) {
1770 spin_unlock_irqrestore(phba->host->host_lock,
1771 drvr_flag);
1772
1773 /* Mbox command <mbxCommand> cannot issue */
1774 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1775 return (MBX_NOT_FINISHED);
1776 }
1777
1778 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1779 spin_unlock_irqrestore(phba->host->host_lock,
1780 drvr_flag);
1781 /* Mbox command <mbxCommand> cannot issue */
1782 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1783 return (MBX_NOT_FINISHED);
1784 }
1785
1786 /* Handle STOP IOCB processing flag. This is only meaningful
1787 * if we are not polling for mbox completion.
1788 */
1789 if (flag & MBX_STOP_IOCB) {
1790 flag &= ~MBX_STOP_IOCB;
1791 /* Now flag each ring */
1792 for (i = 0; i < psli->num_rings; i++) {
1793 /* If the ring is active, flag it */
1794 if (psli->ring[i].cmdringaddr) {
1795 psli->ring[i].flag |=
1796 LPFC_STOP_IOCB_MBX;
1797 }
1798 }
1799 }
1800
1801 /* Another mailbox command is still being processed, queue this
1802 * command to be processed later.
1803 */
1804 lpfc_mbox_put(phba, pmbox);
1805
1806 /* Mbox cmd issue - BUSY */
1807 lpfc_printf_log(phba,
1808 KERN_INFO,
1809 LOG_MBOX | LOG_SLI,
1810 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
1811 phba->brd_no,
1812 mb->mbxCommand,
1813 phba->hba_state,
1814 psli->sli_flag,
1815 flag);
1816
1817 psli->slistat.mbox_busy++;
1818 spin_unlock_irqrestore(phba->host->host_lock,
1819 drvr_flag);
1820
1821 return (MBX_BUSY);
1822 }
1823
1824 /* Handle STOP IOCB processing flag. This is only meaningful
1825 * if we are not polling for mbox completion.
1826 */
1827 if (flag & MBX_STOP_IOCB) {
1828 flag &= ~MBX_STOP_IOCB;
1829 if (flag == MBX_NOWAIT) {
1830 /* Now flag each ring */
1831 for (i = 0; i < psli->num_rings; i++) {
1832 /* If the ring is active, flag it */
1833 if (psli->ring[i].cmdringaddr) {
1834 psli->ring[i].flag |=
1835 LPFC_STOP_IOCB_MBX;
1836 }
1837 }
1838 }
1839 }
1840
1841 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
1842
1843 /* If we are not polling, we MUST be in SLI2 mode */
1844 if (flag != MBX_POLL) {
1845 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1846 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1847 spin_unlock_irqrestore(phba->host->host_lock,
1848 drvr_flag);
1849 /* Mbox command <mbxCommand> cannot issue */
1850 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
1851 return (MBX_NOT_FINISHED);
1852 }
1853 /* timeout active mbox command */
1854 mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
1855 }
1856
1857 /* Mailbox cmd <cmd> issue */
1858 lpfc_printf_log(phba,
1859 KERN_INFO,
1860 LOG_MBOX | LOG_SLI,
1861 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
1862 phba->brd_no,
1863 mb->mbxCommand,
1864 phba->hba_state,
1865 psli->sli_flag,
1866 flag);
1867
1868 psli->slistat.mbox_cmd++;
1869 evtctr = psli->slistat.mbox_event;
1870
1871 /* next set own bit for the adapter and copy over command word */
1872 mb->mbxOwner = OWN_CHIP;
1873
1874 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1875 /* First copy command data to host SLIM area */
1876 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
1877 } else {
1878 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1879 /* copy command data into host mbox for cmpl */
1880 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
1881 MAILBOX_CMD_SIZE);
1882 }
1883
1884 /* First copy mbox command data to HBA SLIM, skip past first
1885 word */
1886 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1887 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
1888 MAILBOX_CMD_SIZE - sizeof (uint32_t));
1889
1890 /* Next copy over first word, with mbxOwner set */
1891 ldata = *((volatile uint32_t *)mb);
1892 to_slim = phba->MBslimaddr;
1893 writel(ldata, to_slim);
1894 readl(to_slim); /* flush */
1895
1896 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1897 /* switch over to host mailbox */
1898 psli->sli_flag |= LPFC_SLI2_ACTIVE;
1899 }
1900 }
1901
1902 wmb();
1903 /* interrupt board to doit right away */
1904 writel(CA_MBATT, phba->CAregaddr);
1905 readl(phba->CAregaddr); /* flush */
1906
1907 switch (flag) {
1908 case MBX_NOWAIT:
1909 /* Don't wait for it to finish, just return */
1910 psli->mbox_active = pmbox;
1911 break;
1912
1913 case MBX_POLL:
1914 i = 0;
1915 psli->mbox_active = NULL;
1916 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1917 /* First read mbox status word */
1918 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
1919 word0 = le32_to_cpu(word0);
1920 } else {
1921 /* First read mbox status word */
1922 word0 = readl(phba->MBslimaddr);
1923 }
1924
1925 /* Read the HBA Host Attention Register */
1926 ha_copy = readl(phba->HAregaddr);
1927
1928 /* Wait for command to complete */
1929 while (((word0 & OWN_CHIP) == OWN_CHIP)
1930 || !(ha_copy & HA_MBATT)) {
1931 if (i++ >= 100) {
1932 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1933 spin_unlock_irqrestore(phba->host->host_lock,
1934 drvr_flag);
1935 return (MBX_NOT_FINISHED);
1936 }
1937
1938 /* Check if we took a mbox interrupt while we were
1939 polling */
1940 if (((word0 & OWN_CHIP) != OWN_CHIP)
1941 && (evtctr != psli->slistat.mbox_event))
1942 break;
1943
1944 spin_unlock_irqrestore(phba->host->host_lock,
1945 drvr_flag);
1946
1947 /* Can be in interrupt context, do not sleep */
1948 /* (or might be called with interrupts disabled) */
1949 mdelay(i);
1950
1951 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1952
1953 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1954 /* First copy command data */
1955 word0 = *((volatile uint32_t *)
1956 &phba->slim2p->mbx);
1957 word0 = le32_to_cpu(word0);
1958 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1959 MAILBOX_t *slimmb;
1960 volatile uint32_t slimword0;
1961 /* Check real SLIM for any errors */
1962 slimword0 = readl(phba->MBslimaddr);
1963 slimmb = (MAILBOX_t *) & slimword0;
1964 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
1965 && slimmb->mbxStatus) {
1966 psli->sli_flag &=
1967 ~LPFC_SLI2_ACTIVE;
1968 word0 = slimword0;
1969 }
1970 }
1971 } else {
1972 /* First copy command data */
1973 word0 = readl(phba->MBslimaddr);
1974 }
1975 /* Read the HBA Host Attention Register */
1976 ha_copy = readl(phba->HAregaddr);
1977 }
1978
1979 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1980 /* copy results back to user */
1981 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
1982 MAILBOX_CMD_SIZE);
1983 } else {
1984 /* First copy command data */
1985 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
1986 MAILBOX_CMD_SIZE);
1987 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
1988 pmbox->context2) {
1989 lpfc_memcpy_from_slim((void *)pmbox->context2,
1990 phba->MBslimaddr + DMP_RSP_OFFSET,
1991 mb->un.varDmp.word_cnt);
1992 }
1993 }
1994
1995 writel(HA_MBATT, phba->HAregaddr);
1996 readl(phba->HAregaddr); /* flush */
1997
1998 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1999 status = mb->mbxStatus;
2000 }
2001
2002 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2003 return (status);
2004 }
2005
2006 static int
2007 lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2008 struct lpfc_iocbq * piocb)
2009 {
2010 /* Insert the caller's iocb in the txq tail for later processing. */
2011 list_add_tail(&piocb->list, &pring->txq);
2012 pring->txq_cnt++;
2013 return (0);
2014 }
2015
2016 static struct lpfc_iocbq *
2017 lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2018 struct lpfc_iocbq ** piocb)
2019 {
2020 struct lpfc_iocbq * nextiocb;
2021
2022 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2023 if (!nextiocb) {
2024 nextiocb = *piocb;
2025 *piocb = NULL;
2026 }
2027
2028 return nextiocb;
2029 }
2030
2031 int
2032 lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2033 struct lpfc_iocbq *piocb, uint32_t flag)
2034 {
2035 struct lpfc_iocbq *nextiocb;
2036 IOCB_t *iocb;
2037
2038 /*
2039 * We should never get an IOCB if we are in a < LINK_DOWN state
2040 */
2041 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2042 return IOCB_ERROR;
2043
2044 /*
2045 * Check to see if we are blocking IOCB processing because of a
2046 * outstanding mbox command.
2047 */
2048 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2049 goto iocb_busy;
2050
2051 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
2052 /*
2053 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
2054 * can be issued if the link is not up.
2055 */
2056 switch (piocb->iocb.ulpCommand) {
2057 case CMD_QUE_RING_BUF_CN:
2058 case CMD_QUE_RING_BUF64_CN:
2059 /*
2060 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2061 * completion, iocb_cmpl MUST be 0.
2062 */
2063 if (piocb->iocb_cmpl)
2064 piocb->iocb_cmpl = NULL;
2065 /*FALLTHROUGH*/
2066 case CMD_CREATE_XRI_CR:
2067 break;
2068 default:
2069 goto iocb_busy;
2070 }
2071
2072 /*
2073 * For FCP commands, we must be in a state where we can process link
2074 * attention events.
2075 */
2076 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
2077 !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
2078 goto iocb_busy;
2079
2080 /*
2081 * Check to see if this is a high priority command.
2082 * If so bypass tx queue processing.
2083 */
2084 if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
2085 (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
2086 lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
2087 piocb = NULL;
2088 }
2089
2090 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2091 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2092 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2093
2094 if (iocb)
2095 lpfc_sli_update_ring(phba, pring);
2096 else
2097 lpfc_sli_update_full_ring(phba, pring);
2098
2099 if (!piocb)
2100 return IOCB_SUCCESS;
2101
2102 goto out_busy;
2103
2104 iocb_busy:
2105 pring->stats.iocb_cmd_delay++;
2106
2107 out_busy:
2108
2109 if (!(flag & SLI_IOCB_RET_IOCB)) {
2110 lpfc_sli_ringtx_put(phba, pring, piocb);
2111 return IOCB_SUCCESS;
2112 }
2113
2114 return IOCB_BUSY;
2115 }
2116
2117 int
2118 lpfc_sli_setup(struct lpfc_hba *phba)
2119 {
2120 int i, totiocb = 0;
2121 struct lpfc_sli *psli = &phba->sli;
2122 struct lpfc_sli_ring *pring;
2123
2124 psli->num_rings = MAX_CONFIGURED_RINGS;
2125 psli->sli_flag = 0;
2126 psli->fcp_ring = LPFC_FCP_RING;
2127 psli->next_ring = LPFC_FCP_NEXT_RING;
2128 psli->ip_ring = LPFC_IP_RING;
2129
2130 psli->iocbq_lookup = NULL;
2131 psli->iocbq_lookup_len = 0;
2132 psli->last_iotag = 0;
2133
2134 for (i = 0; i < psli->num_rings; i++) {
2135 pring = &psli->ring[i];
2136 switch (i) {
2137 case LPFC_FCP_RING: /* ring 0 - FCP */
2138 /* numCiocb and numRiocb are used in config_port */
2139 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2140 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2141 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2142 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2143 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2144 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2145 pring->iotag_ctr = 0;
2146 pring->iotag_max =
2147 (phba->cfg_hba_queue_depth * 2);
2148 pring->fast_iotag = pring->iotag_max;
2149 pring->num_mask = 0;
2150 break;
2151 case LPFC_IP_RING: /* ring 1 - IP */
2152 /* numCiocb and numRiocb are used in config_port */
2153 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
2154 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
2155 pring->num_mask = 0;
2156 break;
2157 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
2158 /* numCiocb and numRiocb are used in config_port */
2159 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
2160 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
2161 pring->fast_iotag = 0;
2162 pring->iotag_ctr = 0;
2163 pring->iotag_max = 4096;
2164 pring->num_mask = 4;
2165 pring->prt[0].profile = 0; /* Mask 0 */
2166 pring->prt[0].rctl = FC_ELS_REQ;
2167 pring->prt[0].type = FC_ELS_DATA;
2168 pring->prt[0].lpfc_sli_rcv_unsol_event =
2169 lpfc_els_unsol_event;
2170 pring->prt[1].profile = 0; /* Mask 1 */
2171 pring->prt[1].rctl = FC_ELS_RSP;
2172 pring->prt[1].type = FC_ELS_DATA;
2173 pring->prt[1].lpfc_sli_rcv_unsol_event =
2174 lpfc_els_unsol_event;
2175 pring->prt[2].profile = 0; /* Mask 2 */
2176 /* NameServer Inquiry */
2177 pring->prt[2].rctl = FC_UNSOL_CTL;
2178 /* NameServer */
2179 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
2180 pring->prt[2].lpfc_sli_rcv_unsol_event =
2181 lpfc_ct_unsol_event;
2182 pring->prt[3].profile = 0; /* Mask 3 */
2183 /* NameServer response */
2184 pring->prt[3].rctl = FC_SOL_CTL;
2185 /* NameServer */
2186 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
2187 pring->prt[3].lpfc_sli_rcv_unsol_event =
2188 lpfc_ct_unsol_event;
2189 break;
2190 }
2191 totiocb += (pring->numCiocb + pring->numRiocb);
2192 }
2193 if (totiocb > MAX_SLI2_IOCB) {
2194 /* Too many cmd / rsp ring entries in SLI2 SLIM */
2195 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2196 "%d:0462 Too many cmd / rsp ring entries in "
2197 "SLI2 SLIM Data: x%x x%x\n",
2198 phba->brd_no, totiocb, MAX_SLI2_IOCB);
2199 }
2200
2201 return 0;
2202 }
2203
2204 int
2205 lpfc_sli_queue_setup(struct lpfc_hba * phba)
2206 {
2207 struct lpfc_sli *psli;
2208 struct lpfc_sli_ring *pring;
2209 int i;
2210
2211 psli = &phba->sli;
2212 spin_lock_irq(phba->host->host_lock);
2213 INIT_LIST_HEAD(&psli->mboxq);
2214 /* Initialize list headers for txq and txcmplq as double linked lists */
2215 for (i = 0; i < psli->num_rings; i++) {
2216 pring = &psli->ring[i];
2217 pring->ringno = i;
2218 pring->next_cmdidx = 0;
2219 pring->local_getidx = 0;
2220 pring->cmdidx = 0;
2221 INIT_LIST_HEAD(&pring->txq);
2222 INIT_LIST_HEAD(&pring->txcmplq);
2223 INIT_LIST_HEAD(&pring->iocb_continueq);
2224 INIT_LIST_HEAD(&pring->postbufq);
2225 }
2226 spin_unlock_irq(phba->host->host_lock);
2227 return (1);
2228 }
2229
2230 int
2231 lpfc_sli_hba_down(struct lpfc_hba * phba)
2232 {
2233 struct lpfc_sli *psli;
2234 struct lpfc_sli_ring *pring;
2235 LPFC_MBOXQ_t *pmb;
2236 struct lpfc_iocbq *iocb, *next_iocb;
2237 IOCB_t *icmd = NULL;
2238 int i;
2239 unsigned long flags = 0;
2240
2241 psli = &phba->sli;
2242 lpfc_hba_down_prep(phba);
2243
2244 spin_lock_irqsave(phba->host->host_lock, flags);
2245
2246 for (i = 0; i < psli->num_rings; i++) {
2247 pring = &psli->ring[i];
2248 pring->flag |= LPFC_DEFERRED_RING_EVENT;
2249
2250 /*
2251 * Error everything on the txq since these iocbs have not been
2252 * given to the FW yet.
2253 */
2254 pring->txq_cnt = 0;
2255
2256 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
2257 list_del_init(&iocb->list);
2258 if (iocb->iocb_cmpl) {
2259 icmd = &iocb->iocb;
2260 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
2261 icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
2262 spin_unlock_irqrestore(phba->host->host_lock,
2263 flags);
2264 (iocb->iocb_cmpl) (phba, iocb, iocb);
2265 spin_lock_irqsave(phba->host->host_lock, flags);
2266 } else
2267 lpfc_sli_release_iocbq(phba, iocb);
2268 }
2269
2270 INIT_LIST_HEAD(&(pring->txq));
2271
2272 kfree(pring->fast_lookup);
2273 pring->fast_lookup = NULL;
2274 }
2275
2276 spin_unlock_irqrestore(phba->host->host_lock, flags);
2277
2278 /* Return any active mbox cmds */
2279 del_timer_sync(&psli->mbox_tmo);
2280 spin_lock_irqsave(phba->host->host_lock, flags);
2281 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2282 if (psli->mbox_active) {
2283 pmb = psli->mbox_active;
2284 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2285 if (pmb->mbox_cmpl) {
2286 spin_unlock_irqrestore(phba->host->host_lock, flags);
2287 pmb->mbox_cmpl(phba,pmb);
2288 spin_lock_irqsave(phba->host->host_lock, flags);
2289 }
2290 }
2291 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2292 psli->mbox_active = NULL;
2293
2294 /* Return any pending mbox cmds */
2295 while ((pmb = lpfc_mbox_get(phba)) != NULL) {
2296 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2297 if (pmb->mbox_cmpl) {
2298 spin_unlock_irqrestore(phba->host->host_lock, flags);
2299 pmb->mbox_cmpl(phba,pmb);
2300 spin_lock_irqsave(phba->host->host_lock, flags);
2301 }
2302 }
2303
2304 INIT_LIST_HEAD(&psli->mboxq);
2305
2306 spin_unlock_irqrestore(phba->host->host_lock, flags);
2307
2308 /*
2309 * Provided the hba is not in an error state, reset it. It is not
2310 * capable of IO anymore.
2311 */
2312 if (phba->hba_state != LPFC_HBA_ERROR) {
2313 phba->hba_state = LPFC_INIT_START;
2314 lpfc_sli_brdreset(phba, 1);
2315 }
2316
2317 return 1;
2318 }
2319
2320 void
2321 lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
2322 {
2323 uint32_t *src = srcp;
2324 uint32_t *dest = destp;
2325 uint32_t ldata;
2326 int i;
2327
2328 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
2329 ldata = *src;
2330 ldata = le32_to_cpu(ldata);
2331 *dest = ldata;
2332 src++;
2333 dest++;
2334 }
2335 }
2336
2337 int
2338 lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2339 struct lpfc_dmabuf * mp)
2340 {
2341 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
2342 later */
2343 list_add_tail(&mp->list, &pring->postbufq);
2344
2345 pring->postbufq_cnt++;
2346 return 0;
2347 }
2348
2349
2350 struct lpfc_dmabuf *
2351 lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2352 dma_addr_t phys)
2353 {
2354 struct lpfc_dmabuf *mp, *next_mp;
2355 struct list_head *slp = &pring->postbufq;
2356
2357 /* Search postbufq, from the begining, looking for a match on phys */
2358 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
2359 if (mp->phys == phys) {
2360 list_del_init(&mp->list);
2361 pring->postbufq_cnt--;
2362 return mp;
2363 }
2364 }
2365
2366 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2367 "%d:0410 Cannot find virtual addr for mapped buf on "
2368 "ring %d Data x%llx x%p x%p x%x\n",
2369 phba->brd_no, pring->ringno, (unsigned long long)phys,
2370 slp->next, slp->prev, pring->postbufq_cnt);
2371 return NULL;
2372 }
2373
2374 static void
2375 lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2376 struct lpfc_iocbq * rspiocb)
2377 {
2378 struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
2379 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
2380 * just aborted.
2381 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
2382 */
2383 if (cmdiocb->context2) {
2384 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
2385
2386 /* Free the response IOCB before completing the abort
2387 command. */
2388 buf_ptr = NULL;
2389 list_remove_head((&buf_ptr1->list), buf_ptr,
2390 struct lpfc_dmabuf, list);
2391 if (buf_ptr) {
2392 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2393 kfree(buf_ptr);
2394 }
2395 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
2396 kfree(buf_ptr1);
2397 }
2398
2399 if (cmdiocb->context3) {
2400 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
2401 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2402 kfree(buf_ptr);
2403 }
2404
2405 lpfc_sli_release_iocbq(phba, cmdiocb);
2406 return;
2407 }
2408
2409 int
2410 lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
2411 struct lpfc_sli_ring * pring,
2412 struct lpfc_iocbq * cmdiocb)
2413 {
2414 struct lpfc_iocbq *abtsiocbp;
2415 IOCB_t *icmd = NULL;
2416 IOCB_t *iabt = NULL;
2417
2418 /* issue ABTS for this IOCB based on iotag */
2419 abtsiocbp = lpfc_sli_get_iocbq(phba);
2420 if (abtsiocbp == NULL)
2421 return 0;
2422
2423 iabt = &abtsiocbp->iocb;
2424 icmd = &cmdiocb->iocb;
2425 switch (icmd->ulpCommand) {
2426 case CMD_ELS_REQUEST64_CR:
2427 /* Even though we abort the ELS command, the firmware may access
2428 * the BPL or other resources before it processes our
2429 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
2430 * resources till the actual abort request completes.
2431 */
2432 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
2433 abtsiocbp->context2 = cmdiocb->context2;
2434 abtsiocbp->context3 = cmdiocb->context3;
2435 cmdiocb->context2 = NULL;
2436 cmdiocb->context3 = NULL;
2437 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
2438 break;
2439 default:
2440 lpfc_sli_release_iocbq(phba, abtsiocbp);
2441 return 0;
2442 }
2443
2444 iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
2445 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
2446
2447 iabt->ulpLe = 1;
2448 iabt->ulpClass = CLASS3;
2449 iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
2450
2451 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
2452 lpfc_sli_release_iocbq(phba, abtsiocbp);
2453 return 0;
2454 }
2455
2456 return 1;
2457 }
2458
2459 static int
2460 lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
2461 uint64_t lun_id, uint32_t ctx,
2462 lpfc_ctx_cmd ctx_cmd)
2463 {
2464 struct lpfc_scsi_buf *lpfc_cmd;
2465 struct scsi_cmnd *cmnd;
2466 int rc = 1;
2467
2468 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
2469 return rc;
2470
2471 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
2472 cmnd = lpfc_cmd->pCmd;
2473
2474 if (cmnd == NULL)
2475 return rc;
2476
2477 switch (ctx_cmd) {
2478 case LPFC_CTX_LUN:
2479 if ((cmnd->device->id == tgt_id) &&
2480 (cmnd->device->lun == lun_id))
2481 rc = 0;
2482 break;
2483 case LPFC_CTX_TGT:
2484 if (cmnd->device->id == tgt_id)
2485 rc = 0;
2486 break;
2487 case LPFC_CTX_CTX:
2488 if (iocbq->iocb.ulpContext == ctx)
2489 rc = 0;
2490 break;
2491 case LPFC_CTX_HOST:
2492 rc = 0;
2493 break;
2494 default:
2495 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
2496 __FUNCTION__, ctx_cmd);
2497 break;
2498 }
2499
2500 return rc;
2501 }
2502
2503 int
2504 lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2505 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
2506 {
2507 struct lpfc_iocbq *iocbq;
2508 int sum, i;
2509
2510 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
2511 iocbq = phba->sli.iocbq_lookup[i];
2512
2513 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
2514 0, ctx_cmd) == 0)
2515 sum++;
2516 }
2517
2518 return sum;
2519 }
2520
2521 void
2522 lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2523 struct lpfc_iocbq * rspiocb)
2524 {
2525 spin_lock_irq(phba->host->host_lock);
2526 lpfc_sli_release_iocbq(phba, cmdiocb);
2527 spin_unlock_irq(phba->host->host_lock);
2528 return;
2529 }
2530
2531 int
2532 lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2533 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
2534 lpfc_ctx_cmd abort_cmd)
2535 {
2536 struct lpfc_iocbq *iocbq;
2537 struct lpfc_iocbq *abtsiocb;
2538 IOCB_t *cmd = NULL;
2539 int errcnt = 0, ret_val = 0;
2540 int i;
2541
2542 for (i = 1; i <= phba->sli.last_iotag; i++) {
2543 iocbq = phba->sli.iocbq_lookup[i];
2544
2545 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
2546 0, abort_cmd) != 0)
2547 continue;
2548
2549 /* issue ABTS for this IOCB based on iotag */
2550 abtsiocb = lpfc_sli_get_iocbq(phba);
2551 if (abtsiocb == NULL) {
2552 errcnt++;
2553 continue;
2554 }
2555
2556 cmd = &iocbq->iocb;
2557 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
2558 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
2559 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
2560 abtsiocb->iocb.ulpLe = 1;
2561 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2562
2563 if (phba->hba_state >= LPFC_LINK_UP)
2564 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
2565 else
2566 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
2567
2568 /* Setup callback routine and issue the command. */
2569 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
2570 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
2571 if (ret_val == IOCB_ERROR) {
2572 lpfc_sli_release_iocbq(phba, abtsiocb);
2573 errcnt++;
2574 continue;
2575 }
2576 }
2577
2578 return errcnt;
2579 }
2580
2581 static void
2582 lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
2583 struct lpfc_iocbq *cmdiocbq,
2584 struct lpfc_iocbq *rspiocbq)
2585 {
2586 wait_queue_head_t *pdone_q;
2587 unsigned long iflags;
2588
2589 spin_lock_irqsave(phba->host->host_lock, iflags);
2590 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
2591 if (cmdiocbq->context2 && rspiocbq)
2592 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
2593 &rspiocbq->iocb, sizeof(IOCB_t));
2594
2595 pdone_q = cmdiocbq->context_un.wait_queue;
2596 spin_unlock_irqrestore(phba->host->host_lock, iflags);
2597 if (pdone_q)
2598 wake_up(pdone_q);
2599 return;
2600 }
2601
2602 /*
2603 * Issue the caller's iocb and wait for its completion, but no longer than the
2604 * caller's timeout. Note that iocb_flags is cleared before the
2605 * lpfc_sli_issue_call since the wake routine sets a unique value and by
2606 * definition this is a wait function.
2607 */
2608 int
2609 lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
2610 struct lpfc_sli_ring * pring,
2611 struct lpfc_iocbq * piocb,
2612 struct lpfc_iocbq * prspiocbq,
2613 uint32_t timeout)
2614 {
2615 DECLARE_WAIT_QUEUE_HEAD(done_q);
2616 long timeleft, timeout_req = 0;
2617 int retval = IOCB_SUCCESS;
2618
2619 /*
2620 * If the caller has provided a response iocbq buffer, then context2
2621 * is NULL or its an error.
2622 */
2623 if (prspiocbq) {
2624 if (piocb->context2)
2625 return IOCB_ERROR;
2626 piocb->context2 = prspiocbq;
2627 }
2628
2629 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
2630 piocb->context_un.wait_queue = &done_q;
2631 piocb->iocb_flag &= ~LPFC_IO_WAKE;
2632
2633 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
2634 if (retval == IOCB_SUCCESS) {
2635 timeout_req = timeout * HZ;
2636 spin_unlock_irq(phba->host->host_lock);
2637 timeleft = wait_event_timeout(done_q,
2638 piocb->iocb_flag & LPFC_IO_WAKE,
2639 timeout_req);
2640 spin_lock_irq(phba->host->host_lock);
2641
2642 if (timeleft == 0) {
2643 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2644 "%d:0329 IOCB wait timeout error - no "
2645 "wake response Data x%x\n",
2646 phba->brd_no, timeout);
2647 retval = IOCB_TIMEDOUT;
2648 } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
2649 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2650 "%d:0330 IOCB wake NOT set, "
2651 "Data x%x x%lx\n", phba->brd_no,
2652 timeout, (timeleft / jiffies));
2653 retval = IOCB_TIMEDOUT;
2654 } else {
2655 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
2656 "%d:0331 IOCB wake signaled\n",
2657 phba->brd_no);
2658 }
2659 } else {
2660 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
2661 "%d:0332 IOCB wait issue failed, Data x%x\n",
2662 phba->brd_no, retval);
2663 retval = IOCB_ERROR;
2664 }
2665
2666 if (prspiocbq)
2667 piocb->context2 = NULL;
2668
2669 piocb->context_un.wait_queue = NULL;
2670 piocb->iocb_cmpl = NULL;
2671 return retval;
2672 }
2673
2674 int
2675 lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
2676 uint32_t timeout)
2677 {
2678 DECLARE_WAIT_QUEUE_HEAD(done_q);
2679 DECLARE_WAITQUEUE(wq_entry, current);
2680 uint32_t timeleft = 0;
2681 int retval;
2682
2683 /* The caller must leave context1 empty. */
2684 if (pmboxq->context1 != 0) {
2685 return (MBX_NOT_FINISHED);
2686 }
2687
2688 /* setup wake call as IOCB callback */
2689 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
2690 /* setup context field to pass wait_queue pointer to wake function */
2691 pmboxq->context1 = &done_q;
2692
2693 /* start to sleep before we wait, to avoid races */
2694 set_current_state(TASK_INTERRUPTIBLE);
2695 add_wait_queue(&done_q, &wq_entry);
2696
2697 /* now issue the command */
2698 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
2699
2700 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
2701 timeleft = schedule_timeout(timeout * HZ);
2702 pmboxq->context1 = NULL;
2703 /* if schedule_timeout returns 0, we timed out and were not
2704 woken up */
2705 if (timeleft == 0) {
2706 retval = MBX_TIMEOUT;
2707 } else {
2708 retval = MBX_SUCCESS;
2709 }
2710 }
2711
2712
2713 set_current_state(TASK_RUNNING);
2714 remove_wait_queue(&done_q, &wq_entry);
2715 return retval;
2716 }
2717
2718 irqreturn_t
2719 lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
2720 {
2721 struct lpfc_hba *phba;
2722 uint32_t ha_copy;
2723 uint32_t work_ha_copy;
2724 unsigned long status;
2725 int i;
2726 uint32_t control;
2727
2728 /*
2729 * Get the driver's phba structure from the dev_id and
2730 * assume the HBA is not interrupting.
2731 */
2732 phba = (struct lpfc_hba *) dev_id;
2733
2734 if (unlikely(!phba))
2735 return IRQ_NONE;
2736
2737 phba->sli.slistat.sli_intr++;
2738
2739 /*
2740 * Call the HBA to see if it is interrupting. If not, don't claim
2741 * the interrupt
2742 */
2743
2744 /* Ignore all interrupts during initialization. */
2745 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2746 return IRQ_NONE;
2747
2748 /*
2749 * Read host attention register to determine interrupt source
2750 * Clear Attention Sources, except Error Attention (to
2751 * preserve status) and Link Attention
2752 */
2753 spin_lock(phba->host->host_lock);
2754 ha_copy = readl(phba->HAregaddr);
2755 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
2756 readl(phba->HAregaddr); /* flush */
2757 spin_unlock(phba->host->host_lock);
2758
2759 if (unlikely(!ha_copy))
2760 return IRQ_NONE;
2761
2762 work_ha_copy = ha_copy & phba->work_ha_mask;
2763
2764 if (unlikely(work_ha_copy)) {
2765 if (work_ha_copy & HA_LATT) {
2766 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
2767 /*
2768 * Turn off Link Attention interrupts
2769 * until CLEAR_LA done
2770 */
2771 spin_lock(phba->host->host_lock);
2772 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
2773 control = readl(phba->HCregaddr);
2774 control &= ~HC_LAINT_ENA;
2775 writel(control, phba->HCregaddr);
2776 readl(phba->HCregaddr); /* flush */
2777 spin_unlock(phba->host->host_lock);
2778 }
2779 else
2780 work_ha_copy &= ~HA_LATT;
2781 }
2782
2783 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
2784 for (i = 0; i < phba->sli.num_rings; i++) {
2785 if (work_ha_copy & (HA_RXATT << (4*i))) {
2786 /*
2787 * Turn off Slow Rings interrupts
2788 */
2789 spin_lock(phba->host->host_lock);
2790 control = readl(phba->HCregaddr);
2791 control &= ~(HC_R0INT_ENA << i);
2792 writel(control, phba->HCregaddr);
2793 readl(phba->HCregaddr); /* flush */
2794 spin_unlock(phba->host->host_lock);
2795 }
2796 }
2797 }
2798
2799 if (work_ha_copy & HA_ERATT) {
2800 phba->hba_state = LPFC_HBA_ERROR;
2801 /*
2802 * There was a link/board error. Read the
2803 * status register to retrieve the error event
2804 * and process it.
2805 */
2806 phba->sli.slistat.err_attn_event++;
2807 /* Save status info */
2808 phba->work_hs = readl(phba->HSregaddr);
2809 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
2810 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
2811
2812 /* Clear Chip error bit */
2813 writel(HA_ERATT, phba->HAregaddr);
2814 readl(phba->HAregaddr); /* flush */
2815
2816 /*
2817 * Reseting the HBA is the only reliable way
2818 * to shutdown interrupt when there is a
2819 * ERROR.
2820 */
2821 lpfc_sli_send_reset(phba, phba->hba_state);
2822 }
2823
2824 spin_lock(phba->host->host_lock);
2825 phba->work_ha |= work_ha_copy;
2826 if (phba->work_wait)
2827 wake_up(phba->work_wait);
2828 spin_unlock(phba->host->host_lock);
2829 }
2830
2831 ha_copy &= ~(phba->work_ha_mask);
2832
2833 /*
2834 * Process all events on FCP ring. Take the optimized path for
2835 * FCP IO. Any other IO is slow path and is handled by
2836 * the worker thread.
2837 */
2838 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
2839 status >>= (4*LPFC_FCP_RING);
2840 if (status & HA_RXATT)
2841 lpfc_sli_handle_fast_ring_event(phba,
2842 &phba->sli.ring[LPFC_FCP_RING],
2843 status);
2844 return IRQ_HANDLED;
2845
2846 } /* lpfc_intr_handler */
kernel source for telekom puls (alcatel/mediatek)