libata: release prep (bump versions, etc.)
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / libata-core.c
1 /*
2 libata-core.c - helper library for ATA
3
4 Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 Copyright 2003-2004 Jeff Garzik
6
7 The contents of this file are subject to the Open
8 Software License version 1.1 that can be found at
9 http://www.opensource.org/licenses/osl-1.1.txt and is included herein
10 by reference.
11
12 Alternatively, the contents of this file may be used under the terms
13 of the GNU General Public License version 2 (the "GPL") as distributed
14 in the kernel source COPYING file, in which case the provisions of
15 the GPL are applicable instead of the above. If you wish to allow
16 the use of your version of this file only under the terms of the
17 GPL and not to allow others to use your version of this file under
18 the OSL, indicate your decision by deleting the provisions above and
19 replace them with the notice and other provisions required by the GPL.
20 If you do not delete the provisions above, a recipient may use your
21 version of this file under either the OSL or the GPL.
22
23 */
24
25 #include <linux/config.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/list.h>
31 #include <linux/mm.h>
32 #include <linux/highmem.h>
33 #include <linux/spinlock.h>
34 #include <linux/blkdev.h>
35 #include <linux/delay.h>
36 #include <linux/timer.h>
37 #include <linux/interrupt.h>
38 #include <linux/completion.h>
39 #include <linux/suspend.h>
40 #include <linux/workqueue.h>
41 #include <scsi/scsi.h>
42 #include "scsi.h"
43 #include "scsi_priv.h"
44 #include <scsi/scsi_host.h>
45 #include <linux/libata.h>
46 #include <asm/io.h>
47 #include <asm/semaphore.h>
48 #include <asm/byteorder.h>
49
50 #include "libata.h"
51
52 static unsigned int ata_busy_sleep (struct ata_port *ap,
53 unsigned long tmout_pat,
54 unsigned long tmout);
55 static void ata_set_mode(struct ata_port *ap);
56 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
57 static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift);
58 static int fgb(u32 bitmap);
59 static int ata_choose_xfer_mode(struct ata_port *ap,
60 u8 *xfer_mode_out,
61 unsigned int *xfer_shift_out);
62 static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
63 static void __ata_qc_complete(struct ata_queued_cmd *qc);
64
65 static unsigned int ata_unique_id = 1;
66 static struct workqueue_struct *ata_wq;
67
68 MODULE_AUTHOR("Jeff Garzik");
69 MODULE_DESCRIPTION("Library module for ATA devices");
70 MODULE_LICENSE("GPL");
71 MODULE_VERSION(DRV_VERSION);
72
73 /**
74 * ata_tf_load - send taskfile registers to host controller
75 * @ap: Port to which output is sent
76 * @tf: ATA taskfile register set
77 *
78 * Outputs ATA taskfile to standard ATA host controller.
79 *
80 * LOCKING:
81 * Inherited from caller.
82 */
83
84 static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
85 {
86 struct ata_ioports *ioaddr = &ap->ioaddr;
87 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
88
89 if (tf->ctl != ap->last_ctl) {
90 outb(tf->ctl, ioaddr->ctl_addr);
91 ap->last_ctl = tf->ctl;
92 ata_wait_idle(ap);
93 }
94
95 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
96 outb(tf->hob_feature, ioaddr->feature_addr);
97 outb(tf->hob_nsect, ioaddr->nsect_addr);
98 outb(tf->hob_lbal, ioaddr->lbal_addr);
99 outb(tf->hob_lbam, ioaddr->lbam_addr);
100 outb(tf->hob_lbah, ioaddr->lbah_addr);
101 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
102 tf->hob_feature,
103 tf->hob_nsect,
104 tf->hob_lbal,
105 tf->hob_lbam,
106 tf->hob_lbah);
107 }
108
109 if (is_addr) {
110 outb(tf->feature, ioaddr->feature_addr);
111 outb(tf->nsect, ioaddr->nsect_addr);
112 outb(tf->lbal, ioaddr->lbal_addr);
113 outb(tf->lbam, ioaddr->lbam_addr);
114 outb(tf->lbah, ioaddr->lbah_addr);
115 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
116 tf->feature,
117 tf->nsect,
118 tf->lbal,
119 tf->lbam,
120 tf->lbah);
121 }
122
123 if (tf->flags & ATA_TFLAG_DEVICE) {
124 outb(tf->device, ioaddr->device_addr);
125 VPRINTK("device 0x%X\n", tf->device);
126 }
127
128 ata_wait_idle(ap);
129 }
130
131 /**
132 * ata_tf_load_mmio - send taskfile registers to host controller
133 * @ap: Port to which output is sent
134 * @tf: ATA taskfile register set
135 *
136 * Outputs ATA taskfile to standard ATA host controller using MMIO.
137 *
138 * LOCKING:
139 * Inherited from caller.
140 */
141
142 static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
143 {
144 struct ata_ioports *ioaddr = &ap->ioaddr;
145 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
146
147 if (tf->ctl != ap->last_ctl) {
148 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
149 ap->last_ctl = tf->ctl;
150 ata_wait_idle(ap);
151 }
152
153 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
154 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
155 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
156 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
157 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
158 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
159 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
160 tf->hob_feature,
161 tf->hob_nsect,
162 tf->hob_lbal,
163 tf->hob_lbam,
164 tf->hob_lbah);
165 }
166
167 if (is_addr) {
168 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
169 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
170 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
171 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
172 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
173 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
174 tf->feature,
175 tf->nsect,
176 tf->lbal,
177 tf->lbam,
178 tf->lbah);
179 }
180
181 if (tf->flags & ATA_TFLAG_DEVICE) {
182 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
183 VPRINTK("device 0x%X\n", tf->device);
184 }
185
186 ata_wait_idle(ap);
187 }
188
189
190 /**
191 * ata_tf_load - send taskfile registers to host controller
192 * @ap: Port to which output is sent
193 * @tf: ATA taskfile register set
194 *
195 * Outputs ATA taskfile to standard ATA host controller using MMIO
196 * or PIO as indicated by the ATA_FLAG_MMIO flag.
197 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
198 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
199 * hob_lbal, hob_lbam, and hob_lbah.
200 *
201 * This function waits for idle (!BUSY and !DRQ) after writing
202 * registers. If the control register has a new value, this
203 * function also waits for idle after writing control and before
204 * writing the remaining registers.
205 *
206 * May be used as the tf_load() entry in ata_port_operations.
207 *
208 * LOCKING:
209 * Inherited from caller.
210 */
211 void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
212 {
213 if (ap->flags & ATA_FLAG_MMIO)
214 ata_tf_load_mmio(ap, tf);
215 else
216 ata_tf_load_pio(ap, tf);
217 }
218
219 /**
220 * ata_exec_command_pio - issue ATA command to host controller
221 * @ap: port to which command is being issued
222 * @tf: ATA taskfile register set
223 *
224 * Issues PIO write to ATA command register, with proper
225 * synchronization with interrupt handler / other threads.
226 *
227 * LOCKING:
228 * spin_lock_irqsave(host_set lock)
229 */
230
231 static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
232 {
233 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
234
235 outb(tf->command, ap->ioaddr.command_addr);
236 ata_pause(ap);
237 }
238
239
240 /**
241 * ata_exec_command_mmio - issue ATA command to host controller
242 * @ap: port to which command is being issued
243 * @tf: ATA taskfile register set
244 *
245 * Issues MMIO write to ATA command register, with proper
246 * synchronization with interrupt handler / other threads.
247 *
248 * LOCKING:
249 * spin_lock_irqsave(host_set lock)
250 */
251
252 static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
253 {
254 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
255
256 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
257 ata_pause(ap);
258 }
259
260
261 /**
262 * ata_exec_command - issue ATA command to host controller
263 * @ap: port to which command is being issued
264 * @tf: ATA taskfile register set
265 *
266 * Issues PIO/MMIO write to ATA command register, with proper
267 * synchronization with interrupt handler / other threads.
268 *
269 * LOCKING:
270 * spin_lock_irqsave(host_set lock)
271 */
272 void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
273 {
274 if (ap->flags & ATA_FLAG_MMIO)
275 ata_exec_command_mmio(ap, tf);
276 else
277 ata_exec_command_pio(ap, tf);
278 }
279
280 /**
281 * ata_exec - issue ATA command to host controller
282 * @ap: port to which command is being issued
283 * @tf: ATA taskfile register set
284 *
285 * Issues PIO/MMIO write to ATA command register, with proper
286 * synchronization with interrupt handler / other threads.
287 *
288 * LOCKING:
289 * Obtains host_set lock.
290 */
291
292 static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
293 {
294 unsigned long flags;
295
296 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
297 spin_lock_irqsave(&ap->host_set->lock, flags);
298 ap->ops->exec_command(ap, tf);
299 spin_unlock_irqrestore(&ap->host_set->lock, flags);
300 }
301
302 /**
303 * ata_tf_to_host - issue ATA taskfile to host controller
304 * @ap: port to which command is being issued
305 * @tf: ATA taskfile register set
306 *
307 * Issues ATA taskfile register set to ATA host controller,
308 * with proper synchronization with interrupt handler and
309 * other threads.
310 *
311 * LOCKING:
312 * Obtains host_set lock.
313 */
314
315 static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
316 {
317 ap->ops->tf_load(ap, tf);
318
319 ata_exec(ap, tf);
320 }
321
322 /**
323 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
324 * @ap: port to which command is being issued
325 * @tf: ATA taskfile register set
326 *
327 * Issues ATA taskfile register set to ATA host controller,
328 * with proper synchronization with interrupt handler and
329 * other threads.
330 *
331 * LOCKING:
332 * spin_lock_irqsave(host_set lock)
333 */
334
335 void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
336 {
337 ap->ops->tf_load(ap, tf);
338 ap->ops->exec_command(ap, tf);
339 }
340
341 /**
342 * ata_tf_read_pio - input device's ATA taskfile shadow registers
343 * @ap: Port from which input is read
344 * @tf: ATA taskfile register set for storing input
345 *
346 * Reads ATA taskfile registers for currently-selected device
347 * into @tf.
348 *
349 * LOCKING:
350 * Inherited from caller.
351 */
352
353 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
354 {
355 struct ata_ioports *ioaddr = &ap->ioaddr;
356
357 tf->nsect = inb(ioaddr->nsect_addr);
358 tf->lbal = inb(ioaddr->lbal_addr);
359 tf->lbam = inb(ioaddr->lbam_addr);
360 tf->lbah = inb(ioaddr->lbah_addr);
361 tf->device = inb(ioaddr->device_addr);
362
363 if (tf->flags & ATA_TFLAG_LBA48) {
364 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
365 tf->hob_feature = inb(ioaddr->error_addr);
366 tf->hob_nsect = inb(ioaddr->nsect_addr);
367 tf->hob_lbal = inb(ioaddr->lbal_addr);
368 tf->hob_lbam = inb(ioaddr->lbam_addr);
369 tf->hob_lbah = inb(ioaddr->lbah_addr);
370 }
371 }
372
373 /**
374 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
375 * @ap: Port from which input is read
376 * @tf: ATA taskfile register set for storing input
377 *
378 * Reads ATA taskfile registers for currently-selected device
379 * into @tf via MMIO.
380 *
381 * LOCKING:
382 * Inherited from caller.
383 */
384
385 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
386 {
387 struct ata_ioports *ioaddr = &ap->ioaddr;
388
389 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
390 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
391 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
392 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
393 tf->device = readb((void __iomem *)ioaddr->device_addr);
394
395 if (tf->flags & ATA_TFLAG_LBA48) {
396 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
397 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
398 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
399 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
400 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
401 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
402 }
403 }
404
405
406 /**
407 * ata_tf_read - input device's ATA taskfile shadow registers
408 * @ap: Port from which input is read
409 * @tf: ATA taskfile register set for storing input
410 *
411 * Reads ATA taskfile registers for currently-selected device
412 * into @tf.
413 *
414 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
415 * is set, also reads the hob registers.
416 *
417 * May be used as the tf_read() entry in ata_port_operations.
418 *
419 * LOCKING:
420 * Inherited from caller.
421 */
422 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
423 {
424 if (ap->flags & ATA_FLAG_MMIO)
425 ata_tf_read_mmio(ap, tf);
426 else
427 ata_tf_read_pio(ap, tf);
428 }
429
430 /**
431 * ata_check_status_pio - Read device status reg & clear interrupt
432 * @ap: port where the device is
433 *
434 * Reads ATA taskfile status register for currently-selected device
435 * and return its value. This also clears pending interrupts
436 * from this device
437 *
438 * LOCKING:
439 * Inherited from caller.
440 */
441 static u8 ata_check_status_pio(struct ata_port *ap)
442 {
443 return inb(ap->ioaddr.status_addr);
444 }
445
446 /**
447 * ata_check_status_mmio - Read device status reg & clear interrupt
448 * @ap: port where the device is
449 *
450 * Reads ATA taskfile status register for currently-selected device
451 * via MMIO and return its value. This also clears pending interrupts
452 * from this device
453 *
454 * LOCKING:
455 * Inherited from caller.
456 */
457 static u8 ata_check_status_mmio(struct ata_port *ap)
458 {
459 return readb((void __iomem *) ap->ioaddr.status_addr);
460 }
461
462
463 /**
464 * ata_check_status - Read device status reg & clear interrupt
465 * @ap: port where the device is
466 *
467 * Reads ATA taskfile status register for currently-selected device
468 * and return its value. This also clears pending interrupts
469 * from this device
470 *
471 * May be used as the check_status() entry in ata_port_operations.
472 *
473 * LOCKING:
474 * Inherited from caller.
475 */
476 u8 ata_check_status(struct ata_port *ap)
477 {
478 if (ap->flags & ATA_FLAG_MMIO)
479 return ata_check_status_mmio(ap);
480 return ata_check_status_pio(ap);
481 }
482
483
484 /**
485 * ata_altstatus - Read device alternate status reg
486 * @ap: port where the device is
487 *
488 * Reads ATA taskfile alternate status register for
489 * currently-selected device and return its value.
490 *
491 * Note: may NOT be used as the check_altstatus() entry in
492 * ata_port_operations.
493 *
494 * LOCKING:
495 * Inherited from caller.
496 */
497 u8 ata_altstatus(struct ata_port *ap)
498 {
499 if (ap->ops->check_altstatus)
500 return ap->ops->check_altstatus(ap);
501
502 if (ap->flags & ATA_FLAG_MMIO)
503 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
504 return inb(ap->ioaddr.altstatus_addr);
505 }
506
507
508 /**
509 * ata_chk_err - Read device error reg
510 * @ap: port where the device is
511 *
512 * Reads ATA taskfile error register for
513 * currently-selected device and return its value.
514 *
515 * Note: may NOT be used as the check_err() entry in
516 * ata_port_operations.
517 *
518 * LOCKING:
519 * Inherited from caller.
520 */
521 u8 ata_chk_err(struct ata_port *ap)
522 {
523 if (ap->ops->check_err)
524 return ap->ops->check_err(ap);
525
526 if (ap->flags & ATA_FLAG_MMIO) {
527 return readb((void __iomem *) ap->ioaddr.error_addr);
528 }
529 return inb(ap->ioaddr.error_addr);
530 }
531
532 /**
533 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
534 * @tf: Taskfile to convert
535 * @fis: Buffer into which data will output
536 * @pmp: Port multiplier port
537 *
538 * Converts a standard ATA taskfile to a Serial ATA
539 * FIS structure (Register - Host to Device).
540 *
541 * LOCKING:
542 * Inherited from caller.
543 */
544
545 void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
546 {
547 fis[0] = 0x27; /* Register - Host to Device FIS */
548 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
549 bit 7 indicates Command FIS */
550 fis[2] = tf->command;
551 fis[3] = tf->feature;
552
553 fis[4] = tf->lbal;
554 fis[5] = tf->lbam;
555 fis[6] = tf->lbah;
556 fis[7] = tf->device;
557
558 fis[8] = tf->hob_lbal;
559 fis[9] = tf->hob_lbam;
560 fis[10] = tf->hob_lbah;
561 fis[11] = tf->hob_feature;
562
563 fis[12] = tf->nsect;
564 fis[13] = tf->hob_nsect;
565 fis[14] = 0;
566 fis[15] = tf->ctl;
567
568 fis[16] = 0;
569 fis[17] = 0;
570 fis[18] = 0;
571 fis[19] = 0;
572 }
573
574 /**
575 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
576 * @fis: Buffer from which data will be input
577 * @tf: Taskfile to output
578 *
579 * Converts a standard ATA taskfile to a Serial ATA
580 * FIS structure (Register - Host to Device).
581 *
582 * LOCKING:
583 * Inherited from caller.
584 */
585
586 void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
587 {
588 tf->command = fis[2]; /* status */
589 tf->feature = fis[3]; /* error */
590
591 tf->lbal = fis[4];
592 tf->lbam = fis[5];
593 tf->lbah = fis[6];
594 tf->device = fis[7];
595
596 tf->hob_lbal = fis[8];
597 tf->hob_lbam = fis[9];
598 tf->hob_lbah = fis[10];
599
600 tf->nsect = fis[12];
601 tf->hob_nsect = fis[13];
602 }
603
604 /**
605 * ata_prot_to_cmd - determine which read/write opcodes to use
606 * @protocol: ATA_PROT_xxx taskfile protocol
607 * @lba48: true is lba48 is present
608 *
609 * Given necessary input, determine which read/write commands
610 * to use to transfer data.
611 *
612 * LOCKING:
613 * None.
614 */
615 static int ata_prot_to_cmd(int protocol, int lba48)
616 {
617 int rcmd = 0, wcmd = 0;
618
619 switch (protocol) {
620 case ATA_PROT_PIO:
621 if (lba48) {
622 rcmd = ATA_CMD_PIO_READ_EXT;
623 wcmd = ATA_CMD_PIO_WRITE_EXT;
624 } else {
625 rcmd = ATA_CMD_PIO_READ;
626 wcmd = ATA_CMD_PIO_WRITE;
627 }
628 break;
629
630 case ATA_PROT_DMA:
631 if (lba48) {
632 rcmd = ATA_CMD_READ_EXT;
633 wcmd = ATA_CMD_WRITE_EXT;
634 } else {
635 rcmd = ATA_CMD_READ;
636 wcmd = ATA_CMD_WRITE;
637 }
638 break;
639
640 default:
641 return -1;
642 }
643
644 return rcmd | (wcmd << 8);
645 }
646
647 /**
648 * ata_dev_set_protocol - set taskfile protocol and r/w commands
649 * @dev: device to examine and configure
650 *
651 * Examine the device configuration, after we have
652 * read the identify-device page and configured the
653 * data transfer mode. Set internal state related to
654 * the ATA taskfile protocol (pio, pio mult, dma, etc.)
655 * and calculate the proper read/write commands to use.
656 *
657 * LOCKING:
658 * caller.
659 */
660 static void ata_dev_set_protocol(struct ata_device *dev)
661 {
662 int pio = (dev->flags & ATA_DFLAG_PIO);
663 int lba48 = (dev->flags & ATA_DFLAG_LBA48);
664 int proto, cmd;
665
666 if (pio)
667 proto = dev->xfer_protocol = ATA_PROT_PIO;
668 else
669 proto = dev->xfer_protocol = ATA_PROT_DMA;
670
671 cmd = ata_prot_to_cmd(proto, lba48);
672 if (cmd < 0)
673 BUG();
674
675 dev->read_cmd = cmd & 0xff;
676 dev->write_cmd = (cmd >> 8) & 0xff;
677 }
678
679 static const char * xfer_mode_str[] = {
680 "UDMA/16",
681 "UDMA/25",
682 "UDMA/33",
683 "UDMA/44",
684 "UDMA/66",
685 "UDMA/100",
686 "UDMA/133",
687 "UDMA7",
688 "MWDMA0",
689 "MWDMA1",
690 "MWDMA2",
691 "PIO0",
692 "PIO1",
693 "PIO2",
694 "PIO3",
695 "PIO4",
696 };
697
698 /**
699 * ata_udma_string - convert UDMA bit offset to string
700 * @mask: mask of bits supported; only highest bit counts.
701 *
702 * Determine string which represents the highest speed
703 * (highest bit in @udma_mask).
704 *
705 * LOCKING:
706 * None.
707 *
708 * RETURNS:
709 * Constant C string representing highest speed listed in
710 * @udma_mask, or the constant C string "<n/a>".
711 */
712
713 static const char *ata_mode_string(unsigned int mask)
714 {
715 int i;
716
717 for (i = 7; i >= 0; i--)
718 if (mask & (1 << i))
719 goto out;
720 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
721 if (mask & (1 << i))
722 goto out;
723 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
724 if (mask & (1 << i))
725 goto out;
726
727 return "<n/a>";
728
729 out:
730 return xfer_mode_str[i];
731 }
732
733 /**
734 * ata_pio_devchk - PATA device presence detection
735 * @ap: ATA channel to examine
736 * @device: Device to examine (starting at zero)
737 *
738 * This technique was originally described in
739 * Hale Landis's ATADRVR (www.ata-atapi.com), and
740 * later found its way into the ATA/ATAPI spec.
741 *
742 * Write a pattern to the ATA shadow registers,
743 * and if a device is present, it will respond by
744 * correctly storing and echoing back the
745 * ATA shadow register contents.
746 *
747 * LOCKING:
748 * caller.
749 */
750
751 static unsigned int ata_pio_devchk(struct ata_port *ap,
752 unsigned int device)
753 {
754 struct ata_ioports *ioaddr = &ap->ioaddr;
755 u8 nsect, lbal;
756
757 ap->ops->dev_select(ap, device);
758
759 outb(0x55, ioaddr->nsect_addr);
760 outb(0xaa, ioaddr->lbal_addr);
761
762 outb(0xaa, ioaddr->nsect_addr);
763 outb(0x55, ioaddr->lbal_addr);
764
765 outb(0x55, ioaddr->nsect_addr);
766 outb(0xaa, ioaddr->lbal_addr);
767
768 nsect = inb(ioaddr->nsect_addr);
769 lbal = inb(ioaddr->lbal_addr);
770
771 if ((nsect == 0x55) && (lbal == 0xaa))
772 return 1; /* we found a device */
773
774 return 0; /* nothing found */
775 }
776
777 /**
778 * ata_mmio_devchk - PATA device presence detection
779 * @ap: ATA channel to examine
780 * @device: Device to examine (starting at zero)
781 *
782 * This technique was originally described in
783 * Hale Landis's ATADRVR (www.ata-atapi.com), and
784 * later found its way into the ATA/ATAPI spec.
785 *
786 * Write a pattern to the ATA shadow registers,
787 * and if a device is present, it will respond by
788 * correctly storing and echoing back the
789 * ATA shadow register contents.
790 *
791 * LOCKING:
792 * caller.
793 */
794
795 static unsigned int ata_mmio_devchk(struct ata_port *ap,
796 unsigned int device)
797 {
798 struct ata_ioports *ioaddr = &ap->ioaddr;
799 u8 nsect, lbal;
800
801 ap->ops->dev_select(ap, device);
802
803 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
804 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
805
806 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
807 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
808
809 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
810 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
811
812 nsect = readb((void __iomem *) ioaddr->nsect_addr);
813 lbal = readb((void __iomem *) ioaddr->lbal_addr);
814
815 if ((nsect == 0x55) && (lbal == 0xaa))
816 return 1; /* we found a device */
817
818 return 0; /* nothing found */
819 }
820
821 /**
822 * ata_devchk - PATA device presence detection
823 * @ap: ATA channel to examine
824 * @device: Device to examine (starting at zero)
825 *
826 * Dispatch ATA device presence detection, depending
827 * on whether we are using PIO or MMIO to talk to the
828 * ATA shadow registers.
829 *
830 * LOCKING:
831 * caller.
832 */
833
834 static unsigned int ata_devchk(struct ata_port *ap,
835 unsigned int device)
836 {
837 if (ap->flags & ATA_FLAG_MMIO)
838 return ata_mmio_devchk(ap, device);
839 return ata_pio_devchk(ap, device);
840 }
841
842 /**
843 * ata_dev_classify - determine device type based on ATA-spec signature
844 * @tf: ATA taskfile register set for device to be identified
845 *
846 * Determine from taskfile register contents whether a device is
847 * ATA or ATAPI, as per "Signature and persistence" section
848 * of ATA/PI spec (volume 1, sect 5.14).
849 *
850 * LOCKING:
851 * None.
852 *
853 * RETURNS:
854 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
855 * the event of failure.
856 */
857
858 unsigned int ata_dev_classify(struct ata_taskfile *tf)
859 {
860 /* Apple's open source Darwin code hints that some devices only
861 * put a proper signature into the LBA mid/high registers,
862 * So, we only check those. It's sufficient for uniqueness.
863 */
864
865 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
866 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
867 DPRINTK("found ATA device by sig\n");
868 return ATA_DEV_ATA;
869 }
870
871 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
872 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
873 DPRINTK("found ATAPI device by sig\n");
874 return ATA_DEV_ATAPI;
875 }
876
877 DPRINTK("unknown device\n");
878 return ATA_DEV_UNKNOWN;
879 }
880
881 /**
882 * ata_dev_try_classify - Parse returned ATA device signature
883 * @ap: ATA channel to examine
884 * @device: Device to examine (starting at zero)
885 *
886 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
887 * an ATA/ATAPI-defined set of values is placed in the ATA
888 * shadow registers, indicating the results of device detection
889 * and diagnostics.
890 *
891 * Select the ATA device, and read the values from the ATA shadow
892 * registers. Then parse according to the Error register value,
893 * and the spec-defined values examined by ata_dev_classify().
894 *
895 * LOCKING:
896 * caller.
897 */
898
899 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
900 {
901 struct ata_device *dev = &ap->device[device];
902 struct ata_taskfile tf;
903 unsigned int class;
904 u8 err;
905
906 ap->ops->dev_select(ap, device);
907
908 memset(&tf, 0, sizeof(tf));
909
910 err = ata_chk_err(ap);
911 ap->ops->tf_read(ap, &tf);
912
913 dev->class = ATA_DEV_NONE;
914
915 /* see if device passed diags */
916 if (err == 1)
917 /* do nothing */ ;
918 else if ((device == 0) && (err == 0x81))
919 /* do nothing */ ;
920 else
921 return err;
922
923 /* determine if device if ATA or ATAPI */
924 class = ata_dev_classify(&tf);
925 if (class == ATA_DEV_UNKNOWN)
926 return err;
927 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
928 return err;
929
930 dev->class = class;
931
932 return err;
933 }
934
935 /**
936 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
937 * @id: IDENTIFY DEVICE results we will examine
938 * @s: string into which data is output
939 * @ofs: offset into identify device page
940 * @len: length of string to return. must be an even number.
941 *
942 * The strings in the IDENTIFY DEVICE page are broken up into
943 * 16-bit chunks. Run through the string, and output each
944 * 8-bit chunk linearly, regardless of platform.
945 *
946 * LOCKING:
947 * caller.
948 */
949
950 void ata_dev_id_string(u16 *id, unsigned char *s,
951 unsigned int ofs, unsigned int len)
952 {
953 unsigned int c;
954
955 while (len > 0) {
956 c = id[ofs] >> 8;
957 *s = c;
958 s++;
959
960 c = id[ofs] & 0xff;
961 *s = c;
962 s++;
963
964 ofs++;
965 len -= 2;
966 }
967 }
968
969
970 /**
971 * ata_noop_dev_select - Select device 0/1 on ATA bus
972 * @ap: ATA channel to manipulate
973 * @device: ATA device (numbered from zero) to select
974 *
975 * This function performs no actual function.
976 *
977 * May be used as the dev_select() entry in ata_port_operations.
978 *
979 * LOCKING:
980 * caller.
981 */
982 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
983 {
984 }
985
986
987 /**
988 * ata_std_dev_select - Select device 0/1 on ATA bus
989 * @ap: ATA channel to manipulate
990 * @device: ATA device (numbered from zero) to select
991 *
992 * Use the method defined in the ATA specification to
993 * make either device 0, or device 1, active on the
994 * ATA channel. Works with both PIO and MMIO.
995 *
996 * May be used as the dev_select() entry in ata_port_operations.
997 *
998 * LOCKING:
999 * caller.
1000 */
1001
1002 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1003 {
1004 u8 tmp;
1005
1006 if (device == 0)
1007 tmp = ATA_DEVICE_OBS;
1008 else
1009 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1010
1011 if (ap->flags & ATA_FLAG_MMIO) {
1012 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1013 } else {
1014 outb(tmp, ap->ioaddr.device_addr);
1015 }
1016 ata_pause(ap); /* needed; also flushes, for mmio */
1017 }
1018
1019 /**
1020 * ata_dev_select - Select device 0/1 on ATA bus
1021 * @ap: ATA channel to manipulate
1022 * @device: ATA device (numbered from zero) to select
1023 * @wait: non-zero to wait for Status register BSY bit to clear
1024 * @can_sleep: non-zero if context allows sleeping
1025 *
1026 * Use the method defined in the ATA specification to
1027 * make either device 0, or device 1, active on the
1028 * ATA channel.
1029 *
1030 * This is a high-level version of ata_std_dev_select(),
1031 * which additionally provides the services of inserting
1032 * the proper pauses and status polling, where needed.
1033 *
1034 * LOCKING:
1035 * caller.
1036 */
1037
1038 void ata_dev_select(struct ata_port *ap, unsigned int device,
1039 unsigned int wait, unsigned int can_sleep)
1040 {
1041 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1042 ap->id, device, wait);
1043
1044 if (wait)
1045 ata_wait_idle(ap);
1046
1047 ap->ops->dev_select(ap, device);
1048
1049 if (wait) {
1050 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1051 msleep(150);
1052 ata_wait_idle(ap);
1053 }
1054 }
1055
1056 /**
1057 * ata_dump_id - IDENTIFY DEVICE info debugging output
1058 * @dev: Device whose IDENTIFY DEVICE page we will dump
1059 *
1060 * Dump selected 16-bit words from a detected device's
1061 * IDENTIFY PAGE page.
1062 *
1063 * LOCKING:
1064 * caller.
1065 */
1066
1067 static inline void ata_dump_id(struct ata_device *dev)
1068 {
1069 DPRINTK("49==0x%04x "
1070 "53==0x%04x "
1071 "63==0x%04x "
1072 "64==0x%04x "
1073 "75==0x%04x \n",
1074 dev->id[49],
1075 dev->id[53],
1076 dev->id[63],
1077 dev->id[64],
1078 dev->id[75]);
1079 DPRINTK("80==0x%04x "
1080 "81==0x%04x "
1081 "82==0x%04x "
1082 "83==0x%04x "
1083 "84==0x%04x \n",
1084 dev->id[80],
1085 dev->id[81],
1086 dev->id[82],
1087 dev->id[83],
1088 dev->id[84]);
1089 DPRINTK("88==0x%04x "
1090 "93==0x%04x\n",
1091 dev->id[88],
1092 dev->id[93]);
1093 }
1094
1095 /**
1096 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1097 * @ap: port on which device we wish to probe resides
1098 * @device: device bus address, starting at zero
1099 *
1100 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1101 * command, and read back the 512-byte device information page.
1102 * The device information page is fed to us via the standard
1103 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1104 * using standard PIO-IN paths)
1105 *
1106 * After reading the device information page, we use several
1107 * bits of information from it to initialize data structures
1108 * that will be used during the lifetime of the ata_device.
1109 * Other data from the info page is used to disqualify certain
1110 * older ATA devices we do not wish to support.
1111 *
1112 * LOCKING:
1113 * Inherited from caller. Some functions called by this function
1114 * obtain the host_set lock.
1115 */
1116
1117 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1118 {
1119 struct ata_device *dev = &ap->device[device];
1120 unsigned int i;
1121 u16 tmp;
1122 unsigned long xfer_modes;
1123 u8 status;
1124 unsigned int using_edd;
1125 DECLARE_COMPLETION(wait);
1126 struct ata_queued_cmd *qc;
1127 unsigned long flags;
1128 int rc;
1129
1130 if (!ata_dev_present(dev)) {
1131 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1132 ap->id, device);
1133 return;
1134 }
1135
1136 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1137 using_edd = 0;
1138 else
1139 using_edd = 1;
1140
1141 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1142
1143 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1144 dev->class == ATA_DEV_NONE);
1145
1146 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1147
1148 qc = ata_qc_new_init(ap, dev);
1149 BUG_ON(qc == NULL);
1150
1151 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1152 qc->dma_dir = DMA_FROM_DEVICE;
1153 qc->tf.protocol = ATA_PROT_PIO;
1154 qc->nsect = 1;
1155
1156 retry:
1157 if (dev->class == ATA_DEV_ATA) {
1158 qc->tf.command = ATA_CMD_ID_ATA;
1159 DPRINTK("do ATA identify\n");
1160 } else {
1161 qc->tf.command = ATA_CMD_ID_ATAPI;
1162 DPRINTK("do ATAPI identify\n");
1163 }
1164
1165 qc->waiting = &wait;
1166 qc->complete_fn = ata_qc_complete_noop;
1167
1168 spin_lock_irqsave(&ap->host_set->lock, flags);
1169 rc = ata_qc_issue(qc);
1170 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1171
1172 if (rc)
1173 goto err_out;
1174 else
1175 wait_for_completion(&wait);
1176
1177 status = ata_chk_status(ap);
1178 if (status & ATA_ERR) {
1179 /*
1180 * arg! EDD works for all test cases, but seems to return
1181 * the ATA signature for some ATAPI devices. Until the
1182 * reason for this is found and fixed, we fix up the mess
1183 * here. If IDENTIFY DEVICE returns command aborted
1184 * (as ATAPI devices do), then we issue an
1185 * IDENTIFY PACKET DEVICE.
1186 *
1187 * ATA software reset (SRST, the default) does not appear
1188 * to have this problem.
1189 */
1190 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1191 u8 err = ata_chk_err(ap);
1192 if (err & ATA_ABORTED) {
1193 dev->class = ATA_DEV_ATAPI;
1194 qc->cursg = 0;
1195 qc->cursg_ofs = 0;
1196 qc->cursect = 0;
1197 qc->nsect = 1;
1198 goto retry;
1199 }
1200 }
1201 goto err_out;
1202 }
1203
1204 swap_buf_le16(dev->id, ATA_ID_WORDS);
1205
1206 /* print device capabilities */
1207 printk(KERN_DEBUG "ata%u: dev %u cfg "
1208 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1209 ap->id, device, dev->id[49],
1210 dev->id[82], dev->id[83], dev->id[84],
1211 dev->id[85], dev->id[86], dev->id[87],
1212 dev->id[88]);
1213
1214 /*
1215 * common ATA, ATAPI feature tests
1216 */
1217
1218 /* we require LBA and DMA support (bits 8 & 9 of word 49) */
1219 if (!ata_id_has_dma(dev->id) || !ata_id_has_lba(dev->id)) {
1220 printk(KERN_DEBUG "ata%u: no dma/lba\n", ap->id);
1221 goto err_out_nosup;
1222 }
1223
1224 /* quick-n-dirty find max transfer mode; for printk only */
1225 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1226 if (!xfer_modes)
1227 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1228 if (!xfer_modes) {
1229 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3);
1230 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1231 }
1232
1233 ata_dump_id(dev);
1234
1235 /* ATA-specific feature tests */
1236 if (dev->class == ATA_DEV_ATA) {
1237 if (!ata_id_is_ata(dev->id)) /* sanity check */
1238 goto err_out_nosup;
1239
1240 tmp = dev->id[ATA_ID_MAJOR_VER];
1241 for (i = 14; i >= 1; i--)
1242 if (tmp & (1 << i))
1243 break;
1244
1245 /* we require at least ATA-3 */
1246 if (i < 3) {
1247 printk(KERN_DEBUG "ata%u: no ATA-3\n", ap->id);
1248 goto err_out_nosup;
1249 }
1250
1251 if (ata_id_has_lba48(dev->id)) {
1252 dev->flags |= ATA_DFLAG_LBA48;
1253 dev->n_sectors = ata_id_u64(dev->id, 100);
1254 } else {
1255 dev->n_sectors = ata_id_u32(dev->id, 60);
1256 }
1257
1258 ap->host->max_cmd_len = 16;
1259
1260 /* print device info to dmesg */
1261 printk(KERN_INFO "ata%u: dev %u ATA, max %s, %Lu sectors:%s\n",
1262 ap->id, device,
1263 ata_mode_string(xfer_modes),
1264 (unsigned long long)dev->n_sectors,
1265 dev->flags & ATA_DFLAG_LBA48 ? " lba48" : "");
1266 }
1267
1268 /* ATAPI-specific feature tests */
1269 else {
1270 if (ata_id_is_ata(dev->id)) /* sanity check */
1271 goto err_out_nosup;
1272
1273 rc = atapi_cdb_len(dev->id);
1274 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1275 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1276 goto err_out_nosup;
1277 }
1278 ap->cdb_len = (unsigned int) rc;
1279 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1280
1281 /* print device info to dmesg */
1282 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1283 ap->id, device,
1284 ata_mode_string(xfer_modes));
1285 }
1286
1287 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1288 return;
1289
1290 err_out_nosup:
1291 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1292 ap->id, device);
1293 err_out:
1294 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1295 DPRINTK("EXIT, err\n");
1296 }
1297
1298
1299 static inline u8 ata_dev_knobble(struct ata_port *ap)
1300 {
1301 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1302 }
1303
1304 /**
1305 * ata_dev_config - Run device specific handlers and check for
1306 * SATA->PATA bridges
1307 * @ap: Bus
1308 * @i: Device
1309 *
1310 * LOCKING:
1311 */
1312
1313 void ata_dev_config(struct ata_port *ap, unsigned int i)
1314 {
1315 /* limit bridge transfers to udma5, 200 sectors */
1316 if (ata_dev_knobble(ap)) {
1317 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1318 ap->id, ap->device->devno);
1319 ap->udma_mask &= ATA_UDMA5;
1320 ap->host->max_sectors = ATA_MAX_SECTORS;
1321 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1322 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1323 }
1324
1325 if (ap->ops->dev_config)
1326 ap->ops->dev_config(ap, &ap->device[i]);
1327 }
1328
1329 /**
1330 * ata_bus_probe - Reset and probe ATA bus
1331 * @ap: Bus to probe
1332 *
1333 * Master ATA bus probing function. Initiates a hardware-dependent
1334 * bus reset, then attempts to identify any devices found on
1335 * the bus.
1336 *
1337 * LOCKING:
1338 * PCI/etc. bus probe sem.
1339 *
1340 * RETURNS:
1341 * Zero on success, non-zero on error.
1342 */
1343
1344 static int ata_bus_probe(struct ata_port *ap)
1345 {
1346 unsigned int i, found = 0;
1347
1348 ap->ops->phy_reset(ap);
1349 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1350 goto err_out;
1351
1352 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1353 ata_dev_identify(ap, i);
1354 if (ata_dev_present(&ap->device[i])) {
1355 found = 1;
1356 ata_dev_config(ap,i);
1357 }
1358 }
1359
1360 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1361 goto err_out_disable;
1362
1363 ata_set_mode(ap);
1364 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1365 goto err_out_disable;
1366
1367 return 0;
1368
1369 err_out_disable:
1370 ap->ops->port_disable(ap);
1371 err_out:
1372 return -1;
1373 }
1374
1375 /**
1376 * ata_port_probe - Mark port as enabled
1377 * @ap: Port for which we indicate enablement
1378 *
1379 * Modify @ap data structure such that the system
1380 * thinks that the entire port is enabled.
1381 *
1382 * LOCKING: host_set lock, or some other form of
1383 * serialization.
1384 */
1385
1386 void ata_port_probe(struct ata_port *ap)
1387 {
1388 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1389 }
1390
1391 /**
1392 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1393 * @ap: SATA port associated with target SATA PHY.
1394 *
1395 * This function issues commands to standard SATA Sxxx
1396 * PHY registers, to wake up the phy (and device), and
1397 * clear any reset condition.
1398 *
1399 * LOCKING:
1400 * PCI/etc. bus probe sem.
1401 *
1402 */
1403 void __sata_phy_reset(struct ata_port *ap)
1404 {
1405 u32 sstatus;
1406 unsigned long timeout = jiffies + (HZ * 5);
1407
1408 if (ap->flags & ATA_FLAG_SATA_RESET) {
1409 /* issue phy wake/reset */
1410 scr_write_flush(ap, SCR_CONTROL, 0x301);
1411 /* Couldn't find anything in SATA I/II specs, but
1412 * AHCI-1.1 10.4.2 says at least 1 ms. */
1413 mdelay(1);
1414 }
1415 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1416
1417 /* wait for phy to become ready, if necessary */
1418 do {
1419 msleep(200);
1420 sstatus = scr_read(ap, SCR_STATUS);
1421 if ((sstatus & 0xf) != 1)
1422 break;
1423 } while (time_before(jiffies, timeout));
1424
1425 /* TODO: phy layer with polling, timeouts, etc. */
1426 if (sata_dev_present(ap))
1427 ata_port_probe(ap);
1428 else {
1429 sstatus = scr_read(ap, SCR_STATUS);
1430 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1431 ap->id, sstatus);
1432 ata_port_disable(ap);
1433 }
1434
1435 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1436 return;
1437
1438 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1439 ata_port_disable(ap);
1440 return;
1441 }
1442
1443 ap->cbl = ATA_CBL_SATA;
1444 }
1445
1446 /**
1447 * sata_phy_reset - Reset SATA bus.
1448 * @ap: SATA port associated with target SATA PHY.
1449 *
1450 * This function resets the SATA bus, and then probes
1451 * the bus for devices.
1452 *
1453 * LOCKING:
1454 * PCI/etc. bus probe sem.
1455 *
1456 */
1457 void sata_phy_reset(struct ata_port *ap)
1458 {
1459 __sata_phy_reset(ap);
1460 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1461 return;
1462 ata_bus_reset(ap);
1463 }
1464
1465 /**
1466 * ata_port_disable - Disable port.
1467 * @ap: Port to be disabled.
1468 *
1469 * Modify @ap data structure such that the system
1470 * thinks that the entire port is disabled, and should
1471 * never attempt to probe or communicate with devices
1472 * on this port.
1473 *
1474 * LOCKING: host_set lock, or some other form of
1475 * serialization.
1476 */
1477
1478 void ata_port_disable(struct ata_port *ap)
1479 {
1480 ap->device[0].class = ATA_DEV_NONE;
1481 ap->device[1].class = ATA_DEV_NONE;
1482 ap->flags |= ATA_FLAG_PORT_DISABLED;
1483 }
1484
1485 static struct {
1486 unsigned int shift;
1487 u8 base;
1488 } xfer_mode_classes[] = {
1489 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1490 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1491 { ATA_SHIFT_PIO, XFER_PIO_0 },
1492 };
1493
1494 static inline u8 base_from_shift(unsigned int shift)
1495 {
1496 int i;
1497
1498 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1499 if (xfer_mode_classes[i].shift == shift)
1500 return xfer_mode_classes[i].base;
1501
1502 return 0xff;
1503 }
1504
1505 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1506 {
1507 int ofs, idx;
1508 u8 base;
1509
1510 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1511 return;
1512
1513 if (dev->xfer_shift == ATA_SHIFT_PIO)
1514 dev->flags |= ATA_DFLAG_PIO;
1515
1516 ata_dev_set_xfermode(ap, dev);
1517
1518 base = base_from_shift(dev->xfer_shift);
1519 ofs = dev->xfer_mode - base;
1520 idx = ofs + dev->xfer_shift;
1521 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1522
1523 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1524 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1525
1526 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1527 ap->id, dev->devno, xfer_mode_str[idx]);
1528 }
1529
1530 static int ata_host_set_pio(struct ata_port *ap)
1531 {
1532 unsigned int mask;
1533 int x, i;
1534 u8 base, xfer_mode;
1535
1536 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1537 x = fgb(mask);
1538 if (x < 0) {
1539 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1540 return -1;
1541 }
1542
1543 base = base_from_shift(ATA_SHIFT_PIO);
1544 xfer_mode = base + x;
1545
1546 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1547 (int)base, (int)xfer_mode, mask, x);
1548
1549 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1550 struct ata_device *dev = &ap->device[i];
1551 if (ata_dev_present(dev)) {
1552 dev->pio_mode = xfer_mode;
1553 dev->xfer_mode = xfer_mode;
1554 dev->xfer_shift = ATA_SHIFT_PIO;
1555 if (ap->ops->set_piomode)
1556 ap->ops->set_piomode(ap, dev);
1557 }
1558 }
1559
1560 return 0;
1561 }
1562
1563 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1564 unsigned int xfer_shift)
1565 {
1566 int i;
1567
1568 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1569 struct ata_device *dev = &ap->device[i];
1570 if (ata_dev_present(dev)) {
1571 dev->dma_mode = xfer_mode;
1572 dev->xfer_mode = xfer_mode;
1573 dev->xfer_shift = xfer_shift;
1574 if (ap->ops->set_dmamode)
1575 ap->ops->set_dmamode(ap, dev);
1576 }
1577 }
1578 }
1579
1580 /**
1581 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1582 * @ap: port on which timings will be programmed
1583 *
1584 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1585 *
1586 * LOCKING:
1587 * PCI/etc. bus probe sem.
1588 *
1589 */
1590 static void ata_set_mode(struct ata_port *ap)
1591 {
1592 unsigned int i, xfer_shift;
1593 u8 xfer_mode;
1594 int rc;
1595
1596 /* step 1: always set host PIO timings */
1597 rc = ata_host_set_pio(ap);
1598 if (rc)
1599 goto err_out;
1600
1601 /* step 2: choose the best data xfer mode */
1602 xfer_mode = xfer_shift = 0;
1603 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1604 if (rc)
1605 goto err_out;
1606
1607 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1608 if (xfer_shift != ATA_SHIFT_PIO)
1609 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1610
1611 /* step 4: update devices' xfer mode */
1612 ata_dev_set_mode(ap, &ap->device[0]);
1613 ata_dev_set_mode(ap, &ap->device[1]);
1614
1615 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1616 return;
1617
1618 if (ap->ops->post_set_mode)
1619 ap->ops->post_set_mode(ap);
1620
1621 for (i = 0; i < 2; i++) {
1622 struct ata_device *dev = &ap->device[i];
1623 ata_dev_set_protocol(dev);
1624 }
1625
1626 return;
1627
1628 err_out:
1629 ata_port_disable(ap);
1630 }
1631
1632 /**
1633 * ata_busy_sleep - sleep until BSY clears, or timeout
1634 * @ap: port containing status register to be polled
1635 * @tmout_pat: impatience timeout
1636 * @tmout: overall timeout
1637 *
1638 * Sleep until ATA Status register bit BSY clears,
1639 * or a timeout occurs.
1640 *
1641 * LOCKING: None.
1642 *
1643 */
1644
1645 static unsigned int ata_busy_sleep (struct ata_port *ap,
1646 unsigned long tmout_pat,
1647 unsigned long tmout)
1648 {
1649 unsigned long timer_start, timeout;
1650 u8 status;
1651
1652 status = ata_busy_wait(ap, ATA_BUSY, 300);
1653 timer_start = jiffies;
1654 timeout = timer_start + tmout_pat;
1655 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1656 msleep(50);
1657 status = ata_busy_wait(ap, ATA_BUSY, 3);
1658 }
1659
1660 if (status & ATA_BUSY)
1661 printk(KERN_WARNING "ata%u is slow to respond, "
1662 "please be patient\n", ap->id);
1663
1664 timeout = timer_start + tmout;
1665 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1666 msleep(50);
1667 status = ata_chk_status(ap);
1668 }
1669
1670 if (status & ATA_BUSY) {
1671 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1672 ap->id, tmout / HZ);
1673 return 1;
1674 }
1675
1676 return 0;
1677 }
1678
1679 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1680 {
1681 struct ata_ioports *ioaddr = &ap->ioaddr;
1682 unsigned int dev0 = devmask & (1 << 0);
1683 unsigned int dev1 = devmask & (1 << 1);
1684 unsigned long timeout;
1685
1686 /* if device 0 was found in ata_devchk, wait for its
1687 * BSY bit to clear
1688 */
1689 if (dev0)
1690 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1691
1692 /* if device 1 was found in ata_devchk, wait for
1693 * register access, then wait for BSY to clear
1694 */
1695 timeout = jiffies + ATA_TMOUT_BOOT;
1696 while (dev1) {
1697 u8 nsect, lbal;
1698
1699 ap->ops->dev_select(ap, 1);
1700 if (ap->flags & ATA_FLAG_MMIO) {
1701 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1702 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1703 } else {
1704 nsect = inb(ioaddr->nsect_addr);
1705 lbal = inb(ioaddr->lbal_addr);
1706 }
1707 if ((nsect == 1) && (lbal == 1))
1708 break;
1709 if (time_after(jiffies, timeout)) {
1710 dev1 = 0;
1711 break;
1712 }
1713 msleep(50); /* give drive a breather */
1714 }
1715 if (dev1)
1716 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1717
1718 /* is all this really necessary? */
1719 ap->ops->dev_select(ap, 0);
1720 if (dev1)
1721 ap->ops->dev_select(ap, 1);
1722 if (dev0)
1723 ap->ops->dev_select(ap, 0);
1724 }
1725
1726 /**
1727 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1728 * @ap: Port to reset and probe
1729 *
1730 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1731 * probe the bus. Not often used these days.
1732 *
1733 * LOCKING:
1734 * PCI/etc. bus probe sem.
1735 *
1736 */
1737
1738 static unsigned int ata_bus_edd(struct ata_port *ap)
1739 {
1740 struct ata_taskfile tf;
1741
1742 /* set up execute-device-diag (bus reset) taskfile */
1743 /* also, take interrupts to a known state (disabled) */
1744 DPRINTK("execute-device-diag\n");
1745 ata_tf_init(ap, &tf, 0);
1746 tf.ctl |= ATA_NIEN;
1747 tf.command = ATA_CMD_EDD;
1748 tf.protocol = ATA_PROT_NODATA;
1749
1750 /* do bus reset */
1751 ata_tf_to_host(ap, &tf);
1752
1753 /* spec says at least 2ms. but who knows with those
1754 * crazy ATAPI devices...
1755 */
1756 msleep(150);
1757
1758 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1759 }
1760
1761 static unsigned int ata_bus_softreset(struct ata_port *ap,
1762 unsigned int devmask)
1763 {
1764 struct ata_ioports *ioaddr = &ap->ioaddr;
1765
1766 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1767
1768 /* software reset. causes dev0 to be selected */
1769 if (ap->flags & ATA_FLAG_MMIO) {
1770 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1771 udelay(20); /* FIXME: flush */
1772 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1773 udelay(20); /* FIXME: flush */
1774 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1775 } else {
1776 outb(ap->ctl, ioaddr->ctl_addr);
1777 udelay(10);
1778 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1779 udelay(10);
1780 outb(ap->ctl, ioaddr->ctl_addr);
1781 }
1782
1783 /* spec mandates ">= 2ms" before checking status.
1784 * We wait 150ms, because that was the magic delay used for
1785 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1786 * between when the ATA command register is written, and then
1787 * status is checked. Because waiting for "a while" before
1788 * checking status is fine, post SRST, we perform this magic
1789 * delay here as well.
1790 */
1791 msleep(150);
1792
1793 ata_bus_post_reset(ap, devmask);
1794
1795 return 0;
1796 }
1797
1798 /**
1799 * ata_bus_reset - reset host port and associated ATA channel
1800 * @ap: port to reset
1801 *
1802 * This is typically the first time we actually start issuing
1803 * commands to the ATA channel. We wait for BSY to clear, then
1804 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1805 * result. Determine what devices, if any, are on the channel
1806 * by looking at the device 0/1 error register. Look at the signature
1807 * stored in each device's taskfile registers, to determine if
1808 * the device is ATA or ATAPI.
1809 *
1810 * LOCKING:
1811 * PCI/etc. bus probe sem.
1812 * Obtains host_set lock.
1813 *
1814 * SIDE EFFECTS:
1815 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1816 */
1817
1818 void ata_bus_reset(struct ata_port *ap)
1819 {
1820 struct ata_ioports *ioaddr = &ap->ioaddr;
1821 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1822 u8 err;
1823 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1824
1825 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1826
1827 /* determine if device 0/1 are present */
1828 if (ap->flags & ATA_FLAG_SATA_RESET)
1829 dev0 = 1;
1830 else {
1831 dev0 = ata_devchk(ap, 0);
1832 if (slave_possible)
1833 dev1 = ata_devchk(ap, 1);
1834 }
1835
1836 if (dev0)
1837 devmask |= (1 << 0);
1838 if (dev1)
1839 devmask |= (1 << 1);
1840
1841 /* select device 0 again */
1842 ap->ops->dev_select(ap, 0);
1843
1844 /* issue bus reset */
1845 if (ap->flags & ATA_FLAG_SRST)
1846 rc = ata_bus_softreset(ap, devmask);
1847 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1848 /* set up device control */
1849 if (ap->flags & ATA_FLAG_MMIO)
1850 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1851 else
1852 outb(ap->ctl, ioaddr->ctl_addr);
1853 rc = ata_bus_edd(ap);
1854 }
1855
1856 if (rc)
1857 goto err_out;
1858
1859 /*
1860 * determine by signature whether we have ATA or ATAPI devices
1861 */
1862 err = ata_dev_try_classify(ap, 0);
1863 if ((slave_possible) && (err != 0x81))
1864 ata_dev_try_classify(ap, 1);
1865
1866 /* re-enable interrupts */
1867 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1868 ata_irq_on(ap);
1869
1870 /* is double-select really necessary? */
1871 if (ap->device[1].class != ATA_DEV_NONE)
1872 ap->ops->dev_select(ap, 1);
1873 if (ap->device[0].class != ATA_DEV_NONE)
1874 ap->ops->dev_select(ap, 0);
1875
1876 /* if no devices were detected, disable this port */
1877 if ((ap->device[0].class == ATA_DEV_NONE) &&
1878 (ap->device[1].class == ATA_DEV_NONE))
1879 goto err_out;
1880
1881 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1882 /* set up device control for ATA_FLAG_SATA_RESET */
1883 if (ap->flags & ATA_FLAG_MMIO)
1884 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1885 else
1886 outb(ap->ctl, ioaddr->ctl_addr);
1887 }
1888
1889 DPRINTK("EXIT\n");
1890 return;
1891
1892 err_out:
1893 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1894 ap->ops->port_disable(ap);
1895
1896 DPRINTK("EXIT\n");
1897 }
1898
1899 static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
1900 {
1901 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1902 ap->id, dev->devno);
1903 }
1904
1905 static const char * ata_dma_blacklist [] = {
1906 "WDC AC11000H",
1907 "WDC AC22100H",
1908 "WDC AC32500H",
1909 "WDC AC33100H",
1910 "WDC AC31600H",
1911 "WDC AC32100H",
1912 "WDC AC23200L",
1913 "Compaq CRD-8241B",
1914 "CRD-8400B",
1915 "CRD-8480B",
1916 "CRD-8482B",
1917 "CRD-84",
1918 "SanDisk SDP3B",
1919 "SanDisk SDP3B-64",
1920 "SANYO CD-ROM CRD",
1921 "HITACHI CDR-8",
1922 "HITACHI CDR-8335",
1923 "HITACHI CDR-8435",
1924 "Toshiba CD-ROM XM-6202B",
1925 "TOSHIBA CD-ROM XM-1702BC",
1926 "CD-532E-A",
1927 "E-IDE CD-ROM CR-840",
1928 "CD-ROM Drive/F5A",
1929 "WPI CDD-820",
1930 "SAMSUNG CD-ROM SC-148C",
1931 "SAMSUNG CD-ROM SC",
1932 "SanDisk SDP3B-64",
1933 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
1934 "_NEC DV5800A",
1935 };
1936
1937 static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1938 {
1939 unsigned char model_num[40];
1940 char *s;
1941 unsigned int len;
1942 int i;
1943
1944 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
1945 sizeof(model_num));
1946 s = &model_num[0];
1947 len = strnlen(s, sizeof(model_num));
1948
1949 /* ATAPI specifies that empty space is blank-filled; remove blanks */
1950 while ((len > 0) && (s[len - 1] == ' ')) {
1951 len--;
1952 s[len] = 0;
1953 }
1954
1955 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
1956 if (!strncmp(ata_dma_blacklist[i], s, len))
1957 return 1;
1958
1959 return 0;
1960 }
1961
1962 static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
1963 {
1964 struct ata_device *master, *slave;
1965 unsigned int mask;
1966
1967 master = &ap->device[0];
1968 slave = &ap->device[1];
1969
1970 assert (ata_dev_present(master) || ata_dev_present(slave));
1971
1972 if (shift == ATA_SHIFT_UDMA) {
1973 mask = ap->udma_mask;
1974 if (ata_dev_present(master)) {
1975 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
1976 if (ata_dma_blacklisted(ap, master)) {
1977 mask = 0;
1978 ata_pr_blacklisted(ap, master);
1979 }
1980 }
1981 if (ata_dev_present(slave)) {
1982 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
1983 if (ata_dma_blacklisted(ap, slave)) {
1984 mask = 0;
1985 ata_pr_blacklisted(ap, slave);
1986 }
1987 }
1988 }
1989 else if (shift == ATA_SHIFT_MWDMA) {
1990 mask = ap->mwdma_mask;
1991 if (ata_dev_present(master)) {
1992 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
1993 if (ata_dma_blacklisted(ap, master)) {
1994 mask = 0;
1995 ata_pr_blacklisted(ap, master);
1996 }
1997 }
1998 if (ata_dev_present(slave)) {
1999 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2000 if (ata_dma_blacklisted(ap, slave)) {
2001 mask = 0;
2002 ata_pr_blacklisted(ap, slave);
2003 }
2004 }
2005 }
2006 else if (shift == ATA_SHIFT_PIO) {
2007 mask = ap->pio_mask;
2008 if (ata_dev_present(master)) {
2009 /* spec doesn't return explicit support for
2010 * PIO0-2, so we fake it
2011 */
2012 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2013 tmp_mode <<= 3;
2014 tmp_mode |= 0x7;
2015 mask &= tmp_mode;
2016 }
2017 if (ata_dev_present(slave)) {
2018 /* spec doesn't return explicit support for
2019 * PIO0-2, so we fake it
2020 */
2021 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2022 tmp_mode <<= 3;
2023 tmp_mode |= 0x7;
2024 mask &= tmp_mode;
2025 }
2026 }
2027 else {
2028 mask = 0xffffffff; /* shut up compiler warning */
2029 BUG();
2030 }
2031
2032 return mask;
2033 }
2034
2035 /* find greatest bit */
2036 static int fgb(u32 bitmap)
2037 {
2038 unsigned int i;
2039 int x = -1;
2040
2041 for (i = 0; i < 32; i++)
2042 if (bitmap & (1 << i))
2043 x = i;
2044
2045 return x;
2046 }
2047
2048 /**
2049 * ata_choose_xfer_mode - attempt to find best transfer mode
2050 * @ap: Port for which an xfer mode will be selected
2051 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2052 * @xfer_shift_out: (output) bit shift that selects this mode
2053 *
2054 * Based on host and device capabilities, determine the
2055 * maximum transfer mode that is amenable to all.
2056 *
2057 * LOCKING:
2058 * PCI/etc. bus probe sem.
2059 *
2060 * RETURNS:
2061 * Zero on success, negative on error.
2062 */
2063
2064 static int ata_choose_xfer_mode(struct ata_port *ap,
2065 u8 *xfer_mode_out,
2066 unsigned int *xfer_shift_out)
2067 {
2068 unsigned int mask, shift;
2069 int x, i;
2070
2071 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2072 shift = xfer_mode_classes[i].shift;
2073 mask = ata_get_mode_mask(ap, shift);
2074
2075 x = fgb(mask);
2076 if (x >= 0) {
2077 *xfer_mode_out = xfer_mode_classes[i].base + x;
2078 *xfer_shift_out = shift;
2079 return 0;
2080 }
2081 }
2082
2083 return -1;
2084 }
2085
2086 /**
2087 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2088 * @ap: Port associated with device @dev
2089 * @dev: Device to which command will be sent
2090 *
2091 * Issue SET FEATURES - XFER MODE command to device @dev
2092 * on port @ap.
2093 *
2094 * LOCKING:
2095 * PCI/etc. bus probe sem.
2096 */
2097
2098 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2099 {
2100 DECLARE_COMPLETION(wait);
2101 struct ata_queued_cmd *qc;
2102 int rc;
2103 unsigned long flags;
2104
2105 /* set up set-features taskfile */
2106 DPRINTK("set features - xfer mode\n");
2107
2108 qc = ata_qc_new_init(ap, dev);
2109 BUG_ON(qc == NULL);
2110
2111 qc->tf.command = ATA_CMD_SET_FEATURES;
2112 qc->tf.feature = SETFEATURES_XFER;
2113 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2114 qc->tf.protocol = ATA_PROT_NODATA;
2115 qc->tf.nsect = dev->xfer_mode;
2116
2117 qc->waiting = &wait;
2118 qc->complete_fn = ata_qc_complete_noop;
2119
2120 spin_lock_irqsave(&ap->host_set->lock, flags);
2121 rc = ata_qc_issue(qc);
2122 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2123
2124 if (rc)
2125 ata_port_disable(ap);
2126 else
2127 wait_for_completion(&wait);
2128
2129 DPRINTK("EXIT\n");
2130 }
2131
2132 /**
2133 * ata_sg_clean - Unmap DMA memory associated with command
2134 * @qc: Command containing DMA memory to be released
2135 *
2136 * Unmap all mapped DMA memory associated with this command.
2137 *
2138 * LOCKING:
2139 * spin_lock_irqsave(host_set lock)
2140 */
2141
2142 static void ata_sg_clean(struct ata_queued_cmd *qc)
2143 {
2144 struct ata_port *ap = qc->ap;
2145 struct scatterlist *sg = qc->sg;
2146 int dir = qc->dma_dir;
2147
2148 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2149 assert(sg != NULL);
2150
2151 if (qc->flags & ATA_QCFLAG_SINGLE)
2152 assert(qc->n_elem == 1);
2153
2154 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2155
2156 if (qc->flags & ATA_QCFLAG_SG)
2157 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2158 else
2159 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2160 sg_dma_len(&sg[0]), dir);
2161
2162 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2163 qc->sg = NULL;
2164 }
2165
2166 /**
2167 * ata_fill_sg - Fill PCI IDE PRD table
2168 * @qc: Metadata associated with taskfile to be transferred
2169 *
2170 * Fill PCI IDE PRD (scatter-gather) table with segments
2171 * associated with the current disk command.
2172 *
2173 * LOCKING:
2174 * spin_lock_irqsave(host_set lock)
2175 *
2176 */
2177 static void ata_fill_sg(struct ata_queued_cmd *qc)
2178 {
2179 struct scatterlist *sg = qc->sg;
2180 struct ata_port *ap = qc->ap;
2181 unsigned int idx, nelem;
2182
2183 assert(sg != NULL);
2184 assert(qc->n_elem > 0);
2185
2186 idx = 0;
2187 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
2188 u32 addr, offset;
2189 u32 sg_len, len;
2190
2191 /* determine if physical DMA addr spans 64K boundary.
2192 * Note h/w doesn't support 64-bit, so we unconditionally
2193 * truncate dma_addr_t to u32.
2194 */
2195 addr = (u32) sg_dma_address(sg);
2196 sg_len = sg_dma_len(sg);
2197
2198 while (sg_len) {
2199 offset = addr & 0xffff;
2200 len = sg_len;
2201 if ((offset + sg_len) > 0x10000)
2202 len = 0x10000 - offset;
2203
2204 ap->prd[idx].addr = cpu_to_le32(addr);
2205 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2206 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2207
2208 idx++;
2209 sg_len -= len;
2210 addr += len;
2211 }
2212 }
2213
2214 if (idx)
2215 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2216 }
2217 /**
2218 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2219 * @qc: Metadata associated with taskfile to check
2220 *
2221 * Allow low-level driver to filter ATA PACKET commands, returning
2222 * a status indicating whether or not it is OK to use DMA for the
2223 * supplied PACKET command.
2224 *
2225 * LOCKING:
2226 * spin_lock_irqsave(host_set lock)
2227 *
2228 * RETURNS: 0 when ATAPI DMA can be used
2229 * nonzero otherwise
2230 */
2231 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2232 {
2233 struct ata_port *ap = qc->ap;
2234 int rc = 0; /* Assume ATAPI DMA is OK by default */
2235
2236 if (ap->ops->check_atapi_dma)
2237 rc = ap->ops->check_atapi_dma(qc);
2238
2239 return rc;
2240 }
2241 /**
2242 * ata_qc_prep - Prepare taskfile for submission
2243 * @qc: Metadata associated with taskfile to be prepared
2244 *
2245 * Prepare ATA taskfile for submission.
2246 *
2247 * LOCKING:
2248 * spin_lock_irqsave(host_set lock)
2249 */
2250 void ata_qc_prep(struct ata_queued_cmd *qc)
2251 {
2252 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2253 return;
2254
2255 ata_fill_sg(qc);
2256 }
2257
2258 /**
2259 * ata_sg_init_one - Associate command with memory buffer
2260 * @qc: Command to be associated
2261 * @buf: Memory buffer
2262 * @buflen: Length of memory buffer, in bytes.
2263 *
2264 * Initialize the data-related elements of queued_cmd @qc
2265 * to point to a single memory buffer, @buf of byte length @buflen.
2266 *
2267 * LOCKING:
2268 * spin_lock_irqsave(host_set lock)
2269 */
2270
2271 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2272 {
2273 struct scatterlist *sg;
2274
2275 qc->flags |= ATA_QCFLAG_SINGLE;
2276
2277 memset(&qc->sgent, 0, sizeof(qc->sgent));
2278 qc->sg = &qc->sgent;
2279 qc->n_elem = 1;
2280 qc->buf_virt = buf;
2281
2282 sg = qc->sg;
2283 sg->page = virt_to_page(buf);
2284 sg->offset = (unsigned long) buf & ~PAGE_MASK;
2285 sg->length = buflen;
2286 }
2287
2288 /**
2289 * ata_sg_init - Associate command with scatter-gather table.
2290 * @qc: Command to be associated
2291 * @sg: Scatter-gather table.
2292 * @n_elem: Number of elements in s/g table.
2293 *
2294 * Initialize the data-related elements of queued_cmd @qc
2295 * to point to a scatter-gather table @sg, containing @n_elem
2296 * elements.
2297 *
2298 * LOCKING:
2299 * spin_lock_irqsave(host_set lock)
2300 */
2301
2302 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2303 unsigned int n_elem)
2304 {
2305 qc->flags |= ATA_QCFLAG_SG;
2306 qc->sg = sg;
2307 qc->n_elem = n_elem;
2308 }
2309
2310 /**
2311 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2312 * @qc: Command with memory buffer to be mapped.
2313 *
2314 * DMA-map the memory buffer associated with queued_cmd @qc.
2315 *
2316 * LOCKING:
2317 * spin_lock_irqsave(host_set lock)
2318 *
2319 * RETURNS:
2320 * Zero on success, negative on error.
2321 */
2322
2323 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2324 {
2325 struct ata_port *ap = qc->ap;
2326 int dir = qc->dma_dir;
2327 struct scatterlist *sg = qc->sg;
2328 dma_addr_t dma_address;
2329
2330 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2331 sg->length, dir);
2332 if (dma_mapping_error(dma_address))
2333 return -1;
2334
2335 sg_dma_address(sg) = dma_address;
2336 sg_dma_len(sg) = sg->length;
2337
2338 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2339 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2340
2341 return 0;
2342 }
2343
2344 /**
2345 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2346 * @qc: Command with scatter-gather table to be mapped.
2347 *
2348 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2349 *
2350 * LOCKING:
2351 * spin_lock_irqsave(host_set lock)
2352 *
2353 * RETURNS:
2354 * Zero on success, negative on error.
2355 *
2356 */
2357
2358 static int ata_sg_setup(struct ata_queued_cmd *qc)
2359 {
2360 struct ata_port *ap = qc->ap;
2361 struct scatterlist *sg = qc->sg;
2362 int n_elem, dir;
2363
2364 VPRINTK("ENTER, ata%u\n", ap->id);
2365 assert(qc->flags & ATA_QCFLAG_SG);
2366
2367 dir = qc->dma_dir;
2368 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2369 if (n_elem < 1)
2370 return -1;
2371
2372 DPRINTK("%d sg elements mapped\n", n_elem);
2373
2374 qc->n_elem = n_elem;
2375
2376 return 0;
2377 }
2378
2379 /**
2380 * ata_pio_poll -
2381 * @ap:
2382 *
2383 * LOCKING:
2384 * None. (executing in kernel thread context)
2385 *
2386 * RETURNS:
2387 *
2388 */
2389
2390 static unsigned long ata_pio_poll(struct ata_port *ap)
2391 {
2392 u8 status;
2393 unsigned int poll_state = PIO_ST_UNKNOWN;
2394 unsigned int reg_state = PIO_ST_UNKNOWN;
2395 const unsigned int tmout_state = PIO_ST_TMOUT;
2396
2397 switch (ap->pio_task_state) {
2398 case PIO_ST:
2399 case PIO_ST_POLL:
2400 poll_state = PIO_ST_POLL;
2401 reg_state = PIO_ST;
2402 break;
2403 case PIO_ST_LAST:
2404 case PIO_ST_LAST_POLL:
2405 poll_state = PIO_ST_LAST_POLL;
2406 reg_state = PIO_ST_LAST;
2407 break;
2408 default:
2409 BUG();
2410 break;
2411 }
2412
2413 status = ata_chk_status(ap);
2414 if (status & ATA_BUSY) {
2415 if (time_after(jiffies, ap->pio_task_timeout)) {
2416 ap->pio_task_state = tmout_state;
2417 return 0;
2418 }
2419 ap->pio_task_state = poll_state;
2420 return ATA_SHORT_PAUSE;
2421 }
2422
2423 ap->pio_task_state = reg_state;
2424 return 0;
2425 }
2426
2427 /**
2428 * ata_pio_complete -
2429 * @ap:
2430 *
2431 * LOCKING:
2432 * None. (executing in kernel thread context)
2433 */
2434
2435 static void ata_pio_complete (struct ata_port *ap)
2436 {
2437 struct ata_queued_cmd *qc;
2438 u8 drv_stat;
2439
2440 /*
2441 * This is purely hueristic. This is a fast path.
2442 * Sometimes when we enter, BSY will be cleared in
2443 * a chk-status or two. If not, the drive is probably seeking
2444 * or something. Snooze for a couple msecs, then
2445 * chk-status again. If still busy, fall back to
2446 * PIO_ST_POLL state.
2447 */
2448 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2449 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2450 msleep(2);
2451 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2452 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2453 ap->pio_task_state = PIO_ST_LAST_POLL;
2454 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2455 return;
2456 }
2457 }
2458
2459 drv_stat = ata_wait_idle(ap);
2460 if (!ata_ok(drv_stat)) {
2461 ap->pio_task_state = PIO_ST_ERR;
2462 return;
2463 }
2464
2465 qc = ata_qc_from_tag(ap, ap->active_tag);
2466 assert(qc != NULL);
2467
2468 ap->pio_task_state = PIO_ST_IDLE;
2469
2470 ata_irq_on(ap);
2471
2472 ata_qc_complete(qc, drv_stat);
2473 }
2474
2475
2476 /**
2477 * swap_buf_le16 -
2478 * @buf: Buffer to swap
2479 * @buf_words: Number of 16-bit words in buffer.
2480 *
2481 * Swap halves of 16-bit words if needed to convert from
2482 * little-endian byte order to native cpu byte order, or
2483 * vice-versa.
2484 *
2485 * LOCKING:
2486 */
2487 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2488 {
2489 #ifdef __BIG_ENDIAN
2490 unsigned int i;
2491
2492 for (i = 0; i < buf_words; i++)
2493 buf[i] = le16_to_cpu(buf[i]);
2494 #endif /* __BIG_ENDIAN */
2495 }
2496
2497 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2498 unsigned int buflen, int write_data)
2499 {
2500 unsigned int i;
2501 unsigned int words = buflen >> 1;
2502 u16 *buf16 = (u16 *) buf;
2503 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2504
2505 if (write_data) {
2506 for (i = 0; i < words; i++)
2507 writew(le16_to_cpu(buf16[i]), mmio);
2508 } else {
2509 for (i = 0; i < words; i++)
2510 buf16[i] = cpu_to_le16(readw(mmio));
2511 }
2512 }
2513
2514 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2515 unsigned int buflen, int write_data)
2516 {
2517 unsigned int dwords = buflen >> 1;
2518
2519 if (write_data)
2520 outsw(ap->ioaddr.data_addr, buf, dwords);
2521 else
2522 insw(ap->ioaddr.data_addr, buf, dwords);
2523 }
2524
2525 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2526 unsigned int buflen, int do_write)
2527 {
2528 if (ap->flags & ATA_FLAG_MMIO)
2529 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2530 else
2531 ata_pio_data_xfer(ap, buf, buflen, do_write);
2532 }
2533
2534 static void ata_pio_sector(struct ata_queued_cmd *qc)
2535 {
2536 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2537 struct scatterlist *sg = qc->sg;
2538 struct ata_port *ap = qc->ap;
2539 struct page *page;
2540 unsigned int offset;
2541 unsigned char *buf;
2542
2543 if (qc->cursect == (qc->nsect - 1))
2544 ap->pio_task_state = PIO_ST_LAST;
2545
2546 page = sg[qc->cursg].page;
2547 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2548
2549 /* get the current page and offset */
2550 page = nth_page(page, (offset >> PAGE_SHIFT));
2551 offset %= PAGE_SIZE;
2552
2553 buf = kmap(page) + offset;
2554
2555 qc->cursect++;
2556 qc->cursg_ofs++;
2557
2558 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
2559 qc->cursg++;
2560 qc->cursg_ofs = 0;
2561 }
2562
2563 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2564
2565 /* do the actual data transfer */
2566 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2567 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2568
2569 kunmap(page);
2570 }
2571
2572 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2573 {
2574 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2575 struct scatterlist *sg = qc->sg;
2576 struct ata_port *ap = qc->ap;
2577 struct page *page;
2578 unsigned char *buf;
2579 unsigned int offset, count;
2580
2581 if (qc->curbytes == qc->nbytes - bytes)
2582 ap->pio_task_state = PIO_ST_LAST;
2583
2584 next_sg:
2585 sg = &qc->sg[qc->cursg];
2586
2587 page = sg->page;
2588 offset = sg->offset + qc->cursg_ofs;
2589
2590 /* get the current page and offset */
2591 page = nth_page(page, (offset >> PAGE_SHIFT));
2592 offset %= PAGE_SIZE;
2593
2594 /* don't overrun current sg */
2595 count = min(sg->length - qc->cursg_ofs, bytes);
2596
2597 /* don't cross page boundaries */
2598 count = min(count, (unsigned int)PAGE_SIZE - offset);
2599
2600 buf = kmap(page) + offset;
2601
2602 bytes -= count;
2603 qc->curbytes += count;
2604 qc->cursg_ofs += count;
2605
2606 if (qc->cursg_ofs == sg->length) {
2607 qc->cursg++;
2608 qc->cursg_ofs = 0;
2609 }
2610
2611 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2612
2613 /* do the actual data transfer */
2614 ata_data_xfer(ap, buf, count, do_write);
2615
2616 kunmap(page);
2617
2618 if (bytes) {
2619 goto next_sg;
2620 }
2621 }
2622
2623 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2624 {
2625 struct ata_port *ap = qc->ap;
2626 struct ata_device *dev = qc->dev;
2627 unsigned int ireason, bc_lo, bc_hi, bytes;
2628 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
2629
2630 ap->ops->tf_read(ap, &qc->tf);
2631 ireason = qc->tf.nsect;
2632 bc_lo = qc->tf.lbam;
2633 bc_hi = qc->tf.lbah;
2634 bytes = (bc_hi << 8) | bc_lo;
2635
2636 /* shall be cleared to zero, indicating xfer of data */
2637 if (ireason & (1 << 0))
2638 goto err_out;
2639
2640 /* make sure transfer direction matches expected */
2641 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
2642 if (do_write != i_write)
2643 goto err_out;
2644
2645 __atapi_pio_bytes(qc, bytes);
2646
2647 return;
2648
2649 err_out:
2650 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2651 ap->id, dev->devno);
2652 ap->pio_task_state = PIO_ST_ERR;
2653 }
2654
2655 /**
2656 * ata_pio_sector -
2657 * @ap:
2658 *
2659 * LOCKING:
2660 * None. (executing in kernel thread context)
2661 */
2662
2663 static void ata_pio_block(struct ata_port *ap)
2664 {
2665 struct ata_queued_cmd *qc;
2666 u8 status;
2667
2668 /*
2669 * This is purely hueristic. This is a fast path.
2670 * Sometimes when we enter, BSY will be cleared in
2671 * a chk-status or two. If not, the drive is probably seeking
2672 * or something. Snooze for a couple msecs, then
2673 * chk-status again. If still busy, fall back to
2674 * PIO_ST_POLL state.
2675 */
2676 status = ata_busy_wait(ap, ATA_BUSY, 5);
2677 if (status & ATA_BUSY) {
2678 msleep(2);
2679 status = ata_busy_wait(ap, ATA_BUSY, 10);
2680 if (status & ATA_BUSY) {
2681 ap->pio_task_state = PIO_ST_POLL;
2682 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2683 return;
2684 }
2685 }
2686
2687 qc = ata_qc_from_tag(ap, ap->active_tag);
2688 assert(qc != NULL);
2689
2690 if (is_atapi_taskfile(&qc->tf)) {
2691 /* no more data to transfer or unsupported ATAPI command */
2692 if ((status & ATA_DRQ) == 0) {
2693 ap->pio_task_state = PIO_ST_IDLE;
2694
2695 ata_irq_on(ap);
2696
2697 ata_qc_complete(qc, status);
2698 return;
2699 }
2700
2701 atapi_pio_bytes(qc);
2702 } else {
2703 /* handle BSY=0, DRQ=0 as error */
2704 if ((status & ATA_DRQ) == 0) {
2705 ap->pio_task_state = PIO_ST_ERR;
2706 return;
2707 }
2708
2709 ata_pio_sector(qc);
2710 }
2711 }
2712
2713 static void ata_pio_error(struct ata_port *ap)
2714 {
2715 struct ata_queued_cmd *qc;
2716 u8 drv_stat;
2717
2718 qc = ata_qc_from_tag(ap, ap->active_tag);
2719 assert(qc != NULL);
2720
2721 drv_stat = ata_chk_status(ap);
2722 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
2723 ap->id, drv_stat);
2724
2725 ap->pio_task_state = PIO_ST_IDLE;
2726
2727 ata_irq_on(ap);
2728
2729 ata_qc_complete(qc, drv_stat | ATA_ERR);
2730 }
2731
2732 static void ata_pio_task(void *_data)
2733 {
2734 struct ata_port *ap = _data;
2735 unsigned long timeout = 0;
2736
2737 switch (ap->pio_task_state) {
2738 case PIO_ST_IDLE:
2739 return;
2740
2741 case PIO_ST:
2742 ata_pio_block(ap);
2743 break;
2744
2745 case PIO_ST_LAST:
2746 ata_pio_complete(ap);
2747 break;
2748
2749 case PIO_ST_POLL:
2750 case PIO_ST_LAST_POLL:
2751 timeout = ata_pio_poll(ap);
2752 break;
2753
2754 case PIO_ST_TMOUT:
2755 case PIO_ST_ERR:
2756 ata_pio_error(ap);
2757 return;
2758 }
2759
2760 if (timeout)
2761 queue_delayed_work(ata_wq, &ap->pio_task,
2762 timeout);
2763 else
2764 queue_work(ata_wq, &ap->pio_task);
2765 }
2766
2767 static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
2768 struct scsi_cmnd *cmd)
2769 {
2770 DECLARE_COMPLETION(wait);
2771 struct ata_queued_cmd *qc;
2772 unsigned long flags;
2773 int rc;
2774
2775 DPRINTK("ATAPI request sense\n");
2776
2777 qc = ata_qc_new_init(ap, dev);
2778 BUG_ON(qc == NULL);
2779
2780 /* FIXME: is this needed? */
2781 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
2782
2783 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
2784 qc->dma_dir = DMA_FROM_DEVICE;
2785
2786 memset(&qc->cdb, 0, ap->cdb_len);
2787 qc->cdb[0] = REQUEST_SENSE;
2788 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2789
2790 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2791 qc->tf.command = ATA_CMD_PACKET;
2792
2793 qc->tf.protocol = ATA_PROT_ATAPI;
2794 qc->tf.lbam = (8 * 1024) & 0xff;
2795 qc->tf.lbah = (8 * 1024) >> 8;
2796 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
2797
2798 qc->waiting = &wait;
2799 qc->complete_fn = ata_qc_complete_noop;
2800
2801 spin_lock_irqsave(&ap->host_set->lock, flags);
2802 rc = ata_qc_issue(qc);
2803 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2804
2805 if (rc)
2806 ata_port_disable(ap);
2807 else
2808 wait_for_completion(&wait);
2809
2810 DPRINTK("EXIT\n");
2811 }
2812
2813 /**
2814 * ata_qc_timeout - Handle timeout of queued command
2815 * @qc: Command that timed out
2816 *
2817 * Some part of the kernel (currently, only the SCSI layer)
2818 * has noticed that the active command on port @ap has not
2819 * completed after a specified length of time. Handle this
2820 * condition by disabling DMA (if necessary) and completing
2821 * transactions, with error if necessary.
2822 *
2823 * This also handles the case of the "lost interrupt", where
2824 * for some reason (possibly hardware bug, possibly driver bug)
2825 * an interrupt was not delivered to the driver, even though the
2826 * transaction completed successfully.
2827 *
2828 * LOCKING:
2829 * Inherited from SCSI layer (none, can sleep)
2830 */
2831
2832 static void ata_qc_timeout(struct ata_queued_cmd *qc)
2833 {
2834 struct ata_port *ap = qc->ap;
2835 struct ata_device *dev = qc->dev;
2836 u8 host_stat = 0, drv_stat;
2837
2838 DPRINTK("ENTER\n");
2839
2840 /* FIXME: doesn't this conflict with timeout handling? */
2841 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
2842 struct scsi_cmnd *cmd = qc->scsicmd;
2843
2844 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
2845
2846 /* finish completing original command */
2847 __ata_qc_complete(qc);
2848
2849 atapi_request_sense(ap, dev, cmd);
2850
2851 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
2852 scsi_finish_command(cmd);
2853
2854 goto out;
2855 }
2856 }
2857
2858 /* hack alert! We cannot use the supplied completion
2859 * function from inside the ->eh_strategy_handler() thread.
2860 * libata is the only user of ->eh_strategy_handler() in
2861 * any kernel, so the default scsi_done() assumes it is
2862 * not being called from the SCSI EH.
2863 */
2864 qc->scsidone = scsi_finish_command;
2865
2866 switch (qc->tf.protocol) {
2867
2868 case ATA_PROT_DMA:
2869 case ATA_PROT_ATAPI_DMA:
2870 host_stat = ap->ops->bmdma_status(ap);
2871
2872 /* before we do anything else, clear DMA-Start bit */
2873 ap->ops->bmdma_stop(ap);
2874
2875 /* fall through */
2876
2877 default:
2878 ata_altstatus(ap);
2879 drv_stat = ata_chk_status(ap);
2880
2881 /* ack bmdma irq events */
2882 ap->ops->irq_clear(ap);
2883
2884 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
2885 ap->id, qc->tf.command, drv_stat, host_stat);
2886
2887 /* complete taskfile transaction */
2888 ata_qc_complete(qc, drv_stat);
2889 break;
2890 }
2891 out:
2892 DPRINTK("EXIT\n");
2893 }
2894
2895 /**
2896 * ata_eng_timeout - Handle timeout of queued command
2897 * @ap: Port on which timed-out command is active
2898 *
2899 * Some part of the kernel (currently, only the SCSI layer)
2900 * has noticed that the active command on port @ap has not
2901 * completed after a specified length of time. Handle this
2902 * condition by disabling DMA (if necessary) and completing
2903 * transactions, with error if necessary.
2904 *
2905 * This also handles the case of the "lost interrupt", where
2906 * for some reason (possibly hardware bug, possibly driver bug)
2907 * an interrupt was not delivered to the driver, even though the
2908 * transaction completed successfully.
2909 *
2910 * LOCKING:
2911 * Inherited from SCSI layer (none, can sleep)
2912 */
2913
2914 void ata_eng_timeout(struct ata_port *ap)
2915 {
2916 struct ata_queued_cmd *qc;
2917
2918 DPRINTK("ENTER\n");
2919
2920 qc = ata_qc_from_tag(ap, ap->active_tag);
2921 if (!qc) {
2922 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
2923 ap->id);
2924 goto out;
2925 }
2926
2927 ata_qc_timeout(qc);
2928
2929 out:
2930 DPRINTK("EXIT\n");
2931 }
2932
2933 /**
2934 * ata_qc_new - Request an available ATA command, for queueing
2935 * @ap: Port associated with device @dev
2936 * @dev: Device from whom we request an available command structure
2937 *
2938 * LOCKING:
2939 * None.
2940 */
2941
2942 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
2943 {
2944 struct ata_queued_cmd *qc = NULL;
2945 unsigned int i;
2946
2947 for (i = 0; i < ATA_MAX_QUEUE; i++)
2948 if (!test_and_set_bit(i, &ap->qactive)) {
2949 qc = ata_qc_from_tag(ap, i);
2950 break;
2951 }
2952
2953 if (qc)
2954 qc->tag = i;
2955
2956 return qc;
2957 }
2958
2959 /**
2960 * ata_qc_new_init - Request an available ATA command, and initialize it
2961 * @ap: Port associated with device @dev
2962 * @dev: Device from whom we request an available command structure
2963 *
2964 * LOCKING:
2965 * None.
2966 */
2967
2968 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
2969 struct ata_device *dev)
2970 {
2971 struct ata_queued_cmd *qc;
2972
2973 qc = ata_qc_new(ap);
2974 if (qc) {
2975 qc->sg = NULL;
2976 qc->flags = 0;
2977 qc->scsicmd = NULL;
2978 qc->ap = ap;
2979 qc->dev = dev;
2980 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
2981 qc->nsect = 0;
2982 qc->nbytes = qc->curbytes = 0;
2983
2984 ata_tf_init(ap, &qc->tf, dev->devno);
2985
2986 if (dev->flags & ATA_DFLAG_LBA48)
2987 qc->tf.flags |= ATA_TFLAG_LBA48;
2988 }
2989
2990 return qc;
2991 }
2992
2993 static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
2994 {
2995 return 0;
2996 }
2997
2998 static void __ata_qc_complete(struct ata_queued_cmd *qc)
2999 {
3000 struct ata_port *ap = qc->ap;
3001 unsigned int tag, do_clear = 0;
3002
3003 qc->flags = 0;
3004 tag = qc->tag;
3005 if (likely(ata_tag_valid(tag))) {
3006 if (tag == ap->active_tag)
3007 ap->active_tag = ATA_TAG_POISON;
3008 qc->tag = ATA_TAG_POISON;
3009 do_clear = 1;
3010 }
3011
3012 if (qc->waiting) {
3013 struct completion *waiting = qc->waiting;
3014 qc->waiting = NULL;
3015 complete(waiting);
3016 }
3017
3018 if (likely(do_clear))
3019 clear_bit(tag, &ap->qactive);
3020 }
3021
3022 /**
3023 * ata_qc_free - free unused ata_queued_cmd
3024 * @qc: Command to complete
3025 *
3026 * Designed to free unused ata_queued_cmd object
3027 * in case something prevents using it.
3028 *
3029 * LOCKING:
3030 * spin_lock_irqsave(host_set lock)
3031 *
3032 */
3033 void ata_qc_free(struct ata_queued_cmd *qc)
3034 {
3035 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3036 assert(qc->waiting == NULL); /* nothing should be waiting */
3037
3038 __ata_qc_complete(qc);
3039 }
3040
3041 /**
3042 * ata_qc_complete - Complete an active ATA command
3043 * @qc: Command to complete
3044 * @drv_stat: ATA Status register contents
3045 *
3046 * Indicate to the mid and upper layers that an ATA
3047 * command has completed, with either an ok or not-ok status.
3048 *
3049 * LOCKING:
3050 * spin_lock_irqsave(host_set lock)
3051 *
3052 */
3053
3054 void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3055 {
3056 int rc;
3057
3058 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3059 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3060
3061 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3062 ata_sg_clean(qc);
3063
3064 /* call completion callback */
3065 rc = qc->complete_fn(qc, drv_stat);
3066 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3067
3068 /* if callback indicates not to complete command (non-zero),
3069 * return immediately
3070 */
3071 if (rc != 0)
3072 return;
3073
3074 __ata_qc_complete(qc);
3075
3076 VPRINTK("EXIT\n");
3077 }
3078
3079 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3080 {
3081 struct ata_port *ap = qc->ap;
3082
3083 switch (qc->tf.protocol) {
3084 case ATA_PROT_DMA:
3085 case ATA_PROT_ATAPI_DMA:
3086 return 1;
3087
3088 case ATA_PROT_ATAPI:
3089 case ATA_PROT_PIO:
3090 case ATA_PROT_PIO_MULT:
3091 if (ap->flags & ATA_FLAG_PIO_DMA)
3092 return 1;
3093
3094 /* fall through */
3095
3096 default:
3097 return 0;
3098 }
3099
3100 /* never reached */
3101 }
3102
3103 /**
3104 * ata_qc_issue - issue taskfile to device
3105 * @qc: command to issue to device
3106 *
3107 * Prepare an ATA command to submission to device.
3108 * This includes mapping the data into a DMA-able
3109 * area, filling in the S/G table, and finally
3110 * writing the taskfile to hardware, starting the command.
3111 *
3112 * LOCKING:
3113 * spin_lock_irqsave(host_set lock)
3114 *
3115 * RETURNS:
3116 * Zero on success, negative on error.
3117 */
3118
3119 int ata_qc_issue(struct ata_queued_cmd *qc)
3120 {
3121 struct ata_port *ap = qc->ap;
3122
3123 if (ata_should_dma_map(qc)) {
3124 if (qc->flags & ATA_QCFLAG_SG) {
3125 if (ata_sg_setup(qc))
3126 goto err_out;
3127 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3128 if (ata_sg_setup_one(qc))
3129 goto err_out;
3130 }
3131 } else {
3132 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3133 }
3134
3135 ap->ops->qc_prep(qc);
3136
3137 qc->ap->active_tag = qc->tag;
3138 qc->flags |= ATA_QCFLAG_ACTIVE;
3139
3140 return ap->ops->qc_issue(qc);
3141
3142 err_out:
3143 return -1;
3144 }
3145
3146
3147 /**
3148 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3149 * @qc: command to issue to device
3150 *
3151 * Using various libata functions and hooks, this function
3152 * starts an ATA command. ATA commands are grouped into
3153 * classes called "protocols", and issuing each type of protocol
3154 * is slightly different.
3155 *
3156 * May be used as the qc_issue() entry in ata_port_operations.
3157 *
3158 * LOCKING:
3159 * spin_lock_irqsave(host_set lock)
3160 *
3161 * RETURNS:
3162 * Zero on success, negative on error.
3163 */
3164
3165 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3166 {
3167 struct ata_port *ap = qc->ap;
3168
3169 ata_dev_select(ap, qc->dev->devno, 1, 0);
3170
3171 switch (qc->tf.protocol) {
3172 case ATA_PROT_NODATA:
3173 ata_tf_to_host_nolock(ap, &qc->tf);
3174 break;
3175
3176 case ATA_PROT_DMA:
3177 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3178 ap->ops->bmdma_setup(qc); /* set up bmdma */
3179 ap->ops->bmdma_start(qc); /* initiate bmdma */
3180 break;
3181
3182 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3183 ata_qc_set_polling(qc);
3184 ata_tf_to_host_nolock(ap, &qc->tf);
3185 ap->pio_task_state = PIO_ST;
3186 queue_work(ata_wq, &ap->pio_task);
3187 break;
3188
3189 case ATA_PROT_ATAPI:
3190 ata_qc_set_polling(qc);
3191 ata_tf_to_host_nolock(ap, &qc->tf);
3192 queue_work(ata_wq, &ap->packet_task);
3193 break;
3194
3195 case ATA_PROT_ATAPI_NODATA:
3196 ata_tf_to_host_nolock(ap, &qc->tf);
3197 queue_work(ata_wq, &ap->packet_task);
3198 break;
3199
3200 case ATA_PROT_ATAPI_DMA:
3201 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3202 ap->ops->bmdma_setup(qc); /* set up bmdma */
3203 queue_work(ata_wq, &ap->packet_task);
3204 break;
3205
3206 default:
3207 WARN_ON(1);
3208 return -1;
3209 }
3210
3211 return 0;
3212 }
3213
3214 /**
3215 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3216 * @qc: Info associated with this ATA transaction.
3217 *
3218 * LOCKING:
3219 * spin_lock_irqsave(host_set lock)
3220 */
3221
3222 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3223 {
3224 struct ata_port *ap = qc->ap;
3225 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3226 u8 dmactl;
3227 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3228
3229 /* load PRD table addr. */
3230 mb(); /* make sure PRD table writes are visible to controller */
3231 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3232
3233 /* specify data direction, triple-check start bit is clear */
3234 dmactl = readb(mmio + ATA_DMA_CMD);
3235 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3236 if (!rw)
3237 dmactl |= ATA_DMA_WR;
3238 writeb(dmactl, mmio + ATA_DMA_CMD);
3239
3240 /* issue r/w command */
3241 ap->ops->exec_command(ap, &qc->tf);
3242 }
3243
3244 /**
3245 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3246 * @qc: Info associated with this ATA transaction.
3247 *
3248 * LOCKING:
3249 * spin_lock_irqsave(host_set lock)
3250 */
3251
3252 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3253 {
3254 struct ata_port *ap = qc->ap;
3255 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3256 u8 dmactl;
3257
3258 /* start host DMA transaction */
3259 dmactl = readb(mmio + ATA_DMA_CMD);
3260 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3261
3262 /* Strictly, one may wish to issue a readb() here, to
3263 * flush the mmio write. However, control also passes
3264 * to the hardware at this point, and it will interrupt
3265 * us when we are to resume control. So, in effect,
3266 * we don't care when the mmio write flushes.
3267 * Further, a read of the DMA status register _immediately_
3268 * following the write may not be what certain flaky hardware
3269 * is expected, so I think it is best to not add a readb()
3270 * without first all the MMIO ATA cards/mobos.
3271 * Or maybe I'm just being paranoid.
3272 */
3273 }
3274
3275 /**
3276 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3277 * @qc: Info associated with this ATA transaction.
3278 *
3279 * LOCKING:
3280 * spin_lock_irqsave(host_set lock)
3281 */
3282
3283 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3284 {
3285 struct ata_port *ap = qc->ap;
3286 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3287 u8 dmactl;
3288
3289 /* load PRD table addr. */
3290 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3291
3292 /* specify data direction, triple-check start bit is clear */
3293 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3294 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3295 if (!rw)
3296 dmactl |= ATA_DMA_WR;
3297 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3298
3299 /* issue r/w command */
3300 ap->ops->exec_command(ap, &qc->tf);
3301 }
3302
3303 /**
3304 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3305 * @qc: Info associated with this ATA transaction.
3306 *
3307 * LOCKING:
3308 * spin_lock_irqsave(host_set lock)
3309 */
3310
3311 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3312 {
3313 struct ata_port *ap = qc->ap;
3314 u8 dmactl;
3315
3316 /* start host DMA transaction */
3317 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3318 outb(dmactl | ATA_DMA_START,
3319 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3320 }
3321
3322
3323 /**
3324 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3325 * @qc: Info associated with this ATA transaction.
3326 *
3327 * Writes the ATA_DMA_START flag to the DMA command register.
3328 *
3329 * May be used as the bmdma_start() entry in ata_port_operations.
3330 *
3331 * LOCKING:
3332 * spin_lock_irqsave(host_set lock)
3333 */
3334 void ata_bmdma_start(struct ata_queued_cmd *qc)
3335 {
3336 if (qc->ap->flags & ATA_FLAG_MMIO)
3337 ata_bmdma_start_mmio(qc);
3338 else
3339 ata_bmdma_start_pio(qc);
3340 }
3341
3342
3343 /**
3344 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3345 * @qc: Info associated with this ATA transaction.
3346 *
3347 * Writes address of PRD table to device's PRD Table Address
3348 * register, sets the DMA control register, and calls
3349 * ops->exec_command() to start the transfer.
3350 *
3351 * May be used as the bmdma_setup() entry in ata_port_operations.
3352 *
3353 * LOCKING:
3354 * spin_lock_irqsave(host_set lock)
3355 */
3356 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3357 {
3358 if (qc->ap->flags & ATA_FLAG_MMIO)
3359 ata_bmdma_setup_mmio(qc);
3360 else
3361 ata_bmdma_setup_pio(qc);
3362 }
3363
3364
3365 /**
3366 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3367 * @ap: Port associated with this ATA transaction.
3368 *
3369 * Clear interrupt and error flags in DMA status register.
3370 *
3371 * May be used as the irq_clear() entry in ata_port_operations.
3372 *
3373 * LOCKING:
3374 * spin_lock_irqsave(host_set lock)
3375 */
3376
3377 void ata_bmdma_irq_clear(struct ata_port *ap)
3378 {
3379 if (ap->flags & ATA_FLAG_MMIO) {
3380 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3381 writeb(readb(mmio), mmio);
3382 } else {
3383 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3384 outb(inb(addr), addr);
3385 }
3386
3387 }
3388
3389
3390 /**
3391 * ata_bmdma_status - Read PCI IDE BMDMA status
3392 * @ap: Port associated with this ATA transaction.
3393 *
3394 * Read and return BMDMA status register.
3395 *
3396 * May be used as the bmdma_status() entry in ata_port_operations.
3397 *
3398 * LOCKING:
3399 * spin_lock_irqsave(host_set lock)
3400 */
3401
3402 u8 ata_bmdma_status(struct ata_port *ap)
3403 {
3404 u8 host_stat;
3405 if (ap->flags & ATA_FLAG_MMIO) {
3406 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3407 host_stat = readb(mmio + ATA_DMA_STATUS);
3408 } else
3409 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3410 return host_stat;
3411 }
3412
3413
3414 /**
3415 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3416 * @ap: Port associated with this ATA transaction.
3417 *
3418 * Clears the ATA_DMA_START flag in the dma control register
3419 *
3420 * May be used as the bmdma_stop() entry in ata_port_operations.
3421 *
3422 * LOCKING:
3423 * spin_lock_irqsave(host_set lock)
3424 */
3425
3426 void ata_bmdma_stop(struct ata_port *ap)
3427 {
3428 if (ap->flags & ATA_FLAG_MMIO) {
3429 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3430
3431 /* clear start/stop bit */
3432 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3433 mmio + ATA_DMA_CMD);
3434 } else {
3435 /* clear start/stop bit */
3436 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3437 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3438 }
3439
3440 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3441 ata_altstatus(ap); /* dummy read */
3442 }
3443
3444 /**
3445 * ata_host_intr - Handle host interrupt for given (port, task)
3446 * @ap: Port on which interrupt arrived (possibly...)
3447 * @qc: Taskfile currently active in engine
3448 *
3449 * Handle host interrupt for given queued command. Currently,
3450 * only DMA interrupts are handled. All other commands are
3451 * handled via polling with interrupts disabled (nIEN bit).
3452 *
3453 * LOCKING:
3454 * spin_lock_irqsave(host_set lock)
3455 *
3456 * RETURNS:
3457 * One if interrupt was handled, zero if not (shared irq).
3458 */
3459
3460 inline unsigned int ata_host_intr (struct ata_port *ap,
3461 struct ata_queued_cmd *qc)
3462 {
3463 u8 status, host_stat;
3464
3465 switch (qc->tf.protocol) {
3466
3467 case ATA_PROT_DMA:
3468 case ATA_PROT_ATAPI_DMA:
3469 case ATA_PROT_ATAPI:
3470 /* check status of DMA engine */
3471 host_stat = ap->ops->bmdma_status(ap);
3472 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3473
3474 /* if it's not our irq... */
3475 if (!(host_stat & ATA_DMA_INTR))
3476 goto idle_irq;
3477
3478 /* before we do anything else, clear DMA-Start bit */
3479 ap->ops->bmdma_stop(ap);
3480
3481 /* fall through */
3482
3483 case ATA_PROT_ATAPI_NODATA:
3484 case ATA_PROT_NODATA:
3485 /* check altstatus */
3486 status = ata_altstatus(ap);
3487 if (status & ATA_BUSY)
3488 goto idle_irq;
3489
3490 /* check main status, clearing INTRQ */
3491 status = ata_chk_status(ap);
3492 if (unlikely(status & ATA_BUSY))
3493 goto idle_irq;
3494 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3495 ap->id, qc->tf.protocol, status);
3496
3497 /* ack bmdma irq events */
3498 ap->ops->irq_clear(ap);
3499
3500 /* complete taskfile transaction */
3501 ata_qc_complete(qc, status);
3502 break;
3503
3504 default:
3505 goto idle_irq;
3506 }
3507
3508 return 1; /* irq handled */
3509
3510 idle_irq:
3511 ap->stats.idle_irq++;
3512
3513 #ifdef ATA_IRQ_TRAP
3514 if ((ap->stats.idle_irq % 1000) == 0) {
3515 handled = 1;
3516 ata_irq_ack(ap, 0); /* debug trap */
3517 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3518 }
3519 #endif
3520 return 0; /* irq not handled */
3521 }
3522
3523 /**
3524 * ata_interrupt - Default ATA host interrupt handler
3525 * @irq: irq line (unused)
3526 * @dev_instance: pointer to our ata_host_set information structure
3527 * @regs: unused
3528 *
3529 * Default interrupt handler for PCI IDE devices. Calls
3530 * ata_host_intr() for each port that is not disabled.
3531 *
3532 * LOCKING:
3533 * Obtains host_set lock during operation.
3534 *
3535 * RETURNS:
3536 * IRQ_NONE or IRQ_HANDLED.
3537 *
3538 */
3539
3540 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3541 {
3542 struct ata_host_set *host_set = dev_instance;
3543 unsigned int i;
3544 unsigned int handled = 0;
3545 unsigned long flags;
3546
3547 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3548 spin_lock_irqsave(&host_set->lock, flags);
3549
3550 for (i = 0; i < host_set->n_ports; i++) {
3551 struct ata_port *ap;
3552
3553 ap = host_set->ports[i];
3554 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) {
3555 struct ata_queued_cmd *qc;
3556
3557 qc = ata_qc_from_tag(ap, ap->active_tag);
3558 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
3559 (qc->flags & ATA_QCFLAG_ACTIVE))
3560 handled |= ata_host_intr(ap, qc);
3561 }
3562 }
3563
3564 spin_unlock_irqrestore(&host_set->lock, flags);
3565
3566 return IRQ_RETVAL(handled);
3567 }
3568
3569 /**
3570 * atapi_packet_task - Write CDB bytes to hardware
3571 * @_data: Port to which ATAPI device is attached.
3572 *
3573 * When device has indicated its readiness to accept
3574 * a CDB, this function is called. Send the CDB.
3575 * If DMA is to be performed, exit immediately.
3576 * Otherwise, we are in polling mode, so poll
3577 * status under operation succeeds or fails.
3578 *
3579 * LOCKING:
3580 * Kernel thread context (may sleep)
3581 */
3582
3583 static void atapi_packet_task(void *_data)
3584 {
3585 struct ata_port *ap = _data;
3586 struct ata_queued_cmd *qc;
3587 u8 status;
3588
3589 qc = ata_qc_from_tag(ap, ap->active_tag);
3590 assert(qc != NULL);
3591 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3592
3593 /* sleep-wait for BSY to clear */
3594 DPRINTK("busy wait\n");
3595 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
3596 goto err_out;
3597
3598 /* make sure DRQ is set */
3599 status = ata_chk_status(ap);
3600 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
3601 goto err_out;
3602
3603 /* send SCSI cdb */
3604 DPRINTK("send cdb\n");
3605 assert(ap->cdb_len >= 12);
3606 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3607
3608 /* if we are DMA'ing, irq handler takes over from here */
3609 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3610 ap->ops->bmdma_start(qc); /* initiate bmdma */
3611
3612 /* non-data commands are also handled via irq */
3613 else if (qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3614 /* do nothing */
3615 }
3616
3617 /* PIO commands are handled by polling */
3618 else {
3619 ap->pio_task_state = PIO_ST;
3620 queue_work(ata_wq, &ap->pio_task);
3621 }
3622
3623 return;
3624
3625 err_out:
3626 ata_qc_complete(qc, ATA_ERR);
3627 }
3628
3629
3630 /**
3631 * ata_port_start - Set port up for dma.
3632 * @ap: Port to initialize
3633 *
3634 * Called just after data structures for each port are
3635 * initialized. Allocates space for PRD table.
3636 *
3637 * May be used as the port_start() entry in ata_port_operations.
3638 *
3639 * LOCKING:
3640 */
3641
3642 int ata_port_start (struct ata_port *ap)
3643 {
3644 struct device *dev = ap->host_set->dev;
3645
3646 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
3647 if (!ap->prd)
3648 return -ENOMEM;
3649
3650 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
3651
3652 return 0;
3653 }
3654
3655
3656 /**
3657 * ata_port_stop - Undo ata_port_start()
3658 * @ap: Port to shut down
3659 *
3660 * Frees the PRD table.
3661 *
3662 * May be used as the port_stop() entry in ata_port_operations.
3663 *
3664 * LOCKING:
3665 */
3666
3667 void ata_port_stop (struct ata_port *ap)
3668 {
3669 struct device *dev = ap->host_set->dev;
3670
3671 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
3672 }
3673
3674 void ata_host_stop (struct ata_host_set *host_set)
3675 {
3676 if (host_set->mmio_base)
3677 iounmap(host_set->mmio_base);
3678 }
3679
3680
3681 /**
3682 * ata_host_remove - Unregister SCSI host structure with upper layers
3683 * @ap: Port to unregister
3684 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
3685 *
3686 * LOCKING:
3687 */
3688
3689 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
3690 {
3691 struct Scsi_Host *sh = ap->host;
3692
3693 DPRINTK("ENTER\n");
3694
3695 if (do_unregister)
3696 scsi_remove_host(sh);
3697
3698 ap->ops->port_stop(ap);
3699 }
3700
3701 /**
3702 * ata_host_init - Initialize an ata_port structure
3703 * @ap: Structure to initialize
3704 * @host: associated SCSI mid-layer structure
3705 * @host_set: Collection of hosts to which @ap belongs
3706 * @ent: Probe information provided by low-level driver
3707 * @port_no: Port number associated with this ata_port
3708 *
3709 * Initialize a new ata_port structure, and its associated
3710 * scsi_host.
3711 *
3712 * LOCKING:
3713 * Inherited from caller.
3714 *
3715 */
3716
3717 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3718 struct ata_host_set *host_set,
3719 struct ata_probe_ent *ent, unsigned int port_no)
3720 {
3721 unsigned int i;
3722
3723 host->max_id = 16;
3724 host->max_lun = 1;
3725 host->max_channel = 1;
3726 host->unique_id = ata_unique_id++;
3727 host->max_cmd_len = 12;
3728
3729 scsi_assign_lock(host, &host_set->lock);
3730
3731 ap->flags = ATA_FLAG_PORT_DISABLED;
3732 ap->id = host->unique_id;
3733 ap->host = host;
3734 ap->ctl = ATA_DEVCTL_OBS;
3735 ap->host_set = host_set;
3736 ap->port_no = port_no;
3737 ap->hard_port_no =
3738 ent->legacy_mode ? ent->hard_port_no : port_no;
3739 ap->pio_mask = ent->pio_mask;
3740 ap->mwdma_mask = ent->mwdma_mask;
3741 ap->udma_mask = ent->udma_mask;
3742 ap->flags |= ent->host_flags;
3743 ap->ops = ent->port_ops;
3744 ap->cbl = ATA_CBL_NONE;
3745 ap->active_tag = ATA_TAG_POISON;
3746 ap->last_ctl = 0xFF;
3747
3748 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
3749 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
3750
3751 for (i = 0; i < ATA_MAX_DEVICES; i++)
3752 ap->device[i].devno = i;
3753
3754 #ifdef ATA_IRQ_TRAP
3755 ap->stats.unhandled_irq = 1;
3756 ap->stats.idle_irq = 1;
3757 #endif
3758
3759 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
3760 }
3761
3762 /**
3763 * ata_host_add - Attach low-level ATA driver to system
3764 * @ent: Information provided by low-level driver
3765 * @host_set: Collections of ports to which we add
3766 * @port_no: Port number associated with this host
3767 *
3768 * Attach low-level ATA driver to system.
3769 *
3770 * LOCKING:
3771 * PCI/etc. bus probe sem.
3772 *
3773 * RETURNS:
3774 * New ata_port on success, for NULL on error.
3775 *
3776 */
3777
3778 static struct ata_port * ata_host_add(struct ata_probe_ent *ent,
3779 struct ata_host_set *host_set,
3780 unsigned int port_no)
3781 {
3782 struct Scsi_Host *host;
3783 struct ata_port *ap;
3784 int rc;
3785
3786 DPRINTK("ENTER\n");
3787 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
3788 if (!host)
3789 return NULL;
3790
3791 ap = (struct ata_port *) &host->hostdata[0];
3792
3793 ata_host_init(ap, host, host_set, ent, port_no);
3794
3795 rc = ap->ops->port_start(ap);
3796 if (rc)
3797 goto err_out;
3798
3799 return ap;
3800
3801 err_out:
3802 scsi_host_put(host);
3803 return NULL;
3804 }
3805
3806 /**
3807 * ata_device_add - Register hardware device with ATA and SCSI layers
3808 * @ent: Probe information describing hardware device to be registered
3809 *
3810 * This function processes the information provided in the probe
3811 * information struct @ent, allocates the necessary ATA and SCSI
3812 * host information structures, initializes them, and registers
3813 * everything with requisite kernel subsystems.
3814 *
3815 * This function requests irqs, probes the ATA bus, and probes
3816 * the SCSI bus.
3817 *
3818 * LOCKING:
3819 * PCI/etc. bus probe sem.
3820 *
3821 * RETURNS:
3822 * Number of ports registered. Zero on error (no ports registered).
3823 *
3824 */
3825
3826 int ata_device_add(struct ata_probe_ent *ent)
3827 {
3828 unsigned int count = 0, i;
3829 struct device *dev = ent->dev;
3830 struct ata_host_set *host_set;
3831
3832 DPRINTK("ENTER\n");
3833 /* alloc a container for our list of ATA ports (buses) */
3834 host_set = kmalloc(sizeof(struct ata_host_set) +
3835 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
3836 if (!host_set)
3837 return 0;
3838 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
3839 spin_lock_init(&host_set->lock);
3840
3841 host_set->dev = dev;
3842 host_set->n_ports = ent->n_ports;
3843 host_set->irq = ent->irq;
3844 host_set->mmio_base = ent->mmio_base;
3845 host_set->private_data = ent->private_data;
3846 host_set->ops = ent->port_ops;
3847
3848 /* register each port bound to this device */
3849 for (i = 0; i < ent->n_ports; i++) {
3850 struct ata_port *ap;
3851 unsigned long xfer_mode_mask;
3852
3853 ap = ata_host_add(ent, host_set, i);
3854 if (!ap)
3855 goto err_out;
3856
3857 host_set->ports[i] = ap;
3858 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
3859 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
3860 (ap->pio_mask << ATA_SHIFT_PIO);
3861
3862 /* print per-port info to dmesg */
3863 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
3864 "bmdma 0x%lX irq %lu\n",
3865 ap->id,
3866 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
3867 ata_mode_string(xfer_mode_mask),
3868 ap->ioaddr.cmd_addr,
3869 ap->ioaddr.ctl_addr,
3870 ap->ioaddr.bmdma_addr,
3871 ent->irq);
3872
3873 ata_chk_status(ap);
3874 host_set->ops->irq_clear(ap);
3875 count++;
3876 }
3877
3878 if (!count) {
3879 kfree(host_set);
3880 return 0;
3881 }
3882
3883 /* obtain irq, that is shared between channels */
3884 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
3885 DRV_NAME, host_set))
3886 goto err_out;
3887
3888 /* perform each probe synchronously */
3889 DPRINTK("probe begin\n");
3890 for (i = 0; i < count; i++) {
3891 struct ata_port *ap;
3892 int rc;
3893
3894 ap = host_set->ports[i];
3895
3896 DPRINTK("ata%u: probe begin\n", ap->id);
3897 rc = ata_bus_probe(ap);
3898 DPRINTK("ata%u: probe end\n", ap->id);
3899
3900 if (rc) {
3901 /* FIXME: do something useful here?
3902 * Current libata behavior will
3903 * tear down everything when
3904 * the module is removed
3905 * or the h/w is unplugged.
3906 */
3907 }
3908
3909 rc = scsi_add_host(ap->host, dev);
3910 if (rc) {
3911 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
3912 ap->id);
3913 /* FIXME: do something useful here */
3914 /* FIXME: handle unconditional calls to
3915 * scsi_scan_host and ata_host_remove, below,
3916 * at the very least
3917 */
3918 }
3919 }
3920
3921 /* probes are done, now scan each port's disk(s) */
3922 DPRINTK("probe begin\n");
3923 for (i = 0; i < count; i++) {
3924 struct ata_port *ap = host_set->ports[i];
3925
3926 scsi_scan_host(ap->host);
3927 }
3928
3929 dev_set_drvdata(dev, host_set);
3930
3931 VPRINTK("EXIT, returning %u\n", ent->n_ports);
3932 return ent->n_ports; /* success */
3933
3934 err_out:
3935 for (i = 0; i < count; i++) {
3936 ata_host_remove(host_set->ports[i], 1);
3937 scsi_host_put(host_set->ports[i]->host);
3938 }
3939 kfree(host_set);
3940 VPRINTK("EXIT, returning 0\n");
3941 return 0;
3942 }
3943
3944 /**
3945 * ata_scsi_release - SCSI layer callback hook for host unload
3946 * @host: libata host to be unloaded
3947 *
3948 * Performs all duties necessary to shut down a libata port...
3949 * Kill port kthread, disable port, and release resources.
3950 *
3951 * LOCKING:
3952 * Inherited from SCSI layer.
3953 *
3954 * RETURNS:
3955 * One.
3956 */
3957
3958 int ata_scsi_release(struct Scsi_Host *host)
3959 {
3960 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
3961
3962 DPRINTK("ENTER\n");
3963
3964 ap->ops->port_disable(ap);
3965 ata_host_remove(ap, 0);
3966
3967 DPRINTK("EXIT\n");
3968 return 1;
3969 }
3970
3971 /**
3972 * ata_std_ports - initialize ioaddr with standard port offsets.
3973 * @ioaddr: IO address structure to be initialized
3974 *
3975 * Utility function which initializes data_addr, error_addr,
3976 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
3977 * device_addr, status_addr, and command_addr to standard offsets
3978 * relative to cmd_addr.
3979 *
3980 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
3981 */
3982
3983 void ata_std_ports(struct ata_ioports *ioaddr)
3984 {
3985 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
3986 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
3987 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
3988 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
3989 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
3990 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
3991 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
3992 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
3993 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
3994 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
3995 }
3996
3997 static struct ata_probe_ent *
3998 ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
3999 {
4000 struct ata_probe_ent *probe_ent;
4001
4002 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
4003 if (!probe_ent) {
4004 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4005 kobject_name(&(dev->kobj)));
4006 return NULL;
4007 }
4008
4009 memset(probe_ent, 0, sizeof(*probe_ent));
4010
4011 INIT_LIST_HEAD(&probe_ent->node);
4012 probe_ent->dev = dev;
4013
4014 probe_ent->sht = port->sht;
4015 probe_ent->host_flags = port->host_flags;
4016 probe_ent->pio_mask = port->pio_mask;
4017 probe_ent->mwdma_mask = port->mwdma_mask;
4018 probe_ent->udma_mask = port->udma_mask;
4019 probe_ent->port_ops = port->port_ops;
4020
4021 return probe_ent;
4022 }
4023
4024
4025
4026 /**
4027 * ata_pci_init_native_mode - Initialize native-mode driver
4028 * @pdev: pci device to be initialized
4029 * @port: array[2] of pointers to port info structures.
4030 *
4031 * Utility function which allocates and initializes an
4032 * ata_probe_ent structure for a standard dual-port
4033 * PIO-based IDE controller. The returned ata_probe_ent
4034 * structure can be passed to ata_device_add(). The returned
4035 * ata_probe_ent structure should then be freed with kfree().
4036 */
4037
4038 #ifdef CONFIG_PCI
4039 struct ata_probe_ent *
4040 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
4041 {
4042 struct ata_probe_ent *probe_ent =
4043 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4044 if (!probe_ent)
4045 return NULL;
4046
4047 probe_ent->n_ports = 2;
4048 probe_ent->irq = pdev->irq;
4049 probe_ent->irq_flags = SA_SHIRQ;
4050
4051 probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
4052 probe_ent->port[0].altstatus_addr =
4053 probe_ent->port[0].ctl_addr =
4054 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4055 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4056
4057 probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
4058 probe_ent->port[1].altstatus_addr =
4059 probe_ent->port[1].ctl_addr =
4060 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4061 probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4062
4063 ata_std_ports(&probe_ent->port[0]);
4064 ata_std_ports(&probe_ent->port[1]);
4065
4066 return probe_ent;
4067 }
4068
4069 static struct ata_probe_ent *
4070 ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
4071 struct ata_probe_ent **ppe2)
4072 {
4073 struct ata_probe_ent *probe_ent, *probe_ent2;
4074
4075 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4076 if (!probe_ent)
4077 return NULL;
4078 probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
4079 if (!probe_ent2) {
4080 kfree(probe_ent);
4081 return NULL;
4082 }
4083
4084 probe_ent->n_ports = 1;
4085 probe_ent->irq = 14;
4086
4087 probe_ent->hard_port_no = 0;
4088 probe_ent->legacy_mode = 1;
4089
4090 probe_ent2->n_ports = 1;
4091 probe_ent2->irq = 15;
4092
4093 probe_ent2->hard_port_no = 1;
4094 probe_ent2->legacy_mode = 1;
4095
4096 probe_ent->port[0].cmd_addr = 0x1f0;
4097 probe_ent->port[0].altstatus_addr =
4098 probe_ent->port[0].ctl_addr = 0x3f6;
4099 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4100
4101 probe_ent2->port[0].cmd_addr = 0x170;
4102 probe_ent2->port[0].altstatus_addr =
4103 probe_ent2->port[0].ctl_addr = 0x376;
4104 probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
4105
4106 ata_std_ports(&probe_ent->port[0]);
4107 ata_std_ports(&probe_ent2->port[0]);
4108
4109 *ppe2 = probe_ent2;
4110 return probe_ent;
4111 }
4112
4113 /**
4114 * ata_pci_init_one - Initialize/register PCI IDE host controller
4115 * @pdev: Controller to be initialized
4116 * @port_info: Information from low-level host driver
4117 * @n_ports: Number of ports attached to host controller
4118 *
4119 * This is a helper function which can be called from a driver's
4120 * xxx_init_one() probe function if the hardware uses traditional
4121 * IDE taskfile registers.
4122 *
4123 * This function calls pci_enable_device(), reserves its register
4124 * regions, sets the dma mask, enables bus master mode, and calls
4125 * ata_device_add()
4126 *
4127 * LOCKING:
4128 * Inherited from PCI layer (may sleep).
4129 *
4130 * RETURNS:
4131 * Zero on success, negative on errno-based value on error.
4132 *
4133 */
4134
4135 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4136 unsigned int n_ports)
4137 {
4138 struct ata_probe_ent *probe_ent, *probe_ent2 = NULL;
4139 struct ata_port_info *port[2];
4140 u8 tmp8, mask;
4141 unsigned int legacy_mode = 0;
4142 int disable_dev_on_err = 1;
4143 int rc;
4144
4145 DPRINTK("ENTER\n");
4146
4147 port[0] = port_info[0];
4148 if (n_ports > 1)
4149 port[1] = port_info[1];
4150 else
4151 port[1] = port[0];
4152
4153 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4154 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4155 /* TODO: support transitioning to native mode? */
4156 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4157 mask = (1 << 2) | (1 << 0);
4158 if ((tmp8 & mask) != mask)
4159 legacy_mode = (1 << 3);
4160 }
4161
4162 /* FIXME... */
4163 if ((!legacy_mode) && (n_ports > 1)) {
4164 printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n");
4165 return -EINVAL;
4166 }
4167
4168 rc = pci_enable_device(pdev);
4169 if (rc)
4170 return rc;
4171
4172 rc = pci_request_regions(pdev, DRV_NAME);
4173 if (rc) {
4174 disable_dev_on_err = 0;
4175 goto err_out;
4176 }
4177
4178 if (legacy_mode) {
4179 if (!request_region(0x1f0, 8, "libata")) {
4180 struct resource *conflict, res;
4181 res.start = 0x1f0;
4182 res.end = 0x1f0 + 8 - 1;
4183 conflict = ____request_resource(&ioport_resource, &res);
4184 if (!strcmp(conflict->name, "libata"))
4185 legacy_mode |= (1 << 0);
4186 else {
4187 disable_dev_on_err = 0;
4188 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4189 }
4190 } else
4191 legacy_mode |= (1 << 0);
4192
4193 if (!request_region(0x170, 8, "libata")) {
4194 struct resource *conflict, res;
4195 res.start = 0x170;
4196 res.end = 0x170 + 8 - 1;
4197 conflict = ____request_resource(&ioport_resource, &res);
4198 if (!strcmp(conflict->name, "libata"))
4199 legacy_mode |= (1 << 1);
4200 else {
4201 disable_dev_on_err = 0;
4202 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4203 }
4204 } else
4205 legacy_mode |= (1 << 1);
4206 }
4207
4208 /* we have legacy mode, but all ports are unavailable */
4209 if (legacy_mode == (1 << 3)) {
4210 rc = -EBUSY;
4211 goto err_out_regions;
4212 }
4213
4214 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4215 if (rc)
4216 goto err_out_regions;
4217 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4218 if (rc)
4219 goto err_out_regions;
4220
4221 if (legacy_mode) {
4222 probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2);
4223 } else
4224 probe_ent = ata_pci_init_native_mode(pdev, port);
4225 if (!probe_ent) {
4226 rc = -ENOMEM;
4227 goto err_out_regions;
4228 }
4229
4230 pci_set_master(pdev);
4231
4232 /* FIXME: check ata_device_add return */
4233 if (legacy_mode) {
4234 if (legacy_mode & (1 << 0))
4235 ata_device_add(probe_ent);
4236 if (legacy_mode & (1 << 1))
4237 ata_device_add(probe_ent2);
4238 } else
4239 ata_device_add(probe_ent);
4240
4241 kfree(probe_ent);
4242 kfree(probe_ent2);
4243
4244 return 0;
4245
4246 err_out_regions:
4247 if (legacy_mode & (1 << 0))
4248 release_region(0x1f0, 8);
4249 if (legacy_mode & (1 << 1))
4250 release_region(0x170, 8);
4251 pci_release_regions(pdev);
4252 err_out:
4253 if (disable_dev_on_err)
4254 pci_disable_device(pdev);
4255 return rc;
4256 }
4257
4258 /**
4259 * ata_pci_remove_one - PCI layer callback for device removal
4260 * @pdev: PCI device that was removed
4261 *
4262 * PCI layer indicates to libata via this hook that
4263 * hot-unplug or module unload event has occured.
4264 * Handle this by unregistering all objects associated
4265 * with this PCI device. Free those objects. Then finally
4266 * release PCI resources and disable device.
4267 *
4268 * LOCKING:
4269 * Inherited from PCI layer (may sleep).
4270 */
4271
4272 void ata_pci_remove_one (struct pci_dev *pdev)
4273 {
4274 struct device *dev = pci_dev_to_dev(pdev);
4275 struct ata_host_set *host_set = dev_get_drvdata(dev);
4276 struct ata_port *ap;
4277 unsigned int i;
4278
4279 for (i = 0; i < host_set->n_ports; i++) {
4280 ap = host_set->ports[i];
4281
4282 scsi_remove_host(ap->host);
4283 }
4284
4285 free_irq(host_set->irq, host_set);
4286
4287 for (i = 0; i < host_set->n_ports; i++) {
4288 ap = host_set->ports[i];
4289
4290 ata_scsi_release(ap->host);
4291
4292 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4293 struct ata_ioports *ioaddr = &ap->ioaddr;
4294
4295 if (ioaddr->cmd_addr == 0x1f0)
4296 release_region(0x1f0, 8);
4297 else if (ioaddr->cmd_addr == 0x170)
4298 release_region(0x170, 8);
4299 }
4300
4301 scsi_host_put(ap->host);
4302 }
4303
4304 if (host_set->ops->host_stop)
4305 host_set->ops->host_stop(host_set);
4306
4307 kfree(host_set);
4308
4309 pci_release_regions(pdev);
4310 pci_disable_device(pdev);
4311 dev_set_drvdata(dev, NULL);
4312 }
4313
4314 /* move to PCI subsystem */
4315 int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits)
4316 {
4317 unsigned long tmp = 0;
4318
4319 switch (bits->width) {
4320 case 1: {
4321 u8 tmp8 = 0;
4322 pci_read_config_byte(pdev, bits->reg, &tmp8);
4323 tmp = tmp8;
4324 break;
4325 }
4326 case 2: {
4327 u16 tmp16 = 0;
4328 pci_read_config_word(pdev, bits->reg, &tmp16);
4329 tmp = tmp16;
4330 break;
4331 }
4332 case 4: {
4333 u32 tmp32 = 0;
4334 pci_read_config_dword(pdev, bits->reg, &tmp32);
4335 tmp = tmp32;
4336 break;
4337 }
4338
4339 default:
4340 return -EINVAL;
4341 }
4342
4343 tmp &= bits->mask;
4344
4345 return (tmp == bits->val) ? 1 : 0;
4346 }
4347 #endif /* CONFIG_PCI */
4348
4349
4350 static int __init ata_init(void)
4351 {
4352 ata_wq = create_workqueue("ata");
4353 if (!ata_wq)
4354 return -ENOMEM;
4355
4356 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4357 return 0;
4358 }
4359
4360 static void __exit ata_exit(void)
4361 {
4362 destroy_workqueue(ata_wq);
4363 }
4364
4365 module_init(ata_init);
4366 module_exit(ata_exit);
4367
4368 /*
4369 * libata is essentially a library of internal helper functions for
4370 * low-level ATA host controller drivers. As such, the API/ABI is
4371 * likely to change as new drivers are added and updated.
4372 * Do not depend on ABI/API stability.
4373 */
4374
4375 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4376 EXPORT_SYMBOL_GPL(ata_std_ports);
4377 EXPORT_SYMBOL_GPL(ata_device_add);
4378 EXPORT_SYMBOL_GPL(ata_sg_init);
4379 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4380 EXPORT_SYMBOL_GPL(ata_qc_complete);
4381 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4382 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4383 EXPORT_SYMBOL_GPL(ata_tf_load);
4384 EXPORT_SYMBOL_GPL(ata_tf_read);
4385 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4386 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4387 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4388 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4389 EXPORT_SYMBOL_GPL(ata_check_status);
4390 EXPORT_SYMBOL_GPL(ata_altstatus);
4391 EXPORT_SYMBOL_GPL(ata_chk_err);
4392 EXPORT_SYMBOL_GPL(ata_exec_command);
4393 EXPORT_SYMBOL_GPL(ata_port_start);
4394 EXPORT_SYMBOL_GPL(ata_port_stop);
4395 EXPORT_SYMBOL_GPL(ata_host_stop);
4396 EXPORT_SYMBOL_GPL(ata_interrupt);
4397 EXPORT_SYMBOL_GPL(ata_qc_prep);
4398 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4399 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4400 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4401 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4402 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4403 EXPORT_SYMBOL_GPL(ata_port_probe);
4404 EXPORT_SYMBOL_GPL(sata_phy_reset);
4405 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4406 EXPORT_SYMBOL_GPL(ata_bus_reset);
4407 EXPORT_SYMBOL_GPL(ata_port_disable);
4408 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4409 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4410 EXPORT_SYMBOL_GPL(ata_scsi_error);
4411 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4412 EXPORT_SYMBOL_GPL(ata_scsi_release);
4413 EXPORT_SYMBOL_GPL(ata_host_intr);
4414 EXPORT_SYMBOL_GPL(ata_dev_classify);
4415 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4416 EXPORT_SYMBOL_GPL(ata_dev_config);
4417 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4418
4419 #ifdef CONFIG_PCI
4420 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4421 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4422 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4423 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4424 #endif /* CONFIG_PCI */