Automatic merge of /spare/repo/linux-2.6/.git branch HEAD
[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / scsi / libata-core.c
1 /*
2 libata-core.c - helper library for ATA
3
4 Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 Copyright 2003-2004 Jeff Garzik
6
7 The contents of this file are subject to the Open
8 Software License version 1.1 that can be found at
9 http://www.opensource.org/licenses/osl-1.1.txt and is included herein
10 by reference.
11
12 Alternatively, the contents of this file may be used under the terms
13 of the GNU General Public License version 2 (the "GPL") as distributed
14 in the kernel source COPYING file, in which case the provisions of
15 the GPL are applicable instead of the above. If you wish to allow
16 the use of your version of this file only under the terms of the
17 GPL and not to allow others to use your version of this file under
18 the OSL, indicate your decision by deleting the provisions above and
19 replace them with the notice and other provisions required by the GPL.
20 If you do not delete the provisions above, a recipient may use your
21 version of this file under either the OSL or the GPL.
22
23 */
24
25 #include <linux/config.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/list.h>
31 #include <linux/mm.h>
32 #include <linux/highmem.h>
33 #include <linux/spinlock.h>
34 #include <linux/blkdev.h>
35 #include <linux/delay.h>
36 #include <linux/timer.h>
37 #include <linux/interrupt.h>
38 #include <linux/completion.h>
39 #include <linux/suspend.h>
40 #include <linux/workqueue.h>
41 #include <scsi/scsi.h>
42 #include "scsi.h"
43 #include "scsi_priv.h"
44 #include <scsi/scsi_host.h>
45 #include <linux/libata.h>
46 #include <asm/io.h>
47 #include <asm/semaphore.h>
48 #include <asm/byteorder.h>
49
50 #include "libata.h"
51
52 static unsigned int ata_busy_sleep (struct ata_port *ap,
53 unsigned long tmout_pat,
54 unsigned long tmout);
55 static void ata_set_mode(struct ata_port *ap);
56 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
57 static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift);
58 static int fgb(u32 bitmap);
59 static int ata_choose_xfer_mode(struct ata_port *ap,
60 u8 *xfer_mode_out,
61 unsigned int *xfer_shift_out);
62 static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
63 static void __ata_qc_complete(struct ata_queued_cmd *qc);
64
65 static unsigned int ata_unique_id = 1;
66 static struct workqueue_struct *ata_wq;
67
68 MODULE_AUTHOR("Jeff Garzik");
69 MODULE_DESCRIPTION("Library module for ATA devices");
70 MODULE_LICENSE("GPL");
71 MODULE_VERSION(DRV_VERSION);
72
73 /**
74 * ata_tf_load - send taskfile registers to host controller
75 * @ap: Port to which output is sent
76 * @tf: ATA taskfile register set
77 *
78 * Outputs ATA taskfile to standard ATA host controller.
79 *
80 * LOCKING:
81 * Inherited from caller.
82 */
83
84 static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
85 {
86 struct ata_ioports *ioaddr = &ap->ioaddr;
87 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
88
89 if (tf->ctl != ap->last_ctl) {
90 outb(tf->ctl, ioaddr->ctl_addr);
91 ap->last_ctl = tf->ctl;
92 ata_wait_idle(ap);
93 }
94
95 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
96 outb(tf->hob_feature, ioaddr->feature_addr);
97 outb(tf->hob_nsect, ioaddr->nsect_addr);
98 outb(tf->hob_lbal, ioaddr->lbal_addr);
99 outb(tf->hob_lbam, ioaddr->lbam_addr);
100 outb(tf->hob_lbah, ioaddr->lbah_addr);
101 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
102 tf->hob_feature,
103 tf->hob_nsect,
104 tf->hob_lbal,
105 tf->hob_lbam,
106 tf->hob_lbah);
107 }
108
109 if (is_addr) {
110 outb(tf->feature, ioaddr->feature_addr);
111 outb(tf->nsect, ioaddr->nsect_addr);
112 outb(tf->lbal, ioaddr->lbal_addr);
113 outb(tf->lbam, ioaddr->lbam_addr);
114 outb(tf->lbah, ioaddr->lbah_addr);
115 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
116 tf->feature,
117 tf->nsect,
118 tf->lbal,
119 tf->lbam,
120 tf->lbah);
121 }
122
123 if (tf->flags & ATA_TFLAG_DEVICE) {
124 outb(tf->device, ioaddr->device_addr);
125 VPRINTK("device 0x%X\n", tf->device);
126 }
127
128 ata_wait_idle(ap);
129 }
130
131 /**
132 * ata_tf_load_mmio - send taskfile registers to host controller
133 * @ap: Port to which output is sent
134 * @tf: ATA taskfile register set
135 *
136 * Outputs ATA taskfile to standard ATA host controller using MMIO.
137 *
138 * LOCKING:
139 * Inherited from caller.
140 */
141
142 static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
143 {
144 struct ata_ioports *ioaddr = &ap->ioaddr;
145 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
146
147 if (tf->ctl != ap->last_ctl) {
148 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
149 ap->last_ctl = tf->ctl;
150 ata_wait_idle(ap);
151 }
152
153 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
154 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
155 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
156 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
157 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
158 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
159 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
160 tf->hob_feature,
161 tf->hob_nsect,
162 tf->hob_lbal,
163 tf->hob_lbam,
164 tf->hob_lbah);
165 }
166
167 if (is_addr) {
168 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
169 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
170 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
171 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
172 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
173 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
174 tf->feature,
175 tf->nsect,
176 tf->lbal,
177 tf->lbam,
178 tf->lbah);
179 }
180
181 if (tf->flags & ATA_TFLAG_DEVICE) {
182 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
183 VPRINTK("device 0x%X\n", tf->device);
184 }
185
186 ata_wait_idle(ap);
187 }
188
189
190 /**
191 * ata_tf_load - send taskfile registers to host controller
192 * @ap: Port to which output is sent
193 * @tf: ATA taskfile register set
194 *
195 * Outputs ATA taskfile to standard ATA host controller using MMIO
196 * or PIO as indicated by the ATA_FLAG_MMIO flag.
197 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
198 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
199 * hob_lbal, hob_lbam, and hob_lbah.
200 *
201 * This function waits for idle (!BUSY and !DRQ) after writing
202 * registers. If the control register has a new value, this
203 * function also waits for idle after writing control and before
204 * writing the remaining registers.
205 *
206 * May be used as the tf_load() entry in ata_port_operations.
207 *
208 * LOCKING:
209 * Inherited from caller.
210 */
211 void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
212 {
213 if (ap->flags & ATA_FLAG_MMIO)
214 ata_tf_load_mmio(ap, tf);
215 else
216 ata_tf_load_pio(ap, tf);
217 }
218
219 /**
220 * ata_exec_command_pio - issue ATA command to host controller
221 * @ap: port to which command is being issued
222 * @tf: ATA taskfile register set
223 *
224 * Issues PIO write to ATA command register, with proper
225 * synchronization with interrupt handler / other threads.
226 *
227 * LOCKING:
228 * spin_lock_irqsave(host_set lock)
229 */
230
231 static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
232 {
233 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
234
235 outb(tf->command, ap->ioaddr.command_addr);
236 ata_pause(ap);
237 }
238
239
240 /**
241 * ata_exec_command_mmio - issue ATA command to host controller
242 * @ap: port to which command is being issued
243 * @tf: ATA taskfile register set
244 *
245 * Issues MMIO write to ATA command register, with proper
246 * synchronization with interrupt handler / other threads.
247 *
248 * LOCKING:
249 * spin_lock_irqsave(host_set lock)
250 */
251
252 static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
253 {
254 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
255
256 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
257 ata_pause(ap);
258 }
259
260
261 /**
262 * ata_exec_command - issue ATA command to host controller
263 * @ap: port to which command is being issued
264 * @tf: ATA taskfile register set
265 *
266 * Issues PIO/MMIO write to ATA command register, with proper
267 * synchronization with interrupt handler / other threads.
268 *
269 * LOCKING:
270 * spin_lock_irqsave(host_set lock)
271 */
272 void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
273 {
274 if (ap->flags & ATA_FLAG_MMIO)
275 ata_exec_command_mmio(ap, tf);
276 else
277 ata_exec_command_pio(ap, tf);
278 }
279
280 /**
281 * ata_exec - issue ATA command to host controller
282 * @ap: port to which command is being issued
283 * @tf: ATA taskfile register set
284 *
285 * Issues PIO/MMIO write to ATA command register, with proper
286 * synchronization with interrupt handler / other threads.
287 *
288 * LOCKING:
289 * Obtains host_set lock.
290 */
291
292 static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
293 {
294 unsigned long flags;
295
296 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
297 spin_lock_irqsave(&ap->host_set->lock, flags);
298 ap->ops->exec_command(ap, tf);
299 spin_unlock_irqrestore(&ap->host_set->lock, flags);
300 }
301
302 /**
303 * ata_tf_to_host - issue ATA taskfile to host controller
304 * @ap: port to which command is being issued
305 * @tf: ATA taskfile register set
306 *
307 * Issues ATA taskfile register set to ATA host controller,
308 * with proper synchronization with interrupt handler and
309 * other threads.
310 *
311 * LOCKING:
312 * Obtains host_set lock.
313 */
314
315 static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
316 {
317 ap->ops->tf_load(ap, tf);
318
319 ata_exec(ap, tf);
320 }
321
322 /**
323 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
324 * @ap: port to which command is being issued
325 * @tf: ATA taskfile register set
326 *
327 * Issues ATA taskfile register set to ATA host controller,
328 * with proper synchronization with interrupt handler and
329 * other threads.
330 *
331 * LOCKING:
332 * spin_lock_irqsave(host_set lock)
333 */
334
335 void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
336 {
337 ap->ops->tf_load(ap, tf);
338 ap->ops->exec_command(ap, tf);
339 }
340
341 /**
342 * ata_tf_read_pio - input device's ATA taskfile shadow registers
343 * @ap: Port from which input is read
344 * @tf: ATA taskfile register set for storing input
345 *
346 * Reads ATA taskfile registers for currently-selected device
347 * into @tf.
348 *
349 * LOCKING:
350 * Inherited from caller.
351 */
352
353 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
354 {
355 struct ata_ioports *ioaddr = &ap->ioaddr;
356
357 tf->nsect = inb(ioaddr->nsect_addr);
358 tf->lbal = inb(ioaddr->lbal_addr);
359 tf->lbam = inb(ioaddr->lbam_addr);
360 tf->lbah = inb(ioaddr->lbah_addr);
361 tf->device = inb(ioaddr->device_addr);
362
363 if (tf->flags & ATA_TFLAG_LBA48) {
364 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
365 tf->hob_feature = inb(ioaddr->error_addr);
366 tf->hob_nsect = inb(ioaddr->nsect_addr);
367 tf->hob_lbal = inb(ioaddr->lbal_addr);
368 tf->hob_lbam = inb(ioaddr->lbam_addr);
369 tf->hob_lbah = inb(ioaddr->lbah_addr);
370 }
371 }
372
373 /**
374 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
375 * @ap: Port from which input is read
376 * @tf: ATA taskfile register set for storing input
377 *
378 * Reads ATA taskfile registers for currently-selected device
379 * into @tf via MMIO.
380 *
381 * LOCKING:
382 * Inherited from caller.
383 */
384
385 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
386 {
387 struct ata_ioports *ioaddr = &ap->ioaddr;
388
389 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
390 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
391 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
392 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
393 tf->device = readb((void __iomem *)ioaddr->device_addr);
394
395 if (tf->flags & ATA_TFLAG_LBA48) {
396 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
397 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
398 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
399 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
400 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
401 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
402 }
403 }
404
405
406 /**
407 * ata_tf_read - input device's ATA taskfile shadow registers
408 * @ap: Port from which input is read
409 * @tf: ATA taskfile register set for storing input
410 *
411 * Reads ATA taskfile registers for currently-selected device
412 * into @tf.
413 *
414 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
415 * is set, also reads the hob registers.
416 *
417 * May be used as the tf_read() entry in ata_port_operations.
418 *
419 * LOCKING:
420 * Inherited from caller.
421 */
422 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
423 {
424 if (ap->flags & ATA_FLAG_MMIO)
425 ata_tf_read_mmio(ap, tf);
426 else
427 ata_tf_read_pio(ap, tf);
428 }
429
430 /**
431 * ata_check_status_pio - Read device status reg & clear interrupt
432 * @ap: port where the device is
433 *
434 * Reads ATA taskfile status register for currently-selected device
435 * and return its value. This also clears pending interrupts
436 * from this device
437 *
438 * LOCKING:
439 * Inherited from caller.
440 */
441 static u8 ata_check_status_pio(struct ata_port *ap)
442 {
443 return inb(ap->ioaddr.status_addr);
444 }
445
446 /**
447 * ata_check_status_mmio - Read device status reg & clear interrupt
448 * @ap: port where the device is
449 *
450 * Reads ATA taskfile status register for currently-selected device
451 * via MMIO and return its value. This also clears pending interrupts
452 * from this device
453 *
454 * LOCKING:
455 * Inherited from caller.
456 */
457 static u8 ata_check_status_mmio(struct ata_port *ap)
458 {
459 return readb((void __iomem *) ap->ioaddr.status_addr);
460 }
461
462
463 /**
464 * ata_check_status - Read device status reg & clear interrupt
465 * @ap: port where the device is
466 *
467 * Reads ATA taskfile status register for currently-selected device
468 * and return its value. This also clears pending interrupts
469 * from this device
470 *
471 * May be used as the check_status() entry in ata_port_operations.
472 *
473 * LOCKING:
474 * Inherited from caller.
475 */
476 u8 ata_check_status(struct ata_port *ap)
477 {
478 if (ap->flags & ATA_FLAG_MMIO)
479 return ata_check_status_mmio(ap);
480 return ata_check_status_pio(ap);
481 }
482
483
484 /**
485 * ata_altstatus - Read device alternate status reg
486 * @ap: port where the device is
487 *
488 * Reads ATA taskfile alternate status register for
489 * currently-selected device and return its value.
490 *
491 * Note: may NOT be used as the check_altstatus() entry in
492 * ata_port_operations.
493 *
494 * LOCKING:
495 * Inherited from caller.
496 */
497 u8 ata_altstatus(struct ata_port *ap)
498 {
499 if (ap->ops->check_altstatus)
500 return ap->ops->check_altstatus(ap);
501
502 if (ap->flags & ATA_FLAG_MMIO)
503 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
504 return inb(ap->ioaddr.altstatus_addr);
505 }
506
507
508 /**
509 * ata_chk_err - Read device error reg
510 * @ap: port where the device is
511 *
512 * Reads ATA taskfile error register for
513 * currently-selected device and return its value.
514 *
515 * Note: may NOT be used as the check_err() entry in
516 * ata_port_operations.
517 *
518 * LOCKING:
519 * Inherited from caller.
520 */
521 u8 ata_chk_err(struct ata_port *ap)
522 {
523 if (ap->ops->check_err)
524 return ap->ops->check_err(ap);
525
526 if (ap->flags & ATA_FLAG_MMIO) {
527 return readb((void __iomem *) ap->ioaddr.error_addr);
528 }
529 return inb(ap->ioaddr.error_addr);
530 }
531
532 /**
533 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
534 * @tf: Taskfile to convert
535 * @fis: Buffer into which data will output
536 * @pmp: Port multiplier port
537 *
538 * Converts a standard ATA taskfile to a Serial ATA
539 * FIS structure (Register - Host to Device).
540 *
541 * LOCKING:
542 * Inherited from caller.
543 */
544
545 void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
546 {
547 fis[0] = 0x27; /* Register - Host to Device FIS */
548 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
549 bit 7 indicates Command FIS */
550 fis[2] = tf->command;
551 fis[3] = tf->feature;
552
553 fis[4] = tf->lbal;
554 fis[5] = tf->lbam;
555 fis[6] = tf->lbah;
556 fis[7] = tf->device;
557
558 fis[8] = tf->hob_lbal;
559 fis[9] = tf->hob_lbam;
560 fis[10] = tf->hob_lbah;
561 fis[11] = tf->hob_feature;
562
563 fis[12] = tf->nsect;
564 fis[13] = tf->hob_nsect;
565 fis[14] = 0;
566 fis[15] = tf->ctl;
567
568 fis[16] = 0;
569 fis[17] = 0;
570 fis[18] = 0;
571 fis[19] = 0;
572 }
573
574 /**
575 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
576 * @fis: Buffer from which data will be input
577 * @tf: Taskfile to output
578 *
579 * Converts a standard ATA taskfile to a Serial ATA
580 * FIS structure (Register - Host to Device).
581 *
582 * LOCKING:
583 * Inherited from caller.
584 */
585
586 void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
587 {
588 tf->command = fis[2]; /* status */
589 tf->feature = fis[3]; /* error */
590
591 tf->lbal = fis[4];
592 tf->lbam = fis[5];
593 tf->lbah = fis[6];
594 tf->device = fis[7];
595
596 tf->hob_lbal = fis[8];
597 tf->hob_lbam = fis[9];
598 tf->hob_lbah = fis[10];
599
600 tf->nsect = fis[12];
601 tf->hob_nsect = fis[13];
602 }
603
604 /**
605 * ata_prot_to_cmd - determine which read/write opcodes to use
606 * @protocol: ATA_PROT_xxx taskfile protocol
607 * @lba48: true is lba48 is present
608 *
609 * Given necessary input, determine which read/write commands
610 * to use to transfer data.
611 *
612 * LOCKING:
613 * None.
614 */
615 static int ata_prot_to_cmd(int protocol, int lba48)
616 {
617 int rcmd = 0, wcmd = 0;
618
619 switch (protocol) {
620 case ATA_PROT_PIO:
621 if (lba48) {
622 rcmd = ATA_CMD_PIO_READ_EXT;
623 wcmd = ATA_CMD_PIO_WRITE_EXT;
624 } else {
625 rcmd = ATA_CMD_PIO_READ;
626 wcmd = ATA_CMD_PIO_WRITE;
627 }
628 break;
629
630 case ATA_PROT_DMA:
631 if (lba48) {
632 rcmd = ATA_CMD_READ_EXT;
633 wcmd = ATA_CMD_WRITE_EXT;
634 } else {
635 rcmd = ATA_CMD_READ;
636 wcmd = ATA_CMD_WRITE;
637 }
638 break;
639
640 default:
641 return -1;
642 }
643
644 return rcmd | (wcmd << 8);
645 }
646
647 /**
648 * ata_dev_set_protocol - set taskfile protocol and r/w commands
649 * @dev: device to examine and configure
650 *
651 * Examine the device configuration, after we have
652 * read the identify-device page and configured the
653 * data transfer mode. Set internal state related to
654 * the ATA taskfile protocol (pio, pio mult, dma, etc.)
655 * and calculate the proper read/write commands to use.
656 *
657 * LOCKING:
658 * caller.
659 */
660 static void ata_dev_set_protocol(struct ata_device *dev)
661 {
662 int pio = (dev->flags & ATA_DFLAG_PIO);
663 int lba48 = (dev->flags & ATA_DFLAG_LBA48);
664 int proto, cmd;
665
666 if (pio)
667 proto = dev->xfer_protocol = ATA_PROT_PIO;
668 else
669 proto = dev->xfer_protocol = ATA_PROT_DMA;
670
671 cmd = ata_prot_to_cmd(proto, lba48);
672 if (cmd < 0)
673 BUG();
674
675 dev->read_cmd = cmd & 0xff;
676 dev->write_cmd = (cmd >> 8) & 0xff;
677 }
678
679 static const char * xfer_mode_str[] = {
680 "UDMA/16",
681 "UDMA/25",
682 "UDMA/33",
683 "UDMA/44",
684 "UDMA/66",
685 "UDMA/100",
686 "UDMA/133",
687 "UDMA7",
688 "MWDMA0",
689 "MWDMA1",
690 "MWDMA2",
691 "PIO0",
692 "PIO1",
693 "PIO2",
694 "PIO3",
695 "PIO4",
696 };
697
698 /**
699 * ata_udma_string - convert UDMA bit offset to string
700 * @mask: mask of bits supported; only highest bit counts.
701 *
702 * Determine string which represents the highest speed
703 * (highest bit in @udma_mask).
704 *
705 * LOCKING:
706 * None.
707 *
708 * RETURNS:
709 * Constant C string representing highest speed listed in
710 * @udma_mask, or the constant C string "<n/a>".
711 */
712
713 static const char *ata_mode_string(unsigned int mask)
714 {
715 int i;
716
717 for (i = 7; i >= 0; i--)
718 if (mask & (1 << i))
719 goto out;
720 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
721 if (mask & (1 << i))
722 goto out;
723 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
724 if (mask & (1 << i))
725 goto out;
726
727 return "<n/a>";
728
729 out:
730 return xfer_mode_str[i];
731 }
732
733 /**
734 * ata_pio_devchk - PATA device presence detection
735 * @ap: ATA channel to examine
736 * @device: Device to examine (starting at zero)
737 *
738 * This technique was originally described in
739 * Hale Landis's ATADRVR (www.ata-atapi.com), and
740 * later found its way into the ATA/ATAPI spec.
741 *
742 * Write a pattern to the ATA shadow registers,
743 * and if a device is present, it will respond by
744 * correctly storing and echoing back the
745 * ATA shadow register contents.
746 *
747 * LOCKING:
748 * caller.
749 */
750
751 static unsigned int ata_pio_devchk(struct ata_port *ap,
752 unsigned int device)
753 {
754 struct ata_ioports *ioaddr = &ap->ioaddr;
755 u8 nsect, lbal;
756
757 ap->ops->dev_select(ap, device);
758
759 outb(0x55, ioaddr->nsect_addr);
760 outb(0xaa, ioaddr->lbal_addr);
761
762 outb(0xaa, ioaddr->nsect_addr);
763 outb(0x55, ioaddr->lbal_addr);
764
765 outb(0x55, ioaddr->nsect_addr);
766 outb(0xaa, ioaddr->lbal_addr);
767
768 nsect = inb(ioaddr->nsect_addr);
769 lbal = inb(ioaddr->lbal_addr);
770
771 if ((nsect == 0x55) && (lbal == 0xaa))
772 return 1; /* we found a device */
773
774 return 0; /* nothing found */
775 }
776
777 /**
778 * ata_mmio_devchk - PATA device presence detection
779 * @ap: ATA channel to examine
780 * @device: Device to examine (starting at zero)
781 *
782 * This technique was originally described in
783 * Hale Landis's ATADRVR (www.ata-atapi.com), and
784 * later found its way into the ATA/ATAPI spec.
785 *
786 * Write a pattern to the ATA shadow registers,
787 * and if a device is present, it will respond by
788 * correctly storing and echoing back the
789 * ATA shadow register contents.
790 *
791 * LOCKING:
792 * caller.
793 */
794
795 static unsigned int ata_mmio_devchk(struct ata_port *ap,
796 unsigned int device)
797 {
798 struct ata_ioports *ioaddr = &ap->ioaddr;
799 u8 nsect, lbal;
800
801 ap->ops->dev_select(ap, device);
802
803 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
804 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
805
806 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
807 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
808
809 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
810 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
811
812 nsect = readb((void __iomem *) ioaddr->nsect_addr);
813 lbal = readb((void __iomem *) ioaddr->lbal_addr);
814
815 if ((nsect == 0x55) && (lbal == 0xaa))
816 return 1; /* we found a device */
817
818 return 0; /* nothing found */
819 }
820
821 /**
822 * ata_devchk - PATA device presence detection
823 * @ap: ATA channel to examine
824 * @device: Device to examine (starting at zero)
825 *
826 * Dispatch ATA device presence detection, depending
827 * on whether we are using PIO or MMIO to talk to the
828 * ATA shadow registers.
829 *
830 * LOCKING:
831 * caller.
832 */
833
834 static unsigned int ata_devchk(struct ata_port *ap,
835 unsigned int device)
836 {
837 if (ap->flags & ATA_FLAG_MMIO)
838 return ata_mmio_devchk(ap, device);
839 return ata_pio_devchk(ap, device);
840 }
841
842 /**
843 * ata_dev_classify - determine device type based on ATA-spec signature
844 * @tf: ATA taskfile register set for device to be identified
845 *
846 * Determine from taskfile register contents whether a device is
847 * ATA or ATAPI, as per "Signature and persistence" section
848 * of ATA/PI spec (volume 1, sect 5.14).
849 *
850 * LOCKING:
851 * None.
852 *
853 * RETURNS:
854 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
855 * the event of failure.
856 */
857
858 unsigned int ata_dev_classify(struct ata_taskfile *tf)
859 {
860 /* Apple's open source Darwin code hints that some devices only
861 * put a proper signature into the LBA mid/high registers,
862 * So, we only check those. It's sufficient for uniqueness.
863 */
864
865 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
866 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
867 DPRINTK("found ATA device by sig\n");
868 return ATA_DEV_ATA;
869 }
870
871 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
872 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
873 DPRINTK("found ATAPI device by sig\n");
874 return ATA_DEV_ATAPI;
875 }
876
877 DPRINTK("unknown device\n");
878 return ATA_DEV_UNKNOWN;
879 }
880
881 /**
882 * ata_dev_try_classify - Parse returned ATA device signature
883 * @ap: ATA channel to examine
884 * @device: Device to examine (starting at zero)
885 *
886 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
887 * an ATA/ATAPI-defined set of values is placed in the ATA
888 * shadow registers, indicating the results of device detection
889 * and diagnostics.
890 *
891 * Select the ATA device, and read the values from the ATA shadow
892 * registers. Then parse according to the Error register value,
893 * and the spec-defined values examined by ata_dev_classify().
894 *
895 * LOCKING:
896 * caller.
897 */
898
899 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
900 {
901 struct ata_device *dev = &ap->device[device];
902 struct ata_taskfile tf;
903 unsigned int class;
904 u8 err;
905
906 ap->ops->dev_select(ap, device);
907
908 memset(&tf, 0, sizeof(tf));
909
910 err = ata_chk_err(ap);
911 ap->ops->tf_read(ap, &tf);
912
913 dev->class = ATA_DEV_NONE;
914
915 /* see if device passed diags */
916 if (err == 1)
917 /* do nothing */ ;
918 else if ((device == 0) && (err == 0x81))
919 /* do nothing */ ;
920 else
921 return err;
922
923 /* determine if device if ATA or ATAPI */
924 class = ata_dev_classify(&tf);
925 if (class == ATA_DEV_UNKNOWN)
926 return err;
927 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
928 return err;
929
930 dev->class = class;
931
932 return err;
933 }
934
935 /**
936 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
937 * @id: IDENTIFY DEVICE results we will examine
938 * @s: string into which data is output
939 * @ofs: offset into identify device page
940 * @len: length of string to return. must be an even number.
941 *
942 * The strings in the IDENTIFY DEVICE page are broken up into
943 * 16-bit chunks. Run through the string, and output each
944 * 8-bit chunk linearly, regardless of platform.
945 *
946 * LOCKING:
947 * caller.
948 */
949
950 void ata_dev_id_string(u16 *id, unsigned char *s,
951 unsigned int ofs, unsigned int len)
952 {
953 unsigned int c;
954
955 while (len > 0) {
956 c = id[ofs] >> 8;
957 *s = c;
958 s++;
959
960 c = id[ofs] & 0xff;
961 *s = c;
962 s++;
963
964 ofs++;
965 len -= 2;
966 }
967 }
968
969
970 /**
971 * ata_noop_dev_select - Select device 0/1 on ATA bus
972 * @ap: ATA channel to manipulate
973 * @device: ATA device (numbered from zero) to select
974 *
975 * This function performs no actual function.
976 *
977 * May be used as the dev_select() entry in ata_port_operations.
978 *
979 * LOCKING:
980 * caller.
981 */
982 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
983 {
984 }
985
986
987 /**
988 * ata_std_dev_select - Select device 0/1 on ATA bus
989 * @ap: ATA channel to manipulate
990 * @device: ATA device (numbered from zero) to select
991 *
992 * Use the method defined in the ATA specification to
993 * make either device 0, or device 1, active on the
994 * ATA channel. Works with both PIO and MMIO.
995 *
996 * May be used as the dev_select() entry in ata_port_operations.
997 *
998 * LOCKING:
999 * caller.
1000 */
1001
1002 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1003 {
1004 u8 tmp;
1005
1006 if (device == 0)
1007 tmp = ATA_DEVICE_OBS;
1008 else
1009 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1010
1011 if (ap->flags & ATA_FLAG_MMIO) {
1012 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1013 } else {
1014 outb(tmp, ap->ioaddr.device_addr);
1015 }
1016 ata_pause(ap); /* needed; also flushes, for mmio */
1017 }
1018
1019 /**
1020 * ata_dev_select - Select device 0/1 on ATA bus
1021 * @ap: ATA channel to manipulate
1022 * @device: ATA device (numbered from zero) to select
1023 * @wait: non-zero to wait for Status register BSY bit to clear
1024 * @can_sleep: non-zero if context allows sleeping
1025 *
1026 * Use the method defined in the ATA specification to
1027 * make either device 0, or device 1, active on the
1028 * ATA channel.
1029 *
1030 * This is a high-level version of ata_std_dev_select(),
1031 * which additionally provides the services of inserting
1032 * the proper pauses and status polling, where needed.
1033 *
1034 * LOCKING:
1035 * caller.
1036 */
1037
1038 void ata_dev_select(struct ata_port *ap, unsigned int device,
1039 unsigned int wait, unsigned int can_sleep)
1040 {
1041 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1042 ap->id, device, wait);
1043
1044 if (wait)
1045 ata_wait_idle(ap);
1046
1047 ap->ops->dev_select(ap, device);
1048
1049 if (wait) {
1050 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1051 msleep(150);
1052 ata_wait_idle(ap);
1053 }
1054 }
1055
1056 /**
1057 * ata_dump_id - IDENTIFY DEVICE info debugging output
1058 * @dev: Device whose IDENTIFY DEVICE page we will dump
1059 *
1060 * Dump selected 16-bit words from a detected device's
1061 * IDENTIFY PAGE page.
1062 *
1063 * LOCKING:
1064 * caller.
1065 */
1066
1067 static inline void ata_dump_id(struct ata_device *dev)
1068 {
1069 DPRINTK("49==0x%04x "
1070 "53==0x%04x "
1071 "63==0x%04x "
1072 "64==0x%04x "
1073 "75==0x%04x \n",
1074 dev->id[49],
1075 dev->id[53],
1076 dev->id[63],
1077 dev->id[64],
1078 dev->id[75]);
1079 DPRINTK("80==0x%04x "
1080 "81==0x%04x "
1081 "82==0x%04x "
1082 "83==0x%04x "
1083 "84==0x%04x \n",
1084 dev->id[80],
1085 dev->id[81],
1086 dev->id[82],
1087 dev->id[83],
1088 dev->id[84]);
1089 DPRINTK("88==0x%04x "
1090 "93==0x%04x\n",
1091 dev->id[88],
1092 dev->id[93]);
1093 }
1094
1095 /**
1096 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1097 * @ap: port on which device we wish to probe resides
1098 * @device: device bus address, starting at zero
1099 *
1100 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1101 * command, and read back the 512-byte device information page.
1102 * The device information page is fed to us via the standard
1103 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1104 * using standard PIO-IN paths)
1105 *
1106 * After reading the device information page, we use several
1107 * bits of information from it to initialize data structures
1108 * that will be used during the lifetime of the ata_device.
1109 * Other data from the info page is used to disqualify certain
1110 * older ATA devices we do not wish to support.
1111 *
1112 * LOCKING:
1113 * Inherited from caller. Some functions called by this function
1114 * obtain the host_set lock.
1115 */
1116
1117 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1118 {
1119 struct ata_device *dev = &ap->device[device];
1120 unsigned int i;
1121 u16 tmp;
1122 unsigned long xfer_modes;
1123 u8 status;
1124 unsigned int using_edd;
1125 DECLARE_COMPLETION(wait);
1126 struct ata_queued_cmd *qc;
1127 unsigned long flags;
1128 int rc;
1129
1130 if (!ata_dev_present(dev)) {
1131 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1132 ap->id, device);
1133 return;
1134 }
1135
1136 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1137 using_edd = 0;
1138 else
1139 using_edd = 1;
1140
1141 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1142
1143 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1144 dev->class == ATA_DEV_NONE);
1145
1146 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1147
1148 qc = ata_qc_new_init(ap, dev);
1149 BUG_ON(qc == NULL);
1150
1151 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1152 qc->dma_dir = DMA_FROM_DEVICE;
1153 qc->tf.protocol = ATA_PROT_PIO;
1154 qc->nsect = 1;
1155
1156 retry:
1157 if (dev->class == ATA_DEV_ATA) {
1158 qc->tf.command = ATA_CMD_ID_ATA;
1159 DPRINTK("do ATA identify\n");
1160 } else {
1161 qc->tf.command = ATA_CMD_ID_ATAPI;
1162 DPRINTK("do ATAPI identify\n");
1163 }
1164
1165 qc->waiting = &wait;
1166 qc->complete_fn = ata_qc_complete_noop;
1167
1168 spin_lock_irqsave(&ap->host_set->lock, flags);
1169 rc = ata_qc_issue(qc);
1170 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1171
1172 if (rc)
1173 goto err_out;
1174 else
1175 wait_for_completion(&wait);
1176
1177 status = ata_chk_status(ap);
1178 if (status & ATA_ERR) {
1179 /*
1180 * arg! EDD works for all test cases, but seems to return
1181 * the ATA signature for some ATAPI devices. Until the
1182 * reason for this is found and fixed, we fix up the mess
1183 * here. If IDENTIFY DEVICE returns command aborted
1184 * (as ATAPI devices do), then we issue an
1185 * IDENTIFY PACKET DEVICE.
1186 *
1187 * ATA software reset (SRST, the default) does not appear
1188 * to have this problem.
1189 */
1190 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1191 u8 err = ata_chk_err(ap);
1192 if (err & ATA_ABORTED) {
1193 dev->class = ATA_DEV_ATAPI;
1194 qc->cursg = 0;
1195 qc->cursg_ofs = 0;
1196 qc->cursect = 0;
1197 qc->nsect = 1;
1198 goto retry;
1199 }
1200 }
1201 goto err_out;
1202 }
1203
1204 swap_buf_le16(dev->id, ATA_ID_WORDS);
1205
1206 /* print device capabilities */
1207 printk(KERN_DEBUG "ata%u: dev %u cfg "
1208 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1209 ap->id, device, dev->id[49],
1210 dev->id[82], dev->id[83], dev->id[84],
1211 dev->id[85], dev->id[86], dev->id[87],
1212 dev->id[88]);
1213
1214 /*
1215 * common ATA, ATAPI feature tests
1216 */
1217
1218 /* we require LBA and DMA support (bits 8 & 9 of word 49) */
1219 if (!ata_id_has_dma(dev->id) || !ata_id_has_lba(dev->id)) {
1220 printk(KERN_DEBUG "ata%u: no dma/lba\n", ap->id);
1221 goto err_out_nosup;
1222 }
1223
1224 /* quick-n-dirty find max transfer mode; for printk only */
1225 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1226 if (!xfer_modes)
1227 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1228 if (!xfer_modes) {
1229 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3);
1230 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1231 }
1232
1233 ata_dump_id(dev);
1234
1235 /* ATA-specific feature tests */
1236 if (dev->class == ATA_DEV_ATA) {
1237 if (!ata_id_is_ata(dev->id)) /* sanity check */
1238 goto err_out_nosup;
1239
1240 tmp = dev->id[ATA_ID_MAJOR_VER];
1241 for (i = 14; i >= 1; i--)
1242 if (tmp & (1 << i))
1243 break;
1244
1245 /* we require at least ATA-3 */
1246 if (i < 3) {
1247 printk(KERN_DEBUG "ata%u: no ATA-3\n", ap->id);
1248 goto err_out_nosup;
1249 }
1250
1251 if (ata_id_has_lba48(dev->id)) {
1252 dev->flags |= ATA_DFLAG_LBA48;
1253 dev->n_sectors = ata_id_u64(dev->id, 100);
1254 } else {
1255 dev->n_sectors = ata_id_u32(dev->id, 60);
1256 }
1257
1258 ap->host->max_cmd_len = 16;
1259
1260 /* print device info to dmesg */
1261 printk(KERN_INFO "ata%u: dev %u ATA, max %s, %Lu sectors:%s\n",
1262 ap->id, device,
1263 ata_mode_string(xfer_modes),
1264 (unsigned long long)dev->n_sectors,
1265 dev->flags & ATA_DFLAG_LBA48 ? " lba48" : "");
1266 }
1267
1268 /* ATAPI-specific feature tests */
1269 else {
1270 if (ata_id_is_ata(dev->id)) /* sanity check */
1271 goto err_out_nosup;
1272
1273 rc = atapi_cdb_len(dev->id);
1274 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1275 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1276 goto err_out_nosup;
1277 }
1278 ap->cdb_len = (unsigned int) rc;
1279 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1280
1281 /* print device info to dmesg */
1282 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1283 ap->id, device,
1284 ata_mode_string(xfer_modes));
1285 }
1286
1287 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1288 return;
1289
1290 err_out_nosup:
1291 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1292 ap->id, device);
1293 err_out:
1294 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1295 DPRINTK("EXIT, err\n");
1296 }
1297
1298
1299 static inline u8 ata_dev_knobble(struct ata_port *ap)
1300 {
1301 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1302 }
1303
1304 /**
1305 * ata_dev_config - Run device specific handlers and check for
1306 * SATA->PATA bridges
1307 * @ap: Bus
1308 * @i: Device
1309 *
1310 * LOCKING:
1311 */
1312
1313 void ata_dev_config(struct ata_port *ap, unsigned int i)
1314 {
1315 /* limit bridge transfers to udma5, 200 sectors */
1316 if (ata_dev_knobble(ap)) {
1317 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1318 ap->id, ap->device->devno);
1319 ap->udma_mask &= ATA_UDMA5;
1320 ap->host->max_sectors = ATA_MAX_SECTORS;
1321 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1322 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1323 }
1324
1325 if (ap->ops->dev_config)
1326 ap->ops->dev_config(ap, &ap->device[i]);
1327 }
1328
1329 /**
1330 * ata_bus_probe - Reset and probe ATA bus
1331 * @ap: Bus to probe
1332 *
1333 * Master ATA bus probing function. Initiates a hardware-dependent
1334 * bus reset, then attempts to identify any devices found on
1335 * the bus.
1336 *
1337 * LOCKING:
1338 * PCI/etc. bus probe sem.
1339 *
1340 * RETURNS:
1341 * Zero on success, non-zero on error.
1342 */
1343
1344 static int ata_bus_probe(struct ata_port *ap)
1345 {
1346 unsigned int i, found = 0;
1347
1348 ap->ops->phy_reset(ap);
1349 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1350 goto err_out;
1351
1352 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1353 ata_dev_identify(ap, i);
1354 if (ata_dev_present(&ap->device[i])) {
1355 found = 1;
1356 ata_dev_config(ap,i);
1357 }
1358 }
1359
1360 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1361 goto err_out_disable;
1362
1363 ata_set_mode(ap);
1364 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1365 goto err_out_disable;
1366
1367 return 0;
1368
1369 err_out_disable:
1370 ap->ops->port_disable(ap);
1371 err_out:
1372 return -1;
1373 }
1374
1375 /**
1376 * ata_port_probe - Mark port as enabled
1377 * @ap: Port for which we indicate enablement
1378 *
1379 * Modify @ap data structure such that the system
1380 * thinks that the entire port is enabled.
1381 *
1382 * LOCKING: host_set lock, or some other form of
1383 * serialization.
1384 */
1385
1386 void ata_port_probe(struct ata_port *ap)
1387 {
1388 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1389 }
1390
1391 /**
1392 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1393 * @ap: SATA port associated with target SATA PHY.
1394 *
1395 * This function issues commands to standard SATA Sxxx
1396 * PHY registers, to wake up the phy (and device), and
1397 * clear any reset condition.
1398 *
1399 * LOCKING:
1400 * PCI/etc. bus probe sem.
1401 *
1402 */
1403 void __sata_phy_reset(struct ata_port *ap)
1404 {
1405 u32 sstatus;
1406 unsigned long timeout = jiffies + (HZ * 5);
1407
1408 if (ap->flags & ATA_FLAG_SATA_RESET) {
1409 /* issue phy wake/reset */
1410 scr_write_flush(ap, SCR_CONTROL, 0x301);
1411 udelay(400); /* FIXME: a guess */
1412 }
1413 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1414
1415 /* wait for phy to become ready, if necessary */
1416 do {
1417 msleep(200);
1418 sstatus = scr_read(ap, SCR_STATUS);
1419 if ((sstatus & 0xf) != 1)
1420 break;
1421 } while (time_before(jiffies, timeout));
1422
1423 /* TODO: phy layer with polling, timeouts, etc. */
1424 if (sata_dev_present(ap))
1425 ata_port_probe(ap);
1426 else {
1427 sstatus = scr_read(ap, SCR_STATUS);
1428 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1429 ap->id, sstatus);
1430 ata_port_disable(ap);
1431 }
1432
1433 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1434 return;
1435
1436 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1437 ata_port_disable(ap);
1438 return;
1439 }
1440
1441 ap->cbl = ATA_CBL_SATA;
1442 }
1443
1444 /**
1445 * sata_phy_reset - Reset SATA bus.
1446 * @ap: SATA port associated with target SATA PHY.
1447 *
1448 * This function resets the SATA bus, and then probes
1449 * the bus for devices.
1450 *
1451 * LOCKING:
1452 * PCI/etc. bus probe sem.
1453 *
1454 */
1455 void sata_phy_reset(struct ata_port *ap)
1456 {
1457 __sata_phy_reset(ap);
1458 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1459 return;
1460 ata_bus_reset(ap);
1461 }
1462
1463 /**
1464 * ata_port_disable - Disable port.
1465 * @ap: Port to be disabled.
1466 *
1467 * Modify @ap data structure such that the system
1468 * thinks that the entire port is disabled, and should
1469 * never attempt to probe or communicate with devices
1470 * on this port.
1471 *
1472 * LOCKING: host_set lock, or some other form of
1473 * serialization.
1474 */
1475
1476 void ata_port_disable(struct ata_port *ap)
1477 {
1478 ap->device[0].class = ATA_DEV_NONE;
1479 ap->device[1].class = ATA_DEV_NONE;
1480 ap->flags |= ATA_FLAG_PORT_DISABLED;
1481 }
1482
1483 static struct {
1484 unsigned int shift;
1485 u8 base;
1486 } xfer_mode_classes[] = {
1487 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1488 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1489 { ATA_SHIFT_PIO, XFER_PIO_0 },
1490 };
1491
1492 static inline u8 base_from_shift(unsigned int shift)
1493 {
1494 int i;
1495
1496 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1497 if (xfer_mode_classes[i].shift == shift)
1498 return xfer_mode_classes[i].base;
1499
1500 return 0xff;
1501 }
1502
1503 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1504 {
1505 int ofs, idx;
1506 u8 base;
1507
1508 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1509 return;
1510
1511 if (dev->xfer_shift == ATA_SHIFT_PIO)
1512 dev->flags |= ATA_DFLAG_PIO;
1513
1514 ata_dev_set_xfermode(ap, dev);
1515
1516 base = base_from_shift(dev->xfer_shift);
1517 ofs = dev->xfer_mode - base;
1518 idx = ofs + dev->xfer_shift;
1519 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1520
1521 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1522 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1523
1524 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1525 ap->id, dev->devno, xfer_mode_str[idx]);
1526 }
1527
1528 static int ata_host_set_pio(struct ata_port *ap)
1529 {
1530 unsigned int mask;
1531 int x, i;
1532 u8 base, xfer_mode;
1533
1534 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1535 x = fgb(mask);
1536 if (x < 0) {
1537 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1538 return -1;
1539 }
1540
1541 base = base_from_shift(ATA_SHIFT_PIO);
1542 xfer_mode = base + x;
1543
1544 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1545 (int)base, (int)xfer_mode, mask, x);
1546
1547 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1548 struct ata_device *dev = &ap->device[i];
1549 if (ata_dev_present(dev)) {
1550 dev->pio_mode = xfer_mode;
1551 dev->xfer_mode = xfer_mode;
1552 dev->xfer_shift = ATA_SHIFT_PIO;
1553 if (ap->ops->set_piomode)
1554 ap->ops->set_piomode(ap, dev);
1555 }
1556 }
1557
1558 return 0;
1559 }
1560
1561 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1562 unsigned int xfer_shift)
1563 {
1564 int i;
1565
1566 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1567 struct ata_device *dev = &ap->device[i];
1568 if (ata_dev_present(dev)) {
1569 dev->dma_mode = xfer_mode;
1570 dev->xfer_mode = xfer_mode;
1571 dev->xfer_shift = xfer_shift;
1572 if (ap->ops->set_dmamode)
1573 ap->ops->set_dmamode(ap, dev);
1574 }
1575 }
1576 }
1577
1578 /**
1579 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1580 * @ap: port on which timings will be programmed
1581 *
1582 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1583 *
1584 * LOCKING:
1585 * PCI/etc. bus probe sem.
1586 *
1587 */
1588 static void ata_set_mode(struct ata_port *ap)
1589 {
1590 unsigned int i, xfer_shift;
1591 u8 xfer_mode;
1592 int rc;
1593
1594 /* step 1: always set host PIO timings */
1595 rc = ata_host_set_pio(ap);
1596 if (rc)
1597 goto err_out;
1598
1599 /* step 2: choose the best data xfer mode */
1600 xfer_mode = xfer_shift = 0;
1601 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1602 if (rc)
1603 goto err_out;
1604
1605 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1606 if (xfer_shift != ATA_SHIFT_PIO)
1607 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1608
1609 /* step 4: update devices' xfer mode */
1610 ata_dev_set_mode(ap, &ap->device[0]);
1611 ata_dev_set_mode(ap, &ap->device[1]);
1612
1613 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1614 return;
1615
1616 if (ap->ops->post_set_mode)
1617 ap->ops->post_set_mode(ap);
1618
1619 for (i = 0; i < 2; i++) {
1620 struct ata_device *dev = &ap->device[i];
1621 ata_dev_set_protocol(dev);
1622 }
1623
1624 return;
1625
1626 err_out:
1627 ata_port_disable(ap);
1628 }
1629
1630 /**
1631 * ata_busy_sleep - sleep until BSY clears, or timeout
1632 * @ap: port containing status register to be polled
1633 * @tmout_pat: impatience timeout
1634 * @tmout: overall timeout
1635 *
1636 * Sleep until ATA Status register bit BSY clears,
1637 * or a timeout occurs.
1638 *
1639 * LOCKING: None.
1640 *
1641 */
1642
1643 static unsigned int ata_busy_sleep (struct ata_port *ap,
1644 unsigned long tmout_pat,
1645 unsigned long tmout)
1646 {
1647 unsigned long timer_start, timeout;
1648 u8 status;
1649
1650 status = ata_busy_wait(ap, ATA_BUSY, 300);
1651 timer_start = jiffies;
1652 timeout = timer_start + tmout_pat;
1653 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1654 msleep(50);
1655 status = ata_busy_wait(ap, ATA_BUSY, 3);
1656 }
1657
1658 if (status & ATA_BUSY)
1659 printk(KERN_WARNING "ata%u is slow to respond, "
1660 "please be patient\n", ap->id);
1661
1662 timeout = timer_start + tmout;
1663 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1664 msleep(50);
1665 status = ata_chk_status(ap);
1666 }
1667
1668 if (status & ATA_BUSY) {
1669 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1670 ap->id, tmout / HZ);
1671 return 1;
1672 }
1673
1674 return 0;
1675 }
1676
1677 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1678 {
1679 struct ata_ioports *ioaddr = &ap->ioaddr;
1680 unsigned int dev0 = devmask & (1 << 0);
1681 unsigned int dev1 = devmask & (1 << 1);
1682 unsigned long timeout;
1683
1684 /* if device 0 was found in ata_devchk, wait for its
1685 * BSY bit to clear
1686 */
1687 if (dev0)
1688 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1689
1690 /* if device 1 was found in ata_devchk, wait for
1691 * register access, then wait for BSY to clear
1692 */
1693 timeout = jiffies + ATA_TMOUT_BOOT;
1694 while (dev1) {
1695 u8 nsect, lbal;
1696
1697 ap->ops->dev_select(ap, 1);
1698 if (ap->flags & ATA_FLAG_MMIO) {
1699 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1700 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1701 } else {
1702 nsect = inb(ioaddr->nsect_addr);
1703 lbal = inb(ioaddr->lbal_addr);
1704 }
1705 if ((nsect == 1) && (lbal == 1))
1706 break;
1707 if (time_after(jiffies, timeout)) {
1708 dev1 = 0;
1709 break;
1710 }
1711 msleep(50); /* give drive a breather */
1712 }
1713 if (dev1)
1714 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1715
1716 /* is all this really necessary? */
1717 ap->ops->dev_select(ap, 0);
1718 if (dev1)
1719 ap->ops->dev_select(ap, 1);
1720 if (dev0)
1721 ap->ops->dev_select(ap, 0);
1722 }
1723
1724 /**
1725 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1726 * @ap: Port to reset and probe
1727 *
1728 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1729 * probe the bus. Not often used these days.
1730 *
1731 * LOCKING:
1732 * PCI/etc. bus probe sem.
1733 *
1734 */
1735
1736 static unsigned int ata_bus_edd(struct ata_port *ap)
1737 {
1738 struct ata_taskfile tf;
1739
1740 /* set up execute-device-diag (bus reset) taskfile */
1741 /* also, take interrupts to a known state (disabled) */
1742 DPRINTK("execute-device-diag\n");
1743 ata_tf_init(ap, &tf, 0);
1744 tf.ctl |= ATA_NIEN;
1745 tf.command = ATA_CMD_EDD;
1746 tf.protocol = ATA_PROT_NODATA;
1747
1748 /* do bus reset */
1749 ata_tf_to_host(ap, &tf);
1750
1751 /* spec says at least 2ms. but who knows with those
1752 * crazy ATAPI devices...
1753 */
1754 msleep(150);
1755
1756 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1757 }
1758
1759 static unsigned int ata_bus_softreset(struct ata_port *ap,
1760 unsigned int devmask)
1761 {
1762 struct ata_ioports *ioaddr = &ap->ioaddr;
1763
1764 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1765
1766 /* software reset. causes dev0 to be selected */
1767 if (ap->flags & ATA_FLAG_MMIO) {
1768 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1769 udelay(20); /* FIXME: flush */
1770 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1771 udelay(20); /* FIXME: flush */
1772 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1773 } else {
1774 outb(ap->ctl, ioaddr->ctl_addr);
1775 udelay(10);
1776 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1777 udelay(10);
1778 outb(ap->ctl, ioaddr->ctl_addr);
1779 }
1780
1781 /* spec mandates ">= 2ms" before checking status.
1782 * We wait 150ms, because that was the magic delay used for
1783 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1784 * between when the ATA command register is written, and then
1785 * status is checked. Because waiting for "a while" before
1786 * checking status is fine, post SRST, we perform this magic
1787 * delay here as well.
1788 */
1789 msleep(150);
1790
1791 ata_bus_post_reset(ap, devmask);
1792
1793 return 0;
1794 }
1795
1796 /**
1797 * ata_bus_reset - reset host port and associated ATA channel
1798 * @ap: port to reset
1799 *
1800 * This is typically the first time we actually start issuing
1801 * commands to the ATA channel. We wait for BSY to clear, then
1802 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1803 * result. Determine what devices, if any, are on the channel
1804 * by looking at the device 0/1 error register. Look at the signature
1805 * stored in each device's taskfile registers, to determine if
1806 * the device is ATA or ATAPI.
1807 *
1808 * LOCKING:
1809 * PCI/etc. bus probe sem.
1810 * Obtains host_set lock.
1811 *
1812 * SIDE EFFECTS:
1813 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1814 */
1815
1816 void ata_bus_reset(struct ata_port *ap)
1817 {
1818 struct ata_ioports *ioaddr = &ap->ioaddr;
1819 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1820 u8 err;
1821 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1822
1823 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1824
1825 /* determine if device 0/1 are present */
1826 if (ap->flags & ATA_FLAG_SATA_RESET)
1827 dev0 = 1;
1828 else {
1829 dev0 = ata_devchk(ap, 0);
1830 if (slave_possible)
1831 dev1 = ata_devchk(ap, 1);
1832 }
1833
1834 if (dev0)
1835 devmask |= (1 << 0);
1836 if (dev1)
1837 devmask |= (1 << 1);
1838
1839 /* select device 0 again */
1840 ap->ops->dev_select(ap, 0);
1841
1842 /* issue bus reset */
1843 if (ap->flags & ATA_FLAG_SRST)
1844 rc = ata_bus_softreset(ap, devmask);
1845 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1846 /* set up device control */
1847 if (ap->flags & ATA_FLAG_MMIO)
1848 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1849 else
1850 outb(ap->ctl, ioaddr->ctl_addr);
1851 rc = ata_bus_edd(ap);
1852 }
1853
1854 if (rc)
1855 goto err_out;
1856
1857 /*
1858 * determine by signature whether we have ATA or ATAPI devices
1859 */
1860 err = ata_dev_try_classify(ap, 0);
1861 if ((slave_possible) && (err != 0x81))
1862 ata_dev_try_classify(ap, 1);
1863
1864 /* re-enable interrupts */
1865 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1866 ata_irq_on(ap);
1867
1868 /* is double-select really necessary? */
1869 if (ap->device[1].class != ATA_DEV_NONE)
1870 ap->ops->dev_select(ap, 1);
1871 if (ap->device[0].class != ATA_DEV_NONE)
1872 ap->ops->dev_select(ap, 0);
1873
1874 /* if no devices were detected, disable this port */
1875 if ((ap->device[0].class == ATA_DEV_NONE) &&
1876 (ap->device[1].class == ATA_DEV_NONE))
1877 goto err_out;
1878
1879 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1880 /* set up device control for ATA_FLAG_SATA_RESET */
1881 if (ap->flags & ATA_FLAG_MMIO)
1882 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1883 else
1884 outb(ap->ctl, ioaddr->ctl_addr);
1885 }
1886
1887 DPRINTK("EXIT\n");
1888 return;
1889
1890 err_out:
1891 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1892 ap->ops->port_disable(ap);
1893
1894 DPRINTK("EXIT\n");
1895 }
1896
1897 static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
1898 {
1899 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1900 ap->id, dev->devno);
1901 }
1902
1903 static const char * ata_dma_blacklist [] = {
1904 "WDC AC11000H",
1905 "WDC AC22100H",
1906 "WDC AC32500H",
1907 "WDC AC33100H",
1908 "WDC AC31600H",
1909 "WDC AC32100H",
1910 "WDC AC23200L",
1911 "Compaq CRD-8241B",
1912 "CRD-8400B",
1913 "CRD-8480B",
1914 "CRD-8482B",
1915 "CRD-84",
1916 "SanDisk SDP3B",
1917 "SanDisk SDP3B-64",
1918 "SANYO CD-ROM CRD",
1919 "HITACHI CDR-8",
1920 "HITACHI CDR-8335",
1921 "HITACHI CDR-8435",
1922 "Toshiba CD-ROM XM-6202B",
1923 "CD-532E-A",
1924 "E-IDE CD-ROM CR-840",
1925 "CD-ROM Drive/F5A",
1926 "WPI CDD-820",
1927 "SAMSUNG CD-ROM SC-148C",
1928 "SAMSUNG CD-ROM SC",
1929 "SanDisk SDP3B-64",
1930 "SAMSUNG CD-ROM SN-124",
1931 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
1932 "_NEC DV5800A",
1933 };
1934
1935 static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1936 {
1937 unsigned char model_num[40];
1938 char *s;
1939 unsigned int len;
1940 int i;
1941
1942 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
1943 sizeof(model_num));
1944 s = &model_num[0];
1945 len = strnlen(s, sizeof(model_num));
1946
1947 /* ATAPI specifies that empty space is blank-filled; remove blanks */
1948 while ((len > 0) && (s[len - 1] == ' ')) {
1949 len--;
1950 s[len] = 0;
1951 }
1952
1953 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
1954 if (!strncmp(ata_dma_blacklist[i], s, len))
1955 return 1;
1956
1957 return 0;
1958 }
1959
1960 static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
1961 {
1962 struct ata_device *master, *slave;
1963 unsigned int mask;
1964
1965 master = &ap->device[0];
1966 slave = &ap->device[1];
1967
1968 assert (ata_dev_present(master) || ata_dev_present(slave));
1969
1970 if (shift == ATA_SHIFT_UDMA) {
1971 mask = ap->udma_mask;
1972 if (ata_dev_present(master)) {
1973 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
1974 if (ata_dma_blacklisted(ap, master)) {
1975 mask = 0;
1976 ata_pr_blacklisted(ap, master);
1977 }
1978 }
1979 if (ata_dev_present(slave)) {
1980 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
1981 if (ata_dma_blacklisted(ap, slave)) {
1982 mask = 0;
1983 ata_pr_blacklisted(ap, slave);
1984 }
1985 }
1986 }
1987 else if (shift == ATA_SHIFT_MWDMA) {
1988 mask = ap->mwdma_mask;
1989 if (ata_dev_present(master)) {
1990 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
1991 if (ata_dma_blacklisted(ap, master)) {
1992 mask = 0;
1993 ata_pr_blacklisted(ap, master);
1994 }
1995 }
1996 if (ata_dev_present(slave)) {
1997 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
1998 if (ata_dma_blacklisted(ap, slave)) {
1999 mask = 0;
2000 ata_pr_blacklisted(ap, slave);
2001 }
2002 }
2003 }
2004 else if (shift == ATA_SHIFT_PIO) {
2005 mask = ap->pio_mask;
2006 if (ata_dev_present(master)) {
2007 /* spec doesn't return explicit support for
2008 * PIO0-2, so we fake it
2009 */
2010 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2011 tmp_mode <<= 3;
2012 tmp_mode |= 0x7;
2013 mask &= tmp_mode;
2014 }
2015 if (ata_dev_present(slave)) {
2016 /* spec doesn't return explicit support for
2017 * PIO0-2, so we fake it
2018 */
2019 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2020 tmp_mode <<= 3;
2021 tmp_mode |= 0x7;
2022 mask &= tmp_mode;
2023 }
2024 }
2025 else {
2026 mask = 0xffffffff; /* shut up compiler warning */
2027 BUG();
2028 }
2029
2030 return mask;
2031 }
2032
2033 /* find greatest bit */
2034 static int fgb(u32 bitmap)
2035 {
2036 unsigned int i;
2037 int x = -1;
2038
2039 for (i = 0; i < 32; i++)
2040 if (bitmap & (1 << i))
2041 x = i;
2042
2043 return x;
2044 }
2045
2046 /**
2047 * ata_choose_xfer_mode - attempt to find best transfer mode
2048 * @ap: Port for which an xfer mode will be selected
2049 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2050 * @xfer_shift_out: (output) bit shift that selects this mode
2051 *
2052 * Based on host and device capabilities, determine the
2053 * maximum transfer mode that is amenable to all.
2054 *
2055 * LOCKING:
2056 * PCI/etc. bus probe sem.
2057 *
2058 * RETURNS:
2059 * Zero on success, negative on error.
2060 */
2061
2062 static int ata_choose_xfer_mode(struct ata_port *ap,
2063 u8 *xfer_mode_out,
2064 unsigned int *xfer_shift_out)
2065 {
2066 unsigned int mask, shift;
2067 int x, i;
2068
2069 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2070 shift = xfer_mode_classes[i].shift;
2071 mask = ata_get_mode_mask(ap, shift);
2072
2073 x = fgb(mask);
2074 if (x >= 0) {
2075 *xfer_mode_out = xfer_mode_classes[i].base + x;
2076 *xfer_shift_out = shift;
2077 return 0;
2078 }
2079 }
2080
2081 return -1;
2082 }
2083
2084 /**
2085 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2086 * @ap: Port associated with device @dev
2087 * @dev: Device to which command will be sent
2088 *
2089 * Issue SET FEATURES - XFER MODE command to device @dev
2090 * on port @ap.
2091 *
2092 * LOCKING:
2093 * PCI/etc. bus probe sem.
2094 */
2095
2096 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2097 {
2098 DECLARE_COMPLETION(wait);
2099 struct ata_queued_cmd *qc;
2100 int rc;
2101 unsigned long flags;
2102
2103 /* set up set-features taskfile */
2104 DPRINTK("set features - xfer mode\n");
2105
2106 qc = ata_qc_new_init(ap, dev);
2107 BUG_ON(qc == NULL);
2108
2109 qc->tf.command = ATA_CMD_SET_FEATURES;
2110 qc->tf.feature = SETFEATURES_XFER;
2111 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2112 qc->tf.protocol = ATA_PROT_NODATA;
2113 qc->tf.nsect = dev->xfer_mode;
2114
2115 qc->waiting = &wait;
2116 qc->complete_fn = ata_qc_complete_noop;
2117
2118 spin_lock_irqsave(&ap->host_set->lock, flags);
2119 rc = ata_qc_issue(qc);
2120 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2121
2122 if (rc)
2123 ata_port_disable(ap);
2124 else
2125 wait_for_completion(&wait);
2126
2127 DPRINTK("EXIT\n");
2128 }
2129
2130 /**
2131 * ata_sg_clean - Unmap DMA memory associated with command
2132 * @qc: Command containing DMA memory to be released
2133 *
2134 * Unmap all mapped DMA memory associated with this command.
2135 *
2136 * LOCKING:
2137 * spin_lock_irqsave(host_set lock)
2138 */
2139
2140 static void ata_sg_clean(struct ata_queued_cmd *qc)
2141 {
2142 struct ata_port *ap = qc->ap;
2143 struct scatterlist *sg = qc->sg;
2144 int dir = qc->dma_dir;
2145
2146 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2147 assert(sg != NULL);
2148
2149 if (qc->flags & ATA_QCFLAG_SINGLE)
2150 assert(qc->n_elem == 1);
2151
2152 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2153
2154 if (qc->flags & ATA_QCFLAG_SG)
2155 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2156 else
2157 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2158 sg_dma_len(&sg[0]), dir);
2159
2160 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2161 qc->sg = NULL;
2162 }
2163
2164 /**
2165 * ata_fill_sg - Fill PCI IDE PRD table
2166 * @qc: Metadata associated with taskfile to be transferred
2167 *
2168 * Fill PCI IDE PRD (scatter-gather) table with segments
2169 * associated with the current disk command.
2170 *
2171 * LOCKING:
2172 * spin_lock_irqsave(host_set lock)
2173 *
2174 */
2175 static void ata_fill_sg(struct ata_queued_cmd *qc)
2176 {
2177 struct scatterlist *sg = qc->sg;
2178 struct ata_port *ap = qc->ap;
2179 unsigned int idx, nelem;
2180
2181 assert(sg != NULL);
2182 assert(qc->n_elem > 0);
2183
2184 idx = 0;
2185 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
2186 u32 addr, offset;
2187 u32 sg_len, len;
2188
2189 /* determine if physical DMA addr spans 64K boundary.
2190 * Note h/w doesn't support 64-bit, so we unconditionally
2191 * truncate dma_addr_t to u32.
2192 */
2193 addr = (u32) sg_dma_address(sg);
2194 sg_len = sg_dma_len(sg);
2195
2196 while (sg_len) {
2197 offset = addr & 0xffff;
2198 len = sg_len;
2199 if ((offset + sg_len) > 0x10000)
2200 len = 0x10000 - offset;
2201
2202 ap->prd[idx].addr = cpu_to_le32(addr);
2203 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2204 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2205
2206 idx++;
2207 sg_len -= len;
2208 addr += len;
2209 }
2210 }
2211
2212 if (idx)
2213 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2214 }
2215 /**
2216 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2217 * @qc: Metadata associated with taskfile to check
2218 *
2219 * Allow low-level driver to filter ATA PACKET commands, returning
2220 * a status indicating whether or not it is OK to use DMA for the
2221 * supplied PACKET command.
2222 *
2223 * LOCKING:
2224 * spin_lock_irqsave(host_set lock)
2225 *
2226 * RETURNS: 0 when ATAPI DMA can be used
2227 * nonzero otherwise
2228 */
2229 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2230 {
2231 struct ata_port *ap = qc->ap;
2232 int rc = 0; /* Assume ATAPI DMA is OK by default */
2233
2234 if (ap->ops->check_atapi_dma)
2235 rc = ap->ops->check_atapi_dma(qc);
2236
2237 return rc;
2238 }
2239 /**
2240 * ata_qc_prep - Prepare taskfile for submission
2241 * @qc: Metadata associated with taskfile to be prepared
2242 *
2243 * Prepare ATA taskfile for submission.
2244 *
2245 * LOCKING:
2246 * spin_lock_irqsave(host_set lock)
2247 */
2248 void ata_qc_prep(struct ata_queued_cmd *qc)
2249 {
2250 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2251 return;
2252
2253 ata_fill_sg(qc);
2254 }
2255
2256 /**
2257 * ata_sg_init_one - Associate command with memory buffer
2258 * @qc: Command to be associated
2259 * @buf: Memory buffer
2260 * @buflen: Length of memory buffer, in bytes.
2261 *
2262 * Initialize the data-related elements of queued_cmd @qc
2263 * to point to a single memory buffer, @buf of byte length @buflen.
2264 *
2265 * LOCKING:
2266 * spin_lock_irqsave(host_set lock)
2267 */
2268
2269
2270
2271 /**
2272 * ata_sg_init_one - Prepare a one-entry scatter-gather list.
2273 * @qc: Queued command
2274 * @buf: transfer buffer
2275 * @buflen: length of buf
2276 *
2277 * Builds a single-entry scatter-gather list to initiate a
2278 * transfer utilizing the specified buffer.
2279 *
2280 * LOCKING:
2281 */
2282 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2283 {
2284 struct scatterlist *sg;
2285
2286 qc->flags |= ATA_QCFLAG_SINGLE;
2287
2288 memset(&qc->sgent, 0, sizeof(qc->sgent));
2289 qc->sg = &qc->sgent;
2290 qc->n_elem = 1;
2291 qc->buf_virt = buf;
2292
2293 sg = qc->sg;
2294 sg->page = virt_to_page(buf);
2295 sg->offset = (unsigned long) buf & ~PAGE_MASK;
2296 sg->length = buflen;
2297 }
2298
2299 /**
2300 * ata_sg_init - Associate command with scatter-gather table.
2301 * @qc: Command to be associated
2302 * @sg: Scatter-gather table.
2303 * @n_elem: Number of elements in s/g table.
2304 *
2305 * Initialize the data-related elements of queued_cmd @qc
2306 * to point to a scatter-gather table @sg, containing @n_elem
2307 * elements.
2308 *
2309 * LOCKING:
2310 * spin_lock_irqsave(host_set lock)
2311 */
2312
2313
2314 /**
2315 * ata_sg_init - Assign a scatter gather list to a queued command
2316 * @qc: Queued command
2317 * @sg: Scatter-gather list
2318 * @n_elem: length of sg list
2319 *
2320 * Attaches a scatter-gather list to a queued command.
2321 *
2322 * LOCKING:
2323 */
2324
2325 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2326 unsigned int n_elem)
2327 {
2328 qc->flags |= ATA_QCFLAG_SG;
2329 qc->sg = sg;
2330 qc->n_elem = n_elem;
2331 }
2332
2333 /**
2334 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2335 * @qc: Command with memory buffer to be mapped.
2336 *
2337 * DMA-map the memory buffer associated with queued_cmd @qc.
2338 *
2339 * LOCKING:
2340 * spin_lock_irqsave(host_set lock)
2341 *
2342 * RETURNS:
2343 * Zero on success, negative on error.
2344 */
2345
2346 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2347 {
2348 struct ata_port *ap = qc->ap;
2349 int dir = qc->dma_dir;
2350 struct scatterlist *sg = qc->sg;
2351 dma_addr_t dma_address;
2352
2353 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2354 sg->length, dir);
2355 if (dma_mapping_error(dma_address))
2356 return -1;
2357
2358 sg_dma_address(sg) = dma_address;
2359 sg_dma_len(sg) = sg->length;
2360
2361 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2362 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2363
2364 return 0;
2365 }
2366
2367 /**
2368 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2369 * @qc: Command with scatter-gather table to be mapped.
2370 *
2371 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2372 *
2373 * LOCKING:
2374 * spin_lock_irqsave(host_set lock)
2375 *
2376 * RETURNS:
2377 * Zero on success, negative on error.
2378 *
2379 */
2380
2381 static int ata_sg_setup(struct ata_queued_cmd *qc)
2382 {
2383 struct ata_port *ap = qc->ap;
2384 struct scatterlist *sg = qc->sg;
2385 int n_elem, dir;
2386
2387 VPRINTK("ENTER, ata%u\n", ap->id);
2388 assert(qc->flags & ATA_QCFLAG_SG);
2389
2390 dir = qc->dma_dir;
2391 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2392 if (n_elem < 1)
2393 return -1;
2394
2395 DPRINTK("%d sg elements mapped\n", n_elem);
2396
2397 qc->n_elem = n_elem;
2398
2399 return 0;
2400 }
2401
2402 /**
2403 * ata_pio_poll -
2404 * @ap:
2405 *
2406 * LOCKING:
2407 * None. (executing in kernel thread context)
2408 *
2409 * RETURNS:
2410 *
2411 */
2412
2413 static unsigned long ata_pio_poll(struct ata_port *ap)
2414 {
2415 u8 status;
2416 unsigned int poll_state = PIO_ST_UNKNOWN;
2417 unsigned int reg_state = PIO_ST_UNKNOWN;
2418 const unsigned int tmout_state = PIO_ST_TMOUT;
2419
2420 switch (ap->pio_task_state) {
2421 case PIO_ST:
2422 case PIO_ST_POLL:
2423 poll_state = PIO_ST_POLL;
2424 reg_state = PIO_ST;
2425 break;
2426 case PIO_ST_LAST:
2427 case PIO_ST_LAST_POLL:
2428 poll_state = PIO_ST_LAST_POLL;
2429 reg_state = PIO_ST_LAST;
2430 break;
2431 default:
2432 BUG();
2433 break;
2434 }
2435
2436 status = ata_chk_status(ap);
2437 if (status & ATA_BUSY) {
2438 if (time_after(jiffies, ap->pio_task_timeout)) {
2439 ap->pio_task_state = tmout_state;
2440 return 0;
2441 }
2442 ap->pio_task_state = poll_state;
2443 return ATA_SHORT_PAUSE;
2444 }
2445
2446 ap->pio_task_state = reg_state;
2447 return 0;
2448 }
2449
2450 /**
2451 * ata_pio_complete -
2452 * @ap:
2453 *
2454 * LOCKING:
2455 * None. (executing in kernel thread context)
2456 */
2457
2458 static void ata_pio_complete (struct ata_port *ap)
2459 {
2460 struct ata_queued_cmd *qc;
2461 u8 drv_stat;
2462
2463 /*
2464 * This is purely hueristic. This is a fast path.
2465 * Sometimes when we enter, BSY will be cleared in
2466 * a chk-status or two. If not, the drive is probably seeking
2467 * or something. Snooze for a couple msecs, then
2468 * chk-status again. If still busy, fall back to
2469 * PIO_ST_POLL state.
2470 */
2471 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2472 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2473 msleep(2);
2474 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2475 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2476 ap->pio_task_state = PIO_ST_LAST_POLL;
2477 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2478 return;
2479 }
2480 }
2481
2482 drv_stat = ata_wait_idle(ap);
2483 if (!ata_ok(drv_stat)) {
2484 ap->pio_task_state = PIO_ST_ERR;
2485 return;
2486 }
2487
2488 qc = ata_qc_from_tag(ap, ap->active_tag);
2489 assert(qc != NULL);
2490
2491 ap->pio_task_state = PIO_ST_IDLE;
2492
2493 ata_irq_on(ap);
2494
2495 ata_qc_complete(qc, drv_stat);
2496 }
2497
2498
2499 /**
2500 * swap_buf_le16 -
2501 * @buf: Buffer to swap
2502 * @buf_words: Number of 16-bit words in buffer.
2503 *
2504 * Swap halves of 16-bit words if needed to convert from
2505 * little-endian byte order to native cpu byte order, or
2506 * vice-versa.
2507 *
2508 * LOCKING:
2509 */
2510 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2511 {
2512 #ifdef __BIG_ENDIAN
2513 unsigned int i;
2514
2515 for (i = 0; i < buf_words; i++)
2516 buf[i] = le16_to_cpu(buf[i]);
2517 #endif /* __BIG_ENDIAN */
2518 }
2519
2520 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2521 unsigned int buflen, int write_data)
2522 {
2523 unsigned int i;
2524 unsigned int words = buflen >> 1;
2525 u16 *buf16 = (u16 *) buf;
2526 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2527
2528 if (write_data) {
2529 for (i = 0; i < words; i++)
2530 writew(le16_to_cpu(buf16[i]), mmio);
2531 } else {
2532 for (i = 0; i < words; i++)
2533 buf16[i] = cpu_to_le16(readw(mmio));
2534 }
2535 }
2536
2537 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2538 unsigned int buflen, int write_data)
2539 {
2540 unsigned int dwords = buflen >> 1;
2541
2542 if (write_data)
2543 outsw(ap->ioaddr.data_addr, buf, dwords);
2544 else
2545 insw(ap->ioaddr.data_addr, buf, dwords);
2546 }
2547
2548 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2549 unsigned int buflen, int do_write)
2550 {
2551 if (ap->flags & ATA_FLAG_MMIO)
2552 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2553 else
2554 ata_pio_data_xfer(ap, buf, buflen, do_write);
2555 }
2556
2557 static void ata_pio_sector(struct ata_queued_cmd *qc)
2558 {
2559 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2560 struct scatterlist *sg = qc->sg;
2561 struct ata_port *ap = qc->ap;
2562 struct page *page;
2563 unsigned int offset;
2564 unsigned char *buf;
2565
2566 if (qc->cursect == (qc->nsect - 1))
2567 ap->pio_task_state = PIO_ST_LAST;
2568
2569 page = sg[qc->cursg].page;
2570 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2571
2572 /* get the current page and offset */
2573 page = nth_page(page, (offset >> PAGE_SHIFT));
2574 offset %= PAGE_SIZE;
2575
2576 buf = kmap(page) + offset;
2577
2578 qc->cursect++;
2579 qc->cursg_ofs++;
2580
2581 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
2582 qc->cursg++;
2583 qc->cursg_ofs = 0;
2584 }
2585
2586 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2587
2588 /* do the actual data transfer */
2589 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2590 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2591
2592 kunmap(page);
2593 }
2594
2595 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2596 {
2597 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2598 struct scatterlist *sg = qc->sg;
2599 struct ata_port *ap = qc->ap;
2600 struct page *page;
2601 unsigned char *buf;
2602 unsigned int offset, count;
2603
2604 if (qc->curbytes == qc->nbytes - bytes)
2605 ap->pio_task_state = PIO_ST_LAST;
2606
2607 next_sg:
2608 sg = &qc->sg[qc->cursg];
2609
2610 next_page:
2611 page = sg->page;
2612 offset = sg->offset + qc->cursg_ofs;
2613
2614 /* get the current page and offset */
2615 page = nth_page(page, (offset >> PAGE_SHIFT));
2616 offset %= PAGE_SIZE;
2617
2618 count = min(sg->length - qc->cursg_ofs, bytes);
2619
2620 /* don't cross page boundaries */
2621 count = min(count, (unsigned int)PAGE_SIZE - offset);
2622
2623 buf = kmap(page) + offset;
2624
2625 bytes -= count;
2626 qc->curbytes += count;
2627 qc->cursg_ofs += count;
2628
2629 if (qc->cursg_ofs == sg->length) {
2630 qc->cursg++;
2631 qc->cursg_ofs = 0;
2632 }
2633
2634 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2635
2636 /* do the actual data transfer */
2637 ata_data_xfer(ap, buf, count, do_write);
2638
2639 kunmap(page);
2640
2641 if (bytes) {
2642 if (qc->cursg_ofs < sg->length)
2643 goto next_page;
2644 goto next_sg;
2645 }
2646 }
2647
2648 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2649 {
2650 struct ata_port *ap = qc->ap;
2651 struct ata_device *dev = qc->dev;
2652 unsigned int ireason, bc_lo, bc_hi, bytes;
2653 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
2654
2655 ap->ops->tf_read(ap, &qc->tf);
2656 ireason = qc->tf.nsect;
2657 bc_lo = qc->tf.lbam;
2658 bc_hi = qc->tf.lbah;
2659 bytes = (bc_hi << 8) | bc_lo;
2660
2661 /* shall be cleared to zero, indicating xfer of data */
2662 if (ireason & (1 << 0))
2663 goto err_out;
2664
2665 /* make sure transfer direction matches expected */
2666 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
2667 if (do_write != i_write)
2668 goto err_out;
2669
2670 __atapi_pio_bytes(qc, bytes);
2671
2672 return;
2673
2674 err_out:
2675 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2676 ap->id, dev->devno);
2677 ap->pio_task_state = PIO_ST_ERR;
2678 }
2679
2680 /**
2681 * ata_pio_sector -
2682 * @ap:
2683 *
2684 * LOCKING:
2685 * None. (executing in kernel thread context)
2686 */
2687
2688 static void ata_pio_block(struct ata_port *ap)
2689 {
2690 struct ata_queued_cmd *qc;
2691 u8 status;
2692
2693 /*
2694 * This is purely hueristic. This is a fast path.
2695 * Sometimes when we enter, BSY will be cleared in
2696 * a chk-status or two. If not, the drive is probably seeking
2697 * or something. Snooze for a couple msecs, then
2698 * chk-status again. If still busy, fall back to
2699 * PIO_ST_POLL state.
2700 */
2701 status = ata_busy_wait(ap, ATA_BUSY, 5);
2702 if (status & ATA_BUSY) {
2703 msleep(2);
2704 status = ata_busy_wait(ap, ATA_BUSY, 10);
2705 if (status & ATA_BUSY) {
2706 ap->pio_task_state = PIO_ST_POLL;
2707 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2708 return;
2709 }
2710 }
2711
2712 qc = ata_qc_from_tag(ap, ap->active_tag);
2713 assert(qc != NULL);
2714
2715 if (is_atapi_taskfile(&qc->tf)) {
2716 /* no more data to transfer or unsupported ATAPI command */
2717 if ((status & ATA_DRQ) == 0) {
2718 ap->pio_task_state = PIO_ST_IDLE;
2719
2720 ata_irq_on(ap);
2721
2722 ata_qc_complete(qc, status);
2723 return;
2724 }
2725
2726 atapi_pio_bytes(qc);
2727 } else {
2728 /* handle BSY=0, DRQ=0 as error */
2729 if ((status & ATA_DRQ) == 0) {
2730 ap->pio_task_state = PIO_ST_ERR;
2731 return;
2732 }
2733
2734 ata_pio_sector(qc);
2735 }
2736 }
2737
2738 static void ata_pio_error(struct ata_port *ap)
2739 {
2740 struct ata_queued_cmd *qc;
2741 u8 drv_stat;
2742
2743 qc = ata_qc_from_tag(ap, ap->active_tag);
2744 assert(qc != NULL);
2745
2746 drv_stat = ata_chk_status(ap);
2747 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
2748 ap->id, drv_stat);
2749
2750 ap->pio_task_state = PIO_ST_IDLE;
2751
2752 ata_irq_on(ap);
2753
2754 ata_qc_complete(qc, drv_stat | ATA_ERR);
2755 }
2756
2757 static void ata_pio_task(void *_data)
2758 {
2759 struct ata_port *ap = _data;
2760 unsigned long timeout = 0;
2761
2762 switch (ap->pio_task_state) {
2763 case PIO_ST_IDLE:
2764 return;
2765
2766 case PIO_ST:
2767 ata_pio_block(ap);
2768 break;
2769
2770 case PIO_ST_LAST:
2771 ata_pio_complete(ap);
2772 break;
2773
2774 case PIO_ST_POLL:
2775 case PIO_ST_LAST_POLL:
2776 timeout = ata_pio_poll(ap);
2777 break;
2778
2779 case PIO_ST_TMOUT:
2780 case PIO_ST_ERR:
2781 ata_pio_error(ap);
2782 return;
2783 }
2784
2785 if (timeout)
2786 queue_delayed_work(ata_wq, &ap->pio_task,
2787 timeout);
2788 else
2789 queue_work(ata_wq, &ap->pio_task);
2790 }
2791
2792 static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
2793 struct scsi_cmnd *cmd)
2794 {
2795 DECLARE_COMPLETION(wait);
2796 struct ata_queued_cmd *qc;
2797 unsigned long flags;
2798 int rc;
2799
2800 DPRINTK("ATAPI request sense\n");
2801
2802 qc = ata_qc_new_init(ap, dev);
2803 BUG_ON(qc == NULL);
2804
2805 /* FIXME: is this needed? */
2806 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
2807
2808 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
2809 qc->dma_dir = DMA_FROM_DEVICE;
2810
2811 memset(&qc->cdb, 0, ap->cdb_len);
2812 qc->cdb[0] = REQUEST_SENSE;
2813 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2814
2815 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2816 qc->tf.command = ATA_CMD_PACKET;
2817
2818 qc->tf.protocol = ATA_PROT_ATAPI;
2819 qc->tf.lbam = (8 * 1024) & 0xff;
2820 qc->tf.lbah = (8 * 1024) >> 8;
2821 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
2822
2823 qc->waiting = &wait;
2824 qc->complete_fn = ata_qc_complete_noop;
2825
2826 spin_lock_irqsave(&ap->host_set->lock, flags);
2827 rc = ata_qc_issue(qc);
2828 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2829
2830 if (rc)
2831 ata_port_disable(ap);
2832 else
2833 wait_for_completion(&wait);
2834
2835 DPRINTK("EXIT\n");
2836 }
2837
2838 /**
2839 * ata_qc_timeout - Handle timeout of queued command
2840 * @qc: Command that timed out
2841 *
2842 * Some part of the kernel (currently, only the SCSI layer)
2843 * has noticed that the active command on port @ap has not
2844 * completed after a specified length of time. Handle this
2845 * condition by disabling DMA (if necessary) and completing
2846 * transactions, with error if necessary.
2847 *
2848 * This also handles the case of the "lost interrupt", where
2849 * for some reason (possibly hardware bug, possibly driver bug)
2850 * an interrupt was not delivered to the driver, even though the
2851 * transaction completed successfully.
2852 *
2853 * LOCKING:
2854 * Inherited from SCSI layer (none, can sleep)
2855 */
2856
2857 static void ata_qc_timeout(struct ata_queued_cmd *qc)
2858 {
2859 struct ata_port *ap = qc->ap;
2860 struct ata_device *dev = qc->dev;
2861 u8 host_stat = 0, drv_stat;
2862
2863 DPRINTK("ENTER\n");
2864
2865 /* FIXME: doesn't this conflict with timeout handling? */
2866 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
2867 struct scsi_cmnd *cmd = qc->scsicmd;
2868
2869 if (!scsi_eh_eflags_chk(cmd, SCSI_EH_CANCEL_CMD)) {
2870
2871 /* finish completing original command */
2872 __ata_qc_complete(qc);
2873
2874 atapi_request_sense(ap, dev, cmd);
2875
2876 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
2877 scsi_finish_command(cmd);
2878
2879 goto out;
2880 }
2881 }
2882
2883 /* hack alert! We cannot use the supplied completion
2884 * function from inside the ->eh_strategy_handler() thread.
2885 * libata is the only user of ->eh_strategy_handler() in
2886 * any kernel, so the default scsi_done() assumes it is
2887 * not being called from the SCSI EH.
2888 */
2889 qc->scsidone = scsi_finish_command;
2890
2891 switch (qc->tf.protocol) {
2892
2893 case ATA_PROT_DMA:
2894 case ATA_PROT_ATAPI_DMA:
2895 host_stat = ap->ops->bmdma_status(ap);
2896
2897 /* before we do anything else, clear DMA-Start bit */
2898 ap->ops->bmdma_stop(ap);
2899
2900 /* fall through */
2901
2902 default:
2903 ata_altstatus(ap);
2904 drv_stat = ata_chk_status(ap);
2905
2906 /* ack bmdma irq events */
2907 ap->ops->irq_clear(ap);
2908
2909 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
2910 ap->id, qc->tf.command, drv_stat, host_stat);
2911
2912 /* complete taskfile transaction */
2913 ata_qc_complete(qc, drv_stat);
2914 break;
2915 }
2916 out:
2917 DPRINTK("EXIT\n");
2918 }
2919
2920 /**
2921 * ata_eng_timeout - Handle timeout of queued command
2922 * @ap: Port on which timed-out command is active
2923 *
2924 * Some part of the kernel (currently, only the SCSI layer)
2925 * has noticed that the active command on port @ap has not
2926 * completed after a specified length of time. Handle this
2927 * condition by disabling DMA (if necessary) and completing
2928 * transactions, with error if necessary.
2929 *
2930 * This also handles the case of the "lost interrupt", where
2931 * for some reason (possibly hardware bug, possibly driver bug)
2932 * an interrupt was not delivered to the driver, even though the
2933 * transaction completed successfully.
2934 *
2935 * LOCKING:
2936 * Inherited from SCSI layer (none, can sleep)
2937 */
2938
2939 void ata_eng_timeout(struct ata_port *ap)
2940 {
2941 struct ata_queued_cmd *qc;
2942
2943 DPRINTK("ENTER\n");
2944
2945 qc = ata_qc_from_tag(ap, ap->active_tag);
2946 if (!qc) {
2947 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
2948 ap->id);
2949 goto out;
2950 }
2951
2952 ata_qc_timeout(qc);
2953
2954 out:
2955 DPRINTK("EXIT\n");
2956 }
2957
2958 /**
2959 * ata_qc_new - Request an available ATA command, for queueing
2960 * @ap: Port associated with device @dev
2961 * @dev: Device from whom we request an available command structure
2962 *
2963 * LOCKING:
2964 * None.
2965 */
2966
2967 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
2968 {
2969 struct ata_queued_cmd *qc = NULL;
2970 unsigned int i;
2971
2972 for (i = 0; i < ATA_MAX_QUEUE; i++)
2973 if (!test_and_set_bit(i, &ap->qactive)) {
2974 qc = ata_qc_from_tag(ap, i);
2975 break;
2976 }
2977
2978 if (qc)
2979 qc->tag = i;
2980
2981 return qc;
2982 }
2983
2984 /**
2985 * ata_qc_new_init - Request an available ATA command, and initialize it
2986 * @ap: Port associated with device @dev
2987 * @dev: Device from whom we request an available command structure
2988 *
2989 * LOCKING:
2990 * None.
2991 */
2992
2993 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
2994 struct ata_device *dev)
2995 {
2996 struct ata_queued_cmd *qc;
2997
2998 qc = ata_qc_new(ap);
2999 if (qc) {
3000 qc->sg = NULL;
3001 qc->flags = 0;
3002 qc->scsicmd = NULL;
3003 qc->ap = ap;
3004 qc->dev = dev;
3005 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3006 qc->nsect = 0;
3007 qc->nbytes = qc->curbytes = 0;
3008
3009 ata_tf_init(ap, &qc->tf, dev->devno);
3010
3011 if (dev->flags & ATA_DFLAG_LBA48)
3012 qc->tf.flags |= ATA_TFLAG_LBA48;
3013 }
3014
3015 return qc;
3016 }
3017
3018 static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3019 {
3020 return 0;
3021 }
3022
3023 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3024 {
3025 struct ata_port *ap = qc->ap;
3026 unsigned int tag, do_clear = 0;
3027
3028 qc->flags = 0;
3029 tag = qc->tag;
3030 if (likely(ata_tag_valid(tag))) {
3031 if (tag == ap->active_tag)
3032 ap->active_tag = ATA_TAG_POISON;
3033 qc->tag = ATA_TAG_POISON;
3034 do_clear = 1;
3035 }
3036
3037 if (qc->waiting) {
3038 struct completion *waiting = qc->waiting;
3039 qc->waiting = NULL;
3040 complete(waiting);
3041 }
3042
3043 if (likely(do_clear))
3044 clear_bit(tag, &ap->qactive);
3045 }
3046
3047 /**
3048 * ata_qc_free - free unused ata_queued_cmd
3049 * @qc: Command to complete
3050 *
3051 * Designed to free unused ata_queued_cmd object
3052 * in case something prevents using it.
3053 *
3054 * LOCKING:
3055 * spin_lock_irqsave(host_set lock)
3056 *
3057 */
3058 void ata_qc_free(struct ata_queued_cmd *qc)
3059 {
3060 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3061 assert(qc->waiting == NULL); /* nothing should be waiting */
3062
3063 __ata_qc_complete(qc);
3064 }
3065
3066 /**
3067 * ata_qc_complete - Complete an active ATA command
3068 * @qc: Command to complete
3069 * @drv_stat: ATA Status register contents
3070 *
3071 * Indicate to the mid and upper layers that an ATA
3072 * command has completed, with either an ok or not-ok status.
3073 *
3074 * LOCKING:
3075 * spin_lock_irqsave(host_set lock)
3076 *
3077 */
3078
3079 void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3080 {
3081 int rc;
3082
3083 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3084 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3085
3086 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3087 ata_sg_clean(qc);
3088
3089 /* call completion callback */
3090 rc = qc->complete_fn(qc, drv_stat);
3091 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3092
3093 /* if callback indicates not to complete command (non-zero),
3094 * return immediately
3095 */
3096 if (rc != 0)
3097 return;
3098
3099 __ata_qc_complete(qc);
3100
3101 VPRINTK("EXIT\n");
3102 }
3103
3104 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3105 {
3106 struct ata_port *ap = qc->ap;
3107
3108 switch (qc->tf.protocol) {
3109 case ATA_PROT_DMA:
3110 case ATA_PROT_ATAPI_DMA:
3111 return 1;
3112
3113 case ATA_PROT_ATAPI:
3114 case ATA_PROT_PIO:
3115 case ATA_PROT_PIO_MULT:
3116 if (ap->flags & ATA_FLAG_PIO_DMA)
3117 return 1;
3118
3119 /* fall through */
3120
3121 default:
3122 return 0;
3123 }
3124
3125 /* never reached */
3126 }
3127
3128 /**
3129 * ata_qc_issue - issue taskfile to device
3130 * @qc: command to issue to device
3131 *
3132 * Prepare an ATA command to submission to device.
3133 * This includes mapping the data into a DMA-able
3134 * area, filling in the S/G table, and finally
3135 * writing the taskfile to hardware, starting the command.
3136 *
3137 * LOCKING:
3138 * spin_lock_irqsave(host_set lock)
3139 *
3140 * RETURNS:
3141 * Zero on success, negative on error.
3142 */
3143
3144 int ata_qc_issue(struct ata_queued_cmd *qc)
3145 {
3146 struct ata_port *ap = qc->ap;
3147
3148 if (ata_should_dma_map(qc)) {
3149 if (qc->flags & ATA_QCFLAG_SG) {
3150 if (ata_sg_setup(qc))
3151 goto err_out;
3152 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3153 if (ata_sg_setup_one(qc))
3154 goto err_out;
3155 }
3156 } else {
3157 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3158 }
3159
3160 ap->ops->qc_prep(qc);
3161
3162 qc->ap->active_tag = qc->tag;
3163 qc->flags |= ATA_QCFLAG_ACTIVE;
3164
3165 return ap->ops->qc_issue(qc);
3166
3167 err_out:
3168 return -1;
3169 }
3170
3171
3172 /**
3173 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3174 * @qc: command to issue to device
3175 *
3176 * Using various libata functions and hooks, this function
3177 * starts an ATA command. ATA commands are grouped into
3178 * classes called "protocols", and issuing each type of protocol
3179 * is slightly different.
3180 *
3181 * May be used as the qc_issue() entry in ata_port_operations.
3182 *
3183 * LOCKING:
3184 * spin_lock_irqsave(host_set lock)
3185 *
3186 * RETURNS:
3187 * Zero on success, negative on error.
3188 */
3189
3190 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3191 {
3192 struct ata_port *ap = qc->ap;
3193
3194 ata_dev_select(ap, qc->dev->devno, 1, 0);
3195
3196 switch (qc->tf.protocol) {
3197 case ATA_PROT_NODATA:
3198 ata_tf_to_host_nolock(ap, &qc->tf);
3199 break;
3200
3201 case ATA_PROT_DMA:
3202 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3203 ap->ops->bmdma_setup(qc); /* set up bmdma */
3204 ap->ops->bmdma_start(qc); /* initiate bmdma */
3205 break;
3206
3207 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3208 ata_qc_set_polling(qc);
3209 ata_tf_to_host_nolock(ap, &qc->tf);
3210 ap->pio_task_state = PIO_ST;
3211 queue_work(ata_wq, &ap->pio_task);
3212 break;
3213
3214 case ATA_PROT_ATAPI:
3215 ata_qc_set_polling(qc);
3216 ata_tf_to_host_nolock(ap, &qc->tf);
3217 queue_work(ata_wq, &ap->packet_task);
3218 break;
3219
3220 case ATA_PROT_ATAPI_NODATA:
3221 ata_tf_to_host_nolock(ap, &qc->tf);
3222 queue_work(ata_wq, &ap->packet_task);
3223 break;
3224
3225 case ATA_PROT_ATAPI_DMA:
3226 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3227 ap->ops->bmdma_setup(qc); /* set up bmdma */
3228 queue_work(ata_wq, &ap->packet_task);
3229 break;
3230
3231 default:
3232 WARN_ON(1);
3233 return -1;
3234 }
3235
3236 return 0;
3237 }
3238
3239 /**
3240 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3241 * @qc: Info associated with this ATA transaction.
3242 *
3243 * LOCKING:
3244 * spin_lock_irqsave(host_set lock)
3245 */
3246
3247 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3248 {
3249 struct ata_port *ap = qc->ap;
3250 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3251 u8 dmactl;
3252 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3253
3254 /* load PRD table addr. */
3255 mb(); /* make sure PRD table writes are visible to controller */
3256 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3257
3258 /* specify data direction, triple-check start bit is clear */
3259 dmactl = readb(mmio + ATA_DMA_CMD);
3260 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3261 if (!rw)
3262 dmactl |= ATA_DMA_WR;
3263 writeb(dmactl, mmio + ATA_DMA_CMD);
3264
3265 /* issue r/w command */
3266 ap->ops->exec_command(ap, &qc->tf);
3267 }
3268
3269 /**
3270 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3271 * @qc: Info associated with this ATA transaction.
3272 *
3273 * LOCKING:
3274 * spin_lock_irqsave(host_set lock)
3275 */
3276
3277 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3278 {
3279 struct ata_port *ap = qc->ap;
3280 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3281 u8 dmactl;
3282
3283 /* start host DMA transaction */
3284 dmactl = readb(mmio + ATA_DMA_CMD);
3285 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3286
3287 /* Strictly, one may wish to issue a readb() here, to
3288 * flush the mmio write. However, control also passes
3289 * to the hardware at this point, and it will interrupt
3290 * us when we are to resume control. So, in effect,
3291 * we don't care when the mmio write flushes.
3292 * Further, a read of the DMA status register _immediately_
3293 * following the write may not be what certain flaky hardware
3294 * is expected, so I think it is best to not add a readb()
3295 * without first all the MMIO ATA cards/mobos.
3296 * Or maybe I'm just being paranoid.
3297 */
3298 }
3299
3300 /**
3301 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3302 * @qc: Info associated with this ATA transaction.
3303 *
3304 * LOCKING:
3305 * spin_lock_irqsave(host_set lock)
3306 */
3307
3308 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3309 {
3310 struct ata_port *ap = qc->ap;
3311 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3312 u8 dmactl;
3313
3314 /* load PRD table addr. */
3315 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3316
3317 /* specify data direction, triple-check start bit is clear */
3318 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3319 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3320 if (!rw)
3321 dmactl |= ATA_DMA_WR;
3322 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3323
3324 /* issue r/w command */
3325 ap->ops->exec_command(ap, &qc->tf);
3326 }
3327
3328 /**
3329 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3330 * @qc: Info associated with this ATA transaction.
3331 *
3332 * LOCKING:
3333 * spin_lock_irqsave(host_set lock)
3334 */
3335
3336 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3337 {
3338 struct ata_port *ap = qc->ap;
3339 u8 dmactl;
3340
3341 /* start host DMA transaction */
3342 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3343 outb(dmactl | ATA_DMA_START,
3344 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3345 }
3346
3347
3348 /**
3349 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3350 * @qc: Info associated with this ATA transaction.
3351 *
3352 * Writes the ATA_DMA_START flag to the DMA command register.
3353 *
3354 * May be used as the bmdma_start() entry in ata_port_operations.
3355 *
3356 * LOCKING:
3357 * spin_lock_irqsave(host_set lock)
3358 */
3359 void ata_bmdma_start(struct ata_queued_cmd *qc)
3360 {
3361 if (qc->ap->flags & ATA_FLAG_MMIO)
3362 ata_bmdma_start_mmio(qc);
3363 else
3364 ata_bmdma_start_pio(qc);
3365 }
3366
3367
3368 /**
3369 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3370 * @qc: Info associated with this ATA transaction.
3371 *
3372 * Writes address of PRD table to device's PRD Table Address
3373 * register, sets the DMA control register, and calls
3374 * ops->exec_command() to start the transfer.
3375 *
3376 * May be used as the bmdma_setup() entry in ata_port_operations.
3377 *
3378 * LOCKING:
3379 * spin_lock_irqsave(host_set lock)
3380 */
3381 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3382 {
3383 if (qc->ap->flags & ATA_FLAG_MMIO)
3384 ata_bmdma_setup_mmio(qc);
3385 else
3386 ata_bmdma_setup_pio(qc);
3387 }
3388
3389
3390 /**
3391 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3392 * @ap: Port associated with this ATA transaction.
3393 *
3394 * Clear interrupt and error flags in DMA status register.
3395 *
3396 * May be used as the irq_clear() entry in ata_port_operations.
3397 *
3398 * LOCKING:
3399 * spin_lock_irqsave(host_set lock)
3400 */
3401
3402 void ata_bmdma_irq_clear(struct ata_port *ap)
3403 {
3404 if (ap->flags & ATA_FLAG_MMIO) {
3405 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3406 writeb(readb(mmio), mmio);
3407 } else {
3408 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3409 outb(inb(addr), addr);
3410 }
3411
3412 }
3413
3414
3415 /**
3416 * ata_bmdma_status - Read PCI IDE BMDMA status
3417 * @ap: Port associated with this ATA transaction.
3418 *
3419 * Read and return BMDMA status register.
3420 *
3421 * May be used as the bmdma_status() entry in ata_port_operations.
3422 *
3423 * LOCKING:
3424 * spin_lock_irqsave(host_set lock)
3425 */
3426
3427 u8 ata_bmdma_status(struct ata_port *ap)
3428 {
3429 u8 host_stat;
3430 if (ap->flags & ATA_FLAG_MMIO) {
3431 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3432 host_stat = readb(mmio + ATA_DMA_STATUS);
3433 } else
3434 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3435 return host_stat;
3436 }
3437
3438
3439 /**
3440 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3441 * @ap: Port associated with this ATA transaction.
3442 *
3443 * Clears the ATA_DMA_START flag in the dma control register
3444 *
3445 * May be used as the bmdma_stop() entry in ata_port_operations.
3446 *
3447 * LOCKING:
3448 * spin_lock_irqsave(host_set lock)
3449 */
3450
3451 void ata_bmdma_stop(struct ata_port *ap)
3452 {
3453 if (ap->flags & ATA_FLAG_MMIO) {
3454 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3455
3456 /* clear start/stop bit */
3457 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3458 mmio + ATA_DMA_CMD);
3459 } else {
3460 /* clear start/stop bit */
3461 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3462 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3463 }
3464
3465 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3466 ata_altstatus(ap); /* dummy read */
3467 }
3468
3469 /**
3470 * ata_host_intr - Handle host interrupt for given (port, task)
3471 * @ap: Port on which interrupt arrived (possibly...)
3472 * @qc: Taskfile currently active in engine
3473 *
3474 * Handle host interrupt for given queued command. Currently,
3475 * only DMA interrupts are handled. All other commands are
3476 * handled via polling with interrupts disabled (nIEN bit).
3477 *
3478 * LOCKING:
3479 * spin_lock_irqsave(host_set lock)
3480 *
3481 * RETURNS:
3482 * One if interrupt was handled, zero if not (shared irq).
3483 */
3484
3485 inline unsigned int ata_host_intr (struct ata_port *ap,
3486 struct ata_queued_cmd *qc)
3487 {
3488 u8 status, host_stat;
3489
3490 switch (qc->tf.protocol) {
3491
3492 case ATA_PROT_DMA:
3493 case ATA_PROT_ATAPI_DMA:
3494 case ATA_PROT_ATAPI:
3495 /* check status of DMA engine */
3496 host_stat = ap->ops->bmdma_status(ap);
3497 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3498
3499 /* if it's not our irq... */
3500 if (!(host_stat & ATA_DMA_INTR))
3501 goto idle_irq;
3502
3503 /* before we do anything else, clear DMA-Start bit */
3504 ap->ops->bmdma_stop(ap);
3505
3506 /* fall through */
3507
3508 case ATA_PROT_ATAPI_NODATA:
3509 case ATA_PROT_NODATA:
3510 /* check altstatus */
3511 status = ata_altstatus(ap);
3512 if (status & ATA_BUSY)
3513 goto idle_irq;
3514
3515 /* check main status, clearing INTRQ */
3516 status = ata_chk_status(ap);
3517 if (unlikely(status & ATA_BUSY))
3518 goto idle_irq;
3519 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3520 ap->id, qc->tf.protocol, status);
3521
3522 /* ack bmdma irq events */
3523 ap->ops->irq_clear(ap);
3524
3525 /* complete taskfile transaction */
3526 ata_qc_complete(qc, status);
3527 break;
3528
3529 default:
3530 goto idle_irq;
3531 }
3532
3533 return 1; /* irq handled */
3534
3535 idle_irq:
3536 ap->stats.idle_irq++;
3537
3538 #ifdef ATA_IRQ_TRAP
3539 if ((ap->stats.idle_irq % 1000) == 0) {
3540 handled = 1;
3541 ata_irq_ack(ap, 0); /* debug trap */
3542 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3543 }
3544 #endif
3545 return 0; /* irq not handled */
3546 }
3547
3548 /**
3549 * ata_interrupt - Default ATA host interrupt handler
3550 * @irq: irq line (unused)
3551 * @dev_instance: pointer to our ata_host_set information structure
3552 * @regs: unused
3553 *
3554 * Default interrupt handler for PCI IDE devices. Calls
3555 * ata_host_intr() for each port that is not disabled.
3556 *
3557 * LOCKING:
3558 * Obtains host_set lock during operation.
3559 *
3560 * RETURNS:
3561 * IRQ_NONE or IRQ_HANDLED.
3562 *
3563 */
3564
3565 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3566 {
3567 struct ata_host_set *host_set = dev_instance;
3568 unsigned int i;
3569 unsigned int handled = 0;
3570 unsigned long flags;
3571
3572 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3573 spin_lock_irqsave(&host_set->lock, flags);
3574
3575 for (i = 0; i < host_set->n_ports; i++) {
3576 struct ata_port *ap;
3577
3578 ap = host_set->ports[i];
3579 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) {
3580 struct ata_queued_cmd *qc;
3581
3582 qc = ata_qc_from_tag(ap, ap->active_tag);
3583 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
3584 (qc->flags & ATA_QCFLAG_ACTIVE))
3585 handled |= ata_host_intr(ap, qc);
3586 }
3587 }
3588
3589 spin_unlock_irqrestore(&host_set->lock, flags);
3590
3591 return IRQ_RETVAL(handled);
3592 }
3593
3594 /**
3595 * atapi_packet_task - Write CDB bytes to hardware
3596 * @_data: Port to which ATAPI device is attached.
3597 *
3598 * When device has indicated its readiness to accept
3599 * a CDB, this function is called. Send the CDB.
3600 * If DMA is to be performed, exit immediately.
3601 * Otherwise, we are in polling mode, so poll
3602 * status under operation succeeds or fails.
3603 *
3604 * LOCKING:
3605 * Kernel thread context (may sleep)
3606 */
3607
3608 static void atapi_packet_task(void *_data)
3609 {
3610 struct ata_port *ap = _data;
3611 struct ata_queued_cmd *qc;
3612 u8 status;
3613
3614 qc = ata_qc_from_tag(ap, ap->active_tag);
3615 assert(qc != NULL);
3616 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3617
3618 /* sleep-wait for BSY to clear */
3619 DPRINTK("busy wait\n");
3620 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
3621 goto err_out;
3622
3623 /* make sure DRQ is set */
3624 status = ata_chk_status(ap);
3625 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
3626 goto err_out;
3627
3628 /* send SCSI cdb */
3629 DPRINTK("send cdb\n");
3630 assert(ap->cdb_len >= 12);
3631 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3632
3633 /* if we are DMA'ing, irq handler takes over from here */
3634 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3635 ap->ops->bmdma_start(qc); /* initiate bmdma */
3636
3637 /* non-data commands are also handled via irq */
3638 else if (qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3639 /* do nothing */
3640 }
3641
3642 /* PIO commands are handled by polling */
3643 else {
3644 ap->pio_task_state = PIO_ST;
3645 queue_work(ata_wq, &ap->pio_task);
3646 }
3647
3648 return;
3649
3650 err_out:
3651 ata_qc_complete(qc, ATA_ERR);
3652 }
3653
3654
3655 /**
3656 * ata_port_start - Set port up for dma.
3657 * @ap: Port to initialize
3658 *
3659 * Called just after data structures for each port are
3660 * initialized. Allocates space for PRD table.
3661 *
3662 * May be used as the port_start() entry in ata_port_operations.
3663 *
3664 * LOCKING:
3665 */
3666
3667 int ata_port_start (struct ata_port *ap)
3668 {
3669 struct device *dev = ap->host_set->dev;
3670
3671 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
3672 if (!ap->prd)
3673 return -ENOMEM;
3674
3675 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
3676
3677 return 0;
3678 }
3679
3680
3681 /**
3682 * ata_port_stop - Undo ata_port_start()
3683 * @ap: Port to shut down
3684 *
3685 * Frees the PRD table.
3686 *
3687 * May be used as the port_stop() entry in ata_port_operations.
3688 *
3689 * LOCKING:
3690 */
3691
3692 void ata_port_stop (struct ata_port *ap)
3693 {
3694 struct device *dev = ap->host_set->dev;
3695
3696 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
3697 }
3698
3699 void ata_host_stop (struct ata_host_set *host_set)
3700 {
3701 if (host_set->mmio_base)
3702 iounmap(host_set->mmio_base);
3703 }
3704
3705
3706 /**
3707 * ata_host_remove - Unregister SCSI host structure with upper layers
3708 * @ap: Port to unregister
3709 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
3710 *
3711 * LOCKING:
3712 */
3713
3714 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
3715 {
3716 struct Scsi_Host *sh = ap->host;
3717
3718 DPRINTK("ENTER\n");
3719
3720 if (do_unregister)
3721 scsi_remove_host(sh);
3722
3723 ap->ops->port_stop(ap);
3724 }
3725
3726 /**
3727 * ata_host_init - Initialize an ata_port structure
3728 * @ap: Structure to initialize
3729 * @host: associated SCSI mid-layer structure
3730 * @host_set: Collection of hosts to which @ap belongs
3731 * @ent: Probe information provided by low-level driver
3732 * @port_no: Port number associated with this ata_port
3733 *
3734 * Initialize a new ata_port structure, and its associated
3735 * scsi_host.
3736 *
3737 * LOCKING:
3738 * Inherited from caller.
3739 *
3740 */
3741
3742 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3743 struct ata_host_set *host_set,
3744 struct ata_probe_ent *ent, unsigned int port_no)
3745 {
3746 unsigned int i;
3747
3748 host->max_id = 16;
3749 host->max_lun = 1;
3750 host->max_channel = 1;
3751 host->unique_id = ata_unique_id++;
3752 host->max_cmd_len = 12;
3753 scsi_set_device(host, ent->dev);
3754 scsi_assign_lock(host, &host_set->lock);
3755
3756 ap->flags = ATA_FLAG_PORT_DISABLED;
3757 ap->id = host->unique_id;
3758 ap->host = host;
3759 ap->ctl = ATA_DEVCTL_OBS;
3760 ap->host_set = host_set;
3761 ap->port_no = port_no;
3762 ap->hard_port_no =
3763 ent->legacy_mode ? ent->hard_port_no : port_no;
3764 ap->pio_mask = ent->pio_mask;
3765 ap->mwdma_mask = ent->mwdma_mask;
3766 ap->udma_mask = ent->udma_mask;
3767 ap->flags |= ent->host_flags;
3768 ap->ops = ent->port_ops;
3769 ap->cbl = ATA_CBL_NONE;
3770 ap->active_tag = ATA_TAG_POISON;
3771 ap->last_ctl = 0xFF;
3772
3773 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
3774 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
3775
3776 for (i = 0; i < ATA_MAX_DEVICES; i++)
3777 ap->device[i].devno = i;
3778
3779 #ifdef ATA_IRQ_TRAP
3780 ap->stats.unhandled_irq = 1;
3781 ap->stats.idle_irq = 1;
3782 #endif
3783
3784 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
3785 }
3786
3787 /**
3788 * ata_host_add - Attach low-level ATA driver to system
3789 * @ent: Information provided by low-level driver
3790 * @host_set: Collections of ports to which we add
3791 * @port_no: Port number associated with this host
3792 *
3793 * Attach low-level ATA driver to system.
3794 *
3795 * LOCKING:
3796 * PCI/etc. bus probe sem.
3797 *
3798 * RETURNS:
3799 * New ata_port on success, for NULL on error.
3800 *
3801 */
3802
3803 static struct ata_port * ata_host_add(struct ata_probe_ent *ent,
3804 struct ata_host_set *host_set,
3805 unsigned int port_no)
3806 {
3807 struct Scsi_Host *host;
3808 struct ata_port *ap;
3809 int rc;
3810
3811 DPRINTK("ENTER\n");
3812 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
3813 if (!host)
3814 return NULL;
3815
3816 ap = (struct ata_port *) &host->hostdata[0];
3817
3818 ata_host_init(ap, host, host_set, ent, port_no);
3819
3820 rc = ap->ops->port_start(ap);
3821 if (rc)
3822 goto err_out;
3823
3824 return ap;
3825
3826 err_out:
3827 scsi_host_put(host);
3828 return NULL;
3829 }
3830
3831 /**
3832 * ata_device_add - Register hardware device with ATA and SCSI layers
3833 * @ent: Probe information describing hardware device to be registered
3834 *
3835 * This function processes the information provided in the probe
3836 * information struct @ent, allocates the necessary ATA and SCSI
3837 * host information structures, initializes them, and registers
3838 * everything with requisite kernel subsystems.
3839 *
3840 * This function requests irqs, probes the ATA bus, and probes
3841 * the SCSI bus.
3842 *
3843 * LOCKING:
3844 * PCI/etc. bus probe sem.
3845 *
3846 * RETURNS:
3847 * Number of ports registered. Zero on error (no ports registered).
3848 *
3849 */
3850
3851 int ata_device_add(struct ata_probe_ent *ent)
3852 {
3853 unsigned int count = 0, i;
3854 struct device *dev = ent->dev;
3855 struct ata_host_set *host_set;
3856
3857 DPRINTK("ENTER\n");
3858 /* alloc a container for our list of ATA ports (buses) */
3859 host_set = kmalloc(sizeof(struct ata_host_set) +
3860 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
3861 if (!host_set)
3862 return 0;
3863 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
3864 spin_lock_init(&host_set->lock);
3865
3866 host_set->dev = dev;
3867 host_set->n_ports = ent->n_ports;
3868 host_set->irq = ent->irq;
3869 host_set->mmio_base = ent->mmio_base;
3870 host_set->private_data = ent->private_data;
3871 host_set->ops = ent->port_ops;
3872
3873 /* register each port bound to this device */
3874 for (i = 0; i < ent->n_ports; i++) {
3875 struct ata_port *ap;
3876 unsigned long xfer_mode_mask;
3877
3878 ap = ata_host_add(ent, host_set, i);
3879 if (!ap)
3880 goto err_out;
3881
3882 host_set->ports[i] = ap;
3883 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
3884 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
3885 (ap->pio_mask << ATA_SHIFT_PIO);
3886
3887 /* print per-port info to dmesg */
3888 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
3889 "bmdma 0x%lX irq %lu\n",
3890 ap->id,
3891 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
3892 ata_mode_string(xfer_mode_mask),
3893 ap->ioaddr.cmd_addr,
3894 ap->ioaddr.ctl_addr,
3895 ap->ioaddr.bmdma_addr,
3896 ent->irq);
3897
3898 ata_chk_status(ap);
3899 host_set->ops->irq_clear(ap);
3900 count++;
3901 }
3902
3903 if (!count) {
3904 kfree(host_set);
3905 return 0;
3906 }
3907
3908 /* obtain irq, that is shared between channels */
3909 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
3910 DRV_NAME, host_set))
3911 goto err_out;
3912
3913 /* perform each probe synchronously */
3914 DPRINTK("probe begin\n");
3915 for (i = 0; i < count; i++) {
3916 struct ata_port *ap;
3917 int rc;
3918
3919 ap = host_set->ports[i];
3920
3921 DPRINTK("ata%u: probe begin\n", ap->id);
3922 rc = ata_bus_probe(ap);
3923 DPRINTK("ata%u: probe end\n", ap->id);
3924
3925 if (rc) {
3926 /* FIXME: do something useful here?
3927 * Current libata behavior will
3928 * tear down everything when
3929 * the module is removed
3930 * or the h/w is unplugged.
3931 */
3932 }
3933
3934 rc = scsi_add_host(ap->host, dev);
3935 if (rc) {
3936 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
3937 ap->id);
3938 /* FIXME: do something useful here */
3939 /* FIXME: handle unconditional calls to
3940 * scsi_scan_host and ata_host_remove, below,
3941 * at the very least
3942 */
3943 }
3944 }
3945
3946 /* probes are done, now scan each port's disk(s) */
3947 DPRINTK("probe begin\n");
3948 for (i = 0; i < count; i++) {
3949 struct ata_port *ap = host_set->ports[i];
3950
3951 scsi_scan_host(ap->host);
3952 }
3953
3954 dev_set_drvdata(dev, host_set);
3955
3956 VPRINTK("EXIT, returning %u\n", ent->n_ports);
3957 return ent->n_ports; /* success */
3958
3959 err_out:
3960 for (i = 0; i < count; i++) {
3961 ata_host_remove(host_set->ports[i], 1);
3962 scsi_host_put(host_set->ports[i]->host);
3963 }
3964 kfree(host_set);
3965 VPRINTK("EXIT, returning 0\n");
3966 return 0;
3967 }
3968
3969 /**
3970 * ata_scsi_release - SCSI layer callback hook for host unload
3971 * @host: libata host to be unloaded
3972 *
3973 * Performs all duties necessary to shut down a libata port...
3974 * Kill port kthread, disable port, and release resources.
3975 *
3976 * LOCKING:
3977 * Inherited from SCSI layer.
3978 *
3979 * RETURNS:
3980 * One.
3981 */
3982
3983 int ata_scsi_release(struct Scsi_Host *host)
3984 {
3985 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
3986
3987 DPRINTK("ENTER\n");
3988
3989 ap->ops->port_disable(ap);
3990 ata_host_remove(ap, 0);
3991
3992 DPRINTK("EXIT\n");
3993 return 1;
3994 }
3995
3996 /**
3997 * ata_std_ports - initialize ioaddr with standard port offsets.
3998 * @ioaddr: IO address structure to be initialized
3999 *
4000 * Utility function which initializes data_addr, error_addr,
4001 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4002 * device_addr, status_addr, and command_addr to standard offsets
4003 * relative to cmd_addr.
4004 *
4005 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4006 */
4007
4008 void ata_std_ports(struct ata_ioports *ioaddr)
4009 {
4010 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4011 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4012 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4013 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4014 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4015 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4016 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4017 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4018 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4019 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4020 }
4021
4022 static struct ata_probe_ent *
4023 ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
4024 {
4025 struct ata_probe_ent *probe_ent;
4026
4027 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
4028 if (!probe_ent) {
4029 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4030 kobject_name(&(dev->kobj)));
4031 return NULL;
4032 }
4033
4034 memset(probe_ent, 0, sizeof(*probe_ent));
4035
4036 INIT_LIST_HEAD(&probe_ent->node);
4037 probe_ent->dev = dev;
4038
4039 probe_ent->sht = port->sht;
4040 probe_ent->host_flags = port->host_flags;
4041 probe_ent->pio_mask = port->pio_mask;
4042 probe_ent->mwdma_mask = port->mwdma_mask;
4043 probe_ent->udma_mask = port->udma_mask;
4044 probe_ent->port_ops = port->port_ops;
4045
4046 return probe_ent;
4047 }
4048
4049
4050
4051 /**
4052 * ata_pci_init_native_mode - Initialize native-mode driver
4053 * @pdev: pci device to be initialized
4054 * @port: array[2] of pointers to port info structures.
4055 *
4056 * Utility function which allocates and initializes an
4057 * ata_probe_ent structure for a standard dual-port
4058 * PIO-based IDE controller. The returned ata_probe_ent
4059 * structure can be passed to ata_device_add(). The returned
4060 * ata_probe_ent structure should then be freed with kfree().
4061 */
4062
4063 #ifdef CONFIG_PCI
4064 struct ata_probe_ent *
4065 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
4066 {
4067 struct ata_probe_ent *probe_ent =
4068 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4069 if (!probe_ent)
4070 return NULL;
4071
4072 probe_ent->n_ports = 2;
4073 probe_ent->irq = pdev->irq;
4074 probe_ent->irq_flags = SA_SHIRQ;
4075
4076 probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
4077 probe_ent->port[0].altstatus_addr =
4078 probe_ent->port[0].ctl_addr =
4079 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4080 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4081
4082 probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
4083 probe_ent->port[1].altstatus_addr =
4084 probe_ent->port[1].ctl_addr =
4085 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4086 probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4087
4088 ata_std_ports(&probe_ent->port[0]);
4089 ata_std_ports(&probe_ent->port[1]);
4090
4091 return probe_ent;
4092 }
4093
4094 static struct ata_probe_ent *
4095 ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
4096 struct ata_probe_ent **ppe2)
4097 {
4098 struct ata_probe_ent *probe_ent, *probe_ent2;
4099
4100 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4101 if (!probe_ent)
4102 return NULL;
4103 probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
4104 if (!probe_ent2) {
4105 kfree(probe_ent);
4106 return NULL;
4107 }
4108
4109 probe_ent->n_ports = 1;
4110 probe_ent->irq = 14;
4111
4112 probe_ent->hard_port_no = 0;
4113 probe_ent->legacy_mode = 1;
4114
4115 probe_ent2->n_ports = 1;
4116 probe_ent2->irq = 15;
4117
4118 probe_ent2->hard_port_no = 1;
4119 probe_ent2->legacy_mode = 1;
4120
4121 probe_ent->port[0].cmd_addr = 0x1f0;
4122 probe_ent->port[0].altstatus_addr =
4123 probe_ent->port[0].ctl_addr = 0x3f6;
4124 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4125
4126 probe_ent2->port[0].cmd_addr = 0x170;
4127 probe_ent2->port[0].altstatus_addr =
4128 probe_ent2->port[0].ctl_addr = 0x376;
4129 probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
4130
4131 ata_std_ports(&probe_ent->port[0]);
4132 ata_std_ports(&probe_ent2->port[0]);
4133
4134 *ppe2 = probe_ent2;
4135 return probe_ent;
4136 }
4137
4138 /**
4139 * ata_pci_init_one - Initialize/register PCI IDE host controller
4140 * @pdev: Controller to be initialized
4141 * @port_info: Information from low-level host driver
4142 * @n_ports: Number of ports attached to host controller
4143 *
4144 * This is a helper function which can be called from a driver's
4145 * xxx_init_one() probe function if the hardware uses traditional
4146 * IDE taskfile registers.
4147 *
4148 * This function calls pci_enable_device(), reserves its register
4149 * regions, sets the dma mask, enables bus master mode, and calls
4150 * ata_device_add()
4151 *
4152 * LOCKING:
4153 * Inherited from PCI layer (may sleep).
4154 *
4155 * RETURNS:
4156 * Zero on success, negative on errno-based value on error.
4157 *
4158 */
4159
4160 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4161 unsigned int n_ports)
4162 {
4163 struct ata_probe_ent *probe_ent, *probe_ent2 = NULL;
4164 struct ata_port_info *port[2];
4165 u8 tmp8, mask;
4166 unsigned int legacy_mode = 0;
4167 int disable_dev_on_err = 1;
4168 int rc;
4169
4170 DPRINTK("ENTER\n");
4171
4172 port[0] = port_info[0];
4173 if (n_ports > 1)
4174 port[1] = port_info[1];
4175 else
4176 port[1] = port[0];
4177
4178 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4179 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4180 /* TODO: support transitioning to native mode? */
4181 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4182 mask = (1 << 2) | (1 << 0);
4183 if ((tmp8 & mask) != mask)
4184 legacy_mode = (1 << 3);
4185 }
4186
4187 /* FIXME... */
4188 if ((!legacy_mode) && (n_ports > 1)) {
4189 printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n");
4190 return -EINVAL;
4191 }
4192
4193 rc = pci_enable_device(pdev);
4194 if (rc)
4195 return rc;
4196
4197 rc = pci_request_regions(pdev, DRV_NAME);
4198 if (rc) {
4199 disable_dev_on_err = 0;
4200 goto err_out;
4201 }
4202
4203 if (legacy_mode) {
4204 if (!request_region(0x1f0, 8, "libata")) {
4205 struct resource *conflict, res;
4206 res.start = 0x1f0;
4207 res.end = 0x1f0 + 8 - 1;
4208 conflict = ____request_resource(&ioport_resource, &res);
4209 if (!strcmp(conflict->name, "libata"))
4210 legacy_mode |= (1 << 0);
4211 else {
4212 disable_dev_on_err = 0;
4213 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4214 }
4215 } else
4216 legacy_mode |= (1 << 0);
4217
4218 if (!request_region(0x170, 8, "libata")) {
4219 struct resource *conflict, res;
4220 res.start = 0x170;
4221 res.end = 0x170 + 8 - 1;
4222 conflict = ____request_resource(&ioport_resource, &res);
4223 if (!strcmp(conflict->name, "libata"))
4224 legacy_mode |= (1 << 1);
4225 else {
4226 disable_dev_on_err = 0;
4227 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4228 }
4229 } else
4230 legacy_mode |= (1 << 1);
4231 }
4232
4233 /* we have legacy mode, but all ports are unavailable */
4234 if (legacy_mode == (1 << 3)) {
4235 rc = -EBUSY;
4236 goto err_out_regions;
4237 }
4238
4239 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4240 if (rc)
4241 goto err_out_regions;
4242 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4243 if (rc)
4244 goto err_out_regions;
4245
4246 if (legacy_mode) {
4247 probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2);
4248 } else
4249 probe_ent = ata_pci_init_native_mode(pdev, port);
4250 if (!probe_ent) {
4251 rc = -ENOMEM;
4252 goto err_out_regions;
4253 }
4254
4255 pci_set_master(pdev);
4256
4257 /* FIXME: check ata_device_add return */
4258 if (legacy_mode) {
4259 if (legacy_mode & (1 << 0))
4260 ata_device_add(probe_ent);
4261 if (legacy_mode & (1 << 1))
4262 ata_device_add(probe_ent2);
4263 } else
4264 ata_device_add(probe_ent);
4265
4266 kfree(probe_ent);
4267 kfree(probe_ent2);
4268
4269 return 0;
4270
4271 err_out_regions:
4272 if (legacy_mode & (1 << 0))
4273 release_region(0x1f0, 8);
4274 if (legacy_mode & (1 << 1))
4275 release_region(0x170, 8);
4276 pci_release_regions(pdev);
4277 err_out:
4278 if (disable_dev_on_err)
4279 pci_disable_device(pdev);
4280 return rc;
4281 }
4282
4283 /**
4284 * ata_pci_remove_one - PCI layer callback for device removal
4285 * @pdev: PCI device that was removed
4286 *
4287 * PCI layer indicates to libata via this hook that
4288 * hot-unplug or module unload event has occured.
4289 * Handle this by unregistering all objects associated
4290 * with this PCI device. Free those objects. Then finally
4291 * release PCI resources and disable device.
4292 *
4293 * LOCKING:
4294 * Inherited from PCI layer (may sleep).
4295 */
4296
4297 void ata_pci_remove_one (struct pci_dev *pdev)
4298 {
4299 struct device *dev = pci_dev_to_dev(pdev);
4300 struct ata_host_set *host_set = dev_get_drvdata(dev);
4301 struct ata_port *ap;
4302 unsigned int i;
4303
4304 for (i = 0; i < host_set->n_ports; i++) {
4305 ap = host_set->ports[i];
4306
4307 scsi_remove_host(ap->host);
4308 }
4309
4310 free_irq(host_set->irq, host_set);
4311
4312 for (i = 0; i < host_set->n_ports; i++) {
4313 ap = host_set->ports[i];
4314
4315 ata_scsi_release(ap->host);
4316
4317 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4318 struct ata_ioports *ioaddr = &ap->ioaddr;
4319
4320 if (ioaddr->cmd_addr == 0x1f0)
4321 release_region(0x1f0, 8);
4322 else if (ioaddr->cmd_addr == 0x170)
4323 release_region(0x170, 8);
4324 }
4325
4326 scsi_host_put(ap->host);
4327 }
4328
4329 if (host_set->ops->host_stop)
4330 host_set->ops->host_stop(host_set);
4331
4332 kfree(host_set);
4333
4334 pci_release_regions(pdev);
4335 pci_disable_device(pdev);
4336 dev_set_drvdata(dev, NULL);
4337 }
4338
4339 /* move to PCI subsystem */
4340 int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits)
4341 {
4342 unsigned long tmp = 0;
4343
4344 switch (bits->width) {
4345 case 1: {
4346 u8 tmp8 = 0;
4347 pci_read_config_byte(pdev, bits->reg, &tmp8);
4348 tmp = tmp8;
4349 break;
4350 }
4351 case 2: {
4352 u16 tmp16 = 0;
4353 pci_read_config_word(pdev, bits->reg, &tmp16);
4354 tmp = tmp16;
4355 break;
4356 }
4357 case 4: {
4358 u32 tmp32 = 0;
4359 pci_read_config_dword(pdev, bits->reg, &tmp32);
4360 tmp = tmp32;
4361 break;
4362 }
4363
4364 default:
4365 return -EINVAL;
4366 }
4367
4368 tmp &= bits->mask;
4369
4370 return (tmp == bits->val) ? 1 : 0;
4371 }
4372 #endif /* CONFIG_PCI */
4373
4374
4375 static int __init ata_init(void)
4376 {
4377 ata_wq = create_workqueue("ata");
4378 if (!ata_wq)
4379 return -ENOMEM;
4380
4381 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4382 return 0;
4383 }
4384
4385 static void __exit ata_exit(void)
4386 {
4387 destroy_workqueue(ata_wq);
4388 }
4389
4390 module_init(ata_init);
4391 module_exit(ata_exit);
4392
4393 /*
4394 * libata is essentially a library of internal helper functions for
4395 * low-level ATA host controller drivers. As such, the API/ABI is
4396 * likely to change as new drivers are added and updated.
4397 * Do not depend on ABI/API stability.
4398 */
4399
4400 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4401 EXPORT_SYMBOL_GPL(ata_std_ports);
4402 EXPORT_SYMBOL_GPL(ata_device_add);
4403 EXPORT_SYMBOL_GPL(ata_sg_init);
4404 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4405 EXPORT_SYMBOL_GPL(ata_qc_complete);
4406 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4407 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4408 EXPORT_SYMBOL_GPL(ata_tf_load);
4409 EXPORT_SYMBOL_GPL(ata_tf_read);
4410 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4411 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4412 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4413 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4414 EXPORT_SYMBOL_GPL(ata_check_status);
4415 EXPORT_SYMBOL_GPL(ata_altstatus);
4416 EXPORT_SYMBOL_GPL(ata_chk_err);
4417 EXPORT_SYMBOL_GPL(ata_exec_command);
4418 EXPORT_SYMBOL_GPL(ata_port_start);
4419 EXPORT_SYMBOL_GPL(ata_port_stop);
4420 EXPORT_SYMBOL_GPL(ata_host_stop);
4421 EXPORT_SYMBOL_GPL(ata_interrupt);
4422 EXPORT_SYMBOL_GPL(ata_qc_prep);
4423 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4424 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4425 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4426 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4427 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4428 EXPORT_SYMBOL_GPL(ata_port_probe);
4429 EXPORT_SYMBOL_GPL(sata_phy_reset);
4430 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4431 EXPORT_SYMBOL_GPL(ata_bus_reset);
4432 EXPORT_SYMBOL_GPL(ata_port_disable);
4433 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4434 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4435 EXPORT_SYMBOL_GPL(ata_scsi_error);
4436 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4437 EXPORT_SYMBOL_GPL(ata_scsi_release);
4438 EXPORT_SYMBOL_GPL(ata_host_intr);
4439 EXPORT_SYMBOL_GPL(ata_dev_classify);
4440 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4441 EXPORT_SYMBOL_GPL(ata_dev_config);
4442 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4443
4444 #ifdef CONFIG_PCI
4445 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4446 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4447 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4448 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4449 #endif /* CONFIG_PCI */