1 /*****************************************************************************/
2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller */
4 /* Written By: Keith Mitchell, IBM Corporation */
5 /* Jack Hammer, Adaptec, Inc. */
6 /* David Jeffery, Adaptec, Inc. */
8 /* Copyright (C) 2000 IBM Corporation */
9 /* Copyright (C) 2002,2003 Adaptec, Inc. */
11 /* This program is free software; you can redistribute it and/or modify */
12 /* it under the terms of the GNU General Public License as published by */
13 /* the Free Software Foundation; either version 2 of the License, or */
14 /* (at your option) any later version. */
16 /* This program is distributed in the hope that it will be useful, */
17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
19 /* GNU General Public License for more details. */
22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
26 /* solely responsible for determining the appropriateness of using and */
27 /* distributing the Program and assumes all risks associated with its */
28 /* exercise of rights under this Agreement, including but not limited to */
29 /* the risks and costs of program errors, damage to or loss of data, */
30 /* programs or equipment, and unavailability or interruption of operations. */
32 /* DISCLAIMER OF LIABILITY */
33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
41 /* You should have received a copy of the GNU General Public License */
42 /* along with this program; if not, write to the Free Software */
43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
45 /* Bugs/Comments/Suggestions about this driver should be mailed to: */
46 /* ipslinux@adaptec.com */
48 /* For system support issues, contact your local IBM Customer support. */
49 /* Directions to find IBM Customer Support for each country can be found at: */
50 /* http://www.ibm.com/planetwide/ */
52 /*****************************************************************************/
54 /*****************************************************************************/
57 /* 0.99.02 - Breakup commands that are bigger than 8 * the stripe size */
58 /* 0.99.03 - Make interrupt routine handle all completed request on the */
59 /* adapter not just the first one */
60 /* - Make sure passthru commands get woken up if we run out of */
62 /* - Send all of the commands on the queue at once rather than */
63 /* one at a time since the card will support it. */
64 /* 0.99.04 - Fix race condition in the passthru mechanism -- this required */
65 /* the interface to the utilities to change */
66 /* - Fix error recovery code */
67 /* 0.99.05 - Fix an oops when we get certain passthru commands */
68 /* 1.00.00 - Initial Public Release */
69 /* Functionally equivalent to 0.99.05 */
70 /* 3.60.00 - Bump max commands to 128 for use with firmware 3.60 */
71 /* - Change version to 3.60 to coincide with release numbering. */
72 /* 3.60.01 - Remove bogus error check in passthru routine */
73 /* 3.60.02 - Make DCDB direction based on lookup table */
74 /* - Only allow one DCDB command to a SCSI ID at a time */
75 /* 4.00.00 - Add support for ServeRAID 4 */
76 /* 4.00.01 - Add support for First Failure Data Capture */
77 /* 4.00.02 - Fix problem with PT DCDB with no buffer */
78 /* 4.00.03 - Add alternative passthru interface */
79 /* - Add ability to flash BIOS */
80 /* 4.00.04 - Rename structures/constants to be prefixed with IPS_ */
81 /* 4.00.05 - Remove wish_block from init routine */
82 /* - Use linux/spinlock.h instead of asm/spinlock.h for kernels */
83 /* 2.3.18 and later */
84 /* - Sync with other changes from the 2.3 kernels */
85 /* 4.00.06 - Fix timeout with initial FFDC command */
86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
87 /* 4.10.00 - Add support for ServeRAID 4M/4L */
88 /* 4.10.13 - Fix for dynamic unload and proc file system */
89 /* 4.20.03 - Rename version to coincide with new release schedules */
90 /* Performance fixes */
91 /* Fix truncation of /proc files with cat */
92 /* Merge in changes through kernel 2.4.0test1ac21 */
93 /* 4.20.13 - Fix some failure cases / reset code */
94 /* - Hook into the reboot_notifier to flush the controller cache */
95 /* 4.50.01 - Fix problem when there is a hole in logical drive numbering */
96 /* 4.70.09 - Use a Common ( Large Buffer ) for Flashing from the JCRM CD */
97 /* - Add IPSSEND Flash Support */
98 /* - Set Sense Data for Unknown SCSI Command */
99 /* - Use Slot Number from NVRAM Page 5 */
100 /* - Restore caller's DCDB Structure */
101 /* 4.70.12 - Corrective actions for bad controller ( during initialization )*/
102 /* 4.70.13 - Don't Send CDB's if we already know the device is not present */
103 /* - Don't release HA Lock in ips_next() until SC taken off queue */
104 /* - Unregister SCSI device in ips_release() */
105 /* 4.70.15 - Fix Breakup for very large ( non-SG ) requests in ips_done() */
106 /* 4.71.00 - Change all memory allocations to not use GFP_DMA flag */
107 /* Code Clean-Up for 2.4.x kernel */
108 /* 4.72.00 - Allow for a Scatter-Gather Element to exceed MAX_XFER Size */
109 /* 4.72.01 - I/O Mapped Memory release ( so "insmod ips" does not Fail ) */
110 /* - Don't Issue Internal FFDC Command if there are Active Commands */
111 /* - Close Window for getting too many IOCTL's active */
112 /* 4.80.00 - Make ia64 Safe */
113 /* 4.80.04 - Eliminate calls to strtok() if 2.4.x or greater */
114 /* - Adjustments to Device Queue Depth */
115 /* 4.80.14 - Take all semaphores off stack */
116 /* - Clean Up New_IOCTL path */
117 /* 4.80.20 - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel ) */
118 /* - 5 second delay needed after resetting an i960 adapter */
119 /* 4.80.26 - Clean up potential code problems ( Arjan's recommendations ) */
120 /* 4.90.01 - Version Matching for FirmWare, BIOS, and Driver */
121 /* 4.90.05 - Use New PCI Architecture to facilitate Hot Plug Development */
122 /* 4.90.08 - Increase Delays in Flashing ( Trombone Only - 4H ) */
123 /* 4.90.08 - Data Corruption if First Scatter Gather Element is > 64K */
124 /* 4.90.11 - Don't actually RESET unless it's physically required */
125 /* - Remove unused compile options */
126 /* 5.00.01 - Sarasota ( 5i ) adapters must always be scanned first */
127 /* - Get rid on IOCTL_NEW_COMMAND code */
128 /* - Add Extended DCDB Commands for Tape Support in 5I */
129 /* 5.10.12 - use pci_dma interfaces, update for 2.5 kernel changes */
130 /* 5.10.15 - remove unused code (sem, macros, etc.) */
131 /* 5.30.00 - use __devexit_p() */
132 /* 6.00.00 - Add 6x Adapters and Battery Flash */
133 /* 6.10.00 - Remove 1G Addressing Limitations */
134 /* 6.11.xx - Get VersionInfo buffer off the stack ! DDTS 60401 */
135 /* 6.11.xx - Make Logical Drive Info structure safe for DMA DDTS 60639 */
136 /* 7.10.18 - Add highmem_io flag in SCSI Templete for 2.4 kernels */
137 /* - Fix path/name for scsi_hosts.h include for 2.6 kernels */
138 /* - Fix sort order of 7k */
139 /* - Remove 3 unused "inline" functions */
140 /* 7.12.xx - Use STATIC functions whereever possible */
141 /* - Clean up deprecated MODULE_PARM calls */
142 /* 7.12.05 - Remove Version Matching per IBM request */
143 /*****************************************************************************/
146 * Conditional Compilation directives for this driver:
148 * IPS_DEBUG - Turn on debugging info
152 * debug:<number> - Set debug level to <number>
153 * NOTE: only works when IPS_DEBUG compile directive is used.
154 * 1 - Normal debug messages
155 * 2 - Verbose debug messages
156 * 11 - Method trace (non interrupt)
157 * 12 - Method trace (includes interrupt)
159 * noi2o - Don't use I2O Queues (ServeRAID 4 only)
160 * nommap - Don't use memory mapped I/O
161 * ioctlsize - Initial size of the IOCTL buffer
165 #include <asm/byteorder.h>
166 #include <asm/page.h>
167 #include <linux/stddef.h>
168 #include <linux/version.h>
169 #include <linux/string.h>
170 #include <linux/errno.h>
171 #include <linux/kernel.h>
172 #include <linux/ioport.h>
173 #include <linux/slab.h>
174 #include <linux/delay.h>
175 #include <linux/pci.h>
176 #include <linux/proc_fs.h>
177 #include <linux/reboot.h>
178 #include <linux/interrupt.h>
180 #include <linux/blkdev.h>
181 #include <linux/types.h>
182 #include <linux/dma-mapping.h>
186 #include <scsi/scsi_host.h>
190 #include <linux/module.h>
192 #include <linux/stat.h>
194 #include <linux/spinlock.h>
195 #include <linux/init.h>
197 #include <linux/smp.h>
200 static char *ips
= NULL
;
201 module_param(ips
, charp
, 0);
207 #define IPS_VERSION_HIGH IPS_VER_MAJOR_STRING "." IPS_VER_MINOR_STRING
208 #define IPS_VERSION_LOW "." IPS_VER_BUILD_STRING " "
210 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
211 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
214 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
215 DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
216 PCI_DMA_BIDIRECTIONAL : \
217 scb->scsi_cmd->sc_data_direction)
220 #define METHOD_TRACE(s, i) if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
221 #define DEBUG(i, s) if (ips_debug >= i) printk(KERN_NOTICE s "\n");
222 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
224 #define METHOD_TRACE(s, i)
226 #define DEBUG_VAR(i, s, v...)
230 * Function prototypes
232 static int ips_detect(struct scsi_host_template
*);
233 static int ips_release(struct Scsi_Host
*);
234 static int ips_eh_abort(struct scsi_cmnd
*);
235 static int ips_eh_reset(struct scsi_cmnd
*);
236 static int ips_queue(struct scsi_cmnd
*, void (*)(struct scsi_cmnd
*));
237 static const char *ips_info(struct Scsi_Host
*);
238 static irqreturn_t
do_ipsintr(int, void *);
239 static int ips_hainit(ips_ha_t
*);
240 static int ips_map_status(ips_ha_t
*, ips_scb_t
*, ips_stat_t
*);
241 static int ips_send_wait(ips_ha_t
*, ips_scb_t
*, int, int);
242 static int ips_send_cmd(ips_ha_t
*, ips_scb_t
*);
243 static int ips_online(ips_ha_t
*, ips_scb_t
*);
244 static int ips_inquiry(ips_ha_t
*, ips_scb_t
*);
245 static int ips_rdcap(ips_ha_t
*, ips_scb_t
*);
246 static int ips_msense(ips_ha_t
*, ips_scb_t
*);
247 static int ips_reqsen(ips_ha_t
*, ips_scb_t
*);
248 static int ips_deallocatescbs(ips_ha_t
*, int);
249 static int ips_allocatescbs(ips_ha_t
*);
250 static int ips_reset_copperhead(ips_ha_t
*);
251 static int ips_reset_copperhead_memio(ips_ha_t
*);
252 static int ips_reset_morpheus(ips_ha_t
*);
253 static int ips_issue_copperhead(ips_ha_t
*, ips_scb_t
*);
254 static int ips_issue_copperhead_memio(ips_ha_t
*, ips_scb_t
*);
255 static int ips_issue_i2o(ips_ha_t
*, ips_scb_t
*);
256 static int ips_issue_i2o_memio(ips_ha_t
*, ips_scb_t
*);
257 static int ips_isintr_copperhead(ips_ha_t
*);
258 static int ips_isintr_copperhead_memio(ips_ha_t
*);
259 static int ips_isintr_morpheus(ips_ha_t
*);
260 static int ips_wait(ips_ha_t
*, int, int);
261 static int ips_write_driver_status(ips_ha_t
*, int);
262 static int ips_read_adapter_status(ips_ha_t
*, int);
263 static int ips_read_subsystem_parameters(ips_ha_t
*, int);
264 static int ips_read_config(ips_ha_t
*, int);
265 static int ips_clear_adapter(ips_ha_t
*, int);
266 static int ips_readwrite_page5(ips_ha_t
*, int, int);
267 static int ips_init_copperhead(ips_ha_t
*);
268 static int ips_init_copperhead_memio(ips_ha_t
*);
269 static int ips_init_morpheus(ips_ha_t
*);
270 static int ips_isinit_copperhead(ips_ha_t
*);
271 static int ips_isinit_copperhead_memio(ips_ha_t
*);
272 static int ips_isinit_morpheus(ips_ha_t
*);
273 static int ips_erase_bios(ips_ha_t
*);
274 static int ips_program_bios(ips_ha_t
*, char *, uint32_t, uint32_t);
275 static int ips_verify_bios(ips_ha_t
*, char *, uint32_t, uint32_t);
276 static int ips_erase_bios_memio(ips_ha_t
*);
277 static int ips_program_bios_memio(ips_ha_t
*, char *, uint32_t, uint32_t);
278 static int ips_verify_bios_memio(ips_ha_t
*, char *, uint32_t, uint32_t);
279 static int ips_flash_copperhead(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
280 static int ips_flash_bios(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
281 static int ips_flash_firmware(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
282 static void ips_free_flash_copperhead(ips_ha_t
* ha
);
283 static void ips_get_bios_version(ips_ha_t
*, int);
284 static void ips_identify_controller(ips_ha_t
*);
285 static void ips_chkstatus(ips_ha_t
*, IPS_STATUS
*);
286 static void ips_enable_int_copperhead(ips_ha_t
*);
287 static void ips_enable_int_copperhead_memio(ips_ha_t
*);
288 static void ips_enable_int_morpheus(ips_ha_t
*);
289 static int ips_intr_copperhead(ips_ha_t
*);
290 static int ips_intr_morpheus(ips_ha_t
*);
291 static void ips_next(ips_ha_t
*, int);
292 static void ipsintr_blocking(ips_ha_t
*, struct ips_scb
*);
293 static void ipsintr_done(ips_ha_t
*, struct ips_scb
*);
294 static void ips_done(ips_ha_t
*, ips_scb_t
*);
295 static void ips_free(ips_ha_t
*);
296 static void ips_init_scb(ips_ha_t
*, ips_scb_t
*);
297 static void ips_freescb(ips_ha_t
*, ips_scb_t
*);
298 static void ips_setup_funclist(ips_ha_t
*);
299 static void ips_statinit(ips_ha_t
*);
300 static void ips_statinit_memio(ips_ha_t
*);
301 static void ips_fix_ffdc_time(ips_ha_t
*, ips_scb_t
*, time_t);
302 static void ips_ffdc_reset(ips_ha_t
*, int);
303 static void ips_ffdc_time(ips_ha_t
*);
304 static uint32_t ips_statupd_copperhead(ips_ha_t
*);
305 static uint32_t ips_statupd_copperhead_memio(ips_ha_t
*);
306 static uint32_t ips_statupd_morpheus(ips_ha_t
*);
307 static ips_scb_t
*ips_getscb(ips_ha_t
*);
308 static void ips_putq_scb_head(ips_scb_queue_t
*, ips_scb_t
*);
309 static void ips_putq_wait_tail(ips_wait_queue_t
*, struct scsi_cmnd
*);
310 static void ips_putq_copp_tail(ips_copp_queue_t
*,
311 ips_copp_wait_item_t
*);
312 static ips_scb_t
*ips_removeq_scb_head(ips_scb_queue_t
*);
313 static ips_scb_t
*ips_removeq_scb(ips_scb_queue_t
*, ips_scb_t
*);
314 static struct scsi_cmnd
*ips_removeq_wait_head(ips_wait_queue_t
*);
315 static struct scsi_cmnd
*ips_removeq_wait(ips_wait_queue_t
*,
317 static ips_copp_wait_item_t
*ips_removeq_copp(ips_copp_queue_t
*,
318 ips_copp_wait_item_t
*);
319 static ips_copp_wait_item_t
*ips_removeq_copp_head(ips_copp_queue_t
*);
321 static int ips_is_passthru(struct scsi_cmnd
*);
322 static int ips_make_passthru(ips_ha_t
*, struct scsi_cmnd
*, ips_scb_t
*, int);
323 static int ips_usrcmd(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
324 static void ips_cleanup_passthru(ips_ha_t
*, ips_scb_t
*);
325 static void ips_scmd_buf_write(struct scsi_cmnd
* scmd
, void *data
,
327 static void ips_scmd_buf_read(struct scsi_cmnd
* scmd
, void *data
,
330 static int ips_proc_info(struct Scsi_Host
*, char *, char **, off_t
, int, int);
331 static int ips_host_info(ips_ha_t
*, char *, off_t
, int);
332 static void copy_mem_info(IPS_INFOSTR
*, char *, int);
333 static int copy_info(IPS_INFOSTR
*, char *, ...);
334 static int ips_abort_init(ips_ha_t
* ha
, int index
);
335 static int ips_init_phase2(int index
);
337 static int ips_init_phase1(struct pci_dev
*pci_dev
, int *indexPtr
);
338 static int ips_register_scsi(int index
);
340 static int ips_poll_for_flush_complete(ips_ha_t
* ha
);
341 static void ips_flush_and_reset(ips_ha_t
*ha
);
346 static const char ips_name
[] = "ips";
347 static struct Scsi_Host
*ips_sh
[IPS_MAX_ADAPTERS
]; /* Array of host controller structures */
348 static ips_ha_t
*ips_ha
[IPS_MAX_ADAPTERS
]; /* Array of HA structures */
349 static unsigned int ips_next_controller
;
350 static unsigned int ips_num_controllers
;
351 static unsigned int ips_released_controllers
;
352 static int ips_hotplug
;
353 static int ips_cmd_timeout
= 60;
354 static int ips_reset_timeout
= 60 * 5;
355 static int ips_force_memio
= 1; /* Always use Memory Mapped I/O */
356 static int ips_force_i2o
= 1; /* Always use I2O command delivery */
357 static int ips_ioctlsize
= IPS_IOCTL_SIZE
; /* Size of the ioctl buffer */
358 static int ips_cd_boot
; /* Booting from Manager CD */
359 static char *ips_FlashData
= NULL
; /* CD Boot - Flash Data Buffer */
360 static dma_addr_t ips_flashbusaddr
;
361 static long ips_FlashDataInUse
; /* CD Boot - Flash Data In Use Flag */
362 static uint32_t MaxLiteCmds
= 32; /* Max Active Cmds for a Lite Adapter */
363 static struct scsi_host_template ips_driver_template
= {
364 .detect
= ips_detect
,
365 .release
= ips_release
,
367 .queuecommand
= ips_queue
,
368 .eh_abort_handler
= ips_eh_abort
,
369 .eh_host_reset_handler
= ips_eh_reset
,
371 .proc_info
= ips_proc_info
,
372 .slave_configure
= ips_slave_configure
,
373 .bios_param
= ips_biosparam
,
375 .sg_tablesize
= IPS_MAX_SG
,
377 .use_clustering
= ENABLE_CLUSTERING
,
381 /* This table describes all ServeRAID Adapters */
382 static struct pci_device_id ips_pci_table
[] = {
383 { 0x1014, 0x002E, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
384 { 0x1014, 0x01BD, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
385 { 0x9005, 0x0250, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
389 MODULE_DEVICE_TABLE( pci
, ips_pci_table
);
391 static char ips_hot_plug_name
[] = "ips";
393 static int __devinit
ips_insert_device(struct pci_dev
*pci_dev
, const struct pci_device_id
*ent
);
394 static void __devexit
ips_remove_device(struct pci_dev
*pci_dev
);
396 static struct pci_driver ips_pci_driver
= {
397 .name
= ips_hot_plug_name
,
398 .id_table
= ips_pci_table
,
399 .probe
= ips_insert_device
,
400 .remove
= __devexit_p(ips_remove_device
),
405 * Necessary forward function protoypes
407 static int ips_halt(struct notifier_block
*nb
, ulong event
, void *buf
);
409 #define MAX_ADAPTER_NAME 15
411 static char ips_adapter_name
[][30] = {
414 "ServeRAID on motherboard",
415 "ServeRAID on motherboard",
432 static struct notifier_block ips_notifier
= {
439 static char ips_command_direction
[] = {
440 IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
,
441 IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
,
442 IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
443 IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_OUT
,
444 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_OUT
,
445 IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_OUT
,
446 IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_IN
,
447 IPS_DATA_UNK
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
,
448 IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_UNK
,
449 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
,
450 IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_NONE
,
451 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
,
452 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
,
453 IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_NONE
,
454 IPS_DATA_UNK
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_UNK
,
455 IPS_DATA_NONE
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
,
456 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
457 IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
458 IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
459 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
460 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
461 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
462 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
463 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
464 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
465 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
466 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
467 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
468 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
469 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
470 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
471 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
472 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
473 IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_NONE
,
474 IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_OUT
,
475 IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_NONE
,
476 IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_IN
,
477 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
478 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
479 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
480 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
481 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
482 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
483 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
484 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
485 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
486 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_OUT
,
487 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
488 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
489 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
490 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
494 /****************************************************************************/
496 /* Routine Name: ips_setup */
498 /* Routine Description: */
500 /* setup parameters to the driver */
502 /****************************************************************************/
504 ips_setup(char *ips_str
)
510 IPS_OPTION options
[] = {
511 {"noi2o", &ips_force_i2o
, 0},
512 {"nommap", &ips_force_memio
, 0},
513 {"ioctlsize", &ips_ioctlsize
, IPS_IOCTL_SIZE
},
514 {"cdboot", &ips_cd_boot
, 0},
515 {"maxcmds", &MaxLiteCmds
, 32},
518 /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
519 /* Search for value */
520 while ((key
= strsep(&ips_str
, ",."))) {
523 value
= strchr(key
, ':');
527 * We now have key/value pairs.
528 * Update the variables
530 for (i
= 0; i
< ARRAY_SIZE(options
); i
++) {
532 (key
, options
[i
].option_name
,
533 strlen(options
[i
].option_name
)) == 0) {
535 *options
[i
].option_flag
=
536 simple_strtoul(value
, NULL
, 0);
538 *options
[i
].option_flag
=
539 options
[i
].option_value
;
548 __setup("ips=", ips_setup
);
550 /****************************************************************************/
552 /* Routine Name: ips_detect */
554 /* Routine Description: */
556 /* Detect and initialize the driver */
558 /* NOTE: this routine is called under the io_request_lock spinlock */
560 /****************************************************************************/
562 ips_detect(struct scsi_host_template
* SHT
)
566 METHOD_TRACE("ips_detect", 1);
573 for (i
= 0; i
< ips_num_controllers
; i
++) {
574 if (ips_register_scsi(i
))
576 ips_released_controllers
++;
579 return (ips_num_controllers
);
582 /****************************************************************************/
583 /* configure the function pointers to use the functions that will work */
584 /* with the found version of the adapter */
585 /****************************************************************************/
587 ips_setup_funclist(ips_ha_t
* ha
)
593 if (IPS_IS_MORPHEUS(ha
) || IPS_IS_MARCO(ha
)) {
594 /* morpheus / marco / sebring */
595 ha
->func
.isintr
= ips_isintr_morpheus
;
596 ha
->func
.isinit
= ips_isinit_morpheus
;
597 ha
->func
.issue
= ips_issue_i2o_memio
;
598 ha
->func
.init
= ips_init_morpheus
;
599 ha
->func
.statupd
= ips_statupd_morpheus
;
600 ha
->func
.reset
= ips_reset_morpheus
;
601 ha
->func
.intr
= ips_intr_morpheus
;
602 ha
->func
.enableint
= ips_enable_int_morpheus
;
603 } else if (IPS_USE_MEMIO(ha
)) {
604 /* copperhead w/MEMIO */
605 ha
->func
.isintr
= ips_isintr_copperhead_memio
;
606 ha
->func
.isinit
= ips_isinit_copperhead_memio
;
607 ha
->func
.init
= ips_init_copperhead_memio
;
608 ha
->func
.statupd
= ips_statupd_copperhead_memio
;
609 ha
->func
.statinit
= ips_statinit_memio
;
610 ha
->func
.reset
= ips_reset_copperhead_memio
;
611 ha
->func
.intr
= ips_intr_copperhead
;
612 ha
->func
.erasebios
= ips_erase_bios_memio
;
613 ha
->func
.programbios
= ips_program_bios_memio
;
614 ha
->func
.verifybios
= ips_verify_bios_memio
;
615 ha
->func
.enableint
= ips_enable_int_copperhead_memio
;
616 if (IPS_USE_I2O_DELIVER(ha
))
617 ha
->func
.issue
= ips_issue_i2o_memio
;
619 ha
->func
.issue
= ips_issue_copperhead_memio
;
622 ha
->func
.isintr
= ips_isintr_copperhead
;
623 ha
->func
.isinit
= ips_isinit_copperhead
;
624 ha
->func
.init
= ips_init_copperhead
;
625 ha
->func
.statupd
= ips_statupd_copperhead
;
626 ha
->func
.statinit
= ips_statinit
;
627 ha
->func
.reset
= ips_reset_copperhead
;
628 ha
->func
.intr
= ips_intr_copperhead
;
629 ha
->func
.erasebios
= ips_erase_bios
;
630 ha
->func
.programbios
= ips_program_bios
;
631 ha
->func
.verifybios
= ips_verify_bios
;
632 ha
->func
.enableint
= ips_enable_int_copperhead
;
634 if (IPS_USE_I2O_DELIVER(ha
))
635 ha
->func
.issue
= ips_issue_i2o
;
637 ha
->func
.issue
= ips_issue_copperhead
;
641 /****************************************************************************/
643 /* Routine Name: ips_release */
645 /* Routine Description: */
647 /* Remove a driver */
649 /****************************************************************************/
651 ips_release(struct Scsi_Host
*sh
)
657 METHOD_TRACE("ips_release", 1);
659 scsi_remove_host(sh
);
661 for (i
= 0; i
< IPS_MAX_ADAPTERS
&& ips_sh
[i
] != sh
; i
++) ;
663 if (i
== IPS_MAX_ADAPTERS
) {
665 "(%s) release, invalid Scsi_Host pointer.\n", ips_name
);
675 /* flush the cache on the controller */
676 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
678 ips_init_scb(ha
, scb
);
680 scb
->timeout
= ips_cmd_timeout
;
681 scb
->cdb
[0] = IPS_CMD_FLUSH
;
683 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
684 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
685 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
686 scb
->cmd
.flush_cache
.reserved
= 0;
687 scb
->cmd
.flush_cache
.reserved2
= 0;
688 scb
->cmd
.flush_cache
.reserved3
= 0;
689 scb
->cmd
.flush_cache
.reserved4
= 0;
691 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Cache.\n");
694 if (ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_ON
) == IPS_FAILURE
)
695 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Incomplete Flush.\n");
697 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Complete.\n");
702 /* free extra memory */
706 free_irq(ha
->pcidev
->irq
, ha
);
710 ips_released_controllers
++;
715 /****************************************************************************/
717 /* Routine Name: ips_halt */
719 /* Routine Description: */
721 /* Perform cleanup when the system reboots */
723 /****************************************************************************/
725 ips_halt(struct notifier_block
*nb
, ulong event
, void *buf
)
731 if ((event
!= SYS_RESTART
) && (event
!= SYS_HALT
) &&
732 (event
!= SYS_POWER_OFF
))
733 return (NOTIFY_DONE
);
735 for (i
= 0; i
< ips_next_controller
; i
++) {
736 ha
= (ips_ha_t
*) ips_ha
[i
];
744 /* flush the cache on the controller */
745 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
747 ips_init_scb(ha
, scb
);
749 scb
->timeout
= ips_cmd_timeout
;
750 scb
->cdb
[0] = IPS_CMD_FLUSH
;
752 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
753 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
754 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
755 scb
->cmd
.flush_cache
.reserved
= 0;
756 scb
->cmd
.flush_cache
.reserved2
= 0;
757 scb
->cmd
.flush_cache
.reserved3
= 0;
758 scb
->cmd
.flush_cache
.reserved4
= 0;
760 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Cache.\n");
763 if (ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_ON
) ==
765 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
766 "Incomplete Flush.\n");
768 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
769 "Flushing Complete.\n");
775 /****************************************************************************/
777 /* Routine Name: ips_eh_abort */
779 /* Routine Description: */
781 /* Abort a command (using the new error code stuff) */
782 /* Note: this routine is called under the io_request_lock */
783 /****************************************************************************/
784 int ips_eh_abort(struct scsi_cmnd
*SC
)
787 ips_copp_wait_item_t
*item
;
789 struct Scsi_Host
*host
;
791 METHOD_TRACE("ips_eh_abort", 1);
796 host
= SC
->device
->host
;
797 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
805 spin_lock(host
->host_lock
);
807 /* See if the command is on the copp queue */
808 item
= ha
->copp_waitlist
.head
;
809 while ((item
) && (item
->scsi_cmd
!= SC
))
814 ips_removeq_copp(&ha
->copp_waitlist
, item
);
817 /* See if the command is on the wait queue */
818 } else if (ips_removeq_wait(&ha
->scb_waitlist
, SC
)) {
819 /* command not sent yet */
822 /* command must have already been sent */
826 spin_unlock(host
->host_lock
);
830 /****************************************************************************/
832 /* Routine Name: ips_eh_reset */
834 /* Routine Description: */
836 /* Reset the controller (with new eh error code) */
838 /* NOTE: this routine is called under the io_request_lock spinlock */
840 /****************************************************************************/
841 static int __ips_eh_reset(struct scsi_cmnd
*SC
)
847 ips_copp_wait_item_t
*item
;
849 METHOD_TRACE("ips_eh_reset", 1);
856 DEBUG(1, "Reset called with NULL scsi command");
861 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
864 DEBUG(1, "Reset called with NULL ha struct");
872 /* See if the command is on the copp queue */
873 item
= ha
->copp_waitlist
.head
;
874 while ((item
) && (item
->scsi_cmd
!= SC
))
879 ips_removeq_copp(&ha
->copp_waitlist
, item
);
883 /* See if the command is on the wait queue */
884 if (ips_removeq_wait(&ha
->scb_waitlist
, SC
)) {
885 /* command not sent yet */
889 /* An explanation for the casual observer: */
890 /* Part of the function of a RAID controller is automatic error */
891 /* detection and recovery. As such, the only problem that physically */
892 /* resetting an adapter will ever fix is when, for some reason, */
893 /* the driver is not successfully communicating with the adapter. */
894 /* Therefore, we will attempt to flush this adapter. If that succeeds, */
895 /* then there's no real purpose in a physical reset. This will complete */
896 /* much faster and avoids any problems that might be caused by a */
897 /* physical reset ( such as having to fail all the outstanding I/O's ). */
899 if (ha
->ioctl_reset
== 0) { /* IF Not an IOCTL Requested Reset */
900 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
902 ips_init_scb(ha
, scb
);
904 scb
->timeout
= ips_cmd_timeout
;
905 scb
->cdb
[0] = IPS_CMD_FLUSH
;
907 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
908 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
909 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
910 scb
->cmd
.flush_cache
.reserved
= 0;
911 scb
->cmd
.flush_cache
.reserved2
= 0;
912 scb
->cmd
.flush_cache
.reserved3
= 0;
913 scb
->cmd
.flush_cache
.reserved4
= 0;
915 /* Attempt the flush command */
916 ret
= ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_IORL
);
917 if (ret
== IPS_SUCCESS
) {
918 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
919 "Reset Request - Flushed Cache\n");
924 /* Either we can't communicate with the adapter or it's an IOCTL request */
925 /* from a utility. A physical reset is needed at this point. */
927 ha
->ioctl_reset
= 0; /* Reset the IOCTL Requested Reset Flag */
930 * command must have already been sent
931 * reset the controller
933 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
, "Resetting controller.\n");
934 ret
= (*ha
->func
.reset
) (ha
);
937 struct scsi_cmnd
*scsi_cmd
;
939 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
940 "Controller reset failed - controller now offline.\n");
942 /* Now fail all of the active commands */
943 DEBUG_VAR(1, "(%s%d) Failing active commands",
944 ips_name
, ha
->host_num
);
946 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
947 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
948 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
949 ips_freescb(ha
, scb
);
952 /* Now fail all of the pending commands */
953 DEBUG_VAR(1, "(%s%d) Failing pending commands",
954 ips_name
, ha
->host_num
);
956 while ((scsi_cmd
= ips_removeq_wait_head(&ha
->scb_waitlist
))) {
957 scsi_cmd
->result
= DID_ERROR
;
958 scsi_cmd
->scsi_done(scsi_cmd
);
965 if (!ips_clear_adapter(ha
, IPS_INTR_IORL
)) {
966 struct scsi_cmnd
*scsi_cmd
;
968 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
969 "Controller reset failed - controller now offline.\n");
971 /* Now fail all of the active commands */
972 DEBUG_VAR(1, "(%s%d) Failing active commands",
973 ips_name
, ha
->host_num
);
975 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
976 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
977 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
978 ips_freescb(ha
, scb
);
981 /* Now fail all of the pending commands */
982 DEBUG_VAR(1, "(%s%d) Failing pending commands",
983 ips_name
, ha
->host_num
);
985 while ((scsi_cmd
= ips_removeq_wait_head(&ha
->scb_waitlist
))) {
986 scsi_cmd
->result
= DID_ERROR
<< 16;
987 scsi_cmd
->scsi_done(scsi_cmd
);
995 if (le32_to_cpu(ha
->subsys
->param
[3]) & 0x300000) {
998 do_gettimeofday(&tv
);
999 ha
->last_ffdc
= tv
.tv_sec
;
1001 ips_ffdc_reset(ha
, IPS_INTR_IORL
);
1004 /* Now fail all of the active commands */
1005 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name
, ha
->host_num
);
1007 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
1008 scb
->scsi_cmd
->result
=
1009 (DID_RESET
<< 16) | (SUGGEST_RETRY
<< 24);
1010 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
1011 ips_freescb(ha
, scb
);
1014 /* Reset DCDB active command bits */
1015 for (i
= 1; i
< ha
->nbus
; i
++)
1016 ha
->dcdb_active
[i
- 1] = 0;
1018 /* Reset the number of active IOCTLs */
1021 ips_next(ha
, IPS_INTR_IORL
);
1024 #endif /* NO_IPS_RESET */
1028 static int ips_eh_reset(struct scsi_cmnd
*SC
)
1032 spin_lock_irq(SC
->device
->host
->host_lock
);
1033 rc
= __ips_eh_reset(SC
);
1034 spin_unlock_irq(SC
->device
->host
->host_lock
);
1039 /****************************************************************************/
1041 /* Routine Name: ips_queue */
1043 /* Routine Description: */
1045 /* Send a command to the controller */
1048 /* Linux obtains io_request_lock before calling this function */
1050 /****************************************************************************/
1051 static int ips_queue(struct scsi_cmnd
*SC
, void (*done
) (struct scsi_cmnd
*))
1056 METHOD_TRACE("ips_queue", 1);
1058 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
1066 if (ips_is_passthru(SC
)) {
1067 if (ha
->copp_waitlist
.count
== IPS_MAX_IOCTL_QUEUE
) {
1068 SC
->result
= DID_BUS_BUSY
<< 16;
1073 } else if (ha
->scb_waitlist
.count
== IPS_MAX_QUEUE
) {
1074 SC
->result
= DID_BUS_BUSY
<< 16;
1080 SC
->scsi_done
= done
;
1082 DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1086 SC
->device
->channel
, SC
->device
->id
, SC
->device
->lun
);
1088 /* Check for command to initiator IDs */
1089 if ((scmd_channel(SC
) > 0)
1090 && (scmd_id(SC
) == ha
->ha_id
[scmd_channel(SC
)])) {
1091 SC
->result
= DID_NO_CONNECT
<< 16;
1097 if (ips_is_passthru(SC
)) {
1099 ips_copp_wait_item_t
*scratch
;
1101 /* A Reset IOCTL is only sent by the boot CD in extreme cases. */
1102 /* There can never be any system activity ( network or disk ), but check */
1103 /* anyway just as a good practice. */
1104 pt
= (ips_passthru_t
*) scsi_sglist(SC
);
1105 if ((pt
->CoppCP
.cmd
.reset
.op_code
== IPS_CMD_RESET_CHANNEL
) &&
1106 (pt
->CoppCP
.cmd
.reset
.adapter_flag
== 1)) {
1107 if (ha
->scb_activelist
.count
!= 0) {
1108 SC
->result
= DID_BUS_BUSY
<< 16;
1112 ha
->ioctl_reset
= 1; /* This reset request is from an IOCTL */
1114 SC
->result
= DID_OK
<< 16;
1119 /* allocate space for the scribble */
1120 scratch
= kmalloc(sizeof (ips_copp_wait_item_t
), GFP_ATOMIC
);
1123 SC
->result
= DID_ERROR
<< 16;
1129 scratch
->scsi_cmd
= SC
;
1130 scratch
->next
= NULL
;
1132 ips_putq_copp_tail(&ha
->copp_waitlist
, scratch
);
1134 ips_putq_wait_tail(&ha
->scb_waitlist
, SC
);
1137 ips_next(ha
, IPS_INTR_IORL
);
1142 /****************************************************************************/
1144 /* Routine Name: ips_biosparam */
1146 /* Routine Description: */
1148 /* Set bios geometry for the controller */
1150 /****************************************************************************/
1151 static int ips_biosparam(struct scsi_device
*sdev
, struct block_device
*bdev
,
1152 sector_t capacity
, int geom
[])
1154 ips_ha_t
*ha
= (ips_ha_t
*) sdev
->host
->hostdata
;
1159 METHOD_TRACE("ips_biosparam", 1);
1162 /* ?!?! host adater info invalid */
1168 if (!ips_read_adapter_status(ha
, IPS_INTR_ON
))
1169 /* ?!?! Enquiry command failed */
1172 if ((capacity
> 0x400000) && ((ha
->enq
->ucMiscFlag
& 0x8) == 0)) {
1173 heads
= IPS_NORM_HEADS
;
1174 sectors
= IPS_NORM_SECTORS
;
1176 heads
= IPS_COMP_HEADS
;
1177 sectors
= IPS_COMP_SECTORS
;
1180 cylinders
= (unsigned long) capacity
/ (heads
* sectors
);
1182 DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1183 heads
, sectors
, cylinders
);
1187 geom
[2] = cylinders
;
1192 /****************************************************************************/
1194 /* Routine Name: ips_slave_configure */
1196 /* Routine Description: */
1198 /* Set queue depths on devices once scan is complete */
1200 /****************************************************************************/
1202 ips_slave_configure(struct scsi_device
* SDptr
)
1207 ha
= IPS_HA(SDptr
->host
);
1208 if (SDptr
->tagged_supported
&& SDptr
->type
== TYPE_DISK
) {
1209 min
= ha
->max_cmds
/ 2;
1210 if (ha
->enq
->ucLogDriveCount
<= 2)
1211 min
= ha
->max_cmds
- 1;
1212 scsi_adjust_queue_depth(SDptr
, MSG_ORDERED_TAG
, min
);
1215 SDptr
->skip_ms_page_8
= 1;
1216 SDptr
->skip_ms_page_3f
= 1;
1220 /****************************************************************************/
1222 /* Routine Name: do_ipsintr */
1224 /* Routine Description: */
1226 /* Wrapper for the interrupt handler */
1228 /****************************************************************************/
1230 do_ipsintr(int irq
, void *dev_id
)
1233 struct Scsi_Host
*host
;
1236 METHOD_TRACE("do_ipsintr", 2);
1238 ha
= (ips_ha_t
*) dev_id
;
1241 host
= ips_sh
[ha
->host_num
];
1242 /* interrupt during initialization */
1244 (*ha
->func
.intr
) (ha
);
1248 spin_lock(host
->host_lock
);
1251 spin_unlock(host
->host_lock
);
1255 irqstatus
= (*ha
->func
.intr
) (ha
);
1257 spin_unlock(host
->host_lock
);
1259 /* start the next command */
1260 ips_next(ha
, IPS_INTR_ON
);
1261 return IRQ_RETVAL(irqstatus
);
1264 /****************************************************************************/
1266 /* Routine Name: ips_intr_copperhead */
1268 /* Routine Description: */
1270 /* Polling interrupt handler */
1272 /* ASSUMES interrupts are disabled */
1274 /****************************************************************************/
1276 ips_intr_copperhead(ips_ha_t
* ha
)
1283 METHOD_TRACE("ips_intr", 2);
1291 intrstatus
= (*ha
->func
.isintr
) (ha
);
1295 * Unexpected/Shared interrupt
1304 intrstatus
= (*ha
->func
.isintr
) (ha
);
1309 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
1311 if (cstatus
.fields
.command_id
> (IPS_MAX_CMDS
- 1)) {
1312 /* Spurious Interupt ? */
1316 ips_chkstatus(ha
, &cstatus
);
1317 scb
= (ips_scb_t
*) sp
->scb_addr
;
1320 * use the callback function to finish things up
1321 * NOTE: interrupts are OFF for this
1323 (*scb
->callback
) (ha
, scb
);
1328 /****************************************************************************/
1330 /* Routine Name: ips_intr_morpheus */
1332 /* Routine Description: */
1334 /* Polling interrupt handler */
1336 /* ASSUMES interrupts are disabled */
1338 /****************************************************************************/
1340 ips_intr_morpheus(ips_ha_t
* ha
)
1347 METHOD_TRACE("ips_intr_morpheus", 2);
1355 intrstatus
= (*ha
->func
.isintr
) (ha
);
1359 * Unexpected/Shared interrupt
1368 intrstatus
= (*ha
->func
.isintr
) (ha
);
1373 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
1375 if (cstatus
.value
== 0xffffffff)
1376 /* No more to process */
1379 if (cstatus
.fields
.command_id
> (IPS_MAX_CMDS
- 1)) {
1380 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
1381 "Spurious interrupt; no ccb.\n");
1386 ips_chkstatus(ha
, &cstatus
);
1387 scb
= (ips_scb_t
*) sp
->scb_addr
;
1390 * use the callback function to finish things up
1391 * NOTE: interrupts are OFF for this
1393 (*scb
->callback
) (ha
, scb
);
1398 /****************************************************************************/
1400 /* Routine Name: ips_info */
1402 /* Routine Description: */
1404 /* Return info about the driver */
1406 /****************************************************************************/
1408 ips_info(struct Scsi_Host
*SH
)
1410 static char buffer
[256];
1414 METHOD_TRACE("ips_info", 1);
1422 memset(bp
, 0, sizeof (buffer
));
1424 sprintf(bp
, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1425 IPS_VERSION_HIGH
, IPS_VERSION_LOW
, IPS_BUILD_IDENT
);
1427 if (ha
->ad_type
> 0 && ha
->ad_type
<= MAX_ADAPTER_NAME
) {
1429 strcat(bp
, ips_adapter_name
[ha
->ad_type
- 1]);
1436 /****************************************************************************/
1438 /* Routine Name: ips_proc_info */
1440 /* Routine Description: */
1442 /* The passthru interface for the driver */
1444 /****************************************************************************/
1446 ips_proc_info(struct Scsi_Host
*host
, char *buffer
, char **start
, off_t offset
,
1447 int length
, int func
)
1451 ips_ha_t
*ha
= NULL
;
1453 METHOD_TRACE("ips_proc_info", 1);
1455 /* Find our host structure */
1456 for (i
= 0; i
< ips_next_controller
; i
++) {
1458 if (ips_sh
[i
] == host
) {
1459 ha
= (ips_ha_t
*) ips_sh
[i
]->hostdata
;
1476 ret
= ips_host_info(ha
, buffer
, offset
, length
);
1482 /*--------------------------------------------------------------------------*/
1483 /* Helper Functions */
1484 /*--------------------------------------------------------------------------*/
1486 /****************************************************************************/
1488 /* Routine Name: ips_is_passthru */
1490 /* Routine Description: */
1492 /* Determine if the specified SCSI command is really a passthru command */
1494 /****************************************************************************/
1495 static int ips_is_passthru(struct scsi_cmnd
*SC
)
1497 unsigned long flags
;
1499 METHOD_TRACE("ips_is_passthru", 1);
1504 if ((SC
->cmnd
[0] == IPS_IOCTL_COMMAND
) &&
1505 (SC
->device
->channel
== 0) &&
1506 (SC
->device
->id
== IPS_ADAPTER_ID
) &&
1507 (SC
->device
->lun
== 0) && scsi_sglist(SC
)) {
1508 struct scatterlist
*sg
= scsi_sglist(SC
);
1511 /* kmap_atomic() ensures addressability of the user buffer.*/
1512 /* local_irq_save() protects the KM_IRQ0 address slot. */
1513 local_irq_save(flags
);
1514 buffer
= kmap_atomic(sg_page(sg
), KM_IRQ0
) + sg
->offset
;
1515 if (buffer
&& buffer
[0] == 'C' && buffer
[1] == 'O' &&
1516 buffer
[2] == 'P' && buffer
[3] == 'P') {
1517 kunmap_atomic(buffer
- sg
->offset
, KM_IRQ0
);
1518 local_irq_restore(flags
);
1521 kunmap_atomic(buffer
- sg
->offset
, KM_IRQ0
);
1522 local_irq_restore(flags
);
1527 /****************************************************************************/
1529 /* Routine Name: ips_alloc_passthru_buffer */
1531 /* Routine Description: */
1532 /* allocate a buffer large enough for the ioctl data if the ioctl buffer */
1533 /* is too small or doesn't exist */
1534 /****************************************************************************/
1536 ips_alloc_passthru_buffer(ips_ha_t
* ha
, int length
)
1539 dma_addr_t dma_busaddr
;
1541 if (ha
->ioctl_data
&& length
<= ha
->ioctl_len
)
1543 /* there is no buffer or it's not big enough, allocate a new one */
1544 bigger_buf
= pci_alloc_consistent(ha
->pcidev
, length
, &dma_busaddr
);
1546 /* free the old memory */
1547 pci_free_consistent(ha
->pcidev
, ha
->ioctl_len
, ha
->ioctl_data
,
1549 /* use the new memory */
1550 ha
->ioctl_data
= (char *) bigger_buf
;
1551 ha
->ioctl_len
= length
;
1552 ha
->ioctl_busaddr
= dma_busaddr
;
1559 /****************************************************************************/
1561 /* Routine Name: ips_make_passthru */
1563 /* Routine Description: */
1565 /* Make a passthru command out of the info in the Scsi block */
1567 /****************************************************************************/
1569 ips_make_passthru(ips_ha_t
*ha
, struct scsi_cmnd
*SC
, ips_scb_t
*scb
, int intr
)
1574 struct scatterlist
*sg
= scsi_sglist(SC
);
1576 METHOD_TRACE("ips_make_passthru", 1);
1578 scsi_for_each_sg(SC
, sg
, scsi_sg_count(SC
), i
)
1579 length
+= sg
[i
].length
;
1581 if (length
< sizeof (ips_passthru_t
)) {
1583 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1584 ips_name
, ha
->host_num
);
1585 return (IPS_FAILURE
);
1587 if (ips_alloc_passthru_buffer(ha
, length
)) {
1588 /* allocation failure! If ha->ioctl_data exists, use it to return
1589 some error codes. Return a failed command to the scsi layer. */
1590 if (ha
->ioctl_data
) {
1591 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
1592 ips_scmd_buf_read(SC
, pt
, sizeof (ips_passthru_t
));
1593 pt
->BasicStatus
= 0x0B;
1594 pt
->ExtendedStatus
= 0x00;
1595 ips_scmd_buf_write(SC
, pt
, sizeof (ips_passthru_t
));
1599 ha
->ioctl_datasize
= length
;
1601 ips_scmd_buf_read(SC
, ha
->ioctl_data
, ha
->ioctl_datasize
);
1602 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
1605 * Some notes about the passthru interface used
1607 * IF the scsi op_code == 0x0d then we assume
1608 * that the data came along with/goes with the
1609 * packet we received from the sg driver. In this
1610 * case the CmdBSize field of the pt structure is
1611 * used for the size of the buffer.
1614 switch (pt
->CoppCmd
) {
1616 memcpy(ha
->ioctl_data
+ sizeof (ips_passthru_t
),
1617 &ips_num_controllers
, sizeof (int));
1618 ips_scmd_buf_write(SC
, ha
->ioctl_data
,
1619 sizeof (ips_passthru_t
) + sizeof (int));
1620 SC
->result
= DID_OK
<< 16;
1622 return (IPS_SUCCESS_IMM
);
1624 case IPS_COPPUSRCMD
:
1625 case IPS_COPPIOCCMD
:
1626 if (SC
->cmnd
[0] == IPS_IOCTL_COMMAND
) {
1627 if (length
< (sizeof (ips_passthru_t
) + pt
->CmdBSize
)) {
1630 "(%s%d) Passthru structure wrong size",
1631 ips_name
, ha
->host_num
);
1633 return (IPS_FAILURE
);
1636 if (ha
->pcidev
->device
== IPS_DEVICEID_COPPERHEAD
&&
1637 pt
->CoppCP
.cmd
.flashfw
.op_code
==
1638 IPS_CMD_RW_BIOSFW
) {
1639 ret
= ips_flash_copperhead(ha
, pt
, scb
);
1640 ips_scmd_buf_write(SC
, ha
->ioctl_data
,
1641 sizeof (ips_passthru_t
));
1644 if (ips_usrcmd(ha
, pt
, scb
))
1645 return (IPS_SUCCESS
);
1647 return (IPS_FAILURE
);
1654 return (IPS_FAILURE
);
1657 /****************************************************************************/
1658 /* Routine Name: ips_flash_copperhead */
1659 /* Routine Description: */
1660 /* Flash the BIOS/FW on a Copperhead style controller */
1661 /****************************************************************************/
1663 ips_flash_copperhead(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1667 /* Trombone is the only copperhead that can do packet flash, but only
1668 * for firmware. No one said it had to make sence. */
1669 if (IPS_IS_TROMBONE(ha
) && pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
) {
1670 if (ips_usrcmd(ha
, pt
, scb
))
1675 pt
->BasicStatus
= 0x0B;
1676 pt
->ExtendedStatus
= 0;
1677 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1678 /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can */
1679 /* avoid allocating a huge buffer per adapter ( which can fail ). */
1680 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1681 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_ERASE_BIOS
) {
1682 pt
->BasicStatus
= 0;
1683 return ips_flash_bios(ha
, pt
, scb
);
1684 } else if (pt
->CoppCP
.cmd
.flashfw
.packet_num
== 0) {
1685 if (ips_FlashData
&& !test_and_set_bit(0, &ips_FlashDataInUse
)){
1686 ha
->flash_data
= ips_FlashData
;
1687 ha
->flash_busaddr
= ips_flashbusaddr
;
1688 ha
->flash_len
= PAGE_SIZE
<< 7;
1689 ha
->flash_datasize
= 0;
1690 } else if (!ha
->flash_data
) {
1691 datasize
= pt
->CoppCP
.cmd
.flashfw
.total_packets
*
1692 pt
->CoppCP
.cmd
.flashfw
.count
;
1693 ha
->flash_data
= pci_alloc_consistent(ha
->pcidev
,
1695 &ha
->flash_busaddr
);
1696 if (!ha
->flash_data
){
1697 printk(KERN_WARNING
"Unable to allocate a flash buffer\n");
1700 ha
->flash_datasize
= 0;
1701 ha
->flash_len
= datasize
;
1705 if (pt
->CoppCP
.cmd
.flashfw
.count
+ ha
->flash_datasize
>
1707 ips_free_flash_copperhead(ha
);
1708 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
1709 "failed size sanity check\n");
1713 if (!ha
->flash_data
)
1715 pt
->BasicStatus
= 0;
1716 memcpy(&ha
->flash_data
[ha
->flash_datasize
], pt
+ 1,
1717 pt
->CoppCP
.cmd
.flashfw
.count
);
1718 ha
->flash_datasize
+= pt
->CoppCP
.cmd
.flashfw
.count
;
1719 if (pt
->CoppCP
.cmd
.flashfw
.packet_num
==
1720 pt
->CoppCP
.cmd
.flashfw
.total_packets
- 1) {
1721 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
)
1722 return ips_flash_bios(ha
, pt
, scb
);
1723 else if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
)
1724 return ips_flash_firmware(ha
, pt
, scb
);
1726 return IPS_SUCCESS_IMM
;
1729 /****************************************************************************/
1730 /* Routine Name: ips_flash_bios */
1731 /* Routine Description: */
1732 /* flashes the bios of a copperhead adapter */
1733 /****************************************************************************/
1735 ips_flash_bios(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1738 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1739 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_WRITE_BIOS
) {
1740 if ((!ha
->func
.programbios
) || (!ha
->func
.erasebios
) ||
1741 (!ha
->func
.verifybios
))
1743 if ((*ha
->func
.erasebios
) (ha
)) {
1745 "(%s%d) flash bios failed - unable to erase flash",
1746 ips_name
, ha
->host_num
);
1749 if ((*ha
->func
.programbios
) (ha
,
1752 ha
->flash_datasize
-
1753 IPS_BIOS_HEADER
, 0)) {
1755 "(%s%d) flash bios failed - unable to flash",
1756 ips_name
, ha
->host_num
);
1759 if ((*ha
->func
.verifybios
) (ha
,
1762 ha
->flash_datasize
-
1763 IPS_BIOS_HEADER
, 0)) {
1765 "(%s%d) flash bios failed - unable to verify flash",
1766 ips_name
, ha
->host_num
);
1769 ips_free_flash_copperhead(ha
);
1770 return IPS_SUCCESS_IMM
;
1771 } else if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1772 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_ERASE_BIOS
) {
1773 if (!ha
->func
.erasebios
)
1775 if ((*ha
->func
.erasebios
) (ha
)) {
1777 "(%s%d) flash bios failed - unable to erase flash",
1778 ips_name
, ha
->host_num
);
1781 return IPS_SUCCESS_IMM
;
1784 pt
->BasicStatus
= 0x0B;
1785 pt
->ExtendedStatus
= 0x00;
1786 ips_free_flash_copperhead(ha
);
1790 /****************************************************************************/
1792 /* Routine Name: ips_fill_scb_sg_single */
1794 /* Routine Description: */
1795 /* Fill in a single scb sg_list element from an address */
1796 /* return a -1 if a breakup occurred */
1797 /****************************************************************************/
1799 ips_fill_scb_sg_single(ips_ha_t
* ha
, dma_addr_t busaddr
,
1800 ips_scb_t
* scb
, int indx
, unsigned int e_len
)
1805 if ((scb
->data_len
+ e_len
) > ha
->max_xfer
) {
1806 e_len
= ha
->max_xfer
- scb
->data_len
;
1807 scb
->breakup
= indx
;
1814 if (IPS_USE_ENH_SGLIST(ha
)) {
1815 scb
->sg_list
.enh_list
[indx
].address_lo
=
1816 cpu_to_le32(pci_dma_lo32(busaddr
));
1817 scb
->sg_list
.enh_list
[indx
].address_hi
=
1818 cpu_to_le32(pci_dma_hi32(busaddr
));
1819 scb
->sg_list
.enh_list
[indx
].length
= cpu_to_le32(e_len
);
1821 scb
->sg_list
.std_list
[indx
].address
=
1822 cpu_to_le32(pci_dma_lo32(busaddr
));
1823 scb
->sg_list
.std_list
[indx
].length
= cpu_to_le32(e_len
);
1827 scb
->data_len
+= e_len
;
1831 /****************************************************************************/
1832 /* Routine Name: ips_flash_firmware */
1833 /* Routine Description: */
1834 /* flashes the firmware of a copperhead adapter */
1835 /****************************************************************************/
1837 ips_flash_firmware(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1839 IPS_SG_LIST sg_list
;
1840 uint32_t cmd_busaddr
;
1842 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
&&
1843 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_WRITE_FW
) {
1844 memset(&pt
->CoppCP
.cmd
, 0, sizeof (IPS_HOST_COMMAND
));
1845 pt
->CoppCP
.cmd
.flashfw
.op_code
= IPS_CMD_DOWNLOAD
;
1846 pt
->CoppCP
.cmd
.flashfw
.count
= cpu_to_le32(ha
->flash_datasize
);
1848 pt
->BasicStatus
= 0x0B;
1849 pt
->ExtendedStatus
= 0x00;
1850 ips_free_flash_copperhead(ha
);
1853 /* Save the S/G list pointer so it doesn't get clobbered */
1854 sg_list
.list
= scb
->sg_list
.list
;
1855 cmd_busaddr
= scb
->scb_busaddr
;
1856 /* copy in the CP */
1857 memcpy(&scb
->cmd
, &pt
->CoppCP
.cmd
, sizeof (IPS_IOCTL_CMD
));
1858 /* FIX stuff that might be wrong */
1859 scb
->sg_list
.list
= sg_list
.list
;
1860 scb
->scb_busaddr
= cmd_busaddr
;
1861 scb
->bus
= scb
->scsi_cmd
->device
->channel
;
1862 scb
->target_id
= scb
->scsi_cmd
->device
->id
;
1863 scb
->lun
= scb
->scsi_cmd
->device
->lun
;
1868 scb
->callback
= ipsintr_done
;
1869 scb
->timeout
= ips_cmd_timeout
;
1871 scb
->data_len
= ha
->flash_datasize
;
1873 pci_map_single(ha
->pcidev
, ha
->flash_data
, scb
->data_len
,
1875 scb
->flags
|= IPS_SCB_MAP_SINGLE
;
1876 scb
->cmd
.flashfw
.command_id
= IPS_COMMAND_ID(ha
, scb
);
1877 scb
->cmd
.flashfw
.buffer_addr
= cpu_to_le32(scb
->data_busaddr
);
1879 scb
->timeout
= pt
->TimeOut
;
1880 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1884 /****************************************************************************/
1885 /* Routine Name: ips_free_flash_copperhead */
1886 /* Routine Description: */
1887 /* release the memory resources used to hold the flash image */
1888 /****************************************************************************/
1890 ips_free_flash_copperhead(ips_ha_t
* ha
)
1892 if (ha
->flash_data
== ips_FlashData
)
1893 test_and_clear_bit(0, &ips_FlashDataInUse
);
1894 else if (ha
->flash_data
)
1895 pci_free_consistent(ha
->pcidev
, ha
->flash_len
, ha
->flash_data
,
1897 ha
->flash_data
= NULL
;
1900 /****************************************************************************/
1902 /* Routine Name: ips_usrcmd */
1904 /* Routine Description: */
1906 /* Process a user command and make it ready to send */
1908 /****************************************************************************/
1910 ips_usrcmd(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1912 IPS_SG_LIST sg_list
;
1913 uint32_t cmd_busaddr
;
1915 METHOD_TRACE("ips_usrcmd", 1);
1917 if ((!scb
) || (!pt
) || (!ha
))
1920 /* Save the S/G list pointer so it doesn't get clobbered */
1921 sg_list
.list
= scb
->sg_list
.list
;
1922 cmd_busaddr
= scb
->scb_busaddr
;
1923 /* copy in the CP */
1924 memcpy(&scb
->cmd
, &pt
->CoppCP
.cmd
, sizeof (IPS_IOCTL_CMD
));
1925 memcpy(&scb
->dcdb
, &pt
->CoppCP
.dcdb
, sizeof (IPS_DCDB_TABLE
));
1927 /* FIX stuff that might be wrong */
1928 scb
->sg_list
.list
= sg_list
.list
;
1929 scb
->scb_busaddr
= cmd_busaddr
;
1930 scb
->bus
= scb
->scsi_cmd
->device
->channel
;
1931 scb
->target_id
= scb
->scsi_cmd
->device
->id
;
1932 scb
->lun
= scb
->scsi_cmd
->device
->lun
;
1937 scb
->callback
= ipsintr_done
;
1938 scb
->timeout
= ips_cmd_timeout
;
1939 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
1941 /* we don't support DCDB/READ/WRITE Scatter Gather */
1942 if ((scb
->cmd
.basic_io
.op_code
== IPS_CMD_READ_SG
) ||
1943 (scb
->cmd
.basic_io
.op_code
== IPS_CMD_WRITE_SG
) ||
1944 (scb
->cmd
.basic_io
.op_code
== IPS_CMD_DCDB_SG
))
1948 scb
->data_len
= pt
->CmdBSize
;
1949 scb
->data_busaddr
= ha
->ioctl_busaddr
+ sizeof (ips_passthru_t
);
1951 scb
->data_busaddr
= 0L;
1954 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
)
1955 scb
->cmd
.dcdb
.dcdb_address
= cpu_to_le32(scb
->scb_busaddr
+
1956 (unsigned long) &scb
->
1958 (unsigned long) scb
);
1961 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
)
1962 scb
->dcdb
.buffer_pointer
=
1963 cpu_to_le32(scb
->data_busaddr
);
1965 scb
->cmd
.basic_io
.sg_addr
=
1966 cpu_to_le32(scb
->data_busaddr
);
1971 scb
->timeout
= pt
->TimeOut
;
1973 if (pt
->TimeOut
<= 10)
1974 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT10
;
1975 else if (pt
->TimeOut
<= 60)
1976 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT60
;
1978 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT20M
;
1981 /* assume success */
1982 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1988 /****************************************************************************/
1990 /* Routine Name: ips_cleanup_passthru */
1992 /* Routine Description: */
1994 /* Cleanup after a passthru command */
1996 /****************************************************************************/
1998 ips_cleanup_passthru(ips_ha_t
* ha
, ips_scb_t
* scb
)
2002 METHOD_TRACE("ips_cleanup_passthru", 1);
2004 if ((!scb
) || (!scb
->scsi_cmd
) || (!scsi_sglist(scb
->scsi_cmd
))) {
2005 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2006 ips_name
, ha
->host_num
);
2010 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
2012 /* Copy data back to the user */
2013 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
) /* Copy DCDB Back to Caller's Area */
2014 memcpy(&pt
->CoppCP
.dcdb
, &scb
->dcdb
, sizeof (IPS_DCDB_TABLE
));
2016 pt
->BasicStatus
= scb
->basic_status
;
2017 pt
->ExtendedStatus
= scb
->extended_status
;
2018 pt
->AdapterType
= ha
->ad_type
;
2020 if (ha
->pcidev
->device
== IPS_DEVICEID_COPPERHEAD
&&
2021 (scb
->cmd
.flashfw
.op_code
== IPS_CMD_DOWNLOAD
||
2022 scb
->cmd
.flashfw
.op_code
== IPS_CMD_RW_BIOSFW
))
2023 ips_free_flash_copperhead(ha
);
2025 ips_scmd_buf_write(scb
->scsi_cmd
, ha
->ioctl_data
, ha
->ioctl_datasize
);
2028 /****************************************************************************/
2030 /* Routine Name: ips_host_info */
2032 /* Routine Description: */
2034 /* The passthru interface for the driver */
2036 /****************************************************************************/
2038 ips_host_info(ips_ha_t
* ha
, char *ptr
, off_t offset
, int len
)
2042 METHOD_TRACE("ips_host_info", 1);
2046 info
.offset
= offset
;
2050 copy_info(&info
, "\nIBM ServeRAID General Information:\n\n");
2052 if ((le32_to_cpu(ha
->nvram
->signature
) == IPS_NVRAM_P5_SIG
) &&
2053 (le16_to_cpu(ha
->nvram
->adapter_type
) != 0))
2054 copy_info(&info
, "\tController Type : %s\n",
2055 ips_adapter_name
[ha
->ad_type
- 1]);
2058 "\tController Type : Unknown\n");
2062 "\tIO region : 0x%lx (%d bytes)\n",
2063 ha
->io_addr
, ha
->io_len
);
2067 "\tMemory region : 0x%lx (%d bytes)\n",
2068 ha
->mem_addr
, ha
->mem_len
);
2070 "\tShared memory address : 0x%lx\n",
2074 copy_info(&info
, "\tIRQ number : %d\n", ha
->pcidev
->irq
);
2076 /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2077 /* That keeps everything happy for "text" operations on the proc file. */
2079 if (le32_to_cpu(ha
->nvram
->signature
) == IPS_NVRAM_P5_SIG
) {
2080 if (ha
->nvram
->bios_low
[3] == 0) {
2082 "\tBIOS Version : %c%c%c%c%c%c%c\n",
2083 ha
->nvram
->bios_high
[0], ha
->nvram
->bios_high
[1],
2084 ha
->nvram
->bios_high
[2], ha
->nvram
->bios_high
[3],
2085 ha
->nvram
->bios_low
[0], ha
->nvram
->bios_low
[1],
2086 ha
->nvram
->bios_low
[2]);
2090 "\tBIOS Version : %c%c%c%c%c%c%c%c\n",
2091 ha
->nvram
->bios_high
[0], ha
->nvram
->bios_high
[1],
2092 ha
->nvram
->bios_high
[2], ha
->nvram
->bios_high
[3],
2093 ha
->nvram
->bios_low
[0], ha
->nvram
->bios_low
[1],
2094 ha
->nvram
->bios_low
[2], ha
->nvram
->bios_low
[3]);
2099 if (ha
->enq
->CodeBlkVersion
[7] == 0) {
2101 "\tFirmware Version : %c%c%c%c%c%c%c\n",
2102 ha
->enq
->CodeBlkVersion
[0], ha
->enq
->CodeBlkVersion
[1],
2103 ha
->enq
->CodeBlkVersion
[2], ha
->enq
->CodeBlkVersion
[3],
2104 ha
->enq
->CodeBlkVersion
[4], ha
->enq
->CodeBlkVersion
[5],
2105 ha
->enq
->CodeBlkVersion
[6]);
2108 "\tFirmware Version : %c%c%c%c%c%c%c%c\n",
2109 ha
->enq
->CodeBlkVersion
[0], ha
->enq
->CodeBlkVersion
[1],
2110 ha
->enq
->CodeBlkVersion
[2], ha
->enq
->CodeBlkVersion
[3],
2111 ha
->enq
->CodeBlkVersion
[4], ha
->enq
->CodeBlkVersion
[5],
2112 ha
->enq
->CodeBlkVersion
[6], ha
->enq
->CodeBlkVersion
[7]);
2115 if (ha
->enq
->BootBlkVersion
[7] == 0) {
2117 "\tBoot Block Version : %c%c%c%c%c%c%c\n",
2118 ha
->enq
->BootBlkVersion
[0], ha
->enq
->BootBlkVersion
[1],
2119 ha
->enq
->BootBlkVersion
[2], ha
->enq
->BootBlkVersion
[3],
2120 ha
->enq
->BootBlkVersion
[4], ha
->enq
->BootBlkVersion
[5],
2121 ha
->enq
->BootBlkVersion
[6]);
2124 "\tBoot Block Version : %c%c%c%c%c%c%c%c\n",
2125 ha
->enq
->BootBlkVersion
[0], ha
->enq
->BootBlkVersion
[1],
2126 ha
->enq
->BootBlkVersion
[2], ha
->enq
->BootBlkVersion
[3],
2127 ha
->enq
->BootBlkVersion
[4], ha
->enq
->BootBlkVersion
[5],
2128 ha
->enq
->BootBlkVersion
[6], ha
->enq
->BootBlkVersion
[7]);
2131 copy_info(&info
, "\tDriver Version : %s%s\n",
2132 IPS_VERSION_HIGH
, IPS_VERSION_LOW
);
2134 copy_info(&info
, "\tDriver Build : %d\n",
2137 copy_info(&info
, "\tMax Physical Devices : %d\n",
2138 ha
->enq
->ucMaxPhysicalDevices
);
2139 copy_info(&info
, "\tMax Active Commands : %d\n",
2141 copy_info(&info
, "\tCurrent Queued Commands : %d\n",
2142 ha
->scb_waitlist
.count
);
2143 copy_info(&info
, "\tCurrent Active Commands : %d\n",
2144 ha
->scb_activelist
.count
- ha
->num_ioctl
);
2145 copy_info(&info
, "\tCurrent Queued PT Commands : %d\n",
2146 ha
->copp_waitlist
.count
);
2147 copy_info(&info
, "\tCurrent Active PT Commands : %d\n",
2150 copy_info(&info
, "\n");
2152 return (info
.localpos
);
2155 /****************************************************************************/
2157 /* Routine Name: copy_mem_info */
2159 /* Routine Description: */
2161 /* Copy data into an IPS_INFOSTR structure */
2163 /****************************************************************************/
2165 copy_mem_info(IPS_INFOSTR
* info
, char *data
, int len
)
2167 METHOD_TRACE("copy_mem_info", 1);
2169 if (info
->pos
+ len
< info
->offset
) {
2174 if (info
->pos
< info
->offset
) {
2175 data
+= (info
->offset
- info
->pos
);
2176 len
-= (info
->offset
- info
->pos
);
2177 info
->pos
+= (info
->offset
- info
->pos
);
2180 if (info
->localpos
+ len
> info
->length
)
2181 len
= info
->length
- info
->localpos
;
2184 memcpy(info
->buffer
+ info
->localpos
, data
, len
);
2186 info
->localpos
+= len
;
2190 /****************************************************************************/
2192 /* Routine Name: copy_info */
2194 /* Routine Description: */
2196 /* printf style wrapper for an info structure */
2198 /****************************************************************************/
2200 copy_info(IPS_INFOSTR
* info
, char *fmt
, ...)
2206 METHOD_TRACE("copy_info", 1);
2208 va_start(args
, fmt
);
2209 len
= vsprintf(buf
, fmt
, args
);
2212 copy_mem_info(info
, buf
, len
);
2217 /****************************************************************************/
2219 /* Routine Name: ips_identify_controller */
2221 /* Routine Description: */
2223 /* Identify this controller */
2225 /****************************************************************************/
2227 ips_identify_controller(ips_ha_t
* ha
)
2229 METHOD_TRACE("ips_identify_controller", 1);
2231 switch (ha
->pcidev
->device
) {
2232 case IPS_DEVICEID_COPPERHEAD
:
2233 if (ha
->pcidev
->revision
<= IPS_REVID_SERVERAID
) {
2234 ha
->ad_type
= IPS_ADTYPE_SERVERAID
;
2235 } else if (ha
->pcidev
->revision
== IPS_REVID_SERVERAID2
) {
2236 ha
->ad_type
= IPS_ADTYPE_SERVERAID2
;
2237 } else if (ha
->pcidev
->revision
== IPS_REVID_NAVAJO
) {
2238 ha
->ad_type
= IPS_ADTYPE_NAVAJO
;
2239 } else if ((ha
->pcidev
->revision
== IPS_REVID_SERVERAID2
)
2240 && (ha
->slot_num
== 0)) {
2241 ha
->ad_type
= IPS_ADTYPE_KIOWA
;
2242 } else if ((ha
->pcidev
->revision
>= IPS_REVID_CLARINETP1
) &&
2243 (ha
->pcidev
->revision
<= IPS_REVID_CLARINETP3
)) {
2244 if (ha
->enq
->ucMaxPhysicalDevices
== 15)
2245 ha
->ad_type
= IPS_ADTYPE_SERVERAID3L
;
2247 ha
->ad_type
= IPS_ADTYPE_SERVERAID3
;
2248 } else if ((ha
->pcidev
->revision
>= IPS_REVID_TROMBONE32
) &&
2249 (ha
->pcidev
->revision
<= IPS_REVID_TROMBONE64
)) {
2250 ha
->ad_type
= IPS_ADTYPE_SERVERAID4H
;
2254 case IPS_DEVICEID_MORPHEUS
:
2255 switch (ha
->pcidev
->subsystem_device
) {
2256 case IPS_SUBDEVICEID_4L
:
2257 ha
->ad_type
= IPS_ADTYPE_SERVERAID4L
;
2260 case IPS_SUBDEVICEID_4M
:
2261 ha
->ad_type
= IPS_ADTYPE_SERVERAID4M
;
2264 case IPS_SUBDEVICEID_4MX
:
2265 ha
->ad_type
= IPS_ADTYPE_SERVERAID4MX
;
2268 case IPS_SUBDEVICEID_4LX
:
2269 ha
->ad_type
= IPS_ADTYPE_SERVERAID4LX
;
2272 case IPS_SUBDEVICEID_5I2
:
2273 ha
->ad_type
= IPS_ADTYPE_SERVERAID5I2
;
2276 case IPS_SUBDEVICEID_5I1
:
2277 ha
->ad_type
= IPS_ADTYPE_SERVERAID5I1
;
2283 case IPS_DEVICEID_MARCO
:
2284 switch (ha
->pcidev
->subsystem_device
) {
2285 case IPS_SUBDEVICEID_6M
:
2286 ha
->ad_type
= IPS_ADTYPE_SERVERAID6M
;
2288 case IPS_SUBDEVICEID_6I
:
2289 ha
->ad_type
= IPS_ADTYPE_SERVERAID6I
;
2291 case IPS_SUBDEVICEID_7k
:
2292 ha
->ad_type
= IPS_ADTYPE_SERVERAID7k
;
2294 case IPS_SUBDEVICEID_7M
:
2295 ha
->ad_type
= IPS_ADTYPE_SERVERAID7M
;
2302 /****************************************************************************/
2304 /* Routine Name: ips_get_bios_version */
2306 /* Routine Description: */
2308 /* Get the BIOS revision number */
2310 /****************************************************************************/
2312 ips_get_bios_version(ips_ha_t
* ha
, int intr
)
2321 { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2324 METHOD_TRACE("ips_get_bios_version", 1);
2329 strncpy(ha
->bios_version
, " ?", 8);
2331 if (ha
->pcidev
->device
== IPS_DEVICEID_COPPERHEAD
) {
2332 if (IPS_USE_MEMIO(ha
)) {
2333 /* Memory Mapped I/O */
2336 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
2337 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2338 udelay(25); /* 25 us */
2340 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0x55)
2343 writel(1, ha
->mem_ptr
+ IPS_REG_FLAP
);
2344 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2345 udelay(25); /* 25 us */
2347 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0xAA)
2350 /* Get Major version */
2351 writel(0x1FF, ha
->mem_ptr
+ IPS_REG_FLAP
);
2352 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2353 udelay(25); /* 25 us */
2355 major
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2357 /* Get Minor version */
2358 writel(0x1FE, ha
->mem_ptr
+ IPS_REG_FLAP
);
2359 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2360 udelay(25); /* 25 us */
2361 minor
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2363 /* Get SubMinor version */
2364 writel(0x1FD, ha
->mem_ptr
+ IPS_REG_FLAP
);
2365 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2366 udelay(25); /* 25 us */
2367 subminor
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2370 /* Programmed I/O */
2373 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
2374 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2375 udelay(25); /* 25 us */
2377 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0x55)
2380 outl(cpu_to_le32(1), ha
->io_addr
+ IPS_REG_FLAP
);
2381 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2382 udelay(25); /* 25 us */
2384 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0xAA)
2387 /* Get Major version */
2388 outl(cpu_to_le32(0x1FF), ha
->io_addr
+ IPS_REG_FLAP
);
2389 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2390 udelay(25); /* 25 us */
2392 major
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2394 /* Get Minor version */
2395 outl(cpu_to_le32(0x1FE), ha
->io_addr
+ IPS_REG_FLAP
);
2396 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2397 udelay(25); /* 25 us */
2399 minor
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2401 /* Get SubMinor version */
2402 outl(cpu_to_le32(0x1FD), ha
->io_addr
+ IPS_REG_FLAP
);
2403 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2404 udelay(25); /* 25 us */
2406 subminor
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2410 /* Morpheus Family - Send Command to the card */
2412 buffer
= ha
->ioctl_data
;
2414 memset(buffer
, 0, 0x1000);
2416 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
2418 ips_init_scb(ha
, scb
);
2420 scb
->timeout
= ips_cmd_timeout
;
2421 scb
->cdb
[0] = IPS_CMD_RW_BIOSFW
;
2423 scb
->cmd
.flashfw
.op_code
= IPS_CMD_RW_BIOSFW
;
2424 scb
->cmd
.flashfw
.command_id
= IPS_COMMAND_ID(ha
, scb
);
2425 scb
->cmd
.flashfw
.type
= 1;
2426 scb
->cmd
.flashfw
.direction
= 0;
2427 scb
->cmd
.flashfw
.count
= cpu_to_le32(0x800);
2428 scb
->cmd
.flashfw
.total_packets
= 1;
2429 scb
->cmd
.flashfw
.packet_num
= 0;
2430 scb
->data_len
= 0x1000;
2431 scb
->cmd
.flashfw
.buffer_addr
= ha
->ioctl_busaddr
;
2433 /* issue the command */
2435 ips_send_wait(ha
, scb
, ips_cmd_timeout
,
2436 intr
)) == IPS_FAILURE
)
2437 || (ret
== IPS_SUCCESS_IMM
)
2438 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
2439 /* Error occurred */
2444 if ((buffer
[0xC0] == 0x55) && (buffer
[0xC1] == 0xAA)) {
2445 major
= buffer
[0x1ff + 0xC0]; /* Offset 0x1ff after the header (0xc0) */
2446 minor
= buffer
[0x1fe + 0xC0]; /* Offset 0x1fe after the header (0xc0) */
2447 subminor
= buffer
[0x1fd + 0xC0]; /* Offset 0x1fd after the header (0xc0) */
2453 ha
->bios_version
[0] = hexDigits
[(major
& 0xF0) >> 4];
2454 ha
->bios_version
[1] = '.';
2455 ha
->bios_version
[2] = hexDigits
[major
& 0x0F];
2456 ha
->bios_version
[3] = hexDigits
[subminor
];
2457 ha
->bios_version
[4] = '.';
2458 ha
->bios_version
[5] = hexDigits
[(minor
& 0xF0) >> 4];
2459 ha
->bios_version
[6] = hexDigits
[minor
& 0x0F];
2460 ha
->bios_version
[7] = 0;
2463 /****************************************************************************/
2465 /* Routine Name: ips_hainit */
2467 /* Routine Description: */
2469 /* Initialize the controller */
2471 /* NOTE: Assumes to be called from with a lock */
2473 /****************************************************************************/
2475 ips_hainit(ips_ha_t
* ha
)
2480 METHOD_TRACE("ips_hainit", 1);
2485 if (ha
->func
.statinit
)
2486 (*ha
->func
.statinit
) (ha
);
2488 if (ha
->func
.enableint
)
2489 (*ha
->func
.enableint
) (ha
);
2492 ha
->reset_count
= 1;
2493 do_gettimeofday(&tv
);
2494 ha
->last_ffdc
= tv
.tv_sec
;
2495 ips_ffdc_reset(ha
, IPS_INTR_IORL
);
2497 if (!ips_read_config(ha
, IPS_INTR_IORL
)) {
2498 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2499 "unable to read config from controller.\n");
2504 if (!ips_read_adapter_status(ha
, IPS_INTR_IORL
)) {
2505 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2506 "unable to read controller status.\n");
2511 /* Identify this controller */
2512 ips_identify_controller(ha
);
2514 if (!ips_read_subsystem_parameters(ha
, IPS_INTR_IORL
)) {
2515 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2516 "unable to read subsystem parameters.\n");
2521 /* write nvram user page 5 */
2522 if (!ips_write_driver_status(ha
, IPS_INTR_IORL
)) {
2523 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2524 "unable to write driver info to controller.\n");
2529 /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2530 if ((ha
->conf
->ucLogDriveCount
> 0) && (ha
->requires_esl
== 1))
2531 ips_clear_adapter(ha
, IPS_INTR_IORL
);
2533 /* set limits on SID, LUN, BUS */
2534 ha
->ntargets
= IPS_MAX_TARGETS
+ 1;
2536 ha
->nbus
= (ha
->enq
->ucMaxPhysicalDevices
/ IPS_MAX_TARGETS
) + 1;
2538 switch (ha
->conf
->logical_drive
[0].ucStripeSize
) {
2540 ha
->max_xfer
= 0x10000;
2544 ha
->max_xfer
= 0x20000;
2548 ha
->max_xfer
= 0x40000;
2553 ha
->max_xfer
= 0x80000;
2557 /* setup max concurrent commands */
2558 if (le32_to_cpu(ha
->subsys
->param
[4]) & 0x1) {
2559 /* Use the new method */
2560 ha
->max_cmds
= ha
->enq
->ucConcurrentCmdCount
;
2562 /* use the old method */
2563 switch (ha
->conf
->logical_drive
[0].ucStripeSize
) {
2583 /* Limit the Active Commands on a Lite Adapter */
2584 if ((ha
->ad_type
== IPS_ADTYPE_SERVERAID3L
) ||
2585 (ha
->ad_type
== IPS_ADTYPE_SERVERAID4L
) ||
2586 (ha
->ad_type
== IPS_ADTYPE_SERVERAID4LX
)) {
2587 if ((ha
->max_cmds
> MaxLiteCmds
) && (MaxLiteCmds
))
2588 ha
->max_cmds
= MaxLiteCmds
;
2591 /* set controller IDs */
2592 ha
->ha_id
[0] = IPS_ADAPTER_ID
;
2593 for (i
= 1; i
< ha
->nbus
; i
++) {
2594 ha
->ha_id
[i
] = ha
->conf
->init_id
[i
- 1] & 0x1f;
2595 ha
->dcdb_active
[i
- 1] = 0;
2601 /****************************************************************************/
2603 /* Routine Name: ips_next */
2605 /* Routine Description: */
2607 /* Take the next command off the queue and send it to the controller */
2609 /****************************************************************************/
2611 ips_next(ips_ha_t
* ha
, int intr
)
2614 struct scsi_cmnd
*SC
;
2615 struct scsi_cmnd
*p
;
2616 struct scsi_cmnd
*q
;
2617 ips_copp_wait_item_t
*item
;
2619 struct Scsi_Host
*host
;
2620 METHOD_TRACE("ips_next", 1);
2624 host
= ips_sh
[ha
->host_num
];
2626 * Block access to the queue function so
2627 * this command won't time out
2629 if (intr
== IPS_INTR_ON
)
2630 spin_lock(host
->host_lock
);
2632 if ((ha
->subsys
->param
[3] & 0x300000)
2633 && (ha
->scb_activelist
.count
== 0)) {
2636 do_gettimeofday(&tv
);
2638 if (tv
.tv_sec
- ha
->last_ffdc
> IPS_SECS_8HOURS
) {
2639 ha
->last_ffdc
= tv
.tv_sec
;
2645 * Send passthru commands
2646 * These have priority over normal I/O
2647 * but shouldn't affect performance too much
2648 * since we limit the number that can be active
2649 * on the card at any one time
2651 while ((ha
->num_ioctl
< IPS_MAX_IOCTL
) &&
2652 (ha
->copp_waitlist
.head
) && (scb
= ips_getscb(ha
))) {
2654 item
= ips_removeq_copp_head(&ha
->copp_waitlist
);
2656 if (intr
== IPS_INTR_ON
)
2657 spin_unlock(host
->host_lock
);
2658 scb
->scsi_cmd
= item
->scsi_cmd
;
2661 ret
= ips_make_passthru(ha
, scb
->scsi_cmd
, scb
, intr
);
2663 if (intr
== IPS_INTR_ON
)
2664 spin_lock(host
->host_lock
);
2667 if (scb
->scsi_cmd
) {
2668 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2669 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2672 ips_freescb(ha
, scb
);
2674 case IPS_SUCCESS_IMM
:
2675 if (scb
->scsi_cmd
) {
2676 scb
->scsi_cmd
->result
= DID_OK
<< 16;
2677 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2680 ips_freescb(ha
, scb
);
2686 if (ret
!= IPS_SUCCESS
) {
2691 ret
= ips_send_cmd(ha
, scb
);
2693 if (ret
== IPS_SUCCESS
)
2694 ips_putq_scb_head(&ha
->scb_activelist
, scb
);
2700 if (scb
->scsi_cmd
) {
2701 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2704 ips_freescb(ha
, scb
);
2706 case IPS_SUCCESS_IMM
:
2707 ips_freescb(ha
, scb
);
2716 * Send "Normal" I/O commands
2719 p
= ha
->scb_waitlist
.head
;
2720 while ((p
) && (scb
= ips_getscb(ha
))) {
2721 if ((scmd_channel(p
) > 0)
2723 dcdb_active
[scmd_channel(p
) -
2724 1] & (1 << scmd_id(p
)))) {
2725 ips_freescb(ha
, scb
);
2726 p
= (struct scsi_cmnd
*) p
->host_scribble
;
2731 SC
= ips_removeq_wait(&ha
->scb_waitlist
, q
);
2733 if (intr
== IPS_INTR_ON
)
2734 spin_unlock(host
->host_lock
); /* Unlock HA after command is taken off queue */
2736 SC
->result
= DID_OK
;
2737 SC
->host_scribble
= NULL
;
2739 memset(SC
->sense_buffer
, 0, sizeof (SC
->sense_buffer
));
2741 scb
->target_id
= SC
->device
->id
;
2742 scb
->lun
= SC
->device
->lun
;
2743 scb
->bus
= SC
->device
->channel
;
2747 scb
->callback
= ipsintr_done
;
2748 scb
->timeout
= ips_cmd_timeout
;
2749 memset(&scb
->cmd
, 0, 16);
2751 /* copy in the CDB */
2752 memcpy(scb
->cdb
, SC
->cmnd
, SC
->cmd_len
);
2754 scb
->sg_count
= scsi_dma_map(SC
);
2755 BUG_ON(scb
->sg_count
< 0);
2756 if (scb
->sg_count
) {
2757 struct scatterlist
*sg
;
2760 scb
->flags
|= IPS_SCB_MAP_SG
;
2762 scsi_for_each_sg(SC
, sg
, scb
->sg_count
, i
) {
2763 if (ips_fill_scb_sg_single
2764 (ha
, sg_dma_address(sg
), scb
, i
,
2765 sg_dma_len(sg
)) < 0)
2768 scb
->dcdb
.transfer_length
= scb
->data_len
;
2770 scb
->data_busaddr
= 0L;
2773 scb
->dcdb
.transfer_length
= 0;
2776 scb
->dcdb
.cmd_attribute
=
2777 ips_command_direction
[scb
->scsi_cmd
->cmnd
[0]];
2779 /* Allow a WRITE BUFFER Command to Have no Data */
2780 /* This is Used by Tape Flash Utilites */
2781 if ((scb
->scsi_cmd
->cmnd
[0] == WRITE_BUFFER
) &&
2782 (scb
->data_len
== 0))
2783 scb
->dcdb
.cmd_attribute
= 0;
2785 if (!(scb
->dcdb
.cmd_attribute
& 0x3))
2786 scb
->dcdb
.transfer_length
= 0;
2788 if (scb
->data_len
>= IPS_MAX_XFER
) {
2789 scb
->dcdb
.cmd_attribute
|= IPS_TRANSFER64K
;
2790 scb
->dcdb
.transfer_length
= 0;
2792 if (intr
== IPS_INTR_ON
)
2793 spin_lock(host
->host_lock
);
2795 ret
= ips_send_cmd(ha
, scb
);
2799 ips_putq_scb_head(&ha
->scb_activelist
, scb
);
2802 if (scb
->scsi_cmd
) {
2803 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2804 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2808 ha
->dcdb_active
[scb
->bus
- 1] &=
2809 ~(1 << scb
->target_id
);
2811 ips_freescb(ha
, scb
);
2813 case IPS_SUCCESS_IMM
:
2815 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2818 ha
->dcdb_active
[scb
->bus
- 1] &=
2819 ~(1 << scb
->target_id
);
2821 ips_freescb(ha
, scb
);
2827 p
= (struct scsi_cmnd
*) p
->host_scribble
;
2831 if (intr
== IPS_INTR_ON
)
2832 spin_unlock(host
->host_lock
);
2835 /****************************************************************************/
2837 /* Routine Name: ips_putq_scb_head */
2839 /* Routine Description: */
2841 /* Add an item to the head of the queue */
2843 /* ASSUMED to be called from within the HA lock */
2845 /****************************************************************************/
2847 ips_putq_scb_head(ips_scb_queue_t
* queue
, ips_scb_t
* item
)
2849 METHOD_TRACE("ips_putq_scb_head", 1);
2854 item
->q_next
= queue
->head
;
2863 /****************************************************************************/
2865 /* Routine Name: ips_removeq_scb_head */
2867 /* Routine Description: */
2869 /* Remove the head of the queue */
2871 /* ASSUMED to be called from within the HA lock */
2873 /****************************************************************************/
2875 ips_removeq_scb_head(ips_scb_queue_t
* queue
)
2879 METHOD_TRACE("ips_removeq_scb_head", 1);
2887 queue
->head
= item
->q_next
;
2888 item
->q_next
= NULL
;
2890 if (queue
->tail
== item
)
2898 /****************************************************************************/
2900 /* Routine Name: ips_removeq_scb */
2902 /* Routine Description: */
2904 /* Remove an item from a queue */
2906 /* ASSUMED to be called from within the HA lock */
2908 /****************************************************************************/
2910 ips_removeq_scb(ips_scb_queue_t
* queue
, ips_scb_t
* item
)
2914 METHOD_TRACE("ips_removeq_scb", 1);
2919 if (item
== queue
->head
) {
2920 return (ips_removeq_scb_head(queue
));
2925 while ((p
) && (item
!= p
->q_next
))
2930 p
->q_next
= item
->q_next
;
2935 item
->q_next
= NULL
;
2944 /****************************************************************************/
2946 /* Routine Name: ips_putq_wait_tail */
2948 /* Routine Description: */
2950 /* Add an item to the tail of the queue */
2952 /* ASSUMED to be called from within the HA lock */
2954 /****************************************************************************/
2955 static void ips_putq_wait_tail(ips_wait_queue_t
*queue
, struct scsi_cmnd
*item
)
2957 METHOD_TRACE("ips_putq_wait_tail", 1);
2962 item
->host_scribble
= NULL
;
2965 queue
->tail
->host_scribble
= (char *) item
;
2975 /****************************************************************************/
2977 /* Routine Name: ips_removeq_wait_head */
2979 /* Routine Description: */
2981 /* Remove the head of the queue */
2983 /* ASSUMED to be called from within the HA lock */
2985 /****************************************************************************/
2986 static struct scsi_cmnd
*ips_removeq_wait_head(ips_wait_queue_t
*queue
)
2988 struct scsi_cmnd
*item
;
2990 METHOD_TRACE("ips_removeq_wait_head", 1);
2998 queue
->head
= (struct scsi_cmnd
*) item
->host_scribble
;
2999 item
->host_scribble
= NULL
;
3001 if (queue
->tail
== item
)
3009 /****************************************************************************/
3011 /* Routine Name: ips_removeq_wait */
3013 /* Routine Description: */
3015 /* Remove an item from a queue */
3017 /* ASSUMED to be called from within the HA lock */
3019 /****************************************************************************/
3020 static struct scsi_cmnd
*ips_removeq_wait(ips_wait_queue_t
*queue
,
3021 struct scsi_cmnd
*item
)
3023 struct scsi_cmnd
*p
;
3025 METHOD_TRACE("ips_removeq_wait", 1);
3030 if (item
== queue
->head
) {
3031 return (ips_removeq_wait_head(queue
));
3036 while ((p
) && (item
!= (struct scsi_cmnd
*) p
->host_scribble
))
3037 p
= (struct scsi_cmnd
*) p
->host_scribble
;
3041 p
->host_scribble
= item
->host_scribble
;
3043 if (!item
->host_scribble
)
3046 item
->host_scribble
= NULL
;
3055 /****************************************************************************/
3057 /* Routine Name: ips_putq_copp_tail */
3059 /* Routine Description: */
3061 /* Add an item to the tail of the queue */
3063 /* ASSUMED to be called from within the HA lock */
3065 /****************************************************************************/
3067 ips_putq_copp_tail(ips_copp_queue_t
* queue
, ips_copp_wait_item_t
* item
)
3069 METHOD_TRACE("ips_putq_copp_tail", 1);
3077 queue
->tail
->next
= item
;
3087 /****************************************************************************/
3089 /* Routine Name: ips_removeq_copp_head */
3091 /* Routine Description: */
3093 /* Remove the head of the queue */
3095 /* ASSUMED to be called from within the HA lock */
3097 /****************************************************************************/
3098 static ips_copp_wait_item_t
*
3099 ips_removeq_copp_head(ips_copp_queue_t
* queue
)
3101 ips_copp_wait_item_t
*item
;
3103 METHOD_TRACE("ips_removeq_copp_head", 1);
3111 queue
->head
= item
->next
;
3114 if (queue
->tail
== item
)
3122 /****************************************************************************/
3124 /* Routine Name: ips_removeq_copp */
3126 /* Routine Description: */
3128 /* Remove an item from a queue */
3130 /* ASSUMED to be called from within the HA lock */
3132 /****************************************************************************/
3133 static ips_copp_wait_item_t
*
3134 ips_removeq_copp(ips_copp_queue_t
* queue
, ips_copp_wait_item_t
* item
)
3136 ips_copp_wait_item_t
*p
;
3138 METHOD_TRACE("ips_removeq_copp", 1);
3143 if (item
== queue
->head
) {
3144 return (ips_removeq_copp_head(queue
));
3149 while ((p
) && (item
!= p
->next
))
3154 p
->next
= item
->next
;
3168 /****************************************************************************/
3170 /* Routine Name: ipsintr_blocking */
3172 /* Routine Description: */
3174 /* Finalize an interrupt for internal commands */
3176 /****************************************************************************/
3178 ipsintr_blocking(ips_ha_t
* ha
, ips_scb_t
* scb
)
3180 METHOD_TRACE("ipsintr_blocking", 2);
3182 ips_freescb(ha
, scb
);
3183 if ((ha
->waitflag
== TRUE
) && (ha
->cmd_in_progress
== scb
->cdb
[0])) {
3184 ha
->waitflag
= FALSE
;
3190 /****************************************************************************/
3192 /* Routine Name: ipsintr_done */
3194 /* Routine Description: */
3196 /* Finalize an interrupt for non-internal commands */
3198 /****************************************************************************/
3200 ipsintr_done(ips_ha_t
* ha
, ips_scb_t
* scb
)
3202 METHOD_TRACE("ipsintr_done", 2);
3205 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
3206 "Spurious interrupt; scb NULL.\n");
3211 if (scb
->scsi_cmd
== NULL
) {
3212 /* unexpected interrupt */
3213 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
3214 "Spurious interrupt; scsi_cmd not set.\n");
3222 /****************************************************************************/
3224 /* Routine Name: ips_done */
3226 /* Routine Description: */
3228 /* Do housekeeping on completed commands */
3229 /* ASSUMED to be called form within the request lock */
3230 /****************************************************************************/
3232 ips_done(ips_ha_t
* ha
, ips_scb_t
* scb
)
3236 METHOD_TRACE("ips_done", 1);
3241 if ((scb
->scsi_cmd
) && (ips_is_passthru(scb
->scsi_cmd
))) {
3242 ips_cleanup_passthru(ha
, scb
);
3246 * Check to see if this command had too much
3247 * data and had to be broke up. If so, queue
3248 * the rest of the data and continue.
3250 if ((scb
->breakup
) || (scb
->sg_break
)) {
3251 struct scatterlist
*sg
;
3252 int i
, sg_dma_index
, ips_sg_index
= 0;
3254 /* we had a data breakup */
3257 sg
= scsi_sglist(scb
->scsi_cmd
);
3259 /* Spin forward to last dma chunk */
3260 sg_dma_index
= scb
->breakup
;
3261 for (i
= 0; i
< scb
->breakup
; i
++)
3264 /* Take care of possible partial on last chunk */
3265 ips_fill_scb_sg_single(ha
,
3267 scb
, ips_sg_index
++,
3270 for (; sg_dma_index
< scsi_sg_count(scb
->scsi_cmd
);
3271 sg_dma_index
++, sg
= sg_next(sg
)) {
3272 if (ips_fill_scb_sg_single
3275 scb
, ips_sg_index
++,
3276 sg_dma_len(sg
)) < 0)
3280 scb
->dcdb
.transfer_length
= scb
->data_len
;
3281 scb
->dcdb
.cmd_attribute
|=
3282 ips_command_direction
[scb
->scsi_cmd
->cmnd
[0]];
3284 if (!(scb
->dcdb
.cmd_attribute
& 0x3))
3285 scb
->dcdb
.transfer_length
= 0;
3287 if (scb
->data_len
>= IPS_MAX_XFER
) {
3288 scb
->dcdb
.cmd_attribute
|= IPS_TRANSFER64K
;
3289 scb
->dcdb
.transfer_length
= 0;
3292 ret
= ips_send_cmd(ha
, scb
);
3296 if (scb
->scsi_cmd
) {
3297 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3298 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3301 ips_freescb(ha
, scb
);
3303 case IPS_SUCCESS_IMM
:
3304 if (scb
->scsi_cmd
) {
3305 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3306 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3309 ips_freescb(ha
, scb
);
3317 } /* end if passthru */
3320 ha
->dcdb_active
[scb
->bus
- 1] &= ~(1 << scb
->target_id
);
3323 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3325 ips_freescb(ha
, scb
);
3328 /****************************************************************************/
3330 /* Routine Name: ips_map_status */
3332 /* Routine Description: */
3334 /* Map Controller Error codes to Linux Error Codes */
3336 /****************************************************************************/
3338 ips_map_status(ips_ha_t
* ha
, ips_scb_t
* scb
, ips_stat_t
* sp
)
3342 uint32_t transfer_len
;
3343 IPS_DCDB_TABLE_TAPE
*tapeDCDB
;
3344 IPS_SCSI_INQ_DATA inquiryData
;
3346 METHOD_TRACE("ips_map_status", 1);
3350 "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3351 ips_name
, ha
->host_num
,
3352 scb
->scsi_cmd
->device
->channel
,
3353 scb
->scsi_cmd
->device
->id
, scb
->scsi_cmd
->device
->lun
,
3354 scb
->basic_status
, scb
->extended_status
,
3355 scb
->extended_status
==
3356 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[2] & 0xf : 0,
3357 scb
->extended_status
==
3358 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[12] : 0,
3359 scb
->extended_status
==
3360 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[13] : 0);
3363 /* default driver error */
3364 errcode
= DID_ERROR
;
3367 switch (scb
->basic_status
& IPS_GSC_STATUS_MASK
) {
3368 case IPS_CMD_TIMEOUT
:
3369 errcode
= DID_TIME_OUT
;
3372 case IPS_INVAL_OPCO
:
3373 case IPS_INVAL_CMD_BLK
:
3374 case IPS_INVAL_PARM_BLK
:
3376 case IPS_CMD_CMPLT_WERROR
:
3379 case IPS_PHYS_DRV_ERROR
:
3380 switch (scb
->extended_status
) {
3381 case IPS_ERR_SEL_TO
:
3383 errcode
= DID_NO_CONNECT
;
3387 case IPS_ERR_OU_RUN
:
3388 if ((scb
->cmd
.dcdb
.op_code
== IPS_CMD_EXTENDED_DCDB
) ||
3389 (scb
->cmd
.dcdb
.op_code
==
3390 IPS_CMD_EXTENDED_DCDB_SG
)) {
3391 tapeDCDB
= (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
;
3392 transfer_len
= tapeDCDB
->transfer_length
;
3395 (uint32_t) scb
->dcdb
.transfer_length
;
3398 if ((scb
->bus
) && (transfer_len
< scb
->data_len
)) {
3399 /* Underrun - set default to no error */
3402 /* Restrict access to physical DASD */
3403 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
3404 ips_scmd_buf_read(scb
->scsi_cmd
,
3405 &inquiryData
, sizeof (inquiryData
));
3406 if ((inquiryData
.DeviceType
& 0x1f) == TYPE_DISK
) {
3407 errcode
= DID_TIME_OUT
;
3412 errcode
= DID_ERROR
;
3416 case IPS_ERR_RECOVERY
:
3417 /* don't fail recovered errors */
3423 case IPS_ERR_HOST_RESET
:
3424 case IPS_ERR_DEV_RESET
:
3425 errcode
= DID_RESET
;
3428 case IPS_ERR_CKCOND
:
3430 if ((scb
->cmd
.dcdb
.op_code
==
3431 IPS_CMD_EXTENDED_DCDB
)
3432 || (scb
->cmd
.dcdb
.op_code
==
3433 IPS_CMD_EXTENDED_DCDB_SG
)) {
3435 (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
;
3436 memcpy(scb
->scsi_cmd
->sense_buffer
,
3437 tapeDCDB
->sense_info
,
3438 sizeof (scb
->scsi_cmd
->
3441 memcpy(scb
->scsi_cmd
->sense_buffer
,
3442 scb
->dcdb
.sense_info
,
3443 sizeof (scb
->scsi_cmd
->
3446 device_error
= 2; /* check condition */
3454 errcode
= DID_ERROR
;
3460 scb
->scsi_cmd
->result
= device_error
| (errcode
<< 16);
3465 /****************************************************************************/
3467 /* Routine Name: ips_send_wait */
3469 /* Routine Description: */
3471 /* Send a command to the controller and wait for it to return */
3473 /* The FFDC Time Stamp use this function for the callback, but doesn't */
3474 /* actually need to wait. */
3475 /****************************************************************************/
3477 ips_send_wait(ips_ha_t
* ha
, ips_scb_t
* scb
, int timeout
, int intr
)
3481 METHOD_TRACE("ips_send_wait", 1);
3483 if (intr
!= IPS_FFDC
) { /* Won't be Waiting if this is a Time Stamp */
3484 ha
->waitflag
= TRUE
;
3485 ha
->cmd_in_progress
= scb
->cdb
[0];
3487 scb
->callback
= ipsintr_blocking
;
3488 ret
= ips_send_cmd(ha
, scb
);
3490 if ((ret
== IPS_FAILURE
) || (ret
== IPS_SUCCESS_IMM
))
3493 if (intr
!= IPS_FFDC
) /* Don't Wait around if this is a Time Stamp */
3494 ret
= ips_wait(ha
, timeout
, intr
);
3499 /****************************************************************************/
3501 /* Routine Name: ips_scmd_buf_write */
3503 /* Routine Description: */
3504 /* Write data to struct scsi_cmnd request_buffer at proper offsets */
3505 /****************************************************************************/
3507 ips_scmd_buf_write(struct scsi_cmnd
*scmd
, void *data
, unsigned int count
)
3510 unsigned int min_cnt
, xfer_cnt
;
3511 char *cdata
= (char *) data
;
3512 unsigned char *buffer
;
3513 unsigned long flags
;
3514 struct scatterlist
*sg
= scsi_sglist(scmd
);
3516 for (i
= 0, xfer_cnt
= 0;
3517 (i
< scsi_sg_count(scmd
)) && (xfer_cnt
< count
); i
++) {
3518 min_cnt
= min(count
- xfer_cnt
, sg
[i
].length
);
3520 /* kmap_atomic() ensures addressability of the data buffer.*/
3521 /* local_irq_save() protects the KM_IRQ0 address slot. */
3522 local_irq_save(flags
);
3523 buffer
= kmap_atomic(sg_page(&sg
[i
]), KM_IRQ0
) + sg
[i
].offset
;
3524 memcpy(buffer
, &cdata
[xfer_cnt
], min_cnt
);
3525 kunmap_atomic(buffer
- sg
[i
].offset
, KM_IRQ0
);
3526 local_irq_restore(flags
);
3528 xfer_cnt
+= min_cnt
;
3532 /****************************************************************************/
3534 /* Routine Name: ips_scmd_buf_read */
3536 /* Routine Description: */
3537 /* Copy data from a struct scsi_cmnd to a new, linear buffer */
3538 /****************************************************************************/
3540 ips_scmd_buf_read(struct scsi_cmnd
*scmd
, void *data
, unsigned int count
)
3543 unsigned int min_cnt
, xfer_cnt
;
3544 char *cdata
= (char *) data
;
3545 unsigned char *buffer
;
3546 unsigned long flags
;
3547 struct scatterlist
*sg
= scsi_sglist(scmd
);
3549 for (i
= 0, xfer_cnt
= 0;
3550 (i
< scsi_sg_count(scmd
)) && (xfer_cnt
< count
); i
++) {
3551 min_cnt
= min(count
- xfer_cnt
, sg
[i
].length
);
3553 /* kmap_atomic() ensures addressability of the data buffer.*/
3554 /* local_irq_save() protects the KM_IRQ0 address slot. */
3555 local_irq_save(flags
);
3556 buffer
= kmap_atomic(sg_page(&sg
[i
]), KM_IRQ0
) + sg
[i
].offset
;
3557 memcpy(&cdata
[xfer_cnt
], buffer
, min_cnt
);
3558 kunmap_atomic(buffer
- sg
[i
].offset
, KM_IRQ0
);
3559 local_irq_restore(flags
);
3561 xfer_cnt
+= min_cnt
;
3565 /****************************************************************************/
3567 /* Routine Name: ips_send_cmd */
3569 /* Routine Description: */
3571 /* Map SCSI commands to ServeRAID commands for logical drives */
3573 /****************************************************************************/
3575 ips_send_cmd(ips_ha_t
* ha
, ips_scb_t
* scb
)
3580 IPS_DCDB_TABLE_TAPE
*tapeDCDB
;
3583 METHOD_TRACE("ips_send_cmd", 1);
3587 if (!scb
->scsi_cmd
) {
3588 /* internal command */
3591 /* Controller commands can't be issued */
3592 /* to real devices -- fail them */
3593 if ((ha
->waitflag
== TRUE
) &&
3594 (ha
->cmd_in_progress
== scb
->cdb
[0])) {
3595 ha
->waitflag
= FALSE
;
3600 } else if ((scb
->bus
== 0) && (!ips_is_passthru(scb
->scsi_cmd
))) {
3601 /* command to logical bus -- interpret */
3602 ret
= IPS_SUCCESS_IMM
;
3604 switch (scb
->scsi_cmd
->cmnd
[0]) {
3605 case ALLOW_MEDIUM_REMOVAL
:
3608 case WRITE_FILEMARKS
:
3610 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3614 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3616 case TEST_UNIT_READY
:
3618 if (scb
->target_id
== IPS_ADAPTER_ID
) {
3620 * Either we have a TUR
3621 * or we have a SCSI inquiry
3623 if (scb
->scsi_cmd
->cmnd
[0] == TEST_UNIT_READY
)
3624 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3626 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
3627 IPS_SCSI_INQ_DATA inquiry
;
3630 sizeof (IPS_SCSI_INQ_DATA
));
3632 inquiry
.DeviceType
=
3633 IPS_SCSI_INQ_TYPE_PROCESSOR
;
3634 inquiry
.DeviceTypeQualifier
=
3635 IPS_SCSI_INQ_LU_CONNECTED
;
3636 inquiry
.Version
= IPS_SCSI_INQ_REV2
;
3637 inquiry
.ResponseDataFormat
=
3638 IPS_SCSI_INQ_RD_REV2
;
3639 inquiry
.AdditionalLength
= 31;
3641 IPS_SCSI_INQ_Address16
;
3643 IPS_SCSI_INQ_WBus16
|
3645 strncpy(inquiry
.VendorId
, "IBM ",
3647 strncpy(inquiry
.ProductId
,
3649 strncpy(inquiry
.ProductRevisionLevel
,
3652 ips_scmd_buf_write(scb
->scsi_cmd
,
3656 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3659 scb
->cmd
.logical_info
.op_code
= IPS_CMD_GET_LD_INFO
;
3660 scb
->cmd
.logical_info
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3661 scb
->cmd
.logical_info
.reserved
= 0;
3662 scb
->cmd
.logical_info
.reserved2
= 0;
3663 scb
->data_len
= sizeof (IPS_LD_INFO
);
3664 scb
->data_busaddr
= ha
->logical_drive_info_dma_addr
;
3666 scb
->cmd
.logical_info
.buffer_addr
= scb
->data_busaddr
;
3673 ips_reqsen(ha
, scb
);
3674 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3680 scb
->cmd
.basic_io
.op_code
=
3681 (scb
->scsi_cmd
->cmnd
[0] ==
3682 READ_6
) ? IPS_CMD_READ
: IPS_CMD_WRITE
;
3683 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3684 scb
->cmd
.basic_io
.sg_addr
=
3685 cpu_to_le32(scb
->data_busaddr
);
3687 scb
->cmd
.basic_io
.op_code
=
3688 (scb
->scsi_cmd
->cmnd
[0] ==
3689 READ_6
) ? IPS_CMD_READ_SG
:
3691 scb
->cmd
.basic_io
.enhanced_sg
=
3692 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3693 scb
->cmd
.basic_io
.sg_addr
=
3694 cpu_to_le32(scb
->sg_busaddr
);
3697 scb
->cmd
.basic_io
.segment_4G
= 0;
3698 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3699 scb
->cmd
.basic_io
.log_drv
= scb
->target_id
;
3700 scb
->cmd
.basic_io
.sg_count
= scb
->sg_len
;
3702 if (scb
->cmd
.basic_io
.lba
)
3703 scb
->cmd
.basic_io
.lba
=
3704 cpu_to_le32(le32_to_cpu
3705 (scb
->cmd
.basic_io
.lba
) +
3706 le16_to_cpu(scb
->cmd
.basic_io
.
3709 scb
->cmd
.basic_io
.lba
=
3711 cmnd
[1] & 0x1f) << 16) | (scb
->scsi_cmd
->
3713 (scb
->scsi_cmd
->cmnd
[3]));
3715 scb
->cmd
.basic_io
.sector_count
=
3716 cpu_to_le16(scb
->data_len
/ IPS_BLKSIZE
);
3718 if (le16_to_cpu(scb
->cmd
.basic_io
.sector_count
) == 0)
3719 scb
->cmd
.basic_io
.sector_count
=
3728 scb
->cmd
.basic_io
.op_code
=
3729 (scb
->scsi_cmd
->cmnd
[0] ==
3730 READ_10
) ? IPS_CMD_READ
: IPS_CMD_WRITE
;
3731 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3732 scb
->cmd
.basic_io
.sg_addr
=
3733 cpu_to_le32(scb
->data_busaddr
);
3735 scb
->cmd
.basic_io
.op_code
=
3736 (scb
->scsi_cmd
->cmnd
[0] ==
3737 READ_10
) ? IPS_CMD_READ_SG
:
3739 scb
->cmd
.basic_io
.enhanced_sg
=
3740 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3741 scb
->cmd
.basic_io
.sg_addr
=
3742 cpu_to_le32(scb
->sg_busaddr
);
3745 scb
->cmd
.basic_io
.segment_4G
= 0;
3746 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3747 scb
->cmd
.basic_io
.log_drv
= scb
->target_id
;
3748 scb
->cmd
.basic_io
.sg_count
= scb
->sg_len
;
3750 if (scb
->cmd
.basic_io
.lba
)
3751 scb
->cmd
.basic_io
.lba
=
3752 cpu_to_le32(le32_to_cpu
3753 (scb
->cmd
.basic_io
.lba
) +
3754 le16_to_cpu(scb
->cmd
.basic_io
.
3757 scb
->cmd
.basic_io
.lba
=
3758 ((scb
->scsi_cmd
->cmnd
[2] << 24) | (scb
->
3762 (scb
->scsi_cmd
->cmnd
[4] << 8) | scb
->
3765 scb
->cmd
.basic_io
.sector_count
=
3766 cpu_to_le16(scb
->data_len
/ IPS_BLKSIZE
);
3768 if (cpu_to_le16(scb
->cmd
.basic_io
.sector_count
) == 0) {
3770 * This is a null condition
3771 * we don't have to do anything
3774 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3782 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3786 scb
->cmd
.basic_io
.op_code
= IPS_CMD_ENQUIRY
;
3787 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3788 scb
->cmd
.basic_io
.segment_4G
= 0;
3789 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3790 scb
->data_len
= sizeof (*ha
->enq
);
3791 scb
->cmd
.basic_io
.sg_addr
= ha
->enq_busaddr
;
3796 scb
->cmd
.logical_info
.op_code
= IPS_CMD_GET_LD_INFO
;
3797 scb
->cmd
.logical_info
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3798 scb
->cmd
.logical_info
.reserved
= 0;
3799 scb
->cmd
.logical_info
.reserved2
= 0;
3800 scb
->cmd
.logical_info
.reserved3
= 0;
3801 scb
->data_len
= sizeof (IPS_LD_INFO
);
3802 scb
->data_busaddr
= ha
->logical_drive_info_dma_addr
;
3804 scb
->cmd
.logical_info
.buffer_addr
= scb
->data_busaddr
;
3808 case SEND_DIAGNOSTIC
:
3809 case REASSIGN_BLOCKS
:
3813 case READ_DEFECT_DATA
:
3816 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3820 /* Set the Return Info to appear like the Command was */
3821 /* attempted, a Check Condition occurred, and Sense */
3822 /* Data indicating an Invalid CDB OpCode is returned. */
3823 sp
= (char *) scb
->scsi_cmd
->sense_buffer
;
3824 memset(sp
, 0, sizeof (scb
->scsi_cmd
->sense_buffer
));
3826 sp
[0] = 0x70; /* Error Code */
3827 sp
[2] = ILLEGAL_REQUEST
; /* Sense Key 5 Illegal Req. */
3828 sp
[7] = 0x0A; /* Additional Sense Length */
3829 sp
[12] = 0x20; /* ASC = Invalid OpCode */
3830 sp
[13] = 0x00; /* ASCQ */
3832 device_error
= 2; /* Indicate Check Condition */
3833 scb
->scsi_cmd
->result
= device_error
| (DID_OK
<< 16);
3838 if (ret
== IPS_SUCCESS_IMM
)
3844 /* If we already know the Device is Not there, no need to attempt a Command */
3845 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3846 if (ha
->conf
->dev
[scb
->bus
- 1][scb
->target_id
].ucState
== 0) {
3847 scb
->scsi_cmd
->result
= DID_NO_CONNECT
<< 16;
3848 return (IPS_SUCCESS_IMM
);
3851 ha
->dcdb_active
[scb
->bus
- 1] |= (1 << scb
->target_id
);
3852 scb
->cmd
.dcdb
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3853 scb
->cmd
.dcdb
.dcdb_address
= cpu_to_le32(scb
->scb_busaddr
+
3854 (unsigned long) &scb
->
3856 (unsigned long) scb
);
3857 scb
->cmd
.dcdb
.reserved
= 0;
3858 scb
->cmd
.dcdb
.reserved2
= 0;
3859 scb
->cmd
.dcdb
.reserved3
= 0;
3860 scb
->cmd
.dcdb
.segment_4G
= 0;
3861 scb
->cmd
.dcdb
.enhanced_sg
= 0;
3863 TimeOut
= scb
->scsi_cmd
->timeout_per_command
;
3865 if (ha
->subsys
->param
[4] & 0x00100000) { /* If NEW Tape DCDB is Supported */
3867 scb
->cmd
.dcdb
.op_code
= IPS_CMD_EXTENDED_DCDB
;
3869 scb
->cmd
.dcdb
.op_code
=
3870 IPS_CMD_EXTENDED_DCDB_SG
;
3871 scb
->cmd
.dcdb
.enhanced_sg
=
3872 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3875 tapeDCDB
= (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
; /* Use Same Data Area as Old DCDB Struct */
3876 tapeDCDB
->device_address
=
3877 ((scb
->bus
- 1) << 4) | scb
->target_id
;
3878 tapeDCDB
->cmd_attribute
|= IPS_DISCONNECT_ALLOWED
;
3879 tapeDCDB
->cmd_attribute
&= ~IPS_TRANSFER64K
; /* Always Turn OFF 64K Size Flag */
3882 if (TimeOut
< (10 * HZ
))
3883 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT10
; /* TimeOut is 10 Seconds */
3884 else if (TimeOut
< (60 * HZ
))
3885 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT60
; /* TimeOut is 60 Seconds */
3886 else if (TimeOut
< (1200 * HZ
))
3887 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT20M
; /* TimeOut is 20 Minutes */
3890 tapeDCDB
->cdb_length
= scb
->scsi_cmd
->cmd_len
;
3891 tapeDCDB
->reserved_for_LUN
= 0;
3892 tapeDCDB
->transfer_length
= scb
->data_len
;
3893 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_EXTENDED_DCDB_SG
)
3894 tapeDCDB
->buffer_pointer
=
3895 cpu_to_le32(scb
->sg_busaddr
);
3897 tapeDCDB
->buffer_pointer
=
3898 cpu_to_le32(scb
->data_busaddr
);
3899 tapeDCDB
->sg_count
= scb
->sg_len
;
3900 tapeDCDB
->sense_length
= sizeof (tapeDCDB
->sense_info
);
3901 tapeDCDB
->scsi_status
= 0;
3902 tapeDCDB
->reserved
= 0;
3903 memcpy(tapeDCDB
->scsi_cdb
, scb
->scsi_cmd
->cmnd
,
3904 scb
->scsi_cmd
->cmd_len
);
3907 scb
->cmd
.dcdb
.op_code
= IPS_CMD_DCDB
;
3909 scb
->cmd
.dcdb
.op_code
= IPS_CMD_DCDB_SG
;
3910 scb
->cmd
.dcdb
.enhanced_sg
=
3911 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3914 scb
->dcdb
.device_address
=
3915 ((scb
->bus
- 1) << 4) | scb
->target_id
;
3916 scb
->dcdb
.cmd_attribute
|= IPS_DISCONNECT_ALLOWED
;
3919 if (TimeOut
< (10 * HZ
))
3920 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT10
; /* TimeOut is 10 Seconds */
3921 else if (TimeOut
< (60 * HZ
))
3922 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT60
; /* TimeOut is 60 Seconds */
3923 else if (TimeOut
< (1200 * HZ
))
3924 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT20M
; /* TimeOut is 20 Minutes */
3927 scb
->dcdb
.transfer_length
= scb
->data_len
;
3928 if (scb
->dcdb
.cmd_attribute
& IPS_TRANSFER64K
)
3929 scb
->dcdb
.transfer_length
= 0;
3930 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB_SG
)
3931 scb
->dcdb
.buffer_pointer
=
3932 cpu_to_le32(scb
->sg_busaddr
);
3934 scb
->dcdb
.buffer_pointer
=
3935 cpu_to_le32(scb
->data_busaddr
);
3936 scb
->dcdb
.cdb_length
= scb
->scsi_cmd
->cmd_len
;
3937 scb
->dcdb
.sense_length
= sizeof (scb
->dcdb
.sense_info
);
3938 scb
->dcdb
.sg_count
= scb
->sg_len
;
3939 scb
->dcdb
.reserved
= 0;
3940 memcpy(scb
->dcdb
.scsi_cdb
, scb
->scsi_cmd
->cmnd
,
3941 scb
->scsi_cmd
->cmd_len
);
3942 scb
->dcdb
.scsi_status
= 0;
3943 scb
->dcdb
.reserved2
[0] = 0;
3944 scb
->dcdb
.reserved2
[1] = 0;
3945 scb
->dcdb
.reserved2
[2] = 0;
3949 return ((*ha
->func
.issue
) (ha
, scb
));
3952 /****************************************************************************/
3954 /* Routine Name: ips_chk_status */
3956 /* Routine Description: */
3958 /* Check the status of commands to logical drives */
3959 /* Assumed to be called with the HA lock */
3960 /****************************************************************************/
3962 ips_chkstatus(ips_ha_t
* ha
, IPS_STATUS
* pstatus
)
3966 uint8_t basic_status
;
3969 IPS_SCSI_INQ_DATA inquiryData
;
3971 METHOD_TRACE("ips_chkstatus", 1);
3973 scb
= &ha
->scbs
[pstatus
->fields
.command_id
];
3974 scb
->basic_status
= basic_status
=
3975 pstatus
->fields
.basic_status
& IPS_BASIC_STATUS_MASK
;
3976 scb
->extended_status
= ext_status
= pstatus
->fields
.extended_status
;
3979 sp
->residue_len
= 0;
3980 sp
->scb_addr
= (void *) scb
;
3982 /* Remove the item from the active queue */
3983 ips_removeq_scb(&ha
->scb_activelist
, scb
);
3986 /* internal commands are handled in do_ipsintr */
3989 DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3993 scb
->cmd
.basic_io
.command_id
,
3994 scb
->bus
, scb
->target_id
, scb
->lun
);
3996 if ((scb
->scsi_cmd
) && (ips_is_passthru(scb
->scsi_cmd
)))
3997 /* passthru - just returns the raw result */
4002 if (((basic_status
& IPS_GSC_STATUS_MASK
) == IPS_CMD_SUCCESS
) ||
4003 ((basic_status
& IPS_GSC_STATUS_MASK
) == IPS_CMD_RECOVERED_ERROR
)) {
4005 if (scb
->bus
== 0) {
4006 if ((basic_status
& IPS_GSC_STATUS_MASK
) ==
4007 IPS_CMD_RECOVERED_ERROR
) {
4009 "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4010 ips_name
, ha
->host_num
,
4011 scb
->cmd
.basic_io
.op_code
,
4012 basic_status
, ext_status
);
4015 switch (scb
->scsi_cmd
->cmnd
[0]) {
4016 case ALLOW_MEDIUM_REMOVAL
:
4019 case WRITE_FILEMARKS
:
4021 errcode
= DID_ERROR
;
4027 case TEST_UNIT_READY
:
4028 if (!ips_online(ha
, scb
)) {
4029 errcode
= DID_TIME_OUT
;
4034 if (ips_online(ha
, scb
)) {
4035 ips_inquiry(ha
, scb
);
4037 errcode
= DID_TIME_OUT
;
4042 ips_reqsen(ha
, scb
);
4054 if (!ips_online(ha
, scb
)
4055 || !ips_msense(ha
, scb
)) {
4056 errcode
= DID_ERROR
;
4061 if (ips_online(ha
, scb
))
4064 errcode
= DID_TIME_OUT
;
4068 case SEND_DIAGNOSTIC
:
4069 case REASSIGN_BLOCKS
:
4073 errcode
= DID_ERROR
;
4078 case READ_DEFECT_DATA
:
4084 errcode
= DID_ERROR
;
4087 scb
->scsi_cmd
->result
= errcode
<< 16;
4088 } else { /* bus == 0 */
4089 /* restrict access to physical drives */
4090 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
4091 ips_scmd_buf_read(scb
->scsi_cmd
,
4092 &inquiryData
, sizeof (inquiryData
));
4093 if ((inquiryData
.DeviceType
& 0x1f) == TYPE_DISK
)
4094 scb
->scsi_cmd
->result
= DID_TIME_OUT
<< 16;
4097 } else { /* recovered error / success */
4098 if (scb
->bus
== 0) {
4100 "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4101 ips_name
, ha
->host_num
,
4102 scb
->cmd
.basic_io
.op_code
, basic_status
,
4106 ips_map_status(ha
, scb
, sp
);
4110 /****************************************************************************/
4112 /* Routine Name: ips_online */
4114 /* Routine Description: */
4116 /* Determine if a logical drive is online */
4118 /****************************************************************************/
4120 ips_online(ips_ha_t
* ha
, ips_scb_t
* scb
)
4122 METHOD_TRACE("ips_online", 1);
4124 if (scb
->target_id
>= IPS_MAX_LD
)
4127 if ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1) {
4128 memset(ha
->logical_drive_info
, 0, sizeof (IPS_LD_INFO
));
4132 if (ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4134 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4136 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4138 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4145 /****************************************************************************/
4147 /* Routine Name: ips_inquiry */
4149 /* Routine Description: */
4151 /* Simulate an inquiry command to a logical drive */
4153 /****************************************************************************/
4155 ips_inquiry(ips_ha_t
* ha
, ips_scb_t
* scb
)
4157 IPS_SCSI_INQ_DATA inquiry
;
4159 METHOD_TRACE("ips_inquiry", 1);
4161 memset(&inquiry
, 0, sizeof (IPS_SCSI_INQ_DATA
));
4163 inquiry
.DeviceType
= IPS_SCSI_INQ_TYPE_DASD
;
4164 inquiry
.DeviceTypeQualifier
= IPS_SCSI_INQ_LU_CONNECTED
;
4165 inquiry
.Version
= IPS_SCSI_INQ_REV2
;
4166 inquiry
.ResponseDataFormat
= IPS_SCSI_INQ_RD_REV2
;
4167 inquiry
.AdditionalLength
= 31;
4168 inquiry
.Flags
[0] = IPS_SCSI_INQ_Address16
;
4170 IPS_SCSI_INQ_WBus16
| IPS_SCSI_INQ_Sync
| IPS_SCSI_INQ_CmdQue
;
4171 strncpy(inquiry
.VendorId
, "IBM ", 8);
4172 strncpy(inquiry
.ProductId
, "SERVERAID ", 16);
4173 strncpy(inquiry
.ProductRevisionLevel
, "1.00", 4);
4175 ips_scmd_buf_write(scb
->scsi_cmd
, &inquiry
, sizeof (inquiry
));
4180 /****************************************************************************/
4182 /* Routine Name: ips_rdcap */
4184 /* Routine Description: */
4186 /* Simulate a read capacity command to a logical drive */
4188 /****************************************************************************/
4190 ips_rdcap(ips_ha_t
* ha
, ips_scb_t
* scb
)
4192 IPS_SCSI_CAPACITY cap
;
4194 METHOD_TRACE("ips_rdcap", 1);
4196 if (scsi_bufflen(scb
->scsi_cmd
) < 8)
4200 cpu_to_be32(le32_to_cpu
4201 (ha
->logical_drive_info
->
4202 drive_info
[scb
->target_id
].sector_count
) - 1);
4203 cap
.len
= cpu_to_be32((uint32_t) IPS_BLKSIZE
);
4205 ips_scmd_buf_write(scb
->scsi_cmd
, &cap
, sizeof (cap
));
4210 /****************************************************************************/
4212 /* Routine Name: ips_msense */
4214 /* Routine Description: */
4216 /* Simulate a mode sense command to a logical drive */
4218 /****************************************************************************/
4220 ips_msense(ips_ha_t
* ha
, ips_scb_t
* scb
)
4225 IPS_SCSI_MODE_PAGE_DATA mdata
;
4227 METHOD_TRACE("ips_msense", 1);
4229 if (le32_to_cpu(ha
->enq
->ulDriveSize
[scb
->target_id
]) > 0x400000 &&
4230 (ha
->enq
->ucMiscFlag
& 0x8) == 0) {
4231 heads
= IPS_NORM_HEADS
;
4232 sectors
= IPS_NORM_SECTORS
;
4234 heads
= IPS_COMP_HEADS
;
4235 sectors
= IPS_COMP_SECTORS
;
4239 (le32_to_cpu(ha
->enq
->ulDriveSize
[scb
->target_id
]) -
4240 1) / (heads
* sectors
);
4242 memset(&mdata
, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA
));
4244 mdata
.hdr
.BlockDescLength
= 8;
4246 switch (scb
->scsi_cmd
->cmnd
[2] & 0x3f) {
4247 case 0x03: /* page 3 */
4248 mdata
.pdata
.pg3
.PageCode
= 3;
4249 mdata
.pdata
.pg3
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE3
);
4250 mdata
.hdr
.DataLength
=
4251 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg3
.PageLength
;
4252 mdata
.pdata
.pg3
.TracksPerZone
= 0;
4253 mdata
.pdata
.pg3
.AltSectorsPerZone
= 0;
4254 mdata
.pdata
.pg3
.AltTracksPerZone
= 0;
4255 mdata
.pdata
.pg3
.AltTracksPerVolume
= 0;
4256 mdata
.pdata
.pg3
.SectorsPerTrack
= cpu_to_be16(sectors
);
4257 mdata
.pdata
.pg3
.BytesPerSector
= cpu_to_be16(IPS_BLKSIZE
);
4258 mdata
.pdata
.pg3
.Interleave
= cpu_to_be16(1);
4259 mdata
.pdata
.pg3
.TrackSkew
= 0;
4260 mdata
.pdata
.pg3
.CylinderSkew
= 0;
4261 mdata
.pdata
.pg3
.flags
= IPS_SCSI_MP3_SoftSector
;
4265 mdata
.pdata
.pg4
.PageCode
= 4;
4266 mdata
.pdata
.pg4
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE4
);
4267 mdata
.hdr
.DataLength
=
4268 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg4
.PageLength
;
4269 mdata
.pdata
.pg4
.CylindersHigh
=
4270 cpu_to_be16((cylinders
>> 8) & 0xFFFF);
4271 mdata
.pdata
.pg4
.CylindersLow
= (cylinders
& 0xFF);
4272 mdata
.pdata
.pg4
.Heads
= heads
;
4273 mdata
.pdata
.pg4
.WritePrecompHigh
= 0;
4274 mdata
.pdata
.pg4
.WritePrecompLow
= 0;
4275 mdata
.pdata
.pg4
.ReducedWriteCurrentHigh
= 0;
4276 mdata
.pdata
.pg4
.ReducedWriteCurrentLow
= 0;
4277 mdata
.pdata
.pg4
.StepRate
= cpu_to_be16(1);
4278 mdata
.pdata
.pg4
.LandingZoneHigh
= 0;
4279 mdata
.pdata
.pg4
.LandingZoneLow
= 0;
4280 mdata
.pdata
.pg4
.flags
= 0;
4281 mdata
.pdata
.pg4
.RotationalOffset
= 0;
4282 mdata
.pdata
.pg4
.MediumRotationRate
= 0;
4285 mdata
.pdata
.pg8
.PageCode
= 8;
4286 mdata
.pdata
.pg8
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE8
);
4287 mdata
.hdr
.DataLength
=
4288 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg8
.PageLength
;
4289 /* everything else is left set to 0 */
4296 ips_scmd_buf_write(scb
->scsi_cmd
, &mdata
, sizeof (mdata
));
4301 /****************************************************************************/
4303 /* Routine Name: ips_reqsen */
4305 /* Routine Description: */
4307 /* Simulate a request sense command to a logical drive */
4309 /****************************************************************************/
4311 ips_reqsen(ips_ha_t
* ha
, ips_scb_t
* scb
)
4313 IPS_SCSI_REQSEN reqsen
;
4315 METHOD_TRACE("ips_reqsen", 1);
4317 memset(&reqsen
, 0, sizeof (IPS_SCSI_REQSEN
));
4319 reqsen
.ResponseCode
=
4320 IPS_SCSI_REQSEN_VALID
| IPS_SCSI_REQSEN_CURRENT_ERR
;
4321 reqsen
.AdditionalLength
= 10;
4322 reqsen
.AdditionalSenseCode
= IPS_SCSI_REQSEN_NO_SENSE
;
4323 reqsen
.AdditionalSenseCodeQual
= IPS_SCSI_REQSEN_NO_SENSE
;
4325 ips_scmd_buf_write(scb
->scsi_cmd
, &reqsen
, sizeof (reqsen
));
4330 /****************************************************************************/
4332 /* Routine Name: ips_free */
4334 /* Routine Description: */
4336 /* Free any allocated space for this controller */
4338 /****************************************************************************/
4340 ips_free(ips_ha_t
* ha
)
4343 METHOD_TRACE("ips_free", 1);
4347 pci_free_consistent(ha
->pcidev
, sizeof(IPS_ENQ
),
4348 ha
->enq
, ha
->enq_busaddr
);
4356 pci_free_consistent(ha
->pcidev
,
4357 sizeof (IPS_ADAPTER
) +
4358 sizeof (IPS_IO_CMD
), ha
->adapt
,
4359 ha
->adapt
->hw_status_start
);
4363 if (ha
->logical_drive_info
) {
4364 pci_free_consistent(ha
->pcidev
,
4365 sizeof (IPS_LD_INFO
),
4366 ha
->logical_drive_info
,
4367 ha
->logical_drive_info_dma_addr
);
4368 ha
->logical_drive_info
= NULL
;
4377 if (ha
->ioctl_data
) {
4378 pci_free_consistent(ha
->pcidev
, ha
->ioctl_len
,
4379 ha
->ioctl_data
, ha
->ioctl_busaddr
);
4380 ha
->ioctl_data
= NULL
;
4381 ha
->ioctl_datasize
= 0;
4384 ips_deallocatescbs(ha
, ha
->max_cmds
);
4386 /* free memory mapped (if applicable) */
4388 iounmap(ha
->ioremap_ptr
);
4389 ha
->ioremap_ptr
= NULL
;
4398 /****************************************************************************/
4400 /* Routine Name: ips_deallocatescbs */
4402 /* Routine Description: */
4404 /* Free the command blocks */
4406 /****************************************************************************/
4408 ips_deallocatescbs(ips_ha_t
* ha
, int cmds
)
4411 pci_free_consistent(ha
->pcidev
,
4412 IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* cmds
,
4413 ha
->scbs
->sg_list
.list
,
4414 ha
->scbs
->sg_busaddr
);
4415 pci_free_consistent(ha
->pcidev
, sizeof (ips_scb_t
) * cmds
,
4416 ha
->scbs
, ha
->scbs
->scb_busaddr
);
4422 /****************************************************************************/
4424 /* Routine Name: ips_allocatescbs */
4426 /* Routine Description: */
4428 /* Allocate the command blocks */
4430 /****************************************************************************/
4432 ips_allocatescbs(ips_ha_t
* ha
)
4437 dma_addr_t command_dma
, sg_dma
;
4439 METHOD_TRACE("ips_allocatescbs", 1);
4441 /* Allocate memory for the SCBs */
4443 pci_alloc_consistent(ha
->pcidev
, ha
->max_cmds
* sizeof (ips_scb_t
),
4445 if (ha
->scbs
== NULL
)
4448 pci_alloc_consistent(ha
->pcidev
,
4449 IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
*
4450 ha
->max_cmds
, &sg_dma
);
4451 if (ips_sg
.list
== NULL
) {
4452 pci_free_consistent(ha
->pcidev
,
4453 ha
->max_cmds
* sizeof (ips_scb_t
), ha
->scbs
,
4458 memset(ha
->scbs
, 0, ha
->max_cmds
* sizeof (ips_scb_t
));
4460 for (i
= 0; i
< ha
->max_cmds
; i
++) {
4461 scb_p
= &ha
->scbs
[i
];
4462 scb_p
->scb_busaddr
= command_dma
+ sizeof (ips_scb_t
) * i
;
4463 /* set up S/G list */
4464 if (IPS_USE_ENH_SGLIST(ha
)) {
4465 scb_p
->sg_list
.enh_list
=
4466 ips_sg
.enh_list
+ i
* IPS_MAX_SG
;
4468 sg_dma
+ IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* i
;
4470 scb_p
->sg_list
.std_list
=
4471 ips_sg
.std_list
+ i
* IPS_MAX_SG
;
4473 sg_dma
+ IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* i
;
4476 /* add to the free list */
4477 if (i
< ha
->max_cmds
- 1) {
4478 scb_p
->q_next
= ha
->scb_freelist
;
4479 ha
->scb_freelist
= scb_p
;
4487 /****************************************************************************/
4489 /* Routine Name: ips_init_scb */
4491 /* Routine Description: */
4493 /* Initialize a CCB to default values */
4495 /****************************************************************************/
4497 ips_init_scb(ips_ha_t
* ha
, ips_scb_t
* scb
)
4499 IPS_SG_LIST sg_list
;
4500 uint32_t cmd_busaddr
, sg_busaddr
;
4501 METHOD_TRACE("ips_init_scb", 1);
4506 sg_list
.list
= scb
->sg_list
.list
;
4507 cmd_busaddr
= scb
->scb_busaddr
;
4508 sg_busaddr
= scb
->sg_busaddr
;
4510 memset(scb
, 0, sizeof (ips_scb_t
));
4511 memset(ha
->dummy
, 0, sizeof (IPS_IO_CMD
));
4513 /* Initialize dummy command bucket */
4514 ha
->dummy
->op_code
= 0xFF;
4515 ha
->dummy
->ccsar
= cpu_to_le32(ha
->adapt
->hw_status_start
4516 + sizeof (IPS_ADAPTER
));
4517 ha
->dummy
->command_id
= IPS_MAX_CMDS
;
4519 /* set bus address of scb */
4520 scb
->scb_busaddr
= cmd_busaddr
;
4521 scb
->sg_busaddr
= sg_busaddr
;
4522 scb
->sg_list
.list
= sg_list
.list
;
4525 scb
->cmd
.basic_io
.cccr
= cpu_to_le32((uint32_t) IPS_BIT_ILE
);
4526 scb
->cmd
.basic_io
.ccsar
= cpu_to_le32(ha
->adapt
->hw_status_start
4527 + sizeof (IPS_ADAPTER
));
4530 /****************************************************************************/
4532 /* Routine Name: ips_get_scb */
4534 /* Routine Description: */
4536 /* Initialize a CCB to default values */
4538 /* ASSUMED to be callled from within a lock */
4540 /****************************************************************************/
4542 ips_getscb(ips_ha_t
* ha
)
4546 METHOD_TRACE("ips_getscb", 1);
4548 if ((scb
= ha
->scb_freelist
) == NULL
) {
4553 ha
->scb_freelist
= scb
->q_next
;
4557 ips_init_scb(ha
, scb
);
4562 /****************************************************************************/
4564 /* Routine Name: ips_free_scb */
4566 /* Routine Description: */
4568 /* Return an unused CCB back to the free list */
4570 /* ASSUMED to be called from within a lock */
4572 /****************************************************************************/
4574 ips_freescb(ips_ha_t
* ha
, ips_scb_t
* scb
)
4577 METHOD_TRACE("ips_freescb", 1);
4578 if (scb
->flags
& IPS_SCB_MAP_SG
)
4579 scsi_dma_unmap(scb
->scsi_cmd
);
4580 else if (scb
->flags
& IPS_SCB_MAP_SINGLE
)
4581 pci_unmap_single(ha
->pcidev
, scb
->data_busaddr
, scb
->data_len
,
4584 /* check to make sure this is not our "special" scb */
4585 if (IPS_COMMAND_ID(ha
, scb
) < (ha
->max_cmds
- 1)) {
4586 scb
->q_next
= ha
->scb_freelist
;
4587 ha
->scb_freelist
= scb
;
4591 /****************************************************************************/
4593 /* Routine Name: ips_isinit_copperhead */
4595 /* Routine Description: */
4597 /* Is controller initialized ? */
4599 /****************************************************************************/
4601 ips_isinit_copperhead(ips_ha_t
* ha
)
4606 METHOD_TRACE("ips_isinit_copperhead", 1);
4608 isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4609 scpr
= inb(ha
->io_addr
+ IPS_REG_SCPR
);
4611 if (((isr
& IPS_BIT_EI
) == 0) && ((scpr
& IPS_BIT_EBM
) == 0))
4617 /****************************************************************************/
4619 /* Routine Name: ips_isinit_copperhead_memio */
4621 /* Routine Description: */
4623 /* Is controller initialized ? */
4625 /****************************************************************************/
4627 ips_isinit_copperhead_memio(ips_ha_t
* ha
)
4632 METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4634 isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4635 scpr
= readb(ha
->mem_ptr
+ IPS_REG_SCPR
);
4637 if (((isr
& IPS_BIT_EI
) == 0) && ((scpr
& IPS_BIT_EBM
) == 0))
4643 /****************************************************************************/
4645 /* Routine Name: ips_isinit_morpheus */
4647 /* Routine Description: */
4649 /* Is controller initialized ? */
4651 /****************************************************************************/
4653 ips_isinit_morpheus(ips_ha_t
* ha
)
4658 METHOD_TRACE("ips_is_init_morpheus", 1);
4660 if (ips_isintr_morpheus(ha
))
4661 ips_flush_and_reset(ha
);
4663 post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
4664 bits
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4668 else if (bits
& 0x3)
4674 /****************************************************************************/
4676 /* Routine Name: ips_flush_and_reset */
4678 /* Routine Description: */
4680 /* Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown */
4681 /* state ( was trying to INIT and an interrupt was already pending ) ... */
4683 /****************************************************************************/
4685 ips_flush_and_reset(ips_ha_t
*ha
)
4691 dma_addr_t command_dma
;
4693 /* Create a usuable SCB */
4694 scb
= pci_alloc_consistent(ha
->pcidev
, sizeof(ips_scb_t
), &command_dma
);
4696 memset(scb
, 0, sizeof(ips_scb_t
));
4697 ips_init_scb(ha
, scb
);
4698 scb
->scb_busaddr
= command_dma
;
4700 scb
->timeout
= ips_cmd_timeout
;
4701 scb
->cdb
[0] = IPS_CMD_FLUSH
;
4703 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
4704 scb
->cmd
.flush_cache
.command_id
= IPS_MAX_CMDS
; /* Use an ID that would otherwise not exist */
4705 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
4706 scb
->cmd
.flush_cache
.reserved
= 0;
4707 scb
->cmd
.flush_cache
.reserved2
= 0;
4708 scb
->cmd
.flush_cache
.reserved3
= 0;
4709 scb
->cmd
.flush_cache
.reserved4
= 0;
4711 ret
= ips_send_cmd(ha
, scb
); /* Send the Flush Command */
4713 if (ret
== IPS_SUCCESS
) {
4714 time
= 60 * IPS_ONE_SEC
; /* Max Wait time is 60 seconds */
4717 while ((time
> 0) && (!done
)) {
4718 done
= ips_poll_for_flush_complete(ha
);
4719 /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4726 /* Now RESET and INIT the adapter */
4727 (*ha
->func
.reset
) (ha
);
4729 pci_free_consistent(ha
->pcidev
, sizeof(ips_scb_t
), scb
, command_dma
);
4733 /****************************************************************************/
4735 /* Routine Name: ips_poll_for_flush_complete */
4737 /* Routine Description: */
4739 /* Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4740 /* All other responses are just taken off the queue and ignored */
4742 /****************************************************************************/
4744 ips_poll_for_flush_complete(ips_ha_t
* ha
)
4749 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
4751 if (cstatus
.value
== 0xffffffff) /* If No Interrupt to process */
4754 /* Success is when we see the Flush Command ID */
4755 if (cstatus
.fields
.command_id
== IPS_MAX_CMDS
)
4762 /****************************************************************************/
4764 /* Routine Name: ips_enable_int_copperhead */
4766 /* Routine Description: */
4767 /* Turn on interrupts */
4769 /****************************************************************************/
4771 ips_enable_int_copperhead(ips_ha_t
* ha
)
4773 METHOD_TRACE("ips_enable_int_copperhead", 1);
4775 outb(ha
->io_addr
+ IPS_REG_HISR
, IPS_BIT_EI
);
4776 inb(ha
->io_addr
+ IPS_REG_HISR
); /*Ensure PCI Posting Completes*/
4779 /****************************************************************************/
4781 /* Routine Name: ips_enable_int_copperhead_memio */
4783 /* Routine Description: */
4784 /* Turn on interrupts */
4786 /****************************************************************************/
4788 ips_enable_int_copperhead_memio(ips_ha_t
* ha
)
4790 METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4792 writeb(IPS_BIT_EI
, ha
->mem_ptr
+ IPS_REG_HISR
);
4793 readb(ha
->mem_ptr
+ IPS_REG_HISR
); /*Ensure PCI Posting Completes*/
4796 /****************************************************************************/
4798 /* Routine Name: ips_enable_int_morpheus */
4800 /* Routine Description: */
4801 /* Turn on interrupts */
4803 /****************************************************************************/
4805 ips_enable_int_morpheus(ips_ha_t
* ha
)
4809 METHOD_TRACE("ips_enable_int_morpheus", 1);
4811 Oimr
= readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4813 writel(Oimr
, ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4814 readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
); /*Ensure PCI Posting Completes*/
4817 /****************************************************************************/
4819 /* Routine Name: ips_init_copperhead */
4821 /* Routine Description: */
4823 /* Initialize a copperhead controller */
4825 /****************************************************************************/
4827 ips_init_copperhead(ips_ha_t
* ha
)
4831 uint8_t PostByte
[IPS_MAX_POST_BYTES
];
4832 uint8_t ConfigByte
[IPS_MAX_CONFIG_BYTES
];
4835 METHOD_TRACE("ips_init_copperhead", 1);
4837 for (i
= 0; i
< IPS_MAX_POST_BYTES
; i
++) {
4838 for (j
= 0; j
< 45; j
++) {
4839 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4840 if (Isr
& IPS_BIT_GHI
)
4843 /* Delay for 1 Second */
4844 MDELAY(IPS_ONE_SEC
);
4848 /* error occurred */
4851 PostByte
[i
] = inb(ha
->io_addr
+ IPS_REG_ISPR
);
4852 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
4855 if (PostByte
[0] < IPS_GOOD_POST_STATUS
) {
4856 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4857 "reset controller fails (post status %x %x).\n",
4858 PostByte
[0], PostByte
[1]);
4863 for (i
= 0; i
< IPS_MAX_CONFIG_BYTES
; i
++) {
4864 for (j
= 0; j
< 240; j
++) {
4865 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4866 if (Isr
& IPS_BIT_GHI
)
4869 /* Delay for 1 Second */
4870 MDELAY(IPS_ONE_SEC
);
4874 /* error occurred */
4877 ConfigByte
[i
] = inb(ha
->io_addr
+ IPS_REG_ISPR
);
4878 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
4881 for (i
= 0; i
< 240; i
++) {
4882 Cbsp
= inb(ha
->io_addr
+ IPS_REG_CBSP
);
4884 if ((Cbsp
& IPS_BIT_OP
) == 0)
4887 /* Delay for 1 Second */
4888 MDELAY(IPS_ONE_SEC
);
4896 outl(cpu_to_le32(0x1010), ha
->io_addr
+ IPS_REG_CCCR
);
4898 /* Enable busmastering */
4899 outb(IPS_BIT_EBM
, ha
->io_addr
+ IPS_REG_SCPR
);
4901 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
4902 /* fix for anaconda64 */
4903 outl(0, ha
->io_addr
+ IPS_REG_NDAE
);
4905 /* Enable interrupts */
4906 outb(IPS_BIT_EI
, ha
->io_addr
+ IPS_REG_HISR
);
4911 /****************************************************************************/
4913 /* Routine Name: ips_init_copperhead_memio */
4915 /* Routine Description: */
4917 /* Initialize a copperhead controller with memory mapped I/O */
4919 /****************************************************************************/
4921 ips_init_copperhead_memio(ips_ha_t
* ha
)
4925 uint8_t PostByte
[IPS_MAX_POST_BYTES
];
4926 uint8_t ConfigByte
[IPS_MAX_CONFIG_BYTES
];
4929 METHOD_TRACE("ips_init_copperhead_memio", 1);
4931 for (i
= 0; i
< IPS_MAX_POST_BYTES
; i
++) {
4932 for (j
= 0; j
< 45; j
++) {
4933 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4934 if (Isr
& IPS_BIT_GHI
)
4937 /* Delay for 1 Second */
4938 MDELAY(IPS_ONE_SEC
);
4942 /* error occurred */
4945 PostByte
[i
] = readb(ha
->mem_ptr
+ IPS_REG_ISPR
);
4946 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
4949 if (PostByte
[0] < IPS_GOOD_POST_STATUS
) {
4950 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4951 "reset controller fails (post status %x %x).\n",
4952 PostByte
[0], PostByte
[1]);
4957 for (i
= 0; i
< IPS_MAX_CONFIG_BYTES
; i
++) {
4958 for (j
= 0; j
< 240; j
++) {
4959 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4960 if (Isr
& IPS_BIT_GHI
)
4963 /* Delay for 1 Second */
4964 MDELAY(IPS_ONE_SEC
);
4968 /* error occurred */
4971 ConfigByte
[i
] = readb(ha
->mem_ptr
+ IPS_REG_ISPR
);
4972 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
4975 for (i
= 0; i
< 240; i
++) {
4976 Cbsp
= readb(ha
->mem_ptr
+ IPS_REG_CBSP
);
4978 if ((Cbsp
& IPS_BIT_OP
) == 0)
4981 /* Delay for 1 Second */
4982 MDELAY(IPS_ONE_SEC
);
4986 /* error occurred */
4990 writel(0x1010, ha
->mem_ptr
+ IPS_REG_CCCR
);
4992 /* Enable busmastering */
4993 writeb(IPS_BIT_EBM
, ha
->mem_ptr
+ IPS_REG_SCPR
);
4995 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
4996 /* fix for anaconda64 */
4997 writel(0, ha
->mem_ptr
+ IPS_REG_NDAE
);
4999 /* Enable interrupts */
5000 writeb(IPS_BIT_EI
, ha
->mem_ptr
+ IPS_REG_HISR
);
5002 /* if we get here then everything went OK */
5006 /****************************************************************************/
5008 /* Routine Name: ips_init_morpheus */
5010 /* Routine Description: */
5012 /* Initialize a morpheus controller */
5014 /****************************************************************************/
5016 ips_init_morpheus(ips_ha_t
* ha
)
5024 METHOD_TRACE("ips_init_morpheus", 1);
5026 /* Wait up to 45 secs for Post */
5027 for (i
= 0; i
< 45; i
++) {
5028 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5030 if (Isr
& IPS_BIT_I960_MSG0I
)
5033 /* Delay for 1 Second */
5034 MDELAY(IPS_ONE_SEC
);
5038 /* error occurred */
5039 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5040 "timeout waiting for post.\n");
5045 Post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
5047 if (Post
== 0x4F00) { /* If Flashing the Battery PIC */
5048 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5049 "Flashing Battery PIC, Please wait ...\n");
5051 /* Clear the interrupt bit */
5052 Isr
= (uint32_t) IPS_BIT_I960_MSG0I
;
5053 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5055 for (i
= 0; i
< 120; i
++) { /* Wait Up to 2 Min. for Completion */
5056 Post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
5059 /* Delay for 1 Second */
5060 MDELAY(IPS_ONE_SEC
);
5064 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5065 "timeout waiting for Battery PIC Flash\n");
5071 /* Clear the interrupt bit */
5072 Isr
= (uint32_t) IPS_BIT_I960_MSG0I
;
5073 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5075 if (Post
< (IPS_GOOD_POST_STATUS
<< 8)) {
5076 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5077 "reset controller fails (post status %x).\n", Post
);
5082 /* Wait up to 240 secs for config bytes */
5083 for (i
= 0; i
< 240; i
++) {
5084 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5086 if (Isr
& IPS_BIT_I960_MSG1I
)
5089 /* Delay for 1 Second */
5090 MDELAY(IPS_ONE_SEC
);
5094 /* error occurred */
5095 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5096 "timeout waiting for config.\n");
5101 Config
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG1
);
5103 /* Clear interrupt bit */
5104 Isr
= (uint32_t) IPS_BIT_I960_MSG1I
;
5105 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5107 /* Turn on the interrupts */
5108 Oimr
= readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
5110 writel(Oimr
, ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
5112 /* if we get here then everything went OK */
5114 /* Since we did a RESET, an EraseStripeLock may be needed */
5115 if (Post
== 0xEF10) {
5116 if ((Config
== 0x000F) || (Config
== 0x0009))
5117 ha
->requires_esl
= 1;
5123 /****************************************************************************/
5125 /* Routine Name: ips_reset_copperhead */
5127 /* Routine Description: */
5129 /* Reset the controller */
5131 /****************************************************************************/
5133 ips_reset_copperhead(ips_ha_t
* ha
)
5137 METHOD_TRACE("ips_reset_copperhead", 1);
5139 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5140 ips_name
, ha
->host_num
, ha
->io_addr
, ha
->pcidev
->irq
);
5144 while (reset_counter
< 2) {
5147 outb(IPS_BIT_RST
, ha
->io_addr
+ IPS_REG_SCPR
);
5149 /* Delay for 1 Second */
5150 MDELAY(IPS_ONE_SEC
);
5152 outb(0, ha
->io_addr
+ IPS_REG_SCPR
);
5154 /* Delay for 1 Second */
5155 MDELAY(IPS_ONE_SEC
);
5157 if ((*ha
->func
.init
) (ha
))
5159 else if (reset_counter
>= 2) {
5168 /****************************************************************************/
5170 /* Routine Name: ips_reset_copperhead_memio */
5172 /* Routine Description: */
5174 /* Reset the controller */
5176 /****************************************************************************/
5178 ips_reset_copperhead_memio(ips_ha_t
* ha
)
5182 METHOD_TRACE("ips_reset_copperhead_memio", 1);
5184 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5185 ips_name
, ha
->host_num
, ha
->mem_addr
, ha
->pcidev
->irq
);
5189 while (reset_counter
< 2) {
5192 writeb(IPS_BIT_RST
, ha
->mem_ptr
+ IPS_REG_SCPR
);
5194 /* Delay for 1 Second */
5195 MDELAY(IPS_ONE_SEC
);
5197 writeb(0, ha
->mem_ptr
+ IPS_REG_SCPR
);
5199 /* Delay for 1 Second */
5200 MDELAY(IPS_ONE_SEC
);
5202 if ((*ha
->func
.init
) (ha
))
5204 else if (reset_counter
>= 2) {
5213 /****************************************************************************/
5215 /* Routine Name: ips_reset_morpheus */
5217 /* Routine Description: */
5219 /* Reset the controller */
5221 /****************************************************************************/
5223 ips_reset_morpheus(ips_ha_t
* ha
)
5228 METHOD_TRACE("ips_reset_morpheus", 1);
5230 DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5231 ips_name
, ha
->host_num
, ha
->mem_addr
, ha
->pcidev
->irq
);
5235 while (reset_counter
< 2) {
5238 writel(0x80000000, ha
->mem_ptr
+ IPS_REG_I960_IDR
);
5240 /* Delay for 5 Seconds */
5241 MDELAY(5 * IPS_ONE_SEC
);
5243 /* Do a PCI config read to wait for adapter */
5244 pci_read_config_byte(ha
->pcidev
, 4, &junk
);
5246 if ((*ha
->func
.init
) (ha
))
5248 else if (reset_counter
>= 2) {
5257 /****************************************************************************/
5259 /* Routine Name: ips_statinit */
5261 /* Routine Description: */
5263 /* Initialize the status queues on the controller */
5265 /****************************************************************************/
5267 ips_statinit(ips_ha_t
* ha
)
5269 uint32_t phys_status_start
;
5271 METHOD_TRACE("ips_statinit", 1);
5273 ha
->adapt
->p_status_start
= ha
->adapt
->status
;
5274 ha
->adapt
->p_status_end
= ha
->adapt
->status
+ IPS_MAX_CMDS
;
5275 ha
->adapt
->p_status_tail
= ha
->adapt
->status
;
5277 phys_status_start
= ha
->adapt
->hw_status_start
;
5278 outl(cpu_to_le32(phys_status_start
), ha
->io_addr
+ IPS_REG_SQSR
);
5279 outl(cpu_to_le32(phys_status_start
+ IPS_STATUS_Q_SIZE
),
5280 ha
->io_addr
+ IPS_REG_SQER
);
5281 outl(cpu_to_le32(phys_status_start
+ IPS_STATUS_SIZE
),
5282 ha
->io_addr
+ IPS_REG_SQHR
);
5283 outl(cpu_to_le32(phys_status_start
), ha
->io_addr
+ IPS_REG_SQTR
);
5285 ha
->adapt
->hw_status_tail
= phys_status_start
;
5288 /****************************************************************************/
5290 /* Routine Name: ips_statinit_memio */
5292 /* Routine Description: */
5294 /* Initialize the status queues on the controller */
5296 /****************************************************************************/
5298 ips_statinit_memio(ips_ha_t
* ha
)
5300 uint32_t phys_status_start
;
5302 METHOD_TRACE("ips_statinit_memio", 1);
5304 ha
->adapt
->p_status_start
= ha
->adapt
->status
;
5305 ha
->adapt
->p_status_end
= ha
->adapt
->status
+ IPS_MAX_CMDS
;
5306 ha
->adapt
->p_status_tail
= ha
->adapt
->status
;
5308 phys_status_start
= ha
->adapt
->hw_status_start
;
5309 writel(phys_status_start
, ha
->mem_ptr
+ IPS_REG_SQSR
);
5310 writel(phys_status_start
+ IPS_STATUS_Q_SIZE
,
5311 ha
->mem_ptr
+ IPS_REG_SQER
);
5312 writel(phys_status_start
+ IPS_STATUS_SIZE
, ha
->mem_ptr
+ IPS_REG_SQHR
);
5313 writel(phys_status_start
, ha
->mem_ptr
+ IPS_REG_SQTR
);
5315 ha
->adapt
->hw_status_tail
= phys_status_start
;
5318 /****************************************************************************/
5320 /* Routine Name: ips_statupd_copperhead */
5322 /* Routine Description: */
5324 /* Remove an element from the status queue */
5326 /****************************************************************************/
5328 ips_statupd_copperhead(ips_ha_t
* ha
)
5330 METHOD_TRACE("ips_statupd_copperhead", 1);
5332 if (ha
->adapt
->p_status_tail
!= ha
->adapt
->p_status_end
) {
5333 ha
->adapt
->p_status_tail
++;
5334 ha
->adapt
->hw_status_tail
+= sizeof (IPS_STATUS
);
5336 ha
->adapt
->p_status_tail
= ha
->adapt
->p_status_start
;
5337 ha
->adapt
->hw_status_tail
= ha
->adapt
->hw_status_start
;
5340 outl(cpu_to_le32(ha
->adapt
->hw_status_tail
),
5341 ha
->io_addr
+ IPS_REG_SQTR
);
5343 return (ha
->adapt
->p_status_tail
->value
);
5346 /****************************************************************************/
5348 /* Routine Name: ips_statupd_copperhead_memio */
5350 /* Routine Description: */
5352 /* Remove an element from the status queue */
5354 /****************************************************************************/
5356 ips_statupd_copperhead_memio(ips_ha_t
* ha
)
5358 METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5360 if (ha
->adapt
->p_status_tail
!= ha
->adapt
->p_status_end
) {
5361 ha
->adapt
->p_status_tail
++;
5362 ha
->adapt
->hw_status_tail
+= sizeof (IPS_STATUS
);
5364 ha
->adapt
->p_status_tail
= ha
->adapt
->p_status_start
;
5365 ha
->adapt
->hw_status_tail
= ha
->adapt
->hw_status_start
;
5368 writel(ha
->adapt
->hw_status_tail
, ha
->mem_ptr
+ IPS_REG_SQTR
);
5370 return (ha
->adapt
->p_status_tail
->value
);
5373 /****************************************************************************/
5375 /* Routine Name: ips_statupd_morpheus */
5377 /* Routine Description: */
5379 /* Remove an element from the status queue */
5381 /****************************************************************************/
5383 ips_statupd_morpheus(ips_ha_t
* ha
)
5387 METHOD_TRACE("ips_statupd_morpheus", 1);
5389 val
= readl(ha
->mem_ptr
+ IPS_REG_I2O_OUTMSGQ
);
5394 /****************************************************************************/
5396 /* Routine Name: ips_issue_copperhead */
5398 /* Routine Description: */
5400 /* Send a command down to the controller */
5402 /****************************************************************************/
5404 ips_issue_copperhead(ips_ha_t
* ha
, ips_scb_t
* scb
)
5409 METHOD_TRACE("ips_issue_copperhead", 1);
5411 if (scb
->scsi_cmd
) {
5412 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5416 scb
->cmd
.basic_io
.command_id
,
5417 scb
->bus
, scb
->target_id
, scb
->lun
);
5419 DEBUG_VAR(2, KERN_NOTICE
"(%s%d) ips_issue: logical cmd id %d",
5420 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5426 le32_to_cpu(inl(ha
->io_addr
+ IPS_REG_CCCR
))) & IPS_BIT_SEM
) {
5429 if (++TimeOut
>= IPS_SEM_TIMEOUT
) {
5430 if (!(val
& IPS_BIT_START_STOP
))
5433 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5434 "ips_issue val [0x%x].\n", val
);
5435 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5436 "ips_issue semaphore chk timeout.\n");
5438 return (IPS_FAILURE
);
5442 outl(cpu_to_le32(scb
->scb_busaddr
), ha
->io_addr
+ IPS_REG_CCSAR
);
5443 outw(cpu_to_le32(IPS_BIT_START_CMD
), ha
->io_addr
+ IPS_REG_CCCR
);
5445 return (IPS_SUCCESS
);
5448 /****************************************************************************/
5450 /* Routine Name: ips_issue_copperhead_memio */
5452 /* Routine Description: */
5454 /* Send a command down to the controller */
5456 /****************************************************************************/
5458 ips_issue_copperhead_memio(ips_ha_t
* ha
, ips_scb_t
* scb
)
5463 METHOD_TRACE("ips_issue_copperhead_memio", 1);
5465 if (scb
->scsi_cmd
) {
5466 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5470 scb
->cmd
.basic_io
.command_id
,
5471 scb
->bus
, scb
->target_id
, scb
->lun
);
5473 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5474 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5479 while ((val
= readl(ha
->mem_ptr
+ IPS_REG_CCCR
)) & IPS_BIT_SEM
) {
5482 if (++TimeOut
>= IPS_SEM_TIMEOUT
) {
5483 if (!(val
& IPS_BIT_START_STOP
))
5486 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5487 "ips_issue val [0x%x].\n", val
);
5488 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5489 "ips_issue semaphore chk timeout.\n");
5491 return (IPS_FAILURE
);
5495 writel(scb
->scb_busaddr
, ha
->mem_ptr
+ IPS_REG_CCSAR
);
5496 writel(IPS_BIT_START_CMD
, ha
->mem_ptr
+ IPS_REG_CCCR
);
5498 return (IPS_SUCCESS
);
5501 /****************************************************************************/
5503 /* Routine Name: ips_issue_i2o */
5505 /* Routine Description: */
5507 /* Send a command down to the controller */
5509 /****************************************************************************/
5511 ips_issue_i2o(ips_ha_t
* ha
, ips_scb_t
* scb
)
5514 METHOD_TRACE("ips_issue_i2o", 1);
5516 if (scb
->scsi_cmd
) {
5517 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5521 scb
->cmd
.basic_io
.command_id
,
5522 scb
->bus
, scb
->target_id
, scb
->lun
);
5524 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5525 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5528 outl(cpu_to_le32(scb
->scb_busaddr
), ha
->io_addr
+ IPS_REG_I2O_INMSGQ
);
5530 return (IPS_SUCCESS
);
5533 /****************************************************************************/
5535 /* Routine Name: ips_issue_i2o_memio */
5537 /* Routine Description: */
5539 /* Send a command down to the controller */
5541 /****************************************************************************/
5543 ips_issue_i2o_memio(ips_ha_t
* ha
, ips_scb_t
* scb
)
5546 METHOD_TRACE("ips_issue_i2o_memio", 1);
5548 if (scb
->scsi_cmd
) {
5549 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5553 scb
->cmd
.basic_io
.command_id
,
5554 scb
->bus
, scb
->target_id
, scb
->lun
);
5556 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5557 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5560 writel(scb
->scb_busaddr
, ha
->mem_ptr
+ IPS_REG_I2O_INMSGQ
);
5562 return (IPS_SUCCESS
);
5565 /****************************************************************************/
5567 /* Routine Name: ips_isintr_copperhead */
5569 /* Routine Description: */
5571 /* Test to see if an interrupt is for us */
5573 /****************************************************************************/
5575 ips_isintr_copperhead(ips_ha_t
* ha
)
5579 METHOD_TRACE("ips_isintr_copperhead", 2);
5581 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
5584 /* ?!?! Nothing really there */
5587 if (Isr
& IPS_BIT_SCE
)
5589 else if (Isr
& (IPS_BIT_SQO
| IPS_BIT_GHI
)) {
5590 /* status queue overflow or GHI */
5591 /* just clear the interrupt */
5592 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
5598 /****************************************************************************/
5600 /* Routine Name: ips_isintr_copperhead_memio */
5602 /* Routine Description: */
5604 /* Test to see if an interrupt is for us */
5606 /****************************************************************************/
5608 ips_isintr_copperhead_memio(ips_ha_t
* ha
)
5612 METHOD_TRACE("ips_isintr_memio", 2);
5614 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
5617 /* ?!?! Nothing really there */
5620 if (Isr
& IPS_BIT_SCE
)
5622 else if (Isr
& (IPS_BIT_SQO
| IPS_BIT_GHI
)) {
5623 /* status queue overflow or GHI */
5624 /* just clear the interrupt */
5625 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
5631 /****************************************************************************/
5633 /* Routine Name: ips_isintr_morpheus */
5635 /* Routine Description: */
5637 /* Test to see if an interrupt is for us */
5639 /****************************************************************************/
5641 ips_isintr_morpheus(ips_ha_t
* ha
)
5645 METHOD_TRACE("ips_isintr_morpheus", 2);
5647 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5649 if (Isr
& IPS_BIT_I2O_OPQI
)
5655 /****************************************************************************/
5657 /* Routine Name: ips_wait */
5659 /* Routine Description: */
5661 /* Wait for a command to complete */
5663 /****************************************************************************/
5665 ips_wait(ips_ha_t
* ha
, int time
, int intr
)
5670 METHOD_TRACE("ips_wait", 1);
5675 time
*= IPS_ONE_SEC
; /* convert seconds */
5677 while ((time
> 0) && (!done
)) {
5678 if (intr
== IPS_INTR_ON
) {
5679 if (ha
->waitflag
== FALSE
) {
5684 } else if (intr
== IPS_INTR_IORL
) {
5685 if (ha
->waitflag
== FALSE
) {
5687 * controller generated an interrupt to
5688 * acknowledge completion of the command
5689 * and ips_intr() has serviced the interrupt.
5697 * NOTE: we already have the io_request_lock so
5698 * even if we get an interrupt it won't get serviced
5699 * until after we finish.
5702 (*ha
->func
.intr
) (ha
);
5705 /* This looks like a very evil loop, but it only does this during start-up */
5713 /****************************************************************************/
5715 /* Routine Name: ips_write_driver_status */
5717 /* Routine Description: */
5719 /* Write OS/Driver version to Page 5 of the nvram on the controller */
5721 /****************************************************************************/
5723 ips_write_driver_status(ips_ha_t
* ha
, int intr
)
5725 METHOD_TRACE("ips_write_driver_status", 1);
5727 if (!ips_readwrite_page5(ha
, FALSE
, intr
)) {
5728 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5729 "unable to read NVRAM page 5.\n");
5734 /* check to make sure the page has a valid */
5736 if (le32_to_cpu(ha
->nvram
->signature
) != IPS_NVRAM_P5_SIG
) {
5738 "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5739 ips_name
, ha
->host_num
, ha
->nvram
->signature
);
5740 ha
->nvram
->signature
= IPS_NVRAM_P5_SIG
;
5744 "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5745 ips_name
, ha
->host_num
, le16_to_cpu(ha
->nvram
->adapter_type
),
5746 ha
->nvram
->adapter_slot
, ha
->nvram
->bios_high
[0],
5747 ha
->nvram
->bios_high
[1], ha
->nvram
->bios_high
[2],
5748 ha
->nvram
->bios_high
[3], ha
->nvram
->bios_low
[0],
5749 ha
->nvram
->bios_low
[1], ha
->nvram
->bios_low
[2],
5750 ha
->nvram
->bios_low
[3]);
5752 ips_get_bios_version(ha
, intr
);
5754 /* change values (as needed) */
5755 ha
->nvram
->operating_system
= IPS_OS_LINUX
;
5756 ha
->nvram
->adapter_type
= ha
->ad_type
;
5757 strncpy((char *) ha
->nvram
->driver_high
, IPS_VERSION_HIGH
, 4);
5758 strncpy((char *) ha
->nvram
->driver_low
, IPS_VERSION_LOW
, 4);
5759 strncpy((char *) ha
->nvram
->bios_high
, ha
->bios_version
, 4);
5760 strncpy((char *) ha
->nvram
->bios_low
, ha
->bios_version
+ 4, 4);
5762 ha
->nvram
->versioning
= 0; /* Indicate the Driver Does Not Support Versioning */
5764 /* now update the page */
5765 if (!ips_readwrite_page5(ha
, TRUE
, intr
)) {
5766 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5767 "unable to write NVRAM page 5.\n");
5772 /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5773 ha
->slot_num
= ha
->nvram
->adapter_slot
;
5778 /****************************************************************************/
5780 /* Routine Name: ips_read_adapter_status */
5782 /* Routine Description: */
5784 /* Do an Inquiry command to the adapter */
5786 /****************************************************************************/
5788 ips_read_adapter_status(ips_ha_t
* ha
, int intr
)
5793 METHOD_TRACE("ips_read_adapter_status", 1);
5795 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5797 ips_init_scb(ha
, scb
);
5799 scb
->timeout
= ips_cmd_timeout
;
5800 scb
->cdb
[0] = IPS_CMD_ENQUIRY
;
5802 scb
->cmd
.basic_io
.op_code
= IPS_CMD_ENQUIRY
;
5803 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5804 scb
->cmd
.basic_io
.sg_count
= 0;
5805 scb
->cmd
.basic_io
.lba
= 0;
5806 scb
->cmd
.basic_io
.sector_count
= 0;
5807 scb
->cmd
.basic_io
.log_drv
= 0;
5808 scb
->data_len
= sizeof (*ha
->enq
);
5809 scb
->cmd
.basic_io
.sg_addr
= ha
->enq_busaddr
;
5813 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5814 || (ret
== IPS_SUCCESS_IMM
)
5815 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5821 /****************************************************************************/
5823 /* Routine Name: ips_read_subsystem_parameters */
5825 /* Routine Description: */
5827 /* Read subsystem parameters from the adapter */
5829 /****************************************************************************/
5831 ips_read_subsystem_parameters(ips_ha_t
* ha
, int intr
)
5836 METHOD_TRACE("ips_read_subsystem_parameters", 1);
5838 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5840 ips_init_scb(ha
, scb
);
5842 scb
->timeout
= ips_cmd_timeout
;
5843 scb
->cdb
[0] = IPS_CMD_GET_SUBSYS
;
5845 scb
->cmd
.basic_io
.op_code
= IPS_CMD_GET_SUBSYS
;
5846 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5847 scb
->cmd
.basic_io
.sg_count
= 0;
5848 scb
->cmd
.basic_io
.lba
= 0;
5849 scb
->cmd
.basic_io
.sector_count
= 0;
5850 scb
->cmd
.basic_io
.log_drv
= 0;
5851 scb
->data_len
= sizeof (*ha
->subsys
);
5852 scb
->cmd
.basic_io
.sg_addr
= ha
->ioctl_busaddr
;
5856 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5857 || (ret
== IPS_SUCCESS_IMM
)
5858 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5861 memcpy(ha
->subsys
, ha
->ioctl_data
, sizeof(*ha
->subsys
));
5865 /****************************************************************************/
5867 /* Routine Name: ips_read_config */
5869 /* Routine Description: */
5871 /* Read the configuration on the adapter */
5873 /****************************************************************************/
5875 ips_read_config(ips_ha_t
* ha
, int intr
)
5881 METHOD_TRACE("ips_read_config", 1);
5883 /* set defaults for initiator IDs */
5884 for (i
= 0; i
< 4; i
++)
5885 ha
->conf
->init_id
[i
] = 7;
5887 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5889 ips_init_scb(ha
, scb
);
5891 scb
->timeout
= ips_cmd_timeout
;
5892 scb
->cdb
[0] = IPS_CMD_READ_CONF
;
5894 scb
->cmd
.basic_io
.op_code
= IPS_CMD_READ_CONF
;
5895 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5896 scb
->data_len
= sizeof (*ha
->conf
);
5897 scb
->cmd
.basic_io
.sg_addr
= ha
->ioctl_busaddr
;
5901 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5902 || (ret
== IPS_SUCCESS_IMM
)
5903 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
5905 memset(ha
->conf
, 0, sizeof (IPS_CONF
));
5907 /* reset initiator IDs */
5908 for (i
= 0; i
< 4; i
++)
5909 ha
->conf
->init_id
[i
] = 7;
5911 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5912 if ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) ==
5913 IPS_CMD_CMPLT_WERROR
)
5919 memcpy(ha
->conf
, ha
->ioctl_data
, sizeof(*ha
->conf
));
5923 /****************************************************************************/
5925 /* Routine Name: ips_readwrite_page5 */
5927 /* Routine Description: */
5929 /* Read nvram page 5 from the adapter */
5931 /****************************************************************************/
5933 ips_readwrite_page5(ips_ha_t
* ha
, int write
, int intr
)
5938 METHOD_TRACE("ips_readwrite_page5", 1);
5940 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5942 ips_init_scb(ha
, scb
);
5944 scb
->timeout
= ips_cmd_timeout
;
5945 scb
->cdb
[0] = IPS_CMD_RW_NVRAM_PAGE
;
5947 scb
->cmd
.nvram
.op_code
= IPS_CMD_RW_NVRAM_PAGE
;
5948 scb
->cmd
.nvram
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5949 scb
->cmd
.nvram
.page
= 5;
5950 scb
->cmd
.nvram
.write
= write
;
5951 scb
->cmd
.nvram
.reserved
= 0;
5952 scb
->cmd
.nvram
.reserved2
= 0;
5953 scb
->data_len
= sizeof (*ha
->nvram
);
5954 scb
->cmd
.nvram
.buffer_addr
= ha
->ioctl_busaddr
;
5956 memcpy(ha
->ioctl_data
, ha
->nvram
, sizeof(*ha
->nvram
));
5958 /* issue the command */
5960 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5961 || (ret
== IPS_SUCCESS_IMM
)
5962 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
5964 memset(ha
->nvram
, 0, sizeof (IPS_NVRAM_P5
));
5969 memcpy(ha
->nvram
, ha
->ioctl_data
, sizeof(*ha
->nvram
));
5973 /****************************************************************************/
5975 /* Routine Name: ips_clear_adapter */
5977 /* Routine Description: */
5979 /* Clear the stripe lock tables */
5981 /****************************************************************************/
5983 ips_clear_adapter(ips_ha_t
* ha
, int intr
)
5988 METHOD_TRACE("ips_clear_adapter", 1);
5990 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5992 ips_init_scb(ha
, scb
);
5994 scb
->timeout
= ips_reset_timeout
;
5995 scb
->cdb
[0] = IPS_CMD_CONFIG_SYNC
;
5997 scb
->cmd
.config_sync
.op_code
= IPS_CMD_CONFIG_SYNC
;
5998 scb
->cmd
.config_sync
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5999 scb
->cmd
.config_sync
.channel
= 0;
6000 scb
->cmd
.config_sync
.source_target
= IPS_POCL
;
6001 scb
->cmd
.config_sync
.reserved
= 0;
6002 scb
->cmd
.config_sync
.reserved2
= 0;
6003 scb
->cmd
.config_sync
.reserved3
= 0;
6007 ips_send_wait(ha
, scb
, ips_reset_timeout
, intr
)) == IPS_FAILURE
)
6008 || (ret
== IPS_SUCCESS_IMM
)
6009 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
6012 /* send unlock stripe command */
6013 ips_init_scb(ha
, scb
);
6015 scb
->cdb
[0] = IPS_CMD_ERROR_TABLE
;
6016 scb
->timeout
= ips_reset_timeout
;
6018 scb
->cmd
.unlock_stripe
.op_code
= IPS_CMD_ERROR_TABLE
;
6019 scb
->cmd
.unlock_stripe
.command_id
= IPS_COMMAND_ID(ha
, scb
);
6020 scb
->cmd
.unlock_stripe
.log_drv
= 0;
6021 scb
->cmd
.unlock_stripe
.control
= IPS_CSL
;
6022 scb
->cmd
.unlock_stripe
.reserved
= 0;
6023 scb
->cmd
.unlock_stripe
.reserved2
= 0;
6024 scb
->cmd
.unlock_stripe
.reserved3
= 0;
6028 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
6029 || (ret
== IPS_SUCCESS_IMM
)
6030 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
6036 /****************************************************************************/
6038 /* Routine Name: ips_ffdc_reset */
6040 /* Routine Description: */
6042 /* FFDC: write reset info */
6044 /****************************************************************************/
6046 ips_ffdc_reset(ips_ha_t
* ha
, int intr
)
6050 METHOD_TRACE("ips_ffdc_reset", 1);
6052 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
6054 ips_init_scb(ha
, scb
);
6056 scb
->timeout
= ips_cmd_timeout
;
6057 scb
->cdb
[0] = IPS_CMD_FFDC
;
6058 scb
->cmd
.ffdc
.op_code
= IPS_CMD_FFDC
;
6059 scb
->cmd
.ffdc
.command_id
= IPS_COMMAND_ID(ha
, scb
);
6060 scb
->cmd
.ffdc
.reset_count
= ha
->reset_count
;
6061 scb
->cmd
.ffdc
.reset_type
= 0x80;
6063 /* convert time to what the card wants */
6064 ips_fix_ffdc_time(ha
, scb
, ha
->last_ffdc
);
6067 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
);
6070 /****************************************************************************/
6072 /* Routine Name: ips_ffdc_time */
6074 /* Routine Description: */
6076 /* FFDC: write time info */
6078 /****************************************************************************/
6080 ips_ffdc_time(ips_ha_t
* ha
)
6084 METHOD_TRACE("ips_ffdc_time", 1);
6086 DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name
, ha
->host_num
);
6088 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
6090 ips_init_scb(ha
, scb
);
6092 scb
->timeout
= ips_cmd_timeout
;
6093 scb
->cdb
[0] = IPS_CMD_FFDC
;
6094 scb
->cmd
.ffdc
.op_code
= IPS_CMD_FFDC
;
6095 scb
->cmd
.ffdc
.command_id
= IPS_COMMAND_ID(ha
, scb
);
6096 scb
->cmd
.ffdc
.reset_count
= 0;
6097 scb
->cmd
.ffdc
.reset_type
= 0;
6099 /* convert time to what the card wants */
6100 ips_fix_ffdc_time(ha
, scb
, ha
->last_ffdc
);
6103 ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_FFDC
);
6106 /****************************************************************************/
6108 /* Routine Name: ips_fix_ffdc_time */
6110 /* Routine Description: */
6111 /* Adjust time_t to what the card wants */
6113 /****************************************************************************/
6115 ips_fix_ffdc_time(ips_ha_t
* ha
, ips_scb_t
* scb
, time_t current_time
)
6122 int year_lengths
[2] = { IPS_DAYS_NORMAL_YEAR
, IPS_DAYS_LEAP_YEAR
};
6123 int month_lengths
[12][2] = { {31, 31},
6137 METHOD_TRACE("ips_fix_ffdc_time", 1);
6139 days
= current_time
/ IPS_SECS_DAY
;
6140 rem
= current_time
% IPS_SECS_DAY
;
6142 scb
->cmd
.ffdc
.hour
= (rem
/ IPS_SECS_HOUR
);
6143 rem
= rem
% IPS_SECS_HOUR
;
6144 scb
->cmd
.ffdc
.minute
= (rem
/ IPS_SECS_MIN
);
6145 scb
->cmd
.ffdc
.second
= (rem
% IPS_SECS_MIN
);
6147 year
= IPS_EPOCH_YEAR
;
6148 while (days
< 0 || days
>= year_lengths
[yleap
= IPS_IS_LEAP_YEAR(year
)]) {
6151 newy
= year
+ (days
/ IPS_DAYS_NORMAL_YEAR
);
6154 days
-= (newy
- year
) * IPS_DAYS_NORMAL_YEAR
+
6155 IPS_NUM_LEAP_YEARS_THROUGH(newy
- 1) -
6156 IPS_NUM_LEAP_YEARS_THROUGH(year
- 1);
6160 scb
->cmd
.ffdc
.yearH
= year
/ 100;
6161 scb
->cmd
.ffdc
.yearL
= year
% 100;
6163 for (i
= 0; days
>= month_lengths
[i
][yleap
]; ++i
)
6164 days
-= month_lengths
[i
][yleap
];
6166 scb
->cmd
.ffdc
.month
= i
+ 1;
6167 scb
->cmd
.ffdc
.day
= days
+ 1;
6170 /****************************************************************************
6171 * BIOS Flash Routines *
6172 ****************************************************************************/
6174 /****************************************************************************/
6176 /* Routine Name: ips_erase_bios */
6178 /* Routine Description: */
6179 /* Erase the BIOS on the adapter */
6181 /****************************************************************************/
6183 ips_erase_bios(ips_ha_t
* ha
)
6188 METHOD_TRACE("ips_erase_bios", 1);
6192 /* Clear the status register */
6193 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6194 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6195 udelay(25); /* 25 us */
6197 outb(0x50, ha
->io_addr
+ IPS_REG_FLDP
);
6198 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6199 udelay(25); /* 25 us */
6202 outb(0x20, ha
->io_addr
+ IPS_REG_FLDP
);
6203 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6204 udelay(25); /* 25 us */
6207 outb(0xD0, ha
->io_addr
+ IPS_REG_FLDP
);
6208 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6209 udelay(25); /* 25 us */
6212 outb(0x70, ha
->io_addr
+ IPS_REG_FLDP
);
6213 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6214 udelay(25); /* 25 us */
6216 timeout
= 80000; /* 80 seconds */
6218 while (timeout
> 0) {
6219 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6220 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6221 udelay(25); /* 25 us */
6224 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6233 /* check for timeout */
6237 /* try to suspend the erase */
6238 outb(0xB0, ha
->io_addr
+ IPS_REG_FLDP
);
6239 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6240 udelay(25); /* 25 us */
6242 /* wait for 10 seconds */
6244 while (timeout
> 0) {
6245 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6246 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6247 udelay(25); /* 25 us */
6250 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6262 /* check for valid VPP */
6267 /* check for successful flash */
6269 /* sequence error */
6272 /* Otherwise, we were successful */
6274 outb(0x50, ha
->io_addr
+ IPS_REG_FLDP
);
6275 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6276 udelay(25); /* 25 us */
6279 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6280 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6281 udelay(25); /* 25 us */
6286 /****************************************************************************/
6288 /* Routine Name: ips_erase_bios_memio */
6290 /* Routine Description: */
6291 /* Erase the BIOS on the adapter */
6293 /****************************************************************************/
6295 ips_erase_bios_memio(ips_ha_t
* ha
)
6300 METHOD_TRACE("ips_erase_bios_memio", 1);
6304 /* Clear the status register */
6305 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6306 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6307 udelay(25); /* 25 us */
6309 writeb(0x50, ha
->mem_ptr
+ IPS_REG_FLDP
);
6310 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6311 udelay(25); /* 25 us */
6314 writeb(0x20, ha
->mem_ptr
+ IPS_REG_FLDP
);
6315 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6316 udelay(25); /* 25 us */
6319 writeb(0xD0, ha
->mem_ptr
+ IPS_REG_FLDP
);
6320 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6321 udelay(25); /* 25 us */
6324 writeb(0x70, ha
->mem_ptr
+ IPS_REG_FLDP
);
6325 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6326 udelay(25); /* 25 us */
6328 timeout
= 80000; /* 80 seconds */
6330 while (timeout
> 0) {
6331 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6332 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6333 udelay(25); /* 25 us */
6336 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6345 /* check for timeout */
6349 /* try to suspend the erase */
6350 writeb(0xB0, ha
->mem_ptr
+ IPS_REG_FLDP
);
6351 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6352 udelay(25); /* 25 us */
6354 /* wait for 10 seconds */
6356 while (timeout
> 0) {
6357 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6358 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6359 udelay(25); /* 25 us */
6362 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6374 /* check for valid VPP */
6379 /* check for successful flash */
6381 /* sequence error */
6384 /* Otherwise, we were successful */
6386 writeb(0x50, ha
->mem_ptr
+ IPS_REG_FLDP
);
6387 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6388 udelay(25); /* 25 us */
6391 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6392 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6393 udelay(25); /* 25 us */
6398 /****************************************************************************/
6400 /* Routine Name: ips_program_bios */
6402 /* Routine Description: */
6403 /* Program the BIOS on the adapter */
6405 /****************************************************************************/
6407 ips_program_bios(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6414 METHOD_TRACE("ips_program_bios", 1);
6418 for (i
= 0; i
< buffersize
; i
++) {
6420 outl(cpu_to_le32(i
+ offset
), ha
->io_addr
+ IPS_REG_FLAP
);
6421 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6422 udelay(25); /* 25 us */
6424 outb(0x40, ha
->io_addr
+ IPS_REG_FLDP
);
6425 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6426 udelay(25); /* 25 us */
6428 outb(buffer
[i
], ha
->io_addr
+ IPS_REG_FLDP
);
6429 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6430 udelay(25); /* 25 us */
6432 /* wait up to one second */
6434 while (timeout
> 0) {
6435 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6436 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6437 udelay(25); /* 25 us */
6440 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6451 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6452 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6453 udelay(25); /* 25 us */
6455 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6456 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6457 udelay(25); /* 25 us */
6462 /* check the status */
6463 if (status
& 0x18) {
6464 /* programming error */
6465 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6466 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6467 udelay(25); /* 25 us */
6469 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6470 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6471 udelay(25); /* 25 us */
6477 /* Enable reading */
6478 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6479 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6480 udelay(25); /* 25 us */
6482 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6483 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6484 udelay(25); /* 25 us */
6489 /****************************************************************************/
6491 /* Routine Name: ips_program_bios_memio */
6493 /* Routine Description: */
6494 /* Program the BIOS on the adapter */
6496 /****************************************************************************/
6498 ips_program_bios_memio(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6505 METHOD_TRACE("ips_program_bios_memio", 1);
6509 for (i
= 0; i
< buffersize
; i
++) {
6511 writel(i
+ offset
, ha
->mem_ptr
+ IPS_REG_FLAP
);
6512 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6513 udelay(25); /* 25 us */
6515 writeb(0x40, ha
->mem_ptr
+ IPS_REG_FLDP
);
6516 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6517 udelay(25); /* 25 us */
6519 writeb(buffer
[i
], ha
->mem_ptr
+ IPS_REG_FLDP
);
6520 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6521 udelay(25); /* 25 us */
6523 /* wait up to one second */
6525 while (timeout
> 0) {
6526 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6527 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6528 udelay(25); /* 25 us */
6531 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6542 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6543 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6544 udelay(25); /* 25 us */
6546 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6547 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6548 udelay(25); /* 25 us */
6553 /* check the status */
6554 if (status
& 0x18) {
6555 /* programming error */
6556 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6557 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6558 udelay(25); /* 25 us */
6560 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6561 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6562 udelay(25); /* 25 us */
6568 /* Enable reading */
6569 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6570 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6571 udelay(25); /* 25 us */
6573 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6574 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6575 udelay(25); /* 25 us */
6580 /****************************************************************************/
6582 /* Routine Name: ips_verify_bios */
6584 /* Routine Description: */
6585 /* Verify the BIOS on the adapter */
6587 /****************************************************************************/
6589 ips_verify_bios(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6595 METHOD_TRACE("ips_verify_bios", 1);
6598 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6599 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6600 udelay(25); /* 25 us */
6602 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0x55)
6605 outl(cpu_to_le32(1), ha
->io_addr
+ IPS_REG_FLAP
);
6606 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6607 udelay(25); /* 25 us */
6608 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0xAA)
6612 for (i
= 2; i
< buffersize
; i
++) {
6614 outl(cpu_to_le32(i
+ offset
), ha
->io_addr
+ IPS_REG_FLAP
);
6615 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6616 udelay(25); /* 25 us */
6618 checksum
= (uint8_t) checksum
+ inb(ha
->io_addr
+ IPS_REG_FLDP
);
6629 /****************************************************************************/
6631 /* Routine Name: ips_verify_bios_memio */
6633 /* Routine Description: */
6634 /* Verify the BIOS on the adapter */
6636 /****************************************************************************/
6638 ips_verify_bios_memio(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6644 METHOD_TRACE("ips_verify_bios_memio", 1);
6647 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6648 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6649 udelay(25); /* 25 us */
6651 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0x55)
6654 writel(1, ha
->mem_ptr
+ IPS_REG_FLAP
);
6655 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6656 udelay(25); /* 25 us */
6657 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0xAA)
6661 for (i
= 2; i
< buffersize
; i
++) {
6663 writel(i
+ offset
, ha
->mem_ptr
+ IPS_REG_FLAP
);
6664 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6665 udelay(25); /* 25 us */
6668 (uint8_t) checksum
+ readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6679 /****************************************************************************/
6681 /* Routine Name: ips_abort_init */
6683 /* Routine Description: */
6684 /* cleanup routine for a failed adapter initialization */
6685 /****************************************************************************/
6687 ips_abort_init(ips_ha_t
* ha
, int index
)
6691 ips_ha
[index
] = NULL
;
6692 ips_sh
[index
] = NULL
;
6696 /****************************************************************************/
6698 /* Routine Name: ips_shift_controllers */
6700 /* Routine Description: */
6701 /* helper function for ordering adapters */
6702 /****************************************************************************/
6704 ips_shift_controllers(int lowindex
, int highindex
)
6706 ips_ha_t
*ha_sav
= ips_ha
[highindex
];
6707 struct Scsi_Host
*sh_sav
= ips_sh
[highindex
];
6710 for (i
= highindex
; i
> lowindex
; i
--) {
6711 ips_ha
[i
] = ips_ha
[i
- 1];
6712 ips_sh
[i
] = ips_sh
[i
- 1];
6713 ips_ha
[i
]->host_num
= i
;
6715 ha_sav
->host_num
= lowindex
;
6716 ips_ha
[lowindex
] = ha_sav
;
6717 ips_sh
[lowindex
] = sh_sav
;
6720 /****************************************************************************/
6722 /* Routine Name: ips_order_controllers */
6724 /* Routine Description: */
6725 /* place controllers is the "proper" boot order */
6726 /****************************************************************************/
6728 ips_order_controllers(void)
6730 int i
, j
, tmp
, position
= 0;
6731 IPS_NVRAM_P5
*nvram
;
6734 nvram
= ips_ha
[0]->nvram
;
6736 if (nvram
->adapter_order
[0]) {
6737 for (i
= 1; i
<= nvram
->adapter_order
[0]; i
++) {
6738 for (j
= position
; j
< ips_num_controllers
; j
++) {
6739 switch (ips_ha
[j
]->ad_type
) {
6740 case IPS_ADTYPE_SERVERAID6M
:
6741 case IPS_ADTYPE_SERVERAID7M
:
6742 if (nvram
->adapter_order
[i
] == 'M') {
6743 ips_shift_controllers(position
,
6748 case IPS_ADTYPE_SERVERAID4L
:
6749 case IPS_ADTYPE_SERVERAID4M
:
6750 case IPS_ADTYPE_SERVERAID4MX
:
6751 case IPS_ADTYPE_SERVERAID4LX
:
6752 if (nvram
->adapter_order
[i
] == 'N') {
6753 ips_shift_controllers(position
,
6758 case IPS_ADTYPE_SERVERAID6I
:
6759 case IPS_ADTYPE_SERVERAID5I2
:
6760 case IPS_ADTYPE_SERVERAID5I1
:
6761 case IPS_ADTYPE_SERVERAID7k
:
6762 if (nvram
->adapter_order
[i
] == 'S') {
6763 ips_shift_controllers(position
,
6768 case IPS_ADTYPE_SERVERAID
:
6769 case IPS_ADTYPE_SERVERAID2
:
6770 case IPS_ADTYPE_NAVAJO
:
6771 case IPS_ADTYPE_KIOWA
:
6772 case IPS_ADTYPE_SERVERAID3L
:
6773 case IPS_ADTYPE_SERVERAID3
:
6774 case IPS_ADTYPE_SERVERAID4H
:
6775 if (nvram
->adapter_order
[i
] == 'A') {
6776 ips_shift_controllers(position
,
6786 /* if adapter_order[0], then ordering is complete */
6789 /* old bios, use older ordering */
6791 for (i
= position
; i
< ips_num_controllers
; i
++) {
6792 if (ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID5I2
||
6793 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID5I1
) {
6794 ips_shift_controllers(position
, i
);
6799 /* if there were no 5I cards, then don't do any extra ordering */
6802 for (i
= position
; i
< ips_num_controllers
; i
++) {
6803 if (ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4L
||
6804 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4M
||
6805 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4LX
||
6806 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4MX
) {
6807 ips_shift_controllers(position
, i
);
6815 /****************************************************************************/
6817 /* Routine Name: ips_register_scsi */
6819 /* Routine Description: */
6820 /* perform any registration and setup with the scsi layer */
6821 /****************************************************************************/
6823 ips_register_scsi(int index
)
6825 struct Scsi_Host
*sh
;
6826 ips_ha_t
*ha
, *oldha
= ips_ha
[index
];
6827 sh
= scsi_host_alloc(&ips_driver_template
, sizeof (ips_ha_t
));
6829 IPS_PRINTK(KERN_WARNING
, oldha
->pcidev
,
6830 "Unable to register controller with SCSI subsystem\n");
6834 memcpy(ha
, oldha
, sizeof (ips_ha_t
));
6835 free_irq(oldha
->pcidev
->irq
, oldha
);
6836 /* Install the interrupt handler with the new ha */
6837 if (request_irq(ha
->pcidev
->irq
, do_ipsintr
, IRQF_SHARED
, ips_name
, ha
)) {
6838 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
6839 "Unable to install interrupt handler\n");
6848 /* Store away needed values for later use */
6849 sh
->unique_id
= (ha
->io_addr
) ? ha
->io_addr
: ha
->mem_addr
;
6850 sh
->sg_tablesize
= sh
->hostt
->sg_tablesize
;
6851 sh
->can_queue
= sh
->hostt
->can_queue
;
6852 sh
->cmd_per_lun
= sh
->hostt
->cmd_per_lun
;
6853 sh
->unchecked_isa_dma
= sh
->hostt
->unchecked_isa_dma
;
6854 sh
->use_clustering
= sh
->hostt
->use_clustering
;
6855 sh
->max_sectors
= 128;
6857 sh
->max_id
= ha
->ntargets
;
6858 sh
->max_lun
= ha
->nlun
;
6859 sh
->max_channel
= ha
->nbus
- 1;
6860 sh
->can_queue
= ha
->max_cmds
- 1;
6862 scsi_add_host(sh
, NULL
);
6868 /*---------------------------------------------------------------------------*/
6869 /* Routine Name: ips_remove_device */
6871 /* Routine Description: */
6872 /* Remove one Adapter ( Hot Plugging ) */
6873 /*---------------------------------------------------------------------------*/
6874 static void __devexit
6875 ips_remove_device(struct pci_dev
*pci_dev
)
6877 struct Scsi_Host
*sh
= pci_get_drvdata(pci_dev
);
6879 pci_set_drvdata(pci_dev
, NULL
);
6883 pci_release_regions(pci_dev
);
6884 pci_disable_device(pci_dev
);
6887 /****************************************************************************/
6889 /* Routine Name: ips_module_init */
6891 /* Routine Description: */
6892 /* function called on module load */
6893 /****************************************************************************/
6895 ips_module_init(void)
6897 if (pci_register_driver(&ips_pci_driver
) < 0)
6899 ips_driver_template
.module
= THIS_MODULE
;
6900 ips_order_controllers();
6901 if (!ips_detect(&ips_driver_template
)) {
6902 pci_unregister_driver(&ips_pci_driver
);
6905 register_reboot_notifier(&ips_notifier
);
6909 /****************************************************************************/
6911 /* Routine Name: ips_module_exit */
6913 /* Routine Description: */
6914 /* function called on module unload */
6915 /****************************************************************************/
6917 ips_module_exit(void)
6919 pci_unregister_driver(&ips_pci_driver
);
6920 unregister_reboot_notifier(&ips_notifier
);
6923 module_init(ips_module_init
);
6924 module_exit(ips_module_exit
);
6926 /*---------------------------------------------------------------------------*/
6927 /* Routine Name: ips_insert_device */
6929 /* Routine Description: */
6930 /* Add One Adapter ( Hot Plug ) */
6933 /* 0 if Successful, else non-zero */
6934 /*---------------------------------------------------------------------------*/
6935 static int __devinit
6936 ips_insert_device(struct pci_dev
*pci_dev
, const struct pci_device_id
*ent
)
6941 METHOD_TRACE("ips_insert_device", 1);
6942 rc
= pci_enable_device(pci_dev
);
6946 rc
= pci_request_regions(pci_dev
, "ips");
6950 rc
= ips_init_phase1(pci_dev
, &index
);
6952 rc
= ips_init_phase2(index
);
6955 if (ips_register_scsi(index
)) {
6956 ips_free(ips_ha
[index
]);
6961 ips_num_controllers
++;
6963 ips_next_controller
= ips_num_controllers
;
6967 goto err_out_regions
;
6970 pci_set_drvdata(pci_dev
, ips_sh
[index
]);
6974 pci_release_regions(pci_dev
);
6976 pci_disable_device(pci_dev
);
6980 /*---------------------------------------------------------------------------*/
6981 /* Routine Name: ips_init_phase1 */
6983 /* Routine Description: */
6984 /* Adapter Initialization */
6987 /* 0 if Successful, else non-zero */
6988 /*---------------------------------------------------------------------------*/
6990 ips_init_phase1(struct pci_dev
*pci_dev
, int *indexPtr
)
7001 dma_addr_t dma_address
;
7002 char __iomem
*ioremap_ptr
;
7003 char __iomem
*mem_ptr
;
7006 METHOD_TRACE("ips_init_phase1", 1);
7007 index
= IPS_MAX_ADAPTERS
;
7008 for (j
= 0; j
< IPS_MAX_ADAPTERS
; j
++) {
7009 if (ips_ha
[j
] == NULL
) {
7015 if (index
>= IPS_MAX_ADAPTERS
)
7018 /* stuff that we get in dev */
7019 bus
= pci_dev
->bus
->number
;
7020 func
= pci_dev
->devfn
;
7022 /* Init MEM/IO addresses to 0 */
7028 for (j
= 0; j
< 2; j
++) {
7029 if (!pci_resource_start(pci_dev
, j
))
7032 if (pci_resource_flags(pci_dev
, j
) & IORESOURCE_IO
) {
7033 io_addr
= pci_resource_start(pci_dev
, j
);
7034 io_len
= pci_resource_len(pci_dev
, j
);
7036 mem_addr
= pci_resource_start(pci_dev
, j
);
7037 mem_len
= pci_resource_len(pci_dev
, j
);
7041 /* setup memory mapped area (if applicable) */
7046 base
= mem_addr
& PAGE_MASK
;
7047 offs
= mem_addr
- base
;
7048 ioremap_ptr
= ioremap(base
, PAGE_SIZE
);
7051 mem_ptr
= ioremap_ptr
+ offs
;
7057 /* found a controller */
7058 ha
= kzalloc(sizeof (ips_ha_t
), GFP_KERNEL
);
7060 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7061 "Unable to allocate temporary ha struct\n");
7065 ips_sh
[index
] = NULL
;
7069 /* Store info in HA structure */
7070 ha
->io_addr
= io_addr
;
7071 ha
->io_len
= io_len
;
7072 ha
->mem_addr
= mem_addr
;
7073 ha
->mem_len
= mem_len
;
7074 ha
->mem_ptr
= mem_ptr
;
7075 ha
->ioremap_ptr
= ioremap_ptr
;
7076 ha
->host_num
= (uint32_t) index
;
7077 ha
->slot_num
= PCI_SLOT(pci_dev
->devfn
);
7078 ha
->pcidev
= pci_dev
;
7081 * Set the pci_dev's dma_mask. Not all adapters support 64bit
7082 * addressing so don't enable it if the adapter can't support
7083 * it! Also, don't use 64bit addressing if dma addresses
7084 * are guaranteed to be < 4G.
7086 if (IPS_ENABLE_DMA64
&& IPS_HAS_ENH_SGLIST(ha
) &&
7087 !pci_set_dma_mask(ha
->pcidev
, DMA_64BIT_MASK
)) {
7088 (ha
)->flags
|= IPS_HA_ENH_SG
;
7090 if (pci_set_dma_mask(ha
->pcidev
, DMA_32BIT_MASK
) != 0) {
7091 printk(KERN_WARNING
"Unable to set DMA Mask\n");
7092 return ips_abort_init(ha
, index
);
7095 if(ips_cd_boot
&& !ips_FlashData
){
7096 ips_FlashData
= pci_alloc_consistent(pci_dev
, PAGE_SIZE
<< 7,
7100 ha
->enq
= pci_alloc_consistent(pci_dev
, sizeof (IPS_ENQ
),
7103 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7104 "Unable to allocate host inquiry structure\n");
7105 return ips_abort_init(ha
, index
);
7108 ha
->adapt
= pci_alloc_consistent(pci_dev
, sizeof (IPS_ADAPTER
) +
7109 sizeof (IPS_IO_CMD
), &dma_address
);
7111 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7112 "Unable to allocate host adapt & dummy structures\n");
7113 return ips_abort_init(ha
, index
);
7115 ha
->adapt
->hw_status_start
= dma_address
;
7116 ha
->dummy
= (void *) (ha
->adapt
+ 1);
7120 ha
->logical_drive_info
= pci_alloc_consistent(pci_dev
, sizeof (IPS_LD_INFO
), &dma_address
);
7121 if (!ha
->logical_drive_info
) {
7122 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7123 "Unable to allocate logical drive info structure\n");
7124 return ips_abort_init(ha
, index
);
7126 ha
->logical_drive_info_dma_addr
= dma_address
;
7129 ha
->conf
= kmalloc(sizeof (IPS_CONF
), GFP_KERNEL
);
7132 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7133 "Unable to allocate host conf structure\n");
7134 return ips_abort_init(ha
, index
);
7137 ha
->nvram
= kmalloc(sizeof (IPS_NVRAM_P5
), GFP_KERNEL
);
7140 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7141 "Unable to allocate host NVRAM structure\n");
7142 return ips_abort_init(ha
, index
);
7145 ha
->subsys
= kmalloc(sizeof (IPS_SUBSYS
), GFP_KERNEL
);
7148 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7149 "Unable to allocate host subsystem structure\n");
7150 return ips_abort_init(ha
, index
);
7153 /* the ioctl buffer is now used during adapter initialization, so its
7154 * successful allocation is now required */
7155 if (ips_ioctlsize
< PAGE_SIZE
)
7156 ips_ioctlsize
= PAGE_SIZE
;
7158 ha
->ioctl_data
= pci_alloc_consistent(pci_dev
, ips_ioctlsize
,
7159 &ha
->ioctl_busaddr
);
7160 ha
->ioctl_len
= ips_ioctlsize
;
7161 if (!ha
->ioctl_data
) {
7162 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7163 "Unable to allocate IOCTL data\n");
7164 return ips_abort_init(ha
, index
);
7170 ips_setup_funclist(ha
);
7172 if ((IPS_IS_MORPHEUS(ha
)) || (IPS_IS_MARCO(ha
))) {
7173 /* If Morpheus appears dead, reset it */
7174 IsDead
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG1
);
7175 if (IsDead
== 0xDEADBEEF) {
7176 ips_reset_morpheus(ha
);
7181 * Initialize the card if it isn't already
7184 if (!(*ha
->func
.isinit
) (ha
)) {
7185 if (!(*ha
->func
.init
) (ha
)) {
7187 * Initialization failed
7189 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7190 "Unable to initialize controller\n");
7191 return ips_abort_init(ha
, index
);
7199 /*---------------------------------------------------------------------------*/
7200 /* Routine Name: ips_init_phase2 */
7202 /* Routine Description: */
7203 /* Adapter Initialization Phase 2 */
7206 /* 0 if Successful, else non-zero */
7207 /*---------------------------------------------------------------------------*/
7209 ips_init_phase2(int index
)
7215 METHOD_TRACE("ips_init_phase2", 1);
7217 ips_ha
[index
] = NULL
;
7221 /* Install the interrupt handler */
7222 if (request_irq(ha
->pcidev
->irq
, do_ipsintr
, IRQF_SHARED
, ips_name
, ha
)) {
7223 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7224 "Unable to install interrupt handler\n");
7225 return ips_abort_init(ha
, index
);
7229 * Allocate a temporary SCB for initialization
7232 if (!ips_allocatescbs(ha
)) {
7233 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7234 "Unable to allocate a CCB\n");
7235 free_irq(ha
->pcidev
->irq
, ha
);
7236 return ips_abort_init(ha
, index
);
7239 if (!ips_hainit(ha
)) {
7240 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7241 "Unable to initialize controller\n");
7242 free_irq(ha
->pcidev
->irq
, ha
);
7243 return ips_abort_init(ha
, index
);
7245 /* Free the temporary SCB */
7246 ips_deallocatescbs(ha
, 1);
7249 if (!ips_allocatescbs(ha
)) {
7250 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7251 "Unable to allocate CCBs\n");
7252 free_irq(ha
->pcidev
->irq
, ha
);
7253 return ips_abort_init(ha
, index
);
7259 MODULE_LICENSE("GPL");
7260 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING
);
7261 MODULE_VERSION(IPS_VER_STRING
);
7265 * Overrides for Emacs so that we almost follow Linus's tabbing style.
7266 * Emacs will notice this stuff at the end of the file and automatically
7267 * adjust the settings for this buffer only. This must remain at the end
7269 * ---------------------------------------------------------------------------
7272 * c-brace-imaginary-offset: 0
7273 * c-brace-offset: -2
7274 * c-argdecl-indent: 2
7275 * c-label-offset: -2
7276 * c-continued-statement-offset: 2
7277 * c-continued-brace-offset: 0
7278 * indent-tabs-mode: nil