drivers/scsi/bfa/bfi.h

   1 /*
   2  * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
   3  * All rights reserved
   4  * www.brocade.com
   5  *
   6  * Linux driver for Brocade Fibre Channel Host Bus Adapter.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License (GPL) Version 2 as
  10  * published by the Free Software Foundation
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  */
  17
  18 #ifndef __BFI_H__
  19 #define __BFI_H__
  20
  21 #include "bfa_defs.h"
  22 #include "bfa_defs_svc.h"
  23
  24 #pragma pack(1)
  25
  26 /* Per dma segment max size */
  27 #define BFI_MEM_DMA_SEG_SZ      (131072)
  28
  29 /* Get number of dma segments required */
  30 #define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz)                           \
  31         ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) &  \
  32          ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
  33
  34 /* Get num dma reqs - that fit in a segment */
  35 #define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
  36
  37 /* Get segment num from tag */
  38 #define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
  39
  40 /* Get dma req offset in a segment */
  41 #define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz)       \
  42         ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
  43
  44 /*
  45  * BFI FW image type
  46  */
  47 #define BFI_FLASH_CHUNK_SZ                      256     /*  Flash chunk size */
  48 #define BFI_FLASH_CHUNK_SZ_WORDS        (BFI_FLASH_CHUNK_SZ/sizeof(u32))
  49
  50 /*
  51  * Msg header common to all msgs
  52  */
  53 struct bfi_mhdr_s {
  54         u8              msg_class;      /*  @ref bfi_mclass_t               */
  55         u8              msg_id;         /*  msg opcode with in the class   */
  56         union {
  57                 struct {
  58                         u8      qid;
  59                         u8      fn_lpu; /*  msg destination                 */
  60                 } h2i;
  61                 u16     i2htok; /*  token in msgs to host           */
  62         } mtag;
  63 };
  64
  65 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
  66 #define bfi_mhdr_2_fn(_mh)      ((_mh)->mtag.h2i.fn_lpu >> 1)
  67
  68 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do {                \
  69         (_mh).msg_class         = (_mc);      \
  70         (_mh).msg_id            = (_op);      \
  71         (_mh).mtag.h2i.fn_lpu   = (_fn_lpu);      \
  72 } while (0)
  73
  74 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do {                \
  75         (_mh).msg_class         = (_mc);      \
  76         (_mh).msg_id            = (_op);      \
  77         (_mh).mtag.i2htok       = (_i2htok);      \
  78 } while (0)
  79
  80 /*
  81  * Message opcodes: 0-127 to firmware, 128-255 to host
  82  */
  83 #define BFI_I2H_OPCODE_BASE     128
  84 #define BFA_I2HM(_x)            ((_x) + BFI_I2H_OPCODE_BASE)
  85
  86 /*
  87  ****************************************************************************
  88  *
  89  * Scatter Gather Element and Page definition
  90  *
  91  ****************************************************************************
  92  */
  93
  94 #define BFI_SGE_INLINE  1
  95 #define BFI_SGE_INLINE_MAX      (BFI_SGE_INLINE + 1)
  96
  97 /*
  98  * SG Flags
  99  */
 100 enum {
 101         BFI_SGE_DATA            = 0,    /*  data address, not last           */
 102         BFI_SGE_DATA_CPL        = 1,    /*  data addr, last in current page */
 103         BFI_SGE_DATA_LAST       = 3,    /*  data address, last               */
 104         BFI_SGE_LINK            = 2,    /*  link address                     */
 105         BFI_SGE_PGDLEN          = 2,    /*  cumulative data length for page */
 106 };
 107
 108 /*
 109  * DMA addresses
 110  */
 111 union bfi_addr_u {
 112         struct {
 113                 __be32  addr_lo;
 114                 __be32  addr_hi;
 115         } a32;
 116 };
 117
 118 /*
 119  * Scatter Gather Element used for fast-path IO requests
 120  */
 121 struct bfi_sge_s {
 122 #ifdef __BIG_ENDIAN
 123         u32     flags:2,
 124                         rsvd:2,
 125                         sg_len:28;
 126 #else
 127         u32     sg_len:28,
 128                         rsvd:2,
 129                         flags:2;
 130 #endif
 131         union bfi_addr_u sga;
 132 };
 133
 134 /**
 135  * Generic DMA addr-len pair.
 136  */
 137 struct bfi_alen_s {
 138         union bfi_addr_u        al_addr;        /* DMA addr of buffer   */
 139         u32                     al_len;         /* length of buffer     */
 140 };
 141
 142 /*
 143  * Scatter Gather Page
 144  */
 145 #define BFI_SGPG_DATA_SGES              7
 146 #define BFI_SGPG_SGES_MAX               (BFI_SGPG_DATA_SGES + 1)
 147 #define BFI_SGPG_RSVD_WD_LEN    8
 148 struct bfi_sgpg_s {
 149         struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
 150         u32     rsvd[BFI_SGPG_RSVD_WD_LEN];
 151 };
 152
 153 /* FCP module definitions */
 154 #define BFI_IO_MAX      (2000)
 155 #define BFI_IOIM_SNSLEN (256)
 156 #define BFI_IOIM_SNSBUF_SEGS    \
 157         BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
 158
 159 /*
 160  * Large Message structure - 128 Bytes size Msgs
 161  */
 162 #define BFI_LMSG_SZ             128
 163 #define BFI_LMSG_PL_WSZ \
 164                         ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
 165
 166 struct bfi_msg_s {
 167         struct bfi_mhdr_s mhdr;
 168         u32     pl[BFI_LMSG_PL_WSZ];
 169 };
 170
 171 /*
 172  * Mailbox message structure
 173  */
 174 #define BFI_MBMSG_SZ            7
 175 struct bfi_mbmsg_s {
 176         struct bfi_mhdr_s       mh;
 177         u32             pl[BFI_MBMSG_SZ];
 178 };
 179
 180 /*
 181  * Supported PCI function class codes (personality)
 182  */
 183 enum bfi_pcifn_class {
 184         BFI_PCIFN_CLASS_FC  = 0x0c04,
 185         BFI_PCIFN_CLASS_ETH = 0x0200,
 186 };
 187
 188 /*
 189  * Message Classes
 190  */
 191 enum bfi_mclass {
 192         BFI_MC_IOC              = 1,    /*  IO Controller (IOC)     */
 193         BFI_MC_DIAG             = 2,    /*  Diagnostic Msgs            */
 194         BFI_MC_FLASH            = 3,    /*  Flash message class */
 195         BFI_MC_CEE              = 4,    /*  CEE */
 196         BFI_MC_FCPORT           = 5,    /*  FC port                         */
 197         BFI_MC_IOCFC            = 6,    /*  FC - IO Controller (IOC)        */
 198         BFI_MC_ABLK             = 7,    /*  ASIC block configuration        */
 199         BFI_MC_UF               = 8,    /*  Unsolicited frame receive       */
 200         BFI_MC_FCXP             = 9,    /*  FC Transport                    */
 201         BFI_MC_LPS              = 10,   /*  lport fc login services         */
 202         BFI_MC_RPORT            = 11,   /*  Remote port             */
 203         BFI_MC_ITN              = 12,   /*  I-T nexus (Initiator mode)      */
 204         BFI_MC_IOIM_READ        = 13,   /*  read IO (Initiator mode)        */
 205         BFI_MC_IOIM_WRITE       = 14,   /*  write IO (Initiator mode)       */
 206         BFI_MC_IOIM_IO          = 15,   /*  IO (Initiator mode)     */
 207         BFI_MC_IOIM             = 16,   /*  IO (Initiator mode)     */
 208         BFI_MC_IOIM_IOCOM       = 17,   /*  good IO completion              */
 209         BFI_MC_TSKIM            = 18,   /*  Initiator Task management       */
 210         BFI_MC_PORT             = 21,   /*  Physical port                   */
 211         BFI_MC_SFP              = 22,   /*  SFP module  */
 212         BFI_MC_PHY              = 25,   /*  External PHY message class  */
 213         BFI_MC_MAX              = 32
 214 };
 215
 216 #define BFI_IOC_MAX_CQS         4
 217 #define BFI_IOC_MAX_CQS_ASIC    8
 218 #define BFI_IOC_MSGLEN_MAX      32      /* 32 bytes */
 219
 220 /*
 221  *----------------------------------------------------------------------
 222  *                              IOC
 223  *----------------------------------------------------------------------
 224  */
 225
 226 /*
 227  * Different asic generations
 228  */
 229 enum bfi_asic_gen {
 230         BFI_ASIC_GEN_CB         = 1,    /* crossbow 8G FC               */
 231         BFI_ASIC_GEN_CT         = 2,    /* catapult 8G FC or 10G CNA    */
 232         BFI_ASIC_GEN_CT2        = 3,    /* catapult-2 16G FC or 10G CNA */
 233 };
 234
 235 enum bfi_asic_mode {
 236         BFI_ASIC_MODE_FC        = 1,    /* FC upto 8G speed             */
 237         BFI_ASIC_MODE_FC16      = 2,    /* FC upto 16G speed            */
 238         BFI_ASIC_MODE_ETH       = 3,    /* Ethernet ports               */
 239         BFI_ASIC_MODE_COMBO     = 4,    /* FC 16G and Ethernet 10G port */
 240 };
 241
 242 enum bfi_ioc_h2i_msgs {
 243         BFI_IOC_H2I_ENABLE_REQ          = 1,
 244         BFI_IOC_H2I_DISABLE_REQ         = 2,
 245         BFI_IOC_H2I_GETATTR_REQ         = 3,
 246         BFI_IOC_H2I_DBG_SYNC            = 4,
 247         BFI_IOC_H2I_DBG_DUMP            = 5,
 248 };
 249
 250 enum bfi_ioc_i2h_msgs {
 251         BFI_IOC_I2H_ENABLE_REPLY        = BFA_I2HM(1),
 252         BFI_IOC_I2H_DISABLE_REPLY       = BFA_I2HM(2),
 253         BFI_IOC_I2H_GETATTR_REPLY       = BFA_I2HM(3),
 254         BFI_IOC_I2H_HBEAT               = BFA_I2HM(4),
 255         BFI_IOC_I2H_ACQ_ADDR_REPLY      = BFA_I2HM(5),
 256 };
 257
 258 /*
 259  * BFI_IOC_H2I_GETATTR_REQ message
 260  */
 261 struct bfi_ioc_getattr_req_s {
 262         struct bfi_mhdr_s       mh;
 263         union bfi_addr_u        attr_addr;
 264 };
 265
 266 struct bfi_ioc_attr_s {
 267         wwn_t           mfg_pwwn;       /*  Mfg port wwn           */
 268         wwn_t           mfg_nwwn;       /*  Mfg node wwn           */
 269         mac_t           mfg_mac;        /*  Mfg mac                */
 270         u8              port_mode;      /* bfi_port_mode           */
 271         u8              rsvd_a;
 272         wwn_t           pwwn;
 273         wwn_t           nwwn;
 274         mac_t           mac;            /*  PBC or Mfg mac         */
 275         u16     rsvd_b;
 276         mac_t           fcoe_mac;
 277         u16     rsvd_c;
 278         char            brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
 279         u8              pcie_gen;
 280         u8              pcie_lanes_orig;
 281         u8              pcie_lanes;
 282         u8              rx_bbcredit;    /*  receive buffer credits */
 283         u32     adapter_prop;   /*  adapter properties     */
 284         u16     maxfrsize;      /*  max receive frame size */
 285         char            asic_rev;
 286         u8              rsvd_d;
 287         char            fw_version[BFA_VERSION_LEN];
 288         char            optrom_version[BFA_VERSION_LEN];
 289         struct          bfa_mfg_vpd_s   vpd;
 290         u32     card_type;      /*  card type                   */
 291 };
 292
 293 /*
 294  * BFI_IOC_I2H_GETATTR_REPLY message
 295  */
 296 struct bfi_ioc_getattr_reply_s {
 297         struct  bfi_mhdr_s      mh;     /*  Common msg header           */
 298         u8                      status; /*  cfg reply status            */
 299         u8                      rsvd[3];
 300 };
 301
 302 /*
 303  * Firmware memory page offsets
 304  */
 305 #define BFI_IOC_SMEM_PG0_CB     (0x40)
 306 #define BFI_IOC_SMEM_PG0_CT     (0x180)
 307
 308 /*
 309  * Firmware statistic offset
 310  */
 311 #define BFI_IOC_FWSTATS_OFF     (0x6B40)
 312 #define BFI_IOC_FWSTATS_SZ      (4096)
 313
 314 /*
 315  * Firmware trace offset
 316  */
 317 #define BFI_IOC_TRC_OFF         (0x4b00)
 318 #define BFI_IOC_TRC_ENTS        256
 319
 320 #define BFI_IOC_FW_SIGNATURE    (0xbfadbfad)
 321 #define BFI_IOC_MD5SUM_SZ       4
 322 struct bfi_ioc_image_hdr_s {
 323         u32     signature;      /* constant signature           */
 324         u8      asic_gen;       /* asic generation              */
 325         u8      asic_mode;
 326         u8      port0_mode;     /* device mode for port 0       */
 327         u8      port1_mode;     /* device mode for port 1       */
 328         u32     exec;           /* exec vector                  */
 329         u32     bootenv;        /* fimware boot env             */
 330         u32     rsvd_b[4];
 331         u32     md5sum[BFI_IOC_MD5SUM_SZ];
 332 };
 333
 334 #define BFI_FWBOOT_DEVMODE_OFF          4
 335 #define BFI_FWBOOT_TYPE_OFF             8
 336 #define BFI_FWBOOT_ENV_OFF              12
 337 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
 338         (((u32)(__asic_gen)) << 24 |            \
 339          ((u32)(__asic_mode)) << 16 |           \
 340          ((u32)(__p0_mode)) << 8 |              \
 341          ((u32)(__p1_mode)))
 342
 343 #define BFI_FWBOOT_TYPE_NORMAL  0
 344 #define BFI_FWBOOT_TYPE_MEMTEST 2
 345 #define BFI_FWBOOT_ENV_OS       0
 346
 347 enum bfi_port_mode {
 348         BFI_PORT_MODE_FC        = 1,
 349         BFI_PORT_MODE_ETH       = 2,
 350 };
 351
 352 struct bfi_ioc_hbeat_s {
 353         struct bfi_mhdr_s  mh;          /*  common msg header           */
 354         u32        hb_count;    /*  current heart beat count    */
 355 };
 356
 357 /*
 358  * IOC hardware/firmware state
 359  */
 360 enum bfi_ioc_state {
 361         BFI_IOC_UNINIT          = 0,    /*  not initialized                  */
 362         BFI_IOC_INITING         = 1,    /*  h/w is being initialized         */
 363         BFI_IOC_HWINIT          = 2,    /*  h/w is initialized               */
 364         BFI_IOC_CFG             = 3,    /*  IOC configuration in progress   */
 365         BFI_IOC_OP              = 4,    /*  IOC is operational               */
 366         BFI_IOC_DISABLING       = 5,    /*  IOC is being disabled            */
 367         BFI_IOC_DISABLED        = 6,    /*  IOC is disabled                  */
 368         BFI_IOC_CFG_DISABLED    = 7,    /*  IOC is being disabled;transient */
 369         BFI_IOC_FAIL            = 8,    /*  IOC heart-beat failure           */
 370         BFI_IOC_MEMTEST         = 9,    /*  IOC is doing memtest             */
 371 };
 372
 373 #define BFI_IOC_ENDIAN_SIG  0x12345678
 374
 375 enum {
 376         BFI_ADAPTER_TYPE_FC     = 0x01,         /*  FC adapters    */
 377         BFI_ADAPTER_TYPE_MK     = 0x0f0000,     /*  adapter type mask     */
 378         BFI_ADAPTER_TYPE_SH     = 16,           /*  adapter type shift    */
 379         BFI_ADAPTER_NPORTS_MK   = 0xff00,       /*  number of ports mask  */
 380         BFI_ADAPTER_NPORTS_SH   = 8,            /*  number of ports shift */
 381         BFI_ADAPTER_SPEED_MK    = 0xff,         /*  adapter speed mask    */
 382         BFI_ADAPTER_SPEED_SH    = 0,            /*  adapter speed shift   */
 383         BFI_ADAPTER_PROTO       = 0x100000,     /*  prototype adapaters   */
 384         BFI_ADAPTER_TTV         = 0x200000,     /*  TTV debug capable     */
 385         BFI_ADAPTER_UNSUPP      = 0x400000,     /*  unknown adapter type  */
 386 };
 387
 388 #define BFI_ADAPTER_GETP(__prop, __adap_prop)                   \
 389         (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >>     \
 390                 BFI_ADAPTER_ ## __prop ## _SH)
 391 #define BFI_ADAPTER_SETP(__prop, __val)                         \
 392         ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
 393 #define BFI_ADAPTER_IS_PROTO(__adap_type)                       \
 394         ((__adap_type) & BFI_ADAPTER_PROTO)
 395 #define BFI_ADAPTER_IS_TTV(__adap_type)                         \
 396         ((__adap_type) & BFI_ADAPTER_TTV)
 397 #define BFI_ADAPTER_IS_UNSUPP(__adap_type)                      \
 398         ((__adap_type) & BFI_ADAPTER_UNSUPP)
 399 #define BFI_ADAPTER_IS_SPECIAL(__adap_type)                     \
 400         ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
 401                         BFI_ADAPTER_UNSUPP))
 402
 403 /*
 404  * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
 405  */
 406 struct bfi_ioc_ctrl_req_s {
 407         struct bfi_mhdr_s       mh;
 408         u16                     clscode;
 409         u16                     rsvd;
 410         u32             tv_sec;
 411 };
 412 #define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
 413 #define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
 414
 415 /*
 416  * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
 417  */
 418 struct bfi_ioc_ctrl_reply_s {
 419         struct bfi_mhdr_s       mh;             /*  Common msg header     */
 420         u8                      status;         /*  enable/disable status */
 421         u8                      port_mode;      /*  bfa_mode_s  */
 422         u8                      cap_bm;         /*  capability bit mask */
 423         u8                      rsvd;
 424 };
 425 #define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
 426 #define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
 427
 428 #define BFI_IOC_MSGSZ   8
 429 /*
 430  * H2I Messages
 431  */
 432 union bfi_ioc_h2i_msg_u {
 433         struct bfi_mhdr_s               mh;
 434         struct bfi_ioc_ctrl_req_s       enable_req;
 435         struct bfi_ioc_ctrl_req_s       disable_req;
 436         struct bfi_ioc_getattr_req_s    getattr_req;
 437         u32                     mboxmsg[BFI_IOC_MSGSZ];
 438 };
 439
 440 /*
 441  * I2H Messages
 442  */
 443 union bfi_ioc_i2h_msg_u {
 444         struct bfi_mhdr_s               mh;
 445         struct bfi_ioc_ctrl_reply_s     fw_event;
 446         u32                     mboxmsg[BFI_IOC_MSGSZ];
 447 };
 448
 449
 450 /*
 451  *----------------------------------------------------------------------
 452  *                              PBC
 453  *----------------------------------------------------------------------
 454  */
 455
 456 #define BFI_PBC_MAX_BLUNS       8
 457 #define BFI_PBC_MAX_VPORTS      16
 458 #define BFI_PBC_PORT_DISABLED   2
 459
 460 /*
 461  * PBC boot lun configuration
 462  */
 463 struct bfi_pbc_blun_s {
 464         wwn_t           tgt_pwwn;
 465         struct scsi_lun tgt_lun;
 466 };
 467
 468 /*
 469  * PBC virtual port configuration
 470  */
 471 struct bfi_pbc_vport_s {
 472         wwn_t           vp_pwwn;
 473         wwn_t           vp_nwwn;
 474 };
 475
 476 /*
 477  * BFI pre-boot configuration information
 478  */
 479 struct bfi_pbc_s {
 480         u8              port_enabled;
 481         u8              boot_enabled;
 482         u8              nbluns;
 483         u8              nvports;
 484         u8              port_speed;
 485         u8              rsvd_a;
 486         u16     hss;
 487         wwn_t           pbc_pwwn;
 488         wwn_t           pbc_nwwn;
 489         struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
 490         struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
 491 };
 492
 493 /*
 494  *----------------------------------------------------------------------
 495  *                              MSGQ
 496  *----------------------------------------------------------------------
 497  */
 498 #define BFI_MSGQ_FULL(_q)       (((_q->pi + 1) % _q->q_depth) == _q->ci)
 499 #define BFI_MSGQ_EMPTY(_q)      (_q->pi == _q->ci)
 500 #define BFI_MSGQ_UPDATE_CI(_q)  (_q->ci = (_q->ci + 1) % _q->q_depth)
 501 #define BFI_MSGQ_UPDATE_PI(_q)  (_q->pi = (_q->pi + 1) % _q->q_depth)
 502
 503 /* q_depth must be power of 2 */
 504 #define BFI_MSGQ_FREE_CNT(_q)   ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
 505
 506 enum bfi_msgq_h2i_msgs_e {
 507         BFI_MSGQ_H2I_INIT_REQ   = 1,
 508         BFI_MSGQ_H2I_DOORBELL   = 2,
 509         BFI_MSGQ_H2I_SHUTDOWN   = 3,
 510 };
 511
 512 enum bfi_msgq_i2h_msgs_e {
 513         BFI_MSGQ_I2H_INIT_RSP   = 1,
 514         BFI_MSGQ_I2H_DOORBELL   = 2,
 515 };
 516
 517
 518 /* Messages(commands/responsed/AENS will have the following header */
 519 struct bfi_msgq_mhdr_s {
 520         u8              msg_class;
 521         u8              msg_id;
 522         u16     msg_token;
 523         u16     num_entries;
 524         u8              enet_id;
 525         u8              rsvd[1];
 526 };
 527
 528 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do {        \
 529         (_mh).msg_class         = (_mc);      \
 530         (_mh).msg_id            = (_mid);      \
 531         (_mh).msg_token         = (_tok);      \
 532         (_mh).enet_id           = (_enet_id);      \
 533 } while (0)
 534
 535 /*
 536  * Mailbox  for messaging interface
 537  *
 538 */
 539 #define BFI_MSGQ_CMD_ENTRY_SIZE         (64)    /* TBD */
 540 #define BFI_MSGQ_RSP_ENTRY_SIZE         (64)    /* TBD */
 541 #define BFI_MSGQ_MSG_SIZE_MAX           (2048)  /* TBD */
 542
 543 struct bfi_msgq_s {
 544         union bfi_addr_u addr;
 545         u16 q_depth;     /* Total num of entries in the queue */
 546         u8 rsvd[2];
 547 };
 548
 549 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
 550 struct bfi_msgq_cfg_req_s {
 551         struct bfi_mhdr_s mh;
 552         struct bfi_msgq_s cmdq;
 553         struct bfi_msgq_s rspq;
 554 };
 555
 556 /* BFI_ENET_MSGQ_CFG_RSP */
 557 struct bfi_msgq_cfg_rsp_s {
 558         struct bfi_mhdr_s mh;
 559         u8 cmd_status;
 560         u8 rsvd[3];
 561 };
 562
 563
 564 /* BFI_MSGQ_H2I_DOORBELL */
 565 struct bfi_msgq_h2i_db_s {
 566         struct bfi_mhdr_s mh;
 567         u16 cmdq_pi;
 568         u16 rspq_ci;
 569 };
 570
 571 /* BFI_MSGQ_I2H_DOORBELL */
 572 struct bfi_msgq_i2h_db_s {
 573         struct bfi_mhdr_s mh;
 574         u16 rspq_pi;
 575         u16 cmdq_ci;
 576 };
 577
 578 #pragma pack()
 579
 580 /* BFI port specific */
 581 #pragma pack(1)
 582
 583 enum bfi_port_h2i {
 584         BFI_PORT_H2I_ENABLE_REQ         = (1),
 585         BFI_PORT_H2I_DISABLE_REQ        = (2),
 586         BFI_PORT_H2I_GET_STATS_REQ      = (3),
 587         BFI_PORT_H2I_CLEAR_STATS_REQ    = (4),
 588 };
 589
 590 enum bfi_port_i2h {
 591         BFI_PORT_I2H_ENABLE_RSP         = BFA_I2HM(1),
 592         BFI_PORT_I2H_DISABLE_RSP        = BFA_I2HM(2),
 593         BFI_PORT_I2H_GET_STATS_RSP      = BFA_I2HM(3),
 594         BFI_PORT_I2H_CLEAR_STATS_RSP    = BFA_I2HM(4),
 595 };
 596
 597 /*
 598  * Generic REQ type
 599  */
 600 struct bfi_port_generic_req_s {
 601         struct bfi_mhdr_s  mh;          /*  msg header          */
 602         u32     msgtag;         /*  msgtag for reply                */
 603         u32     rsvd;
 604 };
 605
 606 /*
 607  * Generic RSP type
 608  */
 609 struct bfi_port_generic_rsp_s {
 610         struct bfi_mhdr_s  mh;          /*  common msg header               */
 611         u8              status;         /*  port enable status              */
 612         u8              rsvd[3];
 613         u32     msgtag;         /*  msgtag for reply                */
 614 };
 615
 616 /*
 617  * BFI_PORT_H2I_GET_STATS_REQ
 618  */
 619 struct bfi_port_get_stats_req_s {
 620         struct bfi_mhdr_s  mh;          /*  common msg header               */
 621         union bfi_addr_u   dma_addr;
 622 };
 623
 624 union bfi_port_h2i_msg_u {
 625         struct bfi_mhdr_s               mh;
 626         struct bfi_port_generic_req_s   enable_req;
 627         struct bfi_port_generic_req_s   disable_req;
 628         struct bfi_port_get_stats_req_s getstats_req;
 629         struct bfi_port_generic_req_s   clearstats_req;
 630 };
 631
 632 union bfi_port_i2h_msg_u {
 633         struct bfi_mhdr_s               mh;
 634         struct bfi_port_generic_rsp_s   enable_rsp;
 635         struct bfi_port_generic_rsp_s   disable_rsp;
 636         struct bfi_port_generic_rsp_s   getstats_rsp;
 637         struct bfi_port_generic_rsp_s   clearstats_rsp;
 638 };
 639
 640 /*
 641  *----------------------------------------------------------------------
 642  *                              ABLK
 643  *----------------------------------------------------------------------
 644  */
 645 enum bfi_ablk_h2i_msgs_e {
 646         BFI_ABLK_H2I_QUERY              = 1,
 647         BFI_ABLK_H2I_ADPT_CONFIG        = 2,
 648         BFI_ABLK_H2I_PORT_CONFIG        = 3,
 649         BFI_ABLK_H2I_PF_CREATE          = 4,
 650         BFI_ABLK_H2I_PF_DELETE          = 5,
 651         BFI_ABLK_H2I_PF_UPDATE          = 6,
 652         BFI_ABLK_H2I_OPTROM_ENABLE      = 7,
 653         BFI_ABLK_H2I_OPTROM_DISABLE     = 8,
 654 };
 655
 656 enum bfi_ablk_i2h_msgs_e {
 657         BFI_ABLK_I2H_QUERY              = BFA_I2HM(BFI_ABLK_H2I_QUERY),
 658         BFI_ABLK_I2H_ADPT_CONFIG        = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
 659         BFI_ABLK_I2H_PORT_CONFIG        = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
 660         BFI_ABLK_I2H_PF_CREATE          = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
 661         BFI_ABLK_I2H_PF_DELETE          = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
 662         BFI_ABLK_I2H_PF_UPDATE          = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
 663         BFI_ABLK_I2H_OPTROM_ENABLE      = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
 664         BFI_ABLK_I2H_OPTROM_DISABLE     = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
 665 };
 666
 667 /* BFI_ABLK_H2I_QUERY */
 668 struct bfi_ablk_h2i_query_s {
 669         struct bfi_mhdr_s       mh;
 670         union bfi_addr_u        addr;
 671 };
 672
 673 /* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
 674 struct bfi_ablk_h2i_cfg_req_s {
 675         struct bfi_mhdr_s       mh;
 676         u8                      mode;
 677         u8                      port;
 678         u8                      max_pf;
 679         u8                      max_vf;
 680 };
 681
 682 /*
 683  * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
 684  */
 685 struct bfi_ablk_h2i_pf_req_s {
 686         struct bfi_mhdr_s       mh;
 687         u8                      pcifn;
 688         u8                      port;
 689         u16                     pers;
 690         u32                     bw;
 691 };
 692
 693 /* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
 694 struct bfi_ablk_h2i_optrom_s {
 695         struct bfi_mhdr_s       mh;
 696 };
 697
 698 /*
 699  * BFI_ABLK_I2H_QUERY
 700  * BFI_ABLK_I2H_PORT_CONFIG
 701  * BFI_ABLK_I2H_PF_CREATE
 702  * BFI_ABLK_I2H_PF_DELETE
 703  * BFI_ABLK_I2H_PF_UPDATE
 704  * BFI_ABLK_I2H_OPTROM_ENABLE
 705  * BFI_ABLK_I2H_OPTROM_DISABLE
 706  */
 707 struct bfi_ablk_i2h_rsp_s {
 708         struct bfi_mhdr_s       mh;
 709         u8                      status;
 710         u8                      pcifn;
 711         u8                      port_mode;
 712 };
 713
 714
 715 /*
 716  *      CEE module specific messages
 717  */
 718
 719 /* Mailbox commands from host to firmware */
 720 enum bfi_cee_h2i_msgs_e {
 721         BFI_CEE_H2I_GET_CFG_REQ = 1,
 722         BFI_CEE_H2I_RESET_STATS = 2,
 723         BFI_CEE_H2I_GET_STATS_REQ = 3,
 724 };
 725
 726 enum bfi_cee_i2h_msgs_e {
 727         BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
 728         BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
 729         BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
 730 };
 731
 732 /*
 733  * H2I command structure for resetting the stats
 734  */
 735 struct bfi_cee_reset_stats_s {
 736         struct bfi_mhdr_s  mh;
 737 };
 738
 739 /*
 740  * Get configuration  command from host
 741  */
 742 struct bfi_cee_get_req_s {
 743         struct bfi_mhdr_s       mh;
 744         union bfi_addr_u        dma_addr;
 745 };
 746
 747 /*
 748  * Reply message from firmware
 749  */
 750 struct bfi_cee_get_rsp_s {
 751         struct bfi_mhdr_s       mh;
 752         u8                      cmd_status;
 753         u8                      rsvd[3];
 754 };
 755
 756 /*
 757  * Reply message from firmware
 758  */
 759 struct bfi_cee_stats_rsp_s {
 760         struct bfi_mhdr_s       mh;
 761         u8                      cmd_status;
 762         u8                      rsvd[3];
 763 };
 764
 765 /* Mailbox message structures from firmware to host     */
 766 union bfi_cee_i2h_msg_u {
 767         struct bfi_mhdr_s               mh;
 768         struct bfi_cee_get_rsp_s        get_rsp;
 769         struct bfi_cee_stats_rsp_s      stats_rsp;
 770 };
 771
 772 /*
 773  * SFP related
 774  */
 775
 776 enum bfi_sfp_h2i_e {
 777         BFI_SFP_H2I_SHOW        = 1,
 778         BFI_SFP_H2I_SCN         = 2,
 779 };
 780
 781 enum bfi_sfp_i2h_e {
 782         BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
 783         BFI_SFP_I2H_SCN  = BFA_I2HM(BFI_SFP_H2I_SCN),
 784 };
 785
 786 /*
 787  *      SFP state change notification
 788  */
 789 struct bfi_sfp_scn_s {
 790         struct bfi_mhdr_s mhr;  /* host msg header        */
 791         u8      event;
 792         u8      sfpid;
 793         u8      pomlvl; /* pom level: normal/warning/alarm */
 794         u8      is_elb; /* e-loopback */
 795 };
 796
 797 /*
 798  *      SFP state
 799  */
 800 enum bfa_sfp_stat_e {
 801         BFA_SFP_STATE_INIT      = 0,    /* SFP state is uninit  */
 802         BFA_SFP_STATE_REMOVED   = 1,    /* SFP is removed       */
 803         BFA_SFP_STATE_INSERTED  = 2,    /* SFP is inserted      */
 804         BFA_SFP_STATE_VALID     = 3,    /* SFP is valid         */
 805         BFA_SFP_STATE_UNSUPPORT = 4,    /* SFP is unsupport     */
 806         BFA_SFP_STATE_FAILED    = 5,    /* SFP i2c read fail    */
 807 };
 808
 809 /*
 810  *  SFP memory access type
 811  */
 812 enum bfi_sfp_mem_e {
 813         BFI_SFP_MEM_ALL         = 0x1,  /* access all data field */
 814         BFI_SFP_MEM_DIAGEXT     = 0x2,  /* access diag ext data field only */
 815 };
 816
 817 struct bfi_sfp_req_s {
 818         struct bfi_mhdr_s       mh;
 819         u8                      memtype;
 820         u8                      rsvd[3];
 821         struct bfi_alen_s       alen;
 822 };
 823
 824 struct bfi_sfp_rsp_s {
 825         struct bfi_mhdr_s       mh;
 826         u8                      status;
 827         u8                      state;
 828         u8                      rsvd[2];
 829 };
 830
 831 /*
 832  *      FLASH module specific
 833  */
 834 enum bfi_flash_h2i_msgs {
 835         BFI_FLASH_H2I_QUERY_REQ = 1,
 836         BFI_FLASH_H2I_ERASE_REQ = 2,
 837         BFI_FLASH_H2I_WRITE_REQ = 3,
 838         BFI_FLASH_H2I_READ_REQ = 4,
 839         BFI_FLASH_H2I_BOOT_VER_REQ = 5,
 840 };
 841
 842 enum bfi_flash_i2h_msgs {
 843         BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
 844         BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
 845         BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
 846         BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
 847         BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
 848         BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
 849 };
 850
 851 /*
 852  * Flash query request
 853  */
 854 struct bfi_flash_query_req_s {
 855         struct bfi_mhdr_s mh;   /* Common msg header */
 856         struct bfi_alen_s alen;
 857 };
 858
 859 /*
 860  * Flash erase request
 861  */
 862 struct bfi_flash_erase_req_s {
 863         struct bfi_mhdr_s       mh;     /* Common msg header */
 864         u32     type;   /* partition type */
 865         u8      instance; /* partition instance */
 866         u8      rsv[3];
 867 };
 868
 869 /*
 870  * Flash write request
 871  */
 872 struct bfi_flash_write_req_s {
 873         struct bfi_mhdr_s mh;   /* Common msg header */
 874         struct bfi_alen_s alen;
 875         u32     type;   /* partition type */
 876         u8      instance; /* partition instance */
 877         u8      last;
 878         u8      rsv[2];
 879         u32     offset;
 880         u32     length;
 881 };
 882
 883 /*
 884  * Flash read request
 885  */
 886 struct bfi_flash_read_req_s {
 887         struct bfi_mhdr_s mh;   /* Common msg header */
 888         u32     type;           /* partition type */
 889         u8      instance;       /* partition instance */
 890         u8      rsv[3];
 891         u32     offset;
 892         u32     length;
 893         struct bfi_alen_s alen;
 894 };
 895
 896 /*
 897  * Flash query response
 898  */
 899 struct bfi_flash_query_rsp_s {
 900         struct bfi_mhdr_s mh;   /* Common msg header */
 901         u32     status;
 902 };
 903
 904 /*
 905  * Flash read response
 906  */
 907 struct bfi_flash_read_rsp_s {
 908         struct bfi_mhdr_s mh;   /* Common msg header */
 909         u32     type;       /* partition type */
 910         u8      instance;   /* partition instance */
 911         u8      rsv[3];
 912         u32     status;
 913         u32     length;
 914 };
 915
 916 /*
 917  * Flash write response
 918  */
 919 struct bfi_flash_write_rsp_s {
 920         struct bfi_mhdr_s mh;   /* Common msg header */
 921         u32     type;       /* partition type */
 922         u8      instance;   /* partition instance */
 923         u8      rsv[3];
 924         u32     status;
 925         u32     length;
 926 };
 927
 928 /*
 929  * Flash erase response
 930  */
 931 struct bfi_flash_erase_rsp_s {
 932         struct bfi_mhdr_s mh;   /* Common msg header */
 933         u32     type;           /* partition type */
 934         u8      instance;       /* partition instance */
 935         u8      rsv[3];
 936         u32     status;
 937 };
 938
 939 /*
 940  * Flash event notification
 941  */
 942 struct bfi_flash_event_s {
 943         struct bfi_mhdr_s       mh;     /* Common msg header */
 944         bfa_status_t            status;
 945         u32                     param;
 946 };
 947
 948 /*
 949  *----------------------------------------------------------------------
 950  *                              DIAG
 951  *----------------------------------------------------------------------
 952  */
 953 enum bfi_diag_h2i {
 954         BFI_DIAG_H2I_PORTBEACON = 1,
 955         BFI_DIAG_H2I_LOOPBACK = 2,
 956         BFI_DIAG_H2I_FWPING = 3,
 957         BFI_DIAG_H2I_TEMPSENSOR = 4,
 958         BFI_DIAG_H2I_LEDTEST = 5,
 959         BFI_DIAG_H2I_QTEST      = 6,
 960 };
 961
 962 enum bfi_diag_i2h {
 963         BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON),
 964         BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK),
 965         BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING),
 966         BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR),
 967         BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST),
 968         BFI_DIAG_I2H_QTEST      = BFA_I2HM(BFI_DIAG_H2I_QTEST),
 969 };
 970
 971 #define BFI_DIAG_MAX_SGES       2
 972 #define BFI_DIAG_DMA_BUF_SZ     (2 * 1024)
 973 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900
 974 #define BFI_BOOT_MEMTEST_RES_SIG  0xA0A1A2A3
 975
 976 struct bfi_diag_lb_req_s {
 977         struct bfi_mhdr_s mh;
 978         u32     loopcnt;
 979         u32     pattern;
 980         u8      lb_mode;        /*!< bfa_port_opmode_t */
 981         u8      speed;          /*!< bfa_port_speed_t */
 982         u8      rsvd[2];
 983 };
 984
 985 struct bfi_diag_lb_rsp_s {
 986         struct bfi_mhdr_s  mh;          /* 4 bytes */
 987         struct bfa_diag_loopback_result_s res; /* 16 bytes */
 988 };
 989
 990 struct bfi_diag_fwping_req_s {
 991         struct bfi_mhdr_s mh;   /* 4 bytes */
 992         struct bfi_alen_s alen; /* 12 bytes */
 993         u32     data;           /* user input data pattern */
 994         u32     count;          /* user input dma count */
 995         u8      qtag;           /* track CPE vc */
 996         u8      rsv[3];
 997 };
 998
 999 struct bfi_diag_fwping_rsp_s {
1000         struct bfi_mhdr_s  mh;          /* 4 bytes */
1001         u32     data;           /* user input data pattern    */
1002         u8      qtag;           /* track CPE vc               */
1003         u8      dma_status;     /* dma status                 */
1004         u8      rsv[2];
1005 };
1006
1007 /*
1008  * Temperature Sensor
1009  */
1010 struct bfi_diag_ts_req_s {
1011         struct bfi_mhdr_s mh;   /* 4 bytes */
1012         u16     temp;           /* 10-bit A/D value */
1013         u16     brd_temp;       /* 9-bit board temp */
1014         u8      status;
1015         u8      ts_junc;        /* show junction tempsensor   */
1016         u8      ts_brd;         /* show board tempsensor      */
1017         u8      rsv;
1018 };
1019 #define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s
1020
1021 struct bfi_diag_ledtest_req_s {
1022         struct bfi_mhdr_s  mh;  /* 4 bytes */
1023         u8      cmd;
1024         u8      color;
1025         u8      portid;
1026         u8      led;    /* bitmap of LEDs to be tested */
1027         u16     freq;   /* no. of blinks every 10 secs */
1028         u8      rsv[2];
1029 };
1030
1031 /* notify host led operation is done */
1032 struct bfi_diag_ledtest_rsp_s {
1033         struct bfi_mhdr_s  mh;  /* 4 bytes */
1034 };
1035
1036 struct bfi_diag_portbeacon_req_s {
1037         struct bfi_mhdr_s  mh;  /* 4 bytes */
1038         u32     period; /* beaconing period */
1039         u8      beacon; /* 1: beacon on */
1040         u8      rsvd[3];
1041 };
1042
1043 /* notify host the beacon is off */
1044 struct bfi_diag_portbeacon_rsp_s {
1045         struct bfi_mhdr_s  mh;  /* 4 bytes */
1046 };
1047
1048 struct bfi_diag_qtest_req_s {
1049         struct bfi_mhdr_s       mh;             /* 4 bytes */
1050         u32     data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */
1051 };
1052 #define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s
1053
1054 /*
1055  *      PHY module specific
1056  */
1057 enum bfi_phy_h2i_msgs_e {
1058         BFI_PHY_H2I_QUERY_REQ = 1,
1059         BFI_PHY_H2I_STATS_REQ = 2,
1060         BFI_PHY_H2I_WRITE_REQ = 3,
1061         BFI_PHY_H2I_READ_REQ = 4,
1062 };
1063
1064 enum bfi_phy_i2h_msgs_e {
1065         BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1),
1066         BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2),
1067         BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3),
1068         BFI_PHY_I2H_READ_RSP = BFA_I2HM(4),
1069 };
1070
1071 /*
1072  * External PHY query request
1073  */
1074 struct bfi_phy_query_req_s {
1075         struct bfi_mhdr_s       mh;             /* Common msg header */
1076         u8                      instance;
1077         u8                      rsv[3];
1078         struct bfi_alen_s       alen;
1079 };
1080
1081 /*
1082  * External PHY stats request
1083  */
1084 struct bfi_phy_stats_req_s {
1085         struct bfi_mhdr_s       mh;             /* Common msg header */
1086         u8                      instance;
1087         u8                      rsv[3];
1088         struct bfi_alen_s       alen;
1089 };
1090
1091 /*
1092  * External PHY write request
1093  */
1094 struct bfi_phy_write_req_s {
1095         struct bfi_mhdr_s       mh;             /* Common msg header */
1096         u8              instance;
1097         u8              last;
1098         u8              rsv[2];
1099         u32             offset;
1100         u32             length;
1101         struct bfi_alen_s       alen;
1102 };
1103
1104 /*
1105  * External PHY read request
1106  */
1107 struct bfi_phy_read_req_s {
1108         struct bfi_mhdr_s       mh;     /* Common msg header */
1109         u8              instance;
1110         u8              rsv[3];
1111         u32             offset;
1112         u32             length;
1113         struct bfi_alen_s       alen;
1114 };
1115
1116 /*
1117  * External PHY query response
1118  */
1119 struct bfi_phy_query_rsp_s {
1120         struct bfi_mhdr_s       mh;     /* Common msg header */
1121         u32                     status;
1122 };
1123
1124 /*
1125  * External PHY stats response
1126  */
1127 struct bfi_phy_stats_rsp_s {
1128         struct bfi_mhdr_s       mh;     /* Common msg header */
1129         u32                     status;
1130 };
1131
1132 /*
1133  * External PHY read response
1134  */
1135 struct bfi_phy_read_rsp_s {
1136         struct bfi_mhdr_s       mh;     /* Common msg header */
1137         u32                     status;
1138         u32             length;
1139 };
1140
1141 /*
1142  * External PHY write response
1143  */
1144 struct bfi_phy_write_rsp_s {
1145         struct bfi_mhdr_s       mh;     /* Common msg header */
1146         u32                     status;
1147         u32                     length;
1148 };
1149
1150 #pragma pack()
1151
1152 #endif /* __BFI_H__ */