Merge branch 'linus'
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / aic7xxx / aic7xxx_osm.h
1 /*
2 * Adaptec AIC7xxx device driver for Linux.
3 *
4 * Copyright (c) 1994 John Aycock
5 * The University of Calgary Department of Computer Science.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * Copyright (c) 2000-2003 Adaptec Inc.
22 * All rights reserved.
23 *
24 * Redistribution and use in source and binary forms, with or without
25 * modification, are permitted provided that the following conditions
26 * are met:
27 * 1. Redistributions of source code must retain the above copyright
28 * notice, this list of conditions, and the following disclaimer,
29 * without modification.
30 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
31 * substantially similar to the "NO WARRANTY" disclaimer below
32 * ("Disclaimer") and any redistribution must be conditioned upon
33 * including a substantially similar Disclaimer requirement for further
34 * binary redistribution.
35 * 3. Neither the names of the above-listed copyright holders nor the names
36 * of any contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
38 *
39 * Alternatively, this software may be distributed under the terms of the
40 * GNU General Public License ("GPL") version 2 as published by the Free
41 * Software Foundation.
42 *
43 * NO WARRANTY
44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
47 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
52 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
53 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
54 * POSSIBILITY OF SUCH DAMAGES.
55 *
56 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm.h#151 $
57 *
58 */
59 #ifndef _AIC7XXX_LINUX_H_
60 #define _AIC7XXX_LINUX_H_
61
62 #include <linux/config.h>
63 #include <linux/types.h>
64 #include <linux/blkdev.h>
65 #include <linux/delay.h>
66 #include <linux/ioport.h>
67 #include <linux/pci.h>
68 #include <linux/smp_lock.h>
69 #include <linux/interrupt.h>
70 #include <linux/module.h>
71 #include <linux/slab.h>
72 #include <asm/byteorder.h>
73 #include <asm/io.h>
74
75 #include <scsi/scsi.h>
76 #include <scsi/scsi_cmnd.h>
77 #include <scsi/scsi_eh.h>
78 #include <scsi/scsi_device.h>
79 #include <scsi/scsi_host.h>
80 #include <scsi/scsi_tcq.h>
81 #include <scsi/scsi_transport.h>
82 #include <scsi/scsi_transport_spi.h>
83
84 /* Core SCSI definitions */
85 #define AIC_LIB_PREFIX ahc
86
87 /* Name space conflict with BSD queue macros */
88 #ifdef LIST_HEAD
89 #undef LIST_HEAD
90 #endif
91
92 #include "cam.h"
93 #include "queue.h"
94 #include "scsi_message.h"
95 #include "aiclib.h"
96
97 /*********************************** Debugging ********************************/
98 #ifdef CONFIG_AIC7XXX_DEBUG_ENABLE
99 #ifdef CONFIG_AIC7XXX_DEBUG_MASK
100 #define AHC_DEBUG 1
101 #define AHC_DEBUG_OPTS CONFIG_AIC7XXX_DEBUG_MASK
102 #else
103 /*
104 * Compile in debugging code, but do not enable any printfs.
105 */
106 #define AHC_DEBUG 1
107 #endif
108 /* No debugging code. */
109 #endif
110
111 /************************* Forward Declarations *******************************/
112 struct ahc_softc;
113 typedef struct pci_dev *ahc_dev_softc_t;
114 typedef struct scsi_cmnd *ahc_io_ctx_t;
115
116 /******************************* Byte Order ***********************************/
117 #define ahc_htobe16(x) cpu_to_be16(x)
118 #define ahc_htobe32(x) cpu_to_be32(x)
119 #define ahc_htobe64(x) cpu_to_be64(x)
120 #define ahc_htole16(x) cpu_to_le16(x)
121 #define ahc_htole32(x) cpu_to_le32(x)
122 #define ahc_htole64(x) cpu_to_le64(x)
123
124 #define ahc_be16toh(x) be16_to_cpu(x)
125 #define ahc_be32toh(x) be32_to_cpu(x)
126 #define ahc_be64toh(x) be64_to_cpu(x)
127 #define ahc_le16toh(x) le16_to_cpu(x)
128 #define ahc_le32toh(x) le32_to_cpu(x)
129 #define ahc_le64toh(x) le64_to_cpu(x)
130
131 /************************* Configuration Data *********************************/
132 extern u_int aic7xxx_no_probe;
133 extern u_int aic7xxx_allow_memio;
134 extern struct scsi_host_template aic7xxx_driver_template;
135
136 /***************************** Bus Space/DMA **********************************/
137
138 typedef uint32_t bus_size_t;
139
140 typedef enum {
141 BUS_SPACE_MEMIO,
142 BUS_SPACE_PIO
143 } bus_space_tag_t;
144
145 typedef union {
146 u_long ioport;
147 volatile uint8_t __iomem *maddr;
148 } bus_space_handle_t;
149
150 typedef struct bus_dma_segment
151 {
152 dma_addr_t ds_addr;
153 bus_size_t ds_len;
154 } bus_dma_segment_t;
155
156 struct ahc_linux_dma_tag
157 {
158 bus_size_t alignment;
159 bus_size_t boundary;
160 bus_size_t maxsize;
161 };
162 typedef struct ahc_linux_dma_tag* bus_dma_tag_t;
163
164 typedef dma_addr_t bus_dmamap_t;
165
166 typedef int bus_dma_filter_t(void*, dma_addr_t);
167 typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
168
169 #define BUS_DMA_WAITOK 0x0
170 #define BUS_DMA_NOWAIT 0x1
171 #define BUS_DMA_ALLOCNOW 0x2
172 #define BUS_DMA_LOAD_SEGS 0x4 /*
173 * Argument is an S/G list not
174 * a single buffer.
175 */
176
177 #define BUS_SPACE_MAXADDR 0xFFFFFFFF
178 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
179 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
180
181 int ahc_dma_tag_create(struct ahc_softc *, bus_dma_tag_t /*parent*/,
182 bus_size_t /*alignment*/, bus_size_t /*boundary*/,
183 dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
184 bus_dma_filter_t*/*filter*/, void */*filterarg*/,
185 bus_size_t /*maxsize*/, int /*nsegments*/,
186 bus_size_t /*maxsegsz*/, int /*flags*/,
187 bus_dma_tag_t */*dma_tagp*/);
188
189 void ahc_dma_tag_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/);
190
191 int ahc_dmamem_alloc(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
192 void** /*vaddr*/, int /*flags*/,
193 bus_dmamap_t* /*mapp*/);
194
195 void ahc_dmamem_free(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
196 void* /*vaddr*/, bus_dmamap_t /*map*/);
197
198 void ahc_dmamap_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/,
199 bus_dmamap_t /*map*/);
200
201 int ahc_dmamap_load(struct ahc_softc *ahc, bus_dma_tag_t /*dmat*/,
202 bus_dmamap_t /*map*/, void * /*buf*/,
203 bus_size_t /*buflen*/, bus_dmamap_callback_t *,
204 void */*callback_arg*/, int /*flags*/);
205
206 int ahc_dmamap_unload(struct ahc_softc *, bus_dma_tag_t, bus_dmamap_t);
207
208 /*
209 * Operations performed by ahc_dmamap_sync().
210 */
211 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
212 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
213 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
214 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
215
216 /*
217 * XXX
218 * ahc_dmamap_sync is only used on buffers allocated with
219 * the pci_alloc_consistent() API. Although I'm not sure how
220 * this works on architectures with a write buffer, Linux does
221 * not have an API to sync "coherent" memory. Perhaps we need
222 * to do an mb()?
223 */
224 #define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op)
225
226 /********************************** Includes **********************************/
227 #ifdef CONFIG_AIC7XXX_REG_PRETTY_PRINT
228 #define AIC_DEBUG_REGISTERS 1
229 #else
230 #define AIC_DEBUG_REGISTERS 0
231 #endif
232 #include "aic7xxx.h"
233
234 /***************************** Timer Facilities *******************************/
235 static __inline void
236 ahc_scb_timer_reset(struct scb *scb, u_int usec)
237 {
238 }
239
240 /***************************** SMP support ************************************/
241 #include <linux/spinlock.h>
242
243 #define AIC7XXX_DRIVER_VERSION "7.0"
244
245 /*************************** Device Data Structures ***************************/
246 /*
247 * A per probed device structure used to deal with some error recovery
248 * scenarios that the Linux mid-layer code just doesn't know how to
249 * handle. The structure allocated for a device only becomes persistent
250 * after a successfully completed inquiry command to the target when
251 * that inquiry data indicates a lun is present.
252 */
253 typedef enum {
254 AHC_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
255 AHC_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */
256 AHC_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */
257 AHC_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */
258 } ahc_linux_dev_flags;
259
260 struct ahc_linux_target;
261 struct ahc_linux_device {
262 /*
263 * The number of transactions currently
264 * queued to the device.
265 */
266 int active;
267
268 /*
269 * The currently allowed number of
270 * transactions that can be queued to
271 * the device. Must be signed for
272 * conversion from tagged to untagged
273 * mode where the device may have more
274 * than one outstanding active transaction.
275 */
276 int openings;
277
278 /*
279 * A positive count indicates that this
280 * device's queue is halted.
281 */
282 u_int qfrozen;
283
284 /*
285 * Cumulative command counter.
286 */
287 u_long commands_issued;
288
289 /*
290 * The number of tagged transactions when
291 * running at our current opening level
292 * that have been successfully received by
293 * this device since the last QUEUE FULL.
294 */
295 u_int tag_success_count;
296 #define AHC_TAG_SUCCESS_INTERVAL 50
297
298 ahc_linux_dev_flags flags;
299
300 /*
301 * The high limit for the tags variable.
302 */
303 u_int maxtags;
304
305 /*
306 * The computed number of tags outstanding
307 * at the time of the last QUEUE FULL event.
308 */
309 u_int tags_on_last_queuefull;
310
311 /*
312 * How many times we have seen a queue full
313 * with the same number of tags. This is used
314 * to stop our adaptive queue depth algorithm
315 * on devices with a fixed number of tags.
316 */
317 u_int last_queuefull_same_count;
318 #define AHC_LOCK_TAGS_COUNT 50
319
320 /*
321 * How many transactions have been queued
322 * without the device going idle. We use
323 * this statistic to determine when to issue
324 * an ordered tag to prevent transaction
325 * starvation. This statistic is only updated
326 * if the AHC_DEV_PERIODIC_OTAG flag is set
327 * on this device.
328 */
329 u_int commands_since_idle_or_otag;
330 #define AHC_OTAG_THRESH 500
331 };
332
333 struct ahc_linux_target {
334 struct scsi_device *sdev[AHC_NUM_LUNS];
335 struct ahc_transinfo last_tinfo;
336 struct ahc_softc *ahc;
337 };
338
339 /********************* Definitions Required by the Core ***********************/
340 /*
341 * Number of SG segments we require. So long as the S/G segments for
342 * a particular transaction are allocated in a physically contiguous
343 * manner and are allocated below 4GB, the number of S/G segments is
344 * unrestricted.
345 */
346 #define AHC_NSEG 128
347
348 /*
349 * Per-SCB OSM storage.
350 */
351 struct scb_platform_data {
352 struct ahc_linux_device *dev;
353 dma_addr_t buf_busaddr;
354 uint32_t xfer_len;
355 uint32_t sense_resid; /* Auto-Sense residual */
356 };
357
358 /*
359 * Define a structure used for each host adapter. All members are
360 * aligned on a boundary >= the size of the member to honor the
361 * alignment restrictions of the various platforms supported by
362 * this driver.
363 */
364 struct ahc_platform_data {
365 /*
366 * Fields accessed from interrupt context.
367 */
368 struct scsi_target *starget[AHC_NUM_TARGETS];
369
370 spinlock_t spin_lock;
371 u_int qfrozen;
372 struct completion *eh_done;
373 struct Scsi_Host *host; /* pointer to scsi host */
374 #define AHC_LINUX_NOIRQ ((uint32_t)~0)
375 uint32_t irq; /* IRQ for this adapter */
376 uint32_t bios_address;
377 uint32_t mem_busaddr; /* Mem Base Addr */
378 };
379
380 /************************** OS Utility Wrappers *******************************/
381 #define printf printk
382 #define M_NOWAIT GFP_ATOMIC
383 #define M_WAITOK 0
384 #define malloc(size, type, flags) kmalloc(size, flags)
385 #define free(ptr, type) kfree(ptr)
386
387 static __inline void ahc_delay(long);
388 static __inline void
389 ahc_delay(long usec)
390 {
391 /*
392 * udelay on Linux can have problems for
393 * multi-millisecond waits. Wait at most
394 * 1024us per call.
395 */
396 while (usec > 0) {
397 udelay(usec % 1024);
398 usec -= 1024;
399 }
400 }
401
402
403 /***************************** Low Level I/O **********************************/
404 static __inline uint8_t ahc_inb(struct ahc_softc * ahc, long port);
405 static __inline void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val);
406 static __inline void ahc_outsb(struct ahc_softc * ahc, long port,
407 uint8_t *, int count);
408 static __inline void ahc_insb(struct ahc_softc * ahc, long port,
409 uint8_t *, int count);
410
411 static __inline uint8_t
412 ahc_inb(struct ahc_softc * ahc, long port)
413 {
414 uint8_t x;
415
416 if (ahc->tag == BUS_SPACE_MEMIO) {
417 x = readb(ahc->bsh.maddr + port);
418 } else {
419 x = inb(ahc->bsh.ioport + port);
420 }
421 mb();
422 return (x);
423 }
424
425 static __inline void
426 ahc_outb(struct ahc_softc * ahc, long port, uint8_t val)
427 {
428 if (ahc->tag == BUS_SPACE_MEMIO) {
429 writeb(val, ahc->bsh.maddr + port);
430 } else {
431 outb(val, ahc->bsh.ioport + port);
432 }
433 mb();
434 }
435
436 static __inline void
437 ahc_outsb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
438 {
439 int i;
440
441 /*
442 * There is probably a more efficient way to do this on Linux
443 * but we don't use this for anything speed critical and this
444 * should work.
445 */
446 for (i = 0; i < count; i++)
447 ahc_outb(ahc, port, *array++);
448 }
449
450 static __inline void
451 ahc_insb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
452 {
453 int i;
454
455 /*
456 * There is probably a more efficient way to do this on Linux
457 * but we don't use this for anything speed critical and this
458 * should work.
459 */
460 for (i = 0; i < count; i++)
461 *array++ = ahc_inb(ahc, port);
462 }
463
464 /**************************** Initialization **********************************/
465 int ahc_linux_register_host(struct ahc_softc *,
466 struct scsi_host_template *);
467
468 /*************************** Pretty Printing **********************************/
469 struct info_str {
470 char *buffer;
471 int length;
472 off_t offset;
473 int pos;
474 };
475
476 void ahc_format_transinfo(struct info_str *info,
477 struct ahc_transinfo *tinfo);
478
479 /******************************** Locking *************************************/
480 /* Lock protecting internal data structures */
481
482 static __inline void
483 ahc_lockinit(struct ahc_softc *ahc)
484 {
485 spin_lock_init(&ahc->platform_data->spin_lock);
486 }
487
488 static __inline void
489 ahc_lock(struct ahc_softc *ahc, unsigned long *flags)
490 {
491 spin_lock_irqsave(&ahc->platform_data->spin_lock, *flags);
492 }
493
494 static __inline void
495 ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
496 {
497 spin_unlock_irqrestore(&ahc->platform_data->spin_lock, *flags);
498 }
499
500 /******************************* PCI Definitions ******************************/
501 /*
502 * PCIM_xxx: mask to locate subfield in register
503 * PCIR_xxx: config register offset
504 * PCIC_xxx: device class
505 * PCIS_xxx: device subclass
506 * PCIP_xxx: device programming interface
507 * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
508 * PCID_xxx: device ID
509 */
510 #define PCIR_DEVVENDOR 0x00
511 #define PCIR_VENDOR 0x00
512 #define PCIR_DEVICE 0x02
513 #define PCIR_COMMAND 0x04
514 #define PCIM_CMD_PORTEN 0x0001
515 #define PCIM_CMD_MEMEN 0x0002
516 #define PCIM_CMD_BUSMASTEREN 0x0004
517 #define PCIM_CMD_MWRICEN 0x0010
518 #define PCIM_CMD_PERRESPEN 0x0040
519 #define PCIM_CMD_SERRESPEN 0x0100
520 #define PCIR_STATUS 0x06
521 #define PCIR_REVID 0x08
522 #define PCIR_PROGIF 0x09
523 #define PCIR_SUBCLASS 0x0a
524 #define PCIR_CLASS 0x0b
525 #define PCIR_CACHELNSZ 0x0c
526 #define PCIR_LATTIMER 0x0d
527 #define PCIR_HEADERTYPE 0x0e
528 #define PCIM_MFDEV 0x80
529 #define PCIR_BIST 0x0f
530 #define PCIR_CAP_PTR 0x34
531
532 /* config registers for header type 0 devices */
533 #define PCIR_MAPS 0x10
534 #define PCIR_SUBVEND_0 0x2c
535 #define PCIR_SUBDEV_0 0x2e
536
537 extern struct pci_driver aic7xxx_pci_driver;
538
539 typedef enum
540 {
541 AHC_POWER_STATE_D0,
542 AHC_POWER_STATE_D1,
543 AHC_POWER_STATE_D2,
544 AHC_POWER_STATE_D3
545 } ahc_power_state;
546
547 /**************************** VL/EISA Routines ********************************/
548 #ifdef CONFIG_EISA
549 int ahc_linux_eisa_init(void);
550 void ahc_linux_eisa_exit(void);
551 int aic7770_map_registers(struct ahc_softc *ahc,
552 u_int port);
553 int aic7770_map_int(struct ahc_softc *ahc, u_int irq);
554 #else
555 static inline int ahc_linux_eisa_init(void) {
556 return -ENODEV;
557 }
558 static inline void ahc_linux_eisa_exit(void) {
559 }
560 #endif
561
562 /******************************* PCI Routines *********************************/
563 #ifdef CONFIG_PCI
564 int ahc_linux_pci_init(void);
565 void ahc_linux_pci_exit(void);
566 int ahc_pci_map_registers(struct ahc_softc *ahc);
567 int ahc_pci_map_int(struct ahc_softc *ahc);
568
569 static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
570 int reg, int width);
571
572 static __inline uint32_t
573 ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
574 {
575 switch (width) {
576 case 1:
577 {
578 uint8_t retval;
579
580 pci_read_config_byte(pci, reg, &retval);
581 return (retval);
582 }
583 case 2:
584 {
585 uint16_t retval;
586 pci_read_config_word(pci, reg, &retval);
587 return (retval);
588 }
589 case 4:
590 {
591 uint32_t retval;
592 pci_read_config_dword(pci, reg, &retval);
593 return (retval);
594 }
595 default:
596 panic("ahc_pci_read_config: Read size too big");
597 /* NOTREACHED */
598 return (0);
599 }
600 }
601
602 static __inline void ahc_pci_write_config(ahc_dev_softc_t pci,
603 int reg, uint32_t value,
604 int width);
605
606 static __inline void
607 ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
608 {
609 switch (width) {
610 case 1:
611 pci_write_config_byte(pci, reg, value);
612 break;
613 case 2:
614 pci_write_config_word(pci, reg, value);
615 break;
616 case 4:
617 pci_write_config_dword(pci, reg, value);
618 break;
619 default:
620 panic("ahc_pci_write_config: Write size too big");
621 /* NOTREACHED */
622 }
623 }
624
625 static __inline int ahc_get_pci_function(ahc_dev_softc_t);
626 static __inline int
627 ahc_get_pci_function(ahc_dev_softc_t pci)
628 {
629 return (PCI_FUNC(pci->devfn));
630 }
631
632 static __inline int ahc_get_pci_slot(ahc_dev_softc_t);
633 static __inline int
634 ahc_get_pci_slot(ahc_dev_softc_t pci)
635 {
636 return (PCI_SLOT(pci->devfn));
637 }
638
639 static __inline int ahc_get_pci_bus(ahc_dev_softc_t);
640 static __inline int
641 ahc_get_pci_bus(ahc_dev_softc_t pci)
642 {
643 return (pci->bus->number);
644 }
645 #else
646 static inline int ahc_linux_pci_init(void) {
647 return 0;
648 }
649 static inline void ahc_linux_pci_exit(void) {
650 }
651 #endif
652
653 static __inline void ahc_flush_device_writes(struct ahc_softc *);
654 static __inline void
655 ahc_flush_device_writes(struct ahc_softc *ahc)
656 {
657 /* XXX Is this sufficient for all architectures??? */
658 ahc_inb(ahc, INTSTAT);
659 }
660
661 /**************************** Proc FS Support *********************************/
662 int ahc_linux_proc_info(struct Scsi_Host *, char *, char **,
663 off_t, int, int);
664
665 /*************************** Domain Validation ********************************/
666 /*********************** Transaction Access Wrappers *************************/
667 static __inline void ahc_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
668 static __inline void ahc_set_transaction_status(struct scb *, uint32_t);
669 static __inline void ahc_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
670 static __inline void ahc_set_scsi_status(struct scb *, uint32_t);
671 static __inline uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd);
672 static __inline uint32_t ahc_get_transaction_status(struct scb *);
673 static __inline uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd);
674 static __inline uint32_t ahc_get_scsi_status(struct scb *);
675 static __inline void ahc_set_transaction_tag(struct scb *, int, u_int);
676 static __inline u_long ahc_get_transfer_length(struct scb *);
677 static __inline int ahc_get_transfer_dir(struct scb *);
678 static __inline void ahc_set_residual(struct scb *, u_long);
679 static __inline void ahc_set_sense_residual(struct scb *scb, u_long resid);
680 static __inline u_long ahc_get_residual(struct scb *);
681 static __inline u_long ahc_get_sense_residual(struct scb *);
682 static __inline int ahc_perform_autosense(struct scb *);
683 static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *,
684 struct scb *);
685 static __inline void ahc_notify_xfer_settings_change(struct ahc_softc *,
686 struct ahc_devinfo *);
687 static __inline void ahc_platform_scb_free(struct ahc_softc *ahc,
688 struct scb *scb);
689 static __inline void ahc_freeze_scb(struct scb *scb);
690
691 static __inline
692 void ahc_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
693 {
694 cmd->result &= ~(CAM_STATUS_MASK << 16);
695 cmd->result |= status << 16;
696 }
697
698 static __inline
699 void ahc_set_transaction_status(struct scb *scb, uint32_t status)
700 {
701 ahc_cmd_set_transaction_status(scb->io_ctx,status);
702 }
703
704 static __inline
705 void ahc_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
706 {
707 cmd->result &= ~0xFFFF;
708 cmd->result |= status;
709 }
710
711 static __inline
712 void ahc_set_scsi_status(struct scb *scb, uint32_t status)
713 {
714 ahc_cmd_set_scsi_status(scb->io_ctx, status);
715 }
716
717 static __inline
718 uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd)
719 {
720 return ((cmd->result >> 16) & CAM_STATUS_MASK);
721 }
722
723 static __inline
724 uint32_t ahc_get_transaction_status(struct scb *scb)
725 {
726 return (ahc_cmd_get_transaction_status(scb->io_ctx));
727 }
728
729 static __inline
730 uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd)
731 {
732 return (cmd->result & 0xFFFF);
733 }
734
735 static __inline
736 uint32_t ahc_get_scsi_status(struct scb *scb)
737 {
738 return (ahc_cmd_get_scsi_status(scb->io_ctx));
739 }
740
741 static __inline
742 void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type)
743 {
744 /*
745 * Nothing to do for linux as the incoming transaction
746 * has no concept of tag/non tagged, etc.
747 */
748 }
749
750 static __inline
751 u_long ahc_get_transfer_length(struct scb *scb)
752 {
753 return (scb->platform_data->xfer_len);
754 }
755
756 static __inline
757 int ahc_get_transfer_dir(struct scb *scb)
758 {
759 return (scb->io_ctx->sc_data_direction);
760 }
761
762 static __inline
763 void ahc_set_residual(struct scb *scb, u_long resid)
764 {
765 scb->io_ctx->resid = resid;
766 }
767
768 static __inline
769 void ahc_set_sense_residual(struct scb *scb, u_long resid)
770 {
771 scb->platform_data->sense_resid = resid;
772 }
773
774 static __inline
775 u_long ahc_get_residual(struct scb *scb)
776 {
777 return (scb->io_ctx->resid);
778 }
779
780 static __inline
781 u_long ahc_get_sense_residual(struct scb *scb)
782 {
783 return (scb->platform_data->sense_resid);
784 }
785
786 static __inline
787 int ahc_perform_autosense(struct scb *scb)
788 {
789 /*
790 * We always perform autosense in Linux.
791 * On other platforms this is set on a
792 * per-transaction basis.
793 */
794 return (1);
795 }
796
797 static __inline uint32_t
798 ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb)
799 {
800 return (sizeof(struct scsi_sense_data));
801 }
802
803 static __inline void
804 ahc_notify_xfer_settings_change(struct ahc_softc *ahc,
805 struct ahc_devinfo *devinfo)
806 {
807 /* Nothing to do here for linux */
808 }
809
810 static __inline void
811 ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb)
812 {
813 }
814
815 int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg);
816 void ahc_platform_free(struct ahc_softc *ahc);
817 void ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb);
818
819 static __inline void
820 ahc_freeze_scb(struct scb *scb)
821 {
822 if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
823 scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
824 scb->platform_data->dev->qfrozen++;
825 }
826 }
827
828 void ahc_platform_set_tags(struct ahc_softc *ahc,
829 struct ahc_devinfo *devinfo, ahc_queue_alg);
830 int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
831 char channel, int lun, u_int tag,
832 role_t role, uint32_t status);
833 irqreturn_t
834 ahc_linux_isr(int irq, void *dev_id, struct pt_regs * regs);
835 void ahc_platform_flushwork(struct ahc_softc *ahc);
836 void ahc_done(struct ahc_softc*, struct scb*);
837 void ahc_send_async(struct ahc_softc *, char channel,
838 u_int target, u_int lun, ac_code, void *);
839 void ahc_print_path(struct ahc_softc *, struct scb *);
840 void ahc_platform_dump_card_state(struct ahc_softc *ahc);
841
842 #ifdef CONFIG_PCI
843 #define AHC_PCI_CONFIG 1
844 #else
845 #define AHC_PCI_CONFIG 0
846 #endif
847 #define bootverbose aic7xxx_verbose
848 extern u_int aic7xxx_verbose;
849 #endif /* _AIC7XXX_LINUX_H_ */