1 #define ASC_VERSION "3.4" /* AdvanSys Driver Version */
4 * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
6 * Copyright (c) 1995-2000 Advanced System Products, Inc.
7 * Copyright (c) 2000-2001 ConnectCom Solutions, Inc.
8 * Copyright (c) 2007 Matthew Wilcox <matthew@wil.cx>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
18 * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys)
19 * changed its name to ConnectCom Solutions, Inc.
20 * On June 18, 2001 Initio Corp. acquired ConnectCom's SCSI assets
25 Documentation for the AdvanSys Driver
27 A. Linux Kernels Supported by this Driver
28 B. Adapters Supported by this Driver
29 C. Linux source files modified by AdvanSys Driver
31 E. Driver Compile Time Options and Debugging
33 G. Tests to run before releasing new driver
35 I. Known Problems/Fix List
36 J. Credits (Chronological Order)
38 A. Linux Kernels Supported by this Driver
40 This driver has been tested in the following Linux kernels: v2.2.18
41 v2.4.0. The driver is supported on v2.2 and v2.4 kernels and on x86,
42 alpha, and PowerPC platforms.
44 B. Adapters Supported by this Driver
46 AdvanSys (Advanced System Products, Inc.) manufactures the following
47 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
48 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
49 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
50 transfer) SCSI Host Adapters for the PCI bus.
52 The CDB counts below indicate the number of SCSI CDB (Command
53 Descriptor Block) requests that can be stored in the RISC chip
54 cache and board LRAM. A CDB is a single SCSI command. The driver
55 detect routine will display the number of CDBs available for each
56 adapter detected. The number of CDBs used by the driver can be
57 lowered in the BIOS by changing the 'Host Queue Size' adapter setting.
60 ABP-480 - Bus-Master CardBus (16 CDB) (2.4 kernel and greater)
62 Connectivity Products:
63 ABP510/5150 - Bus-Master ISA (240 CDB)
64 ABP5140 - Bus-Master ISA PnP (16 CDB)
65 ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
66 ABP902/3902 - Bus-Master PCI (16 CDB)
67 ABP3905 - Bus-Master PCI (16 CDB)
68 ABP915 - Bus-Master PCI (16 CDB)
69 ABP920 - Bus-Master PCI (16 CDB)
70 ABP3922 - Bus-Master PCI (16 CDB)
71 ABP3925 - Bus-Master PCI (16 CDB)
72 ABP930 - Bus-Master PCI (16 CDB)
73 ABP930U - Bus-Master PCI Ultra (16 CDB)
74 ABP930UA - Bus-Master PCI Ultra (16 CDB)
75 ABP960 - Bus-Master PCI MAC/PC (16 CDB)
76 ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB)
78 Single Channel Products:
79 ABP542 - Bus-Master ISA with floppy (240 CDB)
80 ABP742 - Bus-Master EISA (240 CDB)
81 ABP842 - Bus-Master VL (240 CDB)
82 ABP940 - Bus-Master PCI (240 CDB)
83 ABP940U - Bus-Master PCI Ultra (240 CDB)
84 ABP940UA/3940UA - Bus-Master PCI Ultra (240 CDB)
85 ABP970 - Bus-Master PCI MAC/PC (240 CDB)
86 ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB)
87 ABP3960UA - Bus-Master PCI MAC/PC Ultra (240 CDB)
88 ABP940UW/3940UW - Bus-Master PCI Ultra-Wide (253 CDB)
89 ABP970UW - Bus-Master PCI MAC/PC Ultra-Wide (253 CDB)
90 ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
92 Multi-Channel Products:
93 ABP752 - Dual Channel Bus-Master EISA (240 CDB Per Channel)
94 ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel)
95 ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
96 ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB Per Channel)
97 ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel)
98 ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel)
99 ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.)
100 ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide and Ultra-Wide (253 CDB)
101 ABP3950U3W - Bus-Master PCI Dual LVD2/Ultra3-Wide (253 CDB)
103 C. Linux source files modified by AdvanSys Driver
105 This section for historical purposes documents the changes
106 originally made to the Linux kernel source to add the advansys
107 driver. As Linux has changed some of these files have also
110 1. linux/arch/i386/config.in:
112 bool 'AdvanSys SCSI support' CONFIG_SCSI_ADVANSYS y
114 2. linux/drivers/scsi/hosts.c:
116 #ifdef CONFIG_SCSI_ADVANSYS
117 #include "advansys.h"
120 and after "static struct scsi_host_template builtin_scsi_hosts[] =":
122 #ifdef CONFIG_SCSI_ADVANSYS
126 3. linux/drivers/scsi/Makefile:
128 ifdef CONFIG_SCSI_ADVANSYS
129 SCSI_SRCS := $(SCSI_SRCS) advansys.c
130 SCSI_OBJS := $(SCSI_OBJS) advansys.o
132 SCSI_MODULE_OBJS := $(SCSI_MODULE_OBJS) advansys.o
135 4. linux/init/main.c:
137 extern void advansys_setup(char *str, int *ints);
139 and add the following lines to the bootsetups[] array.
141 #ifdef CONFIG_SCSI_ADVANSYS
142 { "advansys=", advansys_setup },
147 1. Use tab stops set to 4 for the source files. For vi use 'se tabstops=4'.
149 2. This driver should be maintained in multiple files. But to make
150 it easier to include with Linux and to follow Linux conventions,
151 the whole driver is maintained in the source files advansys.h and
152 advansys.c. In this file logical sections of the driver begin with
153 a comment that contains '---'. The following are the logical sections
157 --- Linux Include File
160 --- Asc Library Constants and Macros
161 --- Adv Library Constants and Macros
162 --- Driver Constants and Macros
163 --- Driver Structures
165 --- Driver Function Prototypes
166 --- Linux 'struct scsi_host_template' and advansys_setup() Functions
167 --- Loadable Driver Support
168 --- Miscellaneous Driver Functions
169 --- Functions Required by the Asc Library
170 --- Functions Required by the Adv Library
171 --- Tracing and Debugging Functions
172 --- Asc Library Functions
173 --- Adv Library Functions
175 3. The string 'XXX' is used to flag code that needs to be re-written
176 or that contains a problem that needs to be addressed.
178 4. I have stripped comments from and reformatted the source for the
179 Asc Library and Adv Library to reduce the size of this file. This
180 source can be found under the following headings. The Asc Library
181 is used to support Narrow Boards. The Adv Library is used to
184 --- Asc Library Constants and Macros
185 --- Adv Library Constants and Macros
186 --- Asc Library Functions
187 --- Adv Library Functions
189 E. Driver Compile Time Options and Debugging
191 In this source file the following constants can be defined. They are
192 defined in the source below. Both of these options are enabled by
195 1. ADVANSYS_ASSERT - Enable driver assertions (Def: Enabled)
197 Enabling this option adds assertion logic statements to the
198 driver. If an assertion fails a message will be displayed to
199 the console, but the system will continue to operate. Any
200 assertions encountered should be reported to the person
201 responsible for the driver. Assertion statements may proactively
202 detect problems with the driver and facilitate fixing these
203 problems. Enabling assertions will add a small overhead to the
204 execution of the driver.
206 2. ADVANSYS_DEBUG - Enable driver debugging (Def: Disabled)
208 Enabling this option adds tracing functions to the driver and
209 the ability to set a driver tracing level at boot time. This
210 option will also export symbols not required outside the driver to
211 the kernel name space. This option is very useful for debugging
212 the driver, but it will add to the size of the driver execution
213 image and add overhead to the execution of the driver.
215 The amount of debugging output can be controlled with the global
216 variable 'asc_dbglvl'. The higher the number the more output. By
217 default the debug level is 0.
219 If the driver is loaded at boot time and the LILO Driver Option
220 is included in the system, the debug level can be changed by
221 specifying a 5th (ASC_NUM_IOPORT_PROBE + 1) I/O Port. The
222 first three hex digits of the pseudo I/O Port must be set to
223 'deb' and the fourth hex digit specifies the debug level: 0 - F.
224 The following command line will look for an adapter at 0x330
225 and set the debug level to 2.
227 linux advansys=0x330,0,0,0,0xdeb2
229 If the driver is built as a loadable module this variable can be
230 defined when the driver is loaded. The following insmod command
231 will set the debug level to one.
233 insmod advansys.o asc_dbglvl=1
235 Debugging Message Levels:
237 1: High-Level Tracing
240 To enable debug output to console, please make sure that:
242 a. System and kernel logging is enabled (syslogd, klogd running).
243 b. Kernel messages are routed to console output. Check
244 /etc/syslog.conf for an entry similar to this:
248 c. klogd is started with the appropriate -c parameter
251 This will cause printk() messages to be be displayed on the
252 current console. Refer to the klogd(8) and syslogd(8) man pages
255 Alternatively you can enable printk() to console with this
256 program. However, this is not the 'official' way to do this.
257 Debug output is logged in /var/log/messages.
261 syscall(103, 7, 0, 0);
264 Increasing LOG_BUF_LEN in kernel/printk.c to something like
265 40960 allows more debug messages to be buffered in the kernel
266 and written to the console or log file.
268 3. ADVANSYS_STATS - Enable statistics (Def: Enabled >= v1.3.0)
270 Enabling this option adds statistics collection and display
271 through /proc to the driver. The information is useful for
272 monitoring driver and device performance. It will add to the
273 size of the driver execution image and add minor overhead to
274 the execution of the driver.
276 Statistics are maintained on a per adapter basis. Driver entry
277 point call counts and transfer size counts are maintained.
278 Statistics are only available for kernels greater than or equal
279 to v1.3.0 with the CONFIG_PROC_FS (/proc) file system configured.
281 AdvanSys SCSI adapter files have the following path name format:
283 /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)]
285 This information can be displayed with cat. For example:
287 cat /proc/scsi/advansys/0
289 When ADVANSYS_STATS is not defined the AdvanSys /proc files only
290 contain adapter and device configuration information.
292 F. Driver LILO Option
294 If init/main.c is modified as described in the 'Directions for Adding
295 the AdvanSys Driver to Linux' section (B.4.) above, the driver will
296 recognize the 'advansys' LILO command line and /etc/lilo.conf option.
297 This option can be used to either disable I/O port scanning or to limit
298 scanning to 1 - 4 I/O ports. Regardless of the option setting EISA and
299 PCI boards will still be searched for and detected. This option only
300 affects searching for ISA and VL boards.
303 1. Eliminate I/O port scanning:
304 boot: linux advansys=
306 boot: linux advansys=0x0
307 2. Limit I/O port scanning to one I/O port:
308 boot: linux advansys=0x110
309 3. Limit I/O port scanning to four I/O ports:
310 boot: linux advansys=0x110,0x210,0x230,0x330
312 For a loadable module the same effect can be achieved by setting
313 the 'asc_iopflag' variable and 'asc_ioport' array when loading
316 insmod advansys.o asc_iopflag=1 asc_ioport=0x110,0x330
318 If ADVANSYS_DEBUG is defined a 5th (ASC_NUM_IOPORT_PROBE + 1)
319 I/O Port may be added to specify the driver debug level. Refer to
320 the 'Driver Compile Time Options and Debugging' section above for
323 G. Tests to run before releasing new driver
325 1. In the supported kernels verify there are no warning or compile
326 errors when the kernel is built as both a driver and as a module
327 and with the following options:
329 ADVANSYS_DEBUG - enabled and disabled
330 CONFIG_SMP - enabled and disabled
331 CONFIG_PROC_FS - enabled and disabled
333 2. Run tests on an x86, alpha, and PowerPC with at least one narrow
334 card and one wide card attached to a hard disk and CD-ROM drive:
335 fdisk, mkfs, fsck, bonnie, copy/compare test from the
336 CD-ROM to the hard drive.
344 1. Prevent advansys_detect() from being called twice.
345 2. Add LILO 0xdeb[0-f] option to set 'asc_dbglvl'.
348 1. Prevent re-entrancy in the interrupt handler which
349 resulted in the driver hanging Linux.
350 2. Fix problem that prevented ABP-940 cards from being
351 recognized on some PCI motherboards.
352 3. Add support for the ABP-5140 PnP ISA card.
353 4. Fix check condition return status.
354 5. Add conditionally compiled code for Linux v1.3.X.
357 1. Fix problem in advansys_biosparam() that resulted in the
358 wrong drive geometry being returned for drives > 1GB with
359 extended translation enabled.
360 2. Add additional tracing during device initialization.
361 3. Change code that only applies to ISA PnP adapter.
362 4. Eliminate 'make dep' warning.
363 5. Try to fix problem with handling resets by increasing their
367 1. Change definitions to eliminate conflicts with other subsystems.
368 2. Add versioning code for the shared interrupt changes.
369 3. Eliminate problem in asc_rmqueue() with iterating after removing
371 4. Remove reset request loop problem from the "Known Problems or
372 Issues" section. This problem was isolated and fixed in the
373 mid-level SCSI driver.
376 1. Add support for ABP-940U (PCI Ultra) adapter.
377 2. Add support for IRQ sharing by setting the IRQF_SHARED flag for
378 request_irq and supplying a dev_id pointer to both request_irq()
380 3. In AscSearchIOPortAddr11() restore a call to check_region() which
381 should be used before I/O port probing.
382 4. Fix bug in asc_prt_hex() which resulted in the displaying
384 5. Incorporate miscellaneous Asc Library bug fixes and new microcode.
385 6. Change driver versioning to be specific to each Linux sub-level.
386 7. Change statistics gathering to be per adapter instead of global
388 8. Add more information and statistics to the adapter /proc file:
389 /proc/scsi/advansys[0...].
390 9. Remove 'cmd_per_lun' from the "Known Problems or Issues" list.
391 This problem has been addressed with the SCSI mid-level changes
392 made in v1.3.89. The advansys_select_queue_depths() function
393 was added for the v1.3.89 changes.
396 1. Incorporate miscellaneous Asc Library bug fixes and new microcode.
399 1. Enable clustering and optimize the setting of the maximum number
400 of scatter gather elements for any particular board. Clustering
401 increases CPU utilization, but results in a relatively larger
402 increase in I/O throughput.
403 2. Improve the performance of the request queuing functions by
404 adding a last pointer to the queue structure.
405 3. Correct problems with reset and abort request handling that
406 could have hung or crashed Linux.
407 4. Add more information to the adapter /proc file:
408 /proc/scsi/advansys[0...].
409 5. Remove the request timeout issue form the driver issues list.
410 6. Miscellaneous documentation additions and changes.
413 1. Make changes to handle the new v2.1.0 kernel memory mapping
414 in which a kernel virtual address may not be equivalent to its
415 bus or DMA memory address.
416 2. Change abort and reset request handling to make it yet even
418 3. Try to mitigate request starvation by sending ordered requests
419 to heavily loaded, tag queuing enabled devices.
420 4. Maintain statistics on request response time.
421 5. Add request response time statistics and other information to
422 the adapter /proc file: /proc/scsi/advansys[0...].
425 1. Add conditionally compiled code (ASC_QUEUE_FLOW_CONTROL) to
426 make use of mid-level SCSI driver device queue depth flow
427 control mechanism. This will eliminate aborts caused by a
428 device being unable to keep up with requests and eliminate
429 repeat busy or QUEUE FULL status returned by a device.
430 2. Incorporate miscellaneous Asc Library bug fixes.
431 3. To allow the driver to work in kernels with broken module
432 support set 'cmd_per_lun' if the driver is compiled as a
433 module. This change affects kernels v1.3.89 to present.
434 4. Remove PCI BIOS address from the driver banner. The PCI BIOS
435 is relocated by the motherboard BIOS and its new address can
436 not be determined by the driver.
437 5. Add mid-level SCSI queue depth information to the adapter
438 /proc file: /proc/scsi/advansys[0...].
441 1. Change allocation of global structures used for device
442 initialization to guarantee they are in DMA-able memory.
443 Previously when the driver was loaded as a module these
444 structures might not have been in DMA-able memory, causing
445 device initialization to fail.
448 1. In advansys_reset(), if the request is a synchronous reset
449 request, even if the request serial number has changed, then
450 complete the request.
451 2. Add Asc Library bug fixes including new microcode.
452 3. Clear inquiry buffer before using it.
453 4. Correct ifdef typo.
456 1. Add Asc Library bug fixes including new microcode.
457 2. Add synchronous data transfer rate information to the
458 adapter /proc file: /proc/scsi/advansys[0...].
459 3. Change ADVANSYS_DEBUG to be disabled by default. This
460 will reduce the size of the driver image, eliminate execution
461 overhead, and remove unneeded symbols from the kernel symbol
462 space that were previously added by the driver.
463 4. Add new compile-time option ADVANSYS_ASSERT for assertion
464 code that used to be defined within ADVANSYS_DEBUG. This
465 option is enabled by default.
468 1. Change version number to 2.8 to synchronize the Linux driver
469 version numbering with other AdvanSys drivers.
470 2. Reformat source files without tabs to present the same view
471 of the file to everyone regardless of the editor tab setting
473 3. Add Asc Library bug fixes.
476 1. Change version number to 3.1 to indicate that support for
477 Ultra-Wide adapters (ABP-940UW) is included in this release.
478 2. Add Asc Library (Narrow Board) bug fixes.
479 3. Report an underrun condition with the host status byte set
480 to DID_UNDERRUN. Currently DID_UNDERRUN is defined to 0 which
481 causes the underrun condition to be ignored. When Linux defines
482 its own DID_UNDERRUN the constant defined in this file can be
484 4. Add patch to AscWaitTixISRDone().
485 5. Add support for up to 16 different AdvanSys host adapter SCSI
486 channels in one system. This allows four cards with four channels
487 to be used in one system.
490 1. Handle that PCI register base addresses are not always page
491 aligned even though ioremap() requires that the address argument
495 1. Update latest BIOS version checked for from the /proc file.
496 2. Don't set microcode SDTR variable at initialization. Instead
497 wait until device capabilities have been detected from an Inquiry
501 1. Improve performance when the driver is compiled as module by
502 allowing up to 64 scatter-gather elements instead of 8.
505 1. Set time delay in AscWaitTixISRDone() to 1000 ms.
506 2. Include SMP locking changes.
507 3. For v2.1.93 and newer kernels use CONFIG_PCI and new PCI BIOS
509 4. Update board serial number printing.
510 5. Try allocating an IRQ both with and without the IRQF_DISABLED
511 flag set to allow IRQ sharing with drivers that do not set
512 the IRQF_DISABLED flag. Also display a more descriptive error
513 message if request_irq() fails.
514 6. Update to latest Asc and Adv Libraries.
517 1. Update Adv Library to 4.16 which includes support for
518 the ASC38C0800 (Ultra2/LVD) IC.
521 1. Correct PCI compile time option for v2.1.93 and greater
522 kernels, advansys_info() string, and debug compile time
524 2. Correct DvcSleepMilliSecond() for v2.1.0 and greater
525 kernels. This caused an LVD detection/BIST problem problem
527 3. Sort PCI cards by PCI Bus, Slot, Function ascending order
528 to be consistent with the BIOS.
529 4. Update to Asc Library S121 and Adv Library 5.2.
532 1. Correct PCI card detection bug introduced in 3.2B that
533 prevented PCI cards from being detected in kernels older
537 1. Correct /proc device synchronous speed information display.
538 Also when re-negotiation is pending for a target device
539 note this condition with an * and footnote.
540 2. Correct initialization problem with Ultra-Wide cards that
541 have a pre-3.2 BIOS. A microcode variable changed locations
542 in 3.2 and greater BIOSes which caused WDTR to be attempted
543 erroneously with drives that don't support WDTR.
546 1. Fix compile error caused by v2.3.13 PCI structure change.
547 2. Remove field from ASCEEP_CONFIG that resulted in an EEPROM
548 checksum error for ISA cards.
549 3. Remove ASC_QUEUE_FLOW_CONTROL conditional code. The mid-level
550 SCSI changes that it depended on were never included in Linux.
553 1. Handle new initial function code added in v2.3.16 for all
557 1. Fix PCI board detection in v2.3.13 and greater kernels.
558 2. Fix comiple errors in v2.3.X with debugging enabled.
561 1. Add 64-bit address, long support for Alpha and UltraSPARC.
562 The driver has been verified to work on an Alpha system.
563 2. Add partial byte order handling support for Power PC and
564 other big-endian platforms. This support has not yet been
565 completed or verified.
566 3. For wide boards replace block zeroing of request and
567 scatter-gather structures with individual field initialization
568 to improve performance.
569 4. Correct and clarify ROM BIOS version detection.
572 1. Update to Adv Library 5.4.
573 2. Add v2.3.19 underrun reporting to asc_isr_callback() and
574 adv_isr_callback(). Remove DID_UNDERRUN constant and other
575 no longer needed code that previously documented the lack
576 of underrun handling.
579 1. Eliminate compile errors for v2.0 and earlier kernels.
582 1. Correct debug compile error in asc_prt_adv_scsi_req_q().
583 2. Update Adv Library to 5.5.
584 3. Add ifdef handling for /proc changes added in v2.3.28.
585 4. Increase Wide board scatter-gather list maximum length to
586 255 when the driver is compiled into the kernel.
589 1. Fix bug in adv_get_sglist() that caused an assertion failure
590 at line 7475. The reqp->sgblkp pointer must be initialized
591 to NULL in adv_get_sglist().
594 1. Really fix bug in adv_get_sglist().
595 2. Incorporate v2.3.29 changes into driver.
598 1. Add CONFIG_ISA ifdef code.
599 2. Include advansys_interrupts_enabled name change patch.
600 3. For >= v2.3.28 use new SCSI error handling with new function
601 advansys_eh_bus_reset(). Don't include an abort function
602 because of base library limitations.
603 4. For >= v2.3.28 use per board lock instead of io_request_lock.
604 5. For >= v2.3.28 eliminate advansys_command() and
605 advansys_command_done().
606 6. Add some changes for PowerPC (Big Endian) support, but it isn't
608 7. Fix "nonexistent resource free" problem that occurred on a module
609 unload for boards with an I/O space >= 255. The 'n_io_port' field
610 is only one byte and can not be used to hold an ioport length more
614 1. Update to Adv Library 5.8.
615 2. For wide cards add support for CDBs up to 16 bytes.
616 3. Eliminate warnings when CONFIG_PROC_FS is not defined.
619 1. Support for PowerPC (Big Endian) wide cards. Narrow cards
621 2. Change bitfields to shift and mask access for endian
625 1. Update for latest 2.4 kernel.
626 2. Test ABP-480 CardBus support in 2.4 kernel - works!
627 3. Update to Asc Library S123.
628 4. Update to Adv Library 5.12.
631 1. Update for latest 2.4 kernel.
632 2. Create patches for 2.2 and 2.4 kernels.
635 1. Now that 2.4 is released remove ifdef code for kernel versions
636 less than 2.2. The driver is now only supported in kernels 2.2,
638 2. Add code to release and acquire the io_request_lock in
639 the driver entrypoint functions: advansys_detect and
640 advansys_queuecommand. In kernel 2.4 the SCSI mid-level driver
641 still holds the io_request_lock on entry to SCSI low-level drivers.
642 This was supposed to be removed before 2.4 was released but never
643 happened. When the mid-level SCSI driver is changed all references
644 to the io_request_lock should be removed from the driver.
645 3. Simplify error handling by removing advansys_abort(),
646 AscAbortSRB(), AscResetDevice(). SCSI bus reset requests are
647 now handled by resetting the SCSI bus and fully re-initializing
648 the chip. This simple method of error recovery has proven to work
649 most reliably after attempts at different methods. Also now only
650 support the "new" error handling method and remove the obsolete
651 error handling interface.
652 4. Fix debug build errors.
655 1. Merge with ConnectCom version from Andy Kellner which
656 updates Adv Library to 5.14.
657 2. Make PowerPC (Big Endian) work for narrow cards and
658 fix problems writing EEPROM for wide cards.
659 3. Remove interrupts_enabled assertion function.
662 1. Return an error from narrow boards if passed a 16 byte
663 CDB. The wide board can already handle 16 byte CDBs.
666 1. hacks for lk 2.5 series (D. Gilbert)
669 1. change select_queue_depths to slave_configure
670 2. make cmd_per_lun be sane again
673 1. continuing cleanup for lk 2.6 series
674 2. Fix problem in lk 2.6.7-bk2 that broke PCI wide cards
675 3. Fix problem that oopsed ISA cards
677 I. Known Problems/Fix List (XXX)
679 1. Need to add memory mapping workaround. Test the memory mapping.
680 If it doesn't work revert to I/O port access. Can a test be done
682 2. Handle an interrupt not working. Keep an interrupt counter in
683 the interrupt handler. In the timeout function if the interrupt
684 has not occurred then print a message and run in polled mode.
685 3. Allow bus type scanning order to be changed.
686 4. Need to add support for target mode commands, cf. CAM XPT.
688 J. Credits (Chronological Order)
690 Bob Frey <bfrey@turbolinux.com.cn> wrote the AdvanSys SCSI driver
691 and maintained it up to 3.3F. He continues to answer questions
692 and help maintain the driver.
694 Nathan Hartwell <mage@cdc3.cdc.net> provided the directions and
695 basis for the Linux v1.3.X changes which were included in the
698 Thomas E Zerucha <zerucha@shell.portal.com> pointed out a bug
699 in advansys_biosparam() which was fixed in the 1.3 release.
701 Erik Ratcliffe <erik@caldera.com> has done testing of the
702 AdvanSys driver in the Caldera releases.
704 Rik van Riel <H.H.vanRiel@fys.ruu.nl> provided a patch to
705 AscWaitTixISRDone() which he found necessary to make the
706 driver work with a SCSI-1 disk.
708 Mark Moran <mmoran@mmoran.com> has helped test Ultra-Wide
709 support in the 3.1A driver.
711 Doug Gilbert <dgilbert@interlog.com> has made changes and
712 suggestions to improve the driver and done a lot of testing.
714 Ken Mort <ken@mort.net> reported a DEBUG compile bug fixed
717 Tom Rini <trini@kernel.crashing.org> provided the CONFIG_ISA
718 patch and helped with PowerPC wide and narrow board support.
720 Philip Blundell <philb@gnu.org> provided an
721 advansys_interrupts_enabled patch.
723 Dave Jones <dave@denial.force9.co.uk> reported the compiler
724 warnings generated when CONFIG_PROC_FS was not defined in
727 Jerry Quinn <jlquinn@us.ibm.com> fixed PowerPC support (endian
728 problems) for wide cards.
730 Bryan Henderson <bryanh@giraffe-data.com> helped debug narrow
733 Manuel Veloso <veloso@pobox.com> worked hard on PowerPC narrow
734 board support and fixed a bug in AscGetEEPConfig().
736 Arnaldo Carvalho de Melo <acme@conectiva.com.br> made
737 save_flags/restore_flags changes.
739 Andy Kellner <AKellner@connectcom.net> continues the Advansys SCSI
740 driver development for ConnectCom (Version > 3.3F).
742 K. ConnectCom (AdvanSys) Contact Information
744 Mail: ConnectCom Solutions, Inc.
747 Operator/Sales: 1-408-383-9400
749 Tech Support: 1-408-467-2930
750 Tech Support E-Mail: linux@connectcom.net
751 FTP Site: ftp.connectcom.net (login: anonymous)
752 Web Site: http://www.connectcom.net
757 * --- Linux Include Files
760 #include <linux/module.h>
761 #include <linux/string.h>
762 #include <linux/kernel.h>
763 #include <linux/types.h>
764 #include <linux/ioport.h>
765 #include <linux/interrupt.h>
766 #include <linux/delay.h>
767 #include <linux/slab.h>
768 #include <linux/mm.h>
769 #include <linux/proc_fs.h>
770 #include <linux/init.h>
771 #include <linux/blkdev.h>
772 #include <linux/pci.h>
773 #include <linux/spinlock.h>
774 #include <linux/dma-mapping.h>
777 #include <asm/system.h>
780 #include <scsi/scsi_cmnd.h>
781 #include <scsi/scsi_device.h>
782 #include <scsi/scsi_tcq.h>
783 #include <scsi/scsi.h>
784 #include <scsi/scsi_host.h>
786 /* FIXME: (by jejb@steeleye.com) This warning is present for two
789 * 1) This driver badly needs converting to the correct driver model
792 * 2) Although all of the necessary command mapping places have the
793 * appropriate dma_map.. APIs, the driver still processes its internal
794 * queue using bus_to_virt() and virt_to_bus() which are illegal under
795 * the API. The entire queue processing structure will need to be
796 * altered to fix this.
798 #warning this driver is still not properly converted to the DMA API
804 /* Enable driver assertions. */
805 #define ADVANSYS_ASSERT
807 /* Enable driver /proc statistics. */
808 #define ADVANSYS_STATS
810 /* Enable driver tracing. */
811 /* #define ADVANSYS_DEBUG */
814 * --- Asc Library Constants and Macros
817 #define ASC_LIB_VERSION_MAJOR 1
818 #define ASC_LIB_VERSION_MINOR 24
819 #define ASC_LIB_SERIAL_NUMBER 123
822 * Portable Data Types
824 * Any instance where a 32-bit long or pointer type is assumed
825 * for precision or HW defined structures, the following define
826 * types must be used. In Linux the char, short, and int types
827 * are all consistent at 8, 16, and 32 bits respectively. Pointers
828 * and long types are 64 bits on Alpha and UltraSPARC.
830 #define ASC_PADDR __u32 /* Physical/Bus address data type. */
831 #define ASC_VADDR __u32 /* Virtual address data type. */
832 #define ASC_DCNT __u32 /* Unsigned Data count type. */
833 #define ASC_SDCNT __s32 /* Signed Data count type. */
836 * These macros are used to convert a virtual address to a
837 * 32-bit value. This currently can be used on Linux Alpha
838 * which uses 64-bit virtual address but a 32-bit bus address.
839 * This is likely to break in the future, but doing this now
840 * will give us time to change the HW and FW to handle 64-bit
843 #define ASC_VADDR_TO_U32 virt_to_bus
844 #define ASC_U32_TO_VADDR bus_to_virt
846 typedef unsigned char uchar
;
857 #define UW_ERR (uint)(0xFFFF)
858 #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0)
859 #define AscPCIConfigVendorIDRegister 0x0000
860 #define AscPCIConfigDeviceIDRegister 0x0002
861 #define AscPCIConfigCommandRegister 0x0004
862 #define AscPCIConfigStatusRegister 0x0006
863 #define AscPCIConfigRevisionIDRegister 0x0008
864 #define AscPCIConfigCacheSize 0x000C
865 #define AscPCIConfigLatencyTimer 0x000D
866 #define AscPCIIOBaseRegister 0x0010
867 #define AscPCICmdRegBits_IOMemBusMaster 0x0007
868 #define ASC_PCI_ID2BUS(id) ((id) & 0xFF)
869 #define ASC_PCI_ID2DEV(id) (((id) >> 11) & 0x1F)
870 #define ASC_PCI_ID2FUNC(id) (((id) >> 8) & 0x7)
871 #define ASC_PCI_MKID(bus, dev, func) ((((dev) & 0x1F) << 11) | (((func) & 0x7) << 8) | ((bus) & 0xFF))
872 #define ASC_PCI_REVISION_3150 0x02
873 #define ASC_PCI_REVISION_3050 0x03
875 #define ASC_DVCLIB_CALL_DONE (1)
876 #define ASC_DVCLIB_CALL_FAILED (0)
877 #define ASC_DVCLIB_CALL_ERROR (-1)
879 #define PCI_VENDOR_ID_ASP 0x10cd
880 #define PCI_DEVICE_ID_ASP_1200A 0x1100
881 #define PCI_DEVICE_ID_ASP_ABP940 0x1200
882 #define PCI_DEVICE_ID_ASP_ABP940U 0x1300
883 #define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
884 #define PCI_DEVICE_ID_38C0800_REV1 0x2500
885 #define PCI_DEVICE_ID_38C1600_REV1 0x2700
888 * Enable CC_VERY_LONG_SG_LIST to support up to 64K element SG lists.
889 * The SRB structure will have to be changed and the ASC_SRB2SCSIQ()
890 * macro re-defined to be able to obtain a ASC_SCSI_Q pointer from the
893 #define CC_VERY_LONG_SG_LIST 0
894 #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr)
896 #define PortAddr unsigned short /* port address size */
897 #define inp(port) inb(port)
898 #define outp(port, byte) outb((byte), (port))
900 #define inpw(port) inw(port)
901 #define outpw(port, word) outw((word), (port))
903 #define ASC_MAX_SG_QUEUE 7
904 #define ASC_MAX_SG_LIST 255
906 #define ASC_CS_TYPE unsigned short
908 #define ASC_IS_ISA (0x0001)
909 #define ASC_IS_ISAPNP (0x0081)
910 #define ASC_IS_EISA (0x0002)
911 #define ASC_IS_PCI (0x0004)
912 #define ASC_IS_PCI_ULTRA (0x0104)
913 #define ASC_IS_PCMCIA (0x0008)
914 #define ASC_IS_MCA (0x0020)
915 #define ASC_IS_VL (0x0040)
916 #define ASC_ISA_PNP_PORT_ADDR (0x279)
917 #define ASC_ISA_PNP_PORT_WRITE (ASC_ISA_PNP_PORT_ADDR+0x800)
918 #define ASC_IS_WIDESCSI_16 (0x0100)
919 #define ASC_IS_WIDESCSI_32 (0x0200)
920 #define ASC_IS_BIG_ENDIAN (0x8000)
921 #define ASC_CHIP_MIN_VER_VL (0x01)
922 #define ASC_CHIP_MAX_VER_VL (0x07)
923 #define ASC_CHIP_MIN_VER_PCI (0x09)
924 #define ASC_CHIP_MAX_VER_PCI (0x0F)
925 #define ASC_CHIP_VER_PCI_BIT (0x08)
926 #define ASC_CHIP_MIN_VER_ISA (0x11)
927 #define ASC_CHIP_MIN_VER_ISA_PNP (0x21)
928 #define ASC_CHIP_MAX_VER_ISA (0x27)
929 #define ASC_CHIP_VER_ISA_BIT (0x30)
930 #define ASC_CHIP_VER_ISAPNP_BIT (0x20)
931 #define ASC_CHIP_VER_ASYN_BUG (0x21)
932 #define ASC_CHIP_VER_PCI 0x08
933 #define ASC_CHIP_VER_PCI_ULTRA_3150 (ASC_CHIP_VER_PCI | 0x02)
934 #define ASC_CHIP_VER_PCI_ULTRA_3050 (ASC_CHIP_VER_PCI | 0x03)
935 #define ASC_CHIP_MIN_VER_EISA (0x41)
936 #define ASC_CHIP_MAX_VER_EISA (0x47)
937 #define ASC_CHIP_VER_EISA_BIT (0x40)
938 #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3)
939 #define ASC_MAX_LIB_SUPPORTED_ISA_CHIP_VER 0x21
940 #define ASC_MAX_LIB_SUPPORTED_PCI_CHIP_VER 0x0A
941 #define ASC_MAX_VL_DMA_ADDR (0x07FFFFFFL)
942 #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL)
943 #define ASC_MAX_PCI_DMA_ADDR (0xFFFFFFFFL)
944 #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL)
945 #define ASC_MAX_ISA_DMA_ADDR (0x00FFFFFFL)
946 #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL)
947 #define ASC_MAX_EISA_DMA_ADDR (0x07FFFFFFL)
948 #define ASC_MAX_EISA_DMA_COUNT (0x07FFFFFFL)
950 #define ASC_SCSI_ID_BITS 3
951 #define ASC_SCSI_TIX_TYPE uchar
952 #define ASC_ALL_DEVICE_BIT_SET 0xFF
953 #define ASC_SCSI_BIT_ID_TYPE uchar
954 #define ASC_MAX_TID 7
955 #define ASC_MAX_LUN 7
956 #define ASC_SCSI_WIDTH_BIT_SET 0xFF
957 #define ASC_MAX_SENSE_LEN 32
958 #define ASC_MIN_SENSE_LEN 14
959 #define ASC_MAX_CDB_LEN 12
960 #define ASC_SCSI_RESET_HOLD_TIME_US 60
962 #define ADV_INQ_CLOCKING_ST_ONLY 0x0
963 #define ADV_INQ_CLOCKING_DT_ONLY 0x1
964 #define ADV_INQ_CLOCKING_ST_AND_DT 0x3
967 * Inquiry SPC-2 SPI Byte 1 EVPD (Enable Vital Product Data)
968 * and CmdDt (Command Support Data) field bit definitions.
970 #define ADV_INQ_RTN_VPD_AND_CMDDT 0x3
971 #define ADV_INQ_RTN_CMDDT_FOR_OP_CODE 0x2
972 #define ADV_INQ_RTN_VPD_FOR_PG_CODE 0x1
973 #define ADV_INQ_RTN_STD_INQUIRY_DATA 0x0
975 #define ASC_SCSIDIR_NOCHK 0x00
976 #define ASC_SCSIDIR_T2H 0x08
977 #define ASC_SCSIDIR_H2T 0x10
978 #define ASC_SCSIDIR_NODATA 0x18
979 #define SCSI_ASC_NOMEDIA 0x3A
980 #define ASC_SRB_HOST(x) ((uchar)((uchar)(x) >> 4))
981 #define ASC_SRB_TID(x) ((uchar)((uchar)(x) & (uchar)0x0F))
982 #define ASC_SRB_LUN(x) ((uchar)((uint)(x) >> 13))
983 #define PUT_CDB1(x) ((uchar)((uint)(x) >> 8))
984 #define MS_CMD_DONE 0x00
985 #define MS_EXTEND 0x01
986 #define MS_SDTR_LEN 0x03
987 #define MS_SDTR_CODE 0x01
988 #define MS_WDTR_LEN 0x02
989 #define MS_WDTR_CODE 0x03
990 #define MS_MDP_LEN 0x05
991 #define MS_MDP_CODE 0x00
994 * Inquiry data structure and bitfield macros
996 * Only quantities of more than 1 bit are shifted, since the others are
997 * just tested for true or false. C bitfields aren't portable between big
998 * and little-endian platforms so they are not used.
1001 #define ASC_INQ_DVC_TYPE(inq) ((inq)->periph & 0x1f)
1002 #define ASC_INQ_QUALIFIER(inq) (((inq)->periph & 0xe0) >> 5)
1003 #define ASC_INQ_DVC_TYPE_MOD(inq) ((inq)->devtype & 0x7f)
1004 #define ASC_INQ_REMOVABLE(inq) ((inq)->devtype & 0x80)
1005 #define ASC_INQ_ANSI_VER(inq) ((inq)->ver & 0x07)
1006 #define ASC_INQ_ECMA_VER(inq) (((inq)->ver & 0x38) >> 3)
1007 #define ASC_INQ_ISO_VER(inq) (((inq)->ver & 0xc0) >> 6)
1008 #define ASC_INQ_RESPONSE_FMT(inq) ((inq)->byte3 & 0x0f)
1009 #define ASC_INQ_TERM_IO(inq) ((inq)->byte3 & 0x40)
1010 #define ASC_INQ_ASYNC_NOTIF(inq) ((inq)->byte3 & 0x80)
1011 #define ASC_INQ_SOFT_RESET(inq) ((inq)->flags & 0x01)
1012 #define ASC_INQ_CMD_QUEUE(inq) ((inq)->flags & 0x02)
1013 #define ASC_INQ_LINK_CMD(inq) ((inq)->flags & 0x08)
1014 #define ASC_INQ_SYNC(inq) ((inq)->flags & 0x10)
1015 #define ASC_INQ_WIDE16(inq) ((inq)->flags & 0x20)
1016 #define ASC_INQ_WIDE32(inq) ((inq)->flags & 0x40)
1017 #define ASC_INQ_REL_ADDR(inq) ((inq)->flags & 0x80)
1018 #define ASC_INQ_INFO_UNIT(inq) ((inq)->info & 0x01)
1019 #define ASC_INQ_QUICK_ARB(inq) ((inq)->info & 0x02)
1020 #define ASC_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2)
1032 uchar product_id
[16];
1033 uchar product_rev_level
[4];
1036 #define ASC_SG_LIST_PER_Q 7
1037 #define QS_FREE 0x00
1038 #define QS_READY 0x01
1039 #define QS_DISC1 0x02
1040 #define QS_DISC2 0x04
1041 #define QS_BUSY 0x08
1042 #define QS_ABORTED 0x40
1043 #define QS_DONE 0x80
1044 #define QC_NO_CALLBACK 0x01
1045 #define QC_SG_SWAP_QUEUE 0x02
1046 #define QC_SG_HEAD 0x04
1047 #define QC_DATA_IN 0x08
1048 #define QC_DATA_OUT 0x10
1049 #define QC_URGENT 0x20
1050 #define QC_MSG_OUT 0x40
1051 #define QC_REQ_SENSE 0x80
1052 #define QCSG_SG_XFER_LIST 0x02
1053 #define QCSG_SG_XFER_MORE 0x04
1054 #define QCSG_SG_XFER_END 0x08
1055 #define QD_IN_PROGRESS 0x00
1056 #define QD_NO_ERROR 0x01
1057 #define QD_ABORTED_BY_HOST 0x02
1058 #define QD_WITH_ERROR 0x04
1059 #define QD_INVALID_REQUEST 0x80
1060 #define QD_INVALID_HOST_NUM 0x81
1061 #define QD_INVALID_DEVICE 0x82
1062 #define QD_ERR_INTERNAL 0xFF
1063 #define QHSTA_NO_ERROR 0x00
1064 #define QHSTA_M_SEL_TIMEOUT 0x11
1065 #define QHSTA_M_DATA_OVER_RUN 0x12
1066 #define QHSTA_M_DATA_UNDER_RUN 0x12
1067 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
1068 #define QHSTA_M_BAD_BUS_PHASE_SEQ 0x14
1069 #define QHSTA_D_QDONE_SG_LIST_CORRUPTED 0x21
1070 #define QHSTA_D_ASC_DVC_ERROR_CODE_SET 0x22
1071 #define QHSTA_D_HOST_ABORT_FAILED 0x23
1072 #define QHSTA_D_EXE_SCSI_Q_FAILED 0x24
1073 #define QHSTA_D_EXE_SCSI_Q_BUSY_TIMEOUT 0x25
1074 #define QHSTA_D_ASPI_NO_BUF_POOL 0x26
1075 #define QHSTA_M_WTM_TIMEOUT 0x41
1076 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
1077 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
1078 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
1079 #define QHSTA_M_TARGET_STATUS_BUSY 0x45
1080 #define QHSTA_M_BAD_TAG_CODE 0x46
1081 #define QHSTA_M_BAD_QUEUE_FULL_OR_BUSY 0x47
1082 #define QHSTA_M_HUNG_REQ_SCSI_BUS_RESET 0x48
1083 #define QHSTA_D_LRAM_CMP_ERROR 0x81
1084 #define QHSTA_M_MICRO_CODE_ERROR_HALT 0xA1
1085 #define ASC_FLAG_SCSIQ_REQ 0x01
1086 #define ASC_FLAG_BIOS_SCSIQ_REQ 0x02
1087 #define ASC_FLAG_BIOS_ASYNC_IO 0x04
1088 #define ASC_FLAG_SRB_LINEAR_ADDR 0x08
1089 #define ASC_FLAG_WIN16 0x10
1090 #define ASC_FLAG_WIN32 0x20
1091 #define ASC_FLAG_ISA_OVER_16MB 0x40
1092 #define ASC_FLAG_DOS_VM_CALLBACK 0x80
1093 #define ASC_TAG_FLAG_EXTRA_BYTES 0x10
1094 #define ASC_TAG_FLAG_DISABLE_DISCONNECT 0x04
1095 #define ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX 0x08
1096 #define ASC_TAG_FLAG_DISABLE_CHK_COND_INT_HOST 0x40
1097 #define ASC_SCSIQ_CPY_BEG 4
1098 #define ASC_SCSIQ_SGHD_CPY_BEG 2
1099 #define ASC_SCSIQ_B_FWD 0
1100 #define ASC_SCSIQ_B_BWD 1
1101 #define ASC_SCSIQ_B_STATUS 2
1102 #define ASC_SCSIQ_B_QNO 3
1103 #define ASC_SCSIQ_B_CNTL 4
1104 #define ASC_SCSIQ_B_SG_QUEUE_CNT 5
1105 #define ASC_SCSIQ_D_DATA_ADDR 8
1106 #define ASC_SCSIQ_D_DATA_CNT 12
1107 #define ASC_SCSIQ_B_SENSE_LEN 20
1108 #define ASC_SCSIQ_DONE_INFO_BEG 22
1109 #define ASC_SCSIQ_D_SRBPTR 22
1110 #define ASC_SCSIQ_B_TARGET_IX 26
1111 #define ASC_SCSIQ_B_CDB_LEN 28
1112 #define ASC_SCSIQ_B_TAG_CODE 29
1113 #define ASC_SCSIQ_W_VM_ID 30
1114 #define ASC_SCSIQ_DONE_STATUS 32
1115 #define ASC_SCSIQ_HOST_STATUS 33
1116 #define ASC_SCSIQ_SCSI_STATUS 34
1117 #define ASC_SCSIQ_CDB_BEG 36
1118 #define ASC_SCSIQ_DW_REMAIN_XFER_ADDR 56
1119 #define ASC_SCSIQ_DW_REMAIN_XFER_CNT 60
1120 #define ASC_SCSIQ_B_FIRST_SG_WK_QP 48
1121 #define ASC_SCSIQ_B_SG_WK_QP 49
1122 #define ASC_SCSIQ_B_SG_WK_IX 50
1123 #define ASC_SCSIQ_W_ALT_DC1 52
1124 #define ASC_SCSIQ_B_LIST_CNT 6
1125 #define ASC_SCSIQ_B_CUR_LIST_CNT 7
1126 #define ASC_SGQ_B_SG_CNTL 4
1127 #define ASC_SGQ_B_SG_HEAD_QP 5
1128 #define ASC_SGQ_B_SG_LIST_CNT 6
1129 #define ASC_SGQ_B_SG_CUR_LIST_CNT 7
1130 #define ASC_SGQ_LIST_BEG 8
1131 #define ASC_DEF_SCSI1_QNG 4
1132 #define ASC_MAX_SCSI1_QNG 4
1133 #define ASC_DEF_SCSI2_QNG 16
1134 #define ASC_MAX_SCSI2_QNG 32
1135 #define ASC_TAG_CODE_MASK 0x23
1136 #define ASC_STOP_REQ_RISC_STOP 0x01
1137 #define ASC_STOP_ACK_RISC_STOP 0x03
1138 #define ASC_STOP_CLEAN_UP_BUSY_Q 0x10
1139 #define ASC_STOP_CLEAN_UP_DISC_Q 0x20
1140 #define ASC_STOP_HOST_REQ_RISC_HALT 0x40
1141 #define ASC_TIDLUN_TO_IX(tid, lun) (ASC_SCSI_TIX_TYPE)((tid) + ((lun)<<ASC_SCSI_ID_BITS))
1142 #define ASC_TID_TO_TARGET_ID(tid) (ASC_SCSI_BIT_ID_TYPE)(0x01 << (tid))
1143 #define ASC_TIX_TO_TARGET_ID(tix) (0x01 << ((tix) & ASC_MAX_TID))
1144 #define ASC_TIX_TO_TID(tix) ((tix) & ASC_MAX_TID)
1145 #define ASC_TID_TO_TIX(tid) ((tid) & ASC_MAX_TID)
1146 #define ASC_TIX_TO_LUN(tix) (((tix) >> ASC_SCSI_ID_BITS) & ASC_MAX_LUN)
1147 #define ASC_QNO_TO_QADDR(q_no) ((ASC_QADR_BEG)+((int)(q_no) << 6))
1149 typedef struct asc_scsiq_1
{
1156 ASC_PADDR data_addr
;
1158 ASC_PADDR sense_addr
;
1163 typedef struct asc_scsiq_2
{
1172 typedef struct asc_scsiq_3
{
1179 typedef struct asc_scsiq_4
{
1180 uchar cdb
[ASC_MAX_CDB_LEN
];
1181 uchar y_first_sg_list_qp
;
1182 uchar y_working_sg_qp
;
1183 uchar y_working_sg_ix
;
1186 ushort x_reconnect_rtn
;
1187 ASC_PADDR x_saved_data_addr
;
1188 ASC_DCNT x_saved_data_cnt
;
1191 typedef struct asc_q_done_info
{
1200 ASC_DCNT remain_bytes
;
1203 typedef struct asc_sg_list
{
1208 typedef struct asc_sg_head
{
1211 ushort entry_to_copy
;
1213 ASC_SG_LIST sg_list
[ASC_MAX_SG_LIST
];
1216 #define ASC_MIN_SG_LIST 2
1218 typedef struct asc_min_sg_head
{
1221 ushort entry_to_copy
;
1223 ASC_SG_LIST sg_list
[ASC_MIN_SG_LIST
];
1226 #define QCX_SORT (0x0001)
1227 #define QCX_COALEASE (0x0002)
1229 typedef struct asc_scsi_q
{
1233 ASC_SG_HEAD
*sg_head
;
1234 ushort remain_sg_entry_cnt
;
1235 ushort next_sg_index
;
1238 typedef struct asc_scsi_req_q
{
1242 ASC_SG_HEAD
*sg_head
;
1245 uchar cdb
[ASC_MAX_CDB_LEN
];
1246 uchar sense
[ASC_MIN_SENSE_LEN
];
1249 typedef struct asc_scsi_bios_req_q
{
1253 ASC_SG_HEAD
*sg_head
;
1256 uchar cdb
[ASC_MAX_CDB_LEN
];
1257 uchar sense
[ASC_MIN_SENSE_LEN
];
1258 } ASC_SCSI_BIOS_REQ_Q
;
1260 typedef struct asc_risc_q
{
1269 typedef struct asc_sg_list_q
{
1275 uchar sg_cur_list_cnt
;
1278 typedef struct asc_risc_sg_list_q
{
1282 ASC_SG_LIST sg_list
[7];
1283 } ASC_RISC_SG_LIST_Q
;
1285 #define ASC_EXE_SCSI_IO_MAX_IDLE_LOOP 0x1000000UL
1286 #define ASC_EXE_SCSI_IO_MAX_WAIT_LOOP 1024
1287 #define ASCQ_ERR_NO_ERROR 0
1288 #define ASCQ_ERR_IO_NOT_FOUND 1
1289 #define ASCQ_ERR_LOCAL_MEM 2
1290 #define ASCQ_ERR_CHKSUM 3
1291 #define ASCQ_ERR_START_CHIP 4
1292 #define ASCQ_ERR_INT_TARGET_ID 5
1293 #define ASCQ_ERR_INT_LOCAL_MEM 6
1294 #define ASCQ_ERR_HALT_RISC 7
1295 #define ASCQ_ERR_GET_ASPI_ENTRY 8
1296 #define ASCQ_ERR_CLOSE_ASPI 9
1297 #define ASCQ_ERR_HOST_INQUIRY 0x0A
1298 #define ASCQ_ERR_SAVED_SRB_BAD 0x0B
1299 #define ASCQ_ERR_QCNTL_SG_LIST 0x0C
1300 #define ASCQ_ERR_Q_STATUS 0x0D
1301 #define ASCQ_ERR_WR_SCSIQ 0x0E
1302 #define ASCQ_ERR_PC_ADDR 0x0F
1303 #define ASCQ_ERR_SYN_OFFSET 0x10
1304 #define ASCQ_ERR_SYN_XFER_TIME 0x11
1305 #define ASCQ_ERR_LOCK_DMA 0x12
1306 #define ASCQ_ERR_UNLOCK_DMA 0x13
1307 #define ASCQ_ERR_VDS_CHK_INSTALL 0x14
1308 #define ASCQ_ERR_MICRO_CODE_HALT 0x15
1309 #define ASCQ_ERR_SET_LRAM_ADDR 0x16
1310 #define ASCQ_ERR_CUR_QNG 0x17
1311 #define ASCQ_ERR_SG_Q_LINKS 0x18
1312 #define ASCQ_ERR_SCSIQ_PTR 0x19
1313 #define ASCQ_ERR_ISR_RE_ENTRY 0x1A
1314 #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B
1315 #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C
1316 #define ASCQ_ERR_SG_LIST_ODD_ADDRESS 0x1D
1317 #define ASCQ_ERR_XFER_ADDRESS_TOO_BIG 0x1E
1318 #define ASCQ_ERR_SCSIQ_NULL_PTR 0x1F
1319 #define ASCQ_ERR_SCSIQ_BAD_NEXT_PTR 0x20
1320 #define ASCQ_ERR_GET_NUM_OF_FREE_Q 0x21
1321 #define ASCQ_ERR_SEND_SCSI_Q 0x22
1322 #define ASCQ_ERR_HOST_REQ_RISC_HALT 0x23
1323 #define ASCQ_ERR_RESET_SDTR 0x24
1326 * Warning code values are set in ASC_DVC_VAR 'warn_code'.
1328 #define ASC_WARN_NO_ERROR 0x0000
1329 #define ASC_WARN_IO_PORT_ROTATE 0x0001
1330 #define ASC_WARN_EEPROM_CHKSUM 0x0002
1331 #define ASC_WARN_IRQ_MODIFIED 0x0004
1332 #define ASC_WARN_AUTO_CONFIG 0x0008
1333 #define ASC_WARN_CMD_QNG_CONFLICT 0x0010
1334 #define ASC_WARN_EEPROM_RECOVER 0x0020
1335 #define ASC_WARN_CFG_MSW_RECOVER 0x0040
1336 #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080
1339 * Error code values are set in ASC_DVC_VAR 'err_code'.
1341 #define ASC_IERR_WRITE_EEPROM 0x0001
1342 #define ASC_IERR_MCODE_CHKSUM 0x0002
1343 #define ASC_IERR_SET_PC_ADDR 0x0004
1344 #define ASC_IERR_START_STOP_CHIP 0x0008
1345 #define ASC_IERR_IRQ_NO 0x0010
1346 #define ASC_IERR_SET_IRQ_NO 0x0020
1347 #define ASC_IERR_CHIP_VERSION 0x0040
1348 #define ASC_IERR_SET_SCSI_ID 0x0080
1349 #define ASC_IERR_GET_PHY_ADDR 0x0100
1350 #define ASC_IERR_BAD_SIGNATURE 0x0200
1351 #define ASC_IERR_NO_BUS_TYPE 0x0400
1352 #define ASC_IERR_SCAM 0x0800
1353 #define ASC_IERR_SET_SDTR 0x1000
1354 #define ASC_IERR_RW_LRAM 0x8000
1356 #define ASC_DEF_IRQ_NO 10
1357 #define ASC_MAX_IRQ_NO 15
1358 #define ASC_MIN_IRQ_NO 10
1359 #define ASC_MIN_REMAIN_Q (0x02)
1360 #define ASC_DEF_MAX_TOTAL_QNG (0xF0)
1361 #define ASC_MIN_TAG_Q_PER_DVC (0x04)
1362 #define ASC_DEF_TAG_Q_PER_DVC (0x04)
1363 #define ASC_MIN_FREE_Q ASC_MIN_REMAIN_Q
1364 #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q))
1365 #define ASC_MAX_TOTAL_QNG 240
1366 #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16
1367 #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8
1368 #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20
1369 #define ASC_MAX_INRAM_TAG_QNG 16
1370 #define ASC_IOADR_TABLE_MAX_IX 11
1371 #define ASC_IOADR_GAP 0x10
1372 #define ASC_SEARCH_IOP_GAP 0x10
1373 #define ASC_MIN_IOP_ADDR (PortAddr)0x0100
1374 #define ASC_MAX_IOP_ADDR (PortAddr)0x3F0
1375 #define ASC_IOADR_1 (PortAddr)0x0110
1376 #define ASC_IOADR_2 (PortAddr)0x0130
1377 #define ASC_IOADR_3 (PortAddr)0x0150
1378 #define ASC_IOADR_4 (PortAddr)0x0190
1379 #define ASC_IOADR_5 (PortAddr)0x0210
1380 #define ASC_IOADR_6 (PortAddr)0x0230
1381 #define ASC_IOADR_7 (PortAddr)0x0250
1382 #define ASC_IOADR_8 (PortAddr)0x0330
1383 #define ASC_IOADR_DEF ASC_IOADR_8
1384 #define ASC_LIB_SCSIQ_WK_SP 256
1385 #define ASC_MAX_SYN_XFER_NO 16
1386 #define ASC_SYN_MAX_OFFSET 0x0F
1387 #define ASC_DEF_SDTR_OFFSET 0x0F
1388 #define ASC_DEF_SDTR_INDEX 0x00
1389 #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02
1390 #define SYN_XFER_NS_0 25
1391 #define SYN_XFER_NS_1 30
1392 #define SYN_XFER_NS_2 35
1393 #define SYN_XFER_NS_3 40
1394 #define SYN_XFER_NS_4 50
1395 #define SYN_XFER_NS_5 60
1396 #define SYN_XFER_NS_6 70
1397 #define SYN_XFER_NS_7 85
1398 #define SYN_ULTRA_XFER_NS_0 12
1399 #define SYN_ULTRA_XFER_NS_1 19
1400 #define SYN_ULTRA_XFER_NS_2 25
1401 #define SYN_ULTRA_XFER_NS_3 32
1402 #define SYN_ULTRA_XFER_NS_4 38
1403 #define SYN_ULTRA_XFER_NS_5 44
1404 #define SYN_ULTRA_XFER_NS_6 50
1405 #define SYN_ULTRA_XFER_NS_7 57
1406 #define SYN_ULTRA_XFER_NS_8 63
1407 #define SYN_ULTRA_XFER_NS_9 69
1408 #define SYN_ULTRA_XFER_NS_10 75
1409 #define SYN_ULTRA_XFER_NS_11 82
1410 #define SYN_ULTRA_XFER_NS_12 88
1411 #define SYN_ULTRA_XFER_NS_13 94
1412 #define SYN_ULTRA_XFER_NS_14 100
1413 #define SYN_ULTRA_XFER_NS_15 107
1415 typedef struct ext_msg
{
1421 uchar sdtr_xfer_period
;
1422 uchar sdtr_req_ack_offset
;
1437 #define xfer_period u_ext_msg.sdtr.sdtr_xfer_period
1438 #define req_ack_offset u_ext_msg.sdtr.sdtr_req_ack_offset
1439 #define wdtr_width u_ext_msg.wdtr.wdtr_width
1440 #define mdp_b3 u_ext_msg.mdp_b3
1441 #define mdp_b2 u_ext_msg.mdp_b2
1442 #define mdp_b1 u_ext_msg.mdp_b1
1443 #define mdp_b0 u_ext_msg.mdp_b0
1445 typedef struct asc_dvc_cfg
{
1446 ASC_SCSI_BIT_ID_TYPE can_tagged_qng
;
1447 ASC_SCSI_BIT_ID_TYPE cmd_qng_enabled
;
1448 ASC_SCSI_BIT_ID_TYPE disc_enable
;
1449 ASC_SCSI_BIT_ID_TYPE sdtr_enable
;
1451 uchar isa_dma_speed
;
1452 uchar isa_dma_channel
;
1454 ushort lib_serial_no
;
1457 ushort mcode_version
;
1458 uchar max_tag_qng
[ASC_MAX_TID
+ 1];
1460 uchar sdtr_period_offset
[ASC_MAX_TID
+ 1];
1461 ushort pci_slot_info
;
1462 uchar adapter_info
[6];
1466 #define ASC_DEF_DVC_CNTL 0xFFFF
1467 #define ASC_DEF_CHIP_SCSI_ID 7
1468 #define ASC_DEF_ISA_DMA_SPEED 4
1469 #define ASC_INIT_STATE_NULL 0x0000
1470 #define ASC_INIT_STATE_BEG_GET_CFG 0x0001
1471 #define ASC_INIT_STATE_END_GET_CFG 0x0002
1472 #define ASC_INIT_STATE_BEG_SET_CFG 0x0004
1473 #define ASC_INIT_STATE_END_SET_CFG 0x0008
1474 #define ASC_INIT_STATE_BEG_LOAD_MC 0x0010
1475 #define ASC_INIT_STATE_END_LOAD_MC 0x0020
1476 #define ASC_INIT_STATE_BEG_INQUIRY 0x0040
1477 #define ASC_INIT_STATE_END_INQUIRY 0x0080
1478 #define ASC_INIT_RESET_SCSI_DONE 0x0100
1479 #define ASC_INIT_STATE_WITHOUT_EEP 0x8000
1480 #define ASC_BUG_FIX_IF_NOT_DWB 0x0001
1481 #define ASC_BUG_FIX_ASYN_USE_SYN 0x0002
1482 #define ASYN_SDTR_DATA_FIX_PCI_REV_AB 0x41
1483 #define ASC_MIN_TAGGED_CMD 7
1484 #define ASC_MAX_SCSI_RESET_WAIT 30
1486 struct asc_dvc_var
; /* Forward Declaration. */
1488 typedef void (*ASC_ISR_CALLBACK
) (struct asc_dvc_var
*, ASC_QDONE_INFO
*);
1489 typedef int (*ASC_EXE_CALLBACK
) (struct asc_dvc_var
*, ASC_SCSI_Q
*);
1491 typedef struct asc_dvc_var
{
1495 ushort bug_fix_cntl
;
1497 ASC_ISR_CALLBACK isr_callback
;
1498 ASC_EXE_CALLBACK exe_callback
;
1499 ASC_SCSI_BIT_ID_TYPE init_sdtr
;
1500 ASC_SCSI_BIT_ID_TYPE sdtr_done
;
1501 ASC_SCSI_BIT_ID_TYPE use_tagged_qng
;
1502 ASC_SCSI_BIT_ID_TYPE unit_not_ready
;
1503 ASC_SCSI_BIT_ID_TYPE queue_full_or_busy
;
1504 ASC_SCSI_BIT_ID_TYPE start_motor
;
1505 uchar scsi_reset_wait
;
1508 uchar max_total_qng
;
1509 uchar cur_total_qng
;
1510 uchar in_critical_cnt
;
1512 uchar last_q_shortage
;
1514 uchar cur_dvc_qng
[ASC_MAX_TID
+ 1];
1515 uchar max_dvc_qng
[ASC_MAX_TID
+ 1];
1516 ASC_SCSI_Q
*scsiq_busy_head
[ASC_MAX_TID
+ 1];
1517 ASC_SCSI_Q
*scsiq_busy_tail
[ASC_MAX_TID
+ 1];
1518 uchar sdtr_period_tbl
[ASC_MAX_SYN_XFER_NO
];
1520 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always
;
1523 uchar dos_int13_table
[ASC_MAX_TID
+ 1];
1524 ASC_DCNT max_dma_count
;
1525 ASC_SCSI_BIT_ID_TYPE no_scam
;
1526 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer
;
1527 uchar max_sdtr_index
;
1528 uchar host_init_sdtr_index
;
1529 struct asc_board
*drv_ptr
;
1533 typedef struct asc_dvc_inq_info
{
1534 uchar type
[ASC_MAX_TID
+ 1][ASC_MAX_LUN
+ 1];
1537 typedef struct asc_cap_info
{
1542 typedef struct asc_cap_info_array
{
1543 ASC_CAP_INFO cap_info
[ASC_MAX_TID
+ 1][ASC_MAX_LUN
+ 1];
1544 } ASC_CAP_INFO_ARRAY
;
1546 #define ASC_MCNTL_NO_SEL_TIMEOUT (ushort)0x0001
1547 #define ASC_MCNTL_NULL_TARGET (ushort)0x0002
1548 #define ASC_CNTL_INITIATOR (ushort)0x0001
1549 #define ASC_CNTL_BIOS_GT_1GB (ushort)0x0002
1550 #define ASC_CNTL_BIOS_GT_2_DISK (ushort)0x0004
1551 #define ASC_CNTL_BIOS_REMOVABLE (ushort)0x0008
1552 #define ASC_CNTL_NO_SCAM (ushort)0x0010
1553 #define ASC_CNTL_INT_MULTI_Q (ushort)0x0080
1554 #define ASC_CNTL_NO_LUN_SUPPORT (ushort)0x0040
1555 #define ASC_CNTL_NO_VERIFY_COPY (ushort)0x0100
1556 #define ASC_CNTL_RESET_SCSI (ushort)0x0200
1557 #define ASC_CNTL_INIT_INQUIRY (ushort)0x0400
1558 #define ASC_CNTL_INIT_VERBOSE (ushort)0x0800
1559 #define ASC_CNTL_SCSI_PARITY (ushort)0x1000
1560 #define ASC_CNTL_BURST_MODE (ushort)0x2000
1561 #define ASC_CNTL_SDTR_ENABLE_ULTRA (ushort)0x4000
1562 #define ASC_EEP_DVC_CFG_BEG_VL 2
1563 #define ASC_EEP_MAX_DVC_ADDR_VL 15
1564 #define ASC_EEP_DVC_CFG_BEG 32
1565 #define ASC_EEP_MAX_DVC_ADDR 45
1566 #define ASC_EEP_DEFINED_WORDS 10
1567 #define ASC_EEP_MAX_ADDR 63
1568 #define ASC_EEP_RES_WORDS 0
1569 #define ASC_EEP_MAX_RETRY 20
1570 #define ASC_MAX_INIT_BUSY_RETRY 8
1571 #define ASC_EEP_ISA_PNP_WSIZE 16
1574 * These macros keep the chip SCSI id and ISA DMA speed
1575 * bitfields in board order. C bitfields aren't portable
1576 * between big and little-endian platforms so they are
1580 #define ASC_EEP_GET_CHIP_ID(cfg) ((cfg)->id_speed & 0x0f)
1581 #define ASC_EEP_GET_DMA_SPD(cfg) (((cfg)->id_speed & 0xf0) >> 4)
1582 #define ASC_EEP_SET_CHIP_ID(cfg, sid) \
1583 ((cfg)->id_speed = ((cfg)->id_speed & 0xf0) | ((sid) & ASC_MAX_TID))
1584 #define ASC_EEP_SET_DMA_SPD(cfg, spd) \
1585 ((cfg)->id_speed = ((cfg)->id_speed & 0x0f) | ((spd) & 0x0f) << 4)
1587 typedef struct asceep_config
{
1594 uchar max_total_qng
;
1597 uchar power_up_wait
;
1599 uchar id_speed
; /* low order 4 bits is chip scsi id */
1600 /* high order 4 bits is isa dma speed */
1601 uchar dos_int13_table
[ASC_MAX_TID
+ 1];
1602 uchar adapter_info
[6];
1607 #define ASC_PCI_CFG_LSW_SCSI_PARITY 0x0800
1608 #define ASC_PCI_CFG_LSW_BURST_MODE 0x0080
1609 #define ASC_PCI_CFG_LSW_INTR_ABLE 0x0020
1611 #define ASC_EEP_CMD_READ 0x80
1612 #define ASC_EEP_CMD_WRITE 0x40
1613 #define ASC_EEP_CMD_WRITE_ABLE 0x30
1614 #define ASC_EEP_CMD_WRITE_DISABLE 0x00
1615 #define ASC_OVERRUN_BSIZE 0x00000048UL
1616 #define ASC_CTRL_BREAK_ONCE 0x0001
1617 #define ASC_CTRL_BREAK_STAY_IDLE 0x0002
1618 #define ASCV_MSGOUT_BEG 0x0000
1619 #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3)
1620 #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4)
1621 #define ASCV_BREAK_SAVED_CODE (ushort)0x0006
1622 #define ASCV_MSGIN_BEG (ASCV_MSGOUT_BEG+8)
1623 #define ASCV_MSGIN_SDTR_PERIOD (ASCV_MSGIN_BEG+3)
1624 #define ASCV_MSGIN_SDTR_OFFSET (ASCV_MSGIN_BEG+4)
1625 #define ASCV_SDTR_DATA_BEG (ASCV_MSGIN_BEG+8)
1626 #define ASCV_SDTR_DONE_BEG (ASCV_SDTR_DATA_BEG+8)
1627 #define ASCV_MAX_DVC_QNG_BEG (ushort)0x0020
1628 #define ASCV_BREAK_ADDR (ushort)0x0028
1629 #define ASCV_BREAK_NOTIFY_COUNT (ushort)0x002A
1630 #define ASCV_BREAK_CONTROL (ushort)0x002C
1631 #define ASCV_BREAK_HIT_COUNT (ushort)0x002E
1633 #define ASCV_ASCDVC_ERR_CODE_W (ushort)0x0030
1634 #define ASCV_MCODE_CHKSUM_W (ushort)0x0032
1635 #define ASCV_MCODE_SIZE_W (ushort)0x0034
1636 #define ASCV_STOP_CODE_B (ushort)0x0036
1637 #define ASCV_DVC_ERR_CODE_B (ushort)0x0037
1638 #define ASCV_OVERRUN_PADDR_D (ushort)0x0038
1639 #define ASCV_OVERRUN_BSIZE_D (ushort)0x003C
1640 #define ASCV_HALTCODE_W (ushort)0x0040
1641 #define ASCV_CHKSUM_W (ushort)0x0042
1642 #define ASCV_MC_DATE_W (ushort)0x0044
1643 #define ASCV_MC_VER_W (ushort)0x0046
1644 #define ASCV_NEXTRDY_B (ushort)0x0048
1645 #define ASCV_DONENEXT_B (ushort)0x0049
1646 #define ASCV_USE_TAGGED_QNG_B (ushort)0x004A
1647 #define ASCV_SCSIBUSY_B (ushort)0x004B
1648 #define ASCV_Q_DONE_IN_PROGRESS_B (ushort)0x004C
1649 #define ASCV_CURCDB_B (ushort)0x004D
1650 #define ASCV_RCLUN_B (ushort)0x004E
1651 #define ASCV_BUSY_QHEAD_B (ushort)0x004F
1652 #define ASCV_DISC1_QHEAD_B (ushort)0x0050
1653 #define ASCV_DISC_ENABLE_B (ushort)0x0052
1654 #define ASCV_CAN_TAGGED_QNG_B (ushort)0x0053
1655 #define ASCV_HOSTSCSI_ID_B (ushort)0x0055
1656 #define ASCV_MCODE_CNTL_B (ushort)0x0056
1657 #define ASCV_NULL_TARGET_B (ushort)0x0057
1658 #define ASCV_FREE_Q_HEAD_W (ushort)0x0058
1659 #define ASCV_DONE_Q_TAIL_W (ushort)0x005A
1660 #define ASCV_FREE_Q_HEAD_B (ushort)(ASCV_FREE_Q_HEAD_W+1)
1661 #define ASCV_DONE_Q_TAIL_B (ushort)(ASCV_DONE_Q_TAIL_W+1)
1662 #define ASCV_HOST_FLAG_B (ushort)0x005D
1663 #define ASCV_TOTAL_READY_Q_B (ushort)0x0064
1664 #define ASCV_VER_SERIAL_B (ushort)0x0065
1665 #define ASCV_HALTCODE_SAVED_W (ushort)0x0066
1666 #define ASCV_WTM_FLAG_B (ushort)0x0068
1667 #define ASCV_RISC_FLAG_B (ushort)0x006A
1668 #define ASCV_REQ_SG_LIST_QP (ushort)0x006B
1669 #define ASC_HOST_FLAG_IN_ISR 0x01
1670 #define ASC_HOST_FLAG_ACK_INT 0x02
1671 #define ASC_RISC_FLAG_GEN_INT 0x01
1672 #define ASC_RISC_FLAG_REQ_SG_LIST 0x02
1673 #define IOP_CTRL (0x0F)
1674 #define IOP_STATUS (0x0E)
1675 #define IOP_INT_ACK IOP_STATUS
1676 #define IOP_REG_IFC (0x0D)
1677 #define IOP_SYN_OFFSET (0x0B)
1678 #define IOP_EXTRA_CONTROL (0x0D)
1679 #define IOP_REG_PC (0x0C)
1680 #define IOP_RAM_ADDR (0x0A)
1681 #define IOP_RAM_DATA (0x08)
1682 #define IOP_EEP_DATA (0x06)
1683 #define IOP_EEP_CMD (0x07)
1684 #define IOP_VERSION (0x03)
1685 #define IOP_CONFIG_HIGH (0x04)
1686 #define IOP_CONFIG_LOW (0x02)
1687 #define IOP_SIG_BYTE (0x01)
1688 #define IOP_SIG_WORD (0x00)
1689 #define IOP_REG_DC1 (0x0E)
1690 #define IOP_REG_DC0 (0x0C)
1691 #define IOP_REG_SB (0x0B)
1692 #define IOP_REG_DA1 (0x0A)
1693 #define IOP_REG_DA0 (0x08)
1694 #define IOP_REG_SC (0x09)
1695 #define IOP_DMA_SPEED (0x07)
1696 #define IOP_REG_FLAG (0x07)
1697 #define IOP_FIFO_H (0x06)
1698 #define IOP_FIFO_L (0x04)
1699 #define IOP_REG_ID (0x05)
1700 #define IOP_REG_QP (0x03)
1701 #define IOP_REG_IH (0x02)
1702 #define IOP_REG_IX (0x01)
1703 #define IOP_REG_AX (0x00)
1704 #define IFC_REG_LOCK (0x00)
1705 #define IFC_REG_UNLOCK (0x09)
1706 #define IFC_WR_EN_FILTER (0x10)
1707 #define IFC_RD_NO_EEPROM (0x10)
1708 #define IFC_SLEW_RATE (0x20)
1709 #define IFC_ACT_NEG (0x40)
1710 #define IFC_INP_FILTER (0x80)
1711 #define IFC_INIT_DEFAULT (IFC_ACT_NEG | IFC_REG_UNLOCK)
1712 #define SC_SEL (uchar)(0x80)
1713 #define SC_BSY (uchar)(0x40)
1714 #define SC_ACK (uchar)(0x20)
1715 #define SC_REQ (uchar)(0x10)
1716 #define SC_ATN (uchar)(0x08)
1717 #define SC_IO (uchar)(0x04)
1718 #define SC_CD (uchar)(0x02)
1719 #define SC_MSG (uchar)(0x01)
1720 #define SEC_SCSI_CTL (uchar)(0x80)
1721 #define SEC_ACTIVE_NEGATE (uchar)(0x40)
1722 #define SEC_SLEW_RATE (uchar)(0x20)
1723 #define SEC_ENABLE_FILTER (uchar)(0x10)
1724 #define ASC_HALT_EXTMSG_IN (ushort)0x8000
1725 #define ASC_HALT_CHK_CONDITION (ushort)0x8100
1726 #define ASC_HALT_SS_QUEUE_FULL (ushort)0x8200
1727 #define ASC_HALT_DISABLE_ASYN_USE_SYN_FIX (ushort)0x8300
1728 #define ASC_HALT_ENABLE_ASYN_USE_SYN_FIX (ushort)0x8400
1729 #define ASC_HALT_SDTR_REJECTED (ushort)0x4000
1730 #define ASC_HALT_HOST_COPY_SG_LIST_TO_RISC ( ushort )0x2000
1731 #define ASC_MAX_QNO 0xF8
1732 #define ASC_DATA_SEC_BEG (ushort)0x0080
1733 #define ASC_DATA_SEC_END (ushort)0x0080
1734 #define ASC_CODE_SEC_BEG (ushort)0x0080
1735 #define ASC_CODE_SEC_END (ushort)0x0080
1736 #define ASC_QADR_BEG (0x4000)
1737 #define ASC_QADR_USED (ushort)(ASC_MAX_QNO * 64)
1738 #define ASC_QADR_END (ushort)0x7FFF
1739 #define ASC_QLAST_ADR (ushort)0x7FC0
1740 #define ASC_QBLK_SIZE 0x40
1741 #define ASC_BIOS_DATA_QBEG 0xF8
1742 #define ASC_MIN_ACTIVE_QNO 0x01
1743 #define ASC_QLINK_END 0xFF
1744 #define ASC_EEPROM_WORDS 0x10
1745 #define ASC_MAX_MGS_LEN 0x10
1746 #define ASC_BIOS_ADDR_DEF 0xDC00
1747 #define ASC_BIOS_SIZE 0x3800
1748 #define ASC_BIOS_RAM_OFF 0x3800
1749 #define ASC_BIOS_RAM_SIZE 0x800
1750 #define ASC_BIOS_MIN_ADDR 0xC000
1751 #define ASC_BIOS_MAX_ADDR 0xEC00
1752 #define ASC_BIOS_BANK_SIZE 0x0400
1753 #define ASC_MCODE_START_ADDR 0x0080
1754 #define ASC_CFG0_HOST_INT_ON 0x0020
1755 #define ASC_CFG0_BIOS_ON 0x0040
1756 #define ASC_CFG0_VERA_BURST_ON 0x0080
1757 #define ASC_CFG0_SCSI_PARITY_ON 0x0800
1758 #define ASC_CFG1_SCSI_TARGET_ON 0x0080
1759 #define ASC_CFG1_LRAM_8BITS_ON 0x0800
1760 #define ASC_CFG_MSW_CLR_MASK 0x3080
1761 #define CSW_TEST1 (ASC_CS_TYPE)0x8000
1762 #define CSW_AUTO_CONFIG (ASC_CS_TYPE)0x4000
1763 #define CSW_RESERVED1 (ASC_CS_TYPE)0x2000
1764 #define CSW_IRQ_WRITTEN (ASC_CS_TYPE)0x1000
1765 #define CSW_33MHZ_SELECTED (ASC_CS_TYPE)0x0800
1766 #define CSW_TEST2 (ASC_CS_TYPE)0x0400
1767 #define CSW_TEST3 (ASC_CS_TYPE)0x0200
1768 #define CSW_RESERVED2 (ASC_CS_TYPE)0x0100
1769 #define CSW_DMA_DONE (ASC_CS_TYPE)0x0080
1770 #define CSW_FIFO_RDY (ASC_CS_TYPE)0x0040
1771 #define CSW_EEP_READ_DONE (ASC_CS_TYPE)0x0020
1772 #define CSW_HALTED (ASC_CS_TYPE)0x0010
1773 #define CSW_SCSI_RESET_ACTIVE (ASC_CS_TYPE)0x0008
1774 #define CSW_PARITY_ERR (ASC_CS_TYPE)0x0004
1775 #define CSW_SCSI_RESET_LATCH (ASC_CS_TYPE)0x0002
1776 #define CSW_INT_PENDING (ASC_CS_TYPE)0x0001
1777 #define CIW_CLR_SCSI_RESET_INT (ASC_CS_TYPE)0x1000
1778 #define CIW_INT_ACK (ASC_CS_TYPE)0x0100
1779 #define CIW_TEST1 (ASC_CS_TYPE)0x0200
1780 #define CIW_TEST2 (ASC_CS_TYPE)0x0400
1781 #define CIW_SEL_33MHZ (ASC_CS_TYPE)0x0800
1782 #define CIW_IRQ_ACT (ASC_CS_TYPE)0x1000
1783 #define CC_CHIP_RESET (uchar)0x80
1784 #define CC_SCSI_RESET (uchar)0x40
1785 #define CC_HALT (uchar)0x20
1786 #define CC_SINGLE_STEP (uchar)0x10
1787 #define CC_DMA_ABLE (uchar)0x08
1788 #define CC_TEST (uchar)0x04
1789 #define CC_BANK_ONE (uchar)0x02
1790 #define CC_DIAG (uchar)0x01
1791 #define ASC_1000_ID0W 0x04C1
1792 #define ASC_1000_ID0W_FIX 0x00C1
1793 #define ASC_1000_ID1B 0x25
1794 #define ASC_EISA_BIG_IOP_GAP (0x1C30-0x0C50)
1795 #define ASC_EISA_SMALL_IOP_GAP (0x0020)
1796 #define ASC_EISA_MIN_IOP_ADDR (0x0C30)
1797 #define ASC_EISA_MAX_IOP_ADDR (0xFC50)
1798 #define ASC_EISA_REV_IOP_MASK (0x0C83)
1799 #define ASC_EISA_PID_IOP_MASK (0x0C80)
1800 #define ASC_EISA_CFG_IOP_MASK (0x0C86)
1801 #define ASC_GET_EISA_SLOT(iop) (PortAddr)((iop) & 0xF000)
1802 #define ASC_EISA_ID_740 0x01745004UL
1803 #define ASC_EISA_ID_750 0x01755004UL
1804 #define INS_HALTINT (ushort)0x6281
1805 #define INS_HALT (ushort)0x6280
1806 #define INS_SINT (ushort)0x6200
1807 #define INS_RFLAG_WTM (ushort)0x7380
1808 #define ASC_MC_SAVE_CODE_WSIZE 0x500
1809 #define ASC_MC_SAVE_DATA_WSIZE 0x40
1811 typedef struct asc_mc_saved
{
1812 ushort data
[ASC_MC_SAVE_DATA_WSIZE
];
1813 ushort code
[ASC_MC_SAVE_CODE_WSIZE
];
1816 #define AscGetQDoneInProgress(port) AscReadLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B)
1817 #define AscPutQDoneInProgress(port, val) AscWriteLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B, val)
1818 #define AscGetVarFreeQHead(port) AscReadLramWord((port), ASCV_FREE_Q_HEAD_W)
1819 #define AscGetVarDoneQTail(port) AscReadLramWord((port), ASCV_DONE_Q_TAIL_W)
1820 #define AscPutVarFreeQHead(port, val) AscWriteLramWord((port), ASCV_FREE_Q_HEAD_W, val)
1821 #define AscPutVarDoneQTail(port, val) AscWriteLramWord((port), ASCV_DONE_Q_TAIL_W, val)
1822 #define AscGetRiscVarFreeQHead(port) AscReadLramByte((port), ASCV_NEXTRDY_B)
1823 #define AscGetRiscVarDoneQTail(port) AscReadLramByte((port), ASCV_DONENEXT_B)
1824 #define AscPutRiscVarFreeQHead(port, val) AscWriteLramByte((port), ASCV_NEXTRDY_B, val)
1825 #define AscPutRiscVarDoneQTail(port, val) AscWriteLramByte((port), ASCV_DONENEXT_B, val)
1826 #define AscPutMCodeSDTRDoneAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id), (data));
1827 #define AscGetMCodeSDTRDoneAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id));
1828 #define AscPutMCodeInitSDTRAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id), data);
1829 #define AscGetMCodeInitSDTRAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id));
1830 #define AscSynIndexToPeriod(index) (uchar)(asc_dvc->sdtr_period_tbl[ (index) ])
1831 #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE)
1832 #define AscGetChipSignatureWord(port) (ushort)inpw((port)+IOP_SIG_WORD)
1833 #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION)
1834 #define AscGetChipCfgLsw(port) (ushort)inpw((port)+IOP_CONFIG_LOW)
1835 #define AscGetChipCfgMsw(port) (ushort)inpw((port)+IOP_CONFIG_HIGH)
1836 #define AscSetChipCfgLsw(port, data) outpw((port)+IOP_CONFIG_LOW, data)
1837 #define AscSetChipCfgMsw(port, data) outpw((port)+IOP_CONFIG_HIGH, data)
1838 #define AscGetChipEEPCmd(port) (uchar)inp((port)+IOP_EEP_CMD)
1839 #define AscSetChipEEPCmd(port, data) outp((port)+IOP_EEP_CMD, data)
1840 #define AscGetChipEEPData(port) (ushort)inpw((port)+IOP_EEP_DATA)
1841 #define AscSetChipEEPData(port, data) outpw((port)+IOP_EEP_DATA, data)
1842 #define AscGetChipLramAddr(port) (ushort)inpw((PortAddr)((port)+IOP_RAM_ADDR))
1843 #define AscSetChipLramAddr(port, addr) outpw((PortAddr)((port)+IOP_RAM_ADDR), addr)
1844 #define AscGetChipLramData(port) (ushort)inpw((port)+IOP_RAM_DATA)
1845 #define AscSetChipLramData(port, data) outpw((port)+IOP_RAM_DATA, data)
1846 #define AscGetChipIFC(port) (uchar)inp((port)+IOP_REG_IFC)
1847 #define AscSetChipIFC(port, data) outp((port)+IOP_REG_IFC, data)
1848 #define AscGetChipStatus(port) (ASC_CS_TYPE)inpw((port)+IOP_STATUS)
1849 #define AscSetChipStatus(port, cs_val) outpw((port)+IOP_STATUS, cs_val)
1850 #define AscGetChipControl(port) (uchar)inp((port)+IOP_CTRL)
1851 #define AscSetChipControl(port, cc_val) outp((port)+IOP_CTRL, cc_val)
1852 #define AscGetChipSyn(port) (uchar)inp((port)+IOP_SYN_OFFSET)
1853 #define AscSetChipSyn(port, data) outp((port)+IOP_SYN_OFFSET, data)
1854 #define AscSetPCAddr(port, data) outpw((port)+IOP_REG_PC, data)
1855 #define AscGetPCAddr(port) (ushort)inpw((port)+IOP_REG_PC)
1856 #define AscIsIntPending(port) (AscGetChipStatus(port) & (CSW_INT_PENDING | CSW_SCSI_RESET_LATCH))
1857 #define AscGetChipScsiID(port) ((AscGetChipCfgLsw(port) >> 8) & ASC_MAX_TID)
1858 #define AscGetExtraControl(port) (uchar)inp((port)+IOP_EXTRA_CONTROL)
1859 #define AscSetExtraControl(port, data) outp((port)+IOP_EXTRA_CONTROL, data)
1860 #define AscReadChipAX(port) (ushort)inpw((port)+IOP_REG_AX)
1861 #define AscWriteChipAX(port, data) outpw((port)+IOP_REG_AX, data)
1862 #define AscReadChipIX(port) (uchar)inp((port)+IOP_REG_IX)
1863 #define AscWriteChipIX(port, data) outp((port)+IOP_REG_IX, data)
1864 #define AscReadChipIH(port) (ushort)inpw((port)+IOP_REG_IH)
1865 #define AscWriteChipIH(port, data) outpw((port)+IOP_REG_IH, data)
1866 #define AscReadChipQP(port) (uchar)inp((port)+IOP_REG_QP)
1867 #define AscWriteChipQP(port, data) outp((port)+IOP_REG_QP, data)
1868 #define AscReadChipFIFO_L(port) (ushort)inpw((port)+IOP_REG_FIFO_L)
1869 #define AscWriteChipFIFO_L(port, data) outpw((port)+IOP_REG_FIFO_L, data)
1870 #define AscReadChipFIFO_H(port) (ushort)inpw((port)+IOP_REG_FIFO_H)
1871 #define AscWriteChipFIFO_H(port, data) outpw((port)+IOP_REG_FIFO_H, data)
1872 #define AscReadChipDmaSpeed(port) (uchar)inp((port)+IOP_DMA_SPEED)
1873 #define AscWriteChipDmaSpeed(port, data) outp((port)+IOP_DMA_SPEED, data)
1874 #define AscReadChipDA0(port) (ushort)inpw((port)+IOP_REG_DA0)
1875 #define AscWriteChipDA0(port) outpw((port)+IOP_REG_DA0, data)
1876 #define AscReadChipDA1(port) (ushort)inpw((port)+IOP_REG_DA1)
1877 #define AscWriteChipDA1(port) outpw((port)+IOP_REG_DA1, data)
1878 #define AscReadChipDC0(port) (ushort)inpw((port)+IOP_REG_DC0)
1879 #define AscWriteChipDC0(port) outpw((port)+IOP_REG_DC0, data)
1880 #define AscReadChipDC1(port) (ushort)inpw((port)+IOP_REG_DC1)
1881 #define AscWriteChipDC1(port) outpw((port)+IOP_REG_DC1, data)
1882 #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID)
1883 #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data)
1885 static int AscWriteEEPCmdReg(PortAddr iop_base
, uchar cmd_reg
);
1886 static int AscWriteEEPDataReg(PortAddr iop_base
, ushort data_reg
);
1887 static void AscWaitEEPRead(void);
1888 static void AscWaitEEPWrite(void);
1889 static ushort
AscReadEEPWord(PortAddr
, uchar
);
1890 static ushort
AscWriteEEPWord(PortAddr
, uchar
, ushort
);
1891 static ushort
AscGetEEPConfig(PortAddr
, ASCEEP_CONFIG
*, ushort
);
1892 static int AscSetEEPConfigOnce(PortAddr
, ASCEEP_CONFIG
*, ushort
);
1893 static int AscSetEEPConfig(PortAddr
, ASCEEP_CONFIG
*, ushort
);
1894 static int AscStartChip(PortAddr
);
1895 static int AscStopChip(PortAddr
);
1896 static void AscSetChipIH(PortAddr
, ushort
);
1897 static int AscIsChipHalted(PortAddr
);
1898 static void AscAckInterrupt(PortAddr
);
1899 static void AscDisableInterrupt(PortAddr
);
1900 static void AscEnableInterrupt(PortAddr
);
1901 static void AscSetBank(PortAddr
, uchar
);
1902 static int AscResetChipAndScsiBus(ASC_DVC_VAR
*);
1904 static ushort
AscGetIsaDmaChannel(PortAddr
);
1905 static ushort
AscSetIsaDmaChannel(PortAddr
, ushort
);
1906 static uchar
AscSetIsaDmaSpeed(PortAddr
, uchar
);
1907 static uchar
AscGetIsaDmaSpeed(PortAddr
);
1908 #endif /* CONFIG_ISA */
1909 static uchar
AscReadLramByte(PortAddr
, ushort
);
1910 static ushort
AscReadLramWord(PortAddr
, ushort
);
1911 #if CC_VERY_LONG_SG_LIST
1912 static ASC_DCNT
AscReadLramDWord(PortAddr
, ushort
);
1913 #endif /* CC_VERY_LONG_SG_LIST */
1914 static void AscWriteLramWord(PortAddr
, ushort
, ushort
);
1915 static void AscWriteLramByte(PortAddr
, ushort
, uchar
);
1916 static ASC_DCNT
AscMemSumLramWord(PortAddr
, ushort
, int);
1917 static void AscMemWordSetLram(PortAddr
, ushort
, ushort
, int);
1918 static void AscMemWordCopyPtrToLram(PortAddr
, ushort
, uchar
*, int);
1919 static void AscMemDWordCopyPtrToLram(PortAddr
, ushort
, uchar
*, int);
1920 static void AscMemWordCopyPtrFromLram(PortAddr
, ushort
, uchar
*, int);
1921 static ushort
AscInitAscDvcVar(ASC_DVC_VAR
*);
1922 static ushort
AscInitFromEEP(ASC_DVC_VAR
*);
1923 static ushort
AscInitFromAscDvcVar(ASC_DVC_VAR
*);
1924 static ushort
AscInitMicroCodeVar(ASC_DVC_VAR
*);
1925 static int AscTestExternalLram(ASC_DVC_VAR
*);
1926 static uchar
AscMsgOutSDTR(ASC_DVC_VAR
*, uchar
, uchar
);
1927 static uchar
AscCalSDTRData(ASC_DVC_VAR
*, uchar
, uchar
);
1928 static void AscSetChipSDTR(PortAddr
, uchar
, uchar
);
1929 static uchar
AscGetSynPeriodIndex(ASC_DVC_VAR
*, uchar
);
1930 static uchar
AscAllocFreeQueue(PortAddr
, uchar
);
1931 static uchar
AscAllocMultipleFreeQueue(PortAddr
, uchar
, uchar
);
1932 static int AscHostReqRiscHalt(PortAddr
);
1933 static int AscStopQueueExe(PortAddr
);
1934 static int AscSendScsiQueue(ASC_DVC_VAR
*,
1935 ASC_SCSI_Q
*scsiq
, uchar n_q_required
);
1936 static int AscPutReadyQueue(ASC_DVC_VAR
*, ASC_SCSI_Q
*, uchar
);
1937 static int AscPutReadySgListQueue(ASC_DVC_VAR
*, ASC_SCSI_Q
*, uchar
);
1938 static int AscSetChipSynRegAtID(PortAddr
, uchar
, uchar
);
1939 static int AscSetRunChipSynRegAtID(PortAddr
, uchar
, uchar
);
1940 static ushort
AscInitLram(ASC_DVC_VAR
*);
1941 static ushort
AscInitQLinkVar(ASC_DVC_VAR
*);
1942 static int AscSetLibErrorCode(ASC_DVC_VAR
*, ushort
);
1943 static int AscIsrChipHalted(ASC_DVC_VAR
*);
1944 static uchar
_AscCopyLramScsiDoneQ(PortAddr
, ushort
,
1945 ASC_QDONE_INFO
*, ASC_DCNT
);
1946 static int AscIsrQDone(ASC_DVC_VAR
*);
1947 static int AscCompareString(uchar
*, uchar
*, int);
1949 static ushort
AscGetEisaChipCfg(PortAddr
);
1950 static ASC_DCNT
AscGetEisaProductID(PortAddr
);
1951 static PortAddr
AscSearchIOPortAddrEISA(PortAddr
);
1952 static PortAddr
AscSearchIOPortAddr11(PortAddr
);
1953 static PortAddr
AscSearchIOPortAddr(PortAddr
, ushort
);
1954 static void AscSetISAPNPWaitForKey(void);
1955 #endif /* CONFIG_ISA */
1956 static uchar
AscGetChipScsiCtrl(PortAddr
);
1957 static uchar
AscSetChipScsiID(PortAddr
, uchar
);
1958 static uchar
AscGetChipVersion(PortAddr
, ushort
);
1959 static ushort
AscGetChipBusType(PortAddr
);
1960 static ASC_DCNT
AscLoadMicroCode(PortAddr
, ushort
, uchar
*, ushort
);
1961 static int AscFindSignature(PortAddr
);
1962 static void AscToggleIRQAct(PortAddr
);
1963 static uchar
AscGetChipIRQ(PortAddr
, ushort
);
1964 static uchar
AscSetChipIRQ(PortAddr
, uchar
, ushort
);
1965 static ushort
AscGetChipBiosAddress(PortAddr
, ushort
);
1966 static inline ulong
DvcEnterCritical(void);
1967 static inline void DvcLeaveCritical(ulong
);
1969 static uchar
DvcReadPCIConfigByte(ASC_DVC_VAR
*, ushort
);
1970 static void DvcWritePCIConfigByte(ASC_DVC_VAR
*, ushort
, uchar
);
1971 #endif /* CONFIG_PCI */
1972 static ushort
AscGetChipBiosAddress(PortAddr
, ushort
);
1973 static void DvcSleepMilliSecond(ASC_DCNT
);
1974 static void DvcDelayNanoSecond(ASC_DVC_VAR
*, ASC_DCNT
);
1975 static void DvcPutScsiQ(PortAddr
, ushort
, uchar
*, int);
1976 static void DvcGetQinfo(PortAddr
, ushort
, uchar
*, int);
1977 static ushort
AscInitGetConfig(ASC_DVC_VAR
*);
1978 static ushort
AscInitSetConfig(ASC_DVC_VAR
*);
1979 static ushort
AscInitAsc1000Driver(ASC_DVC_VAR
*);
1980 static void AscAsyncFix(ASC_DVC_VAR
*, uchar
, ASC_SCSI_INQUIRY
*);
1981 static int AscTagQueuingSafe(ASC_SCSI_INQUIRY
*);
1982 static void AscInquiryHandling(ASC_DVC_VAR
*, uchar
, ASC_SCSI_INQUIRY
*);
1983 static int AscExeScsiQueue(ASC_DVC_VAR
*, ASC_SCSI_Q
*);
1984 static int AscISR(ASC_DVC_VAR
*);
1985 static uint
AscGetNumOfFreeQueue(ASC_DVC_VAR
*, uchar
, uchar
);
1986 static int AscSgListToQueue(int);
1988 static void AscEnableIsaDma(uchar
);
1989 #endif /* CONFIG_ISA */
1990 static ASC_DCNT
AscGetMaxDmaCount(ushort
);
1991 static const char *advansys_info(struct Scsi_Host
*shost
);
1994 * --- Adv Library Constants and Macros
1997 #define ADV_LIB_VERSION_MAJOR 5
1998 #define ADV_LIB_VERSION_MINOR 14
2001 * Define Adv Library required special types.
2005 * Portable Data Types
2007 * Any instance where a 32-bit long or pointer type is assumed
2008 * for precision or HW defined structures, the following define
2009 * types must be used. In Linux the char, short, and int types
2010 * are all consistent at 8, 16, and 32 bits respectively. Pointers
2011 * and long types are 64 bits on Alpha and UltraSPARC.
2013 #define ADV_PADDR __u32 /* Physical address data type. */
2014 #define ADV_VADDR __u32 /* Virtual address data type. */
2015 #define ADV_DCNT __u32 /* Unsigned Data count type. */
2016 #define ADV_SDCNT __s32 /* Signed Data count type. */
2019 * These macros are used to convert a virtual address to a
2020 * 32-bit value. This currently can be used on Linux Alpha
2021 * which uses 64-bit virtual address but a 32-bit bus address.
2022 * This is likely to break in the future, but doing this now
2023 * will give us time to change the HW and FW to handle 64-bit
2026 #define ADV_VADDR_TO_U32 virt_to_bus
2027 #define ADV_U32_TO_VADDR bus_to_virt
2029 #define AdvPortAddr void __iomem * /* Virtual memory address size */
2032 * Define Adv Library required memory access macros.
2034 #define ADV_MEM_READB(addr) readb(addr)
2035 #define ADV_MEM_READW(addr) readw(addr)
2036 #define ADV_MEM_WRITEB(addr, byte) writeb(byte, addr)
2037 #define ADV_MEM_WRITEW(addr, word) writew(word, addr)
2038 #define ADV_MEM_WRITEDW(addr, dword) writel(dword, addr)
2040 #define ADV_CARRIER_COUNT (ASC_DEF_MAX_HOST_QNG + 15)
2043 * For wide boards a CDB length maximum of 16 bytes
2046 #define ADV_MAX_CDB_LEN 16
2049 * Define total number of simultaneous maximum element scatter-gather
2050 * request blocks per wide adapter. ASC_DEF_MAX_HOST_QNG (253) is the
2051 * maximum number of outstanding commands per wide host adapter. Each
2052 * command uses one or more ADV_SG_BLOCK each with 15 scatter-gather
2053 * elements. Allow each command to have at least one ADV_SG_BLOCK structure.
2054 * This allows about 15 commands to have the maximum 17 ADV_SG_BLOCK
2055 * structures or 255 scatter-gather elements.
2058 #define ADV_TOT_SG_BLOCK ASC_DEF_MAX_HOST_QNG
2061 * Define Adv Library required maximum number of scatter-gather
2062 * elements per request.
2064 #define ADV_MAX_SG_LIST 255
2066 /* Number of SG blocks needed. */
2067 #define ADV_NUM_SG_BLOCK \
2068 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
2070 /* Total contiguous memory needed for SG blocks. */
2071 #define ADV_SG_TOTAL_MEM_SIZE \
2072 (sizeof(ADV_SG_BLOCK) * ADV_NUM_SG_BLOCK)
2074 #define ADV_PAGE_SIZE PAGE_SIZE
2076 #define ADV_NUM_PAGE_CROSSING \
2077 ((ADV_SG_TOTAL_MEM_SIZE + (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
2079 #define ADV_EEP_DVC_CFG_BEGIN (0x00)
2080 #define ADV_EEP_DVC_CFG_END (0x15)
2081 #define ADV_EEP_DVC_CTL_BEGIN (0x16) /* location of OEM name */
2082 #define ADV_EEP_MAX_WORD_ADDR (0x1E)
2084 #define ADV_EEP_DELAY_MS 100
2086 #define ADV_EEPROM_BIG_ENDIAN 0x8000 /* EEPROM Bit 15 */
2087 #define ADV_EEPROM_BIOS_ENABLE 0x4000 /* EEPROM Bit 14 */
2089 * For the ASC3550 Bit 13 is Termination Polarity control bit.
2090 * For later ICs Bit 13 controls whether the CIS (Card Information
2091 * Service Section) is loaded from EEPROM.
2093 #define ADV_EEPROM_TERM_POL 0x2000 /* EEPROM Bit 13 */
2094 #define ADV_EEPROM_CIS_LD 0x2000 /* EEPROM Bit 13 */
2098 * If EEPROM Bit 11 is 0 for Function 0, then Function 0 will specify
2099 * INT A in the PCI Configuration Space Int Pin field. If it is 1, then
2100 * Function 0 will specify INT B.
2102 * If EEPROM Bit 11 is 0 for Function 1, then Function 1 will specify
2103 * INT B in the PCI Configuration Space Int Pin field. If it is 1, then
2104 * Function 1 will specify INT A.
2106 #define ADV_EEPROM_INTAB 0x0800 /* EEPROM Bit 11 */
2108 typedef struct adveep_3550_config
{
2109 /* Word Offset, Description */
2111 ushort cfg_lsw
; /* 00 power up initialization */
2112 /* bit 13 set - Term Polarity Control */
2113 /* bit 14 set - BIOS Enable */
2114 /* bit 15 set - Big Endian Mode */
2115 ushort cfg_msw
; /* 01 unused */
2116 ushort disc_enable
; /* 02 disconnect enable */
2117 ushort wdtr_able
; /* 03 Wide DTR able */
2118 ushort sdtr_able
; /* 04 Synchronous DTR able */
2119 ushort start_motor
; /* 05 send start up motor */
2120 ushort tagqng_able
; /* 06 tag queuing able */
2121 ushort bios_scan
; /* 07 BIOS device control */
2122 ushort scam_tolerant
; /* 08 no scam */
2124 uchar adapter_scsi_id
; /* 09 Host Adapter ID */
2125 uchar bios_boot_delay
; /* power up wait */
2127 uchar scsi_reset_delay
; /* 10 reset delay */
2128 uchar bios_id_lun
; /* first boot device scsi id & lun */
2129 /* high nibble is lun */
2130 /* low nibble is scsi id */
2132 uchar termination
; /* 11 0 - automatic */
2133 /* 1 - low off / high off */
2134 /* 2 - low off / high on */
2135 /* 3 - low on / high on */
2136 /* There is no low on / high off */
2138 uchar reserved1
; /* reserved byte (not used) */
2140 ushort bios_ctrl
; /* 12 BIOS control bits */
2141 /* bit 0 BIOS don't act as initiator. */
2142 /* bit 1 BIOS > 1 GB support */
2143 /* bit 2 BIOS > 2 Disk Support */
2144 /* bit 3 BIOS don't support removables */
2145 /* bit 4 BIOS support bootable CD */
2146 /* bit 5 BIOS scan enabled */
2147 /* bit 6 BIOS support multiple LUNs */
2148 /* bit 7 BIOS display of message */
2149 /* bit 8 SCAM disabled */
2150 /* bit 9 Reset SCSI bus during init. */
2152 /* bit 11 No verbose initialization. */
2153 /* bit 12 SCSI parity enabled */
2157 ushort ultra_able
; /* 13 ULTRA speed able */
2158 ushort reserved2
; /* 14 reserved */
2159 uchar max_host_qng
; /* 15 maximum host queuing */
2160 uchar max_dvc_qng
; /* maximum per device queuing */
2161 ushort dvc_cntl
; /* 16 control bit for driver */
2162 ushort bug_fix
; /* 17 control bit for bug fix */
2163 ushort serial_number_word1
; /* 18 Board serial number word 1 */
2164 ushort serial_number_word2
; /* 19 Board serial number word 2 */
2165 ushort serial_number_word3
; /* 20 Board serial number word 3 */
2166 ushort check_sum
; /* 21 EEP check sum */
2167 uchar oem_name
[16]; /* 22 OEM name */
2168 ushort dvc_err_code
; /* 30 last device driver error code */
2169 ushort adv_err_code
; /* 31 last uc and Adv Lib error code */
2170 ushort adv_err_addr
; /* 32 last uc error address */
2171 ushort saved_dvc_err_code
; /* 33 saved last dev. driver error code */
2172 ushort saved_adv_err_code
; /* 34 saved last uc and Adv Lib error code */
2173 ushort saved_adv_err_addr
; /* 35 saved last uc error address */
2174 ushort num_of_err
; /* 36 number of error */
2175 } ADVEEP_3550_CONFIG
;
2177 typedef struct adveep_38C0800_config
{
2178 /* Word Offset, Description */
2180 ushort cfg_lsw
; /* 00 power up initialization */
2181 /* bit 13 set - Load CIS */
2182 /* bit 14 set - BIOS Enable */
2183 /* bit 15 set - Big Endian Mode */
2184 ushort cfg_msw
; /* 01 unused */
2185 ushort disc_enable
; /* 02 disconnect enable */
2186 ushort wdtr_able
; /* 03 Wide DTR able */
2187 ushort sdtr_speed1
; /* 04 SDTR Speed TID 0-3 */
2188 ushort start_motor
; /* 05 send start up motor */
2189 ushort tagqng_able
; /* 06 tag queuing able */
2190 ushort bios_scan
; /* 07 BIOS device control */
2191 ushort scam_tolerant
; /* 08 no scam */
2193 uchar adapter_scsi_id
; /* 09 Host Adapter ID */
2194 uchar bios_boot_delay
; /* power up wait */
2196 uchar scsi_reset_delay
; /* 10 reset delay */
2197 uchar bios_id_lun
; /* first boot device scsi id & lun */
2198 /* high nibble is lun */
2199 /* low nibble is scsi id */
2201 uchar termination_se
; /* 11 0 - automatic */
2202 /* 1 - low off / high off */
2203 /* 2 - low off / high on */
2204 /* 3 - low on / high on */
2205 /* There is no low on / high off */
2207 uchar termination_lvd
; /* 11 0 - automatic */
2208 /* 1 - low off / high off */
2209 /* 2 - low off / high on */
2210 /* 3 - low on / high on */
2211 /* There is no low on / high off */
2213 ushort bios_ctrl
; /* 12 BIOS control bits */
2214 /* bit 0 BIOS don't act as initiator. */
2215 /* bit 1 BIOS > 1 GB support */
2216 /* bit 2 BIOS > 2 Disk Support */
2217 /* bit 3 BIOS don't support removables */
2218 /* bit 4 BIOS support bootable CD */
2219 /* bit 5 BIOS scan enabled */
2220 /* bit 6 BIOS support multiple LUNs */
2221 /* bit 7 BIOS display of message */
2222 /* bit 8 SCAM disabled */
2223 /* bit 9 Reset SCSI bus during init. */
2225 /* bit 11 No verbose initialization. */
2226 /* bit 12 SCSI parity enabled */
2230 ushort sdtr_speed2
; /* 13 SDTR speed TID 4-7 */
2231 ushort sdtr_speed3
; /* 14 SDTR speed TID 8-11 */
2232 uchar max_host_qng
; /* 15 maximum host queueing */
2233 uchar max_dvc_qng
; /* maximum per device queuing */
2234 ushort dvc_cntl
; /* 16 control bit for driver */
2235 ushort sdtr_speed4
; /* 17 SDTR speed 4 TID 12-15 */
2236 ushort serial_number_word1
; /* 18 Board serial number word 1 */
2237 ushort serial_number_word2
; /* 19 Board serial number word 2 */
2238 ushort serial_number_word3
; /* 20 Board serial number word 3 */
2239 ushort check_sum
; /* 21 EEP check sum */
2240 uchar oem_name
[16]; /* 22 OEM name */
2241 ushort dvc_err_code
; /* 30 last device driver error code */
2242 ushort adv_err_code
; /* 31 last uc and Adv Lib error code */
2243 ushort adv_err_addr
; /* 32 last uc error address */
2244 ushort saved_dvc_err_code
; /* 33 saved last dev. driver error code */
2245 ushort saved_adv_err_code
; /* 34 saved last uc and Adv Lib error code */
2246 ushort saved_adv_err_addr
; /* 35 saved last uc error address */
2247 ushort reserved36
; /* 36 reserved */
2248 ushort reserved37
; /* 37 reserved */
2249 ushort reserved38
; /* 38 reserved */
2250 ushort reserved39
; /* 39 reserved */
2251 ushort reserved40
; /* 40 reserved */
2252 ushort reserved41
; /* 41 reserved */
2253 ushort reserved42
; /* 42 reserved */
2254 ushort reserved43
; /* 43 reserved */
2255 ushort reserved44
; /* 44 reserved */
2256 ushort reserved45
; /* 45 reserved */
2257 ushort reserved46
; /* 46 reserved */
2258 ushort reserved47
; /* 47 reserved */
2259 ushort reserved48
; /* 48 reserved */
2260 ushort reserved49
; /* 49 reserved */
2261 ushort reserved50
; /* 50 reserved */
2262 ushort reserved51
; /* 51 reserved */
2263 ushort reserved52
; /* 52 reserved */
2264 ushort reserved53
; /* 53 reserved */
2265 ushort reserved54
; /* 54 reserved */
2266 ushort reserved55
; /* 55 reserved */
2267 ushort cisptr_lsw
; /* 56 CIS PTR LSW */
2268 ushort cisprt_msw
; /* 57 CIS PTR MSW */
2269 ushort subsysvid
; /* 58 SubSystem Vendor ID */
2270 ushort subsysid
; /* 59 SubSystem ID */
2271 ushort reserved60
; /* 60 reserved */
2272 ushort reserved61
; /* 61 reserved */
2273 ushort reserved62
; /* 62 reserved */
2274 ushort reserved63
; /* 63 reserved */
2275 } ADVEEP_38C0800_CONFIG
;
2277 typedef struct adveep_38C1600_config
{
2278 /* Word Offset, Description */
2280 ushort cfg_lsw
; /* 00 power up initialization */
2281 /* bit 11 set - Func. 0 INTB, Func. 1 INTA */
2282 /* clear - Func. 0 INTA, Func. 1 INTB */
2283 /* bit 13 set - Load CIS */
2284 /* bit 14 set - BIOS Enable */
2285 /* bit 15 set - Big Endian Mode */
2286 ushort cfg_msw
; /* 01 unused */
2287 ushort disc_enable
; /* 02 disconnect enable */
2288 ushort wdtr_able
; /* 03 Wide DTR able */
2289 ushort sdtr_speed1
; /* 04 SDTR Speed TID 0-3 */
2290 ushort start_motor
; /* 05 send start up motor */
2291 ushort tagqng_able
; /* 06 tag queuing able */
2292 ushort bios_scan
; /* 07 BIOS device control */
2293 ushort scam_tolerant
; /* 08 no scam */
2295 uchar adapter_scsi_id
; /* 09 Host Adapter ID */
2296 uchar bios_boot_delay
; /* power up wait */
2298 uchar scsi_reset_delay
; /* 10 reset delay */
2299 uchar bios_id_lun
; /* first boot device scsi id & lun */
2300 /* high nibble is lun */
2301 /* low nibble is scsi id */
2303 uchar termination_se
; /* 11 0 - automatic */
2304 /* 1 - low off / high off */
2305 /* 2 - low off / high on */
2306 /* 3 - low on / high on */
2307 /* There is no low on / high off */
2309 uchar termination_lvd
; /* 11 0 - automatic */
2310 /* 1 - low off / high off */
2311 /* 2 - low off / high on */
2312 /* 3 - low on / high on */
2313 /* There is no low on / high off */
2315 ushort bios_ctrl
; /* 12 BIOS control bits */
2316 /* bit 0 BIOS don't act as initiator. */
2317 /* bit 1 BIOS > 1 GB support */
2318 /* bit 2 BIOS > 2 Disk Support */
2319 /* bit 3 BIOS don't support removables */
2320 /* bit 4 BIOS support bootable CD */
2321 /* bit 5 BIOS scan enabled */
2322 /* bit 6 BIOS support multiple LUNs */
2323 /* bit 7 BIOS display of message */
2324 /* bit 8 SCAM disabled */
2325 /* bit 9 Reset SCSI bus during init. */
2326 /* bit 10 Basic Integrity Checking disabled */
2327 /* bit 11 No verbose initialization. */
2328 /* bit 12 SCSI parity enabled */
2329 /* bit 13 AIPP (Asyn. Info. Ph. Prot.) dis. */
2332 ushort sdtr_speed2
; /* 13 SDTR speed TID 4-7 */
2333 ushort sdtr_speed3
; /* 14 SDTR speed TID 8-11 */
2334 uchar max_host_qng
; /* 15 maximum host queueing */
2335 uchar max_dvc_qng
; /* maximum per device queuing */
2336 ushort dvc_cntl
; /* 16 control bit for driver */
2337 ushort sdtr_speed4
; /* 17 SDTR speed 4 TID 12-15 */
2338 ushort serial_number_word1
; /* 18 Board serial number word 1 */
2339 ushort serial_number_word2
; /* 19 Board serial number word 2 */
2340 ushort serial_number_word3
; /* 20 Board serial number word 3 */
2341 ushort check_sum
; /* 21 EEP check sum */
2342 uchar oem_name
[16]; /* 22 OEM name */
2343 ushort dvc_err_code
; /* 30 last device driver error code */
2344 ushort adv_err_code
; /* 31 last uc and Adv Lib error code */
2345 ushort adv_err_addr
; /* 32 last uc error address */
2346 ushort saved_dvc_err_code
; /* 33 saved last dev. driver error code */
2347 ushort saved_adv_err_code
; /* 34 saved last uc and Adv Lib error code */
2348 ushort saved_adv_err_addr
; /* 35 saved last uc error address */
2349 ushort reserved36
; /* 36 reserved */
2350 ushort reserved37
; /* 37 reserved */
2351 ushort reserved38
; /* 38 reserved */
2352 ushort reserved39
; /* 39 reserved */
2353 ushort reserved40
; /* 40 reserved */
2354 ushort reserved41
; /* 41 reserved */
2355 ushort reserved42
; /* 42 reserved */
2356 ushort reserved43
; /* 43 reserved */
2357 ushort reserved44
; /* 44 reserved */
2358 ushort reserved45
; /* 45 reserved */
2359 ushort reserved46
; /* 46 reserved */
2360 ushort reserved47
; /* 47 reserved */
2361 ushort reserved48
; /* 48 reserved */
2362 ushort reserved49
; /* 49 reserved */
2363 ushort reserved50
; /* 50 reserved */
2364 ushort reserved51
; /* 51 reserved */
2365 ushort reserved52
; /* 52 reserved */
2366 ushort reserved53
; /* 53 reserved */
2367 ushort reserved54
; /* 54 reserved */
2368 ushort reserved55
; /* 55 reserved */
2369 ushort cisptr_lsw
; /* 56 CIS PTR LSW */
2370 ushort cisprt_msw
; /* 57 CIS PTR MSW */
2371 ushort subsysvid
; /* 58 SubSystem Vendor ID */
2372 ushort subsysid
; /* 59 SubSystem ID */
2373 ushort reserved60
; /* 60 reserved */
2374 ushort reserved61
; /* 61 reserved */
2375 ushort reserved62
; /* 62 reserved */
2376 ushort reserved63
; /* 63 reserved */
2377 } ADVEEP_38C1600_CONFIG
;
2382 #define ASC_EEP_CMD_DONE 0x0200
2383 #define ASC_EEP_CMD_DONE_ERR 0x0001
2386 #define EEP_CFG_WORD_BIG_ENDIAN 0x8000
2389 #define BIOS_CTRL_BIOS 0x0001
2390 #define BIOS_CTRL_EXTENDED_XLAT 0x0002
2391 #define BIOS_CTRL_GT_2_DISK 0x0004
2392 #define BIOS_CTRL_BIOS_REMOVABLE 0x0008
2393 #define BIOS_CTRL_BOOTABLE_CD 0x0010
2394 #define BIOS_CTRL_MULTIPLE_LUN 0x0040
2395 #define BIOS_CTRL_DISPLAY_MSG 0x0080
2396 #define BIOS_CTRL_NO_SCAM 0x0100
2397 #define BIOS_CTRL_RESET_SCSI_BUS 0x0200
2398 #define BIOS_CTRL_INIT_VERBOSE 0x0800
2399 #define BIOS_CTRL_SCSI_PARITY 0x1000
2400 #define BIOS_CTRL_AIPP_DIS 0x2000
2402 #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */
2403 #define ADV_3550_IOLEN 0x40 /* I/O Port Range in bytes */
2405 #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */
2406 #define ADV_38C0800_IOLEN 0x100 /* I/O Port Range in bytes */
2409 * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is
2410 * a special 16K Adv Library and Microcode version. After the issue is
2411 * resolved, should restore 32K support.
2413 * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory *
2415 #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */
2416 #define ADV_38C1600_IOLEN 0x100 /* I/O Port Range 256 bytes */
2417 #define ADV_38C1600_MEMLEN 0x1000 /* Memory Range 4KB bytes */
2420 * Byte I/O register address from base of 'iop_base'.
2422 #define IOPB_INTR_STATUS_REG 0x00
2423 #define IOPB_CHIP_ID_1 0x01
2424 #define IOPB_INTR_ENABLES 0x02
2425 #define IOPB_CHIP_TYPE_REV 0x03
2426 #define IOPB_RES_ADDR_4 0x04
2427 #define IOPB_RES_ADDR_5 0x05
2428 #define IOPB_RAM_DATA 0x06
2429 #define IOPB_RES_ADDR_7 0x07
2430 #define IOPB_FLAG_REG 0x08
2431 #define IOPB_RES_ADDR_9 0x09
2432 #define IOPB_RISC_CSR 0x0A
2433 #define IOPB_RES_ADDR_B 0x0B
2434 #define IOPB_RES_ADDR_C 0x0C
2435 #define IOPB_RES_ADDR_D 0x0D
2436 #define IOPB_SOFT_OVER_WR 0x0E
2437 #define IOPB_RES_ADDR_F 0x0F
2438 #define IOPB_MEM_CFG 0x10
2439 #define IOPB_RES_ADDR_11 0x11
2440 #define IOPB_GPIO_DATA 0x12
2441 #define IOPB_RES_ADDR_13 0x13
2442 #define IOPB_FLASH_PAGE 0x14
2443 #define IOPB_RES_ADDR_15 0x15
2444 #define IOPB_GPIO_CNTL 0x16
2445 #define IOPB_RES_ADDR_17 0x17
2446 #define IOPB_FLASH_DATA 0x18
2447 #define IOPB_RES_ADDR_19 0x19
2448 #define IOPB_RES_ADDR_1A 0x1A
2449 #define IOPB_RES_ADDR_1B 0x1B
2450 #define IOPB_RES_ADDR_1C 0x1C
2451 #define IOPB_RES_ADDR_1D 0x1D
2452 #define IOPB_RES_ADDR_1E 0x1E
2453 #define IOPB_RES_ADDR_1F 0x1F
2454 #define IOPB_DMA_CFG0 0x20
2455 #define IOPB_DMA_CFG1 0x21
2456 #define IOPB_TICKLE 0x22
2457 #define IOPB_DMA_REG_WR 0x23
2458 #define IOPB_SDMA_STATUS 0x24
2459 #define IOPB_SCSI_BYTE_CNT 0x25
2460 #define IOPB_HOST_BYTE_CNT 0x26
2461 #define IOPB_BYTE_LEFT_TO_XFER 0x27
2462 #define IOPB_BYTE_TO_XFER_0 0x28
2463 #define IOPB_BYTE_TO_XFER_1 0x29
2464 #define IOPB_BYTE_TO_XFER_2 0x2A
2465 #define IOPB_BYTE_TO_XFER_3 0x2B
2466 #define IOPB_ACC_GRP 0x2C
2467 #define IOPB_RES_ADDR_2D 0x2D
2468 #define IOPB_DEV_ID 0x2E
2469 #define IOPB_RES_ADDR_2F 0x2F
2470 #define IOPB_SCSI_DATA 0x30
2471 #define IOPB_RES_ADDR_31 0x31
2472 #define IOPB_RES_ADDR_32 0x32
2473 #define IOPB_SCSI_DATA_HSHK 0x33
2474 #define IOPB_SCSI_CTRL 0x34
2475 #define IOPB_RES_ADDR_35 0x35
2476 #define IOPB_RES_ADDR_36 0x36
2477 #define IOPB_RES_ADDR_37 0x37
2478 #define IOPB_RAM_BIST 0x38
2479 #define IOPB_PLL_TEST 0x39
2480 #define IOPB_PCI_INT_CFG 0x3A
2481 #define IOPB_RES_ADDR_3B 0x3B
2482 #define IOPB_RFIFO_CNT 0x3C
2483 #define IOPB_RES_ADDR_3D 0x3D
2484 #define IOPB_RES_ADDR_3E 0x3E
2485 #define IOPB_RES_ADDR_3F 0x3F
2488 * Word I/O register address from base of 'iop_base'.
2490 #define IOPW_CHIP_ID_0 0x00 /* CID0 */
2491 #define IOPW_CTRL_REG 0x02 /* CC */
2492 #define IOPW_RAM_ADDR 0x04 /* LA */
2493 #define IOPW_RAM_DATA 0x06 /* LD */
2494 #define IOPW_RES_ADDR_08 0x08
2495 #define IOPW_RISC_CSR 0x0A /* CSR */
2496 #define IOPW_SCSI_CFG0 0x0C /* CFG0 */
2497 #define IOPW_SCSI_CFG1 0x0E /* CFG1 */
2498 #define IOPW_RES_ADDR_10 0x10
2499 #define IOPW_SEL_MASK 0x12 /* SM */
2500 #define IOPW_RES_ADDR_14 0x14
2501 #define IOPW_FLASH_ADDR 0x16 /* FA */
2502 #define IOPW_RES_ADDR_18 0x18
2503 #define IOPW_EE_CMD 0x1A /* EC */
2504 #define IOPW_EE_DATA 0x1C /* ED */
2505 #define IOPW_SFIFO_CNT 0x1E /* SFC */
2506 #define IOPW_RES_ADDR_20 0x20
2507 #define IOPW_Q_BASE 0x22 /* QB */
2508 #define IOPW_QP 0x24 /* QP */
2509 #define IOPW_IX 0x26 /* IX */
2510 #define IOPW_SP 0x28 /* SP */
2511 #define IOPW_PC 0x2A /* PC */
2512 #define IOPW_RES_ADDR_2C 0x2C
2513 #define IOPW_RES_ADDR_2E 0x2E
2514 #define IOPW_SCSI_DATA 0x30 /* SD */
2515 #define IOPW_SCSI_DATA_HSHK 0x32 /* SDH */
2516 #define IOPW_SCSI_CTRL 0x34 /* SC */
2517 #define IOPW_HSHK_CFG 0x36 /* HCFG */
2518 #define IOPW_SXFR_STATUS 0x36 /* SXS */
2519 #define IOPW_SXFR_CNTL 0x38 /* SXL */
2520 #define IOPW_SXFR_CNTH 0x3A /* SXH */
2521 #define IOPW_RES_ADDR_3C 0x3C
2522 #define IOPW_RFIFO_DATA 0x3E /* RFD */
2525 * Doubleword I/O register address from base of 'iop_base'.
2527 #define IOPDW_RES_ADDR_0 0x00
2528 #define IOPDW_RAM_DATA 0x04
2529 #define IOPDW_RES_ADDR_8 0x08
2530 #define IOPDW_RES_ADDR_C 0x0C
2531 #define IOPDW_RES_ADDR_10 0x10
2532 #define IOPDW_COMMA 0x14
2533 #define IOPDW_COMMB 0x18
2534 #define IOPDW_RES_ADDR_1C 0x1C
2535 #define IOPDW_SDMA_ADDR0 0x20
2536 #define IOPDW_SDMA_ADDR1 0x24
2537 #define IOPDW_SDMA_COUNT 0x28
2538 #define IOPDW_SDMA_ERROR 0x2C
2539 #define IOPDW_RDMA_ADDR0 0x30
2540 #define IOPDW_RDMA_ADDR1 0x34
2541 #define IOPDW_RDMA_COUNT 0x38
2542 #define IOPDW_RDMA_ERROR 0x3C
2544 #define ADV_CHIP_ID_BYTE 0x25
2545 #define ADV_CHIP_ID_WORD 0x04C1
2547 #define ADV_SC_SCSI_BUS_RESET 0x2000
2549 #define ADV_INTR_ENABLE_HOST_INTR 0x01
2550 #define ADV_INTR_ENABLE_SEL_INTR 0x02
2551 #define ADV_INTR_ENABLE_DPR_INTR 0x04
2552 #define ADV_INTR_ENABLE_RTA_INTR 0x08
2553 #define ADV_INTR_ENABLE_RMA_INTR 0x10
2554 #define ADV_INTR_ENABLE_RST_INTR 0x20
2555 #define ADV_INTR_ENABLE_DPE_INTR 0x40
2556 #define ADV_INTR_ENABLE_GLOBAL_INTR 0x80
2558 #define ADV_INTR_STATUS_INTRA 0x01
2559 #define ADV_INTR_STATUS_INTRB 0x02
2560 #define ADV_INTR_STATUS_INTRC 0x04
2562 #define ADV_RISC_CSR_STOP (0x0000)
2563 #define ADV_RISC_TEST_COND (0x2000)
2564 #define ADV_RISC_CSR_RUN (0x4000)
2565 #define ADV_RISC_CSR_SINGLE_STEP (0x8000)
2567 #define ADV_CTRL_REG_HOST_INTR 0x0100
2568 #define ADV_CTRL_REG_SEL_INTR 0x0200
2569 #define ADV_CTRL_REG_DPR_INTR 0x0400
2570 #define ADV_CTRL_REG_RTA_INTR 0x0800
2571 #define ADV_CTRL_REG_RMA_INTR 0x1000
2572 #define ADV_CTRL_REG_RES_BIT14 0x2000
2573 #define ADV_CTRL_REG_DPE_INTR 0x4000
2574 #define ADV_CTRL_REG_POWER_DONE 0x8000
2575 #define ADV_CTRL_REG_ANY_INTR 0xFF00
2577 #define ADV_CTRL_REG_CMD_RESET 0x00C6
2578 #define ADV_CTRL_REG_CMD_WR_IO_REG 0x00C5
2579 #define ADV_CTRL_REG_CMD_RD_IO_REG 0x00C4
2580 #define ADV_CTRL_REG_CMD_WR_PCI_CFG_SPACE 0x00C3
2581 #define ADV_CTRL_REG_CMD_RD_PCI_CFG_SPACE 0x00C2
2583 #define ADV_TICKLE_NOP 0x00
2584 #define ADV_TICKLE_A 0x01
2585 #define ADV_TICKLE_B 0x02
2586 #define ADV_TICKLE_C 0x03
2588 #define ADV_SCSI_CTRL_RSTOUT 0x2000
2590 #define AdvIsIntPending(port) \
2591 (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR)
2594 * SCSI_CFG0 Register bit definitions
2596 #define TIMER_MODEAB 0xC000 /* Watchdog, Second, and Select. Timer Ctrl. */
2597 #define PARITY_EN 0x2000 /* Enable SCSI Parity Error detection */
2598 #define EVEN_PARITY 0x1000 /* Select Even Parity */
2599 #define WD_LONG 0x0800 /* Watchdog Interval, 1: 57 min, 0: 13 sec */
2600 #define QUEUE_128 0x0400 /* Queue Size, 1: 128 byte, 0: 64 byte */
2601 #define PRIM_MODE 0x0100 /* Primitive SCSI mode */
2602 #define SCAM_EN 0x0080 /* Enable SCAM selection */
2603 #define SEL_TMO_LONG 0x0040 /* Sel/Resel Timeout, 1: 400 ms, 0: 1.6 ms */
2604 #define CFRM_ID 0x0020 /* SCAM id sel. confirm., 1: fast, 0: 6.4 ms */
2605 #define OUR_ID_EN 0x0010 /* Enable OUR_ID bits */
2606 #define OUR_ID 0x000F /* SCSI ID */
2609 * SCSI_CFG1 Register bit definitions
2611 #define BIG_ENDIAN 0x8000 /* Enable Big Endian Mode MIO:15, EEP:15 */
2612 #define TERM_POL 0x2000 /* Terminator Polarity Ctrl. MIO:13, EEP:13 */
2613 #define SLEW_RATE 0x1000 /* SCSI output buffer slew rate */
2614 #define FILTER_SEL 0x0C00 /* Filter Period Selection */
2615 #define FLTR_DISABLE 0x0000 /* Input Filtering Disabled */
2616 #define FLTR_11_TO_20NS 0x0800 /* Input Filtering 11ns to 20ns */
2617 #define FLTR_21_TO_39NS 0x0C00 /* Input Filtering 21ns to 39ns */
2618 #define ACTIVE_DBL 0x0200 /* Disable Active Negation */
2619 #define DIFF_MODE 0x0100 /* SCSI differential Mode (Read-Only) */
2620 #define DIFF_SENSE 0x0080 /* 1: No SE cables, 0: SE cable (Read-Only) */
2621 #define TERM_CTL_SEL 0x0040 /* Enable TERM_CTL_H and TERM_CTL_L */
2622 #define TERM_CTL 0x0030 /* External SCSI Termination Bits */
2623 #define TERM_CTL_H 0x0020 /* Enable External SCSI Upper Termination */
2624 #define TERM_CTL_L 0x0010 /* Enable External SCSI Lower Termination */
2625 #define CABLE_DETECT 0x000F /* External SCSI Cable Connection Status */
2628 * Addendum for ASC-38C0800 Chip
2630 * The ASC-38C1600 Chip uses the same definitions except that the
2631 * bus mode override bits [12:10] have been moved to byte register
2632 * offset 0xE (IOPB_SOFT_OVER_WR) bits [12:10]. The [12:10] bits in
2633 * SCSI_CFG1 are read-only and always available. Bit 14 (DIS_TERM_DRV)
2634 * is not needed. The [12:10] bits in IOPB_SOFT_OVER_WR are write-only.
2635 * Also each ASC-38C1600 function or channel uses only cable bits [5:4]
2636 * and [1:0]. Bits [14], [7:6], [3:2] are unused.
2638 #define DIS_TERM_DRV 0x4000 /* 1: Read c_det[3:0], 0: cannot read */
2639 #define HVD_LVD_SE 0x1C00 /* Device Detect Bits */
2640 #define HVD 0x1000 /* HVD Device Detect */
2641 #define LVD 0x0800 /* LVD Device Detect */
2642 #define SE 0x0400 /* SE Device Detect */
2643 #define TERM_LVD 0x00C0 /* LVD Termination Bits */
2644 #define TERM_LVD_HI 0x0080 /* Enable LVD Upper Termination */
2645 #define TERM_LVD_LO 0x0040 /* Enable LVD Lower Termination */
2646 #define TERM_SE 0x0030 /* SE Termination Bits */
2647 #define TERM_SE_HI 0x0020 /* Enable SE Upper Termination */
2648 #define TERM_SE_LO 0x0010 /* Enable SE Lower Termination */
2649 #define C_DET_LVD 0x000C /* LVD Cable Detect Bits */
2650 #define C_DET3 0x0008 /* Cable Detect for LVD External Wide */
2651 #define C_DET2 0x0004 /* Cable Detect for LVD Internal Wide */
2652 #define C_DET_SE 0x0003 /* SE Cable Detect Bits */
2653 #define C_DET1 0x0002 /* Cable Detect for SE Internal Wide */
2654 #define C_DET0 0x0001 /* Cable Detect for SE Internal Narrow */
2656 #define CABLE_ILLEGAL_A 0x7
2657 /* x 0 0 0 | on on | Illegal (all 3 connectors are used) */
2659 #define CABLE_ILLEGAL_B 0xB
2660 /* 0 x 0 0 | on on | Illegal (all 3 connectors are used) */
2663 * MEM_CFG Register bit definitions
2665 #define BIOS_EN 0x40 /* BIOS Enable MIO:14,EEP:14 */
2666 #define FAST_EE_CLK 0x20 /* Diagnostic Bit */
2667 #define RAM_SZ 0x1C /* Specify size of RAM to RISC */
2668 #define RAM_SZ_2KB 0x00 /* 2 KB */
2669 #define RAM_SZ_4KB 0x04 /* 4 KB */
2670 #define RAM_SZ_8KB 0x08 /* 8 KB */
2671 #define RAM_SZ_16KB 0x0C /* 16 KB */
2672 #define RAM_SZ_32KB 0x10 /* 32 KB */
2673 #define RAM_SZ_64KB 0x14 /* 64 KB */
2676 * DMA_CFG0 Register bit definitions
2678 * This register is only accessible to the host.
2680 #define BC_THRESH_ENB 0x80 /* PCI DMA Start Conditions */
2681 #define FIFO_THRESH 0x70 /* PCI DMA FIFO Threshold */
2682 #define FIFO_THRESH_16B 0x00 /* 16 bytes */
2683 #define FIFO_THRESH_32B 0x20 /* 32 bytes */
2684 #define FIFO_THRESH_48B 0x30 /* 48 bytes */
2685 #define FIFO_THRESH_64B 0x40 /* 64 bytes */
2686 #define FIFO_THRESH_80B 0x50 /* 80 bytes (default) */
2687 #define FIFO_THRESH_96B 0x60 /* 96 bytes */
2688 #define FIFO_THRESH_112B 0x70 /* 112 bytes */
2689 #define START_CTL 0x0C /* DMA start conditions */
2690 #define START_CTL_TH 0x00 /* Wait threshold level (default) */
2691 #define START_CTL_ID 0x04 /* Wait SDMA/SBUS idle */
2692 #define START_CTL_THID 0x08 /* Wait threshold and SDMA/SBUS idle */
2693 #define START_CTL_EMFU 0x0C /* Wait SDMA FIFO empty/full */
2694 #define READ_CMD 0x03 /* Memory Read Method */
2695 #define READ_CMD_MR 0x00 /* Memory Read */
2696 #define READ_CMD_MRL 0x02 /* Memory Read Long */
2697 #define READ_CMD_MRM 0x03 /* Memory Read Multiple (default) */
2700 * ASC-38C0800 RAM BIST Register bit definitions
2702 #define RAM_TEST_MODE 0x80
2703 #define PRE_TEST_MODE 0x40
2704 #define NORMAL_MODE 0x00
2705 #define RAM_TEST_DONE 0x10
2706 #define RAM_TEST_STATUS 0x0F
2707 #define RAM_TEST_HOST_ERROR 0x08
2708 #define RAM_TEST_INTRAM_ERROR 0x04
2709 #define RAM_TEST_RISC_ERROR 0x02
2710 #define RAM_TEST_SCSI_ERROR 0x01
2711 #define RAM_TEST_SUCCESS 0x00
2712 #define PRE_TEST_VALUE 0x05
2713 #define NORMAL_VALUE 0x00
2716 * ASC38C1600 Definitions
2718 * IOPB_PCI_INT_CFG Bit Field Definitions
2721 #define INTAB_LD 0x80 /* Value loaded from EEPROM Bit 11. */
2724 * Bit 1 can be set to change the interrupt for the Function to operate in
2725 * Totem Pole mode. By default Bit 1 is 0 and the interrupt operates in
2726 * Open Drain mode. Both functions of the ASC38C1600 must be set to the same
2727 * mode, otherwise the operating mode is undefined.
2729 #define TOTEMPOLE 0x02
2732 * Bit 0 can be used to change the Int Pin for the Function. The value is
2733 * 0 by default for both Functions with Function 0 using INT A and Function
2734 * B using INT B. For Function 0 if set, INT B is used. For Function 1 if set,
2737 * EEPROM Word 0 Bit 11 for each Function may change the initial Int Pin
2738 * value specified in the PCI Configuration Space.
2745 * Adv Library Status Definitions
2749 #define ADV_NOERROR 1
2750 #define ADV_SUCCESS 1
2752 #define ADV_ERROR (-1)
2755 * ADV_DVC_VAR 'warn_code' values
2757 #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */
2758 #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */
2759 #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */
2760 #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 /* PCI config space set error */
2761 #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */
2763 #define ADV_MAX_TID 15 /* max. target identifier */
2764 #define ADV_MAX_LUN 7 /* max. logical unit number */
2767 * Error code values are set in ADV_DVC_VAR 'err_code'.
2769 #define ASC_IERR_WRITE_EEPROM 0x0001 /* write EEPROM error */
2770 #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */
2771 #define ASC_IERR_NO_CARRIER 0x0004 /* No more carrier memory. */
2772 #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */
2773 #define ASC_IERR_CHIP_VERSION 0x0040 /* wrong chip version */
2774 #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */
2775 #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD attached to LVD connector. */
2776 #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */
2777 #define ASC_IERR_ILLEGAL_CONNECTION 0x0400 /* Illegal cable connection */
2778 #define ASC_IERR_SINGLE_END_DEVICE 0x0800 /* Single-end used w/differential */
2779 #define ASC_IERR_REVERSED_CABLE 0x1000 /* Narrow flat cable reversed */
2780 #define ASC_IERR_BIST_PRE_TEST 0x2000 /* BIST pre-test error */
2781 #define ASC_IERR_BIST_RAM_TEST 0x4000 /* BIST RAM test error */
2782 #define ASC_IERR_BAD_CHIPTYPE 0x8000 /* Invalid 'chip_type' setting. */
2785 * Fixed locations of microcode operating variables.
2787 #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */
2788 #define ASC_MC_CODE_END_ADDR 0x002A /* microcode end address */
2789 #define ASC_MC_CODE_CHK_SUM 0x002C /* microcode code checksum */
2790 #define ASC_MC_VERSION_DATE 0x0038 /* microcode version */
2791 #define ASC_MC_VERSION_NUM 0x003A /* microcode number */
2792 #define ASC_MC_BIOSMEM 0x0040 /* BIOS RISC Memory Start */
2793 #define ASC_MC_BIOSLEN 0x0050 /* BIOS RISC Memory Length */
2794 #define ASC_MC_BIOS_SIGNATURE 0x0058 /* BIOS Signature 0x55AA */
2795 #define ASC_MC_BIOS_VERSION 0x005A /* BIOS Version (2 bytes) */
2796 #define ASC_MC_SDTR_SPEED1 0x0090 /* SDTR Speed for TID 0-3 */
2797 #define ASC_MC_SDTR_SPEED2 0x0092 /* SDTR Speed for TID 4-7 */
2798 #define ASC_MC_SDTR_SPEED3 0x0094 /* SDTR Speed for TID 8-11 */
2799 #define ASC_MC_SDTR_SPEED4 0x0096 /* SDTR Speed for TID 12-15 */
2800 #define ASC_MC_CHIP_TYPE 0x009A
2801 #define ASC_MC_INTRB_CODE 0x009B
2802 #define ASC_MC_WDTR_ABLE 0x009C
2803 #define ASC_MC_SDTR_ABLE 0x009E
2804 #define ASC_MC_TAGQNG_ABLE 0x00A0
2805 #define ASC_MC_DISC_ENABLE 0x00A2
2806 #define ASC_MC_IDLE_CMD_STATUS 0x00A4
2807 #define ASC_MC_IDLE_CMD 0x00A6
2808 #define ASC_MC_IDLE_CMD_PARAMETER 0x00A8
2809 #define ASC_MC_DEFAULT_SCSI_CFG0 0x00AC
2810 #define ASC_MC_DEFAULT_SCSI_CFG1 0x00AE
2811 #define ASC_MC_DEFAULT_MEM_CFG 0x00B0
2812 #define ASC_MC_DEFAULT_SEL_MASK 0x00B2
2813 #define ASC_MC_SDTR_DONE 0x00B6
2814 #define ASC_MC_NUMBER_OF_QUEUED_CMD 0x00C0
2815 #define ASC_MC_NUMBER_OF_MAX_CMD 0x00D0
2816 #define ASC_MC_DEVICE_HSHK_CFG_TABLE 0x0100
2817 #define ASC_MC_CONTROL_FLAG 0x0122 /* Microcode control flag. */
2818 #define ASC_MC_WDTR_DONE 0x0124
2819 #define ASC_MC_CAM_MODE_MASK 0x015E /* CAM mode TID bitmask. */
2820 #define ASC_MC_ICQ 0x0160
2821 #define ASC_MC_IRQ 0x0164
2822 #define ASC_MC_PPR_ABLE 0x017A
2825 * BIOS LRAM variable absolute offsets.
2827 #define BIOS_CODESEG 0x54
2828 #define BIOS_CODELEN 0x56
2829 #define BIOS_SIGNATURE 0x58
2830 #define BIOS_VERSION 0x5A
2833 * Microcode Control Flags
2835 * Flags set by the Adv Library in RISC variable 'control_flag' (0x122)
2836 * and handled by the microcode.
2838 #define CONTROL_FLAG_IGNORE_PERR 0x0001 /* Ignore DMA Parity Errors */
2839 #define CONTROL_FLAG_ENABLE_AIPP 0x0002 /* Enabled AIPP checking. */
2842 * ASC_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format
2844 #define HSHK_CFG_WIDE_XFR 0x8000
2845 #define HSHK_CFG_RATE 0x0F00
2846 #define HSHK_CFG_OFFSET 0x001F
2848 #define ASC_DEF_MAX_HOST_QNG 0xFD /* Max. number of host commands (253) */
2849 #define ASC_DEF_MIN_HOST_QNG 0x10 /* Min. number of host commands (16) */
2850 #define ASC_DEF_MAX_DVC_QNG 0x3F /* Max. number commands per device (63) */
2851 #define ASC_DEF_MIN_DVC_QNG 0x04 /* Min. number commands per device (4) */
2853 #define ASC_QC_DATA_CHECK 0x01 /* Require ASC_QC_DATA_OUT set or clear. */
2854 #define ASC_QC_DATA_OUT 0x02 /* Data out DMA transfer. */
2855 #define ASC_QC_START_MOTOR 0x04 /* Send auto-start motor before request. */
2856 #define ASC_QC_NO_OVERRUN 0x08 /* Don't report overrun. */
2857 #define ASC_QC_FREEZE_TIDQ 0x10 /* Freeze TID queue after request. XXX TBD */
2859 #define ASC_QSC_NO_DISC 0x01 /* Don't allow disconnect for request. */
2860 #define ASC_QSC_NO_TAGMSG 0x02 /* Don't allow tag queuing for request. */
2861 #define ASC_QSC_NO_SYNC 0x04 /* Don't use Synch. transfer on request. */
2862 #define ASC_QSC_NO_WIDE 0x08 /* Don't use Wide transfer on request. */
2863 #define ASC_QSC_REDO_DTR 0x10 /* Renegotiate WDTR/SDTR before request. */
2865 * Note: If a Tag Message is to be sent and neither ASC_QSC_HEAD_TAG or
2866 * ASC_QSC_ORDERED_TAG is set, then a Simple Tag Message (0x20) is used.
2868 #define ASC_QSC_HEAD_TAG 0x40 /* Use Head Tag Message (0x21). */
2869 #define ASC_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */
2872 * All fields here are accessed by the board microcode and need to be
2875 typedef struct adv_carr_t
{
2876 ADV_VADDR carr_va
; /* Carrier Virtual Address */
2877 ADV_PADDR carr_pa
; /* Carrier Physical Address */
2878 ADV_VADDR areq_vpa
; /* ASC_SCSI_REQ_Q Virtual or Physical Address */
2880 * next_vpa [31:4] Carrier Virtual or Physical Next Pointer
2882 * next_vpa [3:1] Reserved Bits
2883 * next_vpa [0] Done Flag set in Response Queue.
2889 * Mask used to eliminate low 4 bits of carrier 'next_vpa' field.
2891 #define ASC_NEXT_VPA_MASK 0xFFFFFFF0
2893 #define ASC_RQ_DONE 0x00000001
2894 #define ASC_RQ_GOOD 0x00000002
2895 #define ASC_CQ_STOPPER 0x00000000
2897 #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK)
2899 #define ADV_CARRIER_NUM_PAGE_CROSSING \
2900 (((ADV_CARRIER_COUNT * sizeof(ADV_CARR_T)) + \
2901 (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
2903 #define ADV_CARRIER_BUFSIZE \
2904 ((ADV_CARRIER_COUNT + ADV_CARRIER_NUM_PAGE_CROSSING) * sizeof(ADV_CARR_T))
2907 * ASC_SCSI_REQ_Q 'a_flag' definitions
2909 * The Adv Library should limit use to the lower nibble (4 bits) of
2910 * a_flag. Drivers are free to use the upper nibble (4 bits) of a_flag.
2912 #define ADV_POLL_REQUEST 0x01 /* poll for request completion */
2913 #define ADV_SCSIQ_DONE 0x02 /* request done */
2914 #define ADV_DONT_RETRY 0x08 /* don't do retry */
2916 #define ADV_CHIP_ASC3550 0x01 /* Ultra-Wide IC */
2917 #define ADV_CHIP_ASC38C0800 0x02 /* Ultra2-Wide/LVD IC */
2918 #define ADV_CHIP_ASC38C1600 0x03 /* Ultra3-Wide/LVD2 IC */
2921 * Adapter temporary configuration structure
2923 * This structure can be discarded after initialization. Don't add
2924 * fields here needed after initialization.
2926 * Field naming convention:
2928 * *_enable indicates the field enables or disables a feature. The
2929 * value of the field is never reset.
2931 typedef struct adv_dvc_cfg
{
2932 ushort disc_enable
; /* enable disconnection */
2933 uchar chip_version
; /* chip version */
2934 uchar termination
; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */
2935 ushort lib_version
; /* Adv Library version number */
2936 ushort control_flag
; /* Microcode Control Flag */
2937 ushort mcode_date
; /* Microcode date */
2938 ushort mcode_version
; /* Microcode version */
2939 ushort pci_slot_info
; /* high byte device/function number */
2940 /* bits 7-3 device num., bits 2-0 function num. */
2941 /* low byte bus num. */
2942 ushort serial1
; /* EEPROM serial number word 1 */
2943 ushort serial2
; /* EEPROM serial number word 2 */
2944 ushort serial3
; /* EEPROM serial number word 3 */
2945 struct device
*dev
; /* pointer to the pci dev structure for this board */
2949 struct adv_scsi_req_q
;
2951 typedef void (*ADV_ISR_CALLBACK
)
2952 (struct adv_dvc_var
*, struct adv_scsi_req_q
*);
2954 typedef void (*ADV_ASYNC_CALLBACK
)
2955 (struct adv_dvc_var
*, uchar
);
2958 * Adapter operation variable structure.
2960 * One structure is required per host adapter.
2962 * Field naming convention:
2964 * *_able indicates both whether a feature should be enabled or disabled
2965 * and whether a device isi capable of the feature. At initialization
2966 * this field may be set, but later if a device is found to be incapable
2967 * of the feature, the field is cleared.
2969 typedef struct adv_dvc_var
{
2970 AdvPortAddr iop_base
; /* I/O port address */
2971 ushort err_code
; /* fatal error code */
2972 ushort bios_ctrl
; /* BIOS control word, EEPROM word 12 */
2973 ADV_ISR_CALLBACK isr_callback
;
2974 ADV_ASYNC_CALLBACK async_callback
;
2975 ushort wdtr_able
; /* try WDTR for a device */
2976 ushort sdtr_able
; /* try SDTR for a device */
2977 ushort ultra_able
; /* try SDTR Ultra speed for a device */
2978 ushort sdtr_speed1
; /* EEPROM SDTR Speed for TID 0-3 */
2979 ushort sdtr_speed2
; /* EEPROM SDTR Speed for TID 4-7 */
2980 ushort sdtr_speed3
; /* EEPROM SDTR Speed for TID 8-11 */
2981 ushort sdtr_speed4
; /* EEPROM SDTR Speed for TID 12-15 */
2982 ushort tagqng_able
; /* try tagged queuing with a device */
2983 ushort ppr_able
; /* PPR message capable per TID bitmask. */
2984 uchar max_dvc_qng
; /* maximum number of tagged commands per device */
2985 ushort start_motor
; /* start motor command allowed */
2986 uchar scsi_reset_wait
; /* delay in seconds after scsi bus reset */
2987 uchar chip_no
; /* should be assigned by caller */
2988 uchar max_host_qng
; /* maximum number of Q'ed command allowed */
2989 uchar irq_no
; /* IRQ number */
2990 ushort no_scam
; /* scam_tolerant of EEPROM */
2991 struct asc_board
*drv_ptr
; /* driver pointer to private structure */
2992 uchar chip_scsi_id
; /* chip SCSI target ID */
2994 uchar bist_err_code
;
2995 ADV_CARR_T
*carrier_buf
;
2996 ADV_CARR_T
*carr_freelist
; /* Carrier free list. */
2997 ADV_CARR_T
*icq_sp
; /* Initiator command queue stopper pointer. */
2998 ADV_CARR_T
*irq_sp
; /* Initiator response queue stopper pointer. */
2999 ushort carr_pending_cnt
; /* Count of pending carriers. */
3001 * Note: The following fields will not be used after initialization. The
3002 * driver may discard the buffer after initialization is done.
3004 ADV_DVC_CFG
*cfg
; /* temporary configuration structure */
3007 #define NO_OF_SG_PER_BLOCK 15
3009 typedef struct asc_sg_block
{
3013 uchar sg_cnt
; /* Valid entries in block. */
3014 ADV_PADDR sg_ptr
; /* Pointer to next sg block. */
3016 ADV_PADDR sg_addr
; /* SG element address. */
3017 ADV_DCNT sg_count
; /* SG element count. */
3018 } sg_list
[NO_OF_SG_PER_BLOCK
];
3022 * ADV_SCSI_REQ_Q - microcode request structure
3024 * All fields in this structure up to byte 60 are used by the microcode.
3025 * The microcode makes assumptions about the size and ordering of fields
3026 * in this structure. Do not change the structure definition here without
3027 * coordinating the change with the microcode.
3029 * All fields accessed by microcode must be maintained in little_endian
3032 typedef struct adv_scsi_req_q
{
3033 uchar cntl
; /* Ucode flags and state (ASC_MC_QC_*). */
3035 uchar target_id
; /* Device target identifier. */
3036 uchar target_lun
; /* Device target logical unit number. */
3037 ADV_PADDR data_addr
; /* Data buffer physical address. */
3038 ADV_DCNT data_cnt
; /* Data count. Ucode sets to residual. */
3039 ADV_PADDR sense_addr
;
3043 uchar cdb_len
; /* SCSI CDB length. Must <= 16 bytes. */
3045 uchar done_status
; /* Completion status. */
3046 uchar scsi_status
; /* SCSI status byte. */
3047 uchar host_status
; /* Ucode host status. */
3048 uchar sg_working_ix
;
3049 uchar cdb
[12]; /* SCSI CDB bytes 0-11. */
3050 ADV_PADDR sg_real_addr
; /* SG list physical address. */
3051 ADV_PADDR scsiq_rptr
;
3052 uchar cdb16
[4]; /* SCSI CDB bytes 12-15. */
3053 ADV_VADDR scsiq_ptr
;
3056 * End of microcode structure - 60 bytes. The rest of the structure
3057 * is used by the Adv Library and ignored by the microcode.
3060 ADV_SG_BLOCK
*sg_list_ptr
; /* SG list virtual address. */
3061 char *vdata_addr
; /* Data buffer virtual address. */
3063 uchar pad
[2]; /* Pad out to a word boundary. */
3067 * Microcode idle loop commands
3069 #define IDLE_CMD_COMPLETED 0
3070 #define IDLE_CMD_STOP_CHIP 0x0001
3071 #define IDLE_CMD_STOP_CHIP_SEND_INT 0x0002
3072 #define IDLE_CMD_SEND_INT 0x0004
3073 #define IDLE_CMD_ABORT 0x0008
3074 #define IDLE_CMD_DEVICE_RESET 0x0010
3075 #define IDLE_CMD_SCSI_RESET_START 0x0020 /* Assert SCSI Bus Reset */
3076 #define IDLE_CMD_SCSI_RESET_END 0x0040 /* Deassert SCSI Bus Reset */
3077 #define IDLE_CMD_SCSIREQ 0x0080
3079 #define IDLE_CMD_STATUS_SUCCESS 0x0001
3080 #define IDLE_CMD_STATUS_FAILURE 0x0002
3083 * AdvSendIdleCmd() flag definitions.
3085 #define ADV_NOWAIT 0x01
3088 * Wait loop time out values.
3090 #define SCSI_WAIT_10_SEC 10UL /* 10 seconds */
3091 #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */
3092 #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */
3093 #define SCSI_MS_PER_SEC 1000UL /* milliseconds per second */
3094 #define SCSI_MAX_RETRY 10 /* retry count */
3096 #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */
3097 #define ADV_ASYNC_SCSI_BUS_RESET_DET 0x02 /* Detected SCSI Bus Reset. */
3098 #define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */
3099 #define ADV_RDMA_IN_CARR_AND_Q_INVALID 0x04 /* RDMAed-in data invalid. */
3101 #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */
3104 * Device drivers must define the following functions.
3106 static inline ulong
DvcEnterCritical(void);
3107 static inline void DvcLeaveCritical(ulong
);
3108 static void DvcSleepMilliSecond(ADV_DCNT
);
3109 static uchar
DvcAdvReadPCIConfigByte(ADV_DVC_VAR
*, ushort
);
3110 static void DvcAdvWritePCIConfigByte(ADV_DVC_VAR
*, ushort
, uchar
);
3111 static ADV_PADDR
DvcGetPhyAddr(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*,
3112 uchar
*, ASC_SDCNT
*, int);
3113 static void DvcDelayMicroSecond(ADV_DVC_VAR
*, ushort
);
3116 * Adv Library functions available to drivers.
3118 static int AdvExeScsiQueue(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*);
3119 static int AdvISR(ADV_DVC_VAR
*);
3120 static int AdvInitGetConfig(ADV_DVC_VAR
*);
3121 static int AdvInitAsc3550Driver(ADV_DVC_VAR
*);
3122 static int AdvInitAsc38C0800Driver(ADV_DVC_VAR
*);
3123 static int AdvInitAsc38C1600Driver(ADV_DVC_VAR
*);
3124 static int AdvResetChipAndSB(ADV_DVC_VAR
*);
3125 static int AdvResetSB(ADV_DVC_VAR
*asc_dvc
);
3128 * Internal Adv Library functions.
3130 static int AdvSendIdleCmd(ADV_DVC_VAR
*, ushort
, ADV_DCNT
);
3131 static void AdvInquiryHandling(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*);
3132 static int AdvInitFrom3550EEP(ADV_DVC_VAR
*);
3133 static int AdvInitFrom38C0800EEP(ADV_DVC_VAR
*);
3134 static int AdvInitFrom38C1600EEP(ADV_DVC_VAR
*);
3135 static ushort
AdvGet3550EEPConfig(AdvPortAddr
, ADVEEP_3550_CONFIG
*);
3136 static void AdvSet3550EEPConfig(AdvPortAddr
, ADVEEP_3550_CONFIG
*);
3137 static ushort
AdvGet38C0800EEPConfig(AdvPortAddr
, ADVEEP_38C0800_CONFIG
*);
3138 static void AdvSet38C0800EEPConfig(AdvPortAddr
, ADVEEP_38C0800_CONFIG
*);
3139 static ushort
AdvGet38C1600EEPConfig(AdvPortAddr
, ADVEEP_38C1600_CONFIG
*);
3140 static void AdvSet38C1600EEPConfig(AdvPortAddr
, ADVEEP_38C1600_CONFIG
*);
3141 static void AdvWaitEEPCmd(AdvPortAddr
);
3142 static ushort
AdvReadEEPWord(AdvPortAddr
, int);
3145 * PCI Bus Definitions
3147 #define AscPCICmdRegBits_BusMastering 0x0007
3148 #define AscPCICmdRegBits_ParErrRespCtrl 0x0040
3150 /* Read byte from a register. */
3151 #define AdvReadByteRegister(iop_base, reg_off) \
3152 (ADV_MEM_READB((iop_base) + (reg_off)))
3154 /* Write byte to a register. */
3155 #define AdvWriteByteRegister(iop_base, reg_off, byte) \
3156 (ADV_MEM_WRITEB((iop_base) + (reg_off), (byte)))
3158 /* Read word (2 bytes) from a register. */
3159 #define AdvReadWordRegister(iop_base, reg_off) \
3160 (ADV_MEM_READW((iop_base) + (reg_off)))
3162 /* Write word (2 bytes) to a register. */
3163 #define AdvWriteWordRegister(iop_base, reg_off, word) \
3164 (ADV_MEM_WRITEW((iop_base) + (reg_off), (word)))
3166 /* Write dword (4 bytes) to a register. */
3167 #define AdvWriteDWordRegister(iop_base, reg_off, dword) \
3168 (ADV_MEM_WRITEDW((iop_base) + (reg_off), (dword)))
3170 /* Read byte from LRAM. */
3171 #define AdvReadByteLram(iop_base, addr, byte) \
3173 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
3174 (byte) = ADV_MEM_READB((iop_base) + IOPB_RAM_DATA); \
3177 /* Write byte to LRAM. */
3178 #define AdvWriteByteLram(iop_base, addr, byte) \
3179 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
3180 ADV_MEM_WRITEB((iop_base) + IOPB_RAM_DATA, (byte)))
3182 /* Read word (2 bytes) from LRAM. */
3183 #define AdvReadWordLram(iop_base, addr, word) \
3185 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
3186 (word) = (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA)); \
3189 /* Write word (2 bytes) to LRAM. */
3190 #define AdvWriteWordLram(iop_base, addr, word) \
3191 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
3192 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
3194 /* Write little-endian double word (4 bytes) to LRAM */
3195 /* Because of unspecified C language ordering don't use auto-increment. */
3196 #define AdvWriteDWordLramNoSwap(iop_base, addr, dword) \
3197 ((ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
3198 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
3199 cpu_to_le16((ushort) ((dword) & 0xFFFF)))), \
3200 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr) + 2), \
3201 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
3202 cpu_to_le16((ushort) ((dword >> 16) & 0xFFFF)))))
3204 /* Read word (2 bytes) from LRAM assuming that the address is already set. */
3205 #define AdvReadWordAutoIncLram(iop_base) \
3206 (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA))
3208 /* Write word (2 bytes) to LRAM assuming that the address is already set. */
3209 #define AdvWriteWordAutoIncLram(iop_base, word) \
3210 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
3213 * Define macro to check for Condor signature.
3215 * Evaluate to ADV_TRUE if a Condor chip is found the specified port
3216 * address 'iop_base'. Otherwise evalue to ADV_FALSE.
3218 #define AdvFindSignature(iop_base) \
3219 (((AdvReadByteRegister((iop_base), IOPB_CHIP_ID_1) == \
3220 ADV_CHIP_ID_BYTE) && \
3221 (AdvReadWordRegister((iop_base), IOPW_CHIP_ID_0) == \
3222 ADV_CHIP_ID_WORD)) ? ADV_TRUE : ADV_FALSE)
3225 * Define macro to Return the version number of the chip at 'iop_base'.
3227 * The second parameter 'bus_type' is currently unused.
3229 #define AdvGetChipVersion(iop_base, bus_type) \
3230 AdvReadByteRegister((iop_base), IOPB_CHIP_TYPE_REV)
3233 * Abort an SRB in the chip's RISC Memory. The 'srb_ptr' argument must
3234 * match the ASC_SCSI_REQ_Q 'srb_ptr' field.
3236 * If the request has not yet been sent to the device it will simply be
3237 * aborted from RISC memory. If the request is disconnected it will be
3238 * aborted on reselection by sending an Abort Message to the target ID.
3241 * ADV_TRUE(1) - Queue was successfully aborted.
3242 * ADV_FALSE(0) - Queue was not found on the active queue list.
3244 #define AdvAbortQueue(asc_dvc, scsiq) \
3245 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_ABORT, \
3249 * Send a Bus Device Reset Message to the specified target ID.
3251 * All outstanding commands will be purged if sending the
3252 * Bus Device Reset Message is successful.
3255 * ADV_TRUE(1) - All requests on the target are purged.
3256 * ADV_FALSE(0) - Couldn't issue Bus Device Reset Message; Requests
3259 #define AdvResetDevice(asc_dvc, target_id) \
3260 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_DEVICE_RESET, \
3261 (ADV_DCNT) (target_id))
3264 * SCSI Wide Type definition.
3266 #define ADV_SCSI_BIT_ID_TYPE ushort
3269 * AdvInitScsiTarget() 'cntl_flag' options.
3271 #define ADV_SCAN_LUN 0x01
3272 #define ADV_CAPINFO_NOLUN 0x02
3275 * Convert target id to target id bit mask.
3277 #define ADV_TID_TO_TIDMASK(tid) (0x01 << ((tid) & ADV_MAX_TID))
3280 * ASC_SCSI_REQ_Q 'done_status' and 'host_status' return values.
3283 #define QD_NO_STATUS 0x00 /* Request not completed yet. */
3284 #define QD_NO_ERROR 0x01
3285 #define QD_ABORTED_BY_HOST 0x02
3286 #define QD_WITH_ERROR 0x04
3288 #define QHSTA_NO_ERROR 0x00
3289 #define QHSTA_M_SEL_TIMEOUT 0x11
3290 #define QHSTA_M_DATA_OVER_RUN 0x12
3291 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
3292 #define QHSTA_M_QUEUE_ABORTED 0x15
3293 #define QHSTA_M_SXFR_SDMA_ERR 0x16 /* SXFR_STATUS SCSI DMA Error */
3294 #define QHSTA_M_SXFR_SXFR_PERR 0x17 /* SXFR_STATUS SCSI Bus Parity Error */
3295 #define QHSTA_M_RDMA_PERR 0x18 /* RISC PCI DMA parity error */
3296 #define QHSTA_M_SXFR_OFF_UFLW 0x19 /* SXFR_STATUS Offset Underflow */
3297 #define QHSTA_M_SXFR_OFF_OFLW 0x20 /* SXFR_STATUS Offset Overflow */
3298 #define QHSTA_M_SXFR_WD_TMO 0x21 /* SXFR_STATUS Watchdog Timeout */
3299 #define QHSTA_M_SXFR_DESELECTED 0x22 /* SXFR_STATUS Deselected */
3300 /* Note: QHSTA_M_SXFR_XFR_OFLW is identical to QHSTA_M_DATA_OVER_RUN. */
3301 #define QHSTA_M_SXFR_XFR_OFLW 0x12 /* SXFR_STATUS Transfer Overflow */
3302 #define QHSTA_M_SXFR_XFR_PH_ERR 0x24 /* SXFR_STATUS Transfer Phase Error */
3303 #define QHSTA_M_SXFR_UNKNOWN_ERROR 0x25 /* SXFR_STATUS Unknown Error */
3304 #define QHSTA_M_SCSI_BUS_RESET 0x30 /* Request aborted from SBR */
3305 #define QHSTA_M_SCSI_BUS_RESET_UNSOL 0x31 /* Request aborted from unsol. SBR */
3306 #define QHSTA_M_BUS_DEVICE_RESET 0x32 /* Request aborted from BDR */
3307 #define QHSTA_M_DIRECTION_ERR 0x35 /* Data Phase mismatch */
3308 #define QHSTA_M_DIRECTION_ERR_HUNG 0x36 /* Data Phase mismatch and bus hang */
3309 #define QHSTA_M_WTM_TIMEOUT 0x41
3310 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
3311 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
3312 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
3313 #define QHSTA_M_INVALID_DEVICE 0x45 /* Bad target ID */
3314 #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */
3315 #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */
3318 * Default EEPROM Configuration structure defined in a_init.c.
3320 static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config
;
3321 static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config
;
3322 static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config
;
3325 * DvcGetPhyAddr() flag arguments
3327 #define ADV_IS_SCSIQ_FLAG 0x01 /* 'addr' is ASC_SCSI_REQ_Q pointer */
3328 #define ADV_ASCGETSGLIST_VADDR 0x02 /* 'addr' is AscGetSGList() virtual addr */
3329 #define ADV_IS_SENSE_FLAG 0x04 /* 'addr' is sense virtual pointer */
3330 #define ADV_IS_DATA_FLAG 0x08 /* 'addr' is data virtual pointer */
3331 #define ADV_IS_SGLIST_FLAG 0x10 /* 'addr' is sglist virtual pointer */
3332 #define ADV_IS_CARRIER_FLAG 0x20 /* 'addr' is ADV_CARR_T pointer */
3334 /* Return the address that is aligned at the next doubleword >= to 'addr'. */
3335 #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7)
3336 #define ADV_16BALIGN(addr) (((ulong) (addr) + 0xF) & ~0xF)
3337 #define ADV_32BALIGN(addr) (((ulong) (addr) + 0x1F) & ~0x1F)
3340 * Total contiguous memory needed for driver SG blocks.
3342 * ADV_MAX_SG_LIST must be defined by a driver. It is the maximum
3343 * number of scatter-gather elements the driver supports in a
3347 #define ADV_SG_LIST_MAX_BYTE_SIZE \
3348 (sizeof(ADV_SG_BLOCK) * \
3349 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK))
3352 * Inquiry data structure and bitfield macros
3354 * Using bitfields to access the subchar data isn't portable across
3355 * endianness, so instead mask and shift. Only quantities of more
3356 * than 1 bit are shifted, since the others are just tested for true
3360 #define ADV_INQ_DVC_TYPE(inq) ((inq)->periph & 0x1f)
3361 #define ADV_INQ_QUALIFIER(inq) (((inq)->periph & 0xe0) >> 5)
3362 #define ADV_INQ_DVC_TYPE_MOD(inq) ((inq)->devtype & 0x7f)
3363 #define ADV_INQ_REMOVABLE(inq) ((inq)->devtype & 0x80)
3364 #define ADV_INQ_ANSI_VER(inq) ((inq)->ver & 0x07)
3365 #define ADV_INQ_ECMA_VER(inq) (((inq)->ver & 0x38) >> 3)
3366 #define ADV_INQ_ISO_VER(inq) (((inq)->ver & 0xc0) >> 6)
3367 #define ADV_INQ_RESPONSE_FMT(inq) ((inq)->byte3 & 0x0f)
3368 #define ADV_INQ_TERM_IO(inq) ((inq)->byte3 & 0x40)
3369 #define ADV_INQ_ASYNC_NOTIF(inq) ((inq)->byte3 & 0x80)
3370 #define ADV_INQ_SOFT_RESET(inq) ((inq)->flags & 0x01)
3371 #define ADV_INQ_CMD_QUEUE(inq) ((inq)->flags & 0x02)
3372 #define ADV_INQ_LINK_CMD(inq) ((inq)->flags & 0x08)
3373 #define ADV_INQ_SYNC(inq) ((inq)->flags & 0x10)
3374 #define ADV_INQ_WIDE16(inq) ((inq)->flags & 0x20)
3375 #define ADV_INQ_WIDE32(inq) ((inq)->flags & 0x40)
3376 #define ADV_INQ_REL_ADDR(inq) ((inq)->flags & 0x80)
3377 #define ADV_INQ_INFO_UNIT(inq) ((inq)->info & 0x01)
3378 #define ADV_INQ_QUICK_ARB(inq) ((inq)->info & 0x02)
3379 #define ADV_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2)
3382 uchar periph
; /* peripheral device type [0:4] */
3383 /* peripheral qualifier [5:7] */
3384 uchar devtype
; /* device type modifier (for SCSI I) [0:6] */
3385 /* RMB - removable medium bit [7] */
3386 uchar ver
; /* ANSI approved version [0:2] */
3387 /* ECMA version [3:5] */
3388 /* ISO version [6:7] */
3389 uchar byte3
; /* response data format [0:3] */
3394 /* reserved [4:5] */
3395 /* terminate I/O process bit (see 5.6.22) [6] */
3396 /* asynch. event notification (processor) [7] */
3397 uchar add_len
; /* additional length */
3398 uchar res1
; /* reserved */
3399 uchar res2
; /* reserved */
3400 uchar flags
; /* soft reset implemented [0] */
3401 /* command queuing [1] */
3403 /* linked command for this logical unit [3] */
3404 /* synchronous data transfer [4] */
3405 /* wide bus 16 bit data transfer [5] */
3406 /* wide bus 32 bit data transfer [6] */
3407 /* relative addressing mode [7] */
3408 uchar vendor_id
[8]; /* vendor identification */
3409 uchar product_id
[16]; /* product identification */
3410 uchar product_rev_level
[4]; /* product revision level */
3411 uchar vendor_specific
[20]; /* vendor specific */
3412 uchar info
; /* information unit supported [0] */
3413 /* quick arbitrate supported [1] */
3414 /* clocking field [2:3] */
3415 /* reserved [4:7] */
3416 uchar res3
; /* reserved */
3417 } ADV_SCSI_INQUIRY
; /* 58 bytes */
3420 * --- Driver Constants and Macros
3423 #define ASC_NUM_BOARD_SUPPORTED 16
3424 #define ASC_NUM_IOPORT_PROBE 4
3425 #define ASC_NUM_BUS 4
3427 /* Reference Scsi_Host hostdata */
3428 #define ASC_BOARDP(host) ((asc_board_t *) &((host)->hostdata))
3430 /* asc_board_t flags */
3431 #define ASC_HOST_IN_RESET 0x01
3432 #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */
3433 #define ASC_SELECT_QUEUE_DEPTHS 0x08
3435 #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0)
3436 #define ASC_WIDE_BOARD(boardp) ((boardp)->flags & ASC_IS_WIDE_BOARD)
3438 #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */
3440 #define ASC_INFO_SIZE 128 /* advansys_info() line size */
3442 #ifdef CONFIG_PROC_FS
3443 /* /proc/scsi/advansys/[0...] related definitions */
3444 #define ASC_PRTBUF_SIZE 2048
3445 #define ASC_PRTLINE_SIZE 160
3447 #define ASC_PRT_NEXT() \
3451 if (leftlen == 0) { \
3456 #endif /* CONFIG_PROC_FS */
3458 /* Asc Library return codes */
3461 #define ASC_NOERROR 1
3463 #define ASC_ERROR (-1)
3465 /* struct scsi_cmnd function return codes */
3466 #define STATUS_BYTE(byte) (byte)
3467 #define MSG_BYTE(byte) ((byte) << 8)
3468 #define HOST_BYTE(byte) ((byte) << 16)
3469 #define DRIVER_BYTE(byte) ((byte) << 24)
3472 * The following definitions and macros are OS independent interfaces to
3473 * the queue functions:
3474 * REQ - SCSI request structure
3475 * REQP - pointer to SCSI request structure
3476 * REQPTID(reqp) - reqp's target id
3477 * REQPNEXT(reqp) - reqp's next pointer
3478 * REQPNEXTP(reqp) - pointer to reqp's next pointer
3479 * REQPTIME(reqp) - reqp's time stamp value
3480 * REQTIMESTAMP() - system time stamp value
3482 typedef struct scsi_cmnd REQ
, *REQP
;
3483 #define REQPNEXT(reqp) ((REQP) ((reqp)->host_scribble))
3484 #define REQPNEXTP(reqp) ((REQP *) &((reqp)->host_scribble))
3485 #define REQPTID(reqp) ((reqp)->device->id)
3486 #define REQPTIME(reqp) ((reqp)->SCp.this_residual)
3487 #define REQTIMESTAMP() (jiffies)
3489 #define REQTIMESTAT(function, ascq, reqp, tid) \
3492 * If the request time stamp is less than the system time stamp, then \
3493 * maybe the system time stamp wrapped. Set the request time to zero.\
3495 if (REQPTIME(reqp) <= REQTIMESTAMP()) { \
3496 REQPTIME(reqp) = REQTIMESTAMP() - REQPTIME(reqp); \
3498 /* Indicate an error occurred with the assertion. */ \
3499 ASC_ASSERT(REQPTIME(reqp) <= REQTIMESTAMP()); \
3500 REQPTIME(reqp) = 0; \
3502 /* Handle first minimum time case without external initialization. */ \
3503 if (((ascq)->q_tot_cnt[tid] == 1) || \
3504 (REQPTIME(reqp) < (ascq)->q_min_tim[tid])) { \
3505 (ascq)->q_min_tim[tid] = REQPTIME(reqp); \
3506 ASC_DBG3(1, "%s: new q_min_tim[%d] %u\n", \
3507 (function), (tid), (ascq)->q_min_tim[tid]); \
3509 if (REQPTIME(reqp) > (ascq)->q_max_tim[tid]) { \
3510 (ascq)->q_max_tim[tid] = REQPTIME(reqp); \
3511 ASC_DBG3(1, "%s: new q_max_tim[%d] %u\n", \
3512 (function), tid, (ascq)->q_max_tim[tid]); \
3514 (ascq)->q_tot_tim[tid] += REQPTIME(reqp); \
3515 /* Reset the time stamp field. */ \
3516 REQPTIME(reqp) = 0; \
3519 /* asc_enqueue() flags */
3523 /* asc_dequeue_list() argument */
3524 #define ASC_TID_ALL (-1)
3526 /* Return non-zero, if the queue is empty. */
3527 #define ASC_QUEUE_EMPTY(ascq) ((ascq)->q_tidmask == 0)
3529 #define PCI_MAX_SLOT 0x1F
3530 #define PCI_MAX_BUS 0xFF
3531 #define PCI_IOADDRESS_MASK 0xFFFE
3532 #define ASC_PCI_DEVICE_ID_CNT 6 /* PCI Device ID count. */
3534 #ifndef ADVANSYS_STATS
3535 #define ASC_STATS(shost, counter)
3536 #define ASC_STATS_ADD(shost, counter, count)
3537 #else /* ADVANSYS_STATS */
3538 #define ASC_STATS(shost, counter) \
3539 (ASC_BOARDP(shost)->asc_stats.counter++)
3541 #define ASC_STATS_ADD(shost, counter, count) \
3542 (ASC_BOARDP(shost)->asc_stats.counter += (count))
3543 #endif /* ADVANSYS_STATS */
3545 #define ASC_CEILING(val, unit) (((val) + ((unit) - 1))/(unit))
3547 /* If the result wraps when calculating tenths, return 0. */
3548 #define ASC_TENTHS(num, den) \
3549 (((10 * ((num)/(den))) > (((num) * 10)/(den))) ? \
3550 0 : ((((num) * 10)/(den)) - (10 * ((num)/(den)))))
3553 * Display a message to the console.
3555 #define ASC_PRINT(s) \
3557 printk("advansys: "); \
3561 #define ASC_PRINT1(s, a1) \
3563 printk("advansys: "); \
3564 printk((s), (a1)); \
3567 #define ASC_PRINT2(s, a1, a2) \
3569 printk("advansys: "); \
3570 printk((s), (a1), (a2)); \
3573 #define ASC_PRINT3(s, a1, a2, a3) \
3575 printk("advansys: "); \
3576 printk((s), (a1), (a2), (a3)); \
3579 #define ASC_PRINT4(s, a1, a2, a3, a4) \
3581 printk("advansys: "); \
3582 printk((s), (a1), (a2), (a3), (a4)); \
3585 #ifndef ADVANSYS_DEBUG
3587 #define ASC_DBG(lvl, s)
3588 #define ASC_DBG1(lvl, s, a1)
3589 #define ASC_DBG2(lvl, s, a1, a2)
3590 #define ASC_DBG3(lvl, s, a1, a2, a3)
3591 #define ASC_DBG4(lvl, s, a1, a2, a3, a4)
3592 #define ASC_DBG_PRT_SCSI_HOST(lvl, s)
3593 #define ASC_DBG_PRT_SCSI_CMND(lvl, s)
3594 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp)
3595 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
3596 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone)
3597 #define ADV_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
3598 #define ASC_DBG_PRT_HEX(lvl, name, start, length)
3599 #define ASC_DBG_PRT_CDB(lvl, cdb, len)
3600 #define ASC_DBG_PRT_SENSE(lvl, sense, len)
3601 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len)
3603 #else /* ADVANSYS_DEBUG */
3606 * Debugging Message Levels:
3608 * 1: High-Level Tracing
3609 * 2-N: Verbose Tracing
3612 #define ASC_DBG(lvl, s) \
3614 if (asc_dbglvl >= (lvl)) { \
3619 #define ASC_DBG1(lvl, s, a1) \
3621 if (asc_dbglvl >= (lvl)) { \
3622 printk((s), (a1)); \
3626 #define ASC_DBG2(lvl, s, a1, a2) \
3628 if (asc_dbglvl >= (lvl)) { \
3629 printk((s), (a1), (a2)); \
3633 #define ASC_DBG3(lvl, s, a1, a2, a3) \
3635 if (asc_dbglvl >= (lvl)) { \
3636 printk((s), (a1), (a2), (a3)); \
3640 #define ASC_DBG4(lvl, s, a1, a2, a3, a4) \
3642 if (asc_dbglvl >= (lvl)) { \
3643 printk((s), (a1), (a2), (a3), (a4)); \
3647 #define ASC_DBG_PRT_SCSI_HOST(lvl, s) \
3649 if (asc_dbglvl >= (lvl)) { \
3650 asc_prt_scsi_host(s); \
3654 #define ASC_DBG_PRT_SCSI_CMND(lvl, s) \
3656 if (asc_dbglvl >= (lvl)) { \
3657 asc_prt_scsi_cmnd(s); \
3661 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) \
3663 if (asc_dbglvl >= (lvl)) { \
3664 asc_prt_asc_scsi_q(scsiqp); \
3668 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone) \
3670 if (asc_dbglvl >= (lvl)) { \
3671 asc_prt_asc_qdone_info(qdone); \
3675 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp) \
3677 if (asc_dbglvl >= (lvl)) { \
3678 asc_prt_adv_scsi_req_q(scsiqp); \
3682 #define ASC_DBG_PRT_HEX(lvl, name, start, length) \
3684 if (asc_dbglvl >= (lvl)) { \
3685 asc_prt_hex((name), (start), (length)); \
3689 #define ASC_DBG_PRT_CDB(lvl, cdb, len) \
3690 ASC_DBG_PRT_HEX((lvl), "CDB", (uchar *) (cdb), (len));
3692 #define ASC_DBG_PRT_SENSE(lvl, sense, len) \
3693 ASC_DBG_PRT_HEX((lvl), "SENSE", (uchar *) (sense), (len));
3695 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len) \
3696 ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len));
3697 #endif /* ADVANSYS_DEBUG */
3699 #ifndef ADVANSYS_ASSERT
3700 #define ASC_ASSERT(a)
3701 #else /* ADVANSYS_ASSERT */
3703 #define ASC_ASSERT(a) \
3706 printk("ASC_ASSERT() Failure: file %s, line %d\n", \
3707 __FILE__, __LINE__); \
3711 #endif /* ADVANSYS_ASSERT */
3714 * --- Driver Structures
3717 #ifdef ADVANSYS_STATS
3719 /* Per board statistics structure */
3721 /* Driver Entrypoint Statistics */
3722 ADV_DCNT queuecommand
; /* # calls to advansys_queuecommand() */
3723 ADV_DCNT reset
; /* # calls to advansys_eh_bus_reset() */
3724 ADV_DCNT biosparam
; /* # calls to advansys_biosparam() */
3725 ADV_DCNT interrupt
; /* # advansys_interrupt() calls */
3726 ADV_DCNT callback
; /* # calls to asc/adv_isr_callback() */
3727 ADV_DCNT done
; /* # calls to request's scsi_done function */
3728 ADV_DCNT build_error
; /* # asc/adv_build_req() ASC_ERROR returns. */
3729 ADV_DCNT adv_build_noreq
; /* # adv_build_req() adv_req_t alloc. fail. */
3730 ADV_DCNT adv_build_nosg
; /* # adv_build_req() adv_sgblk_t alloc. fail. */
3731 /* AscExeScsiQueue()/AdvExeScsiQueue() Statistics */
3732 ADV_DCNT exe_noerror
; /* # ASC_NOERROR returns. */
3733 ADV_DCNT exe_busy
; /* # ASC_BUSY returns. */
3734 ADV_DCNT exe_error
; /* # ASC_ERROR returns. */
3735 ADV_DCNT exe_unknown
; /* # unknown returns. */
3736 /* Data Transfer Statistics */
3737 ADV_DCNT cont_cnt
; /* # non-scatter-gather I/O requests received */
3738 ADV_DCNT cont_xfer
; /* # contiguous transfer 512-bytes */
3739 ADV_DCNT sg_cnt
; /* # scatter-gather I/O requests received */
3740 ADV_DCNT sg_elem
; /* # scatter-gather elements */
3741 ADV_DCNT sg_xfer
; /* # scatter-gather transfer 512-bytes */
3743 #endif /* ADVANSYS_STATS */
3746 * Request queuing structure
3748 typedef struct asc_queue
{
3749 ADV_SCSI_BIT_ID_TYPE q_tidmask
; /* queue mask */
3750 REQP q_first
[ADV_MAX_TID
+ 1]; /* first queued request */
3751 REQP q_last
[ADV_MAX_TID
+ 1]; /* last queued request */
3752 #ifdef ADVANSYS_STATS
3753 short q_cur_cnt
[ADV_MAX_TID
+ 1]; /* current queue count */
3754 short q_max_cnt
[ADV_MAX_TID
+ 1]; /* maximum queue count */
3755 ADV_DCNT q_tot_cnt
[ADV_MAX_TID
+ 1]; /* total enqueue count */
3756 ADV_DCNT q_tot_tim
[ADV_MAX_TID
+ 1]; /* total time queued */
3757 ushort q_max_tim
[ADV_MAX_TID
+ 1]; /* maximum time queued */
3758 ushort q_min_tim
[ADV_MAX_TID
+ 1]; /* minimum time queued */
3759 #endif /* ADVANSYS_STATS */
3763 * Adv Library Request Structures
3765 * The following two structures are used to process Wide Board requests.
3767 * The ADV_SCSI_REQ_Q structure in adv_req_t is passed to the Adv Library
3768 * and microcode with the ADV_SCSI_REQ_Q field 'srb_ptr' pointing to the
3769 * adv_req_t. The adv_req_t structure 'cmndp' field in turn points to the
3770 * Mid-Level SCSI request structure.
3772 * Zero or more ADV_SG_BLOCK are used with each ADV_SCSI_REQ_Q. Each
3773 * ADV_SG_BLOCK structure holds 15 scatter-gather elements. Under Linux
3774 * up to 255 scatter-gather elements may be used per request or
3777 * Both structures must be 32 byte aligned.
3779 typedef struct adv_sgblk
{
3780 ADV_SG_BLOCK sg_block
; /* Sgblock structure. */
3781 uchar align
[32]; /* Sgblock structure padding. */
3782 struct adv_sgblk
*next_sgblkp
; /* Next scatter-gather structure. */
3785 typedef struct adv_req
{
3786 ADV_SCSI_REQ_Q scsi_req_q
; /* Adv Library request structure. */
3787 uchar align
[32]; /* Request structure padding. */
3788 struct scsi_cmnd
*cmndp
; /* Mid-Level SCSI command pointer. */
3789 adv_sgblk_t
*sgblkp
; /* Adv Library scatter-gather pointer. */
3790 struct adv_req
*next_reqp
; /* Next Request Structure. */
3794 * Structure allocated for each board.
3796 * This structure is allocated by scsi_register() at the end
3797 * of the 'Scsi_Host' structure starting at the 'hostdata'
3798 * field. It is guaranteed to be allocated from DMA-able memory.
3800 typedef struct asc_board
{
3801 int id
; /* Board Id */
3802 uint flags
; /* Board flags */
3804 ASC_DVC_VAR asc_dvc_var
; /* Narrow board */
3805 ADV_DVC_VAR adv_dvc_var
; /* Wide board */
3808 ASC_DVC_CFG asc_dvc_cfg
; /* Narrow board */
3809 ADV_DVC_CFG adv_dvc_cfg
; /* Wide board */
3811 ushort asc_n_io_port
; /* Number I/O ports. */
3812 asc_queue_t active
; /* Active command queue */
3813 asc_queue_t waiting
; /* Waiting command queue */
3814 asc_queue_t done
; /* Done command queue */
3815 ADV_SCSI_BIT_ID_TYPE init_tidmask
; /* Target init./valid mask */
3816 struct scsi_device
*device
[ADV_MAX_TID
+ 1]; /* Mid-Level Scsi Device */
3817 ushort reqcnt
[ADV_MAX_TID
+ 1]; /* Starvation request count */
3818 ADV_SCSI_BIT_ID_TYPE queue_full
; /* Queue full mask */
3819 ushort queue_full_cnt
[ADV_MAX_TID
+ 1]; /* Queue full count */
3821 ASCEEP_CONFIG asc_eep
; /* Narrow EEPROM config. */
3822 ADVEEP_3550_CONFIG adv_3550_eep
; /* 3550 EEPROM config. */
3823 ADVEEP_38C0800_CONFIG adv_38C0800_eep
; /* 38C0800 EEPROM config. */
3824 ADVEEP_38C1600_CONFIG adv_38C1600_eep
; /* 38C1600 EEPROM config. */
3826 ulong last_reset
; /* Saved last reset time */
3827 spinlock_t lock
; /* Board spinlock */
3828 #ifdef CONFIG_PROC_FS
3829 /* /proc/scsi/advansys/[0...] */
3830 char *prtbuf
; /* /proc print buffer */
3831 #endif /* CONFIG_PROC_FS */
3832 #ifdef ADVANSYS_STATS
3833 struct asc_stats asc_stats
; /* Board statistics */
3834 #endif /* ADVANSYS_STATS */
3836 * The following fields are used only for Narrow Boards.
3838 /* The following three structures must be in DMA-able memory. */
3839 ASC_SCSI_REQ_Q scsireqq
;
3840 ASC_CAP_INFO cap_info
;
3841 ASC_SCSI_INQUIRY inquiry
;
3842 uchar sdtr_data
[ASC_MAX_TID
+ 1]; /* SDTR information */
3844 * The following fields are used only for Wide Boards.
3846 void __iomem
*ioremap_addr
; /* I/O Memory remap address. */
3847 ushort ioport
; /* I/O Port address. */
3848 ADV_CARR_T
*orig_carrp
; /* ADV_CARR_T memory block. */
3849 adv_req_t
*orig_reqp
; /* adv_req_t memory block. */
3850 adv_req_t
*adv_reqp
; /* Request structures. */
3851 adv_sgblk_t
*adv_sgblkp
; /* Scatter-gather structures. */
3852 ushort bios_signature
; /* BIOS Signature. */
3853 ushort bios_version
; /* BIOS Version. */
3854 ushort bios_codeseg
; /* BIOS Code Segment. */
3855 ushort bios_codelen
; /* BIOS Code Segment Length. */
3859 * PCI configuration structures
3861 typedef struct _PCI_DATA_
{
3869 typedef struct _PCI_DEVICE_
{
3883 typedef struct _PCI_CONFIG_SPACE_
{
3894 ADV_PADDR baseAddress
[6];
3896 ADV_PADDR optionRomAddr
;
3897 ushort reserved2
[4];
3908 /* Note: All driver global data should be initialized. */
3910 /* Number of boards detected in system. */
3911 static int asc_board_count
= 0;
3912 static struct Scsi_Host
*asc_host
[ASC_NUM_BOARD_SUPPORTED
] = { NULL
};
3914 /* Overrun buffer used by all narrow boards. */
3915 static uchar overrun_buf
[ASC_OVERRUN_BSIZE
] = { 0 };
3918 * Global structures required to issue a command.
3920 static ASC_SCSI_Q asc_scsi_q
= { {0} };
3921 static ASC_SG_HEAD asc_sg_head
= { 0 };
3923 /* List of supported bus types. */
3924 static ushort asc_bus
[ASC_NUM_BUS
] __initdata
= {
3931 static int asc_iopflag
= ASC_FALSE
;
3932 static int asc_ioport
[ASC_NUM_IOPORT_PROBE
] = { 0, 0, 0, 0 };
3934 #ifdef ADVANSYS_DEBUG
3935 static char *asc_bus_name
[ASC_NUM_BUS
] = {
3942 static int asc_dbglvl
= 3;
3943 #endif /* ADVANSYS_DEBUG */
3945 /* Declaration for Asc Library internal data referenced by driver. */
3946 static PortAddr _asc_def_iop_base
[];
3949 * --- Driver Function Prototypes
3951 * advansys.h contains function prototypes for functions global to Linux.
3954 static int advansys_slave_configure(struct scsi_device
*);
3955 static void asc_scsi_done_list(struct scsi_cmnd
*);
3956 static int asc_execute_scsi_cmnd(struct scsi_cmnd
*);
3957 static int asc_build_req(asc_board_t
*, struct scsi_cmnd
*);
3958 static int adv_build_req(asc_board_t
*, struct scsi_cmnd
*, ADV_SCSI_REQ_Q
**);
3959 static int adv_get_sglist(asc_board_t
*, adv_req_t
*, struct scsi_cmnd
*, int);
3960 static void asc_isr_callback(ASC_DVC_VAR
*, ASC_QDONE_INFO
*);
3961 static void adv_isr_callback(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*);
3962 static void adv_async_callback(ADV_DVC_VAR
*, uchar
);
3963 static void asc_enqueue(asc_queue_t
*, REQP
, int);
3964 static REQP
asc_dequeue(asc_queue_t
*, int);
3965 static REQP
asc_dequeue_list(asc_queue_t
*, REQP
*, int);
3966 static int asc_rmqueue(asc_queue_t
*, REQP
);
3967 static void asc_execute_queue(asc_queue_t
*);
3968 #ifdef CONFIG_PROC_FS
3969 static int asc_proc_copy(off_t
, off_t
, char *, int, char *, int);
3970 static int asc_prt_board_devices(struct Scsi_Host
*, char *, int);
3971 static int asc_prt_adv_bios(struct Scsi_Host
*, char *, int);
3972 static int asc_get_eeprom_string(ushort
*serialnum
, uchar
*cp
);
3973 static int asc_prt_asc_board_eeprom(struct Scsi_Host
*, char *, int);
3974 static int asc_prt_adv_board_eeprom(struct Scsi_Host
*, char *, int);
3975 static int asc_prt_driver_conf(struct Scsi_Host
*, char *, int);
3976 static int asc_prt_asc_board_info(struct Scsi_Host
*, char *, int);
3977 static int asc_prt_adv_board_info(struct Scsi_Host
*, char *, int);
3978 static int asc_prt_line(char *, int, char *fmt
, ...);
3979 #endif /* CONFIG_PROC_FS */
3981 /* Declaration for Asc Library internal functions referenced by driver. */
3982 static int AscFindSignature(PortAddr
);
3983 static ushort
AscGetEEPConfig(PortAddr
, ASCEEP_CONFIG
*, ushort
);
3985 /* Statistics function prototypes. */
3986 #ifdef ADVANSYS_STATS
3987 #ifdef CONFIG_PROC_FS
3988 static int asc_prt_board_stats(struct Scsi_Host
*, char *, int);
3989 static int asc_prt_target_stats(struct Scsi_Host
*, int, char *, int);
3990 #endif /* CONFIG_PROC_FS */
3991 #endif /* ADVANSYS_STATS */
3993 /* Debug function prototypes. */
3994 #ifdef ADVANSYS_DEBUG
3995 static void asc_prt_scsi_host(struct Scsi_Host
*);
3996 static void asc_prt_scsi_cmnd(struct scsi_cmnd
*);
3997 static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG
*);
3998 static void asc_prt_asc_dvc_var(ASC_DVC_VAR
*);
3999 static void asc_prt_asc_scsi_q(ASC_SCSI_Q
*);
4000 static void asc_prt_asc_qdone_info(ASC_QDONE_INFO
*);
4001 static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG
*);
4002 static void asc_prt_adv_dvc_var(ADV_DVC_VAR
*);
4003 static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q
*);
4004 static void asc_prt_adv_sgblock(int, ADV_SG_BLOCK
*);
4005 static void asc_prt_hex(char *f
, uchar
*, int);
4006 #endif /* ADVANSYS_DEBUG */
4008 #ifdef CONFIG_PROC_FS
4010 * advansys_proc_info() - /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)]
4012 * *buffer: I/O buffer
4013 * **start: if inout == FALSE pointer into buffer where user read should start
4014 * offset: current offset into a /proc/scsi/advansys/[0...] file
4015 * length: length of buffer
4016 * hostno: Scsi_Host host_no
4017 * inout: TRUE - user is writing; FALSE - user is reading
4019 * Return the number of bytes read from or written to a
4020 * /proc/scsi/advansys/[0...] file.
4022 * Note: This function uses the per board buffer 'prtbuf' which is
4023 * allocated when the board is initialized in advansys_detect(). The
4024 * buffer is ASC_PRTBUF_SIZE bytes. The function asc_proc_copy() is
4025 * used to write to the buffer. The way asc_proc_copy() is written
4026 * if 'prtbuf' is too small it will not be overwritten. Instead the
4027 * user just won't get all the available statistics.
4030 advansys_proc_info(struct Scsi_Host
*shost
, char *buffer
, char **start
,
4031 off_t offset
, int length
, int inout
)
4033 asc_board_t
*boardp
;
4041 #ifdef ADVANSYS_STATS
4043 #endif /* ADVANSYS_STATS */
4045 ASC_DBG(1, "advansys_proc_info: begin\n");
4048 * User write not supported.
4050 if (inout
== TRUE
) {
4055 * User read of /proc/scsi/advansys/[0...] file.
4058 boardp
= ASC_BOARDP(shost
);
4060 /* Copy read data starting at the beginning of the buffer. */
4068 * Get board configuration information.
4070 * advansys_info() returns the board string from its own static buffer.
4072 cp
= (char *)advansys_info(shost
);
4075 /* Copy board information. */
4076 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4080 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4087 * Display Wide Board BIOS Information.
4089 if (ASC_WIDE_BOARD(boardp
)) {
4090 cp
= boardp
->prtbuf
;
4091 cplen
= asc_prt_adv_bios(shost
, cp
, ASC_PRTBUF_SIZE
);
4092 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4094 asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
,
4099 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4107 * Display driver information for each device attached to the board.
4109 cp
= boardp
->prtbuf
;
4110 cplen
= asc_prt_board_devices(shost
, cp
, ASC_PRTBUF_SIZE
);
4111 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4112 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4116 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4123 * Display EEPROM configuration for the board.
4125 cp
= boardp
->prtbuf
;
4126 if (ASC_NARROW_BOARD(boardp
)) {
4127 cplen
= asc_prt_asc_board_eeprom(shost
, cp
, ASC_PRTBUF_SIZE
);
4129 cplen
= asc_prt_adv_board_eeprom(shost
, cp
, ASC_PRTBUF_SIZE
);
4131 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4132 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4136 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4143 * Display driver configuration and information for the board.
4145 cp
= boardp
->prtbuf
;
4146 cplen
= asc_prt_driver_conf(shost
, cp
, ASC_PRTBUF_SIZE
);
4147 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4148 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4152 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4158 #ifdef ADVANSYS_STATS
4160 * Display driver statistics for the board.
4162 cp
= boardp
->prtbuf
;
4163 cplen
= asc_prt_board_stats(shost
, cp
, ASC_PRTBUF_SIZE
);
4164 ASC_ASSERT(cplen
<= ASC_PRTBUF_SIZE
);
4165 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4169 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4176 * Display driver statistics for each target.
4178 for (tgt_id
= 0; tgt_id
<= ADV_MAX_TID
; tgt_id
++) {
4179 cp
= boardp
->prtbuf
;
4180 cplen
= asc_prt_target_stats(shost
, tgt_id
, cp
,
4182 ASC_ASSERT(cplen
<= ASC_PRTBUF_SIZE
);
4184 asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
,
4189 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4195 #endif /* ADVANSYS_STATS */
4198 * Display Asc Library dynamic configuration information
4201 cp
= boardp
->prtbuf
;
4202 if (ASC_NARROW_BOARD(boardp
)) {
4203 cplen
= asc_prt_asc_board_info(shost
, cp
, ASC_PRTBUF_SIZE
);
4205 cplen
= asc_prt_adv_board_info(shost
, cp
, ASC_PRTBUF_SIZE
);
4207 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4208 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4212 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4218 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4222 #endif /* CONFIG_PROC_FS */
4227 * Return suitable for printing on the console with the argument
4228 * adapter's configuration information.
4230 * Note: The information line should not exceed ASC_INFO_SIZE bytes,
4231 * otherwise the static 'info' array will be overrun.
4233 static const char *advansys_info(struct Scsi_Host
*shost
)
4235 static char info
[ASC_INFO_SIZE
];
4236 asc_board_t
*boardp
;
4237 ASC_DVC_VAR
*asc_dvc_varp
;
4238 ADV_DVC_VAR
*adv_dvc_varp
;
4241 char *widename
= NULL
;
4243 boardp
= ASC_BOARDP(shost
);
4244 if (ASC_NARROW_BOARD(boardp
)) {
4245 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
4246 ASC_DBG(1, "advansys_info: begin\n");
4247 if (asc_dvc_varp
->bus_type
& ASC_IS_ISA
) {
4248 if ((asc_dvc_varp
->bus_type
& ASC_IS_ISAPNP
) ==
4250 busname
= "ISA PnP";
4254 /* Don't reference 'shost->n_io_port'; It may be truncated. */
4256 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X",
4257 ASC_VERSION
, busname
,
4258 (ulong
)shost
->io_port
,
4259 (ulong
)shost
->io_port
+ boardp
->asc_n_io_port
-
4260 1, shost
->irq
, shost
->dma_channel
);
4262 if (asc_dvc_varp
->bus_type
& ASC_IS_VL
) {
4264 } else if (asc_dvc_varp
->bus_type
& ASC_IS_EISA
) {
4266 } else if (asc_dvc_varp
->bus_type
& ASC_IS_PCI
) {
4267 if ((asc_dvc_varp
->bus_type
& ASC_IS_PCI_ULTRA
)
4268 == ASC_IS_PCI_ULTRA
) {
4269 busname
= "PCI Ultra";
4276 ("advansys_info: board %d: unknown bus type %d\n",
4277 boardp
->id
, asc_dvc_varp
->bus_type
);
4279 /* Don't reference 'shost->n_io_port'; It may be truncated. */
4281 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X",
4282 ASC_VERSION
, busname
,
4283 (ulong
)shost
->io_port
,
4284 (ulong
)shost
->io_port
+ boardp
->asc_n_io_port
-
4289 * Wide Adapter Information
4291 * Memory-mapped I/O is used instead of I/O space to access
4292 * the adapter, but display the I/O Port range. The Memory
4293 * I/O address is displayed through the driver /proc file.
4295 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
4296 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
4297 iolen
= ADV_3550_IOLEN
;
4298 widename
= "Ultra-Wide";
4299 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
4300 iolen
= ADV_38C0800_IOLEN
;
4301 widename
= "Ultra2-Wide";
4303 iolen
= ADV_38C1600_IOLEN
;
4304 widename
= "Ultra3-Wide";
4307 "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X",
4308 ASC_VERSION
, widename
, (ulong
)adv_dvc_varp
->iop_base
,
4309 (ulong
)adv_dvc_varp
->iop_base
+ iolen
- 1, shost
->irq
);
4311 ASC_ASSERT(strlen(info
) < ASC_INFO_SIZE
);
4312 ASC_DBG(1, "advansys_info: end\n");
4317 * advansys_queuecommand() - interrupt-driven I/O entrypoint.
4319 * This function always returns 0. Command return status is saved
4320 * in the 'scp' result field.
4323 advansys_queuecommand(struct scsi_cmnd
*scp
, void (*done
) (struct scsi_cmnd
*))
4325 struct Scsi_Host
*shost
;
4326 asc_board_t
*boardp
;
4328 struct scsi_cmnd
*done_scp
;
4330 shost
= scp
->device
->host
;
4331 boardp
= ASC_BOARDP(shost
);
4332 ASC_STATS(shost
, queuecommand
);
4334 /* host_lock taken by mid-level prior to call but need to protect */
4335 /* against own ISR */
4336 spin_lock_irqsave(&boardp
->lock
, flags
);
4339 * Block new commands while handling a reset or abort request.
4341 if (boardp
->flags
& ASC_HOST_IN_RESET
) {
4343 "advansys_queuecommand: scp 0x%lx blocked for reset request\n",
4345 scp
->result
= HOST_BYTE(DID_RESET
);
4348 * Add blocked requests to the board's 'done' queue. The queued
4349 * requests will be completed at the end of the abort or reset
4352 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4353 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4358 * Attempt to execute any waiting commands for the board.
4360 if (!ASC_QUEUE_EMPTY(&boardp
->waiting
)) {
4362 "advansys_queuecommand: before asc_execute_queue() waiting\n");
4363 asc_execute_queue(&boardp
->waiting
);
4367 * Save the function pointer to Linux mid-level 'done' function
4368 * and attempt to execute the command.
4370 * If ASC_NOERROR is returned the request has been added to the
4371 * board's 'active' queue and will be completed by the interrupt
4374 * If ASC_BUSY is returned add the request to the board's per
4375 * target waiting list. This is the first time the request has
4376 * been tried. Add it to the back of the waiting list. It will be
4379 * If an error occurred, the request will have been placed on the
4380 * board's 'done' queue and must be completed before returning.
4382 scp
->scsi_done
= done
;
4383 switch (asc_execute_scsi_cmnd(scp
)) {
4387 asc_enqueue(&boardp
->waiting
, scp
, ASC_BACK
);
4391 done_scp
= asc_dequeue_list(&boardp
->done
, NULL
, ASC_TID_ALL
);
4392 /* Interrupts could be enabled here. */
4393 asc_scsi_done_list(done_scp
);
4396 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4404 * Reset the bus associated with the command 'scp'.
4406 * This function runs its own thread. Interrupts must be blocked but
4407 * sleeping is allowed and no locking other than for host structures is
4408 * required. Returns SUCCESS or FAILED.
4410 static int advansys_reset(struct scsi_cmnd
*scp
)
4412 struct Scsi_Host
*shost
;
4413 asc_board_t
*boardp
;
4414 ASC_DVC_VAR
*asc_dvc_varp
;
4415 ADV_DVC_VAR
*adv_dvc_varp
;
4417 struct scsi_cmnd
*done_scp
= NULL
, *last_scp
= NULL
;
4418 struct scsi_cmnd
*tscp
, *new_last_scp
;
4422 ASC_DBG1(1, "advansys_reset: 0x%lx\n", (ulong
)scp
);
4424 #ifdef ADVANSYS_STATS
4425 if (scp
->device
->host
!= NULL
) {
4426 ASC_STATS(scp
->device
->host
, reset
);
4428 #endif /* ADVANSYS_STATS */
4430 if ((shost
= scp
->device
->host
) == NULL
) {
4431 scp
->result
= HOST_BYTE(DID_ERROR
);
4435 boardp
= ASC_BOARDP(shost
);
4437 ASC_PRINT1("advansys_reset: board %d: SCSI bus reset started...\n",
4440 * Check for re-entrancy.
4442 spin_lock_irqsave(&boardp
->lock
, flags
);
4443 if (boardp
->flags
& ASC_HOST_IN_RESET
) {
4444 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4447 boardp
->flags
|= ASC_HOST_IN_RESET
;
4448 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4450 if (ASC_NARROW_BOARD(boardp
)) {
4454 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
4457 * Reset the chip and SCSI bus.
4459 ASC_DBG(1, "advansys_reset: before AscInitAsc1000Driver()\n");
4460 status
= AscInitAsc1000Driver(asc_dvc_varp
);
4462 /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */
4463 if (asc_dvc_varp
->err_code
) {
4465 ("advansys_reset: board %d: SCSI bus reset error: 0x%x\n",
4466 boardp
->id
, asc_dvc_varp
->err_code
);
4468 } else if (status
) {
4470 ("advansys_reset: board %d: SCSI bus reset warning: 0x%x\n",
4471 boardp
->id
, status
);
4474 ("advansys_reset: board %d: SCSI bus reset successful.\n",
4478 ASC_DBG(1, "advansys_reset: after AscInitAsc1000Driver()\n");
4479 spin_lock_irqsave(&boardp
->lock
, flags
);
4485 * If the suggest reset bus flags are set, then reset the bus.
4486 * Otherwise only reset the device.
4488 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
4491 * Reset the target's SCSI bus.
4493 ASC_DBG(1, "advansys_reset: before AdvResetChipAndSB()\n");
4494 switch (AdvResetChipAndSB(adv_dvc_varp
)) {
4497 ("advansys_reset: board %d: SCSI bus reset successful.\n",
4503 ("advansys_reset: board %d: SCSI bus reset error.\n",
4508 spin_lock_irqsave(&boardp
->lock
, flags
);
4509 (void)AdvISR(adv_dvc_varp
);
4511 /* Board lock is held. */
4514 * Dequeue all board 'done' requests. A pointer to the last request
4515 * is returned in 'last_scp'.
4517 done_scp
= asc_dequeue_list(&boardp
->done
, &last_scp
, ASC_TID_ALL
);
4520 * Dequeue all board 'active' requests for all devices and set
4521 * the request status to DID_RESET. A pointer to the last request
4522 * is returned in 'last_scp'.
4524 if (done_scp
== NULL
) {
4526 asc_dequeue_list(&boardp
->active
, &last_scp
, ASC_TID_ALL
);
4527 for (tscp
= done_scp
; tscp
; tscp
= REQPNEXT(tscp
)) {
4528 tscp
->result
= HOST_BYTE(DID_RESET
);
4531 /* Append to 'done_scp' at the end with 'last_scp'. */
4532 ASC_ASSERT(last_scp
!= NULL
);
4533 last_scp
->host_scribble
=
4534 (unsigned char *)asc_dequeue_list(&boardp
->active
,
4537 if (new_last_scp
!= NULL
) {
4538 ASC_ASSERT(REQPNEXT(last_scp
) != NULL
);
4539 for (tscp
= REQPNEXT(last_scp
); tscp
;
4540 tscp
= REQPNEXT(tscp
)) {
4541 tscp
->result
= HOST_BYTE(DID_RESET
);
4543 last_scp
= new_last_scp
;
4548 * Dequeue all 'waiting' requests and set the request status
4551 if (done_scp
== NULL
) {
4553 asc_dequeue_list(&boardp
->waiting
, &last_scp
, ASC_TID_ALL
);
4554 for (tscp
= done_scp
; tscp
; tscp
= REQPNEXT(tscp
)) {
4555 tscp
->result
= HOST_BYTE(DID_RESET
);
4558 /* Append to 'done_scp' at the end with 'last_scp'. */
4559 ASC_ASSERT(last_scp
!= NULL
);
4560 last_scp
->host_scribble
=
4561 (unsigned char *)asc_dequeue_list(&boardp
->waiting
,
4564 if (new_last_scp
!= NULL
) {
4565 ASC_ASSERT(REQPNEXT(last_scp
) != NULL
);
4566 for (tscp
= REQPNEXT(last_scp
); tscp
;
4567 tscp
= REQPNEXT(tscp
)) {
4568 tscp
->result
= HOST_BYTE(DID_RESET
);
4570 last_scp
= new_last_scp
;
4574 /* Save the time of the most recently completed reset. */
4575 boardp
->last_reset
= jiffies
;
4577 /* Clear reset flag. */
4578 boardp
->flags
&= ~ASC_HOST_IN_RESET
;
4579 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4582 * Complete all the 'done_scp' requests.
4584 if (done_scp
!= NULL
) {
4585 asc_scsi_done_list(done_scp
);
4588 ASC_DBG1(1, "advansys_reset: ret %d\n", ret
);
4594 * advansys_biosparam()
4596 * Translate disk drive geometry if the "BIOS greater than 1 GB"
4597 * support is enabled for a drive.
4599 * ip (information pointer) is an int array with the following definition:
4605 advansys_biosparam(struct scsi_device
*sdev
, struct block_device
*bdev
,
4606 sector_t capacity
, int ip
[])
4608 asc_board_t
*boardp
;
4610 ASC_DBG(1, "advansys_biosparam: begin\n");
4611 ASC_STATS(sdev
->host
, biosparam
);
4612 boardp
= ASC_BOARDP(sdev
->host
);
4613 if (ASC_NARROW_BOARD(boardp
)) {
4614 if ((boardp
->dvc_var
.asc_dvc_var
.dvc_cntl
&
4615 ASC_CNTL_BIOS_GT_1GB
) && capacity
> 0x200000) {
4623 if ((boardp
->dvc_var
.adv_dvc_var
.bios_ctrl
&
4624 BIOS_CTRL_EXTENDED_XLAT
) && capacity
> 0x200000) {
4632 ip
[2] = (unsigned long)capacity
/ (ip
[0] * ip
[1]);
4633 ASC_DBG(1, "advansys_biosparam: end\n");
4637 static int __init
advansys_detect(struct scsi_host_template
*tpnt
);
4638 static int advansys_release(struct Scsi_Host
*shp
);
4640 static struct scsi_host_template driver_template
= {
4641 .proc_name
= "advansys",
4642 #ifdef CONFIG_PROC_FS
4643 .proc_info
= advansys_proc_info
,
4646 .detect
= advansys_detect
,
4647 .release
= advansys_release
,
4648 .info
= advansys_info
,
4649 .queuecommand
= advansys_queuecommand
,
4650 .eh_bus_reset_handler
= advansys_reset
,
4651 .bios_param
= advansys_biosparam
,
4652 .slave_configure
= advansys_slave_configure
,
4654 * Because the driver may control an ISA adapter 'unchecked_isa_dma'
4655 * must be set. The flag will be cleared in advansys_detect for non-ISA
4656 * adapters. Refer to the comment in scsi_module.c for more information.
4658 .unchecked_isa_dma
= 1,
4660 * All adapters controlled by this driver are capable of large
4661 * scatter-gather lists. According to the mid-level SCSI documentation
4662 * this obviates any performance gain provided by setting
4663 * 'use_clustering'. But empirically while CPU utilization is increased
4664 * by enabling clustering, I/O throughput increases as well.
4666 .use_clustering
= ENABLE_CLUSTERING
,
4669 #include "scsi_module.c"
4672 * --- Miscellaneous Driver Functions
4676 * First-level interrupt handler.
4678 * 'dev_id' is a pointer to the interrupting adapter's asc_board_t. Because
4679 * all boards are currently checked for interrupts on each interrupt, 'dev_id'
4680 * is not referenced. 'dev_id' could be used to identify an interrupt passed
4681 * to the AdvanSys driver which is for a device sharing an interrupt with
4682 * an AdvanSys adapter.
4684 static irqreturn_t
advansys_interrupt(int irq
, void *dev_id
)
4686 unsigned long flags
;
4687 struct scsi_cmnd
*done_scp
= NULL
, *last_scp
= NULL
;
4688 struct scsi_cmnd
*new_last_scp
;
4689 struct Scsi_Host
*shost
= dev_id
;
4690 asc_board_t
*boardp
= ASC_BOARDP(shost
);
4691 irqreturn_t result
= IRQ_NONE
;
4693 ASC_DBG1(2, "advansys_interrupt: boardp 0x%p\n", boardp
);
4694 spin_lock_irqsave(&boardp
->lock
, flags
);
4695 if (ASC_NARROW_BOARD(boardp
)) {
4699 if (AscIsIntPending(shost
->io_port
)) {
4700 result
= IRQ_HANDLED
;
4701 ASC_STATS(shost
, interrupt
);
4702 ASC_DBG(1, "advansys_interrupt: before AscISR()\n");
4703 AscISR(&boardp
->dvc_var
.asc_dvc_var
);
4709 ASC_DBG(1, "advansys_interrupt: before AdvISR()\n");
4710 if (AdvISR(&boardp
->dvc_var
.adv_dvc_var
)) {
4711 result
= IRQ_HANDLED
;
4712 ASC_STATS(shost
, interrupt
);
4717 * Start waiting requests and create a list of completed requests.
4719 * If a reset request is being performed for the board, the reset
4720 * handler will complete pending requests after it has completed.
4722 if ((boardp
->flags
& ASC_HOST_IN_RESET
) == 0) {
4723 ASC_DBG2(1, "advansys_interrupt: done_scp 0x%p, "
4724 "last_scp 0x%p\n", done_scp
, last_scp
);
4726 /* Start any waiting commands for the board. */
4727 if (!ASC_QUEUE_EMPTY(&boardp
->waiting
)) {
4728 ASC_DBG(1, "advansys_interrupt: before "
4729 "asc_execute_queue()\n");
4730 asc_execute_queue(&boardp
->waiting
);
4734 * Add to the list of requests that must be completed.
4736 * 'done_scp' will always be NULL on the first iteration of
4737 * this loop. 'last_scp' is set at the same time as 'done_scp'.
4739 if (done_scp
== NULL
) {
4740 done_scp
= asc_dequeue_list(&boardp
->done
,
4741 &last_scp
, ASC_TID_ALL
);
4743 ASC_ASSERT(last_scp
!= NULL
);
4744 last_scp
->host_scribble
=
4745 (unsigned char *)asc_dequeue_list(&boardp
->
4749 if (new_last_scp
!= NULL
) {
4750 ASC_ASSERT(REQPNEXT(last_scp
) != NULL
);
4751 last_scp
= new_last_scp
;
4755 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4758 * If interrupts were enabled on entry, then they
4759 * are now enabled here.
4761 * Complete all requests on the done list.
4764 asc_scsi_done_list(done_scp
);
4766 ASC_DBG(1, "advansys_interrupt: end\n");
4771 * Set the number of commands to queue per device for the
4772 * specified host adapter.
4774 static int advansys_slave_configure(struct scsi_device
*device
)
4776 asc_board_t
*boardp
;
4778 boardp
= ASC_BOARDP(device
->host
);
4779 boardp
->flags
|= ASC_SELECT_QUEUE_DEPTHS
;
4781 * Save a pointer to the device and set its initial/maximum
4782 * queue depth. Only save the pointer for a lun0 dev though.
4784 if (device
->lun
== 0)
4785 boardp
->device
[device
->id
] = device
;
4786 if (device
->tagged_supported
) {
4787 if (ASC_NARROW_BOARD(boardp
)) {
4788 scsi_adjust_queue_depth(device
, MSG_ORDERED_TAG
,
4789 boardp
->dvc_var
.asc_dvc_var
.
4790 max_dvc_qng
[device
->id
]);
4792 scsi_adjust_queue_depth(device
, MSG_ORDERED_TAG
,
4793 boardp
->dvc_var
.adv_dvc_var
.
4797 scsi_adjust_queue_depth(device
, 0, device
->host
->cmd_per_lun
);
4800 "advansys_slave_configure: device 0x%lx, boardp 0x%lx, id %d, depth %d\n",
4801 (ulong
)device
, (ulong
)boardp
, device
->id
, device
->queue_depth
);
4806 * Complete all requests on the singly linked list pointed
4809 * Interrupts can be enabled on entry.
4811 static void asc_scsi_done_list(struct scsi_cmnd
*scp
)
4813 struct scsi_cmnd
*tscp
;
4815 ASC_DBG(2, "asc_scsi_done_list: begin\n");
4816 while (scp
!= NULL
) {
4817 asc_board_t
*boardp
;
4820 ASC_DBG1(3, "asc_scsi_done_list: scp 0x%lx\n", (ulong
)scp
);
4821 tscp
= REQPNEXT(scp
);
4822 scp
->host_scribble
= NULL
;
4824 boardp
= ASC_BOARDP(scp
->device
->host
);
4826 if (ASC_NARROW_BOARD(boardp
))
4827 dev
= boardp
->dvc_cfg
.asc_dvc_cfg
.dev
;
4829 dev
= boardp
->dvc_cfg
.adv_dvc_cfg
.dev
;
4833 (struct scatterlist
*)scp
->request_buffer
,
4834 scp
->use_sg
, scp
->sc_data_direction
);
4835 else if (scp
->request_bufflen
)
4836 dma_unmap_single(dev
, scp
->SCp
.dma_handle
,
4837 scp
->request_bufflen
,
4838 scp
->sc_data_direction
);
4840 ASC_STATS(scp
->device
->host
, done
);
4841 ASC_ASSERT(scp
->scsi_done
!= NULL
);
4843 scp
->scsi_done(scp
);
4847 ASC_DBG(2, "asc_scsi_done_list: done\n");
4852 * Execute a single 'Scsi_Cmnd'.
4854 * The function 'done' is called when the request has been completed.
4858 * host - board controlling device
4859 * device - device to send command
4860 * target - target of device
4861 * lun - lun of device
4862 * cmd_len - length of SCSI CDB
4863 * cmnd - buffer for SCSI 8, 10, or 12 byte CDB
4864 * use_sg - if non-zero indicates scatter-gather request with use_sg elements
4866 * if (use_sg == 0) {
4867 * request_buffer - buffer address for request
4868 * request_bufflen - length of request buffer
4870 * request_buffer - pointer to scatterlist structure
4873 * sense_buffer - sense command buffer
4875 * result (4 bytes of an int):
4877 * 0 SCSI Status Byte Code
4878 * 1 SCSI One Byte Message Code
4880 * 3 Mid-Level Error Code
4882 * host driver fields:
4883 * SCp - Scsi_Pointer used for command processing status
4884 * scsi_done - used to save caller's done function
4885 * host_scribble - used for pointer to another struct scsi_cmnd
4887 * If this function returns ASC_NOERROR the request has been enqueued
4888 * on the board's 'active' queue and will be completed from the
4889 * interrupt handler.
4891 * If this function returns ASC_NOERROR the request has been enqueued
4892 * on the board's 'done' queue and must be completed by the caller.
4894 * If ASC_BUSY is returned the request will be enqueued by the
4895 * caller on the target's waiting queue and re-tried later.
4897 static int asc_execute_scsi_cmnd(struct scsi_cmnd
*scp
)
4899 asc_board_t
*boardp
;
4900 ASC_DVC_VAR
*asc_dvc_varp
;
4901 ADV_DVC_VAR
*adv_dvc_varp
;
4902 ADV_SCSI_REQ_Q
*adv_scsiqp
;
4903 struct scsi_device
*device
;
4906 ASC_DBG2(1, "asc_execute_scsi_cmnd: scp 0x%lx, done 0x%lx\n",
4907 (ulong
)scp
, (ulong
)scp
->scsi_done
);
4909 boardp
= ASC_BOARDP(scp
->device
->host
);
4910 device
= boardp
->device
[scp
->device
->id
];
4912 if (ASC_NARROW_BOARD(boardp
)) {
4914 * Build and execute Narrow Board request.
4917 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
4920 * Build Asc Library request structure using the
4921 * global structures 'asc_scsi_req' and 'asc_sg_head'.
4923 * If an error is returned, then the request has been
4924 * queued on the board done queue. It will be completed
4927 * asc_build_req() can not return ASC_BUSY.
4929 if (asc_build_req(boardp
, scp
) == ASC_ERROR
) {
4930 ASC_STATS(scp
->device
->host
, build_error
);
4935 * Execute the command. If there is no error, add the command
4936 * to the active queue.
4938 switch (ret
= AscExeScsiQueue(asc_dvc_varp
, &asc_scsi_q
)) {
4940 ASC_STATS(scp
->device
->host
, exe_noerror
);
4942 * Increment monotonically increasing per device successful
4943 * request counter. Wrapping doesn't matter.
4945 boardp
->reqcnt
[scp
->device
->id
]++;
4946 asc_enqueue(&boardp
->active
, scp
, ASC_BACK
);
4948 "asc_execute_scsi_cmnd: AscExeScsiQueue(), ASC_NOERROR\n");
4952 * Caller will enqueue request on the target's waiting queue
4955 ASC_STATS(scp
->device
->host
, exe_busy
);
4959 ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() ASC_ERROR, err_code 0x%x\n",
4960 boardp
->id
, asc_dvc_varp
->err_code
);
4961 ASC_STATS(scp
->device
->host
, exe_error
);
4962 scp
->result
= HOST_BYTE(DID_ERROR
);
4963 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4967 ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() unknown, err_code 0x%x\n",
4968 boardp
->id
, asc_dvc_varp
->err_code
);
4969 ASC_STATS(scp
->device
->host
, exe_unknown
);
4970 scp
->result
= HOST_BYTE(DID_ERROR
);
4971 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4976 * Build and execute Wide Board request.
4978 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
4981 * Build and get a pointer to an Adv Library request structure.
4983 * If the request is successfully built then send it below,
4984 * otherwise return with an error.
4986 switch (adv_build_req(boardp
, scp
, &adv_scsiqp
)) {
4989 "asc_execute_scsi_cmnd: adv_build_req ASC_NOERROR\n");
4993 "asc_execute_scsi_cmnd: adv_build_req ASC_BUSY\n");
4995 * If busy is returned the request has not been enqueued.
4996 * It will be enqueued by the caller on the target's waiting
4997 * queue and retried later.
4999 * The asc_stats fields 'adv_build_noreq' and 'adv_build_nosg'
5000 * count wide board busy conditions. They are updated in
5001 * adv_build_req and adv_get_sglist, respectively.
5006 * If an error is returned, then the request has been
5007 * queued on the board done queue. It will be completed
5012 "asc_execute_scsi_cmnd: adv_build_req ASC_ERROR\n");
5013 ASC_STATS(scp
->device
->host
, build_error
);
5018 * Execute the command. If there is no error, add the command
5019 * to the active queue.
5021 switch (ret
= AdvExeScsiQueue(adv_dvc_varp
, adv_scsiqp
)) {
5023 ASC_STATS(scp
->device
->host
, exe_noerror
);
5025 * Increment monotonically increasing per device successful
5026 * request counter. Wrapping doesn't matter.
5028 boardp
->reqcnt
[scp
->device
->id
]++;
5029 asc_enqueue(&boardp
->active
, scp
, ASC_BACK
);
5031 "asc_execute_scsi_cmnd: AdvExeScsiQueue(), ASC_NOERROR\n");
5035 * Caller will enqueue request on the target's waiting queue
5038 ASC_STATS(scp
->device
->host
, exe_busy
);
5042 ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() ASC_ERROR, err_code 0x%x\n",
5043 boardp
->id
, adv_dvc_varp
->err_code
);
5044 ASC_STATS(scp
->device
->host
, exe_error
);
5045 scp
->result
= HOST_BYTE(DID_ERROR
);
5046 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5050 ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() unknown, err_code 0x%x\n",
5051 boardp
->id
, adv_dvc_varp
->err_code
);
5052 ASC_STATS(scp
->device
->host
, exe_unknown
);
5053 scp
->result
= HOST_BYTE(DID_ERROR
);
5054 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5059 ASC_DBG(1, "asc_execute_scsi_cmnd: end\n");
5064 * Build a request structure for the Asc Library (Narrow Board).
5066 * The global structures 'asc_scsi_q' and 'asc_sg_head' are
5067 * used to build the request.
5069 * If an error occurs, then queue the request on the board done
5070 * queue and return ASC_ERROR.
5072 static int asc_build_req(asc_board_t
*boardp
, struct scsi_cmnd
*scp
)
5074 struct device
*dev
= boardp
->dvc_cfg
.asc_dvc_cfg
.dev
;
5077 * Mutually exclusive access is required to 'asc_scsi_q' and
5078 * 'asc_sg_head' until after the request is started.
5080 memset(&asc_scsi_q
, 0, sizeof(ASC_SCSI_Q
));
5083 * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'.
5085 asc_scsi_q
.q2
.srb_ptr
= ASC_VADDR_TO_U32(scp
);
5088 * Build the ASC_SCSI_Q request.
5090 * For narrow boards a CDB length maximum of 12 bytes
5093 if (scp
->cmd_len
> ASC_MAX_CDB_LEN
) {
5095 ("asc_build_req: board %d: cmd_len %d > ASC_MAX_CDB_LEN %d\n",
5096 boardp
->id
, scp
->cmd_len
, ASC_MAX_CDB_LEN
);
5097 scp
->result
= HOST_BYTE(DID_ERROR
);
5098 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5101 asc_scsi_q
.cdbptr
= &scp
->cmnd
[0];
5102 asc_scsi_q
.q2
.cdb_len
= scp
->cmd_len
;
5103 asc_scsi_q
.q1
.target_id
= ASC_TID_TO_TARGET_ID(scp
->device
->id
);
5104 asc_scsi_q
.q1
.target_lun
= scp
->device
->lun
;
5105 asc_scsi_q
.q2
.target_ix
=
5106 ASC_TIDLUN_TO_IX(scp
->device
->id
, scp
->device
->lun
);
5107 asc_scsi_q
.q1
.sense_addr
=
5108 cpu_to_le32(virt_to_bus(&scp
->sense_buffer
[0]));
5109 asc_scsi_q
.q1
.sense_len
= sizeof(scp
->sense_buffer
);
5112 * If there are any outstanding requests for the current target,
5113 * then every 255th request send an ORDERED request. This heuristic
5114 * tries to retain the benefit of request sorting while preventing
5115 * request starvation. 255 is the max number of tags or pending commands
5116 * a device may have outstanding.
5118 * The request count is incremented below for every successfully
5122 if ((boardp
->dvc_var
.asc_dvc_var
.cur_dvc_qng
[scp
->device
->id
] > 0) &&
5123 (boardp
->reqcnt
[scp
->device
->id
] % 255) == 0) {
5124 asc_scsi_q
.q2
.tag_code
= MSG_ORDERED_TAG
;
5126 asc_scsi_q
.q2
.tag_code
= MSG_SIMPLE_TAG
;
5130 * Build ASC_SCSI_Q for a contiguous buffer or a scatter-gather
5133 if (scp
->use_sg
== 0) {
5135 * CDB request of single contiguous buffer.
5137 ASC_STATS(scp
->device
->host
, cont_cnt
);
5138 scp
->SCp
.dma_handle
= scp
->request_bufflen
?
5139 dma_map_single(dev
, scp
->request_buffer
,
5140 scp
->request_bufflen
,
5141 scp
->sc_data_direction
) : 0;
5142 asc_scsi_q
.q1
.data_addr
= cpu_to_le32(scp
->SCp
.dma_handle
);
5143 asc_scsi_q
.q1
.data_cnt
= cpu_to_le32(scp
->request_bufflen
);
5144 ASC_STATS_ADD(scp
->device
->host
, cont_xfer
,
5145 ASC_CEILING(scp
->request_bufflen
, 512));
5146 asc_scsi_q
.q1
.sg_queue_cnt
= 0;
5147 asc_scsi_q
.sg_head
= NULL
;
5150 * CDB scatter-gather request list.
5154 struct scatterlist
*slp
;
5156 slp
= (struct scatterlist
*)scp
->request_buffer
;
5158 dma_map_sg(dev
, slp
, scp
->use_sg
, scp
->sc_data_direction
);
5160 if (use_sg
> scp
->device
->host
->sg_tablesize
) {
5162 ("asc_build_req: board %d: use_sg %d > sg_tablesize %d\n",
5164 scp
->device
->host
->sg_tablesize
);
5165 dma_unmap_sg(dev
, slp
, scp
->use_sg
,
5166 scp
->sc_data_direction
);
5167 scp
->result
= HOST_BYTE(DID_ERROR
);
5168 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5172 ASC_STATS(scp
->device
->host
, sg_cnt
);
5175 * Use global ASC_SG_HEAD structure and set the ASC_SCSI_Q
5176 * structure to point to it.
5178 memset(&asc_sg_head
, 0, sizeof(ASC_SG_HEAD
));
5180 asc_scsi_q
.q1
.cntl
|= QC_SG_HEAD
;
5181 asc_scsi_q
.sg_head
= &asc_sg_head
;
5182 asc_scsi_q
.q1
.data_cnt
= 0;
5183 asc_scsi_q
.q1
.data_addr
= 0;
5184 /* This is a byte value, otherwise it would need to be swapped. */
5185 asc_sg_head
.entry_cnt
= asc_scsi_q
.q1
.sg_queue_cnt
= use_sg
;
5186 ASC_STATS_ADD(scp
->device
->host
, sg_elem
,
5187 asc_sg_head
.entry_cnt
);
5190 * Convert scatter-gather list into ASC_SG_HEAD list.
5192 for (sgcnt
= 0; sgcnt
< use_sg
; sgcnt
++, slp
++) {
5193 asc_sg_head
.sg_list
[sgcnt
].addr
=
5194 cpu_to_le32(sg_dma_address(slp
));
5195 asc_sg_head
.sg_list
[sgcnt
].bytes
=
5196 cpu_to_le32(sg_dma_len(slp
));
5197 ASC_STATS_ADD(scp
->device
->host
, sg_xfer
,
5198 ASC_CEILING(sg_dma_len(slp
), 512));
5202 ASC_DBG_PRT_ASC_SCSI_Q(2, &asc_scsi_q
);
5203 ASC_DBG_PRT_CDB(1, scp
->cmnd
, scp
->cmd_len
);
5209 * Build a request structure for the Adv Library (Wide Board).
5211 * If an adv_req_t can not be allocated to issue the request,
5212 * then return ASC_BUSY. If an error occurs, then return ASC_ERROR.
5214 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the
5215 * microcode for DMA addresses or math operations are byte swapped
5216 * to little-endian order.
5219 adv_build_req(asc_board_t
*boardp
, struct scsi_cmnd
*scp
,
5220 ADV_SCSI_REQ_Q
**adv_scsiqpp
)
5223 ADV_SCSI_REQ_Q
*scsiqp
;
5226 struct device
*dev
= boardp
->dvc_cfg
.adv_dvc_cfg
.dev
;
5229 * Allocate an adv_req_t structure from the board to execute
5232 if (boardp
->adv_reqp
== NULL
) {
5233 ASC_DBG(1, "adv_build_req: no free adv_req_t\n");
5234 ASC_STATS(scp
->device
->host
, adv_build_noreq
);
5237 reqp
= boardp
->adv_reqp
;
5238 boardp
->adv_reqp
= reqp
->next_reqp
;
5239 reqp
->next_reqp
= NULL
;
5243 * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers.
5245 scsiqp
= (ADV_SCSI_REQ_Q
*)ADV_32BALIGN(&reqp
->scsi_req_q
);
5248 * Initialize the structure.
5250 scsiqp
->cntl
= scsiqp
->scsi_cntl
= scsiqp
->done_status
= 0;
5253 * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure.
5255 scsiqp
->srb_ptr
= ASC_VADDR_TO_U32(reqp
);
5258 * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure.
5263 * Build the ADV_SCSI_REQ_Q request.
5267 * Set CDB length and copy it to the request structure.
5268 * For wide boards a CDB length maximum of 16 bytes
5271 if (scp
->cmd_len
> ADV_MAX_CDB_LEN
) {
5273 ("adv_build_req: board %d: cmd_len %d > ADV_MAX_CDB_LEN %d\n",
5274 boardp
->id
, scp
->cmd_len
, ADV_MAX_CDB_LEN
);
5275 scp
->result
= HOST_BYTE(DID_ERROR
);
5276 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5279 scsiqp
->cdb_len
= scp
->cmd_len
;
5280 /* Copy first 12 CDB bytes to cdb[]. */
5281 for (i
= 0; i
< scp
->cmd_len
&& i
< 12; i
++) {
5282 scsiqp
->cdb
[i
] = scp
->cmnd
[i
];
5284 /* Copy last 4 CDB bytes, if present, to cdb16[]. */
5285 for (; i
< scp
->cmd_len
; i
++) {
5286 scsiqp
->cdb16
[i
- 12] = scp
->cmnd
[i
];
5289 scsiqp
->target_id
= scp
->device
->id
;
5290 scsiqp
->target_lun
= scp
->device
->lun
;
5292 scsiqp
->sense_addr
= cpu_to_le32(virt_to_bus(&scp
->sense_buffer
[0]));
5293 scsiqp
->sense_len
= sizeof(scp
->sense_buffer
);
5296 * Build ADV_SCSI_REQ_Q for a contiguous buffer or a scatter-gather
5300 scsiqp
->data_cnt
= cpu_to_le32(scp
->request_bufflen
);
5301 scsiqp
->vdata_addr
= scp
->request_buffer
;
5302 scsiqp
->data_addr
= cpu_to_le32(virt_to_bus(scp
->request_buffer
));
5304 if (scp
->use_sg
== 0) {
5306 * CDB request of single contiguous buffer.
5308 reqp
->sgblkp
= NULL
;
5309 scsiqp
->data_cnt
= cpu_to_le32(scp
->request_bufflen
);
5310 if (scp
->request_bufflen
) {
5311 scsiqp
->vdata_addr
= scp
->request_buffer
;
5312 scp
->SCp
.dma_handle
=
5313 dma_map_single(dev
, scp
->request_buffer
,
5314 scp
->request_bufflen
,
5315 scp
->sc_data_direction
);
5317 scsiqp
->vdata_addr
= NULL
;
5318 scp
->SCp
.dma_handle
= 0;
5320 scsiqp
->data_addr
= cpu_to_le32(scp
->SCp
.dma_handle
);
5321 scsiqp
->sg_list_ptr
= NULL
;
5322 scsiqp
->sg_real_addr
= 0;
5323 ASC_STATS(scp
->device
->host
, cont_cnt
);
5324 ASC_STATS_ADD(scp
->device
->host
, cont_xfer
,
5325 ASC_CEILING(scp
->request_bufflen
, 512));
5328 * CDB scatter-gather request list.
5330 struct scatterlist
*slp
;
5333 slp
= (struct scatterlist
*)scp
->request_buffer
;
5335 dma_map_sg(dev
, slp
, scp
->use_sg
, scp
->sc_data_direction
);
5337 if (use_sg
> ADV_MAX_SG_LIST
) {
5339 ("adv_build_req: board %d: use_sg %d > ADV_MAX_SG_LIST %d\n",
5341 scp
->device
->host
->sg_tablesize
);
5342 dma_unmap_sg(dev
, slp
, scp
->use_sg
,
5343 scp
->sc_data_direction
);
5344 scp
->result
= HOST_BYTE(DID_ERROR
);
5345 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5348 * Free the 'adv_req_t' structure by adding it back to the
5351 reqp
->next_reqp
= boardp
->adv_reqp
;
5352 boardp
->adv_reqp
= reqp
;
5358 adv_get_sglist(boardp
, reqp
, scp
,
5359 use_sg
)) != ADV_SUCCESS
) {
5361 * Free the adv_req_t structure by adding it back to the
5364 reqp
->next_reqp
= boardp
->adv_reqp
;
5365 boardp
->adv_reqp
= reqp
;
5370 ASC_STATS(scp
->device
->host
, sg_cnt
);
5371 ASC_STATS_ADD(scp
->device
->host
, sg_elem
, use_sg
);
5374 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp
);
5375 ASC_DBG_PRT_CDB(1, scp
->cmnd
, scp
->cmd_len
);
5377 *adv_scsiqpp
= scsiqp
;
5383 * Build scatter-gather list for Adv Library (Wide Board).
5385 * Additional ADV_SG_BLOCK structures will need to be allocated
5386 * if the total number of scatter-gather elements exceeds
5387 * NO_OF_SG_PER_BLOCK (15). The ADV_SG_BLOCK structures are
5388 * assumed to be physically contiguous.
5391 * ADV_SUCCESS(1) - SG List successfully created
5392 * ADV_ERROR(-1) - SG List creation failed
5395 adv_get_sglist(asc_board_t
*boardp
, adv_req_t
*reqp
, struct scsi_cmnd
*scp
,
5398 adv_sgblk_t
*sgblkp
;
5399 ADV_SCSI_REQ_Q
*scsiqp
;
5400 struct scatterlist
*slp
;
5402 ADV_SG_BLOCK
*sg_block
, *prev_sg_block
;
5403 ADV_PADDR sg_block_paddr
;
5406 scsiqp
= (ADV_SCSI_REQ_Q
*)ADV_32BALIGN(&reqp
->scsi_req_q
);
5407 slp
= (struct scatterlist
*)scp
->request_buffer
;
5408 sg_elem_cnt
= use_sg
;
5409 prev_sg_block
= NULL
;
5410 reqp
->sgblkp
= NULL
;
5414 * Allocate a 'adv_sgblk_t' structure from the board free
5415 * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK
5416 * (15) scatter-gather elements.
5418 if ((sgblkp
= boardp
->adv_sgblkp
) == NULL
) {
5419 ASC_DBG(1, "adv_get_sglist: no free adv_sgblk_t\n");
5420 ASC_STATS(scp
->device
->host
, adv_build_nosg
);
5423 * Allocation failed. Free 'adv_sgblk_t' structures already
5424 * allocated for the request.
5426 while ((sgblkp
= reqp
->sgblkp
) != NULL
) {
5427 /* Remove 'sgblkp' from the request list. */
5428 reqp
->sgblkp
= sgblkp
->next_sgblkp
;
5430 /* Add 'sgblkp' to the board free list. */
5431 sgblkp
->next_sgblkp
= boardp
->adv_sgblkp
;
5432 boardp
->adv_sgblkp
= sgblkp
;
5436 /* Complete 'adv_sgblk_t' board allocation. */
5437 boardp
->adv_sgblkp
= sgblkp
->next_sgblkp
;
5438 sgblkp
->next_sgblkp
= NULL
;
5441 * Get 8 byte aligned virtual and physical addresses for
5442 * the allocated ADV_SG_BLOCK structure.
5445 (ADV_SG_BLOCK
*)ADV_8BALIGN(&sgblkp
->sg_block
);
5446 sg_block_paddr
= virt_to_bus(sg_block
);
5449 * Check if this is the first 'adv_sgblk_t' for the request.
5451 if (reqp
->sgblkp
== NULL
) {
5452 /* Request's first scatter-gather block. */
5453 reqp
->sgblkp
= sgblkp
;
5456 * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical
5459 scsiqp
->sg_list_ptr
= sg_block
;
5460 scsiqp
->sg_real_addr
=
5461 cpu_to_le32(sg_block_paddr
);
5463 /* Request's second or later scatter-gather block. */
5464 sgblkp
->next_sgblkp
= reqp
->sgblkp
;
5465 reqp
->sgblkp
= sgblkp
;
5468 * Point the previous ADV_SG_BLOCK structure to
5469 * the newly allocated ADV_SG_BLOCK structure.
5471 ASC_ASSERT(prev_sg_block
!= NULL
);
5472 prev_sg_block
->sg_ptr
=
5473 cpu_to_le32(sg_block_paddr
);
5477 for (i
= 0; i
< NO_OF_SG_PER_BLOCK
; i
++) {
5478 sg_block
->sg_list
[i
].sg_addr
=
5479 cpu_to_le32(sg_dma_address(slp
));
5480 sg_block
->sg_list
[i
].sg_count
=
5481 cpu_to_le32(sg_dma_len(slp
));
5482 ASC_STATS_ADD(scp
->device
->host
, sg_xfer
,
5483 ASC_CEILING(sg_dma_len(slp
), 512));
5485 if (--sg_elem_cnt
== 0) { /* Last ADV_SG_BLOCK and scatter-gather entry. */
5486 sg_block
->sg_cnt
= i
+ 1;
5487 sg_block
->sg_ptr
= 0L; /* Last ADV_SG_BLOCK in list. */
5492 sg_block
->sg_cnt
= NO_OF_SG_PER_BLOCK
;
5493 prev_sg_block
= sg_block
;
5500 * asc_isr_callback() - Second Level Interrupt Handler called by AscISR().
5502 * Interrupt callback function for the Narrow SCSI Asc Library.
5504 static void asc_isr_callback(ASC_DVC_VAR
*asc_dvc_varp
, ASC_QDONE_INFO
*qdonep
)
5506 asc_board_t
*boardp
;
5507 struct scsi_cmnd
*scp
;
5508 struct Scsi_Host
*shost
;
5511 ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp 0x%lx, qdonep 0x%lx\n",
5512 (ulong
)asc_dvc_varp
, (ulong
)qdonep
);
5513 ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep
);
5516 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
5517 * command that has been completed.
5519 scp
= (struct scsi_cmnd
*)ASC_U32_TO_VADDR(qdonep
->d2
.srb_ptr
);
5520 ASC_DBG1(1, "asc_isr_callback: scp 0x%lx\n", (ulong
)scp
);
5523 ASC_PRINT("asc_isr_callback: scp is NULL\n");
5526 ASC_DBG_PRT_CDB(2, scp
->cmnd
, scp
->cmd_len
);
5529 * If the request's host pointer is not valid, display a
5530 * message and return.
5532 shost
= scp
->device
->host
;
5533 for (i
= 0; i
< asc_board_count
; i
++) {
5534 if (asc_host
[i
] == shost
) {
5538 if (i
== asc_board_count
) {
5540 ("asc_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n",
5541 (ulong
)scp
, (ulong
)shost
);
5545 ASC_STATS(shost
, callback
);
5546 ASC_DBG1(1, "asc_isr_callback: shost 0x%lx\n", (ulong
)shost
);
5549 * If the request isn't found on the active queue, it may
5550 * have been removed to handle a reset request.
5551 * Display a message and return.
5553 boardp
= ASC_BOARDP(shost
);
5554 ASC_ASSERT(asc_dvc_varp
== &boardp
->dvc_var
.asc_dvc_var
);
5555 if (asc_rmqueue(&boardp
->active
, scp
) == ASC_FALSE
) {
5557 ("asc_isr_callback: board %d: scp 0x%lx not on active queue\n",
5558 boardp
->id
, (ulong
)scp
);
5563 * 'qdonep' contains the command's ending status.
5565 switch (qdonep
->d3
.done_stat
) {
5567 ASC_DBG(2, "asc_isr_callback: QD_NO_ERROR\n");
5571 * If an INQUIRY command completed successfully, then call
5572 * the AscInquiryHandling() function to set-up the device.
5574 if (scp
->cmnd
[0] == INQUIRY
&& scp
->device
->lun
== 0 &&
5575 (scp
->request_bufflen
- qdonep
->remain_bytes
) >= 8) {
5576 AscInquiryHandling(asc_dvc_varp
, scp
->device
->id
& 0x7,
5577 (ASC_SCSI_INQUIRY
*)scp
->
5582 * Check for an underrun condition.
5584 * If there was no error and an underrun condition, then
5585 * then return the number of underrun bytes.
5587 if (scp
->request_bufflen
!= 0 && qdonep
->remain_bytes
!= 0 &&
5588 qdonep
->remain_bytes
<= scp
->request_bufflen
) {
5590 "asc_isr_callback: underrun condition %u bytes\n",
5591 (unsigned)qdonep
->remain_bytes
);
5592 scp
->resid
= qdonep
->remain_bytes
;
5597 ASC_DBG(2, "asc_isr_callback: QD_WITH_ERROR\n");
5598 switch (qdonep
->d3
.host_stat
) {
5599 case QHSTA_NO_ERROR
:
5600 if (qdonep
->d3
.scsi_stat
== SAM_STAT_CHECK_CONDITION
) {
5602 "asc_isr_callback: SAM_STAT_CHECK_CONDITION\n");
5603 ASC_DBG_PRT_SENSE(2, scp
->sense_buffer
,
5604 sizeof(scp
->sense_buffer
));
5606 * Note: The 'status_byte()' macro used by target drivers
5607 * defined in scsi.h shifts the status byte returned by
5608 * host drivers right by 1 bit. This is why target drivers
5609 * also use right shifted status byte definitions. For
5610 * instance target drivers use CHECK_CONDITION, defined to
5611 * 0x1, instead of the SCSI defined check condition value
5612 * of 0x2. Host drivers are supposed to return the status
5613 * byte as it is defined by SCSI.
5615 scp
->result
= DRIVER_BYTE(DRIVER_SENSE
) |
5616 STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5618 scp
->result
= STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5623 /* QHSTA error occurred */
5624 ASC_DBG1(1, "asc_isr_callback: host_stat 0x%x\n",
5625 qdonep
->d3
.host_stat
);
5626 scp
->result
= HOST_BYTE(DID_BAD_TARGET
);
5631 case QD_ABORTED_BY_HOST
:
5632 ASC_DBG(1, "asc_isr_callback: QD_ABORTED_BY_HOST\n");
5634 HOST_BYTE(DID_ABORT
) | MSG_BYTE(qdonep
->d3
.
5636 STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5640 ASC_DBG1(1, "asc_isr_callback: done_stat 0x%x\n",
5641 qdonep
->d3
.done_stat
);
5643 HOST_BYTE(DID_ERROR
) | MSG_BYTE(qdonep
->d3
.
5645 STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5650 * If the 'init_tidmask' bit isn't already set for the target and the
5651 * current request finished normally, then set the bit for the target
5652 * to indicate that a device is present.
5654 if ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(scp
->device
->id
)) == 0 &&
5655 qdonep
->d3
.done_stat
== QD_NO_ERROR
&&
5656 qdonep
->d3
.host_stat
== QHSTA_NO_ERROR
) {
5657 boardp
->init_tidmask
|= ADV_TID_TO_TIDMASK(scp
->device
->id
);
5661 * Because interrupts may be enabled by the 'struct scsi_cmnd' done
5662 * function, add the command to the end of the board's done queue.
5663 * The done function for the command will be called from
5664 * advansys_interrupt().
5666 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5672 * adv_isr_callback() - Second Level Interrupt Handler called by AdvISR().
5674 * Callback function for the Wide SCSI Adv Library.
5676 static void adv_isr_callback(ADV_DVC_VAR
*adv_dvc_varp
, ADV_SCSI_REQ_Q
*scsiqp
)
5678 asc_board_t
*boardp
;
5680 adv_sgblk_t
*sgblkp
;
5681 struct scsi_cmnd
*scp
;
5682 struct Scsi_Host
*shost
;
5686 ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp 0x%lx, scsiqp 0x%lx\n",
5687 (ulong
)adv_dvc_varp
, (ulong
)scsiqp
);
5688 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp
);
5691 * Get the adv_req_t structure for the command that has been
5692 * completed. The adv_req_t structure actually contains the
5693 * completed ADV_SCSI_REQ_Q structure.
5695 reqp
= (adv_req_t
*)ADV_U32_TO_VADDR(scsiqp
->srb_ptr
);
5696 ASC_DBG1(1, "adv_isr_callback: reqp 0x%lx\n", (ulong
)reqp
);
5698 ASC_PRINT("adv_isr_callback: reqp is NULL\n");
5703 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
5704 * command that has been completed.
5706 * Note: The adv_req_t request structure and adv_sgblk_t structure,
5707 * if any, are dropped, because a board structure pointer can not be
5711 ASC_DBG1(1, "adv_isr_callback: scp 0x%lx\n", (ulong
)scp
);
5714 ("adv_isr_callback: scp is NULL; adv_req_t dropped.\n");
5717 ASC_DBG_PRT_CDB(2, scp
->cmnd
, scp
->cmd_len
);
5720 * If the request's host pointer is not valid, display a message
5723 shost
= scp
->device
->host
;
5724 for (i
= 0; i
< asc_board_count
; i
++) {
5725 if (asc_host
[i
] == shost
) {
5730 * Note: If the host structure is not found, the adv_req_t request
5731 * structure and adv_sgblk_t structure, if any, is dropped.
5733 if (i
== asc_board_count
) {
5735 ("adv_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n",
5736 (ulong
)scp
, (ulong
)shost
);
5740 ASC_STATS(shost
, callback
);
5741 ASC_DBG1(1, "adv_isr_callback: shost 0x%lx\n", (ulong
)shost
);
5744 * If the request isn't found on the active queue, it may have been
5745 * removed to handle a reset request. Display a message and return.
5747 * Note: Because the structure may still be in use don't attempt
5748 * to free the adv_req_t and adv_sgblk_t, if any, structures.
5750 boardp
= ASC_BOARDP(shost
);
5751 ASC_ASSERT(adv_dvc_varp
== &boardp
->dvc_var
.adv_dvc_var
);
5752 if (asc_rmqueue(&boardp
->active
, scp
) == ASC_FALSE
) {
5754 ("adv_isr_callback: board %d: scp 0x%lx not on active queue\n",
5755 boardp
->id
, (ulong
)scp
);
5760 * 'done_status' contains the command's ending status.
5762 switch (scsiqp
->done_status
) {
5764 ASC_DBG(2, "adv_isr_callback: QD_NO_ERROR\n");
5768 * Check for an underrun condition.
5770 * If there was no error and an underrun condition, then
5771 * then return the number of underrun bytes.
5773 resid_cnt
= le32_to_cpu(scsiqp
->data_cnt
);
5774 if (scp
->request_bufflen
!= 0 && resid_cnt
!= 0 &&
5775 resid_cnt
<= scp
->request_bufflen
) {
5777 "adv_isr_callback: underrun condition %lu bytes\n",
5779 scp
->resid
= resid_cnt
;
5784 ASC_DBG(2, "adv_isr_callback: QD_WITH_ERROR\n");
5785 switch (scsiqp
->host_status
) {
5786 case QHSTA_NO_ERROR
:
5787 if (scsiqp
->scsi_status
== SAM_STAT_CHECK_CONDITION
) {
5789 "adv_isr_callback: SAM_STAT_CHECK_CONDITION\n");
5790 ASC_DBG_PRT_SENSE(2, scp
->sense_buffer
,
5791 sizeof(scp
->sense_buffer
));
5793 * Note: The 'status_byte()' macro used by target drivers
5794 * defined in scsi.h shifts the status byte returned by
5795 * host drivers right by 1 bit. This is why target drivers
5796 * also use right shifted status byte definitions. For
5797 * instance target drivers use CHECK_CONDITION, defined to
5798 * 0x1, instead of the SCSI defined check condition value
5799 * of 0x2. Host drivers are supposed to return the status
5800 * byte as it is defined by SCSI.
5802 scp
->result
= DRIVER_BYTE(DRIVER_SENSE
) |
5803 STATUS_BYTE(scsiqp
->scsi_status
);
5805 scp
->result
= STATUS_BYTE(scsiqp
->scsi_status
);
5810 /* Some other QHSTA error occurred. */
5811 ASC_DBG1(1, "adv_isr_callback: host_status 0x%x\n",
5812 scsiqp
->host_status
);
5813 scp
->result
= HOST_BYTE(DID_BAD_TARGET
);
5818 case QD_ABORTED_BY_HOST
:
5819 ASC_DBG(1, "adv_isr_callback: QD_ABORTED_BY_HOST\n");
5821 HOST_BYTE(DID_ABORT
) | STATUS_BYTE(scsiqp
->scsi_status
);
5825 ASC_DBG1(1, "adv_isr_callback: done_status 0x%x\n",
5826 scsiqp
->done_status
);
5828 HOST_BYTE(DID_ERROR
) | STATUS_BYTE(scsiqp
->scsi_status
);
5833 * If the 'init_tidmask' bit isn't already set for the target and the
5834 * current request finished normally, then set the bit for the target
5835 * to indicate that a device is present.
5837 if ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(scp
->device
->id
)) == 0 &&
5838 scsiqp
->done_status
== QD_NO_ERROR
&&
5839 scsiqp
->host_status
== QHSTA_NO_ERROR
) {
5840 boardp
->init_tidmask
|= ADV_TID_TO_TIDMASK(scp
->device
->id
);
5844 * Because interrupts may be enabled by the 'struct scsi_cmnd' done
5845 * function, add the command to the end of the board's done queue.
5846 * The done function for the command will be called from
5847 * advansys_interrupt().
5849 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5852 * Free all 'adv_sgblk_t' structures allocated for the request.
5854 while ((sgblkp
= reqp
->sgblkp
) != NULL
) {
5855 /* Remove 'sgblkp' from the request list. */
5856 reqp
->sgblkp
= sgblkp
->next_sgblkp
;
5858 /* Add 'sgblkp' to the board free list. */
5859 sgblkp
->next_sgblkp
= boardp
->adv_sgblkp
;
5860 boardp
->adv_sgblkp
= sgblkp
;
5864 * Free the adv_req_t structure used with the command by adding
5865 * it back to the board free list.
5867 reqp
->next_reqp
= boardp
->adv_reqp
;
5868 boardp
->adv_reqp
= reqp
;
5870 ASC_DBG(1, "adv_isr_callback: done\n");
5876 * adv_async_callback() - Adv Library asynchronous event callback function.
5878 static void adv_async_callback(ADV_DVC_VAR
*adv_dvc_varp
, uchar code
)
5881 case ADV_ASYNC_SCSI_BUS_RESET_DET
:
5883 * The firmware detected a SCSI Bus reset.
5886 "adv_async_callback: ADV_ASYNC_SCSI_BUS_RESET_DET\n");
5889 case ADV_ASYNC_RDMA_FAILURE
:
5891 * Handle RDMA failure by resetting the SCSI Bus and
5892 * possibly the chip if it is unresponsive. Log the error
5893 * with a unique code.
5895 ASC_DBG(0, "adv_async_callback: ADV_ASYNC_RDMA_FAILURE\n");
5896 AdvResetChipAndSB(adv_dvc_varp
);
5899 case ADV_HOST_SCSI_BUS_RESET
:
5901 * Host generated SCSI bus reset occurred.
5903 ASC_DBG(0, "adv_async_callback: ADV_HOST_SCSI_BUS_RESET\n");
5907 ASC_DBG1(0, "DvcAsyncCallBack: unknown code 0x%x\n", code
);
5913 * Add a 'REQP' to the end of specified queue. Set 'tidmask'
5914 * to indicate a command is queued for the device.
5916 * 'flag' may be either ASC_FRONT or ASC_BACK.
5918 * 'REQPNEXT(reqp)' returns reqp's next pointer.
5920 static void asc_enqueue(asc_queue_t
*ascq
, REQP reqp
, int flag
)
5924 ASC_DBG3(3, "asc_enqueue: ascq 0x%lx, reqp 0x%lx, flag %d\n",
5925 (ulong
)ascq
, (ulong
)reqp
, flag
);
5926 ASC_ASSERT(reqp
!= NULL
);
5927 ASC_ASSERT(flag
== ASC_FRONT
|| flag
== ASC_BACK
);
5928 tid
= REQPTID(reqp
);
5929 ASC_ASSERT(tid
>= 0 && tid
<= ADV_MAX_TID
);
5930 if (flag
== ASC_FRONT
) {
5931 reqp
->host_scribble
= (unsigned char *)ascq
->q_first
[tid
];
5932 ascq
->q_first
[tid
] = reqp
;
5933 /* If the queue was empty, set the last pointer. */
5934 if (ascq
->q_last
[tid
] == NULL
) {
5935 ascq
->q_last
[tid
] = reqp
;
5937 } else { /* ASC_BACK */
5938 if (ascq
->q_last
[tid
] != NULL
) {
5939 ascq
->q_last
[tid
]->host_scribble
=
5940 (unsigned char *)reqp
;
5942 ascq
->q_last
[tid
] = reqp
;
5943 reqp
->host_scribble
= NULL
;
5944 /* If the queue was empty, set the first pointer. */
5945 if (ascq
->q_first
[tid
] == NULL
) {
5946 ascq
->q_first
[tid
] = reqp
;
5949 /* The queue has at least one entry, set its bit. */
5950 ascq
->q_tidmask
|= ADV_TID_TO_TIDMASK(tid
);
5951 #ifdef ADVANSYS_STATS
5952 /* Maintain request queue statistics. */
5953 ascq
->q_tot_cnt
[tid
]++;
5954 ascq
->q_cur_cnt
[tid
]++;
5955 if (ascq
->q_cur_cnt
[tid
] > ascq
->q_max_cnt
[tid
]) {
5956 ascq
->q_max_cnt
[tid
] = ascq
->q_cur_cnt
[tid
];
5957 ASC_DBG2(2, "asc_enqueue: new q_max_cnt[%d] %d\n",
5958 tid
, ascq
->q_max_cnt
[tid
]);
5960 REQPTIME(reqp
) = REQTIMESTAMP();
5961 #endif /* ADVANSYS_STATS */
5962 ASC_DBG1(3, "asc_enqueue: reqp 0x%lx\n", (ulong
)reqp
);
5967 * Return first queued 'REQP' on the specified queue for
5968 * the specified target device. Clear the 'tidmask' bit for
5969 * the device if no more commands are left queued for it.
5971 * 'REQPNEXT(reqp)' returns reqp's next pointer.
5973 static REQP
asc_dequeue(asc_queue_t
*ascq
, int tid
)
5977 ASC_DBG2(3, "asc_dequeue: ascq 0x%lx, tid %d\n", (ulong
)ascq
, tid
);
5978 ASC_ASSERT(tid
>= 0 && tid
<= ADV_MAX_TID
);
5979 if ((reqp
= ascq
->q_first
[tid
]) != NULL
) {
5980 ASC_ASSERT(ascq
->q_tidmask
& ADV_TID_TO_TIDMASK(tid
));
5981 ascq
->q_first
[tid
] = REQPNEXT(reqp
);
5982 /* If the queue is empty, clear its bit and the last pointer. */
5983 if (ascq
->q_first
[tid
] == NULL
) {
5984 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(tid
);
5985 ASC_ASSERT(ascq
->q_last
[tid
] == reqp
);
5986 ascq
->q_last
[tid
] = NULL
;
5988 #ifdef ADVANSYS_STATS
5989 /* Maintain request queue statistics. */
5990 ascq
->q_cur_cnt
[tid
]--;
5991 ASC_ASSERT(ascq
->q_cur_cnt
[tid
] >= 0);
5992 REQTIMESTAT("asc_dequeue", ascq
, reqp
, tid
);
5993 #endif /* ADVANSYS_STATS */
5995 ASC_DBG1(3, "asc_dequeue: reqp 0x%lx\n", (ulong
)reqp
);
6000 * Return a pointer to a singly linked list of all the requests queued
6001 * for 'tid' on the 'asc_queue_t' pointed to by 'ascq'.
6003 * If 'lastpp' is not NULL, '*lastpp' will be set to point to the
6004 * the last request returned in the singly linked list.
6006 * 'tid' should either be a valid target id or if it is ASC_TID_ALL,
6007 * then all queued requests are concatenated into one list and
6010 * Note: If 'lastpp' is used to append a new list to the end of
6011 * an old list, only change the old list last pointer if '*lastpp'
6012 * (or the function return value) is not NULL, i.e. use a temporary
6013 * variable for 'lastpp' and check its value after the function return
6014 * before assigning it to the list last pointer.
6016 * Unfortunately collecting queuing time statistics adds overhead to
6017 * the function that isn't inherent to the function's algorithm.
6019 static REQP
asc_dequeue_list(asc_queue_t
*ascq
, REQP
*lastpp
, int tid
)
6024 ASC_DBG2(3, "asc_dequeue_list: ascq 0x%lx, tid %d\n", (ulong
)ascq
, tid
);
6025 ASC_ASSERT((tid
== ASC_TID_ALL
) || (tid
>= 0 && tid
<= ADV_MAX_TID
));
6028 * If 'tid' is not ASC_TID_ALL, return requests only for
6029 * the specified 'tid'. If 'tid' is ASC_TID_ALL, return all
6030 * requests for all tids.
6032 if (tid
!= ASC_TID_ALL
) {
6033 /* Return all requests for the specified 'tid'. */
6034 if ((ascq
->q_tidmask
& ADV_TID_TO_TIDMASK(tid
)) == 0) {
6035 /* List is empty; Set first and last return pointers to NULL. */
6036 firstp
= lastp
= NULL
;
6038 firstp
= ascq
->q_first
[tid
];
6039 lastp
= ascq
->q_last
[tid
];
6040 ascq
->q_first
[tid
] = ascq
->q_last
[tid
] = NULL
;
6041 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(tid
);
6042 #ifdef ADVANSYS_STATS
6045 ascq
->q_cur_cnt
[tid
] = 0;
6046 for (reqp
= firstp
; reqp
; reqp
= REQPNEXT(reqp
)) {
6047 REQTIMESTAT("asc_dequeue_list", ascq
,
6051 #endif /* ADVANSYS_STATS */
6054 /* Return all requests for all tids. */
6055 firstp
= lastp
= NULL
;
6056 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6057 if (ascq
->q_tidmask
& ADV_TID_TO_TIDMASK(i
)) {
6058 if (firstp
== NULL
) {
6059 firstp
= ascq
->q_first
[i
];
6060 lastp
= ascq
->q_last
[i
];
6062 ASC_ASSERT(lastp
!= NULL
);
6063 lastp
->host_scribble
=
6064 (unsigned char *)ascq
->q_first
[i
];
6065 lastp
= ascq
->q_last
[i
];
6067 ascq
->q_first
[i
] = ascq
->q_last
[i
] = NULL
;
6068 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(i
);
6069 #ifdef ADVANSYS_STATS
6070 ascq
->q_cur_cnt
[i
] = 0;
6071 #endif /* ADVANSYS_STATS */
6074 #ifdef ADVANSYS_STATS
6077 for (reqp
= firstp
; reqp
; reqp
= REQPNEXT(reqp
)) {
6078 REQTIMESTAT("asc_dequeue_list", ascq
, reqp
,
6082 #endif /* ADVANSYS_STATS */
6087 ASC_DBG1(3, "asc_dequeue_list: firstp 0x%lx\n", (ulong
)firstp
);
6092 * Remove the specified 'REQP' from the specified queue for
6093 * the specified target device. Clear the 'tidmask' bit for the
6094 * device if no more commands are left queued for it.
6096 * 'REQPNEXT(reqp)' returns reqp's the next pointer.
6098 * Return ASC_TRUE if the command was found and removed,
6099 * otherwise return ASC_FALSE.
6101 static int asc_rmqueue(asc_queue_t
*ascq
, REQP reqp
)
6105 int ret
= ASC_FALSE
;
6107 ASC_DBG2(3, "asc_rmqueue: ascq 0x%lx, reqp 0x%lx\n",
6108 (ulong
)ascq
, (ulong
)reqp
);
6109 ASC_ASSERT(reqp
!= NULL
);
6111 tid
= REQPTID(reqp
);
6112 ASC_ASSERT(tid
>= 0 && tid
<= ADV_MAX_TID
);
6115 * Handle the common case of 'reqp' being the first
6116 * entry on the queue.
6118 if (reqp
== ascq
->q_first
[tid
]) {
6120 ascq
->q_first
[tid
] = REQPNEXT(reqp
);
6121 /* If the queue is now empty, clear its bit and the last pointer. */
6122 if (ascq
->q_first
[tid
] == NULL
) {
6123 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(tid
);
6124 ASC_ASSERT(ascq
->q_last
[tid
] == reqp
);
6125 ascq
->q_last
[tid
] = NULL
;
6127 } else if (ascq
->q_first
[tid
] != NULL
) {
6128 ASC_ASSERT(ascq
->q_last
[tid
] != NULL
);
6130 * Because the case of 'reqp' being the first entry has been
6131 * handled above and it is known the queue is not empty, if
6132 * 'reqp' is found on the queue it is guaranteed the queue will
6133 * not become empty and that 'q_first[tid]' will not be changed.
6135 * Set 'prevp' to the first entry, 'currp' to the second entry,
6136 * and search for 'reqp'.
6138 for (prevp
= ascq
->q_first
[tid
], currp
= REQPNEXT(prevp
);
6139 currp
; prevp
= currp
, currp
= REQPNEXT(currp
)) {
6140 if (currp
== reqp
) {
6142 prevp
->host_scribble
=
6143 (unsigned char *)REQPNEXT(currp
);
6144 reqp
->host_scribble
= NULL
;
6145 if (ascq
->q_last
[tid
] == reqp
) {
6146 ascq
->q_last
[tid
] = prevp
;
6152 #ifdef ADVANSYS_STATS
6153 /* Maintain request queue statistics. */
6154 if (ret
== ASC_TRUE
) {
6155 ascq
->q_cur_cnt
[tid
]--;
6156 REQTIMESTAT("asc_rmqueue", ascq
, reqp
, tid
);
6158 ASC_ASSERT(ascq
->q_cur_cnt
[tid
] >= 0);
6159 #endif /* ADVANSYS_STATS */
6160 ASC_DBG2(3, "asc_rmqueue: reqp 0x%lx, ret %d\n", (ulong
)reqp
, ret
);
6165 * Execute as many queued requests as possible for the specified queue.
6167 * Calls asc_execute_scsi_cmnd() to execute a REQP/struct scsi_cmnd.
6169 static void asc_execute_queue(asc_queue_t
*ascq
)
6171 ADV_SCSI_BIT_ID_TYPE scan_tidmask
;
6175 ASC_DBG1(1, "asc_execute_queue: ascq 0x%lx\n", (ulong
)ascq
);
6177 * Execute queued commands for devices attached to
6178 * the current board in round-robin fashion.
6180 scan_tidmask
= ascq
->q_tidmask
;
6182 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6183 if (scan_tidmask
& ADV_TID_TO_TIDMASK(i
)) {
6184 if ((reqp
= asc_dequeue(ascq
, i
)) == NULL
) {
6185 scan_tidmask
&= ~ADV_TID_TO_TIDMASK(i
);
6187 if (asc_execute_scsi_cmnd
6188 ((struct scsi_cmnd
*)reqp
)
6190 scan_tidmask
&= ~ADV_TID_TO_TIDMASK(i
);
6192 * The request returned ASC_BUSY. Enqueue at the front of
6193 * target's waiting list to maintain correct ordering.
6195 asc_enqueue(ascq
, reqp
, ASC_FRONT
);
6199 } while (scan_tidmask
);
6203 #ifdef CONFIG_PROC_FS
6205 * asc_prt_board_devices()
6207 * Print driver information for devices attached to the board.
6209 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6210 * cf. asc_prt_line().
6212 * Return the number of characters copied into 'cp'. No more than
6213 * 'cplen' characters will be copied to 'cp'.
6215 static int asc_prt_board_devices(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6217 asc_board_t
*boardp
;
6224 boardp
= ASC_BOARDP(shost
);
6228 len
= asc_prt_line(cp
, leftlen
,
6229 "\nDevice Information for AdvanSys SCSI Host %d:\n",
6233 if (ASC_NARROW_BOARD(boardp
)) {
6234 chip_scsi_id
= boardp
->dvc_cfg
.asc_dvc_cfg
.chip_scsi_id
;
6236 chip_scsi_id
= boardp
->dvc_var
.adv_dvc_var
.chip_scsi_id
;
6239 len
= asc_prt_line(cp
, leftlen
, "Target IDs Detected:");
6241 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6242 if (boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) {
6243 len
= asc_prt_line(cp
, leftlen
, " %X,", i
);
6247 len
= asc_prt_line(cp
, leftlen
, " (%X=Host Adapter)\n", chip_scsi_id
);
6254 * Display Wide Board BIOS Information.
6256 static int asc_prt_adv_bios(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6258 asc_board_t
*boardp
;
6262 ushort major
, minor
, letter
;
6264 boardp
= ASC_BOARDP(shost
);
6268 len
= asc_prt_line(cp
, leftlen
, "\nROM BIOS Version: ");
6272 * If the BIOS saved a valid signature, then fill in
6273 * the BIOS code segment base address.
6275 if (boardp
->bios_signature
!= 0x55AA) {
6276 len
= asc_prt_line(cp
, leftlen
, "Disabled or Pre-3.1\n");
6278 len
= asc_prt_line(cp
, leftlen
,
6279 "BIOS either disabled or Pre-3.1. If it is pre-3.1, then a newer version\n");
6281 len
= asc_prt_line(cp
, leftlen
,
6282 "can be found at the ConnectCom FTP site: ftp://ftp.connectcom.net/pub\n");
6285 major
= (boardp
->bios_version
>> 12) & 0xF;
6286 minor
= (boardp
->bios_version
>> 8) & 0xF;
6287 letter
= (boardp
->bios_version
& 0xFF);
6289 len
= asc_prt_line(cp
, leftlen
, "%d.%d%c\n",
6291 letter
>= 26 ? '?' : letter
+ 'A');
6295 * Current available ROM BIOS release is 3.1I for UW
6296 * and 3.2I for U2W. This code doesn't differentiate
6297 * UW and U2W boards.
6299 if (major
< 3 || (major
<= 3 && minor
< 1) ||
6300 (major
<= 3 && minor
<= 1 && letter
< ('I' - 'A'))) {
6301 len
= asc_prt_line(cp
, leftlen
,
6302 "Newer version of ROM BIOS is available at the ConnectCom FTP site:\n");
6304 len
= asc_prt_line(cp
, leftlen
,
6305 "ftp://ftp.connectcom.net/pub\n");
6314 * Add serial number to information bar if signature AAh
6315 * is found in at bit 15-9 (7 bits) of word 1.
6317 * Serial Number consists fo 12 alpha-numeric digits.
6319 * 1 - Product type (A,B,C,D..) Word0: 15-13 (3 bits)
6320 * 2 - MFG Location (A,B,C,D..) Word0: 12-10 (3 bits)
6321 * 3-4 - Product ID (0-99) Word0: 9-0 (10 bits)
6322 * 5 - Product revision (A-J) Word0: " "
6324 * Signature Word1: 15-9 (7 bits)
6325 * 6 - Year (0-9) Word1: 8-6 (3 bits) & Word2: 15 (1 bit)
6326 * 7-8 - Week of the year (1-52) Word1: 5-0 (6 bits)
6328 * 9-12 - Serial Number (A001-Z999) Word2: 14-0 (15 bits)
6330 * Note 1: Only production cards will have a serial number.
6332 * Note 2: Signature is most significant 7 bits (0xFE).
6334 * Returns ASC_TRUE if serial number found, otherwise returns ASC_FALSE.
6336 static int asc_get_eeprom_string(ushort
*serialnum
, uchar
*cp
)
6340 if ((serialnum
[1] & 0xFE00) != ((ushort
)0xAA << 8)) {
6344 * First word - 6 digits.
6348 /* Product type - 1st digit. */
6349 if ((*cp
= 'A' + ((w
& 0xE000) >> 13)) == 'H') {
6350 /* Product type is P=Prototype */
6355 /* Manufacturing location - 2nd digit. */
6356 *cp
++ = 'A' + ((w
& 0x1C00) >> 10);
6358 /* Product ID - 3rd, 4th digits. */
6360 *cp
++ = '0' + (num
/ 100);
6362 *cp
++ = '0' + (num
/ 10);
6364 /* Product revision - 5th digit. */
6365 *cp
++ = 'A' + (num
% 10);
6375 * If bit 15 of third word is set, then the
6376 * last digit of the year is greater than 7.
6378 if (serialnum
[2] & 0x8000) {
6379 *cp
++ = '8' + ((w
& 0x1C0) >> 6);
6381 *cp
++ = '0' + ((w
& 0x1C0) >> 6);
6384 /* Week of year - 7th, 8th digits. */
6386 *cp
++ = '0' + num
/ 10;
6393 w
= serialnum
[2] & 0x7FFF;
6395 /* Serial number - 9th digit. */
6396 *cp
++ = 'A' + (w
/ 1000);
6398 /* 10th, 11th, 12th digits. */
6400 *cp
++ = '0' + num
/ 100;
6402 *cp
++ = '0' + num
/ 10;
6406 *cp
= '\0'; /* Null Terminate the string. */
6412 * asc_prt_asc_board_eeprom()
6414 * Print board EEPROM configuration.
6416 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6417 * cf. asc_prt_line().
6419 * Return the number of characters copied into 'cp'. No more than
6420 * 'cplen' characters will be copied to 'cp'.
6422 static int asc_prt_asc_board_eeprom(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6424 asc_board_t
*boardp
;
6425 ASC_DVC_VAR
*asc_dvc_varp
;
6432 int isa_dma_speed
[] = { 10, 8, 7, 6, 5, 4, 3, 2 };
6433 #endif /* CONFIG_ISA */
6434 uchar serialstr
[13];
6436 boardp
= ASC_BOARDP(shost
);
6437 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
6438 ep
= &boardp
->eep_config
.asc_eep
;
6443 len
= asc_prt_line(cp
, leftlen
,
6444 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
6448 if (asc_get_eeprom_string((ushort
*)&ep
->adapter_info
[0], serialstr
)
6451 asc_prt_line(cp
, leftlen
, " Serial Number: %s\n",
6455 if (ep
->adapter_info
[5] == 0xBB) {
6456 len
= asc_prt_line(cp
, leftlen
,
6457 " Default Settings Used for EEPROM-less Adapter.\n");
6460 len
= asc_prt_line(cp
, leftlen
,
6461 " Serial Number Signature Not Present.\n");
6466 len
= asc_prt_line(cp
, leftlen
,
6467 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6468 ASC_EEP_GET_CHIP_ID(ep
), ep
->max_total_qng
,
6472 len
= asc_prt_line(cp
, leftlen
,
6473 " cntl 0x%x, no_scam 0x%x\n", ep
->cntl
, ep
->no_scam
);
6476 len
= asc_prt_line(cp
, leftlen
, " Target ID: ");
6478 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6479 len
= asc_prt_line(cp
, leftlen
, " %d", i
);
6482 len
= asc_prt_line(cp
, leftlen
, "\n");
6485 len
= asc_prt_line(cp
, leftlen
, " Disconnects: ");
6487 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6488 len
= asc_prt_line(cp
, leftlen
, " %c",
6490 disc_enable
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6494 len
= asc_prt_line(cp
, leftlen
, "\n");
6497 len
= asc_prt_line(cp
, leftlen
, " Command Queuing: ");
6499 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6500 len
= asc_prt_line(cp
, leftlen
, " %c",
6502 use_cmd_qng
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6506 len
= asc_prt_line(cp
, leftlen
, "\n");
6509 len
= asc_prt_line(cp
, leftlen
, " Start Motor: ");
6511 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6512 len
= asc_prt_line(cp
, leftlen
, " %c",
6514 start_motor
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6518 len
= asc_prt_line(cp
, leftlen
, "\n");
6521 len
= asc_prt_line(cp
, leftlen
, " Synchronous Transfer:");
6523 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6524 len
= asc_prt_line(cp
, leftlen
, " %c",
6526 init_sdtr
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6530 len
= asc_prt_line(cp
, leftlen
, "\n");
6534 if (asc_dvc_varp
->bus_type
& ASC_IS_ISA
) {
6535 len
= asc_prt_line(cp
, leftlen
,
6536 " Host ISA DMA speed: %d MB/S\n",
6537 isa_dma_speed
[ASC_EEP_GET_DMA_SPD(ep
)]);
6540 #endif /* CONFIG_ISA */
6546 * asc_prt_adv_board_eeprom()
6548 * Print board EEPROM configuration.
6550 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6551 * cf. asc_prt_line().
6553 * Return the number of characters copied into 'cp'. No more than
6554 * 'cplen' characters will be copied to 'cp'.
6556 static int asc_prt_adv_board_eeprom(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6558 asc_board_t
*boardp
;
6559 ADV_DVC_VAR
*adv_dvc_varp
;
6565 uchar serialstr
[13];
6566 ADVEEP_3550_CONFIG
*ep_3550
= NULL
;
6567 ADVEEP_38C0800_CONFIG
*ep_38C0800
= NULL
;
6568 ADVEEP_38C1600_CONFIG
*ep_38C1600
= NULL
;
6571 ushort sdtr_speed
= 0;
6573 boardp
= ASC_BOARDP(shost
);
6574 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
6575 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6576 ep_3550
= &boardp
->eep_config
.adv_3550_eep
;
6577 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6578 ep_38C0800
= &boardp
->eep_config
.adv_38C0800_eep
;
6580 ep_38C1600
= &boardp
->eep_config
.adv_38C1600_eep
;
6586 len
= asc_prt_line(cp
, leftlen
,
6587 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
6591 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6592 wordp
= &ep_3550
->serial_number_word1
;
6593 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6594 wordp
= &ep_38C0800
->serial_number_word1
;
6596 wordp
= &ep_38C1600
->serial_number_word1
;
6599 if (asc_get_eeprom_string(wordp
, serialstr
) == ASC_TRUE
) {
6601 asc_prt_line(cp
, leftlen
, " Serial Number: %s\n",
6605 len
= asc_prt_line(cp
, leftlen
,
6606 " Serial Number Signature Not Present.\n");
6610 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6611 len
= asc_prt_line(cp
, leftlen
,
6612 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6613 ep_3550
->adapter_scsi_id
,
6614 ep_3550
->max_host_qng
, ep_3550
->max_dvc_qng
);
6616 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6617 len
= asc_prt_line(cp
, leftlen
,
6618 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6619 ep_38C0800
->adapter_scsi_id
,
6620 ep_38C0800
->max_host_qng
,
6621 ep_38C0800
->max_dvc_qng
);
6624 len
= asc_prt_line(cp
, leftlen
,
6625 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6626 ep_38C1600
->adapter_scsi_id
,
6627 ep_38C1600
->max_host_qng
,
6628 ep_38C1600
->max_dvc_qng
);
6631 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6632 word
= ep_3550
->termination
;
6633 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6634 word
= ep_38C0800
->termination_lvd
;
6636 word
= ep_38C1600
->termination_lvd
;
6640 termstr
= "Low Off/High Off";
6643 termstr
= "Low Off/High On";
6646 termstr
= "Low On/High On";
6650 termstr
= "Automatic";
6654 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6655 len
= asc_prt_line(cp
, leftlen
,
6656 " termination: %u (%s), bios_ctrl: 0x%x\n",
6657 ep_3550
->termination
, termstr
,
6658 ep_3550
->bios_ctrl
);
6660 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6661 len
= asc_prt_line(cp
, leftlen
,
6662 " termination: %u (%s), bios_ctrl: 0x%x\n",
6663 ep_38C0800
->termination_lvd
, termstr
,
6664 ep_38C0800
->bios_ctrl
);
6667 len
= asc_prt_line(cp
, leftlen
,
6668 " termination: %u (%s), bios_ctrl: 0x%x\n",
6669 ep_38C1600
->termination_lvd
, termstr
,
6670 ep_38C1600
->bios_ctrl
);
6674 len
= asc_prt_line(cp
, leftlen
, " Target ID: ");
6676 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6677 len
= asc_prt_line(cp
, leftlen
, " %X", i
);
6680 len
= asc_prt_line(cp
, leftlen
, "\n");
6683 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6684 word
= ep_3550
->disc_enable
;
6685 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6686 word
= ep_38C0800
->disc_enable
;
6688 word
= ep_38C1600
->disc_enable
;
6690 len
= asc_prt_line(cp
, leftlen
, " Disconnects: ");
6692 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6693 len
= asc_prt_line(cp
, leftlen
, " %c",
6694 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6697 len
= asc_prt_line(cp
, leftlen
, "\n");
6700 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6701 word
= ep_3550
->tagqng_able
;
6702 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6703 word
= ep_38C0800
->tagqng_able
;
6705 word
= ep_38C1600
->tagqng_able
;
6707 len
= asc_prt_line(cp
, leftlen
, " Command Queuing: ");
6709 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6710 len
= asc_prt_line(cp
, leftlen
, " %c",
6711 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6714 len
= asc_prt_line(cp
, leftlen
, "\n");
6717 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6718 word
= ep_3550
->start_motor
;
6719 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6720 word
= ep_38C0800
->start_motor
;
6722 word
= ep_38C1600
->start_motor
;
6724 len
= asc_prt_line(cp
, leftlen
, " Start Motor: ");
6726 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6727 len
= asc_prt_line(cp
, leftlen
, " %c",
6728 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6731 len
= asc_prt_line(cp
, leftlen
, "\n");
6734 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6735 len
= asc_prt_line(cp
, leftlen
, " Synchronous Transfer:");
6737 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6738 len
= asc_prt_line(cp
, leftlen
, " %c",
6740 sdtr_able
& ADV_TID_TO_TIDMASK(i
)) ?
6744 len
= asc_prt_line(cp
, leftlen
, "\n");
6748 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6749 len
= asc_prt_line(cp
, leftlen
, " Ultra Transfer: ");
6751 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6752 len
= asc_prt_line(cp
, leftlen
, " %c",
6754 ultra_able
& ADV_TID_TO_TIDMASK(i
))
6758 len
= asc_prt_line(cp
, leftlen
, "\n");
6762 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6763 word
= ep_3550
->wdtr_able
;
6764 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6765 word
= ep_38C0800
->wdtr_able
;
6767 word
= ep_38C1600
->wdtr_able
;
6769 len
= asc_prt_line(cp
, leftlen
, " Wide Transfer: ");
6771 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6772 len
= asc_prt_line(cp
, leftlen
, " %c",
6773 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6776 len
= asc_prt_line(cp
, leftlen
, "\n");
6779 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
||
6780 adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C1600
) {
6781 len
= asc_prt_line(cp
, leftlen
,
6782 " Synchronous Transfer Speed (Mhz):\n ");
6784 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6788 sdtr_speed
= adv_dvc_varp
->sdtr_speed1
;
6789 } else if (i
== 4) {
6790 sdtr_speed
= adv_dvc_varp
->sdtr_speed2
;
6791 } else if (i
== 8) {
6792 sdtr_speed
= adv_dvc_varp
->sdtr_speed3
;
6793 } else if (i
== 12) {
6794 sdtr_speed
= adv_dvc_varp
->sdtr_speed4
;
6796 switch (sdtr_speed
& ADV_MAX_TID
) {
6819 len
= asc_prt_line(cp
, leftlen
, "%X:%s ", i
, speed_str
);
6822 len
= asc_prt_line(cp
, leftlen
, "\n ");
6827 len
= asc_prt_line(cp
, leftlen
, "\n");
6835 * asc_prt_driver_conf()
6837 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6838 * cf. asc_prt_line().
6840 * Return the number of characters copied into 'cp'. No more than
6841 * 'cplen' characters will be copied to 'cp'.
6843 static int asc_prt_driver_conf(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6845 asc_board_t
*boardp
;
6851 boardp
= ASC_BOARDP(shost
);
6856 len
= asc_prt_line(cp
, leftlen
,
6857 "\nLinux Driver Configuration and Information for AdvanSys SCSI Host %d:\n",
6861 len
= asc_prt_line(cp
, leftlen
,
6862 " host_busy %u, last_reset %u, max_id %u, max_lun %u, max_channel %u\n",
6863 shost
->host_busy
, shost
->last_reset
, shost
->max_id
,
6864 shost
->max_lun
, shost
->max_channel
);
6867 len
= asc_prt_line(cp
, leftlen
,
6868 " unique_id %d, can_queue %d, this_id %d, sg_tablesize %u, cmd_per_lun %u\n",
6869 shost
->unique_id
, shost
->can_queue
, shost
->this_id
,
6870 shost
->sg_tablesize
, shost
->cmd_per_lun
);
6873 len
= asc_prt_line(cp
, leftlen
,
6874 " unchecked_isa_dma %d, use_clustering %d\n",
6875 shost
->unchecked_isa_dma
, shost
->use_clustering
);
6878 len
= asc_prt_line(cp
, leftlen
,
6879 " flags 0x%x, last_reset 0x%x, jiffies 0x%x, asc_n_io_port 0x%x\n",
6880 boardp
->flags
, boardp
->last_reset
, jiffies
,
6881 boardp
->asc_n_io_port
);
6884 /* 'shost->n_io_port' may be truncated because it is only one byte. */
6885 len
= asc_prt_line(cp
, leftlen
,
6886 " io_port 0x%x, n_io_port 0x%x\n",
6887 shost
->io_port
, shost
->n_io_port
);
6890 if (ASC_NARROW_BOARD(boardp
)) {
6891 chip_scsi_id
= boardp
->dvc_cfg
.asc_dvc_cfg
.chip_scsi_id
;
6893 chip_scsi_id
= boardp
->dvc_var
.adv_dvc_var
.chip_scsi_id
;
6900 * asc_prt_asc_board_info()
6902 * Print dynamic board configuration information.
6904 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6905 * cf. asc_prt_line().
6907 * Return the number of characters copied into 'cp'. No more than
6908 * 'cplen' characters will be copied to 'cp'.
6910 static int asc_prt_asc_board_info(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6912 asc_board_t
*boardp
;
6920 int renegotiate
= 0;
6922 boardp
= ASC_BOARDP(shost
);
6923 v
= &boardp
->dvc_var
.asc_dvc_var
;
6924 c
= &boardp
->dvc_cfg
.asc_dvc_cfg
;
6925 chip_scsi_id
= c
->chip_scsi_id
;
6930 len
= asc_prt_line(cp
, leftlen
,
6931 "\nAsc Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
6935 len
= asc_prt_line(cp
, leftlen
,
6936 " chip_version %u, lib_version 0x%x, lib_serial_no %u, mcode_date 0x%x\n",
6937 c
->chip_version
, c
->lib_version
, c
->lib_serial_no
,
6941 len
= asc_prt_line(cp
, leftlen
,
6942 " mcode_version 0x%x, err_code %u\n",
6943 c
->mcode_version
, v
->err_code
);
6946 /* Current number of commands waiting for the host. */
6947 len
= asc_prt_line(cp
, leftlen
,
6948 " Total Command Pending: %d\n", v
->cur_total_qng
);
6951 len
= asc_prt_line(cp
, leftlen
, " Command Queuing:");
6953 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6954 if ((chip_scsi_id
== i
) ||
6955 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6958 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
6961 use_tagged_qng
& ADV_TID_TO_TIDMASK(i
)) ?
6965 len
= asc_prt_line(cp
, leftlen
, "\n");
6968 /* Current number of commands waiting for a device. */
6969 len
= asc_prt_line(cp
, leftlen
, " Command Queue Pending:");
6971 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6972 if ((chip_scsi_id
== i
) ||
6973 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6976 len
= asc_prt_line(cp
, leftlen
, " %X:%u", i
, v
->cur_dvc_qng
[i
]);
6979 len
= asc_prt_line(cp
, leftlen
, "\n");
6982 /* Current limit on number of commands that can be sent to a device. */
6983 len
= asc_prt_line(cp
, leftlen
, " Command Queue Limit:");
6985 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6986 if ((chip_scsi_id
== i
) ||
6987 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6990 len
= asc_prt_line(cp
, leftlen
, " %X:%u", i
, v
->max_dvc_qng
[i
]);
6993 len
= asc_prt_line(cp
, leftlen
, "\n");
6996 /* Indicate whether the device has returned queue full status. */
6997 len
= asc_prt_line(cp
, leftlen
, " Command Queue Full:");
6999 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
7000 if ((chip_scsi_id
== i
) ||
7001 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7004 if (boardp
->queue_full
& ADV_TID_TO_TIDMASK(i
)) {
7005 len
= asc_prt_line(cp
, leftlen
, " %X:Y-%d",
7006 i
, boardp
->queue_full_cnt
[i
]);
7008 len
= asc_prt_line(cp
, leftlen
, " %X:N", i
);
7012 len
= asc_prt_line(cp
, leftlen
, "\n");
7015 len
= asc_prt_line(cp
, leftlen
, " Synchronous Transfer:");
7017 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
7018 if ((chip_scsi_id
== i
) ||
7019 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7022 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
7025 sdtr_done
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
7029 len
= asc_prt_line(cp
, leftlen
, "\n");
7032 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
7033 uchar syn_period_ix
;
7035 if ((chip_scsi_id
== i
) ||
7036 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0) ||
7037 ((v
->init_sdtr
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7041 len
= asc_prt_line(cp
, leftlen
, " %X:", i
);
7044 if ((boardp
->sdtr_data
[i
] & ASC_SYN_MAX_OFFSET
) == 0) {
7045 len
= asc_prt_line(cp
, leftlen
, " Asynchronous");
7049 (boardp
->sdtr_data
[i
] >> 4) & (v
->max_sdtr_index
-
7052 len
= asc_prt_line(cp
, leftlen
,
7053 " Transfer Period Factor: %d (%d.%d Mhz),",
7054 v
->sdtr_period_tbl
[syn_period_ix
],
7056 v
->sdtr_period_tbl
[syn_period_ix
],
7063 len
= asc_prt_line(cp
, leftlen
, " REQ/ACK Offset: %d",
7065 sdtr_data
[i
] & ASC_SYN_MAX_OFFSET
);
7069 if ((v
->sdtr_done
& ADV_TID_TO_TIDMASK(i
)) == 0) {
7070 len
= asc_prt_line(cp
, leftlen
, "*\n");
7073 len
= asc_prt_line(cp
, leftlen
, "\n");
7079 len
= asc_prt_line(cp
, leftlen
,
7080 " * = Re-negotiation pending before next command.\n");
7088 * asc_prt_adv_board_info()
7090 * Print dynamic board configuration information.
7092 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
7093 * cf. asc_prt_line().
7095 * Return the number of characters copied into 'cp'. No more than
7096 * 'cplen' characters will be copied to 'cp'.
7098 static int asc_prt_adv_board_info(struct Scsi_Host
*shost
, char *cp
, int cplen
)
7100 asc_board_t
*boardp
;
7107 AdvPortAddr iop_base
;
7108 ushort chip_scsi_id
;
7112 ushort sdtr_able
, wdtr_able
;
7113 ushort wdtr_done
, sdtr_done
;
7115 int renegotiate
= 0;
7117 boardp
= ASC_BOARDP(shost
);
7118 v
= &boardp
->dvc_var
.adv_dvc_var
;
7119 c
= &boardp
->dvc_cfg
.adv_dvc_cfg
;
7120 iop_base
= v
->iop_base
;
7121 chip_scsi_id
= v
->chip_scsi_id
;
7126 len
= asc_prt_line(cp
, leftlen
,
7127 "\nAdv Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
7131 len
= asc_prt_line(cp
, leftlen
,
7132 " iop_base 0x%lx, cable_detect: %X, err_code %u\n",
7134 AdvReadWordRegister(iop_base
,
7135 IOPW_SCSI_CFG1
) & CABLE_DETECT
,
7139 len
= asc_prt_line(cp
, leftlen
,
7140 " chip_version %u, lib_version 0x%x, mcode_date 0x%x, mcode_version 0x%x\n",
7141 c
->chip_version
, c
->lib_version
, c
->mcode_date
,
7145 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
7146 len
= asc_prt_line(cp
, leftlen
, " Queuing Enabled:");
7148 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7149 if ((chip_scsi_id
== i
) ||
7150 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7154 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
7156 (tagqng_able
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
7160 len
= asc_prt_line(cp
, leftlen
, "\n");
7163 len
= asc_prt_line(cp
, leftlen
, " Queue Limit:");
7165 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7166 if ((chip_scsi_id
== i
) ||
7167 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7171 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ i
,
7174 len
= asc_prt_line(cp
, leftlen
, " %X:%d", i
, lrambyte
);
7177 len
= asc_prt_line(cp
, leftlen
, "\n");
7180 len
= asc_prt_line(cp
, leftlen
, " Command Pending:");
7182 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7183 if ((chip_scsi_id
== i
) ||
7184 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7188 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_QUEUED_CMD
+ i
,
7191 len
= asc_prt_line(cp
, leftlen
, " %X:%d", i
, lrambyte
);
7194 len
= asc_prt_line(cp
, leftlen
, "\n");
7197 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
7198 len
= asc_prt_line(cp
, leftlen
, " Wide Enabled:");
7200 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7201 if ((chip_scsi_id
== i
) ||
7202 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7206 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
7208 (wdtr_able
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
7212 len
= asc_prt_line(cp
, leftlen
, "\n");
7215 AdvReadWordLram(iop_base
, ASC_MC_WDTR_DONE
, wdtr_done
);
7216 len
= asc_prt_line(cp
, leftlen
, " Transfer Bit Width:");
7218 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7219 if ((chip_scsi_id
== i
) ||
7220 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7224 AdvReadWordLram(iop_base
,
7225 ASC_MC_DEVICE_HSHK_CFG_TABLE
+ (2 * i
),
7228 len
= asc_prt_line(cp
, leftlen
, " %X:%d",
7229 i
, (lramword
& 0x8000) ? 16 : 8);
7232 if ((wdtr_able
& ADV_TID_TO_TIDMASK(i
)) &&
7233 (wdtr_done
& ADV_TID_TO_TIDMASK(i
)) == 0) {
7234 len
= asc_prt_line(cp
, leftlen
, "*");
7239 len
= asc_prt_line(cp
, leftlen
, "\n");
7242 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
7243 len
= asc_prt_line(cp
, leftlen
, " Synchronous Enabled:");
7245 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7246 if ((chip_scsi_id
== i
) ||
7247 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7251 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
7253 (sdtr_able
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
7257 len
= asc_prt_line(cp
, leftlen
, "\n");
7260 AdvReadWordLram(iop_base
, ASC_MC_SDTR_DONE
, sdtr_done
);
7261 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7263 AdvReadWordLram(iop_base
,
7264 ASC_MC_DEVICE_HSHK_CFG_TABLE
+ (2 * i
),
7266 lramword
&= ~0x8000;
7268 if ((chip_scsi_id
== i
) ||
7269 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0) ||
7270 ((sdtr_able
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7274 len
= asc_prt_line(cp
, leftlen
, " %X:", i
);
7277 if ((lramword
& 0x1F) == 0) { /* Check for REQ/ACK Offset 0. */
7278 len
= asc_prt_line(cp
, leftlen
, " Asynchronous");
7282 asc_prt_line(cp
, leftlen
,
7283 " Transfer Period Factor: ");
7286 if ((lramword
& 0x1F00) == 0x1100) { /* 80 Mhz */
7288 asc_prt_line(cp
, leftlen
, "9 (80.0 Mhz),");
7290 } else if ((lramword
& 0x1F00) == 0x1000) { /* 40 Mhz */
7292 asc_prt_line(cp
, leftlen
, "10 (40.0 Mhz),");
7294 } else { /* 20 Mhz or below. */
7296 period
= (((lramword
>> 8) * 25) + 50) / 4;
7298 if (period
== 0) { /* Should never happen. */
7300 asc_prt_line(cp
, leftlen
,
7304 len
= asc_prt_line(cp
, leftlen
,
7306 period
, 250 / period
,
7313 len
= asc_prt_line(cp
, leftlen
, " REQ/ACK Offset: %d",
7318 if ((sdtr_done
& ADV_TID_TO_TIDMASK(i
)) == 0) {
7319 len
= asc_prt_line(cp
, leftlen
, "*\n");
7322 len
= asc_prt_line(cp
, leftlen
, "\n");
7328 len
= asc_prt_line(cp
, leftlen
,
7329 " * = Re-negotiation pending before next command.\n");
7339 * Copy proc information to a read buffer taking into account the current
7340 * read offset in the file and the remaining space in the read buffer.
7343 asc_proc_copy(off_t advoffset
, off_t offset
, char *curbuf
, int leftlen
,
7344 char *cp
, int cplen
)
7348 ASC_DBG3(2, "asc_proc_copy: offset %d, advoffset %d, cplen %d\n",
7349 (unsigned)offset
, (unsigned)advoffset
, cplen
);
7350 if (offset
<= advoffset
) {
7351 /* Read offset below current offset, copy everything. */
7352 cnt
= min(cplen
, leftlen
);
7353 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
7354 (ulong
)curbuf
, (ulong
)cp
, cnt
);
7355 memcpy(curbuf
, cp
, cnt
);
7356 } else if (offset
< advoffset
+ cplen
) {
7357 /* Read offset within current range, partial copy. */
7358 cnt
= (advoffset
+ cplen
) - offset
;
7359 cp
= (cp
+ cplen
) - cnt
;
7360 cnt
= min(cnt
, leftlen
);
7361 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
7362 (ulong
)curbuf
, (ulong
)cp
, cnt
);
7363 memcpy(curbuf
, cp
, cnt
);
7371 * If 'cp' is NULL print to the console, otherwise print to a buffer.
7373 * Return 0 if printing to the console, otherwise return the number of
7374 * bytes written to the buffer.
7376 * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack
7377 * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes.
7379 static int asc_prt_line(char *buf
, int buflen
, char *fmt
, ...)
7383 char s
[ASC_PRTLINE_SIZE
];
7385 va_start(args
, fmt
);
7386 ret
= vsprintf(s
, fmt
, args
);
7387 ASC_ASSERT(ret
< ASC_PRTLINE_SIZE
);
7392 ret
= min(buflen
, ret
);
7393 memcpy(buf
, s
, ret
);
7398 #endif /* CONFIG_PROC_FS */
7401 * --- Functions Required by the Asc Library
7405 * Delay for 'n' milliseconds. Don't use the 'jiffies'
7406 * global variable which is incremented once every 5 ms
7407 * from a timer interrupt, because this function may be
7408 * called when interrupts are disabled.
7410 static void DvcSleepMilliSecond(ADV_DCNT n
)
7412 ASC_DBG1(4, "DvcSleepMilliSecond: %lu\n", (ulong
)n
);
7417 * Currently and inline noop but leave as a placeholder.
7418 * Leave DvcEnterCritical() as a noop placeholder.
7420 static inline ulong
DvcEnterCritical(void)
7426 * Critical sections are all protected by the board spinlock.
7427 * Leave DvcLeaveCritical() as a noop placeholder.
7429 static inline void DvcLeaveCritical(ulong flags
)
7436 * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
7438 * Calling/Exit State:
7442 * Output an ASC_SCSI_Q structure to the chip
7445 DvcPutScsiQ(PortAddr iop_base
, ushort s_addr
, uchar
*outbuf
, int words
)
7449 ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf
, 2 * words
);
7450 AscSetChipLramAddr(iop_base
, s_addr
);
7451 for (i
= 0; i
< 2 * words
; i
+= 2) {
7452 if (i
== 4 || i
== 20) {
7455 outpw(iop_base
+ IOP_RAM_DATA
,
7456 ((ushort
)outbuf
[i
+ 1] << 8) | outbuf
[i
]);
7462 * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
7464 * Calling/Exit State:
7468 * Input an ASC_QDONE_INFO structure from the chip
7471 DvcGetQinfo(PortAddr iop_base
, ushort s_addr
, uchar
*inbuf
, int words
)
7476 AscSetChipLramAddr(iop_base
, s_addr
);
7477 for (i
= 0; i
< 2 * words
; i
+= 2) {
7481 word
= inpw(iop_base
+ IOP_RAM_DATA
);
7482 inbuf
[i
] = word
& 0xff;
7483 inbuf
[i
+ 1] = (word
>> 8) & 0xff;
7485 ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf
, 2 * words
);
7489 * Read a PCI configuration byte.
7491 static uchar __init
DvcReadPCIConfigByte(ASC_DVC_VAR
*asc_dvc
, ushort offset
)
7495 pci_read_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, &byte_data
);
7497 #else /* !defined(CONFIG_PCI) */
7499 #endif /* !defined(CONFIG_PCI) */
7503 * Write a PCI configuration byte.
7506 DvcWritePCIConfigByte(ASC_DVC_VAR
*asc_dvc
, ushort offset
, uchar byte_data
)
7509 pci_write_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, byte_data
);
7510 #endif /* CONFIG_PCI */
7514 * Return the BIOS address of the adapter at the specified
7515 * I/O port and with the specified bus type.
7517 static ushort __init
AscGetChipBiosAddress(PortAddr iop_base
, ushort bus_type
)
7523 * The PCI BIOS is re-located by the motherboard BIOS. Because
7524 * of this the driver can not determine where a PCI BIOS is
7525 * loaded and executes.
7527 if (bus_type
& ASC_IS_PCI
) {
7531 if ((bus_type
& ASC_IS_EISA
) != 0) {
7532 cfg_lsw
= AscGetEisaChipCfg(iop_base
);
7534 bios_addr
= (ushort
)(ASC_BIOS_MIN_ADDR
+
7535 (cfg_lsw
* ASC_BIOS_BANK_SIZE
));
7538 #endif /* CONFIG_ISA */
7540 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
7543 * ISA PnP uses the top bit as the 32K BIOS flag
7545 if (bus_type
== ASC_IS_ISAPNP
) {
7549 bios_addr
= (ushort
)(((cfg_lsw
>> 12) * ASC_BIOS_BANK_SIZE
) +
7555 * --- Functions Required by the Adv Library
7561 * Return the physical address of 'vaddr' and set '*lenp' to the
7562 * number of physically contiguous bytes that follow 'vaddr'.
7563 * 'flag' indicates the type of structure whose physical address
7564 * is being translated.
7566 * Note: Because Linux currently doesn't page the kernel and all
7567 * kernel buffers are physically contiguous, leave '*lenp' unchanged.
7570 DvcGetPhyAddr(ADV_DVC_VAR
*asc_dvc
, ADV_SCSI_REQ_Q
*scsiq
,
7571 uchar
*vaddr
, ADV_SDCNT
*lenp
, int flag
)
7575 paddr
= virt_to_bus(vaddr
);
7578 "DvcGetPhyAddr: vaddr 0x%lx, lenp 0x%lx *lenp %lu, paddr 0x%lx\n",
7579 (ulong
)vaddr
, (ulong
)lenp
, (ulong
)*((ulong
*)lenp
),
7586 * Read a PCI configuration byte.
7588 static uchar __init
DvcAdvReadPCIConfigByte(ADV_DVC_VAR
*asc_dvc
, ushort offset
)
7592 pci_read_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, &byte_data
);
7594 #else /* CONFIG_PCI */
7596 #endif /* CONFIG_PCI */
7600 * Write a PCI configuration byte.
7603 DvcAdvWritePCIConfigByte(ADV_DVC_VAR
*asc_dvc
, ushort offset
, uchar byte_data
)
7606 pci_write_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, byte_data
);
7607 #else /* CONFIG_PCI */
7609 #endif /* CONFIG_PCI */
7613 * --- Tracing and Debugging Functions
7616 #ifdef ADVANSYS_STATS
7617 #ifdef CONFIG_PROC_FS
7619 * asc_prt_board_stats()
7621 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
7622 * cf. asc_prt_line().
7624 * Return the number of characters copied into 'cp'. No more than
7625 * 'cplen' characters will be copied to 'cp'.
7627 static int asc_prt_board_stats(struct Scsi_Host
*shost
, char *cp
, int cplen
)
7632 struct asc_stats
*s
;
7633 asc_board_t
*boardp
;
7638 boardp
= ASC_BOARDP(shost
);
7639 s
= &boardp
->asc_stats
;
7641 len
= asc_prt_line(cp
, leftlen
,
7642 "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n",
7646 len
= asc_prt_line(cp
, leftlen
,
7647 " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n",
7648 s
->queuecommand
, s
->reset
, s
->biosparam
,
7652 len
= asc_prt_line(cp
, leftlen
,
7653 " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n",
7654 s
->callback
, s
->done
, s
->build_error
,
7655 s
->adv_build_noreq
, s
->adv_build_nosg
);
7658 len
= asc_prt_line(cp
, leftlen
,
7659 " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n",
7660 s
->exe_noerror
, s
->exe_busy
, s
->exe_error
,
7665 * Display data transfer statistics.
7667 if (s
->cont_cnt
> 0) {
7668 len
= asc_prt_line(cp
, leftlen
, " cont_cnt %lu, ", s
->cont_cnt
);
7671 len
= asc_prt_line(cp
, leftlen
, "cont_xfer %lu.%01lu kb ",
7673 ASC_TENTHS(s
->cont_xfer
, 2));
7676 /* Contiguous transfer average size */
7677 len
= asc_prt_line(cp
, leftlen
, "avg_xfer %lu.%01lu kb\n",
7678 (s
->cont_xfer
/ 2) / s
->cont_cnt
,
7679 ASC_TENTHS((s
->cont_xfer
/ 2), s
->cont_cnt
));
7683 if (s
->sg_cnt
> 0) {
7685 len
= asc_prt_line(cp
, leftlen
, " sg_cnt %lu, sg_elem %lu, ",
7686 s
->sg_cnt
, s
->sg_elem
);
7689 len
= asc_prt_line(cp
, leftlen
, "sg_xfer %lu.%01lu kb\n",
7690 s
->sg_xfer
/ 2, ASC_TENTHS(s
->sg_xfer
, 2));
7693 /* Scatter gather transfer statistics */
7694 len
= asc_prt_line(cp
, leftlen
, " avg_num_elem %lu.%01lu, ",
7695 s
->sg_elem
/ s
->sg_cnt
,
7696 ASC_TENTHS(s
->sg_elem
, s
->sg_cnt
));
7699 len
= asc_prt_line(cp
, leftlen
, "avg_elem_size %lu.%01lu kb, ",
7700 (s
->sg_xfer
/ 2) / s
->sg_elem
,
7701 ASC_TENTHS((s
->sg_xfer
/ 2), s
->sg_elem
));
7704 len
= asc_prt_line(cp
, leftlen
, "avg_xfer_size %lu.%01lu kb\n",
7705 (s
->sg_xfer
/ 2) / s
->sg_cnt
,
7706 ASC_TENTHS((s
->sg_xfer
/ 2), s
->sg_cnt
));
7711 * Display request queuing statistics.
7713 len
= asc_prt_line(cp
, leftlen
,
7714 " Active and Waiting Request Queues (Time Unit: %d HZ):\n",
7722 * asc_prt_target_stats()
7724 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
7725 * cf. asc_prt_line().
7727 * This is separated from asc_prt_board_stats because a full set
7728 * of targets will overflow ASC_PRTBUF_SIZE.
7730 * Return the number of characters copied into 'cp'. No more than
7731 * 'cplen' characters will be copied to 'cp'.
7734 asc_prt_target_stats(struct Scsi_Host
*shost
, int tgt_id
, char *cp
, int cplen
)
7739 struct asc_stats
*s
;
7740 ushort chip_scsi_id
;
7741 asc_board_t
*boardp
;
7742 asc_queue_t
*active
;
7743 asc_queue_t
*waiting
;
7748 boardp
= ASC_BOARDP(shost
);
7749 s
= &boardp
->asc_stats
;
7751 active
= &ASC_BOARDP(shost
)->active
;
7752 waiting
= &ASC_BOARDP(shost
)->waiting
;
7754 if (ASC_NARROW_BOARD(boardp
)) {
7755 chip_scsi_id
= boardp
->dvc_cfg
.asc_dvc_cfg
.chip_scsi_id
;
7757 chip_scsi_id
= boardp
->dvc_var
.adv_dvc_var
.chip_scsi_id
;
7760 if ((chip_scsi_id
== tgt_id
) ||
7761 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(tgt_id
)) == 0)) {
7766 if (active
->q_tot_cnt
[tgt_id
] > 0
7767 || waiting
->q_tot_cnt
[tgt_id
] > 0) {
7768 len
= asc_prt_line(cp
, leftlen
, " target %d\n", tgt_id
);
7771 len
= asc_prt_line(cp
, leftlen
,
7772 " active: cnt [cur %d, max %d, tot %u], time [min %d, max %d, avg %lu.%01lu]\n",
7773 active
->q_cur_cnt
[tgt_id
],
7774 active
->q_max_cnt
[tgt_id
],
7775 active
->q_tot_cnt
[tgt_id
],
7776 active
->q_min_tim
[tgt_id
],
7777 active
->q_max_tim
[tgt_id
],
7778 (active
->q_tot_cnt
[tgt_id
] ==
7783 (active
->q_tot_cnt
[tgt_id
] ==
7784 0) ? 0 : ASC_TENTHS(active
->
7792 len
= asc_prt_line(cp
, leftlen
,
7793 " waiting: cnt [cur %d, max %d, tot %u], time [min %u, max %u, avg %lu.%01lu]\n",
7794 waiting
->q_cur_cnt
[tgt_id
],
7795 waiting
->q_max_cnt
[tgt_id
],
7796 waiting
->q_tot_cnt
[tgt_id
],
7797 waiting
->q_min_tim
[tgt_id
],
7798 waiting
->q_max_tim
[tgt_id
],
7799 (waiting
->q_tot_cnt
[tgt_id
] ==
7804 (waiting
->q_tot_cnt
[tgt_id
] ==
7805 0) ? 0 : ASC_TENTHS(waiting
->
7817 #endif /* CONFIG_PROC_FS */
7818 #endif /* ADVANSYS_STATS */
7820 #ifdef ADVANSYS_DEBUG
7822 * asc_prt_scsi_host()
7824 static void asc_prt_scsi_host(struct Scsi_Host
*s
)
7826 asc_board_t
*boardp
;
7828 boardp
= ASC_BOARDP(s
);
7830 printk("Scsi_Host at addr 0x%lx\n", (ulong
)s
);
7831 printk(" host_busy %u, host_no %d, last_reset %d,\n",
7832 s
->host_busy
, s
->host_no
, (unsigned)s
->last_reset
);
7834 printk(" base 0x%lx, io_port 0x%lx, n_io_port %u, irq 0x%x,\n",
7835 (ulong
)s
->base
, (ulong
)s
->io_port
, s
->n_io_port
, s
->irq
);
7837 printk(" dma_channel %d, this_id %d, can_queue %d,\n",
7838 s
->dma_channel
, s
->this_id
, s
->can_queue
);
7840 printk(" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n",
7841 s
->cmd_per_lun
, s
->sg_tablesize
, s
->unchecked_isa_dma
);
7843 if (ASC_NARROW_BOARD(boardp
)) {
7844 asc_prt_asc_dvc_var(&ASC_BOARDP(s
)->dvc_var
.asc_dvc_var
);
7845 asc_prt_asc_dvc_cfg(&ASC_BOARDP(s
)->dvc_cfg
.asc_dvc_cfg
);
7847 asc_prt_adv_dvc_var(&ASC_BOARDP(s
)->dvc_var
.adv_dvc_var
);
7848 asc_prt_adv_dvc_cfg(&ASC_BOARDP(s
)->dvc_cfg
.adv_dvc_cfg
);
7853 * asc_prt_scsi_cmnd()
7855 static void asc_prt_scsi_cmnd(struct scsi_cmnd
*s
)
7857 printk("struct scsi_cmnd at addr 0x%lx\n", (ulong
)s
);
7859 printk(" host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,\n",
7860 (ulong
)s
->device
->host
, (ulong
)s
->device
, s
->device
->id
,
7861 s
->device
->lun
, s
->device
->channel
);
7863 asc_prt_hex(" CDB", s
->cmnd
, s
->cmd_len
);
7865 printk("sc_data_direction %u, resid %d\n",
7866 s
->sc_data_direction
, s
->resid
);
7868 printk(" use_sg %u, sglist_len %u\n", s
->use_sg
, s
->sglist_len
);
7870 printk(" serial_number 0x%x, retries %d, allowed %d\n",
7871 (unsigned)s
->serial_number
, s
->retries
, s
->allowed
);
7873 printk(" timeout_per_command %d\n", s
->timeout_per_command
);
7876 (" scsi_done 0x%lx, done 0x%lx, host_scribble 0x%lx, result 0x%x\n",
7877 (ulong
)s
->scsi_done
, (ulong
)s
->done
, (ulong
)s
->host_scribble
,
7880 printk(" tag %u, pid %u\n", (unsigned)s
->tag
, (unsigned)s
->pid
);
7884 * asc_prt_asc_dvc_var()
7886 static void asc_prt_asc_dvc_var(ASC_DVC_VAR
*h
)
7888 printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong
)h
);
7891 (" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl %d,\n",
7892 h
->iop_base
, h
->err_code
, h
->dvc_cntl
, h
->bug_fix_cntl
);
7895 (" bus_type %d, isr_callback 0x%lx, exe_callback 0x%lx, init_sdtr 0x%x,\n",
7896 h
->bus_type
, (ulong
)h
->isr_callback
, (ulong
)h
->exe_callback
,
7897 (unsigned)h
->init_sdtr
);
7900 (" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, chip_no 0x%x,\n",
7901 (unsigned)h
->sdtr_done
, (unsigned)h
->use_tagged_qng
,
7902 (unsigned)h
->unit_not_ready
, (unsigned)h
->chip_no
);
7905 (" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait %u,\n",
7906 (unsigned)h
->queue_full_or_busy
, (unsigned)h
->start_motor
,
7907 (unsigned)h
->scsi_reset_wait
);
7910 (" is_in_int %u, max_total_qng %u, cur_total_qng %u, in_critical_cnt %u,\n",
7911 (unsigned)h
->is_in_int
, (unsigned)h
->max_total_qng
,
7912 (unsigned)h
->cur_total_qng
, (unsigned)h
->in_critical_cnt
);
7915 (" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, pci_fix_asyn_xfer 0x%x,\n",
7916 (unsigned)h
->last_q_shortage
, (unsigned)h
->init_state
,
7917 (unsigned)h
->no_scam
, (unsigned)h
->pci_fix_asyn_xfer
);
7919 printk(" cfg 0x%lx, irq_no 0x%x\n", (ulong
)h
->cfg
, (unsigned)h
->irq_no
);
7923 * asc_prt_asc_dvc_cfg()
7925 static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG
*h
)
7927 printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong
)h
);
7929 printk(" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n",
7930 h
->can_tagged_qng
, h
->cmd_qng_enabled
);
7931 printk(" disc_enable 0x%x, sdtr_enable 0x%x,\n",
7932 h
->disc_enable
, h
->sdtr_enable
);
7935 (" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,\n",
7936 h
->chip_scsi_id
, h
->isa_dma_speed
, h
->isa_dma_channel
,
7940 (" pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,\n",
7941 to_pci_dev(h
->dev
)->device
, h
->lib_serial_no
, h
->lib_version
,
7944 printk(" mcode_version %d, overrun_buf 0x%lx\n",
7945 h
->mcode_version
, (ulong
)h
->overrun_buf
);
7949 * asc_prt_asc_scsi_q()
7951 static void asc_prt_asc_scsi_q(ASC_SCSI_Q
*q
)
7956 printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong
)q
);
7959 (" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n",
7960 q
->q2
.target_ix
, q
->q1
.target_lun
, (ulong
)q
->q2
.srb_ptr
,
7964 (" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
7965 (ulong
)le32_to_cpu(q
->q1
.data_addr
),
7966 (ulong
)le32_to_cpu(q
->q1
.data_cnt
),
7967 (ulong
)le32_to_cpu(q
->q1
.sense_addr
), q
->q1
.sense_len
);
7969 printk(" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n",
7970 (ulong
)q
->cdbptr
, q
->q2
.cdb_len
,
7971 (ulong
)q
->sg_head
, q
->q1
.sg_queue_cnt
);
7975 printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong
)sgp
);
7976 printk(" entry_cnt %u, queue_cnt %u\n", sgp
->entry_cnt
,
7978 for (i
= 0; i
< sgp
->entry_cnt
; i
++) {
7979 printk(" [%u]: addr 0x%lx, bytes %lu\n",
7980 i
, (ulong
)le32_to_cpu(sgp
->sg_list
[i
].addr
),
7981 (ulong
)le32_to_cpu(sgp
->sg_list
[i
].bytes
));
7988 * asc_prt_asc_qdone_info()
7990 static void asc_prt_asc_qdone_info(ASC_QDONE_INFO
*q
)
7992 printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong
)q
);
7993 printk(" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n",
7994 (ulong
)q
->d2
.srb_ptr
, q
->d2
.target_ix
, q
->d2
.cdb_len
,
7997 (" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n",
7998 q
->d3
.done_stat
, q
->d3
.host_stat
, q
->d3
.scsi_stat
, q
->d3
.scsi_msg
);
8002 * asc_prt_adv_dvc_var()
8004 * Display an ADV_DVC_VAR structure.
8006 static void asc_prt_adv_dvc_var(ADV_DVC_VAR
*h
)
8008 printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong
)h
);
8010 printk(" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n",
8011 (ulong
)h
->iop_base
, h
->err_code
, (unsigned)h
->ultra_able
);
8013 printk(" isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n",
8014 (ulong
)h
->isr_callback
, (unsigned)h
->sdtr_able
,
8015 (unsigned)h
->wdtr_able
);
8017 printk(" start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,\n",
8018 (unsigned)h
->start_motor
,
8019 (unsigned)h
->scsi_reset_wait
, (unsigned)h
->irq_no
);
8021 printk(" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n",
8022 (unsigned)h
->max_host_qng
, (unsigned)h
->max_dvc_qng
,
8023 (ulong
)h
->carr_freelist
);
8025 printk(" icq_sp 0x%lx, irq_sp 0x%lx\n",
8026 (ulong
)h
->icq_sp
, (ulong
)h
->irq_sp
);
8028 printk(" no_scam 0x%x, tagqng_able 0x%x\n",
8029 (unsigned)h
->no_scam
, (unsigned)h
->tagqng_able
);
8031 printk(" chip_scsi_id 0x%x, cfg 0x%lx\n",
8032 (unsigned)h
->chip_scsi_id
, (ulong
)h
->cfg
);
8036 * asc_prt_adv_dvc_cfg()
8038 * Display an ADV_DVC_CFG structure.
8040 static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG
*h
)
8042 printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong
)h
);
8044 printk(" disc_enable 0x%x, termination 0x%x\n",
8045 h
->disc_enable
, h
->termination
);
8047 printk(" chip_version 0x%x, mcode_date 0x%x\n",
8048 h
->chip_version
, h
->mcode_date
);
8050 printk(" mcode_version 0x%x, pci_device_id 0x%x, lib_version %u\n",
8051 h
->mcode_version
, to_pci_dev(h
->dev
)->device
, h
->lib_version
);
8053 printk(" control_flag 0x%x, pci_slot_info 0x%x\n",
8054 h
->control_flag
, h
->pci_slot_info
);
8058 * asc_prt_adv_scsi_req_q()
8060 * Display an ADV_SCSI_REQ_Q structure.
8062 static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q
*q
)
8065 struct asc_sg_block
*sg_ptr
;
8067 printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong
)q
);
8069 printk(" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n",
8070 q
->target_id
, q
->target_lun
, (ulong
)q
->srb_ptr
, q
->a_flag
);
8072 printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n",
8073 q
->cntl
, (ulong
)le32_to_cpu(q
->data_addr
), (ulong
)q
->vdata_addr
);
8075 printk(" data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
8076 (ulong
)le32_to_cpu(q
->data_cnt
),
8077 (ulong
)le32_to_cpu(q
->sense_addr
), q
->sense_len
);
8080 (" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n",
8081 q
->cdb_len
, q
->done_status
, q
->host_status
, q
->scsi_status
);
8083 printk(" sg_working_ix 0x%x, target_cmd %u\n",
8084 q
->sg_working_ix
, q
->target_cmd
);
8086 printk(" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n",
8087 (ulong
)le32_to_cpu(q
->scsiq_rptr
),
8088 (ulong
)le32_to_cpu(q
->sg_real_addr
), (ulong
)q
->sg_list_ptr
);
8090 /* Display the request's ADV_SG_BLOCK structures. */
8091 if (q
->sg_list_ptr
!= NULL
) {
8095 * 'sg_ptr' is a physical address. Convert it to a virtual
8096 * address by indexing 'sg_blk_cnt' into the virtual address
8097 * array 'sg_list_ptr'.
8099 * XXX - Assumes all SG physical blocks are virtually contiguous.
8102 &(((ADV_SG_BLOCK
*)(q
->sg_list_ptr
))[sg_blk_cnt
]);
8103 asc_prt_adv_sgblock(sg_blk_cnt
, sg_ptr
);
8104 if (sg_ptr
->sg_ptr
== 0) {
8113 * asc_prt_adv_sgblock()
8115 * Display an ADV_SG_BLOCK structure.
8117 static void asc_prt_adv_sgblock(int sgblockno
, ADV_SG_BLOCK
*b
)
8121 printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n",
8122 (ulong
)b
, sgblockno
);
8123 printk(" sg_cnt %u, sg_ptr 0x%lx\n",
8124 b
->sg_cnt
, (ulong
)le32_to_cpu(b
->sg_ptr
));
8125 ASC_ASSERT(b
->sg_cnt
<= NO_OF_SG_PER_BLOCK
);
8126 if (b
->sg_ptr
!= 0) {
8127 ASC_ASSERT(b
->sg_cnt
== NO_OF_SG_PER_BLOCK
);
8129 for (i
= 0; i
< b
->sg_cnt
; i
++) {
8130 printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n",
8131 i
, (ulong
)b
->sg_list
[i
].sg_addr
,
8132 (ulong
)b
->sg_list
[i
].sg_count
);
8139 * Print hexadecimal output in 4 byte groupings 32 bytes
8140 * or 8 double-words per line.
8142 static void asc_prt_hex(char *f
, uchar
*s
, int l
)
8149 printk("%s: (%d bytes)\n", f
, l
);
8151 for (i
= 0; i
< l
; i
+= 32) {
8153 /* Display a maximum of 8 double-words per line. */
8154 if ((k
= (l
- i
) / 4) >= 8) {
8161 for (j
= 0; j
< k
; j
++) {
8162 printk(" %2.2X%2.2X%2.2X%2.2X",
8163 (unsigned)s
[i
+ (j
* 4)],
8164 (unsigned)s
[i
+ (j
* 4) + 1],
8165 (unsigned)s
[i
+ (j
* 4) + 2],
8166 (unsigned)s
[i
+ (j
* 4) + 3]);
8174 printk(" %2.2X", (unsigned)s
[i
+ (j
* 4)]);
8177 printk(" %2.2X%2.2X",
8178 (unsigned)s
[i
+ (j
* 4)],
8179 (unsigned)s
[i
+ (j
* 4) + 1]);
8182 printk(" %2.2X%2.2X%2.2X",
8183 (unsigned)s
[i
+ (j
* 4) + 1],
8184 (unsigned)s
[i
+ (j
* 4) + 2],
8185 (unsigned)s
[i
+ (j
* 4) + 3]);
8192 #endif /* ADVANSYS_DEBUG */
8195 * --- Asc Library Functions
8198 static ushort __init
AscGetEisaChipCfg(PortAddr iop_base
)
8200 PortAddr eisa_cfg_iop
;
8202 eisa_cfg_iop
= (PortAddr
) ASC_GET_EISA_SLOT(iop_base
) |
8203 (PortAddr
) (ASC_EISA_CFG_IOP_MASK
);
8204 return (inpw(eisa_cfg_iop
));
8207 static uchar __init
AscSetChipScsiID(PortAddr iop_base
, uchar new_host_id
)
8211 if (AscGetChipScsiID(iop_base
) == new_host_id
) {
8212 return (new_host_id
);
8214 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
8216 cfg_lsw
|= (ushort
)((new_host_id
& ASC_MAX_TID
) << 8);
8217 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8218 return (AscGetChipScsiID(iop_base
));
8221 static uchar __init
AscGetChipScsiCtrl(PortAddr iop_base
)
8225 AscSetBank(iop_base
, 1);
8226 sc
= inp(iop_base
+ IOP_REG_SC
);
8227 AscSetBank(iop_base
, 0);
8231 static uchar __init
AscGetChipVersion(PortAddr iop_base
, ushort bus_type
)
8233 if ((bus_type
& ASC_IS_EISA
) != 0) {
8236 eisa_iop
= (PortAddr
) ASC_GET_EISA_SLOT(iop_base
) |
8237 (PortAddr
) ASC_EISA_REV_IOP_MASK
;
8238 revision
= inp(eisa_iop
);
8239 return ((uchar
)((ASC_CHIP_MIN_VER_EISA
- 1) + revision
));
8241 return (AscGetChipVerNo(iop_base
));
8244 static ushort __init
AscGetChipBusType(PortAddr iop_base
)
8248 chip_ver
= AscGetChipVerNo(iop_base
);
8249 if ((chip_ver
>= ASC_CHIP_MIN_VER_VL
)
8250 && (chip_ver
<= ASC_CHIP_MAX_VER_VL
)
8252 if (((iop_base
& 0x0C30) == 0x0C30)
8253 || ((iop_base
& 0x0C50) == 0x0C50)
8255 return (ASC_IS_EISA
);
8259 if ((chip_ver
>= ASC_CHIP_MIN_VER_ISA
) &&
8260 (chip_ver
<= ASC_CHIP_MAX_VER_ISA
)) {
8261 if (chip_ver
>= ASC_CHIP_MIN_VER_ISA_PNP
) {
8262 return (ASC_IS_ISAPNP
);
8264 return (ASC_IS_ISA
);
8265 } else if ((chip_ver
>= ASC_CHIP_MIN_VER_PCI
) &&
8266 (chip_ver
<= ASC_CHIP_MAX_VER_PCI
)) {
8267 return (ASC_IS_PCI
);
8273 AscLoadMicroCode(PortAddr iop_base
,
8274 ushort s_addr
, uchar
*mcode_buf
, ushort mcode_size
)
8277 ushort mcode_word_size
;
8278 ushort mcode_chksum
;
8280 /* Write the microcode buffer starting at LRAM address 0. */
8281 mcode_word_size
= (ushort
)(mcode_size
>> 1);
8282 AscMemWordSetLram(iop_base
, s_addr
, 0, mcode_word_size
);
8283 AscMemWordCopyPtrToLram(iop_base
, s_addr
, mcode_buf
, mcode_word_size
);
8285 chksum
= AscMemSumLramWord(iop_base
, s_addr
, mcode_word_size
);
8286 ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lx\n", (ulong
)chksum
);
8287 mcode_chksum
= (ushort
)AscMemSumLramWord(iop_base
,
8288 (ushort
)ASC_CODE_SEC_BEG
,
8289 (ushort
)((mcode_size
-
8293 ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lx\n",
8294 (ulong
)mcode_chksum
);
8295 AscWriteLramWord(iop_base
, ASCV_MCODE_CHKSUM_W
, mcode_chksum
);
8296 AscWriteLramWord(iop_base
, ASCV_MCODE_SIZE_W
, mcode_size
);
8300 static int AscFindSignature(PortAddr iop_base
)
8304 ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%x\n",
8305 iop_base
, AscGetChipSignatureByte(iop_base
));
8306 if (AscGetChipSignatureByte(iop_base
) == (uchar
)ASC_1000_ID1B
) {
8308 "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%x\n",
8309 iop_base
, AscGetChipSignatureWord(iop_base
));
8310 sig_word
= AscGetChipSignatureWord(iop_base
);
8311 if ((sig_word
== (ushort
)ASC_1000_ID0W
) ||
8312 (sig_word
== (ushort
)ASC_1000_ID0W_FIX
)) {
8319 static PortAddr _asc_def_iop_base
[ASC_IOADR_TABLE_MAX_IX
] __initdata
= {
8320 0x100, ASC_IOADR_1
, 0x120, ASC_IOADR_2
, 0x140, ASC_IOADR_3
, ASC_IOADR_4
,
8321 ASC_IOADR_5
, ASC_IOADR_6
, ASC_IOADR_7
, ASC_IOADR_8
8325 static uchar _isa_pnp_inited __initdata
= 0;
8327 static PortAddr __init
AscSearchIOPortAddr(PortAddr iop_beg
, ushort bus_type
)
8329 if (bus_type
& ASC_IS_VL
) {
8330 while ((iop_beg
= AscSearchIOPortAddr11(iop_beg
)) != 0) {
8331 if (AscGetChipVersion(iop_beg
, bus_type
) <=
8332 ASC_CHIP_MAX_VER_VL
) {
8338 if (bus_type
& ASC_IS_ISA
) {
8339 if (_isa_pnp_inited
== 0) {
8340 AscSetISAPNPWaitForKey();
8343 while ((iop_beg
= AscSearchIOPortAddr11(iop_beg
)) != 0) {
8344 if ((AscGetChipVersion(iop_beg
, bus_type
) &
8345 ASC_CHIP_VER_ISA_BIT
) != 0) {
8351 if (bus_type
& ASC_IS_EISA
) {
8352 if ((iop_beg
= AscSearchIOPortAddrEISA(iop_beg
)) != 0) {
8360 static PortAddr __init
AscSearchIOPortAddr11(PortAddr s_addr
)
8365 for (i
= 0; i
< ASC_IOADR_TABLE_MAX_IX
; i
++) {
8366 if (_asc_def_iop_base
[i
] > s_addr
) {
8370 for (; i
< ASC_IOADR_TABLE_MAX_IX
; i
++) {
8371 iop_base
= _asc_def_iop_base
[i
];
8372 if (!request_region(iop_base
, ASC_IOADR_GAP
, "advansys")) {
8374 "AscSearchIOPortAddr11: check_region() failed I/O port 0x%x\n",
8378 ASC_DBG1(1, "AscSearchIOPortAddr11: probing I/O port 0x%x\n",
8380 release_region(iop_base
, ASC_IOADR_GAP
);
8381 if (AscFindSignature(iop_base
)) {
8388 static void __init
AscSetISAPNPWaitForKey(void)
8390 outp(ASC_ISA_PNP_PORT_ADDR
, 0x02);
8391 outp(ASC_ISA_PNP_PORT_WRITE
, 0x02);
8394 #endif /* CONFIG_ISA */
8396 static void __init
AscToggleIRQAct(PortAddr iop_base
)
8398 AscSetChipStatus(iop_base
, CIW_IRQ_ACT
);
8399 AscSetChipStatus(iop_base
, 0);
8403 static uchar __init
AscGetChipIRQ(PortAddr iop_base
, ushort bus_type
)
8408 if ((bus_type
& ASC_IS_EISA
) != 0) {
8409 cfg_lsw
= AscGetEisaChipCfg(iop_base
);
8410 chip_irq
= (uchar
)(((cfg_lsw
>> 8) & 0x07) + 10);
8411 if ((chip_irq
== 13) || (chip_irq
> 15)) {
8416 if ((bus_type
& ASC_IS_VL
) != 0) {
8417 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
8418 chip_irq
= (uchar
)(((cfg_lsw
>> 2) & 0x07));
8419 if ((chip_irq
== 0) || (chip_irq
== 4) || (chip_irq
== 7)) {
8422 return ((uchar
)(chip_irq
+ (ASC_MIN_IRQ_NO
- 1)));
8424 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
8425 chip_irq
= (uchar
)(((cfg_lsw
>> 2) & 0x03));
8427 chip_irq
+= (uchar
)2;
8428 return ((uchar
)(chip_irq
+ ASC_MIN_IRQ_NO
));
8432 AscSetChipIRQ(PortAddr iop_base
, uchar irq_no
, ushort bus_type
)
8436 if ((bus_type
& ASC_IS_VL
) != 0) {
8438 if ((irq_no
< ASC_MIN_IRQ_NO
)
8439 || (irq_no
> ASC_MAX_IRQ_NO
)) {
8442 irq_no
-= (uchar
)((ASC_MIN_IRQ_NO
- 1));
8445 cfg_lsw
= (ushort
)(AscGetChipCfgLsw(iop_base
) & 0xFFE3);
8446 cfg_lsw
|= (ushort
)0x0010;
8447 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8448 AscToggleIRQAct(iop_base
);
8449 cfg_lsw
= (ushort
)(AscGetChipCfgLsw(iop_base
) & 0xFFE0);
8450 cfg_lsw
|= (ushort
)((irq_no
& 0x07) << 2);
8451 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8452 AscToggleIRQAct(iop_base
);
8453 return (AscGetChipIRQ(iop_base
, bus_type
));
8455 if ((bus_type
& (ASC_IS_ISA
)) != 0) {
8458 irq_no
-= (uchar
)ASC_MIN_IRQ_NO
;
8459 cfg_lsw
= (ushort
)(AscGetChipCfgLsw(iop_base
) & 0xFFF3);
8460 cfg_lsw
|= (ushort
)((irq_no
& 0x03) << 2);
8461 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8462 return (AscGetChipIRQ(iop_base
, bus_type
));
8468 static void __init
AscEnableIsaDma(uchar dma_channel
)
8470 if (dma_channel
< 4) {
8471 outp(0x000B, (ushort
)(0xC0 | dma_channel
));
8472 outp(0x000A, dma_channel
);
8473 } else if (dma_channel
< 8) {
8474 outp(0x00D6, (ushort
)(0xC0 | (dma_channel
- 4)));
8475 outp(0x00D4, (ushort
)(dma_channel
- 4));
8479 #endif /* CONFIG_ISA */
8481 static int AscIsrChipHalted(ASC_DVC_VAR
*asc_dvc
)
8487 ushort int_halt_code
;
8488 ASC_SCSI_BIT_ID_TYPE scsi_busy
;
8489 ASC_SCSI_BIT_ID_TYPE target_id
;
8496 uchar q_cntl
, tid_no
;
8500 asc_board_t
*boardp
;
8502 ASC_ASSERT(asc_dvc
->drv_ptr
!= NULL
);
8503 boardp
= asc_dvc
->drv_ptr
;
8505 iop_base
= asc_dvc
->iop_base
;
8506 int_halt_code
= AscReadLramWord(iop_base
, ASCV_HALTCODE_W
);
8508 halt_qp
= AscReadLramByte(iop_base
, ASCV_CURCDB_B
);
8509 halt_q_addr
= ASC_QNO_TO_QADDR(halt_qp
);
8510 target_ix
= AscReadLramByte(iop_base
,
8511 (ushort
)(halt_q_addr
+
8512 (ushort
)ASC_SCSIQ_B_TARGET_IX
));
8514 AscReadLramByte(iop_base
,
8515 (ushort
)(halt_q_addr
+ (ushort
)ASC_SCSIQ_B_CNTL
));
8516 tid_no
= ASC_TIX_TO_TID(target_ix
);
8517 target_id
= (uchar
)ASC_TID_TO_TARGET_ID(tid_no
);
8518 if (asc_dvc
->pci_fix_asyn_xfer
& target_id
) {
8519 asyn_sdtr
= ASYN_SDTR_DATA_FIX_PCI_REV_AB
;
8523 if (int_halt_code
== ASC_HALT_DISABLE_ASYN_USE_SYN_FIX
) {
8524 if (asc_dvc
->pci_fix_asyn_xfer
& target_id
) {
8525 AscSetChipSDTR(iop_base
, 0, tid_no
);
8526 boardp
->sdtr_data
[tid_no
] = 0;
8528 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8530 } else if (int_halt_code
== ASC_HALT_ENABLE_ASYN_USE_SYN_FIX
) {
8531 if (asc_dvc
->pci_fix_asyn_xfer
& target_id
) {
8532 AscSetChipSDTR(iop_base
, asyn_sdtr
, tid_no
);
8533 boardp
->sdtr_data
[tid_no
] = asyn_sdtr
;
8535 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8537 } else if (int_halt_code
== ASC_HALT_EXTMSG_IN
) {
8539 AscMemWordCopyPtrFromLram(iop_base
,
8542 sizeof(EXT_MSG
) >> 1);
8544 if (ext_msg
.msg_type
== MS_EXTEND
&&
8545 ext_msg
.msg_req
== MS_SDTR_CODE
&&
8546 ext_msg
.msg_len
== MS_SDTR_LEN
) {
8548 if ((ext_msg
.req_ack_offset
> ASC_SYN_MAX_OFFSET
)) {
8550 sdtr_accept
= FALSE
;
8551 ext_msg
.req_ack_offset
= ASC_SYN_MAX_OFFSET
;
8553 if ((ext_msg
.xfer_period
<
8554 asc_dvc
->sdtr_period_tbl
[asc_dvc
->
8555 host_init_sdtr_index
])
8556 || (ext_msg
.xfer_period
>
8557 asc_dvc
->sdtr_period_tbl
[asc_dvc
->
8559 sdtr_accept
= FALSE
;
8560 ext_msg
.xfer_period
=
8561 asc_dvc
->sdtr_period_tbl
[asc_dvc
->
8562 host_init_sdtr_index
];
8566 AscCalSDTRData(asc_dvc
, ext_msg
.xfer_period
,
8567 ext_msg
.req_ack_offset
);
8568 if ((sdtr_data
== 0xFF)) {
8570 q_cntl
|= QC_MSG_OUT
;
8571 asc_dvc
->init_sdtr
&= ~target_id
;
8572 asc_dvc
->sdtr_done
&= ~target_id
;
8573 AscSetChipSDTR(iop_base
, asyn_sdtr
,
8575 boardp
->sdtr_data
[tid_no
] = asyn_sdtr
;
8578 if (ext_msg
.req_ack_offset
== 0) {
8580 q_cntl
&= ~QC_MSG_OUT
;
8581 asc_dvc
->init_sdtr
&= ~target_id
;
8582 asc_dvc
->sdtr_done
&= ~target_id
;
8583 AscSetChipSDTR(iop_base
, asyn_sdtr
, tid_no
);
8585 if (sdtr_accept
&& (q_cntl
& QC_MSG_OUT
)) {
8587 q_cntl
&= ~QC_MSG_OUT
;
8588 asc_dvc
->sdtr_done
|= target_id
;
8589 asc_dvc
->init_sdtr
|= target_id
;
8590 asc_dvc
->pci_fix_asyn_xfer
&=
8593 AscCalSDTRData(asc_dvc
,
8594 ext_msg
.xfer_period
,
8597 AscSetChipSDTR(iop_base
, sdtr_data
,
8599 boardp
->sdtr_data
[tid_no
] = sdtr_data
;
8602 q_cntl
|= QC_MSG_OUT
;
8603 AscMsgOutSDTR(asc_dvc
,
8604 ext_msg
.xfer_period
,
8605 ext_msg
.req_ack_offset
);
8606 asc_dvc
->pci_fix_asyn_xfer
&=
8609 AscCalSDTRData(asc_dvc
,
8610 ext_msg
.xfer_period
,
8613 AscSetChipSDTR(iop_base
, sdtr_data
,
8615 boardp
->sdtr_data
[tid_no
] = sdtr_data
;
8616 asc_dvc
->sdtr_done
|= target_id
;
8617 asc_dvc
->init_sdtr
|= target_id
;
8621 AscWriteLramByte(iop_base
,
8622 (ushort
)(halt_q_addr
+
8623 (ushort
)ASC_SCSIQ_B_CNTL
),
8625 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8627 } else if (ext_msg
.msg_type
== MS_EXTEND
&&
8628 ext_msg
.msg_req
== MS_WDTR_CODE
&&
8629 ext_msg
.msg_len
== MS_WDTR_LEN
) {
8631 ext_msg
.wdtr_width
= 0;
8632 AscMemWordCopyPtrToLram(iop_base
,
8635 sizeof(EXT_MSG
) >> 1);
8636 q_cntl
|= QC_MSG_OUT
;
8637 AscWriteLramByte(iop_base
,
8638 (ushort
)(halt_q_addr
+
8639 (ushort
)ASC_SCSIQ_B_CNTL
),
8641 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8645 ext_msg
.msg_type
= MESSAGE_REJECT
;
8646 AscMemWordCopyPtrToLram(iop_base
,
8649 sizeof(EXT_MSG
) >> 1);
8650 q_cntl
|= QC_MSG_OUT
;
8651 AscWriteLramByte(iop_base
,
8652 (ushort
)(halt_q_addr
+
8653 (ushort
)ASC_SCSIQ_B_CNTL
),
8655 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8658 } else if (int_halt_code
== ASC_HALT_CHK_CONDITION
) {
8660 q_cntl
|= QC_REQ_SENSE
;
8662 if ((asc_dvc
->init_sdtr
& target_id
) != 0) {
8664 asc_dvc
->sdtr_done
&= ~target_id
;
8666 sdtr_data
= AscGetMCodeInitSDTRAtID(iop_base
, tid_no
);
8667 q_cntl
|= QC_MSG_OUT
;
8668 AscMsgOutSDTR(asc_dvc
,
8670 sdtr_period_tbl
[(sdtr_data
>> 4) &
8674 (uchar
)(sdtr_data
& (uchar
)
8675 ASC_SYN_MAX_OFFSET
));
8678 AscWriteLramByte(iop_base
,
8679 (ushort
)(halt_q_addr
+
8680 (ushort
)ASC_SCSIQ_B_CNTL
), q_cntl
);
8682 tag_code
= AscReadLramByte(iop_base
,
8683 (ushort
)(halt_q_addr
+ (ushort
)
8684 ASC_SCSIQ_B_TAG_CODE
));
8686 if ((asc_dvc
->pci_fix_asyn_xfer
& target_id
)
8687 && !(asc_dvc
->pci_fix_asyn_xfer_always
& target_id
)
8690 tag_code
|= (ASC_TAG_FLAG_DISABLE_DISCONNECT
8691 | ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX
);
8694 AscWriteLramByte(iop_base
,
8695 (ushort
)(halt_q_addr
+
8696 (ushort
)ASC_SCSIQ_B_TAG_CODE
),
8699 q_status
= AscReadLramByte(iop_base
,
8700 (ushort
)(halt_q_addr
+ (ushort
)
8701 ASC_SCSIQ_B_STATUS
));
8702 q_status
|= (QS_READY
| QS_BUSY
);
8703 AscWriteLramByte(iop_base
,
8704 (ushort
)(halt_q_addr
+
8705 (ushort
)ASC_SCSIQ_B_STATUS
),
8708 scsi_busy
= AscReadLramByte(iop_base
, (ushort
)ASCV_SCSIBUSY_B
);
8709 scsi_busy
&= ~target_id
;
8710 AscWriteLramByte(iop_base
, (ushort
)ASCV_SCSIBUSY_B
, scsi_busy
);
8712 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8714 } else if (int_halt_code
== ASC_HALT_SDTR_REJECTED
) {
8716 AscMemWordCopyPtrFromLram(iop_base
,
8719 sizeof(EXT_MSG
) >> 1);
8721 if ((out_msg
.msg_type
== MS_EXTEND
) &&
8722 (out_msg
.msg_len
== MS_SDTR_LEN
) &&
8723 (out_msg
.msg_req
== MS_SDTR_CODE
)) {
8725 asc_dvc
->init_sdtr
&= ~target_id
;
8726 asc_dvc
->sdtr_done
&= ~target_id
;
8727 AscSetChipSDTR(iop_base
, asyn_sdtr
, tid_no
);
8728 boardp
->sdtr_data
[tid_no
] = asyn_sdtr
;
8730 q_cntl
&= ~QC_MSG_OUT
;
8731 AscWriteLramByte(iop_base
,
8732 (ushort
)(halt_q_addr
+
8733 (ushort
)ASC_SCSIQ_B_CNTL
), q_cntl
);
8734 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8736 } else if (int_halt_code
== ASC_HALT_SS_QUEUE_FULL
) {
8738 scsi_status
= AscReadLramByte(iop_base
,
8739 (ushort
)((ushort
)halt_q_addr
+
8741 ASC_SCSIQ_SCSI_STATUS
));
8743 AscReadLramByte(iop_base
,
8744 (ushort
)((ushort
)ASC_QADR_BEG
+
8745 (ushort
)target_ix
));
8746 if ((cur_dvc_qng
> 0) && (asc_dvc
->cur_dvc_qng
[tid_no
] > 0)) {
8748 scsi_busy
= AscReadLramByte(iop_base
,
8749 (ushort
)ASCV_SCSIBUSY_B
);
8750 scsi_busy
|= target_id
;
8751 AscWriteLramByte(iop_base
,
8752 (ushort
)ASCV_SCSIBUSY_B
, scsi_busy
);
8753 asc_dvc
->queue_full_or_busy
|= target_id
;
8755 if (scsi_status
== SAM_STAT_TASK_SET_FULL
) {
8756 if (cur_dvc_qng
> ASC_MIN_TAGGED_CMD
) {
8758 asc_dvc
->max_dvc_qng
[tid_no
] =
8761 AscWriteLramByte(iop_base
,
8763 ASCV_MAX_DVC_QNG_BEG
8769 * Set the device queue depth to the number of
8770 * active requests when the QUEUE FULL condition
8773 boardp
->queue_full
|= target_id
;
8774 boardp
->queue_full_cnt
[tid_no
] =
8779 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8782 #if CC_VERY_LONG_SG_LIST
8783 else if (int_halt_code
== ASC_HALT_HOST_COPY_SG_LIST_TO_RISC
) {
8787 uchar first_sg_wk_q_no
;
8788 ASC_SCSI_Q
*scsiq
; /* Ptr to driver request. */
8789 ASC_SG_HEAD
*sg_head
; /* Ptr to driver SG request. */
8790 ASC_SG_LIST_Q scsi_sg_q
; /* Structure written to queue. */
8791 ushort sg_list_dwords
;
8792 ushort sg_entry_cnt
;
8796 q_no
= AscReadLramByte(iop_base
, (ushort
)ASCV_REQ_SG_LIST_QP
);
8797 if (q_no
== ASC_QLINK_END
) {
8801 q_addr
= ASC_QNO_TO_QADDR(q_no
);
8804 * Convert the request's SRB pointer to a host ASC_SCSI_REQ
8805 * structure pointer using a macro provided by the driver.
8806 * The ASC_SCSI_REQ pointer provides a pointer to the
8807 * host ASC_SG_HEAD structure.
8809 /* Read request's SRB pointer. */
8810 scsiq
= (ASC_SCSI_Q
*)
8811 ASC_SRB2SCSIQ(ASC_U32_TO_VADDR(AscReadLramDWord(iop_base
,
8814 ASC_SCSIQ_D_SRBPTR
))));
8817 * Get request's first and working SG queue.
8819 sg_wk_q_no
= AscReadLramByte(iop_base
,
8821 ASC_SCSIQ_B_SG_WK_QP
));
8823 first_sg_wk_q_no
= AscReadLramByte(iop_base
,
8825 ASC_SCSIQ_B_FIRST_SG_WK_QP
));
8828 * Reset request's working SG queue back to the
8831 AscWriteLramByte(iop_base
,
8833 (ushort
)ASC_SCSIQ_B_SG_WK_QP
),
8836 sg_head
= scsiq
->sg_head
;
8839 * Set sg_entry_cnt to the number of SG elements
8840 * that will be completed on this interrupt.
8842 * Note: The allocated SG queues contain ASC_MAX_SG_LIST - 1
8843 * SG elements. The data_cnt and data_addr fields which
8844 * add 1 to the SG element capacity are not used when
8845 * restarting SG handling after a halt.
8847 if (scsiq
->remain_sg_entry_cnt
> (ASC_MAX_SG_LIST
- 1)) {
8848 sg_entry_cnt
= ASC_MAX_SG_LIST
- 1;
8851 * Keep track of remaining number of SG elements that will
8852 * need to be handled on the next interrupt.
8854 scsiq
->remain_sg_entry_cnt
-= (ASC_MAX_SG_LIST
- 1);
8856 sg_entry_cnt
= scsiq
->remain_sg_entry_cnt
;
8857 scsiq
->remain_sg_entry_cnt
= 0;
8861 * Copy SG elements into the list of allocated SG queues.
8863 * Last index completed is saved in scsiq->next_sg_index.
8865 next_qp
= first_sg_wk_q_no
;
8866 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
8867 scsi_sg_q
.sg_head_qp
= q_no
;
8868 scsi_sg_q
.cntl
= QCSG_SG_XFER_LIST
;
8869 for (i
= 0; i
< sg_head
->queue_cnt
; i
++) {
8870 scsi_sg_q
.seq_no
= i
+ 1;
8871 if (sg_entry_cnt
> ASC_SG_LIST_PER_Q
) {
8872 sg_list_dwords
= (uchar
)(ASC_SG_LIST_PER_Q
* 2);
8873 sg_entry_cnt
-= ASC_SG_LIST_PER_Q
;
8875 * After very first SG queue RISC FW uses next
8876 * SG queue first element then checks sg_list_cnt
8877 * against zero and then decrements, so set
8878 * sg_list_cnt 1 less than number of SG elements
8881 scsi_sg_q
.sg_list_cnt
= ASC_SG_LIST_PER_Q
- 1;
8882 scsi_sg_q
.sg_cur_list_cnt
=
8883 ASC_SG_LIST_PER_Q
- 1;
8886 * This is the last SG queue in the list of
8887 * allocated SG queues. If there are more
8888 * SG elements than will fit in the allocated
8889 * queues, then set the QCSG_SG_XFER_MORE flag.
8891 if (scsiq
->remain_sg_entry_cnt
!= 0) {
8892 scsi_sg_q
.cntl
|= QCSG_SG_XFER_MORE
;
8894 scsi_sg_q
.cntl
|= QCSG_SG_XFER_END
;
8896 /* equals sg_entry_cnt * 2 */
8897 sg_list_dwords
= sg_entry_cnt
<< 1;
8898 scsi_sg_q
.sg_list_cnt
= sg_entry_cnt
- 1;
8899 scsi_sg_q
.sg_cur_list_cnt
= sg_entry_cnt
- 1;
8903 scsi_sg_q
.q_no
= next_qp
;
8904 AscMemWordCopyPtrToLram(iop_base
,
8905 q_addr
+ ASC_SCSIQ_SGHD_CPY_BEG
,
8906 (uchar
*)&scsi_sg_q
,
8907 sizeof(ASC_SG_LIST_Q
) >> 1);
8909 AscMemDWordCopyPtrToLram(iop_base
,
8910 q_addr
+ ASC_SGQ_LIST_BEG
,
8912 sg_list
[scsiq
->next_sg_index
],
8915 scsiq
->next_sg_index
+= ASC_SG_LIST_PER_Q
;
8918 * If the just completed SG queue contained the
8919 * last SG element, then no more SG queues need
8922 if (scsi_sg_q
.cntl
& QCSG_SG_XFER_END
) {
8926 next_qp
= AscReadLramByte(iop_base
,
8929 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
8933 * Clear the halt condition so the RISC will be restarted
8936 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8939 #endif /* CC_VERY_LONG_SG_LIST */
8944 _AscCopyLramScsiDoneQ(PortAddr iop_base
,
8946 ASC_QDONE_INFO
*scsiq
, ASC_DCNT max_dma_count
)
8951 DvcGetQinfo(iop_base
,
8952 q_addr
+ ASC_SCSIQ_DONE_INFO_BEG
,
8954 (sizeof(ASC_SCSIQ_2
) + sizeof(ASC_SCSIQ_3
)) / 2);
8956 _val
= AscReadLramWord(iop_base
,
8957 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_STATUS
));
8958 scsiq
->q_status
= (uchar
)_val
;
8959 scsiq
->q_no
= (uchar
)(_val
>> 8);
8960 _val
= AscReadLramWord(iop_base
,
8961 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_CNTL
));
8962 scsiq
->cntl
= (uchar
)_val
;
8963 sg_queue_cnt
= (uchar
)(_val
>> 8);
8964 _val
= AscReadLramWord(iop_base
,
8966 (ushort
)ASC_SCSIQ_B_SENSE_LEN
));
8967 scsiq
->sense_len
= (uchar
)_val
;
8968 scsiq
->extra_bytes
= (uchar
)(_val
>> 8);
8971 * Read high word of remain bytes from alternate location.
8973 scsiq
->remain_bytes
= (((ADV_DCNT
)AscReadLramWord(iop_base
,
8976 ASC_SCSIQ_W_ALT_DC1
)))
8979 * Read low word of remain bytes from original location.
8981 scsiq
->remain_bytes
+= AscReadLramWord(iop_base
,
8982 (ushort
)(q_addr
+ (ushort
)
8983 ASC_SCSIQ_DW_REMAIN_XFER_CNT
));
8985 scsiq
->remain_bytes
&= max_dma_count
;
8986 return (sg_queue_cnt
);
8989 static int AscIsrQDone(ASC_DVC_VAR
*asc_dvc
)
8998 ASC_SCSI_BIT_ID_TYPE scsi_busy
;
8999 ASC_SCSI_BIT_ID_TYPE target_id
;
9003 uchar cur_target_qng
;
9004 ASC_QDONE_INFO scsiq_buf
;
9005 ASC_QDONE_INFO
*scsiq
;
9007 ASC_ISR_CALLBACK asc_isr_callback
;
9009 iop_base
= asc_dvc
->iop_base
;
9010 asc_isr_callback
= asc_dvc
->isr_callback
;
9012 scsiq
= (ASC_QDONE_INFO
*)&scsiq_buf
;
9013 done_q_tail
= (uchar
)AscGetVarDoneQTail(iop_base
);
9014 q_addr
= ASC_QNO_TO_QADDR(done_q_tail
);
9015 next_qp
= AscReadLramByte(iop_base
,
9016 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_FWD
));
9017 if (next_qp
!= ASC_QLINK_END
) {
9018 AscPutVarDoneQTail(iop_base
, next_qp
);
9019 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
9020 sg_queue_cnt
= _AscCopyLramScsiDoneQ(iop_base
, q_addr
, scsiq
,
9021 asc_dvc
->max_dma_count
);
9022 AscWriteLramByte(iop_base
,
9024 (ushort
)ASC_SCSIQ_B_STATUS
),
9026 q_status
& (uchar
)~(QS_READY
|
9028 tid_no
= ASC_TIX_TO_TID(scsiq
->d2
.target_ix
);
9029 target_id
= ASC_TIX_TO_TARGET_ID(scsiq
->d2
.target_ix
);
9030 if ((scsiq
->cntl
& QC_SG_HEAD
) != 0) {
9032 sg_list_qp
= next_qp
;
9033 for (q_cnt
= 0; q_cnt
< sg_queue_cnt
; q_cnt
++) {
9034 sg_list_qp
= AscReadLramByte(iop_base
,
9038 sg_q_addr
= ASC_QNO_TO_QADDR(sg_list_qp
);
9039 if (sg_list_qp
== ASC_QLINK_END
) {
9040 AscSetLibErrorCode(asc_dvc
,
9041 ASCQ_ERR_SG_Q_LINKS
);
9042 scsiq
->d3
.done_stat
= QD_WITH_ERROR
;
9043 scsiq
->d3
.host_stat
=
9044 QHSTA_D_QDONE_SG_LIST_CORRUPTED
;
9045 goto FATAL_ERR_QDONE
;
9047 AscWriteLramByte(iop_base
,
9048 (ushort
)(sg_q_addr
+ (ushort
)
9049 ASC_SCSIQ_B_STATUS
),
9052 n_q_used
= sg_queue_cnt
+ 1;
9053 AscPutVarDoneQTail(iop_base
, sg_list_qp
);
9055 if (asc_dvc
->queue_full_or_busy
& target_id
) {
9056 cur_target_qng
= AscReadLramByte(iop_base
,
9062 if (cur_target_qng
< asc_dvc
->max_dvc_qng
[tid_no
]) {
9063 scsi_busy
= AscReadLramByte(iop_base
, (ushort
)
9065 scsi_busy
&= ~target_id
;
9066 AscWriteLramByte(iop_base
,
9067 (ushort
)ASCV_SCSIBUSY_B
,
9069 asc_dvc
->queue_full_or_busy
&= ~target_id
;
9072 if (asc_dvc
->cur_total_qng
>= n_q_used
) {
9073 asc_dvc
->cur_total_qng
-= n_q_used
;
9074 if (asc_dvc
->cur_dvc_qng
[tid_no
] != 0) {
9075 asc_dvc
->cur_dvc_qng
[tid_no
]--;
9078 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_CUR_QNG
);
9079 scsiq
->d3
.done_stat
= QD_WITH_ERROR
;
9080 goto FATAL_ERR_QDONE
;
9082 if ((scsiq
->d2
.srb_ptr
== 0UL) ||
9083 ((scsiq
->q_status
& QS_ABORTED
) != 0)) {
9085 } else if (scsiq
->q_status
== QS_DONE
) {
9086 false_overrun
= FALSE
;
9087 if (scsiq
->extra_bytes
!= 0) {
9088 scsiq
->remain_bytes
+=
9089 (ADV_DCNT
)scsiq
->extra_bytes
;
9091 if (scsiq
->d3
.done_stat
== QD_WITH_ERROR
) {
9092 if (scsiq
->d3
.host_stat
==
9093 QHSTA_M_DATA_OVER_RUN
) {
9095 cntl
& (QC_DATA_IN
| QC_DATA_OUT
))
9097 scsiq
->d3
.done_stat
=
9099 scsiq
->d3
.host_stat
=
9101 } else if (false_overrun
) {
9102 scsiq
->d3
.done_stat
=
9104 scsiq
->d3
.host_stat
=
9107 } else if (scsiq
->d3
.host_stat
==
9108 QHSTA_M_HUNG_REQ_SCSI_BUS_RESET
) {
9109 AscStopChip(iop_base
);
9110 AscSetChipControl(iop_base
,
9111 (uchar
)(CC_SCSI_RESET
9113 DvcDelayNanoSecond(asc_dvc
, 60000);
9114 AscSetChipControl(iop_base
, CC_HALT
);
9115 AscSetChipStatus(iop_base
,
9116 CIW_CLR_SCSI_RESET_INT
);
9117 AscSetChipStatus(iop_base
, 0);
9118 AscSetChipControl(iop_base
, 0);
9121 if ((scsiq
->cntl
& QC_NO_CALLBACK
) == 0) {
9122 (*asc_isr_callback
) (asc_dvc
, scsiq
);
9124 if ((AscReadLramByte(iop_base
,
9125 (ushort
)(q_addr
+ (ushort
)
9128 asc_dvc
->unit_not_ready
&= ~target_id
;
9129 if (scsiq
->d3
.done_stat
!= QD_NO_ERROR
) {
9130 asc_dvc
->start_motor
&=
9137 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_Q_STATUS
);
9139 if ((scsiq
->cntl
& QC_NO_CALLBACK
) == 0) {
9140 (*asc_isr_callback
) (asc_dvc
, scsiq
);
9148 static int AscISR(ASC_DVC_VAR
*asc_dvc
)
9150 ASC_CS_TYPE chipstat
;
9152 ushort saved_ram_addr
;
9154 uchar saved_ctrl_reg
;
9159 iop_base
= asc_dvc
->iop_base
;
9160 int_pending
= FALSE
;
9162 if (AscIsIntPending(iop_base
) == 0) {
9166 if (((asc_dvc
->init_state
& ASC_INIT_STATE_END_LOAD_MC
) == 0)
9167 || (asc_dvc
->isr_callback
== 0)
9171 if (asc_dvc
->in_critical_cnt
!= 0) {
9172 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_ISR_ON_CRITICAL
);
9175 if (asc_dvc
->is_in_int
) {
9176 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_ISR_RE_ENTRY
);
9179 asc_dvc
->is_in_int
= TRUE
;
9180 ctrl_reg
= AscGetChipControl(iop_base
);
9181 saved_ctrl_reg
= ctrl_reg
& (~(CC_SCSI_RESET
| CC_CHIP_RESET
|
9182 CC_SINGLE_STEP
| CC_DIAG
| CC_TEST
));
9183 chipstat
= AscGetChipStatus(iop_base
);
9184 if (chipstat
& CSW_SCSI_RESET_LATCH
) {
9185 if (!(asc_dvc
->bus_type
& (ASC_IS_VL
| ASC_IS_EISA
))) {
9188 asc_dvc
->sdtr_done
= 0;
9189 saved_ctrl_reg
&= (uchar
)(~CC_HALT
);
9190 while ((AscGetChipStatus(iop_base
) &
9191 CSW_SCSI_RESET_ACTIVE
) && (i
-- > 0)) {
9192 DvcSleepMilliSecond(100);
9194 AscSetChipControl(iop_base
, (CC_CHIP_RESET
| CC_HALT
));
9195 AscSetChipControl(iop_base
, CC_HALT
);
9196 AscSetChipStatus(iop_base
, CIW_CLR_SCSI_RESET_INT
);
9197 AscSetChipStatus(iop_base
, 0);
9198 chipstat
= AscGetChipStatus(iop_base
);
9201 saved_ram_addr
= AscGetChipLramAddr(iop_base
);
9202 host_flag
= AscReadLramByte(iop_base
,
9204 (uchar
)(~ASC_HOST_FLAG_IN_ISR
);
9205 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
,
9206 (uchar
)(host_flag
| (uchar
)ASC_HOST_FLAG_IN_ISR
));
9207 if ((chipstat
& CSW_INT_PENDING
)
9210 AscAckInterrupt(iop_base
);
9212 if ((chipstat
& CSW_HALTED
) && (ctrl_reg
& CC_SINGLE_STEP
)) {
9213 if (AscIsrChipHalted(asc_dvc
) == ERR
) {
9214 goto ISR_REPORT_QDONE_FATAL_ERROR
;
9216 saved_ctrl_reg
&= (uchar
)(~CC_HALT
);
9219 ISR_REPORT_QDONE_FATAL_ERROR
:
9220 if ((asc_dvc
->dvc_cntl
& ASC_CNTL_INT_MULTI_Q
) != 0) {
9222 AscIsrQDone(asc_dvc
)) & 0x01) != 0) {
9227 AscIsrQDone(asc_dvc
)) == 1) {
9230 } while (status
== 0x11);
9232 if ((status
& 0x80) != 0)
9236 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
, host_flag
);
9237 AscSetChipLramAddr(iop_base
, saved_ram_addr
);
9238 AscSetChipControl(iop_base
, saved_ctrl_reg
);
9239 asc_dvc
->is_in_int
= FALSE
;
9240 return (int_pending
);
9243 /* Microcode buffer is kept after initialization for error recovery. */
9244 static uchar _asc_mcode_buf
[] = {
9245 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9246 0x00, 0x00, 0x00, 0x00,
9247 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00,
9248 0x00, 0x00, 0x00, 0x00,
9249 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9250 0x00, 0x00, 0x00, 0x00,
9251 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9252 0x00, 0x00, 0x00, 0x00,
9253 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05, 0x01, 0x00, 0x00, 0x00,
9254 0x00, 0xFF, 0x00, 0x00,
9255 0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00,
9256 0x00, 0x00, 0x00, 0x00,
9257 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF,
9258 0x00, 0x00, 0x00, 0x00,
9259 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x88,
9260 0x00, 0x00, 0x00, 0x00,
9261 0x80, 0x73, 0x48, 0x04, 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73,
9262 0x03, 0x23, 0x36, 0x40,
9263 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2,
9264 0xC2, 0x00, 0x92, 0x80,
9265 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xDF, 0x23, 0x36, 0x60,
9266 0xB6, 0x00, 0x92, 0x80,
9267 0x4F, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00,
9268 0x92, 0x80, 0x80, 0x62,
9269 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8,
9270 0xCD, 0x04, 0x4D, 0x00,
9271 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01,
9272 0xE6, 0x84, 0xD2, 0xC1,
9273 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97,
9274 0xC6, 0x81, 0xC2, 0x88,
9275 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00,
9276 0x84, 0x97, 0x07, 0xA6,
9277 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x01, 0xDE,
9278 0xC2, 0x88, 0xCE, 0x00,
9279 0x69, 0x60, 0xCE, 0x00, 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01,
9280 0x80, 0x63, 0x07, 0xA6,
9281 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6,
9282 0x34, 0x01, 0x00, 0x33,
9283 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01, 0x04, 0xCA, 0x0D, 0x23,
9284 0x68, 0x98, 0x4D, 0x04,
9285 0x04, 0x85, 0x05, 0xD8, 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23,
9286 0xF8, 0x88, 0xFB, 0x23,
9287 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01,
9288 0x00, 0x33, 0x0A, 0x00,
9289 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01, 0x00, 0x33, 0x0B, 0x00,
9290 0xC2, 0x88, 0xCD, 0x04,
9291 0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81,
9292 0x06, 0xAB, 0x82, 0x01,
9293 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3,
9294 0x3C, 0x01, 0x00, 0x05,
9295 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23, 0xA0, 0x01,
9296 0x15, 0x23, 0xA1, 0x01,
9297 0xBE, 0x81, 0xFD, 0x23, 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00,
9298 0x06, 0x61, 0x00, 0xA0,
9299 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00,
9300 0xC2, 0x88, 0x06, 0x23,
9301 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, 0x00, 0xA2, 0xD4, 0x01,
9302 0x57, 0x60, 0x00, 0xA0,
9303 0xDA, 0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73,
9304 0x4B, 0x00, 0x06, 0x61,
9305 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC,
9306 0x4F, 0x00, 0x84, 0x97,
9307 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x62, 0x97,
9308 0x48, 0x04, 0x84, 0x80,
9309 0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00,
9310 0x81, 0x73, 0x06, 0x29,
9311 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88,
9312 0x04, 0x98, 0xF0, 0x80,
9313 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02, 0x7C, 0x95, 0x06, 0xA6,
9314 0x34, 0x02, 0x03, 0xA6,
9315 0x4C, 0x04, 0x46, 0x82, 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96,
9316 0x46, 0x82, 0xFE, 0x95,
9317 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02,
9318 0x07, 0xA6, 0x5A, 0x02,
9319 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02, 0xC2, 0x88, 0x7C, 0x95,
9320 0x48, 0x82, 0x60, 0x96,
9321 0x48, 0x82, 0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84,
9322 0x04, 0x01, 0x0C, 0xDC,
9323 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01,
9324 0x6F, 0x00, 0xA5, 0x01,
9325 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01,
9326 0x02, 0xA6, 0xAA, 0x02,
9327 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04,
9328 0x01, 0xA6, 0xB4, 0x02,
9329 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E,
9330 0x80, 0x63, 0x00, 0x43,
9331 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23,
9332 0x04, 0x61, 0x84, 0x01,
9333 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F,
9334 0x00, 0x00, 0xEA, 0x82,
9335 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8,
9336 0x00, 0x33, 0x1F, 0x00,
9337 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E, 0x98,
9338 0xB6, 0x2D, 0x01, 0xA6,
9339 0x14, 0x03, 0x00, 0xA6, 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6,
9340 0x10, 0x03, 0x03, 0xA6,
9341 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88,
9342 0x7C, 0x95, 0xEE, 0x82,
9343 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42, 0x7E, 0x98, 0x64, 0xE4,
9344 0x04, 0x01, 0x2D, 0xC8,
9345 0x31, 0x05, 0x07, 0x01, 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01,
9346 0x05, 0x05, 0x86, 0x98,
9347 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6,
9348 0x3C, 0x04, 0x06, 0xA6,
9349 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33, 0x25, 0x00, 0xC2, 0x88,
9350 0x7C, 0x95, 0x32, 0x83,
9351 0x60, 0x96, 0x32, 0x83, 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05,
9352 0xEB, 0x04, 0x00, 0x33,
9353 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05,
9354 0xFF, 0xA2, 0x7A, 0x03,
9355 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, 0x05, 0x05, 0x15, 0x01,
9356 0x00, 0xA2, 0x9A, 0x03,
9357 0xEC, 0x00, 0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00,
9358 0x01, 0xA6, 0x96, 0x03,
9359 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6,
9360 0xA4, 0x03, 0x00, 0xA6,
9361 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42, 0x01, 0xA6, 0xA4, 0x03,
9362 0x07, 0xA6, 0xB2, 0x03,
9363 0xD4, 0x83, 0x7C, 0x95, 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88,
9364 0xA8, 0x98, 0x80, 0x42,
9365 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95,
9366 0xC0, 0x83, 0x00, 0x33,
9367 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23,
9368 0xA0, 0x01, 0x12, 0x23,
9369 0xA1, 0x01, 0x10, 0x84, 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B,
9370 0x80, 0x67, 0x05, 0x23,
9371 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04,
9372 0x06, 0xA6, 0x0A, 0x04,
9373 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xF4, 0x83, 0x60, 0x96,
9374 0xF4, 0x83, 0x20, 0x84,
9375 0x07, 0xF0, 0x06, 0xA4, 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23,
9376 0x83, 0x03, 0x80, 0x63,
9377 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6,
9378 0x38, 0x04, 0x00, 0x33,
9379 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84, 0x60, 0x96, 0x20, 0x84,
9380 0x1D, 0x01, 0x06, 0xCC,
9381 0x00, 0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62,
9382 0xA2, 0x0D, 0x80, 0x63,
9383 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03,
9384 0x80, 0x63, 0xA3, 0x01,
9385 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0,
9386 0x76, 0x04, 0xE0, 0x00,
9387 0x00, 0x33, 0x1D, 0x00, 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00,
9388 0x00, 0x33, 0x1E, 0x00,
9389 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04,
9390 0x08, 0x23, 0x22, 0xA3,
9391 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02, 0x23, 0x22, 0xA3,
9392 0xC4, 0x04, 0x42, 0x23,
9393 0xF8, 0x88, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23,
9394 0xF8, 0x88, 0x04, 0x98,
9395 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20,
9396 0x81, 0x62, 0xE8, 0x81,
9397 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE, 0x04, 0x98, 0xB4, 0x98,
9398 0x00, 0x33, 0x00, 0x81,
9399 0xC0, 0x20, 0x81, 0x62, 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23,
9400 0xF8, 0x88, 0x04, 0x23,
9401 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3,
9402 0xF4, 0x04, 0x00, 0x33,
9403 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01,
9404 0x04, 0x23, 0xA0, 0x01,
9405 0x04, 0x98, 0x26, 0x95, 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00,
9406 0x00, 0xA3, 0x22, 0x05,
9407 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85,
9408 0x46, 0x97, 0xCD, 0x04,
9409 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80, 0x23,
9410 0x82, 0x01, 0x34, 0x85,
9411 0x02, 0x23, 0xA0, 0x01, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05,
9412 0x1D, 0x01, 0x04, 0xD6,
9413 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01,
9414 0x49, 0x00, 0x81, 0x01,
9415 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, 0xF7, 0x04, 0x03, 0x01,
9416 0x49, 0x04, 0x80, 0x01,
9417 0xC9, 0x00, 0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04,
9418 0x01, 0x23, 0xEA, 0x00,
9419 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63,
9420 0x07, 0xA4, 0xF8, 0x05,
9421 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85, 0x00, 0x33, 0x2D, 0x00,
9422 0xC2, 0x88, 0x04, 0xA0,
9423 0xB8, 0x05, 0x80, 0x63, 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61,
9424 0x00, 0xA2, 0xA4, 0x05,
9425 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00,
9426 0x62, 0x97, 0x04, 0x85,
9427 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85, 0x08, 0xA0, 0xBE, 0x05,
9428 0xF4, 0x85, 0x03, 0xA0,
9429 0xC4, 0x05, 0xF4, 0x85, 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63,
9430 0xCC, 0x86, 0x07, 0xA0,
9431 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05,
9432 0x80, 0x67, 0x80, 0x63,
9433 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23, 0x68, 0x98, 0x48, 0x23,
9434 0xF8, 0x88, 0x07, 0x23,
9435 0x80, 0x00, 0x06, 0x87, 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00,
9436 0x00, 0x63, 0x4A, 0x00,
9437 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23,
9438 0x07, 0x41, 0x83, 0x03,
9439 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33, 0x37, 0x00, 0xC2, 0x88,
9440 0x1D, 0x01, 0x01, 0xD6,
9441 0x20, 0x23, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00,
9442 0x07, 0xA6, 0x7C, 0x05,
9443 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00,
9444 0x52, 0x00, 0x06, 0x61,
9445 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07, 0x41,
9446 0x00, 0x63, 0x1D, 0x01,
9447 0x04, 0xCC, 0x00, 0x33, 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23,
9448 0x07, 0x41, 0x00, 0x63,
9449 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23,
9450 0xDF, 0x00, 0x06, 0xA6,
9451 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x80, 0x63, 0x00, 0x33,
9452 0x00, 0x40, 0xC0, 0x20,
9453 0x81, 0x62, 0x00, 0x63, 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63,
9454 0x06, 0xA6, 0x94, 0x06,
9455 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B,
9456 0x40, 0x0E, 0x80, 0x63,
9457 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x40, 0x0E,
9458 0x80, 0x63, 0x00, 0x43,
9459 0x00, 0xA0, 0xA2, 0x06, 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05,
9460 0x80, 0x67, 0x40, 0x0E,
9461 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63,
9462 0x07, 0xA6, 0xD6, 0x06,
9463 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0x89, 0x00,
9464 0x0A, 0x2B, 0x07, 0xA6,
9465 0xE8, 0x06, 0x00, 0x33, 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2,
9466 0xF4, 0x06, 0xC0, 0x0E,
9467 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20,
9468 0x81, 0x62, 0x04, 0x01,
9469 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6,
9470 0x8C, 0x06, 0x00, 0x33,
9471 0x2C, 0x00, 0xC2, 0x88, 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03,
9472 0x80, 0x63, 0x06, 0xA6,
9473 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88,
9474 0x00, 0x00, 0x80, 0x67,
9475 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07, 0x07, 0xA6, 0x7C, 0x05,
9476 0xBF, 0x23, 0x04, 0x61,
9477 0x84, 0x01, 0xE6, 0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00,
9478 0x00, 0x01, 0xF2, 0x00,
9479 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04,
9480 0x80, 0x05, 0x81, 0x05,
9481 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00,
9482 0x70, 0x00, 0x81, 0x01,
9483 0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04,
9484 0x70, 0x00, 0x80, 0x01,
9485 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01,
9486 0xF1, 0x00, 0x70, 0x00,
9487 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81, 0x01,
9488 0x71, 0x04, 0x70, 0x00,
9489 0x81, 0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05,
9490 0xA3, 0x01, 0xA2, 0x01,
9491 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1,
9492 0xC4, 0x07, 0x00, 0x33,
9493 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8,
9494 0x48, 0x00, 0xB0, 0x01,
9495 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43,
9496 0x00, 0xA2, 0xE4, 0x07,
9497 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01,
9498 0x05, 0x05, 0x00, 0x63,
9499 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43,
9500 0x76, 0x08, 0x80, 0x02,
9501 0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04,
9502 0x00, 0x02, 0x00, 0xA0,
9503 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04,
9504 0x00, 0x63, 0xF3, 0x04,
9505 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00, 0xCF, 0x40,
9506 0x00, 0xA2, 0x44, 0x08,
9507 0x74, 0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1,
9508 0x24, 0x08, 0x04, 0x98,
9509 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04,
9510 0x5A, 0x88, 0x02, 0x01,
9511 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95, 0x4A, 0x88, 0x75, 0x00,
9512 0x00, 0xA3, 0x64, 0x08,
9513 0x00, 0x05, 0x4E, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63,
9514 0x06, 0xA6, 0x76, 0x08,
9515 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63,
9516 0x00, 0x63, 0x38, 0x2B,
9517 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, 0x31, 0x05, 0x92, 0x98,
9518 0x05, 0x05, 0xB2, 0x09,
9519 0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63,
9520 0x80, 0x32, 0x80, 0x36,
9521 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32,
9522 0x40, 0x36, 0x40, 0x3A,
9523 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0xB4, 0x08,
9524 0x5D, 0x00, 0xFE, 0xC3,
9525 0x00, 0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73,
9526 0xFF, 0xFD, 0x80, 0x73,
9527 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01,
9528 0xA1, 0x23, 0xA1, 0x01,
9529 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2,
9530 0x80, 0x00, 0x03, 0xC2,
9531 0xF1, 0xC7, 0x41, 0x23, 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23,
9532 0xA0, 0x01, 0xE6, 0x84,
9535 static ushort _asc_mcode_size
= sizeof(_asc_mcode_buf
);
9536 static ADV_DCNT _asc_mcode_chksum
= 0x012C453FUL
;
9538 #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16
9539 static uchar _syn_offset_one_disable_cmd
[ASC_SYN_OFFSET_ONE_DISABLE_LIST
] = {
9558 static int AscExeScsiQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
)
9561 ulong last_int_level
;
9564 int disable_syn_offset_one_fix
;
9567 ASC_EXE_CALLBACK asc_exe_callback
;
9568 ushort sg_entry_cnt
= 0;
9569 ushort sg_entry_cnt_minus_one
= 0;
9576 ASC_SG_HEAD
*sg_head
;
9579 iop_base
= asc_dvc
->iop_base
;
9580 sg_head
= scsiq
->sg_head
;
9581 asc_exe_callback
= asc_dvc
->exe_callback
;
9582 if (asc_dvc
->err_code
!= 0)
9584 if (scsiq
== (ASC_SCSI_Q
*)0L) {
9585 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_SCSIQ_NULL_PTR
);
9589 if ((scsiq
->q2
.tag_code
& ASC_TAG_FLAG_EXTRA_BYTES
) == 0) {
9590 scsiq
->q1
.extra_bytes
= 0;
9593 target_ix
= scsiq
->q2
.target_ix
;
9594 tid_no
= ASC_TIX_TO_TID(target_ix
);
9596 if (scsiq
->cdbptr
[0] == REQUEST_SENSE
) {
9597 if ((asc_dvc
->init_sdtr
& scsiq
->q1
.target_id
) != 0) {
9598 asc_dvc
->sdtr_done
&= ~scsiq
->q1
.target_id
;
9599 sdtr_data
= AscGetMCodeInitSDTRAtID(iop_base
, tid_no
);
9600 AscMsgOutSDTR(asc_dvc
,
9602 sdtr_period_tbl
[(sdtr_data
>> 4) &
9606 (uchar
)(sdtr_data
& (uchar
)
9607 ASC_SYN_MAX_OFFSET
));
9608 scsiq
->q1
.cntl
|= (QC_MSG_OUT
| QC_URGENT
);
9611 last_int_level
= DvcEnterCritical();
9612 if (asc_dvc
->in_critical_cnt
!= 0) {
9613 DvcLeaveCritical(last_int_level
);
9614 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_CRITICAL_RE_ENTRY
);
9617 asc_dvc
->in_critical_cnt
++;
9618 if ((scsiq
->q1
.cntl
& QC_SG_HEAD
) != 0) {
9619 if ((sg_entry_cnt
= sg_head
->entry_cnt
) == 0) {
9620 asc_dvc
->in_critical_cnt
--;
9621 DvcLeaveCritical(last_int_level
);
9624 #if !CC_VERY_LONG_SG_LIST
9625 if (sg_entry_cnt
> ASC_MAX_SG_LIST
) {
9626 asc_dvc
->in_critical_cnt
--;
9627 DvcLeaveCritical(last_int_level
);
9630 #endif /* !CC_VERY_LONG_SG_LIST */
9631 if (sg_entry_cnt
== 1) {
9632 scsiq
->q1
.data_addr
=
9633 (ADV_PADDR
)sg_head
->sg_list
[0].addr
;
9634 scsiq
->q1
.data_cnt
=
9635 (ADV_DCNT
)sg_head
->sg_list
[0].bytes
;
9636 scsiq
->q1
.cntl
&= ~(QC_SG_HEAD
| QC_SG_SWAP_QUEUE
);
9638 sg_entry_cnt_minus_one
= sg_entry_cnt
- 1;
9640 scsi_cmd
= scsiq
->cdbptr
[0];
9641 disable_syn_offset_one_fix
= FALSE
;
9642 if ((asc_dvc
->pci_fix_asyn_xfer
& scsiq
->q1
.target_id
) &&
9643 !(asc_dvc
->pci_fix_asyn_xfer_always
& scsiq
->q1
.target_id
)) {
9644 if (scsiq
->q1
.cntl
& QC_SG_HEAD
) {
9646 for (i
= 0; i
< sg_entry_cnt
; i
++) {
9648 (ADV_DCNT
)le32_to_cpu(sg_head
->sg_list
[i
].
9652 data_cnt
= le32_to_cpu(scsiq
->q1
.data_cnt
);
9654 if (data_cnt
!= 0UL) {
9655 if (data_cnt
< 512UL) {
9656 disable_syn_offset_one_fix
= TRUE
;
9658 for (i
= 0; i
< ASC_SYN_OFFSET_ONE_DISABLE_LIST
;
9661 _syn_offset_one_disable_cmd
[i
];
9662 if (disable_cmd
== 0xFF) {
9665 if (scsi_cmd
== disable_cmd
) {
9666 disable_syn_offset_one_fix
=
9674 if (disable_syn_offset_one_fix
) {
9675 scsiq
->q2
.tag_code
&= ~MSG_SIMPLE_TAG
;
9676 scsiq
->q2
.tag_code
|= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX
|
9677 ASC_TAG_FLAG_DISABLE_DISCONNECT
);
9679 scsiq
->q2
.tag_code
&= 0x27;
9681 if ((scsiq
->q1
.cntl
& QC_SG_HEAD
) != 0) {
9682 if (asc_dvc
->bug_fix_cntl
) {
9683 if (asc_dvc
->bug_fix_cntl
& ASC_BUG_FIX_IF_NOT_DWB
) {
9684 if ((scsi_cmd
== READ_6
) ||
9685 (scsi_cmd
== READ_10
)) {
9687 (ADV_PADDR
)le32_to_cpu(sg_head
->
9689 [sg_entry_cnt_minus_one
].
9691 (ADV_DCNT
)le32_to_cpu(sg_head
->
9693 [sg_entry_cnt_minus_one
].
9696 (uchar
)((ushort
)addr
& 0x0003);
9697 if ((extra_bytes
!= 0)
9701 ASC_TAG_FLAG_EXTRA_BYTES
)
9703 scsiq
->q2
.tag_code
|=
9704 ASC_TAG_FLAG_EXTRA_BYTES
;
9705 scsiq
->q1
.extra_bytes
=
9708 le32_to_cpu(sg_head
->
9710 [sg_entry_cnt_minus_one
].
9713 (ASC_DCNT
) extra_bytes
;
9716 [sg_entry_cnt_minus_one
].
9718 cpu_to_le32(data_cnt
);
9723 sg_head
->entry_to_copy
= sg_head
->entry_cnt
;
9724 #if CC_VERY_LONG_SG_LIST
9726 * Set the sg_entry_cnt to the maximum possible. The rest of
9727 * the SG elements will be copied when the RISC completes the
9728 * SG elements that fit and halts.
9730 if (sg_entry_cnt
> ASC_MAX_SG_LIST
) {
9731 sg_entry_cnt
= ASC_MAX_SG_LIST
;
9733 #endif /* CC_VERY_LONG_SG_LIST */
9734 n_q_required
= AscSgListToQueue(sg_entry_cnt
);
9735 if ((AscGetNumOfFreeQueue(asc_dvc
, target_ix
, n_q_required
) >=
9736 (uint
) n_q_required
)
9737 || ((scsiq
->q1
.cntl
& QC_URGENT
) != 0)) {
9739 AscSendScsiQueue(asc_dvc
, scsiq
,
9740 n_q_required
)) == 1) {
9741 asc_dvc
->in_critical_cnt
--;
9742 if (asc_exe_callback
!= 0) {
9743 (*asc_exe_callback
) (asc_dvc
, scsiq
);
9745 DvcLeaveCritical(last_int_level
);
9750 if (asc_dvc
->bug_fix_cntl
) {
9751 if (asc_dvc
->bug_fix_cntl
& ASC_BUG_FIX_IF_NOT_DWB
) {
9752 if ((scsi_cmd
== READ_6
) ||
9753 (scsi_cmd
== READ_10
)) {
9755 le32_to_cpu(scsiq
->q1
.data_addr
) +
9756 le32_to_cpu(scsiq
->q1
.data_cnt
);
9758 (uchar
)((ushort
)addr
& 0x0003);
9759 if ((extra_bytes
!= 0)
9763 ASC_TAG_FLAG_EXTRA_BYTES
)
9766 le32_to_cpu(scsiq
->q1
.
9768 if (((ushort
)data_cnt
& 0x01FF)
9770 scsiq
->q2
.tag_code
|=
9771 ASC_TAG_FLAG_EXTRA_BYTES
;
9772 data_cnt
-= (ASC_DCNT
)
9774 scsiq
->q1
.data_cnt
=
9777 scsiq
->q1
.extra_bytes
=
9785 if ((AscGetNumOfFreeQueue(asc_dvc
, target_ix
, 1) >= 1) ||
9786 ((scsiq
->q1
.cntl
& QC_URGENT
) != 0)) {
9787 if ((sta
= AscSendScsiQueue(asc_dvc
, scsiq
,
9788 n_q_required
)) == 1) {
9789 asc_dvc
->in_critical_cnt
--;
9790 if (asc_exe_callback
!= 0) {
9791 (*asc_exe_callback
) (asc_dvc
, scsiq
);
9793 DvcLeaveCritical(last_int_level
);
9798 asc_dvc
->in_critical_cnt
--;
9799 DvcLeaveCritical(last_int_level
);
9804 AscSendScsiQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
, uchar n_q_required
)
9813 iop_base
= asc_dvc
->iop_base
;
9814 target_ix
= scsiq
->q2
.target_ix
;
9815 tid_no
= ASC_TIX_TO_TID(target_ix
);
9817 free_q_head
= (uchar
)AscGetVarFreeQHead(iop_base
);
9818 if (n_q_required
> 1) {
9819 if ((next_qp
= AscAllocMultipleFreeQueue(iop_base
,
9820 free_q_head
, (uchar
)
9822 != (uchar
)ASC_QLINK_END
) {
9823 asc_dvc
->last_q_shortage
= 0;
9824 scsiq
->sg_head
->queue_cnt
= n_q_required
- 1;
9825 scsiq
->q1
.q_no
= free_q_head
;
9826 if ((sta
= AscPutReadySgListQueue(asc_dvc
, scsiq
,
9827 free_q_head
)) == 1) {
9828 AscPutVarFreeQHead(iop_base
, next_qp
);
9829 asc_dvc
->cur_total_qng
+= (uchar
)(n_q_required
);
9830 asc_dvc
->cur_dvc_qng
[tid_no
]++;
9834 } else if (n_q_required
== 1) {
9835 if ((next_qp
= AscAllocFreeQueue(iop_base
,
9838 scsiq
->q1
.q_no
= free_q_head
;
9839 if ((sta
= AscPutReadyQueue(asc_dvc
, scsiq
,
9840 free_q_head
)) == 1) {
9841 AscPutVarFreeQHead(iop_base
, next_qp
);
9842 asc_dvc
->cur_total_qng
++;
9843 asc_dvc
->cur_dvc_qng
[tid_no
]++;
9851 static int AscSgListToQueue(int sg_list
)
9855 n_sg_list_qs
= ((sg_list
- 1) / ASC_SG_LIST_PER_Q
);
9856 if (((sg_list
- 1) % ASC_SG_LIST_PER_Q
) != 0)
9858 return (n_sg_list_qs
+ 1);
9862 AscGetNumOfFreeQueue(ASC_DVC_VAR
*asc_dvc
, uchar target_ix
, uchar n_qs
)
9866 ASC_SCSI_BIT_ID_TYPE target_id
;
9869 target_id
= ASC_TIX_TO_TARGET_ID(target_ix
);
9870 tid_no
= ASC_TIX_TO_TID(target_ix
);
9871 if ((asc_dvc
->unit_not_ready
& target_id
) ||
9872 (asc_dvc
->queue_full_or_busy
& target_id
)) {
9876 cur_used_qs
= (uint
) asc_dvc
->cur_total_qng
+
9877 (uint
) asc_dvc
->last_q_shortage
+ (uint
) ASC_MIN_FREE_Q
;
9879 cur_used_qs
= (uint
) asc_dvc
->cur_total_qng
+
9880 (uint
) ASC_MIN_FREE_Q
;
9882 if ((uint
) (cur_used_qs
+ n_qs
) <= (uint
) asc_dvc
->max_total_qng
) {
9883 cur_free_qs
= (uint
) asc_dvc
->max_total_qng
- cur_used_qs
;
9884 if (asc_dvc
->cur_dvc_qng
[tid_no
] >=
9885 asc_dvc
->max_dvc_qng
[tid_no
]) {
9888 return (cur_free_qs
);
9891 if ((n_qs
> asc_dvc
->last_q_shortage
)
9892 && (n_qs
<= (asc_dvc
->max_total_qng
- ASC_MIN_FREE_Q
))) {
9893 asc_dvc
->last_q_shortage
= n_qs
;
9899 static int AscPutReadyQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
, uchar q_no
)
9904 uchar syn_period_ix
;
9908 iop_base
= asc_dvc
->iop_base
;
9909 if (((asc_dvc
->init_sdtr
& scsiq
->q1
.target_id
) != 0) &&
9910 ((asc_dvc
->sdtr_done
& scsiq
->q1
.target_id
) == 0)) {
9911 tid_no
= ASC_TIX_TO_TID(scsiq
->q2
.target_ix
);
9912 sdtr_data
= AscGetMCodeInitSDTRAtID(iop_base
, tid_no
);
9914 (sdtr_data
>> 4) & (asc_dvc
->max_sdtr_index
- 1);
9915 syn_offset
= sdtr_data
& ASC_SYN_MAX_OFFSET
;
9916 AscMsgOutSDTR(asc_dvc
,
9917 asc_dvc
->sdtr_period_tbl
[syn_period_ix
],
9919 scsiq
->q1
.cntl
|= QC_MSG_OUT
;
9921 q_addr
= ASC_QNO_TO_QADDR(q_no
);
9922 if ((scsiq
->q1
.target_id
& asc_dvc
->use_tagged_qng
) == 0) {
9923 scsiq
->q2
.tag_code
&= ~MSG_SIMPLE_TAG
;
9925 scsiq
->q1
.status
= QS_FREE
;
9926 AscMemWordCopyPtrToLram(iop_base
,
9927 q_addr
+ ASC_SCSIQ_CDB_BEG
,
9928 (uchar
*)scsiq
->cdbptr
, scsiq
->q2
.cdb_len
>> 1);
9930 DvcPutScsiQ(iop_base
,
9931 q_addr
+ ASC_SCSIQ_CPY_BEG
,
9932 (uchar
*)&scsiq
->q1
.cntl
,
9933 ((sizeof(ASC_SCSIQ_1
) + sizeof(ASC_SCSIQ_2
)) / 2) - 1);
9934 AscWriteLramWord(iop_base
,
9935 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_STATUS
),
9936 (ushort
)(((ushort
)scsiq
->q1
.
9937 q_no
<< 8) | (ushort
)QS_READY
));
9942 AscPutReadySgListQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
, uchar q_no
)
9946 ASC_SG_HEAD
*sg_head
;
9947 ASC_SG_LIST_Q scsi_sg_q
;
9948 ASC_DCNT saved_data_addr
;
9949 ASC_DCNT saved_data_cnt
;
9951 ushort sg_list_dwords
;
9953 ushort sg_entry_cnt
;
9957 iop_base
= asc_dvc
->iop_base
;
9958 sg_head
= scsiq
->sg_head
;
9959 saved_data_addr
= scsiq
->q1
.data_addr
;
9960 saved_data_cnt
= scsiq
->q1
.data_cnt
;
9961 scsiq
->q1
.data_addr
= (ASC_PADDR
) sg_head
->sg_list
[0].addr
;
9962 scsiq
->q1
.data_cnt
= (ASC_DCNT
) sg_head
->sg_list
[0].bytes
;
9963 #if CC_VERY_LONG_SG_LIST
9965 * If sg_head->entry_cnt is greater than ASC_MAX_SG_LIST
9966 * then not all SG elements will fit in the allocated queues.
9967 * The rest of the SG elements will be copied when the RISC
9968 * completes the SG elements that fit and halts.
9970 if (sg_head
->entry_cnt
> ASC_MAX_SG_LIST
) {
9972 * Set sg_entry_cnt to be the number of SG elements that
9973 * will fit in the allocated SG queues. It is minus 1, because
9974 * the first SG element is handled above. ASC_MAX_SG_LIST is
9975 * already inflated by 1 to account for this. For example it
9976 * may be 50 which is 1 + 7 queues * 7 SG elements.
9978 sg_entry_cnt
= ASC_MAX_SG_LIST
- 1;
9981 * Keep track of remaining number of SG elements that will
9982 * need to be handled from a_isr.c.
9984 scsiq
->remain_sg_entry_cnt
=
9985 sg_head
->entry_cnt
- ASC_MAX_SG_LIST
;
9987 #endif /* CC_VERY_LONG_SG_LIST */
9989 * Set sg_entry_cnt to be the number of SG elements that
9990 * will fit in the allocated SG queues. It is minus 1, because
9991 * the first SG element is handled above.
9993 sg_entry_cnt
= sg_head
->entry_cnt
- 1;
9994 #if CC_VERY_LONG_SG_LIST
9996 #endif /* CC_VERY_LONG_SG_LIST */
9997 if (sg_entry_cnt
!= 0) {
9998 scsiq
->q1
.cntl
|= QC_SG_HEAD
;
9999 q_addr
= ASC_QNO_TO_QADDR(q_no
);
10001 scsiq
->q1
.sg_queue_cnt
= sg_head
->queue_cnt
;
10002 scsi_sg_q
.sg_head_qp
= q_no
;
10003 scsi_sg_q
.cntl
= QCSG_SG_XFER_LIST
;
10004 for (i
= 0; i
< sg_head
->queue_cnt
; i
++) {
10005 scsi_sg_q
.seq_no
= i
+ 1;
10006 if (sg_entry_cnt
> ASC_SG_LIST_PER_Q
) {
10007 sg_list_dwords
= (uchar
)(ASC_SG_LIST_PER_Q
* 2);
10008 sg_entry_cnt
-= ASC_SG_LIST_PER_Q
;
10010 scsi_sg_q
.sg_list_cnt
=
10012 scsi_sg_q
.sg_cur_list_cnt
=
10015 scsi_sg_q
.sg_list_cnt
=
10016 ASC_SG_LIST_PER_Q
- 1;
10017 scsi_sg_q
.sg_cur_list_cnt
=
10018 ASC_SG_LIST_PER_Q
- 1;
10021 #if CC_VERY_LONG_SG_LIST
10023 * This is the last SG queue in the list of
10024 * allocated SG queues. If there are more
10025 * SG elements than will fit in the allocated
10026 * queues, then set the QCSG_SG_XFER_MORE flag.
10028 if (sg_head
->entry_cnt
> ASC_MAX_SG_LIST
) {
10029 scsi_sg_q
.cntl
|= QCSG_SG_XFER_MORE
;
10031 #endif /* CC_VERY_LONG_SG_LIST */
10032 scsi_sg_q
.cntl
|= QCSG_SG_XFER_END
;
10033 #if CC_VERY_LONG_SG_LIST
10035 #endif /* CC_VERY_LONG_SG_LIST */
10036 sg_list_dwords
= sg_entry_cnt
<< 1;
10038 scsi_sg_q
.sg_list_cnt
= sg_entry_cnt
;
10039 scsi_sg_q
.sg_cur_list_cnt
=
10042 scsi_sg_q
.sg_list_cnt
=
10044 scsi_sg_q
.sg_cur_list_cnt
=
10049 next_qp
= AscReadLramByte(iop_base
,
10052 scsi_sg_q
.q_no
= next_qp
;
10053 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
10054 AscMemWordCopyPtrToLram(iop_base
,
10055 q_addr
+ ASC_SCSIQ_SGHD_CPY_BEG
,
10056 (uchar
*)&scsi_sg_q
,
10057 sizeof(ASC_SG_LIST_Q
) >> 1);
10058 AscMemDWordCopyPtrToLram(iop_base
,
10059 q_addr
+ ASC_SGQ_LIST_BEG
,
10060 (uchar
*)&sg_head
->
10063 sg_index
+= ASC_SG_LIST_PER_Q
;
10064 scsiq
->next_sg_index
= sg_index
;
10067 scsiq
->q1
.cntl
&= ~QC_SG_HEAD
;
10069 sta
= AscPutReadyQueue(asc_dvc
, scsiq
, q_no
);
10070 scsiq
->q1
.data_addr
= saved_data_addr
;
10071 scsiq
->q1
.data_cnt
= saved_data_cnt
;
10076 AscSetRunChipSynRegAtID(PortAddr iop_base
, uchar tid_no
, uchar sdtr_data
)
10080 if (AscHostReqRiscHalt(iop_base
)) {
10081 sta
= AscSetChipSynRegAtID(iop_base
, tid_no
, sdtr_data
);
10082 AscStartChip(iop_base
);
10088 static int AscSetChipSynRegAtID(PortAddr iop_base
, uchar id
, uchar sdtr_data
)
10090 ASC_SCSI_BIT_ID_TYPE org_id
;
10094 AscSetBank(iop_base
, 1);
10095 org_id
= AscReadChipDvcID(iop_base
);
10096 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
10097 if (org_id
== (0x01 << i
))
10100 org_id
= (ASC_SCSI_BIT_ID_TYPE
) i
;
10101 AscWriteChipDvcID(iop_base
, id
);
10102 if (AscReadChipDvcID(iop_base
) == (0x01 << id
)) {
10103 AscSetBank(iop_base
, 0);
10104 AscSetChipSyn(iop_base
, sdtr_data
);
10105 if (AscGetChipSyn(iop_base
) != sdtr_data
) {
10111 AscSetBank(iop_base
, 1);
10112 AscWriteChipDvcID(iop_base
, org_id
);
10113 AscSetBank(iop_base
, 0);
10117 static ushort
AscInitLram(ASC_DVC_VAR
*asc_dvc
)
10124 iop_base
= asc_dvc
->iop_base
;
10126 AscMemWordSetLram(iop_base
, ASC_QADR_BEG
, 0,
10127 (ushort
)(((int)(asc_dvc
->max_total_qng
+ 2 + 1) *
10130 i
= ASC_MIN_ACTIVE_QNO
;
10131 s_addr
= ASC_QADR_BEG
+ ASC_QBLK_SIZE
;
10132 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_FWD
),
10134 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_BWD
),
10135 (uchar
)(asc_dvc
->max_total_qng
));
10136 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_QNO
),
10139 s_addr
+= ASC_QBLK_SIZE
;
10140 for (; i
< asc_dvc
->max_total_qng
; i
++, s_addr
+= ASC_QBLK_SIZE
) {
10141 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_FWD
),
10143 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_BWD
),
10145 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_QNO
),
10148 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_FWD
),
10149 (uchar
)ASC_QLINK_END
);
10150 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_BWD
),
10151 (uchar
)(asc_dvc
->max_total_qng
- 1));
10152 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_QNO
),
10153 (uchar
)asc_dvc
->max_total_qng
);
10155 s_addr
+= ASC_QBLK_SIZE
;
10156 for (; i
<= (uchar
)(asc_dvc
->max_total_qng
+ 3);
10157 i
++, s_addr
+= ASC_QBLK_SIZE
) {
10158 AscWriteLramByte(iop_base
,
10159 (ushort
)(s_addr
+ (ushort
)ASC_SCSIQ_B_FWD
), i
);
10160 AscWriteLramByte(iop_base
,
10161 (ushort
)(s_addr
+ (ushort
)ASC_SCSIQ_B_BWD
), i
);
10162 AscWriteLramByte(iop_base
,
10163 (ushort
)(s_addr
+ (ushort
)ASC_SCSIQ_B_QNO
), i
);
10165 return (warn_code
);
10168 static ushort
AscInitQLinkVar(ASC_DVC_VAR
*asc_dvc
)
10174 iop_base
= asc_dvc
->iop_base
;
10175 AscPutRiscVarFreeQHead(iop_base
, 1);
10176 AscPutRiscVarDoneQTail(iop_base
, asc_dvc
->max_total_qng
);
10177 AscPutVarFreeQHead(iop_base
, 1);
10178 AscPutVarDoneQTail(iop_base
, asc_dvc
->max_total_qng
);
10179 AscWriteLramByte(iop_base
, ASCV_BUSY_QHEAD_B
,
10180 (uchar
)((int)asc_dvc
->max_total_qng
+ 1));
10181 AscWriteLramByte(iop_base
, ASCV_DISC1_QHEAD_B
,
10182 (uchar
)((int)asc_dvc
->max_total_qng
+ 2));
10183 AscWriteLramByte(iop_base
, (ushort
)ASCV_TOTAL_READY_Q_B
,
10184 asc_dvc
->max_total_qng
);
10185 AscWriteLramWord(iop_base
, ASCV_ASCDVC_ERR_CODE_W
, 0);
10186 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
10187 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
, 0);
10188 AscWriteLramByte(iop_base
, ASCV_SCSIBUSY_B
, 0);
10189 AscWriteLramByte(iop_base
, ASCV_WTM_FLAG_B
, 0);
10190 AscPutQDoneInProgress(iop_base
, 0);
10191 lram_addr
= ASC_QADR_BEG
;
10192 for (i
= 0; i
< 32; i
++, lram_addr
+= 2) {
10193 AscWriteLramWord(iop_base
, lram_addr
, 0);
10198 static int AscSetLibErrorCode(ASC_DVC_VAR
*asc_dvc
, ushort err_code
)
10200 if (asc_dvc
->err_code
== 0) {
10201 asc_dvc
->err_code
= err_code
;
10202 AscWriteLramWord(asc_dvc
->iop_base
, ASCV_ASCDVC_ERR_CODE_W
,
10209 AscMsgOutSDTR(ASC_DVC_VAR
*asc_dvc
, uchar sdtr_period
, uchar sdtr_offset
)
10212 uchar sdtr_period_index
;
10215 iop_base
= asc_dvc
->iop_base
;
10216 sdtr_buf
.msg_type
= MS_EXTEND
;
10217 sdtr_buf
.msg_len
= MS_SDTR_LEN
;
10218 sdtr_buf
.msg_req
= MS_SDTR_CODE
;
10219 sdtr_buf
.xfer_period
= sdtr_period
;
10220 sdtr_offset
&= ASC_SYN_MAX_OFFSET
;
10221 sdtr_buf
.req_ack_offset
= sdtr_offset
;
10222 if ((sdtr_period_index
=
10223 AscGetSynPeriodIndex(asc_dvc
, sdtr_period
)) <=
10224 asc_dvc
->max_sdtr_index
) {
10225 AscMemWordCopyPtrToLram(iop_base
,
10227 (uchar
*)&sdtr_buf
,
10228 sizeof(EXT_MSG
) >> 1);
10229 return ((sdtr_period_index
<< 4) | sdtr_offset
);
10232 sdtr_buf
.req_ack_offset
= 0;
10233 AscMemWordCopyPtrToLram(iop_base
,
10235 (uchar
*)&sdtr_buf
,
10236 sizeof(EXT_MSG
) >> 1);
10242 AscCalSDTRData(ASC_DVC_VAR
*asc_dvc
, uchar sdtr_period
, uchar syn_offset
)
10245 uchar sdtr_period_ix
;
10247 sdtr_period_ix
= AscGetSynPeriodIndex(asc_dvc
, sdtr_period
);
10248 if ((sdtr_period_ix
> asc_dvc
->max_sdtr_index
)
10252 byte
= (sdtr_period_ix
<< 4) | (syn_offset
& ASC_SYN_MAX_OFFSET
);
10256 static void AscSetChipSDTR(PortAddr iop_base
, uchar sdtr_data
, uchar tid_no
)
10258 AscSetChipSynRegAtID(iop_base
, tid_no
, sdtr_data
);
10259 AscPutMCodeSDTRDoneAtID(iop_base
, tid_no
, sdtr_data
);
10263 static uchar
AscGetSynPeriodIndex(ASC_DVC_VAR
*asc_dvc
, uchar syn_time
)
10265 uchar
*period_table
;
10270 period_table
= asc_dvc
->sdtr_period_tbl
;
10271 max_index
= (int)asc_dvc
->max_sdtr_index
;
10272 min_index
= (int)asc_dvc
->host_init_sdtr_index
;
10273 if ((syn_time
<= period_table
[max_index
])) {
10274 for (i
= min_index
; i
< (max_index
- 1); i
++) {
10275 if (syn_time
<= period_table
[i
]) {
10279 return ((uchar
)max_index
);
10281 return ((uchar
)(max_index
+ 1));
10285 static uchar
AscAllocFreeQueue(PortAddr iop_base
, uchar free_q_head
)
10291 q_addr
= ASC_QNO_TO_QADDR(free_q_head
);
10292 q_status
= (uchar
)AscReadLramByte(iop_base
,
10294 ASC_SCSIQ_B_STATUS
));
10295 next_qp
= AscReadLramByte(iop_base
, (ushort
)(q_addr
+ ASC_SCSIQ_B_FWD
));
10296 if (((q_status
& QS_READY
) == 0) && (next_qp
!= ASC_QLINK_END
)) {
10299 return (ASC_QLINK_END
);
10303 AscAllocMultipleFreeQueue(PortAddr iop_base
, uchar free_q_head
, uchar n_free_q
)
10307 for (i
= 0; i
< n_free_q
; i
++) {
10308 if ((free_q_head
= AscAllocFreeQueue(iop_base
, free_q_head
))
10309 == ASC_QLINK_END
) {
10310 return (ASC_QLINK_END
);
10313 return (free_q_head
);
10316 static int AscHostReqRiscHalt(PortAddr iop_base
)
10320 uchar saved_stop_code
;
10322 if (AscIsChipHalted(iop_base
))
10324 saved_stop_code
= AscReadLramByte(iop_base
, ASCV_STOP_CODE_B
);
10325 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
,
10326 ASC_STOP_HOST_REQ_RISC_HALT
| ASC_STOP_REQ_RISC_STOP
);
10328 if (AscIsChipHalted(iop_base
)) {
10332 DvcSleepMilliSecond(100);
10333 } while (count
++ < 20);
10334 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
, saved_stop_code
);
10338 static int AscStopQueueExe(PortAddr iop_base
)
10342 if (AscReadLramByte(iop_base
, ASCV_STOP_CODE_B
) == 0) {
10343 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
,
10344 ASC_STOP_REQ_RISC_STOP
);
10346 if (AscReadLramByte(iop_base
, ASCV_STOP_CODE_B
) &
10347 ASC_STOP_ACK_RISC_STOP
) {
10350 DvcSleepMilliSecond(100);
10351 } while (count
++ < 20);
10356 static void DvcDelayMicroSecond(ADV_DVC_VAR
*asc_dvc
, ushort micro_sec
)
10361 static void DvcDelayNanoSecond(ASC_DVC_VAR
*asc_dvc
, ASC_DCNT nano_sec
)
10363 udelay((nano_sec
+ 999) / 1000);
10367 static ASC_DCNT __init
AscGetEisaProductID(PortAddr iop_base
)
10370 ushort product_id_high
, product_id_low
;
10371 ASC_DCNT product_id
;
10373 eisa_iop
= ASC_GET_EISA_SLOT(iop_base
) | ASC_EISA_PID_IOP_MASK
;
10374 product_id_low
= inpw(eisa_iop
);
10375 product_id_high
= inpw(eisa_iop
+ 2);
10376 product_id
= ((ASC_DCNT
) product_id_high
<< 16) |
10377 (ASC_DCNT
) product_id_low
;
10378 return (product_id
);
10381 static PortAddr __init
AscSearchIOPortAddrEISA(PortAddr iop_base
)
10383 ASC_DCNT eisa_product_id
;
10385 if (iop_base
== 0) {
10386 iop_base
= ASC_EISA_MIN_IOP_ADDR
;
10388 if (iop_base
== ASC_EISA_MAX_IOP_ADDR
)
10390 if ((iop_base
& 0x0050) == 0x0050) {
10391 iop_base
+= ASC_EISA_BIG_IOP_GAP
;
10393 iop_base
+= ASC_EISA_SMALL_IOP_GAP
;
10396 while (iop_base
<= ASC_EISA_MAX_IOP_ADDR
) {
10397 eisa_product_id
= AscGetEisaProductID(iop_base
);
10398 if ((eisa_product_id
== ASC_EISA_ID_740
) ||
10399 (eisa_product_id
== ASC_EISA_ID_750
)) {
10400 if (AscFindSignature(iop_base
)) {
10401 inpw(iop_base
+ 4);
10405 if (iop_base
== ASC_EISA_MAX_IOP_ADDR
)
10407 if ((iop_base
& 0x0050) == 0x0050) {
10408 iop_base
+= ASC_EISA_BIG_IOP_GAP
;
10410 iop_base
+= ASC_EISA_SMALL_IOP_GAP
;
10415 #endif /* CONFIG_ISA */
10417 static int AscStartChip(PortAddr iop_base
)
10419 AscSetChipControl(iop_base
, 0);
10420 if ((AscGetChipStatus(iop_base
) & CSW_HALTED
) != 0) {
10426 static int AscStopChip(PortAddr iop_base
)
10431 AscGetChipControl(iop_base
) &
10432 (~(CC_SINGLE_STEP
| CC_TEST
| CC_DIAG
));
10433 AscSetChipControl(iop_base
, (uchar
)(cc_val
| CC_HALT
));
10434 AscSetChipIH(iop_base
, INS_HALT
);
10435 AscSetChipIH(iop_base
, INS_RFLAG_WTM
);
10436 if ((AscGetChipStatus(iop_base
) & CSW_HALTED
) == 0) {
10442 static int AscIsChipHalted(PortAddr iop_base
)
10444 if ((AscGetChipStatus(iop_base
) & CSW_HALTED
) != 0) {
10445 if ((AscGetChipControl(iop_base
) & CC_HALT
) != 0) {
10452 static void AscSetChipIH(PortAddr iop_base
, ushort ins_code
)
10454 AscSetBank(iop_base
, 1);
10455 AscWriteChipIH(iop_base
, ins_code
);
10456 AscSetBank(iop_base
, 0);
10460 static void AscAckInterrupt(PortAddr iop_base
)
10468 risc_flag
= AscReadLramByte(iop_base
, ASCV_RISC_FLAG_B
);
10469 if (loop
++ > 0x7FFF) {
10472 } while ((risc_flag
& ASC_RISC_FLAG_GEN_INT
) != 0);
10474 AscReadLramByte(iop_base
,
10475 ASCV_HOST_FLAG_B
) & (~ASC_HOST_FLAG_ACK_INT
);
10476 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
,
10477 (uchar
)(host_flag
| ASC_HOST_FLAG_ACK_INT
));
10478 AscSetChipStatus(iop_base
, CIW_INT_ACK
);
10480 while (AscGetChipStatus(iop_base
) & CSW_INT_PENDING
) {
10481 AscSetChipStatus(iop_base
, CIW_INT_ACK
);
10486 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
, host_flag
);
10490 static void AscDisableInterrupt(PortAddr iop_base
)
10494 cfg
= AscGetChipCfgLsw(iop_base
);
10495 AscSetChipCfgLsw(iop_base
, cfg
& (~ASC_CFG0_HOST_INT_ON
));
10499 static void AscEnableInterrupt(PortAddr iop_base
)
10503 cfg
= AscGetChipCfgLsw(iop_base
);
10504 AscSetChipCfgLsw(iop_base
, cfg
| ASC_CFG0_HOST_INT_ON
);
10508 static void AscSetBank(PortAddr iop_base
, uchar bank
)
10512 val
= AscGetChipControl(iop_base
) &
10514 (CC_SINGLE_STEP
| CC_TEST
| CC_DIAG
| CC_SCSI_RESET
|
10517 val
|= CC_BANK_ONE
;
10518 } else if (bank
== 2) {
10519 val
|= CC_DIAG
| CC_BANK_ONE
;
10521 val
&= ~CC_BANK_ONE
;
10523 AscSetChipControl(iop_base
, val
);
10527 static int AscResetChipAndScsiBus(ASC_DVC_VAR
*asc_dvc
)
10532 iop_base
= asc_dvc
->iop_base
;
10533 while ((AscGetChipStatus(iop_base
) & CSW_SCSI_RESET_ACTIVE
)
10535 DvcSleepMilliSecond(100);
10537 AscStopChip(iop_base
);
10538 AscSetChipControl(iop_base
, CC_CHIP_RESET
| CC_SCSI_RESET
| CC_HALT
);
10539 DvcDelayNanoSecond(asc_dvc
, 60000);
10540 AscSetChipIH(iop_base
, INS_RFLAG_WTM
);
10541 AscSetChipIH(iop_base
, INS_HALT
);
10542 AscSetChipControl(iop_base
, CC_CHIP_RESET
| CC_HALT
);
10543 AscSetChipControl(iop_base
, CC_HALT
);
10544 DvcSleepMilliSecond(200);
10545 AscSetChipStatus(iop_base
, CIW_CLR_SCSI_RESET_INT
);
10546 AscSetChipStatus(iop_base
, 0);
10547 return (AscIsChipHalted(iop_base
));
10550 static ASC_DCNT __init
AscGetMaxDmaCount(ushort bus_type
)
10552 if (bus_type
& ASC_IS_ISA
)
10553 return (ASC_MAX_ISA_DMA_COUNT
);
10554 else if (bus_type
& (ASC_IS_EISA
| ASC_IS_VL
))
10555 return (ASC_MAX_VL_DMA_COUNT
);
10556 return (ASC_MAX_PCI_DMA_COUNT
);
10560 static ushort __init
AscGetIsaDmaChannel(PortAddr iop_base
)
10564 channel
= AscGetChipCfgLsw(iop_base
) & 0x0003;
10565 if (channel
== 0x03)
10567 else if (channel
== 0x00)
10569 return (channel
+ 4);
10572 static ushort __init
AscSetIsaDmaChannel(PortAddr iop_base
, ushort dma_channel
)
10577 if ((dma_channel
>= 5) && (dma_channel
<= 7)) {
10578 if (dma_channel
== 7)
10581 value
= dma_channel
- 4;
10582 cfg_lsw
= AscGetChipCfgLsw(iop_base
) & 0xFFFC;
10584 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
10585 return (AscGetIsaDmaChannel(iop_base
));
10590 static uchar __init
AscSetIsaDmaSpeed(PortAddr iop_base
, uchar speed_value
)
10592 speed_value
&= 0x07;
10593 AscSetBank(iop_base
, 1);
10594 AscWriteChipDmaSpeed(iop_base
, speed_value
);
10595 AscSetBank(iop_base
, 0);
10596 return (AscGetIsaDmaSpeed(iop_base
));
10599 static uchar __init
AscGetIsaDmaSpeed(PortAddr iop_base
)
10603 AscSetBank(iop_base
, 1);
10604 speed_value
= AscReadChipDmaSpeed(iop_base
);
10605 speed_value
&= 0x07;
10606 AscSetBank(iop_base
, 0);
10607 return (speed_value
);
10609 #endif /* CONFIG_ISA */
10611 static ushort __init
10612 AscReadPCIConfigWord(ASC_DVC_VAR
*asc_dvc
, ushort pci_config_offset
)
10616 lsb
= DvcReadPCIConfigByte(asc_dvc
, pci_config_offset
);
10617 msb
= DvcReadPCIConfigByte(asc_dvc
, pci_config_offset
+ 1);
10618 return ((ushort
)((msb
<< 8) | lsb
));
10621 static ushort __init
AscInitGetConfig(ASC_DVC_VAR
*asc_dvc
)
10625 ushort PCIDeviceID
;
10626 ushort PCIVendorID
;
10627 uchar PCIRevisionID
;
10628 uchar prevCmdRegBits
;
10631 iop_base
= asc_dvc
->iop_base
;
10632 asc_dvc
->init_state
= ASC_INIT_STATE_BEG_GET_CFG
;
10633 if (asc_dvc
->err_code
!= 0) {
10636 if (asc_dvc
->bus_type
== ASC_IS_PCI
) {
10637 PCIVendorID
= AscReadPCIConfigWord(asc_dvc
,
10638 AscPCIConfigVendorIDRegister
);
10640 PCIDeviceID
= AscReadPCIConfigWord(asc_dvc
,
10641 AscPCIConfigDeviceIDRegister
);
10643 PCIRevisionID
= DvcReadPCIConfigByte(asc_dvc
,
10644 AscPCIConfigRevisionIDRegister
);
10646 if (PCIVendorID
!= PCI_VENDOR_ID_ASP
) {
10647 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
10649 prevCmdRegBits
= DvcReadPCIConfigByte(asc_dvc
,
10650 AscPCIConfigCommandRegister
);
10652 if ((prevCmdRegBits
& AscPCICmdRegBits_IOMemBusMaster
) !=
10653 AscPCICmdRegBits_IOMemBusMaster
) {
10654 DvcWritePCIConfigByte(asc_dvc
,
10655 AscPCIConfigCommandRegister
,
10657 AscPCICmdRegBits_IOMemBusMaster
));
10659 if ((DvcReadPCIConfigByte(asc_dvc
,
10660 AscPCIConfigCommandRegister
)
10661 & AscPCICmdRegBits_IOMemBusMaster
)
10662 != AscPCICmdRegBits_IOMemBusMaster
) {
10663 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
10666 if ((PCIDeviceID
== PCI_DEVICE_ID_ASP_1200A
) ||
10667 (PCIDeviceID
== PCI_DEVICE_ID_ASP_ABP940
)) {
10668 DvcWritePCIConfigByte(asc_dvc
,
10669 AscPCIConfigLatencyTimer
, 0x00);
10670 if (DvcReadPCIConfigByte
10671 (asc_dvc
, AscPCIConfigLatencyTimer
)
10673 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
10675 } else if (PCIDeviceID
== PCI_DEVICE_ID_ASP_ABP940U
) {
10676 if (DvcReadPCIConfigByte(asc_dvc
,
10677 AscPCIConfigLatencyTimer
) <
10679 DvcWritePCIConfigByte(asc_dvc
,
10680 AscPCIConfigLatencyTimer
,
10683 if (DvcReadPCIConfigByte(asc_dvc
,
10684 AscPCIConfigLatencyTimer
)
10687 ASC_WARN_SET_PCI_CONFIG_SPACE
;
10693 if (AscFindSignature(iop_base
)) {
10694 warn_code
|= AscInitAscDvcVar(asc_dvc
);
10695 warn_code
|= AscInitFromEEP(asc_dvc
);
10696 asc_dvc
->init_state
|= ASC_INIT_STATE_END_GET_CFG
;
10697 if (asc_dvc
->scsi_reset_wait
> ASC_MAX_SCSI_RESET_WAIT
) {
10698 asc_dvc
->scsi_reset_wait
= ASC_MAX_SCSI_RESET_WAIT
;
10701 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
10703 return (warn_code
);
10706 static ushort __init
AscInitSetConfig(ASC_DVC_VAR
*asc_dvc
)
10708 ushort warn_code
= 0;
10710 asc_dvc
->init_state
|= ASC_INIT_STATE_BEG_SET_CFG
;
10711 if (asc_dvc
->err_code
!= 0)
10713 if (AscFindSignature(asc_dvc
->iop_base
)) {
10714 warn_code
|= AscInitFromAscDvcVar(asc_dvc
);
10715 asc_dvc
->init_state
|= ASC_INIT_STATE_END_SET_CFG
;
10717 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
10719 return (warn_code
);
10722 static ushort __init
AscInitFromAscDvcVar(ASC_DVC_VAR
*asc_dvc
)
10727 ushort pci_device_id
= 0;
10729 iop_base
= asc_dvc
->iop_base
;
10731 if (asc_dvc
->cfg
->dev
)
10732 pci_device_id
= to_pci_dev(asc_dvc
->cfg
->dev
)->device
;
10735 cfg_msw
= AscGetChipCfgMsw(iop_base
);
10736 if ((cfg_msw
& ASC_CFG_MSW_CLR_MASK
) != 0) {
10737 cfg_msw
&= (~(ASC_CFG_MSW_CLR_MASK
));
10738 warn_code
|= ASC_WARN_CFG_MSW_RECOVER
;
10739 AscSetChipCfgMsw(iop_base
, cfg_msw
);
10741 if ((asc_dvc
->cfg
->cmd_qng_enabled
& asc_dvc
->cfg
->disc_enable
) !=
10742 asc_dvc
->cfg
->cmd_qng_enabled
) {
10743 asc_dvc
->cfg
->disc_enable
= asc_dvc
->cfg
->cmd_qng_enabled
;
10744 warn_code
|= ASC_WARN_CMD_QNG_CONFLICT
;
10746 if (AscGetChipStatus(iop_base
) & CSW_AUTO_CONFIG
) {
10747 warn_code
|= ASC_WARN_AUTO_CONFIG
;
10749 if ((asc_dvc
->bus_type
& (ASC_IS_ISA
| ASC_IS_VL
)) != 0) {
10750 if (AscSetChipIRQ(iop_base
, asc_dvc
->irq_no
, asc_dvc
->bus_type
)
10751 != asc_dvc
->irq_no
) {
10752 asc_dvc
->err_code
|= ASC_IERR_SET_IRQ_NO
;
10755 if (asc_dvc
->bus_type
& ASC_IS_PCI
) {
10757 AscSetChipCfgMsw(iop_base
, cfg_msw
);
10758 if ((asc_dvc
->bus_type
& ASC_IS_PCI_ULTRA
) == ASC_IS_PCI_ULTRA
) {
10760 if ((pci_device_id
== PCI_DEVICE_ID_ASP_1200A
) ||
10761 (pci_device_id
== PCI_DEVICE_ID_ASP_ABP940
)) {
10762 asc_dvc
->bug_fix_cntl
|= ASC_BUG_FIX_IF_NOT_DWB
;
10763 asc_dvc
->bug_fix_cntl
|=
10764 ASC_BUG_FIX_ASYN_USE_SYN
;
10767 } else if (asc_dvc
->bus_type
== ASC_IS_ISAPNP
) {
10768 if (AscGetChipVersion(iop_base
, asc_dvc
->bus_type
)
10769 == ASC_CHIP_VER_ASYN_BUG
) {
10770 asc_dvc
->bug_fix_cntl
|= ASC_BUG_FIX_ASYN_USE_SYN
;
10773 if (AscSetChipScsiID(iop_base
, asc_dvc
->cfg
->chip_scsi_id
) !=
10774 asc_dvc
->cfg
->chip_scsi_id
) {
10775 asc_dvc
->err_code
|= ASC_IERR_SET_SCSI_ID
;
10778 if (asc_dvc
->bus_type
& ASC_IS_ISA
) {
10779 AscSetIsaDmaChannel(iop_base
, asc_dvc
->cfg
->isa_dma_channel
);
10780 AscSetIsaDmaSpeed(iop_base
, asc_dvc
->cfg
->isa_dma_speed
);
10782 #endif /* CONFIG_ISA */
10783 return (warn_code
);
10786 static ushort
AscInitAsc1000Driver(ASC_DVC_VAR
*asc_dvc
)
10791 iop_base
= asc_dvc
->iop_base
;
10793 if ((asc_dvc
->dvc_cntl
& ASC_CNTL_RESET_SCSI
) &&
10794 !(asc_dvc
->init_state
& ASC_INIT_RESET_SCSI_DONE
)) {
10795 AscResetChipAndScsiBus(asc_dvc
);
10796 DvcSleepMilliSecond((ASC_DCNT
)
10797 ((ushort
)asc_dvc
->scsi_reset_wait
* 1000));
10799 asc_dvc
->init_state
|= ASC_INIT_STATE_BEG_LOAD_MC
;
10800 if (asc_dvc
->err_code
!= 0)
10802 if (!AscFindSignature(asc_dvc
->iop_base
)) {
10803 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
10804 return (warn_code
);
10806 AscDisableInterrupt(iop_base
);
10807 warn_code
|= AscInitLram(asc_dvc
);
10808 if (asc_dvc
->err_code
!= 0)
10810 ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lx\n",
10811 (ulong
)_asc_mcode_chksum
);
10812 if (AscLoadMicroCode(iop_base
, 0, _asc_mcode_buf
,
10813 _asc_mcode_size
) != _asc_mcode_chksum
) {
10814 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
10815 return (warn_code
);
10817 warn_code
|= AscInitMicroCodeVar(asc_dvc
);
10818 asc_dvc
->init_state
|= ASC_INIT_STATE_END_LOAD_MC
;
10819 AscEnableInterrupt(iop_base
);
10820 return (warn_code
);
10823 static ushort __init
AscInitAscDvcVar(ASC_DVC_VAR
*asc_dvc
)
10828 uchar chip_version
;
10830 iop_base
= asc_dvc
->iop_base
;
10832 asc_dvc
->err_code
= 0;
10833 if ((asc_dvc
->bus_type
&
10834 (ASC_IS_ISA
| ASC_IS_PCI
| ASC_IS_EISA
| ASC_IS_VL
)) == 0) {
10835 asc_dvc
->err_code
|= ASC_IERR_NO_BUS_TYPE
;
10837 AscSetChipControl(iop_base
, CC_HALT
);
10838 AscSetChipStatus(iop_base
, 0);
10839 asc_dvc
->bug_fix_cntl
= 0;
10840 asc_dvc
->pci_fix_asyn_xfer
= 0;
10841 asc_dvc
->pci_fix_asyn_xfer_always
= 0;
10842 /* asc_dvc->init_state initalized in AscInitGetConfig(). */
10843 asc_dvc
->sdtr_done
= 0;
10844 asc_dvc
->cur_total_qng
= 0;
10845 asc_dvc
->is_in_int
= 0;
10846 asc_dvc
->in_critical_cnt
= 0;
10847 asc_dvc
->last_q_shortage
= 0;
10848 asc_dvc
->use_tagged_qng
= 0;
10849 asc_dvc
->no_scam
= 0;
10850 asc_dvc
->unit_not_ready
= 0;
10851 asc_dvc
->queue_full_or_busy
= 0;
10852 asc_dvc
->redo_scam
= 0;
10854 asc_dvc
->host_init_sdtr_index
= 0;
10855 asc_dvc
->cfg
->can_tagged_qng
= 0;
10856 asc_dvc
->cfg
->cmd_qng_enabled
= 0;
10857 asc_dvc
->dvc_cntl
= ASC_DEF_DVC_CNTL
;
10858 asc_dvc
->init_sdtr
= 0;
10859 asc_dvc
->max_total_qng
= ASC_DEF_MAX_TOTAL_QNG
;
10860 asc_dvc
->scsi_reset_wait
= 3;
10861 asc_dvc
->start_motor
= ASC_SCSI_WIDTH_BIT_SET
;
10862 asc_dvc
->max_dma_count
= AscGetMaxDmaCount(asc_dvc
->bus_type
);
10863 asc_dvc
->cfg
->sdtr_enable
= ASC_SCSI_WIDTH_BIT_SET
;
10864 asc_dvc
->cfg
->disc_enable
= ASC_SCSI_WIDTH_BIT_SET
;
10865 asc_dvc
->cfg
->chip_scsi_id
= ASC_DEF_CHIP_SCSI_ID
;
10866 asc_dvc
->cfg
->lib_serial_no
= ASC_LIB_SERIAL_NUMBER
;
10867 asc_dvc
->cfg
->lib_version
= (ASC_LIB_VERSION_MAJOR
<< 8) |
10868 ASC_LIB_VERSION_MINOR
;
10869 chip_version
= AscGetChipVersion(iop_base
, asc_dvc
->bus_type
);
10870 asc_dvc
->cfg
->chip_version
= chip_version
;
10871 asc_dvc
->sdtr_period_tbl
[0] = SYN_XFER_NS_0
;
10872 asc_dvc
->sdtr_period_tbl
[1] = SYN_XFER_NS_1
;
10873 asc_dvc
->sdtr_period_tbl
[2] = SYN_XFER_NS_2
;
10874 asc_dvc
->sdtr_period_tbl
[3] = SYN_XFER_NS_3
;
10875 asc_dvc
->sdtr_period_tbl
[4] = SYN_XFER_NS_4
;
10876 asc_dvc
->sdtr_period_tbl
[5] = SYN_XFER_NS_5
;
10877 asc_dvc
->sdtr_period_tbl
[6] = SYN_XFER_NS_6
;
10878 asc_dvc
->sdtr_period_tbl
[7] = SYN_XFER_NS_7
;
10879 asc_dvc
->max_sdtr_index
= 7;
10880 if ((asc_dvc
->bus_type
& ASC_IS_PCI
) &&
10881 (chip_version
>= ASC_CHIP_VER_PCI_ULTRA_3150
)) {
10882 asc_dvc
->bus_type
= ASC_IS_PCI_ULTRA
;
10883 asc_dvc
->sdtr_period_tbl
[0] = SYN_ULTRA_XFER_NS_0
;
10884 asc_dvc
->sdtr_period_tbl
[1] = SYN_ULTRA_XFER_NS_1
;
10885 asc_dvc
->sdtr_period_tbl
[2] = SYN_ULTRA_XFER_NS_2
;
10886 asc_dvc
->sdtr_period_tbl
[3] = SYN_ULTRA_XFER_NS_3
;
10887 asc_dvc
->sdtr_period_tbl
[4] = SYN_ULTRA_XFER_NS_4
;
10888 asc_dvc
->sdtr_period_tbl
[5] = SYN_ULTRA_XFER_NS_5
;
10889 asc_dvc
->sdtr_period_tbl
[6] = SYN_ULTRA_XFER_NS_6
;
10890 asc_dvc
->sdtr_period_tbl
[7] = SYN_ULTRA_XFER_NS_7
;
10891 asc_dvc
->sdtr_period_tbl
[8] = SYN_ULTRA_XFER_NS_8
;
10892 asc_dvc
->sdtr_period_tbl
[9] = SYN_ULTRA_XFER_NS_9
;
10893 asc_dvc
->sdtr_period_tbl
[10] = SYN_ULTRA_XFER_NS_10
;
10894 asc_dvc
->sdtr_period_tbl
[11] = SYN_ULTRA_XFER_NS_11
;
10895 asc_dvc
->sdtr_period_tbl
[12] = SYN_ULTRA_XFER_NS_12
;
10896 asc_dvc
->sdtr_period_tbl
[13] = SYN_ULTRA_XFER_NS_13
;
10897 asc_dvc
->sdtr_period_tbl
[14] = SYN_ULTRA_XFER_NS_14
;
10898 asc_dvc
->sdtr_period_tbl
[15] = SYN_ULTRA_XFER_NS_15
;
10899 asc_dvc
->max_sdtr_index
= 15;
10900 if (chip_version
== ASC_CHIP_VER_PCI_ULTRA_3150
) {
10901 AscSetExtraControl(iop_base
,
10902 (SEC_ACTIVE_NEGATE
| SEC_SLEW_RATE
));
10903 } else if (chip_version
>= ASC_CHIP_VER_PCI_ULTRA_3050
) {
10904 AscSetExtraControl(iop_base
,
10905 (SEC_ACTIVE_NEGATE
|
10906 SEC_ENABLE_FILTER
));
10909 if (asc_dvc
->bus_type
== ASC_IS_PCI
) {
10910 AscSetExtraControl(iop_base
,
10911 (SEC_ACTIVE_NEGATE
| SEC_SLEW_RATE
));
10914 asc_dvc
->cfg
->isa_dma_speed
= ASC_DEF_ISA_DMA_SPEED
;
10915 if (AscGetChipBusType(iop_base
) == ASC_IS_ISAPNP
) {
10916 AscSetChipIFC(iop_base
, IFC_INIT_DEFAULT
);
10917 asc_dvc
->bus_type
= ASC_IS_ISAPNP
;
10920 if ((asc_dvc
->bus_type
& ASC_IS_ISA
) != 0) {
10921 asc_dvc
->cfg
->isa_dma_channel
=
10922 (uchar
)AscGetIsaDmaChannel(iop_base
);
10924 #endif /* CONFIG_ISA */
10925 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
10926 asc_dvc
->cur_dvc_qng
[i
] = 0;
10927 asc_dvc
->max_dvc_qng
[i
] = ASC_MAX_SCSI1_QNG
;
10928 asc_dvc
->scsiq_busy_head
[i
] = (ASC_SCSI_Q
*)0L;
10929 asc_dvc
->scsiq_busy_tail
[i
] = (ASC_SCSI_Q
*)0L;
10930 asc_dvc
->cfg
->max_tag_qng
[i
] = ASC_MAX_INRAM_TAG_QNG
;
10932 return (warn_code
);
10935 static ushort __init
AscInitFromEEP(ASC_DVC_VAR
*asc_dvc
)
10937 ASCEEP_CONFIG eep_config_buf
;
10938 ASCEEP_CONFIG
*eep_config
;
10942 ushort cfg_msw
, cfg_lsw
;
10946 iop_base
= asc_dvc
->iop_base
;
10948 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0x00FE);
10949 AscStopQueueExe(iop_base
);
10950 if ((AscStopChip(iop_base
) == FALSE
) ||
10951 (AscGetChipScsiCtrl(iop_base
) != 0)) {
10952 asc_dvc
->init_state
|= ASC_INIT_RESET_SCSI_DONE
;
10953 AscResetChipAndScsiBus(asc_dvc
);
10954 DvcSleepMilliSecond((ASC_DCNT
)
10955 ((ushort
)asc_dvc
->scsi_reset_wait
* 1000));
10957 if (AscIsChipHalted(iop_base
) == FALSE
) {
10958 asc_dvc
->err_code
|= ASC_IERR_START_STOP_CHIP
;
10959 return (warn_code
);
10961 AscSetPCAddr(iop_base
, ASC_MCODE_START_ADDR
);
10962 if (AscGetPCAddr(iop_base
) != ASC_MCODE_START_ADDR
) {
10963 asc_dvc
->err_code
|= ASC_IERR_SET_PC_ADDR
;
10964 return (warn_code
);
10966 eep_config
= (ASCEEP_CONFIG
*)&eep_config_buf
;
10967 cfg_msw
= AscGetChipCfgMsw(iop_base
);
10968 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
10969 if ((cfg_msw
& ASC_CFG_MSW_CLR_MASK
) != 0) {
10970 cfg_msw
&= (~(ASC_CFG_MSW_CLR_MASK
));
10971 warn_code
|= ASC_WARN_CFG_MSW_RECOVER
;
10972 AscSetChipCfgMsw(iop_base
, cfg_msw
);
10974 chksum
= AscGetEEPConfig(iop_base
, eep_config
, asc_dvc
->bus_type
);
10975 ASC_DBG1(1, "AscInitFromEEP: chksum 0x%x\n", chksum
);
10979 if (AscGetChipStatus(iop_base
) & CSW_AUTO_CONFIG
) {
10980 warn_code
|= ASC_WARN_AUTO_CONFIG
;
10981 if (asc_dvc
->cfg
->chip_version
== 3) {
10982 if (eep_config
->cfg_lsw
!= cfg_lsw
) {
10983 warn_code
|= ASC_WARN_EEPROM_RECOVER
;
10984 eep_config
->cfg_lsw
=
10985 AscGetChipCfgLsw(iop_base
);
10987 if (eep_config
->cfg_msw
!= cfg_msw
) {
10988 warn_code
|= ASC_WARN_EEPROM_RECOVER
;
10989 eep_config
->cfg_msw
=
10990 AscGetChipCfgMsw(iop_base
);
10994 eep_config
->cfg_msw
&= ~ASC_CFG_MSW_CLR_MASK
;
10995 eep_config
->cfg_lsw
|= ASC_CFG0_HOST_INT_ON
;
10996 ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%x\n",
10997 eep_config
->chksum
);
10998 if (chksum
!= eep_config
->chksum
) {
10999 if (AscGetChipVersion(iop_base
, asc_dvc
->bus_type
) ==
11000 ASC_CHIP_VER_PCI_ULTRA_3050
) {
11002 "AscInitFromEEP: chksum error ignored; EEPROM-less board\n");
11003 eep_config
->init_sdtr
= 0xFF;
11004 eep_config
->disc_enable
= 0xFF;
11005 eep_config
->start_motor
= 0xFF;
11006 eep_config
->use_cmd_qng
= 0;
11007 eep_config
->max_total_qng
= 0xF0;
11008 eep_config
->max_tag_qng
= 0x20;
11009 eep_config
->cntl
= 0xBFFF;
11010 ASC_EEP_SET_CHIP_ID(eep_config
, 7);
11011 eep_config
->no_scam
= 0;
11012 eep_config
->adapter_info
[0] = 0;
11013 eep_config
->adapter_info
[1] = 0;
11014 eep_config
->adapter_info
[2] = 0;
11015 eep_config
->adapter_info
[3] = 0;
11016 eep_config
->adapter_info
[4] = 0;
11017 /* Indicate EEPROM-less board. */
11018 eep_config
->adapter_info
[5] = 0xBB;
11021 ("AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n");
11023 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
11026 asc_dvc
->cfg
->sdtr_enable
= eep_config
->init_sdtr
;
11027 asc_dvc
->cfg
->disc_enable
= eep_config
->disc_enable
;
11028 asc_dvc
->cfg
->cmd_qng_enabled
= eep_config
->use_cmd_qng
;
11029 asc_dvc
->cfg
->isa_dma_speed
= ASC_EEP_GET_DMA_SPD(eep_config
);
11030 asc_dvc
->start_motor
= eep_config
->start_motor
;
11031 asc_dvc
->dvc_cntl
= eep_config
->cntl
;
11032 asc_dvc
->no_scam
= eep_config
->no_scam
;
11033 asc_dvc
->cfg
->adapter_info
[0] = eep_config
->adapter_info
[0];
11034 asc_dvc
->cfg
->adapter_info
[1] = eep_config
->adapter_info
[1];
11035 asc_dvc
->cfg
->adapter_info
[2] = eep_config
->adapter_info
[2];
11036 asc_dvc
->cfg
->adapter_info
[3] = eep_config
->adapter_info
[3];
11037 asc_dvc
->cfg
->adapter_info
[4] = eep_config
->adapter_info
[4];
11038 asc_dvc
->cfg
->adapter_info
[5] = eep_config
->adapter_info
[5];
11039 if (!AscTestExternalLram(asc_dvc
)) {
11040 if (((asc_dvc
->bus_type
& ASC_IS_PCI_ULTRA
) ==
11041 ASC_IS_PCI_ULTRA
)) {
11042 eep_config
->max_total_qng
=
11043 ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG
;
11044 eep_config
->max_tag_qng
=
11045 ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG
;
11047 eep_config
->cfg_msw
|= 0x0800;
11049 AscSetChipCfgMsw(iop_base
, cfg_msw
);
11050 eep_config
->max_total_qng
= ASC_MAX_PCI_INRAM_TOTAL_QNG
;
11051 eep_config
->max_tag_qng
= ASC_MAX_INRAM_TAG_QNG
;
11055 if (eep_config
->max_total_qng
< ASC_MIN_TOTAL_QNG
) {
11056 eep_config
->max_total_qng
= ASC_MIN_TOTAL_QNG
;
11058 if (eep_config
->max_total_qng
> ASC_MAX_TOTAL_QNG
) {
11059 eep_config
->max_total_qng
= ASC_MAX_TOTAL_QNG
;
11061 if (eep_config
->max_tag_qng
> eep_config
->max_total_qng
) {
11062 eep_config
->max_tag_qng
= eep_config
->max_total_qng
;
11064 if (eep_config
->max_tag_qng
< ASC_MIN_TAG_Q_PER_DVC
) {
11065 eep_config
->max_tag_qng
= ASC_MIN_TAG_Q_PER_DVC
;
11067 asc_dvc
->max_total_qng
= eep_config
->max_total_qng
;
11068 if ((eep_config
->use_cmd_qng
& eep_config
->disc_enable
) !=
11069 eep_config
->use_cmd_qng
) {
11070 eep_config
->disc_enable
= eep_config
->use_cmd_qng
;
11071 warn_code
|= ASC_WARN_CMD_QNG_CONFLICT
;
11073 if (asc_dvc
->bus_type
& (ASC_IS_ISA
| ASC_IS_VL
| ASC_IS_EISA
)) {
11074 asc_dvc
->irq_no
= AscGetChipIRQ(iop_base
, asc_dvc
->bus_type
);
11076 ASC_EEP_SET_CHIP_ID(eep_config
,
11077 ASC_EEP_GET_CHIP_ID(eep_config
) & ASC_MAX_TID
);
11078 asc_dvc
->cfg
->chip_scsi_id
= ASC_EEP_GET_CHIP_ID(eep_config
);
11079 if (((asc_dvc
->bus_type
& ASC_IS_PCI_ULTRA
) == ASC_IS_PCI_ULTRA
) &&
11080 !(asc_dvc
->dvc_cntl
& ASC_CNTL_SDTR_ENABLE_ULTRA
)) {
11081 asc_dvc
->host_init_sdtr_index
= ASC_SDTR_ULTRA_PCI_10MB_INDEX
;
11084 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
11085 asc_dvc
->dos_int13_table
[i
] = eep_config
->dos_int13_table
[i
];
11086 asc_dvc
->cfg
->max_tag_qng
[i
] = eep_config
->max_tag_qng
;
11087 asc_dvc
->cfg
->sdtr_period_offset
[i
] =
11088 (uchar
)(ASC_DEF_SDTR_OFFSET
|
11089 (asc_dvc
->host_init_sdtr_index
<< 4));
11091 eep_config
->cfg_msw
= AscGetChipCfgMsw(iop_base
);
11094 AscSetEEPConfig(iop_base
, eep_config
,
11095 asc_dvc
->bus_type
)) != 0) {
11097 ("AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n",
11101 ("AscInitFromEEP: Successfully re-wrote EEPROM.\n");
11104 return (warn_code
);
11107 static ushort
AscInitMicroCodeVar(ASC_DVC_VAR
*asc_dvc
)
11112 ASC_PADDR phy_addr
;
11115 iop_base
= asc_dvc
->iop_base
;
11117 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
11118 AscPutMCodeInitSDTRAtID(iop_base
, i
,
11119 asc_dvc
->cfg
->sdtr_period_offset
[i
]
11123 AscInitQLinkVar(asc_dvc
);
11124 AscWriteLramByte(iop_base
, ASCV_DISC_ENABLE_B
,
11125 asc_dvc
->cfg
->disc_enable
);
11126 AscWriteLramByte(iop_base
, ASCV_HOSTSCSI_ID_B
,
11127 ASC_TID_TO_TARGET_ID(asc_dvc
->cfg
->chip_scsi_id
));
11129 /* Align overrun buffer on an 8 byte boundary. */
11130 phy_addr
= virt_to_bus(asc_dvc
->cfg
->overrun_buf
);
11131 phy_addr
= cpu_to_le32((phy_addr
+ 7) & ~0x7);
11132 AscMemDWordCopyPtrToLram(iop_base
, ASCV_OVERRUN_PADDR_D
,
11133 (uchar
*)&phy_addr
, 1);
11134 phy_size
= cpu_to_le32(ASC_OVERRUN_BSIZE
- 8);
11135 AscMemDWordCopyPtrToLram(iop_base
, ASCV_OVERRUN_BSIZE_D
,
11136 (uchar
*)&phy_size
, 1);
11138 asc_dvc
->cfg
->mcode_date
=
11139 AscReadLramWord(iop_base
, (ushort
)ASCV_MC_DATE_W
);
11140 asc_dvc
->cfg
->mcode_version
=
11141 AscReadLramWord(iop_base
, (ushort
)ASCV_MC_VER_W
);
11143 AscSetPCAddr(iop_base
, ASC_MCODE_START_ADDR
);
11144 if (AscGetPCAddr(iop_base
) != ASC_MCODE_START_ADDR
) {
11145 asc_dvc
->err_code
|= ASC_IERR_SET_PC_ADDR
;
11146 return (warn_code
);
11148 if (AscStartChip(iop_base
) != 1) {
11149 asc_dvc
->err_code
|= ASC_IERR_START_STOP_CHIP
;
11150 return (warn_code
);
11153 return (warn_code
);
11156 static int __init
AscTestExternalLram(ASC_DVC_VAR
*asc_dvc
)
11163 iop_base
= asc_dvc
->iop_base
;
11165 q_addr
= ASC_QNO_TO_QADDR(241);
11166 saved_word
= AscReadLramWord(iop_base
, q_addr
);
11167 AscSetChipLramAddr(iop_base
, q_addr
);
11168 AscSetChipLramData(iop_base
, 0x55AA);
11169 DvcSleepMilliSecond(10);
11170 AscSetChipLramAddr(iop_base
, q_addr
);
11171 if (AscGetChipLramData(iop_base
) == 0x55AA) {
11173 AscWriteLramWord(iop_base
, q_addr
, saved_word
);
11178 static int __init
AscWriteEEPCmdReg(PortAddr iop_base
, uchar cmd_reg
)
11185 AscSetChipEEPCmd(iop_base
, cmd_reg
);
11186 DvcSleepMilliSecond(1);
11187 read_back
= AscGetChipEEPCmd(iop_base
);
11188 if (read_back
== cmd_reg
) {
11191 if (retry
++ > ASC_EEP_MAX_RETRY
) {
11197 static int __init
AscWriteEEPDataReg(PortAddr iop_base
, ushort data_reg
)
11204 AscSetChipEEPData(iop_base
, data_reg
);
11205 DvcSleepMilliSecond(1);
11206 read_back
= AscGetChipEEPData(iop_base
);
11207 if (read_back
== data_reg
) {
11210 if (retry
++ > ASC_EEP_MAX_RETRY
) {
11216 static void __init
AscWaitEEPRead(void)
11218 DvcSleepMilliSecond(1);
11222 static void __init
AscWaitEEPWrite(void)
11224 DvcSleepMilliSecond(20);
11228 static ushort __init
AscReadEEPWord(PortAddr iop_base
, uchar addr
)
11233 AscWriteEEPCmdReg(iop_base
, ASC_EEP_CMD_WRITE_DISABLE
);
11235 cmd_reg
= addr
| ASC_EEP_CMD_READ
;
11236 AscWriteEEPCmdReg(iop_base
, cmd_reg
);
11238 read_wval
= AscGetChipEEPData(iop_base
);
11240 return (read_wval
);
11243 static ushort __init
11244 AscWriteEEPWord(PortAddr iop_base
, uchar addr
, ushort word_val
)
11248 read_wval
= AscReadEEPWord(iop_base
, addr
);
11249 if (read_wval
!= word_val
) {
11250 AscWriteEEPCmdReg(iop_base
, ASC_EEP_CMD_WRITE_ABLE
);
11252 AscWriteEEPDataReg(iop_base
, word_val
);
11254 AscWriteEEPCmdReg(iop_base
,
11255 (uchar
)((uchar
)ASC_EEP_CMD_WRITE
| addr
));
11257 AscWriteEEPCmdReg(iop_base
, ASC_EEP_CMD_WRITE_DISABLE
);
11259 return (AscReadEEPWord(iop_base
, addr
));
11261 return (read_wval
);
11264 static ushort __init
11265 AscGetEEPConfig(PortAddr iop_base
, ASCEEP_CONFIG
*cfg_buf
, ushort bus_type
)
11272 int uchar_end_in_config
= ASC_EEP_MAX_DVC_ADDR
- 2;
11275 wbuf
= (ushort
*)cfg_buf
;
11277 /* Read two config words; Byte-swapping done by AscReadEEPWord(). */
11278 for (s_addr
= 0; s_addr
< 2; s_addr
++, wbuf
++) {
11279 *wbuf
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11282 if (bus_type
& ASC_IS_VL
) {
11283 cfg_beg
= ASC_EEP_DVC_CFG_BEG_VL
;
11284 cfg_end
= ASC_EEP_MAX_DVC_ADDR_VL
;
11286 cfg_beg
= ASC_EEP_DVC_CFG_BEG
;
11287 cfg_end
= ASC_EEP_MAX_DVC_ADDR
;
11289 for (s_addr
= cfg_beg
; s_addr
<= (cfg_end
- 1); s_addr
++, wbuf
++) {
11290 wval
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11291 if (s_addr
<= uchar_end_in_config
) {
11293 * Swap all char fields - must unswap bytes already swapped
11294 * by AscReadEEPWord().
11296 *wbuf
= le16_to_cpu(wval
);
11298 /* Don't swap word field at the end - cntl field. */
11301 sum
+= wval
; /* Checksum treats all EEPROM data as words. */
11304 * Read the checksum word which will be compared against 'sum'
11305 * by the caller. Word field already swapped.
11307 *wbuf
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11312 AscSetEEPConfigOnce(PortAddr iop_base
, ASCEEP_CONFIG
*cfg_buf
, ushort bus_type
)
11321 int uchar_end_in_config
= ASC_EEP_MAX_DVC_ADDR
- 2;
11323 wbuf
= (ushort
*)cfg_buf
;
11326 /* Write two config words; AscWriteEEPWord() will swap bytes. */
11327 for (s_addr
= 0; s_addr
< 2; s_addr
++, wbuf
++) {
11329 if (*wbuf
!= AscWriteEEPWord(iop_base
, (uchar
)s_addr
, *wbuf
)) {
11333 if (bus_type
& ASC_IS_VL
) {
11334 cfg_beg
= ASC_EEP_DVC_CFG_BEG_VL
;
11335 cfg_end
= ASC_EEP_MAX_DVC_ADDR_VL
;
11337 cfg_beg
= ASC_EEP_DVC_CFG_BEG
;
11338 cfg_end
= ASC_EEP_MAX_DVC_ADDR
;
11340 for (s_addr
= cfg_beg
; s_addr
<= (cfg_end
- 1); s_addr
++, wbuf
++) {
11341 if (s_addr
<= uchar_end_in_config
) {
11343 * This is a char field. Swap char fields before they are
11344 * swapped again by AscWriteEEPWord().
11346 word
= cpu_to_le16(*wbuf
);
11348 AscWriteEEPWord(iop_base
, (uchar
)s_addr
, word
)) {
11352 /* Don't swap word field at the end - cntl field. */
11354 AscWriteEEPWord(iop_base
, (uchar
)s_addr
, *wbuf
)) {
11358 sum
+= *wbuf
; /* Checksum calculated from word values. */
11360 /* Write checksum word. It will be swapped by AscWriteEEPWord(). */
11362 if (sum
!= AscWriteEEPWord(iop_base
, (uchar
)s_addr
, sum
)) {
11366 /* Read EEPROM back again. */
11367 wbuf
= (ushort
*)cfg_buf
;
11369 * Read two config words; Byte-swapping done by AscReadEEPWord().
11371 for (s_addr
= 0; s_addr
< 2; s_addr
++, wbuf
++) {
11372 if (*wbuf
!= AscReadEEPWord(iop_base
, (uchar
)s_addr
)) {
11376 if (bus_type
& ASC_IS_VL
) {
11377 cfg_beg
= ASC_EEP_DVC_CFG_BEG_VL
;
11378 cfg_end
= ASC_EEP_MAX_DVC_ADDR_VL
;
11380 cfg_beg
= ASC_EEP_DVC_CFG_BEG
;
11381 cfg_end
= ASC_EEP_MAX_DVC_ADDR
;
11383 for (s_addr
= cfg_beg
; s_addr
<= (cfg_end
- 1); s_addr
++, wbuf
++) {
11384 if (s_addr
<= uchar_end_in_config
) {
11386 * Swap all char fields. Must unswap bytes already swapped
11387 * by AscReadEEPWord().
11390 le16_to_cpu(AscReadEEPWord
11391 (iop_base
, (uchar
)s_addr
));
11393 /* Don't swap word field at the end - cntl field. */
11394 word
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11396 if (*wbuf
!= word
) {
11400 /* Read checksum; Byte swapping not needed. */
11401 if (AscReadEEPWord(iop_base
, (uchar
)s_addr
) != sum
) {
11408 AscSetEEPConfig(PortAddr iop_base
, ASCEEP_CONFIG
*cfg_buf
, ushort bus_type
)
11415 if ((n_error
= AscSetEEPConfigOnce(iop_base
, cfg_buf
,
11419 if (++retry
> ASC_EEP_MAX_RETRY
) {
11427 AscAsyncFix(ASC_DVC_VAR
*asc_dvc
, uchar tid_no
, ASC_SCSI_INQUIRY
*inq
)
11430 ASC_SCSI_BIT_ID_TYPE tid_bits
;
11432 dvc_type
= ASC_INQ_DVC_TYPE(inq
);
11433 tid_bits
= ASC_TIX_TO_TARGET_ID(tid_no
);
11435 if (asc_dvc
->bug_fix_cntl
& ASC_BUG_FIX_ASYN_USE_SYN
) {
11436 if (!(asc_dvc
->init_sdtr
& tid_bits
)) {
11437 if ((dvc_type
== TYPE_ROM
) &&
11438 (AscCompareString((uchar
*)inq
->vendor_id
,
11439 (uchar
*)"HP ", 3) == 0)) {
11440 asc_dvc
->pci_fix_asyn_xfer_always
|= tid_bits
;
11442 asc_dvc
->pci_fix_asyn_xfer
|= tid_bits
;
11443 if ((dvc_type
== TYPE_PROCESSOR
) ||
11444 (dvc_type
== TYPE_SCANNER
) ||
11445 (dvc_type
== TYPE_ROM
) || (dvc_type
== TYPE_TAPE
)) {
11446 asc_dvc
->pci_fix_asyn_xfer
&= ~tid_bits
;
11449 if (asc_dvc
->pci_fix_asyn_xfer
& tid_bits
) {
11450 AscSetRunChipSynRegAtID(asc_dvc
->iop_base
,
11452 ASYN_SDTR_DATA_FIX_PCI_REV_AB
);
11459 static int AscTagQueuingSafe(ASC_SCSI_INQUIRY
*inq
)
11461 if ((inq
->add_len
>= 32) &&
11462 (AscCompareString((uchar
*)inq
->vendor_id
,
11463 (uchar
*)"QUANTUM XP34301", 15) == 0) &&
11464 (AscCompareString((uchar
*)inq
->product_rev_level
,
11465 (uchar
*)"1071", 4) == 0)) {
11472 AscInquiryHandling(ASC_DVC_VAR
*asc_dvc
, uchar tid_no
, ASC_SCSI_INQUIRY
*inq
)
11474 ASC_SCSI_BIT_ID_TYPE tid_bit
= ASC_TIX_TO_TARGET_ID(tid_no
);
11475 ASC_SCSI_BIT_ID_TYPE orig_init_sdtr
, orig_use_tagged_qng
;
11477 orig_init_sdtr
= asc_dvc
->init_sdtr
;
11478 orig_use_tagged_qng
= asc_dvc
->use_tagged_qng
;
11480 asc_dvc
->init_sdtr
&= ~tid_bit
;
11481 asc_dvc
->cfg
->can_tagged_qng
&= ~tid_bit
;
11482 asc_dvc
->use_tagged_qng
&= ~tid_bit
;
11484 if (ASC_INQ_RESPONSE_FMT(inq
) >= 2 || ASC_INQ_ANSI_VER(inq
) >= 2) {
11485 if ((asc_dvc
->cfg
->sdtr_enable
& tid_bit
) && ASC_INQ_SYNC(inq
)) {
11486 asc_dvc
->init_sdtr
|= tid_bit
;
11488 if ((asc_dvc
->cfg
->cmd_qng_enabled
& tid_bit
) &&
11489 ASC_INQ_CMD_QUEUE(inq
)) {
11490 if (AscTagQueuingSafe(inq
)) {
11491 asc_dvc
->use_tagged_qng
|= tid_bit
;
11492 asc_dvc
->cfg
->can_tagged_qng
|= tid_bit
;
11496 if (orig_use_tagged_qng
!= asc_dvc
->use_tagged_qng
) {
11497 AscWriteLramByte(asc_dvc
->iop_base
, ASCV_DISC_ENABLE_B
,
11498 asc_dvc
->cfg
->disc_enable
);
11499 AscWriteLramByte(asc_dvc
->iop_base
, ASCV_USE_TAGGED_QNG_B
,
11500 asc_dvc
->use_tagged_qng
);
11501 AscWriteLramByte(asc_dvc
->iop_base
, ASCV_CAN_TAGGED_QNG_B
,
11502 asc_dvc
->cfg
->can_tagged_qng
);
11504 asc_dvc
->max_dvc_qng
[tid_no
] =
11505 asc_dvc
->cfg
->max_tag_qng
[tid_no
];
11506 AscWriteLramByte(asc_dvc
->iop_base
,
11507 (ushort
)(ASCV_MAX_DVC_QNG_BEG
+ tid_no
),
11508 asc_dvc
->max_dvc_qng
[tid_no
]);
11510 if (orig_init_sdtr
!= asc_dvc
->init_sdtr
) {
11511 AscAsyncFix(asc_dvc
, tid_no
, inq
);
11516 static int AscCompareString(uchar
*str1
, uchar
*str2
, int len
)
11521 for (i
= 0; i
< len
; i
++) {
11522 diff
= (int)(str1
[i
] - str2
[i
]);
11529 static uchar
AscReadLramByte(PortAddr iop_base
, ushort addr
)
11534 if (isodd_word(addr
)) {
11535 AscSetChipLramAddr(iop_base
, addr
- 1);
11536 word_data
= AscGetChipLramData(iop_base
);
11537 byte_data
= (uchar
)((word_data
>> 8) & 0xFF);
11539 AscSetChipLramAddr(iop_base
, addr
);
11540 word_data
= AscGetChipLramData(iop_base
);
11541 byte_data
= (uchar
)(word_data
& 0xFF);
11543 return (byte_data
);
11546 static ushort
AscReadLramWord(PortAddr iop_base
, ushort addr
)
11550 AscSetChipLramAddr(iop_base
, addr
);
11551 word_data
= AscGetChipLramData(iop_base
);
11552 return (word_data
);
11555 #if CC_VERY_LONG_SG_LIST
11556 static ASC_DCNT
AscReadLramDWord(PortAddr iop_base
, ushort addr
)
11558 ushort val_low
, val_high
;
11559 ASC_DCNT dword_data
;
11561 AscSetChipLramAddr(iop_base
, addr
);
11562 val_low
= AscGetChipLramData(iop_base
);
11563 val_high
= AscGetChipLramData(iop_base
);
11564 dword_data
= ((ASC_DCNT
) val_high
<< 16) | (ASC_DCNT
) val_low
;
11565 return (dword_data
);
11567 #endif /* CC_VERY_LONG_SG_LIST */
11569 static void AscWriteLramWord(PortAddr iop_base
, ushort addr
, ushort word_val
)
11571 AscSetChipLramAddr(iop_base
, addr
);
11572 AscSetChipLramData(iop_base
, word_val
);
11576 static void AscWriteLramByte(PortAddr iop_base
, ushort addr
, uchar byte_val
)
11580 if (isodd_word(addr
)) {
11582 word_data
= AscReadLramWord(iop_base
, addr
);
11583 word_data
&= 0x00FF;
11584 word_data
|= (((ushort
)byte_val
<< 8) & 0xFF00);
11586 word_data
= AscReadLramWord(iop_base
, addr
);
11587 word_data
&= 0xFF00;
11588 word_data
|= ((ushort
)byte_val
& 0x00FF);
11590 AscWriteLramWord(iop_base
, addr
, word_data
);
11595 * Copy 2 bytes to LRAM.
11597 * The source data is assumed to be in little-endian order in memory
11598 * and is maintained in little-endian order when written to LRAM.
11601 AscMemWordCopyPtrToLram(PortAddr iop_base
,
11602 ushort s_addr
, uchar
*s_buffer
, int words
)
11606 AscSetChipLramAddr(iop_base
, s_addr
);
11607 for (i
= 0; i
< 2 * words
; i
+= 2) {
11609 * On a little-endian system the second argument below
11610 * produces a little-endian ushort which is written to
11611 * LRAM in little-endian order. On a big-endian system
11612 * the second argument produces a big-endian ushort which
11613 * is "transparently" byte-swapped by outpw() and written
11614 * in little-endian order to LRAM.
11616 outpw(iop_base
+ IOP_RAM_DATA
,
11617 ((ushort
)s_buffer
[i
+ 1] << 8) | s_buffer
[i
]);
11623 * Copy 4 bytes to LRAM.
11625 * The source data is assumed to be in little-endian order in memory
11626 * and is maintained in little-endian order when writen to LRAM.
11629 AscMemDWordCopyPtrToLram(PortAddr iop_base
,
11630 ushort s_addr
, uchar
*s_buffer
, int dwords
)
11634 AscSetChipLramAddr(iop_base
, s_addr
);
11635 for (i
= 0; i
< 4 * dwords
; i
+= 4) {
11636 outpw(iop_base
+ IOP_RAM_DATA
, ((ushort
)s_buffer
[i
+ 1] << 8) | s_buffer
[i
]); /* LSW */
11637 outpw(iop_base
+ IOP_RAM_DATA
, ((ushort
)s_buffer
[i
+ 3] << 8) | s_buffer
[i
+ 2]); /* MSW */
11643 * Copy 2 bytes from LRAM.
11645 * The source data is assumed to be in little-endian order in LRAM
11646 * and is maintained in little-endian order when written to memory.
11649 AscMemWordCopyPtrFromLram(PortAddr iop_base
,
11650 ushort s_addr
, uchar
*d_buffer
, int words
)
11655 AscSetChipLramAddr(iop_base
, s_addr
);
11656 for (i
= 0; i
< 2 * words
; i
+= 2) {
11657 word
= inpw(iop_base
+ IOP_RAM_DATA
);
11658 d_buffer
[i
] = word
& 0xff;
11659 d_buffer
[i
+ 1] = (word
>> 8) & 0xff;
11664 static ASC_DCNT
AscMemSumLramWord(PortAddr iop_base
, ushort s_addr
, int words
)
11670 for (i
= 0; i
< words
; i
++, s_addr
+= 2) {
11671 sum
+= AscReadLramWord(iop_base
, s_addr
);
11677 AscMemWordSetLram(PortAddr iop_base
, ushort s_addr
, ushort set_wval
, int words
)
11681 AscSetChipLramAddr(iop_base
, s_addr
);
11682 for (i
= 0; i
< words
; i
++) {
11683 AscSetChipLramData(iop_base
, set_wval
);
11689 * --- Adv Library Functions
11694 /* Microcode buffer is kept after initialization for error recovery. */
11695 static unsigned char _adv_asc3550_buf
[] = {
11696 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc,
11697 0x01, 0x00, 0x48, 0xe4,
11698 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0x00, 0xfa, 0xff, 0xff,
11699 0x28, 0x0e, 0x9e, 0xe7,
11700 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7,
11701 0x55, 0xf0, 0x01, 0xf6,
11702 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00,
11703 0x00, 0xec, 0x85, 0xf0,
11704 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54, 0x00, 0xe6, 0x1e, 0xf0,
11705 0x86, 0xf0, 0xb4, 0x00,
11706 0x98, 0x57, 0xd0, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00,
11707 0xaa, 0x18, 0x02, 0x80,
11708 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40,
11709 0x00, 0x57, 0x01, 0xea,
11710 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x3e, 0x57, 0x00, 0x80,
11711 0x03, 0xe6, 0xb6, 0x00,
11712 0xc0, 0x00, 0x01, 0x01, 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12,
11713 0x02, 0x4a, 0xb9, 0x54,
11714 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00,
11715 0x3e, 0x00, 0x80, 0x00,
11716 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01,
11717 0x74, 0x01, 0x76, 0x01,
11718 0x78, 0x01, 0x62, 0x0a, 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13,
11719 0x4c, 0x1c, 0xbb, 0x55,
11720 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0,
11721 0x03, 0xf7, 0x06, 0xf7,
11722 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00, 0x00, 0x01, 0xb0, 0x08,
11723 0x30, 0x13, 0x64, 0x15,
11724 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c,
11725 0x04, 0xea, 0x5d, 0xf0,
11726 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00,
11727 0xcc, 0x00, 0x20, 0x01,
11728 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10, 0x0a, 0x12, 0x04, 0x13,
11729 0x40, 0x13, 0x30, 0x1c,
11730 0x00, 0x4e, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0,
11731 0x59, 0xf0, 0xa7, 0xf0,
11732 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00,
11733 0xa4, 0x00, 0xb5, 0x00,
11734 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xde, 0x03, 0x56, 0x0a,
11735 0x14, 0x0e, 0x02, 0x10,
11736 0x04, 0x10, 0x0a, 0x10, 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13,
11737 0x10, 0x15, 0x14, 0x15,
11738 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44,
11739 0x91, 0x44, 0x0a, 0x45,
11740 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55, 0xb0, 0x57, 0x01, 0x58,
11741 0x83, 0x59, 0x05, 0xe6,
11742 0x0b, 0xf0, 0x0c, 0xf0, 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8,
11743 0x02, 0xfa, 0x03, 0xfa,
11744 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00,
11745 0x9e, 0x00, 0xa8, 0x00,
11746 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01,
11747 0x7a, 0x01, 0xc0, 0x01,
11748 0xc2, 0x01, 0x7c, 0x02, 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08,
11749 0x69, 0x08, 0xba, 0x08,
11750 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10,
11751 0xf1, 0x10, 0x06, 0x12,
11752 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13, 0x42, 0x14, 0xd6, 0x14,
11753 0x8a, 0x15, 0xc6, 0x17,
11754 0xd2, 0x17, 0x6b, 0x18, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40,
11755 0x0e, 0x47, 0x48, 0x47,
11756 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55,
11757 0x14, 0x56, 0x77, 0x57,
11758 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90, 0x03, 0xa1, 0xfe, 0x9c,
11759 0xf0, 0x29, 0x02, 0xfe,
11760 0xb8, 0x0c, 0xff, 0x10, 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf,
11761 0xfe, 0x80, 0x01, 0xff,
11762 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
11763 0x00, 0xfe, 0x57, 0x24,
11764 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00, 0x00, 0x10, 0xff, 0x09,
11765 0x00, 0x00, 0xff, 0x08,
11766 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10,
11767 0xff, 0xff, 0xff, 0x0f,
11768 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
11769 0xfe, 0x04, 0xf7, 0xcf,
11770 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe, 0x04, 0xf7, 0xcf, 0x67,
11771 0x0b, 0x3c, 0x2a, 0xfe,
11772 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0,
11773 0xfe, 0xf0, 0x01, 0xfe,
11774 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b,
11775 0x02, 0xfe, 0xd4, 0x0c,
11776 0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28,
11777 0x1c, 0x05, 0xfe, 0xa6,
11778 0x00, 0xfe, 0xd3, 0x12, 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48,
11779 0xf0, 0xfe, 0x86, 0x02,
11780 0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02,
11781 0xfe, 0x46, 0xf0, 0xfe,
11782 0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02, 0xfe, 0x43, 0xf0, 0xfe,
11783 0x44, 0x02, 0xfe, 0x44,
11784 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b,
11785 0xa0, 0x17, 0x06, 0x18,
11786 0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe,
11787 0x1e, 0x1c, 0xfe, 0xe9,
11788 0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xc7,
11789 0x0a, 0x6b, 0x01, 0x9e,
11790 0x02, 0x29, 0x14, 0x4d, 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b,
11791 0x01, 0x82, 0xfe, 0xbd,
11792 0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
11793 0x58, 0x1c, 0x17, 0x06,
11794 0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0x21,
11795 0xfe, 0x94, 0x02, 0xfe,
11796 0x5a, 0x1c, 0xea, 0xfe, 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97,
11797 0x01, 0xfe, 0x54, 0x0f,
11798 0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe,
11799 0x69, 0x10, 0x17, 0x06,
11800 0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d, 0x12, 0x20, 0xfe, 0x05,
11801 0xf6, 0xc7, 0x01, 0xfe,
11802 0x52, 0x16, 0x09, 0x4a, 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6,
11803 0x02, 0x29, 0x0a, 0x40,
11804 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41,
11805 0x58, 0x0a, 0x99, 0x01,
11806 0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03, 0x01, 0xe6, 0x02, 0x29,
11807 0x2a, 0x46, 0xfe, 0x02,
11808 0xe8, 0x27, 0xf8, 0xfe, 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc,
11809 0x01, 0xfe, 0x07, 0x4b,
11810 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0,
11811 0xfe, 0x56, 0x03, 0xfe,
11812 0xa0, 0xf0, 0xfe, 0x44, 0x03, 0xfe, 0x11, 0xf0, 0x9c, 0xfe, 0xef, 0x10,
11813 0xfe, 0x9f, 0xf0, 0xfe,
11814 0x64, 0x03, 0xeb, 0x0f, 0xfe, 0x11, 0x00, 0x02, 0x5a, 0x2a, 0xfe, 0x48,
11815 0x1c, 0xeb, 0x09, 0x04,
11816 0x1d, 0xfe, 0x18, 0x13, 0x23, 0x1e, 0x98, 0xac, 0x12, 0x98, 0x0a, 0x40,
11817 0x01, 0x0e, 0xac, 0x75,
11818 0x01, 0xfe, 0xbc, 0x15, 0x11, 0xca, 0x25, 0xd2, 0xfe, 0x01, 0xf0, 0xd2,
11819 0xfe, 0x82, 0xf0, 0xfe,
11820 0x92, 0x03, 0xec, 0x11, 0xfe, 0xe4, 0x00, 0x65, 0xfe, 0xa4, 0x03, 0x25,
11821 0x32, 0x1f, 0xfe, 0xb4,
11822 0x03, 0x01, 0x43, 0xfe, 0x06, 0xf0, 0xfe, 0xc4, 0x03, 0x8d, 0x81, 0xfe,
11823 0x0a, 0xf0, 0xfe, 0x7a,
11824 0x06, 0x02, 0x22, 0x05, 0x6b, 0x28, 0x16, 0xfe, 0xf6, 0x04, 0x14, 0x2c,
11825 0x01, 0x33, 0x8f, 0xfe,
11826 0x66, 0x02, 0x02, 0xd1, 0xeb, 0x2a, 0x67, 0x1a, 0xfe, 0x67, 0x1b, 0xf8,
11827 0xf7, 0xfe, 0x48, 0x1c,
11828 0x70, 0x01, 0x6e, 0x87, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x16, 0xd3,
11829 0x0a, 0xca, 0x01, 0x0e,
11830 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28, 0xfe, 0x10, 0x12, 0x14,
11831 0x2c, 0x01, 0x33, 0x8f,
11832 0xfe, 0x66, 0x02, 0x02, 0xd1, 0xbc, 0x7d, 0xbd, 0x7f, 0x25, 0x22, 0x65,
11833 0xfe, 0x3c, 0x04, 0x1f,
11834 0xfe, 0x38, 0x04, 0x68, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e,
11835 0x12, 0x2b, 0xff, 0x02,
11836 0x00, 0x10, 0x01, 0x08, 0x1f, 0xfe, 0xe0, 0x04, 0x2b, 0x01, 0x08, 0x1f,
11837 0x22, 0x30, 0x2e, 0xd5,
11838 0xfe, 0x4c, 0x44, 0xfe, 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c,
11839 0xfe, 0x4c, 0x54, 0x64,
11840 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d,
11841 0xfe, 0x2a, 0x13, 0x2f,
11842 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64,
11843 0xd3, 0xfa, 0xef, 0x86,
11844 0x09, 0x04, 0x1d, 0xfe, 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04,
11845 0x1d, 0xfe, 0x1c, 0x12,
11846 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe,
11847 0x70, 0x0c, 0x02, 0x22,
11848 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90, 0xf9, 0x03, 0x14, 0x92,
11849 0x01, 0x33, 0x02, 0x29,
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12280 0x02, 0x29, 0xfe, 0x39, 0xf0, 0xfe, 0x04, 0x17, 0x23, 0x03, 0xfe, 0x7e,
12281 0x18, 0x1c, 0x1a, 0x5d,
12282 0x13, 0x0d, 0x03, 0x71, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe,
12283 0xe1, 0x10, 0x78, 0x2c,
12284 0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42,
12285 0x13, 0x3c, 0x8a, 0x0a,
12286 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01,
12287 0xe3, 0xfe, 0x00, 0xcc,
12288 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01,
12289 0x0e, 0xf2, 0x01, 0x6f,
12290 0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12,
12291 0xf6, 0xfe, 0xd6, 0xf0,
12292 0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c, 0xe7, 0x0b, 0x0f, 0xfe,
12293 0x15, 0x00, 0x59, 0x76,
12294 0x27, 0x01, 0xda, 0x17, 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35,
12295 0x11, 0x2d, 0x01, 0x6f,
12296 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68,
12297 0xc8, 0xfe, 0x48, 0x55,
12298 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73, 0x12, 0x98, 0x03, 0x0a,
12299 0x99, 0x01, 0x0e, 0xf0,
12300 0x0a, 0x40, 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73,
12301 0x75, 0x03, 0x0a, 0x42,
12302 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01,
12303 0x0e, 0x73, 0x75, 0x03,
12304 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18, 0x05, 0xfe, 0x90, 0x00,
12305 0xfe, 0x3a, 0x45, 0x5b,
12306 0xfe, 0x4e, 0xe4, 0xc2, 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00,
12307 0xfe, 0x02, 0xe6, 0x1b,
12308 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05,
12309 0xfe, 0x94, 0x00, 0xfe,
12310 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe, 0x96, 0x00, 0xfe, 0x02,
12311 0xe6, 0x2c, 0xfe, 0x4e,
12312 0x45, 0xfe, 0x0c, 0x12, 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69,
12313 0x03, 0x07, 0x7a, 0xfe,
12314 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10,
12315 0x07, 0x1b, 0xfe, 0x5a,
12316 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26, 0x10, 0x07, 0x1a, 0x5d,
12317 0x24, 0x2c, 0xdc, 0x07,
12318 0x0b, 0x5d, 0x24, 0x93, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d,
12319 0x9f, 0xad, 0x03, 0x14,
12320 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9,
12321 0x03, 0x25, 0xfe, 0xca,
12322 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6, 0x18, 0x03, 0xff, 0x1a,
12326 static unsigned short _adv_asc3550_size
= sizeof(_adv_asc3550_buf
); /* 0x13AD */
12327 static ADV_DCNT _adv_asc3550_chksum
= 0x04D52DDDUL
; /* Expanded little-endian checksum. */
12329 /* Microcode buffer is kept after initialization for error recovery. */
12330 static unsigned char _adv_asc38C0800_buf
[] = {
12331 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4,
12332 0x01, 0x00, 0x48, 0xe4,
12333 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19, 0x00, 0xfa, 0xff, 0xff,
12334 0x1c, 0x0f, 0x00, 0xf6,
12335 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6,
12336 0x09, 0xe7, 0x55, 0xf0,
12337 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0,
12338 0x18, 0xf4, 0x08, 0x00,
12339 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0, 0x82, 0x0d, 0x00, 0xe6,
12340 0x86, 0xf0, 0xb1, 0xf0,
12341 0x98, 0x57, 0x01, 0xfc, 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c,
12342 0x3c, 0x00, 0xbb, 0x00,
12343 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13,
12344 0xba, 0x13, 0x18, 0x40,
12345 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc, 0x3e, 0x00, 0x6c, 0x01,
12346 0x6e, 0x01, 0x74, 0x01,
12347 0x76, 0x01, 0xb9, 0x54, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00,
12348 0xc0, 0x00, 0x01, 0x01,
12349 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12,
12350 0x08, 0x12, 0x02, 0x4a,
12351 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4,
12352 0x5d, 0xf0, 0x02, 0xfa,
12353 0x20, 0x00, 0x32, 0x00, 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01,
12354 0x68, 0x01, 0x6a, 0x01,
12355 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d,
12356 0x06, 0x13, 0x4c, 0x1c,
12357 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x0c, 0x00,
12358 0x0f, 0x00, 0x47, 0x00,
12359 0xbe, 0x00, 0x00, 0x01, 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c,
12360 0x4e, 0x1c, 0x10, 0x44,
12361 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa,
12362 0x05, 0x00, 0x34, 0x00,
12363 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4a, 0x0b,
12364 0x42, 0x0c, 0x12, 0x0f,
12365 0x0c, 0x10, 0x22, 0x11, 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48,
12366 0x00, 0x4e, 0x42, 0x54,
12367 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0,
12368 0x59, 0xf0, 0xb8, 0xf0,
12369 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc, 0x05, 0xfc, 0x06, 0x00,
12370 0x19, 0x00, 0x33, 0x00,
12371 0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00,
12372 0xe7, 0x00, 0xe2, 0x03,
12373 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13,
12374 0x12, 0x13, 0x24, 0x14,
12375 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17, 0x20, 0x1c, 0x34, 0x1c,
12376 0x36, 0x1c, 0x08, 0x44,
12377 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54,
12378 0x3a, 0x55, 0x83, 0x55,
12379 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0,
12380 0x0c, 0xf0, 0x04, 0xf8,
12381 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00, 0x1e, 0x00, 0x9e, 0x00,
12382 0xa8, 0x00, 0xaa, 0x00,
12383 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01,
12384 0xc4, 0x01, 0xc6, 0x01,
12385 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08,
12386 0x68, 0x08, 0x69, 0x08,
12387 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f, 0x12, 0x10, 0x1a, 0x10,
12388 0xed, 0x10, 0xf1, 0x10,
12389 0x2a, 0x11, 0x06, 0x12, 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13,
12390 0x1e, 0x13, 0x46, 0x14,
12391 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18,
12392 0xca, 0x18, 0xe6, 0x19,
12393 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0xfe, 0x9c,
12394 0xf0, 0x2b, 0x02, 0xfe,
12395 0xac, 0x0d, 0xff, 0x10, 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6,
12396 0xfe, 0x84, 0x01, 0xff,
12397 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
12398 0x00, 0xfe, 0x57, 0x24,
12399 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00, 0x00, 0x11, 0xff, 0x09,
12400 0x00, 0x00, 0xff, 0x08,
12401 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10,
12402 0xff, 0xff, 0xff, 0x11,
12403 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
12404 0xfe, 0x04, 0xf7, 0xd6,
12405 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe, 0x04, 0xf7, 0xd6, 0x99,
12406 0x0a, 0x42, 0x2c, 0xfe,
12407 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0,
12408 0xfe, 0xf4, 0x01, 0xfe,
12409 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d,
12410 0x02, 0xfe, 0xc8, 0x0d,
12411 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28,
12412 0x1c, 0x03, 0xfe, 0xa6,
12413 0x00, 0xfe, 0xd3, 0x12, 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48,
12414 0xf0, 0xfe, 0x8a, 0x02,
12415 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02,
12416 0xfe, 0x46, 0xf0, 0xfe,
12417 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x43, 0xf0, 0xfe,
12418 0x48, 0x02, 0xfe, 0x44,
12419 0xf0, 0xfe, 0x4c, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a,
12420 0xaa, 0x18, 0x06, 0x14,
12421 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe,
12422 0x1e, 0x1c, 0xfe, 0xe9,
12423 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xce,
12424 0x09, 0x70, 0x01, 0xa8,
12425 0x02, 0x2b, 0x15, 0x59, 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70,
12426 0x01, 0x87, 0xfe, 0xbd,
12427 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
12428 0x58, 0x1c, 0x18, 0x06,
12429 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0x23,
12430 0xfe, 0x98, 0x02, 0xfe,
12431 0x5a, 0x1c, 0xf8, 0xfe, 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2,
12432 0x01, 0xfe, 0x48, 0x10,
12433 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe,
12434 0x69, 0x10, 0x18, 0x06,
12435 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43, 0x13, 0x20, 0xfe, 0x05,
12436 0xf6, 0xce, 0x01, 0xfe,
12437 0x4a, 0x17, 0x08, 0x54, 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe,
12438 0x82, 0x16, 0x02, 0x2b,
12439 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10,
12440 0xfe, 0x41, 0x58, 0x09,
12441 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe, 0x10, 0x03, 0x01, 0xfe,
12442 0x82, 0x16, 0x02, 0x2b,
12443 0x2c, 0x4f, 0xfe, 0x02, 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43,
12444 0xfe, 0x77, 0x57, 0xfe,
12445 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7,
12446 0xfe, 0x40, 0x1c, 0x1c,
12447 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x48,
12448 0x03, 0xfe, 0x11, 0xf0,
12449 0xa7, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10,
12450 0xfe, 0x11, 0x00, 0x02,
12451 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13,
12452 0x21, 0x22, 0xa3, 0xb7,
12453 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78, 0x01, 0xfe, 0xb4, 0x16,
12454 0x12, 0xd1, 0x1c, 0xd9,
12455 0xfe, 0x01, 0xf0, 0xd9, 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12,
12456 0xfe, 0xe4, 0x00, 0x27,
12457 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe,
12458 0x06, 0xf0, 0xfe, 0xc8,
12459 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a, 0x06, 0x02, 0x24, 0x03,
12460 0x70, 0x28, 0x17, 0xfe,
12461 0xfa, 0x04, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8,
12462 0xf9, 0x2c, 0x99, 0x19,
12463 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c,
12464 0x74, 0x01, 0xaf, 0x8c,
12465 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda, 0x09, 0xd1, 0x01, 0x0e,
12466 0x8d, 0x51, 0x64, 0x79,
12467 0x2a, 0x03, 0x70, 0x28, 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b,
12468 0xfe, 0x6a, 0x02, 0x02,
12469 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d,
12470 0xfe, 0x3c, 0x04, 0x3b,
12471 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, 0x12, 0x2d, 0xff, 0x02,
12472 0x00, 0x10, 0x01, 0x0b,
12473 0x1d, 0xfe, 0xe4, 0x04, 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde,
12474 0xfe, 0x4c, 0x44, 0xfe,
12475 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b,
12476 0xda, 0x4f, 0x79, 0x2a,
12477 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62, 0x13, 0x08, 0x05, 0x1b,
12478 0xfe, 0x2a, 0x13, 0x32,
12479 0x07, 0x82, 0xfe, 0x52, 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c,
12480 0x54, 0x6b, 0xda, 0xfe,
12481 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe,
12482 0x08, 0x13, 0x32, 0x07,
12483 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x1c, 0x12, 0x15, 0x9d,
12484 0x08, 0x05, 0x06, 0x4d,
12485 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24,
12486 0x2d, 0x12, 0xfe, 0xe6,
12487 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36,
12488 0x02, 0x2b, 0xfe, 0x42,
12489 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57,
12490 0xfe, 0x87, 0x80, 0xfe,
12491 0x31, 0xe4, 0x5b, 0x08, 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80,
12492 0x07, 0x19, 0xfe, 0x7c,
12493 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28,
12494 0x17, 0xfe, 0x90, 0x05,
12495 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe, 0x56, 0x13, 0x03, 0xfe,
12496 0xa0, 0x00, 0x28, 0xfe,
12497 0x4e, 0x12, 0x67, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c,
12498 0x34, 0xfe, 0x89, 0x48,
12499 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05,
12500 0x12, 0xfe, 0xe3, 0x00,
12501 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05, 0xfe, 0x49, 0xf0, 0xfe,
12502 0x70, 0x05, 0x88, 0x25,
12503 0xfe, 0x21, 0x00, 0xab, 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe,
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12720 0xe0, 0x0e, 0x0f, 0x06,
12721 0x13, 0x59, 0x01, 0xfe, 0xda, 0x16, 0x03, 0xfe, 0x38, 0x01, 0x29, 0xfe,
12722 0x3a, 0x01, 0x56, 0xfe,
12723 0xe4, 0x0e, 0xfe, 0x02, 0xec, 0xd5, 0x69, 0x00, 0x66, 0xfe, 0x04, 0xec,
12724 0x20, 0x4f, 0xfe, 0x05,
12725 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x4a, 0x17, 0xfe, 0x08, 0x90, 0xfe,
12726 0x48, 0xf4, 0x0d, 0xfe,
12727 0x18, 0x13, 0xba, 0xfe, 0x02, 0xea, 0xd5, 0x69, 0x7e, 0xfe, 0xc5, 0x13,
12728 0x15, 0x1a, 0x39, 0xa0,
12729 0xb4, 0xfe, 0x2e, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x1e, 0xfe, 0xf0, 0xff,
12730 0x0c, 0xfe, 0x60, 0x01,
12731 0x03, 0xfe, 0x3a, 0x01, 0x0c, 0xfe, 0x62, 0x01, 0x43, 0x13, 0x20, 0x25,
12732 0x06, 0x13, 0x2f, 0x12,
12733 0x2f, 0x92, 0x0f, 0x06, 0x04, 0x21, 0x04, 0x22, 0x59, 0xfe, 0xf7, 0x12,
12734 0x22, 0x9f, 0xb7, 0x13,
12735 0x9f, 0x07, 0x7e, 0xfe, 0x71, 0x13, 0xfe, 0x24, 0x1c, 0x15, 0x19, 0x39,
12736 0xa0, 0xb4, 0xfe, 0xd9,
12737 0x10, 0xc3, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x04,
12738 0xc3, 0xfe, 0x03, 0xdc,
12739 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x21,
12740 0xfe, 0x00, 0xcc, 0x04,
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12742 0xfe, 0x1c, 0x80, 0x07,
12743 0x06, 0xfe, 0x1a, 0x13, 0xfe, 0x1e, 0x80, 0xed, 0xfe, 0x1d, 0x80, 0xae,
12744 0xfe, 0x0c, 0x90, 0xfe,
12745 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xac, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4,
12746 0x0a, 0xfe, 0x3c, 0x50,
12747 0xaa, 0x01, 0xfe, 0x7a, 0x17, 0x32, 0x07, 0x2f, 0xad, 0x01, 0xfe, 0xb4,
12748 0x16, 0x08, 0x05, 0x1b,
12749 0x4e, 0x01, 0xf5, 0x01, 0xf6, 0x12, 0xfe, 0xe9, 0x00, 0x08, 0x05, 0x58,
12750 0xfe, 0x2c, 0x13, 0x01,
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12752 0x0c, 0xfe, 0x64, 0x01,
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12754 0x80, 0x8d, 0xfe, 0x01,
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12756 0x22, 0x20, 0xfb, 0x79,
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12758 0x03, 0xfe, 0xae, 0x00,
12760 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe,
12761 0xb2, 0x00, 0xfe, 0x09,
12762 0x58, 0xfe, 0x0a, 0x1c, 0x25, 0x6e, 0x13, 0xd0, 0x21, 0x0c, 0x5c, 0x0c,
12763 0x45, 0x0f, 0x46, 0x52,
12764 0x50, 0x18, 0x1b, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xfe, 0xfc,
12765 0x0f, 0x44, 0x11, 0x0f,
12766 0x48, 0x52, 0x18, 0x58, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xe4,
12767 0x25, 0x11, 0x13, 0x20,
12768 0x7c, 0x6f, 0x4f, 0x22, 0x20, 0xfb, 0x79, 0x20, 0x12, 0xcf, 0xfe, 0x14,
12769 0x56, 0xfe, 0xd6, 0xf0,
12770 0xfe, 0x26, 0x10, 0xf8, 0x74, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe,
12771 0x18, 0x1c, 0x04, 0x42,
12772 0xfe, 0x0c, 0x14, 0xfc, 0xfe, 0x07, 0xe6, 0x1b, 0xfe, 0xce, 0x47, 0xfe,
12773 0xf5, 0x13, 0x04, 0x01,
12774 0xb0, 0x7c, 0x6f, 0x4f, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42,
12775 0x13, 0x32, 0x07, 0x2f,
12776 0xfe, 0x34, 0x13, 0x09, 0x48, 0x01, 0x0e, 0xbb, 0xfe, 0x36, 0x12, 0xfe,
12777 0x41, 0x48, 0xfe, 0x45,
12778 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78,
12779 0x07, 0x11, 0xac, 0x09,
12780 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x73, 0xfe, 0x0e, 0x10, 0x07,
12781 0x82, 0x4e, 0xfe, 0x14,
12782 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x60, 0x10, 0x04, 0xfe, 0x44, 0x58, 0x8d,
12783 0xfe, 0x01, 0xec, 0xa2,
12784 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1a, 0x79,
12785 0x2a, 0x01, 0xe3, 0xfe,
12786 0xdd, 0x10, 0x2c, 0xc7, 0x81, 0xc8, 0x83, 0x33, 0x31, 0xde, 0x07, 0x1a,
12787 0xfe, 0x48, 0x12, 0x07,
12788 0x0a, 0xfe, 0x56, 0x12, 0x07, 0x19, 0xfe, 0x30, 0x12, 0x07, 0xc9, 0x17,
12789 0xfe, 0x32, 0x12, 0x07,
12790 0xfe, 0x23, 0x00, 0x17, 0xeb, 0x07, 0x06, 0x17, 0xfe, 0x9c, 0x12, 0x07,
12791 0x1f, 0xfe, 0x12, 0x12,
12792 0x07, 0x00, 0x17, 0x24, 0x15, 0xc9, 0x01, 0x36, 0xa9, 0x2d, 0x01, 0x0b,
12793 0x94, 0x4b, 0x04, 0x2d,
12794 0xdd, 0x09, 0xd1, 0x01, 0xfe, 0x26, 0x0f, 0x12, 0x82, 0x02, 0x2b, 0x2d,
12795 0x32, 0x07, 0xa6, 0xfe,
12796 0xd9, 0x13, 0x3a, 0x3d, 0x3b, 0x3e, 0x56, 0xfe, 0xf0, 0x11, 0x08, 0x05,
12797 0x5a, 0xfe, 0x72, 0x12,
12798 0x9b, 0x2e, 0x9c, 0x3c, 0x90, 0xc0, 0x96, 0xfe, 0xba, 0x11, 0x22, 0x62,
12799 0xfe, 0x26, 0x13, 0x03,
12800 0x7f, 0x29, 0x80, 0x56, 0xfe, 0x76, 0x0d, 0x0c, 0x60, 0x14, 0x61, 0x21,
12801 0x0c, 0x7f, 0x0c, 0x80,
12802 0x01, 0xb3, 0x25, 0x6e, 0x77, 0x13, 0x62, 0x01, 0xef, 0x9b, 0x2e, 0x9c,
12803 0x3c, 0xfe, 0x04, 0x55,
12804 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0xfe,
12805 0x91, 0x10, 0x03, 0x3f,
12806 0x29, 0x40, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x3f, 0x14, 0x40,
12807 0x88, 0x9b, 0x2e, 0x9c,
12808 0x3c, 0x90, 0xc0, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x00, 0x56, 0xfe, 0xa1,
12809 0x56, 0x0c, 0x5e, 0x14,
12810 0x5f, 0x08, 0x05, 0x5a, 0xfe, 0x1e, 0x12, 0x22, 0x62, 0xfe, 0x1f, 0x40,
12811 0x03, 0x60, 0x29, 0x61,
12812 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x03, 0x3f, 0x29, 0x40, 0xfe, 0x44,
12813 0x50, 0xfe, 0xc6, 0x50,
12814 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, 0x3d,
12815 0x29, 0x3e, 0xfe, 0x40,
12816 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x89, 0x25, 0x06, 0x13, 0xd4, 0x02, 0x72,
12817 0x2d, 0x01, 0x0b, 0x1d,
12818 0x4c, 0x33, 0x31, 0xde, 0x07, 0x06, 0x23, 0x4c, 0x32, 0x07, 0xa6, 0x23,
12819 0x72, 0x01, 0xaf, 0x1e,
12820 0x43, 0x17, 0x4c, 0x08, 0x05, 0x0a, 0xee, 0x3a, 0x3d, 0x3b, 0x3e, 0xfe,
12821 0x0a, 0x55, 0x35, 0xfe,
12822 0x8b, 0x55, 0x57, 0x3d, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51,
12823 0x02, 0x72, 0xfe, 0x19,
12824 0x81, 0xba, 0xfe, 0x19, 0x41, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1c, 0x34,
12825 0x1d, 0xe8, 0x33, 0x31,
12826 0xe1, 0x55, 0x19, 0xfe, 0xa6, 0x12, 0x55, 0x0a, 0x4d, 0x02, 0x4c, 0x01,
12827 0x0b, 0x1c, 0x34, 0x1d,
12828 0xe8, 0x33, 0x31, 0xdf, 0x07, 0x19, 0x23, 0x4c, 0x01, 0x0b, 0x1d, 0xe8,
12829 0x33, 0x31, 0xfe, 0xe8,
12830 0x09, 0xfe, 0xc2, 0x49, 0x51, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0x8a, 0x53,
12831 0x05, 0x1f, 0x35, 0xa9,
12832 0xfe, 0xbb, 0x45, 0x55, 0x00, 0x4e, 0x44, 0x06, 0x7c, 0x43, 0xfe, 0xda,
12833 0x14, 0x01, 0xaf, 0x8c,
12834 0xfe, 0x4b, 0x45, 0xee, 0x32, 0x07, 0xa5, 0xed, 0x03, 0xcd, 0x28, 0x8a,
12835 0x03, 0x45, 0x28, 0x35,
12836 0x67, 0x02, 0x72, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17,
12837 0x03, 0x5c, 0xc1, 0x0c,
12838 0x5c, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, 0xfe, 0x9e, 0x15, 0x02,
12839 0x89, 0x01, 0x0b, 0x1c,
12840 0x34, 0x1d, 0x4c, 0x33, 0x31, 0xdf, 0x07, 0x06, 0x23, 0x4c, 0x01, 0xf1,
12841 0xfe, 0x42, 0x58, 0xf1,
12842 0xfe, 0xa4, 0x14, 0x8c, 0xfe, 0x4a, 0xf4, 0x0a, 0x17, 0x4c, 0xfe, 0x4a,
12843 0xf4, 0x06, 0xea, 0x32,
12844 0x07, 0xa5, 0x8b, 0x02, 0x72, 0x03, 0x45, 0xc1, 0x0c, 0x45, 0x67, 0x2d,
12845 0x01, 0x0b, 0x26, 0x89,
12846 0x01, 0xfe, 0xcc, 0x15, 0x02, 0x89, 0x0f, 0x06, 0x27, 0xfe, 0xbe, 0x13,
12847 0x26, 0xfe, 0xd4, 0x13,
12848 0x76, 0xfe, 0x89, 0x48, 0x01, 0x0b, 0x21, 0x76, 0x04, 0x7b, 0xfe, 0xd0,
12849 0x13, 0x1c, 0xfe, 0xd0,
12850 0x13, 0x1d, 0xfe, 0xbe, 0x13, 0x67, 0x2d, 0x01, 0x0b, 0xfe, 0xd5, 0x10,
12851 0x0f, 0x71, 0xff, 0x02,
12852 0x00, 0x57, 0x52, 0x93, 0x1e, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe,
12853 0x00, 0x5c, 0x04, 0x0f,
12854 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0xfe, 0x30, 0x56,
12855 0xfe, 0x00, 0x5c, 0x04,
12856 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x04, 0x0f, 0x71, 0xff,
12857 0x02, 0x00, 0x57, 0x52,
12858 0x93, 0xfe, 0x0b, 0x58, 0x04, 0x09, 0x5c, 0x01, 0x87, 0x09, 0x45, 0x01,
12859 0x87, 0x04, 0xfe, 0x03,
12860 0xa1, 0x1e, 0x11, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x1f, 0x52,
12861 0xfe, 0x00, 0x7d, 0xfe,
12862 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x6a, 0x2a, 0x0c, 0x5e,
12863 0x14, 0x5f, 0x57, 0x3f,
12864 0x7d, 0x40, 0x04, 0xdd, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83,
12865 0x5a, 0x8d, 0x04, 0x01,
12866 0xfe, 0x0c, 0x19, 0xfe, 0x42, 0x48, 0x50, 0x51, 0x91, 0x01, 0x0b, 0x1d,
12867 0xfe, 0x96, 0x15, 0x33,
12868 0x31, 0xe1, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15, 0x33, 0x31, 0xfe, 0xe8,
12869 0x0a, 0xfe, 0xc1, 0x59,
12870 0x03, 0xcd, 0x28, 0xfe, 0xcc, 0x12, 0x53, 0x05, 0x1a, 0xfe, 0xc4, 0x13,
12871 0x21, 0x69, 0x1a, 0xee,
12872 0x55, 0xca, 0x6b, 0xfe, 0xdc, 0x14, 0x4d, 0x0f, 0x06, 0x18, 0xca, 0x7c,
12873 0x30, 0xfe, 0x78, 0x10,
12874 0xff, 0x02, 0x83, 0x55, 0xab, 0xff, 0x02, 0x83, 0x55, 0x69, 0x19, 0xae,
12875 0x98, 0xfe, 0x30, 0x00,
12876 0x96, 0xf2, 0x18, 0x6d, 0x0f, 0x06, 0xfe, 0x56, 0x10, 0x69, 0x0a, 0xed,
12877 0x98, 0xfe, 0x64, 0x00,
12878 0x96, 0xf2, 0x09, 0xfe, 0x64, 0x00, 0x18, 0x9e, 0x0f, 0x06, 0xfe, 0x28,
12879 0x10, 0x69, 0x06, 0xfe,
12880 0x60, 0x13, 0x98, 0xfe, 0xc8, 0x00, 0x96, 0xf2, 0x09, 0xfe, 0xc8, 0x00,
12881 0x18, 0x59, 0x0f, 0x06,
12882 0x88, 0x98, 0xfe, 0x90, 0x01, 0x7a, 0xfe, 0x42, 0x15, 0x91, 0xe4, 0xfe,
12883 0x43, 0xf4, 0x9f, 0xfe,
12884 0x56, 0xf0, 0xfe, 0x54, 0x15, 0xfe, 0x04, 0xf4, 0x71, 0xfe, 0x43, 0xf4,
12885 0x9e, 0xfe, 0xf3, 0x10,
12886 0xfe, 0x40, 0x5c, 0x01, 0xfe, 0x16, 0x14, 0x1e, 0x43, 0xec, 0xfe, 0x00,
12887 0x17, 0xfe, 0x4d, 0xe4,
12888 0x6e, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0x6e, 0xfe, 0x1c, 0x10, 0xfe, 0x00,
12889 0x17, 0xfe, 0x4d, 0xe4,
12890 0xcc, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0xcc, 0x88, 0x51, 0x21, 0xfe, 0x4d,
12891 0xf4, 0x00, 0xe9, 0x91,
12892 0x0f, 0x06, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x04, 0x51, 0x0f, 0x0a,
12893 0x04, 0x16, 0x06, 0x01,
12894 0x0b, 0x26, 0xf3, 0x16, 0x0a, 0x01, 0x0b, 0x26, 0xf3, 0x16, 0x19, 0x01,
12895 0x0b, 0x26, 0xf3, 0x76,
12896 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1,
12897 0x16, 0x19, 0x01, 0x0b,
12898 0x26, 0xb1, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, 0xfe, 0x89, 0x49, 0x01,
12899 0x0b, 0x26, 0xb1, 0x76,
12900 0xfe, 0x89, 0x4a, 0x01, 0x0b, 0x04, 0x51, 0x04, 0x22, 0xd3, 0x07, 0x06,
12901 0xfe, 0x48, 0x13, 0xb8,
12902 0x13, 0xd3, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x76, 0xa9, 0x67, 0xfe, 0x01,
12903 0xec, 0xfe, 0x27, 0x01,
12904 0xfe, 0x89, 0x48, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x2e, 0x16, 0x32,
12905 0x07, 0xfe, 0xe3, 0x00,
12906 0xfe, 0x20, 0x13, 0x1d, 0xfe, 0x52, 0x16, 0x21, 0x13, 0xd4, 0x01, 0x4b,
12907 0x22, 0xd4, 0x07, 0x06,
12908 0x4e, 0x08, 0x54, 0x06, 0x37, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfb, 0x8e,
12909 0x07, 0x11, 0xae, 0x09,
12910 0x84, 0x01, 0x0e, 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x84, 0x01,
12911 0x0e, 0x8e, 0xfe, 0x80,
12912 0xe7, 0x11, 0x07, 0x11, 0x8a, 0xfe, 0x45, 0x58, 0x01, 0xf0, 0x8e, 0x04,
12913 0x09, 0x48, 0x01, 0x0e,
12914 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x80,
12915 0x80, 0xfe, 0x80, 0x4c,
12916 0xfe, 0x49, 0xe4, 0x11, 0xae, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c,
12917 0x09, 0x5d, 0x01, 0x87,
12918 0x04, 0x18, 0x11, 0x75, 0x6c, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe,
12919 0x19, 0xde, 0xfe, 0x24,
12920 0x1c, 0xfe, 0x1d, 0xf7, 0x1b, 0x97, 0xfe, 0xee, 0x16, 0x01, 0xfe, 0xf4,
12921 0x17, 0xad, 0x9a, 0x1b,
12922 0x6c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x04, 0xb9, 0x23, 0xfe, 0xde,
12923 0x16, 0xfe, 0xda, 0x10,
12924 0x18, 0x11, 0x75, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x1f, 0xfe,
12925 0x18, 0x58, 0x03, 0xfe,
12926 0x66, 0x01, 0xfe, 0x19, 0x58, 0x9a, 0x1f, 0xfe, 0x3c, 0x90, 0xfe, 0x30,
12927 0xf4, 0x06, 0xfe, 0x3c,
12928 0x50, 0x6c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x1f,
12929 0x97, 0xfe, 0x38, 0x17,
12930 0xfe, 0xb6, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x10, 0x17, 0xfe, 0x9c,
12931 0x10, 0x18, 0x11, 0x75,
12932 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7,
12933 0x2e, 0x97, 0xfe, 0x5a,
12934 0x17, 0xfe, 0x94, 0x14, 0xec, 0x9a, 0x2e, 0x6c, 0x1a, 0xfe, 0xaf, 0x19,
12935 0xfe, 0x98, 0xe7, 0x00,
12936 0x04, 0xb9, 0x23, 0xfe, 0x4e, 0x17, 0xfe, 0x6c, 0x10, 0x18, 0x11, 0x75,
12937 0xfe, 0x30, 0xbc, 0xfe,
12938 0xb2, 0xbc, 0x9a, 0xcb, 0x6c, 0x1a, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7,
12939 0xcb, 0x97, 0xfe, 0x92,
12940 0x17, 0xfe, 0x5c, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x7e, 0x17, 0xfe,
12941 0x42, 0x10, 0xfe, 0x02,
12942 0xf6, 0x11, 0x75, 0xfe, 0x18, 0xfe, 0x60, 0xfe, 0x19, 0xfe, 0x61, 0xfe,
12943 0x03, 0xa1, 0xfe, 0x1d,
12944 0xf7, 0x5b, 0x97, 0xfe, 0xb8, 0x17, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13,
12945 0x9a, 0x5b, 0x41, 0xfe,
12946 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x11, 0xfe, 0x81, 0xe7,
12947 0x11, 0x12, 0xfe, 0xdd,
12948 0x00, 0x6a, 0x2a, 0x04, 0x6a, 0x2a, 0xfe, 0x12, 0x45, 0x23, 0xfe, 0xa8,
12949 0x17, 0x15, 0x06, 0x39,
12950 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04,
12951 0xfe, 0x7e, 0x18, 0x1e,
12952 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2, 0x1e, 0x06, 0xfe, 0xef,
12953 0x12, 0xfe, 0xe1, 0x10,
12954 0x7c, 0x6f, 0x4f, 0x32, 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42,
12955 0x13, 0x42, 0x92, 0x09,
12956 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01,
12957 0xf0, 0xfe, 0x00, 0xcc,
12958 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01,
12959 0x0e, 0xfe, 0x80, 0x4c,
12960 0x01, 0x73, 0xfe, 0x16, 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe,
12961 0x24, 0x12, 0xfe, 0x14,
12962 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c,
12963 0xe7, 0x0a, 0x10, 0xfe,
12964 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18, 0x06, 0x04, 0x42, 0x92,
12965 0x08, 0x54, 0x1b, 0x37,
12966 0x12, 0x2f, 0x01, 0x73, 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba,
12967 0x90, 0x3a, 0xce, 0x3b,
12968 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77,
12969 0x13, 0xa3, 0x04, 0x09,
12970 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46, 0x01, 0x0e, 0xfe, 0x49,
12971 0x44, 0x17, 0xfe, 0xe8,
12972 0x18, 0x77, 0x78, 0x04, 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09,
12973 0x5d, 0x01, 0xa8, 0x09,
12974 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe,
12975 0x1c, 0x19, 0x03, 0xfe,
12976 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xc9,
12977 0x6b, 0xfe, 0x2e, 0x19,
12978 0x03, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4,
12979 0xfe, 0x0b, 0x00, 0x6b,
12980 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe,
12981 0x08, 0x10, 0x03, 0xfe,
12982 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e, 0x45, 0xea, 0xba, 0xff,
12983 0x04, 0x68, 0x54, 0xe7,
12984 0x1e, 0x6e, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe,
12985 0x1a, 0xf4, 0xfe, 0x00,
12986 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19,
12987 0x04, 0x07, 0x7e, 0xfe,
12988 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10,
12989 0x07, 0x1a, 0xfe, 0x5a,
12990 0xf0, 0xfe, 0x92, 0x19, 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66,
12991 0x25, 0x6d, 0xe5, 0x07,
12992 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59,
12993 0xa9, 0xb8, 0x04, 0x15,
12994 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe, 0x81, 0x03, 0x83, 0xfe,
12995 0x40, 0x5c, 0x04, 0x1c,
12996 0xf7, 0xfe, 0x14, 0xf0, 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b,
12997 0xf7, 0xfe, 0x82, 0xf0,
12998 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00,
13001 static unsigned short _adv_asc38C0800_size
= sizeof(_adv_asc38C0800_buf
); /* 0x14E1 */
13002 static ADV_DCNT _adv_asc38C0800_chksum
= 0x050D3FD8UL
; /* Expanded little-endian checksum. */
13004 /* Microcode buffer is kept after initialization for error recovery. */
13005 static unsigned char _adv_asc38C1600_buf
[] = {
13006 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0,
13007 0x18, 0xe4, 0x01, 0x00,
13008 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13, 0x2e, 0x1e, 0x02, 0x00,
13009 0x07, 0x17, 0xc0, 0x5f,
13010 0x00, 0xfa, 0xff, 0xff, 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7,
13011 0x85, 0xf0, 0x86, 0xf0,
13012 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00,
13013 0x98, 0x57, 0x01, 0xe6,
13014 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4, 0x08, 0x00, 0xf0, 0x1d,
13015 0x38, 0x54, 0x32, 0xf0,
13016 0x10, 0x00, 0xc2, 0x0e, 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4,
13017 0x00, 0xe6, 0xb1, 0xf0,
13018 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01,
13019 0x06, 0x13, 0x0c, 0x1c,
13020 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc, 0xbc, 0x0e, 0xa2, 0x12,
13021 0xb9, 0x54, 0x00, 0x80,
13022 0x62, 0x0a, 0x5a, 0x12, 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56,
13023 0x03, 0xe6, 0x01, 0xea,
13024 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12,
13025 0x04, 0x13, 0xbb, 0x55,
13026 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4, 0x40, 0x00, 0xb6, 0x00,
13027 0xbb, 0x00, 0xc0, 0x00,
13028 0x00, 0x01, 0x01, 0x01, 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12,
13029 0x4c, 0x1c, 0x4e, 0x1c,
13030 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00,
13031 0x24, 0x01, 0x3c, 0x01,
13032 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01,
13033 0x78, 0x01, 0x7c, 0x01,
13034 0xc6, 0x0e, 0x0c, 0x10, 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c,
13035 0x6e, 0x1e, 0x02, 0x48,
13036 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7,
13037 0x03, 0xfc, 0x06, 0x00,
13038 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12, 0x18, 0x1a, 0x70, 0x1a,
13039 0x30, 0x1c, 0x38, 0x1c,
13040 0x10, 0x44, 0x00, 0x4c, 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea,
13041 0x5d, 0xf0, 0xa7, 0xf0,
13042 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00,
13043 0x33, 0x00, 0x34, 0x00,
13044 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01,
13045 0x79, 0x01, 0x3c, 0x09,
13046 0x68, 0x0d, 0x02, 0x10, 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13,
13047 0x40, 0x16, 0x50, 0x16,
13048 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc,
13049 0x05, 0xf0, 0x09, 0xf0,
13050 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7, 0x0a, 0x00, 0x9b, 0x00,
13051 0x9c, 0x00, 0xa4, 0x00,
13052 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08,
13053 0xe9, 0x09, 0x5c, 0x0c,
13054 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c,
13055 0x42, 0x1d, 0x08, 0x44,
13056 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x89, 0x48, 0x68, 0x54,
13057 0x83, 0x55, 0x83, 0x59,
13058 0x31, 0xe4, 0x02, 0xe6, 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0,
13059 0x4b, 0xf4, 0x04, 0xf8,
13060 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00,
13061 0xa8, 0x00, 0xaa, 0x00,
13062 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01, 0x26, 0x01, 0x60, 0x01,
13063 0x7a, 0x01, 0x82, 0x01,
13064 0xc8, 0x01, 0xca, 0x01, 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07,
13065 0x68, 0x08, 0x10, 0x0d,
13066 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10,
13067 0xf3, 0x10, 0x06, 0x12,
13068 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13, 0x10, 0x13, 0xfe, 0x9c,
13069 0xf0, 0x35, 0x05, 0xfe,
13070 0xec, 0x0e, 0xff, 0x10, 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8,
13071 0xfe, 0x88, 0x01, 0xff,
13072 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
13073 0x00, 0xfe, 0x57, 0x24,
13074 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00, 0x00, 0x1a, 0xff, 0x09,
13075 0x00, 0x00, 0xff, 0x08,
13076 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10,
13077 0xff, 0xff, 0xff, 0x13,
13078 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
13079 0xfe, 0x04, 0xf7, 0xe8,
13080 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe, 0x04, 0xf7, 0xe8, 0x7d,
13081 0x0d, 0x51, 0x37, 0xfe,
13082 0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0,
13083 0xfe, 0xf8, 0x01, 0xfe,
13084 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d,
13085 0x05, 0xfe, 0x08, 0x0f,
13086 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05, 0xfe, 0x0e, 0x03, 0xfe,
13087 0x28, 0x1c, 0x03, 0xfe,
13088 0xa6, 0x00, 0xfe, 0xd1, 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe,
13089 0x48, 0xf0, 0xfe, 0x90,
13090 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8,
13091 0x02, 0xfe, 0x46, 0xf0,
13092 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60, 0x02, 0xfe, 0x43, 0xf0,
13093 0xfe, 0x4e, 0x02, 0xfe,
13094 0x44, 0xf0, 0xfe, 0x52, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c,
13095 0x0d, 0xa2, 0x1c, 0x07,
13096 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02,
13097 0x1c, 0xf5, 0xfe, 0x1e,
13098 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc,
13099 0xde, 0x0a, 0x81, 0x01,
13100 0xa3, 0x05, 0x35, 0x1f, 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a,
13101 0x81, 0x01, 0x5c, 0xfe,
13102 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c,
13103 0xfe, 0x58, 0x1c, 0x1c,
13104 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c, 0x02,
13105 0x2b, 0xfe, 0x9e, 0x02,
13106 0xfe, 0x5a, 0x1c, 0xfe, 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30,
13107 0x00, 0x47, 0xb8, 0x01,
13108 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09,
13109 0x1a, 0x31, 0xfe, 0x69,
13110 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0x01, 0xfe,
13111 0x1e, 0x1e, 0x20, 0x2c,
13112 0xfe, 0x05, 0xf6, 0xde, 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a,
13113 0x44, 0x15, 0x56, 0x51,
13114 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57,
13115 0x01, 0x18, 0x09, 0x00,
13116 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0xba, 0x01,
13117 0x18, 0xfe, 0xc8, 0x54,
13118 0x7b, 0xfe, 0x1c, 0x03, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60,
13119 0xfe, 0x02, 0xe8, 0x30,
13120 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0,
13121 0xfe, 0xe4, 0x01, 0xfe,
13122 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40, 0x1c, 0x2a, 0xeb, 0xfe,
13123 0x26, 0xf0, 0xfe, 0x66,
13124 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe,
13125 0xef, 0x10, 0xfe, 0x9f,
13126 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05,
13127 0x70, 0x37, 0xfe, 0x48,
13128 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x26,
13129 0x21, 0xb9, 0xc7, 0x20,
13130 0xb9, 0x0a, 0x57, 0x01, 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15,
13131 0xe1, 0x2a, 0xeb, 0xfe,
13132 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32,
13133 0x15, 0xfe, 0xe4, 0x00,
13134 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe, 0xc6, 0x03, 0x01, 0x41,
13135 0xfe, 0x06, 0xf0, 0xfe,
13136 0xd6, 0x03, 0xaf, 0xa0, 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29,
13137 0x03, 0x81, 0x1e, 0x1b,
13138 0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05,
13139 0xea, 0xfe, 0x46, 0x1c,
13140 0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57,
13141 0xfe, 0x48, 0x1c, 0x75,
13142 0x01, 0xa6, 0x86, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a,
13143 0xe1, 0x01, 0x18, 0x77,
13144 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42,
13145 0x8f, 0xfe, 0x70, 0x02,
13146 0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29, 0x2f, 0xfe, 0x4e, 0x04,
13147 0x16, 0xfe, 0x4a, 0x04,
13148 0x7e, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff,
13149 0x02, 0x00, 0x10, 0x01,
13150 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25,
13151 0xee, 0xfe, 0x4c, 0x44,
13152 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13, 0x34, 0xfe, 0x4c, 0x54,
13153 0x7b, 0xec, 0x60, 0x8d,
13154 0x30, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01,
13155 0x0c, 0x06, 0x28, 0xfe,
13156 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10,
13157 0x13, 0x34, 0xfe, 0x4c,
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13585 0xfe, 0x1a, 0xf7, 0x00,
13586 0xfe, 0x1b, 0xf7, 0x00, 0x7a, 0x30, 0x10, 0x68, 0x22, 0x69, 0xd9, 0x6c,
13587 0xda, 0x6d, 0x02, 0xfe,
13588 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x77,
13589 0x02, 0x01, 0xc6, 0xfe,
13590 0x42, 0x48, 0x4f, 0x50, 0x45, 0x01, 0x08, 0x16, 0xfe, 0xe0, 0x17, 0x27,
13591 0x25, 0xbe, 0x01, 0x08,
13592 0x16, 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59,
13593 0x03, 0x9a, 0x1e, 0xfe,
13594 0xda, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfe, 0xd0, 0x13, 0x26, 0x53, 0x12,
13595 0x48, 0xfe, 0x08, 0x17,
13596 0xd1, 0x12, 0x53, 0x12, 0xfe, 0x1e, 0x13, 0x2d, 0xb4, 0x7b, 0xfe, 0x26,
13597 0x17, 0x4d, 0x13, 0x07,
13598 0x1c, 0xb4, 0x90, 0x04, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xf1,
13599 0xff, 0x02, 0x83, 0x55,
13600 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80,
13601 0x17, 0x1c, 0x63, 0x13,
13602 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16, 0x13, 0xd6, 0xfe, 0x64,
13603 0x00, 0xb0, 0xfe, 0x80,
13604 0x17, 0x0a, 0xfe, 0x64, 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10,
13605 0x53, 0x07, 0xfe, 0x60,
13606 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8,
13607 0x00, 0x1c, 0x95, 0x13,
13608 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0x8c, 0x17, 0x45, 0xf3,
13609 0xfe, 0x43, 0xf4, 0x96,
13610 0xfe, 0x56, 0xf0, 0xfe, 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43,
13611 0xf4, 0x94, 0xf6, 0x8b,
13612 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe,
13613 0xda, 0x17, 0x62, 0x49,
13614 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe, 0xda, 0x17, 0x62, 0x80,
13615 0x71, 0x50, 0x26, 0xfe,
13616 0x4d, 0xf4, 0x00, 0xf7, 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3,
13617 0x58, 0x02, 0x50, 0x13,
13618 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27,
13619 0x25, 0xbe, 0xfe, 0x03,
13620 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe9,
13621 0x0a, 0x01, 0x08, 0x16,
13622 0xa9, 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01,
13623 0x01, 0x08, 0x16, 0xa9,
13624 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01,
13625 0x08, 0x16, 0xa9, 0x27,
13626 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01, 0x03, 0xb6, 0x1e, 0x83,
13627 0x01, 0x38, 0x06, 0x24,
13628 0x31, 0xa2, 0x78, 0xf2, 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1,
13629 0x78, 0x03, 0x9a, 0x1e,
13630 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10,
13631 0xfe, 0x40, 0x5a, 0x23,
13632 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x49, 0x71, 0x8c,
13633 0x80, 0x48, 0xfe, 0xaa,
13634 0x18, 0x62, 0x80, 0xfe, 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01,
13635 0xfe, 0xac, 0x1d, 0xfe,
13636 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe,
13637 0x43, 0x48, 0x2d, 0x93,
13638 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe, 0x40, 0x10, 0x2d, 0xb4,
13639 0x36, 0xfe, 0x34, 0xf4,
13640 0x04, 0xfe, 0x34, 0x10, 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe,
13641 0x28, 0x10, 0xfe, 0xc0,
13642 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa,
13643 0x18, 0x45, 0xfe, 0x1c,
13644 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe, 0x0c,
13645 0x19, 0xfe, 0x04, 0xf4,
13646 0x58, 0xfe, 0x40, 0xf4, 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d,
13647 0x21, 0xfe, 0x7f, 0x01,
13648 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe,
13649 0x7e, 0x01, 0xfe, 0xc8,
13650 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01, 0xfe, 0x48, 0x45, 0xfa,
13651 0x21, 0xfe, 0x81, 0x01,
13652 0xfe, 0xc8, 0x44, 0x4e, 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50,
13653 0x13, 0x0d, 0x02, 0x14,
13654 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17,
13655 0xfe, 0x82, 0x19, 0x14,
13656 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f, 0xfe, 0x89, 0x49, 0x01,
13657 0x08, 0x02, 0x14, 0x07,
13658 0x01, 0x08, 0x17, 0xc1, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07,
13659 0x01, 0x08, 0x17, 0xc1,
13660 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01,
13661 0x08, 0x02, 0x50, 0x02,
13662 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f, 0x01, 0x08, 0x17, 0x74,
13663 0x14, 0x12, 0x01, 0x08,
13664 0x17, 0x74, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01,
13665 0x08, 0x17, 0x74, 0xfe,
13666 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17,
13667 0x74, 0x5f, 0xcc, 0x01,
13668 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c, 0x13, 0xc8, 0x20, 0xe4,
13669 0xfe, 0x49, 0xf4, 0x00,
13670 0x4d, 0x5f, 0xa1, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff,
13671 0x02, 0x00, 0x10, 0x2f,
13672 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13,
13673 0x16, 0xfe, 0x64, 0x1a,
13674 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09, 0x07, 0x5d, 0x01, 0x0c,
13675 0x61, 0x07, 0x44, 0x02,
13676 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12,
13677 0x13, 0x0a, 0x9d, 0x01,
13678 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa,
13679 0xfe, 0x80, 0xe7, 0x1a,
13680 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe, 0xb2, 0x16, 0xaa, 0x02,
13681 0x0a, 0x5a, 0x01, 0x18,
13682 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe,
13683 0x7e, 0x1e, 0xfe, 0x80,
13684 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18,
13685 0xfe, 0x80, 0x4c, 0x0a,
13686 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c, 0xe5, 0xfe, 0x18, 0xdf,
13687 0xfe, 0x19, 0xde, 0xfe,
13688 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe,
13689 0x2a, 0x1c, 0xfa, 0xb3,
13690 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe,
13691 0xf4, 0x1a, 0xfe, 0xfa,
13692 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x24,
13693 0xfe, 0x18, 0x58, 0x03,
13694 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f,
13695 0xfe, 0x30, 0xf4, 0x07,
13696 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c,
13697 0xf7, 0x24, 0xb1, 0xfe,
13698 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x26, 0x1b,
13699 0xfe, 0xba, 0x10, 0x1c,
13700 0x1a, 0x87, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe,
13701 0x1d, 0xf7, 0x54, 0xb1,
13702 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe,
13703 0xaf, 0x19, 0xfe, 0x98,
13704 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b, 0xfe, 0x8a, 0x10, 0x1c,
13705 0x1a, 0x87, 0x8b, 0x0f,
13706 0xfe, 0x30, 0x90, 0x04, 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58,
13707 0xfe, 0x32, 0x90, 0x04,
13708 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a,
13709 0x7c, 0x12, 0xfe, 0x0f,
13710 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6, 0x1b, 0xfe, 0x5e, 0x14,
13711 0x31, 0x02, 0xc9, 0x2b,
13712 0xfe, 0x96, 0x1b, 0x5c, 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe,
13713 0x6a, 0xfe, 0x19, 0xfe,
13714 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee,
13715 0x1b, 0xfe, 0x36, 0x14,
13716 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19,
13717 0xfe, 0x80, 0xe7, 0x1a,
13718 0xfe, 0x81, 0xe7, 0x1a, 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a,
13719 0x30, 0xfe, 0x12, 0x45,
13720 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe,
13721 0x39, 0xf0, 0x75, 0x26,
13722 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13, 0x11, 0x02, 0x87, 0x03,
13723 0xe3, 0x23, 0x07, 0xfe,
13724 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09,
13725 0x56, 0xfe, 0x3c, 0x13,
13726 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a,
13727 0x01, 0x18, 0xcb, 0xfe,
13728 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xfe, 0xb2, 0x16,
13729 0xfe, 0x00, 0xcc, 0xcb,
13730 0xfe, 0xf3, 0x13, 0x3f, 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18,
13731 0xfe, 0x80, 0x4c, 0x01,
13732 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24,
13733 0x12, 0xfe, 0x14, 0x56,
13734 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d, 0x02, 0xfe, 0x9c, 0xe7,
13735 0x0d, 0x19, 0xfe, 0x15,
13736 0x00, 0x40, 0x8d, 0x30, 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06,
13737 0x83, 0xfe, 0x18, 0x80,
13738 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38,
13739 0x90, 0xfe, 0xba, 0x90,
13740 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31, 0xfe, 0xc9, 0x55, 0x02,
13741 0x21, 0xb9, 0x88, 0x20,
13742 0xb9, 0x02, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01,
13743 0x18, 0xfe, 0x49, 0x44,
13744 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09,
13745 0x1a, 0xa4, 0x0a, 0x67,
13746 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89, 0x02, 0xfe, 0x4e, 0xe4,
13747 0x1d, 0x7b, 0xfe, 0x52,
13748 0x1d, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe,
13749 0x4e, 0xe4, 0xdd, 0x7b,
13750 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10,
13751 0xfe, 0x4e, 0xe4, 0xfe,
13752 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe, 0x94, 0x00, 0xd1, 0x24,
13753 0xfe, 0x08, 0x10, 0x03,
13754 0xfe, 0x96, 0x00, 0xd1, 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04,
13755 0x68, 0x54, 0xfe, 0xf1,
13756 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c,
13757 0xfe, 0x1a, 0xf4, 0xfe,
13758 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa, 0x1d, 0x13, 0x1d, 0x02,
13759 0x09, 0x92, 0xfe, 0x5a,
13760 0xf0, 0xfe, 0xba, 0x1d, 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe,
13761 0x5a, 0xf0, 0xfe, 0xc8,
13762 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe,
13763 0x1a, 0x10, 0x09, 0x0d,
13764 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e, 0x95, 0xa1, 0xc8, 0x02,
13765 0x1f, 0x93, 0x01, 0x42,
13766 0xfe, 0x04, 0xfe, 0x99, 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e,
13767 0xfe, 0x14, 0xf0, 0x08,
13768 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e,
13769 0xfe, 0x82, 0xf0, 0xfe,
13770 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80, 0x83, 0x33, 0x0b, 0x0e,
13771 0x02, 0x0f, 0xfe, 0x18,
13772 0x80, 0x04, 0xfe, 0x98, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02,
13773 0x80, 0x04, 0xfe, 0x82,
13774 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86,
13775 0x83, 0x33, 0x0b, 0x0e,
13776 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b, 0x83, 0x33, 0x0b, 0x0e,
13777 0x02, 0x0f, 0xfe, 0x04,
13778 0x80, 0x04, 0xfe, 0x84, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80,
13779 0x80, 0x04, 0xfe, 0x80,
13780 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04,
13781 0xfe, 0x99, 0x83, 0xfe,
13782 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x83, 0x04, 0xfe, 0x86,
13783 0x83, 0xfe, 0xce, 0x47,
13784 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a,
13785 0x0b, 0x0e, 0x02, 0x0f,
13786 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
13787 0xfe, 0x08, 0x90, 0x04,
13788 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x8a, 0x90, 0x04,
13789 0xfe, 0x8a, 0x93, 0x79,
13790 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a,
13791 0x0b, 0x0e, 0x02, 0x0f,
13792 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
13793 0xfe, 0x3c, 0x90, 0x04,
13794 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b, 0x0f, 0xfe, 0x03, 0x80,
13795 0x04, 0xfe, 0x83, 0x83,
13796 0x33, 0x0b, 0x77, 0x0e, 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00,
13799 static unsigned short _adv_asc38C1600_size
= sizeof(_adv_asc38C1600_buf
); /* 0x1673 */
13800 static ADV_DCNT _adv_asc38C1600_chksum
= 0x0604EF77UL
; /* Expanded little-endian checksum. */
13804 * EEPROM Configuration.
13806 * All drivers should use this structure to set the default EEPROM
13807 * configuration. The BIOS now uses this structure when it is built.
13808 * Additional structure information can be found in a_condor.h where
13809 * the structure is defined.
13811 * The *_Field_IsChar structs are needed to correct for endianness.
13812 * These values are read from the board 16 bits at a time directly
13813 * into the structs. Because some fields are char, the values will be
13814 * in the wrong order. The *_Field_IsChar tells when to flip the
13815 * bytes. Data read and written to PCI memory is automatically swapped
13816 * on big-endian platforms so char fields read as words are actually being
13817 * unswapped on big-endian platforms.
13819 static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __initdata
= {
13820 ADV_EEPROM_BIOS_ENABLE
, /* cfg_lsw */
13821 0x0000, /* cfg_msw */
13822 0xFFFF, /* disc_enable */
13823 0xFFFF, /* wdtr_able */
13824 0xFFFF, /* sdtr_able */
13825 0xFFFF, /* start_motor */
13826 0xFFFF, /* tagqng_able */
13827 0xFFFF, /* bios_scan */
13828 0, /* scam_tolerant */
13829 7, /* adapter_scsi_id */
13830 0, /* bios_boot_delay */
13831 3, /* scsi_reset_delay */
13832 0, /* bios_id_lun */
13833 0, /* termination */
13835 0xFFE7, /* bios_ctrl */
13836 0xFFFF, /* ultra_able */
13838 ASC_DEF_MAX_HOST_QNG
, /* max_host_qng */
13839 ASC_DEF_MAX_DVC_QNG
, /* max_dvc_qng */
13842 0, /* serial_number_word1 */
13843 0, /* serial_number_word2 */
13844 0, /* serial_number_word3 */
13846 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
13847 , /* oem_name[16] */
13848 0, /* dvc_err_code */
13849 0, /* adv_err_code */
13850 0, /* adv_err_addr */
13851 0, /* saved_dvc_err_code */
13852 0, /* saved_adv_err_code */
13853 0, /* saved_adv_err_addr */
13857 static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __initdata
= {
13860 0, /* -disc_enable */
13863 0, /* start_motor */
13864 0, /* tagqng_able */
13866 0, /* scam_tolerant */
13867 1, /* adapter_scsi_id */
13868 1, /* bios_boot_delay */
13869 1, /* scsi_reset_delay */
13870 1, /* bios_id_lun */
13871 1, /* termination */
13874 0, /* ultra_able */
13876 1, /* max_host_qng */
13877 1, /* max_dvc_qng */
13880 0, /* serial_number_word1 */
13881 0, /* serial_number_word2 */
13882 0, /* serial_number_word3 */
13884 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
13885 , /* oem_name[16] */
13886 0, /* dvc_err_code */
13887 0, /* adv_err_code */
13888 0, /* adv_err_addr */
13889 0, /* saved_dvc_err_code */
13890 0, /* saved_adv_err_code */
13891 0, /* saved_adv_err_addr */
13895 static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __initdata
= {
13896 ADV_EEPROM_BIOS_ENABLE
, /* 00 cfg_lsw */
13897 0x0000, /* 01 cfg_msw */
13898 0xFFFF, /* 02 disc_enable */
13899 0xFFFF, /* 03 wdtr_able */
13900 0x4444, /* 04 sdtr_speed1 */
13901 0xFFFF, /* 05 start_motor */
13902 0xFFFF, /* 06 tagqng_able */
13903 0xFFFF, /* 07 bios_scan */
13904 0, /* 08 scam_tolerant */
13905 7, /* 09 adapter_scsi_id */
13906 0, /* bios_boot_delay */
13907 3, /* 10 scsi_reset_delay */
13908 0, /* bios_id_lun */
13909 0, /* 11 termination_se */
13910 0, /* termination_lvd */
13911 0xFFE7, /* 12 bios_ctrl */
13912 0x4444, /* 13 sdtr_speed2 */
13913 0x4444, /* 14 sdtr_speed3 */
13914 ASC_DEF_MAX_HOST_QNG
, /* 15 max_host_qng */
13915 ASC_DEF_MAX_DVC_QNG
, /* max_dvc_qng */
13916 0, /* 16 dvc_cntl */
13917 0x4444, /* 17 sdtr_speed4 */
13918 0, /* 18 serial_number_word1 */
13919 0, /* 19 serial_number_word2 */
13920 0, /* 20 serial_number_word3 */
13921 0, /* 21 check_sum */
13922 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
13923 , /* 22-29 oem_name[16] */
13924 0, /* 30 dvc_err_code */
13925 0, /* 31 adv_err_code */
13926 0, /* 32 adv_err_addr */
13927 0, /* 33 saved_dvc_err_code */
13928 0, /* 34 saved_adv_err_code */
13929 0, /* 35 saved_adv_err_addr */
13930 0, /* 36 reserved */
13931 0, /* 37 reserved */
13932 0, /* 38 reserved */
13933 0, /* 39 reserved */
13934 0, /* 40 reserved */
13935 0, /* 41 reserved */
13936 0, /* 42 reserved */
13937 0, /* 43 reserved */
13938 0, /* 44 reserved */
13939 0, /* 45 reserved */
13940 0, /* 46 reserved */
13941 0, /* 47 reserved */
13942 0, /* 48 reserved */
13943 0, /* 49 reserved */
13944 0, /* 50 reserved */
13945 0, /* 51 reserved */
13946 0, /* 52 reserved */
13947 0, /* 53 reserved */
13948 0, /* 54 reserved */
13949 0, /* 55 reserved */
13950 0, /* 56 cisptr_lsw */
13951 0, /* 57 cisprt_msw */
13952 PCI_VENDOR_ID_ASP
, /* 58 subsysvid */
13953 PCI_DEVICE_ID_38C0800_REV1
, /* 59 subsysid */
13954 0, /* 60 reserved */
13955 0, /* 61 reserved */
13956 0, /* 62 reserved */
13957 0 /* 63 reserved */
13960 static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __initdata
= {
13961 0, /* 00 cfg_lsw */
13962 0, /* 01 cfg_msw */
13963 0, /* 02 disc_enable */
13964 0, /* 03 wdtr_able */
13965 0, /* 04 sdtr_speed1 */
13966 0, /* 05 start_motor */
13967 0, /* 06 tagqng_able */
13968 0, /* 07 bios_scan */
13969 0, /* 08 scam_tolerant */
13970 1, /* 09 adapter_scsi_id */
13971 1, /* bios_boot_delay */
13972 1, /* 10 scsi_reset_delay */
13973 1, /* bios_id_lun */
13974 1, /* 11 termination_se */
13975 1, /* termination_lvd */
13976 0, /* 12 bios_ctrl */
13977 0, /* 13 sdtr_speed2 */
13978 0, /* 14 sdtr_speed3 */
13979 1, /* 15 max_host_qng */
13980 1, /* max_dvc_qng */
13981 0, /* 16 dvc_cntl */
13982 0, /* 17 sdtr_speed4 */
13983 0, /* 18 serial_number_word1 */
13984 0, /* 19 serial_number_word2 */
13985 0, /* 20 serial_number_word3 */
13986 0, /* 21 check_sum */
13987 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
13988 , /* 22-29 oem_name[16] */
13989 0, /* 30 dvc_err_code */
13990 0, /* 31 adv_err_code */
13991 0, /* 32 adv_err_addr */
13992 0, /* 33 saved_dvc_err_code */
13993 0, /* 34 saved_adv_err_code */
13994 0, /* 35 saved_adv_err_addr */
13995 0, /* 36 reserved */
13996 0, /* 37 reserved */
13997 0, /* 38 reserved */
13998 0, /* 39 reserved */
13999 0, /* 40 reserved */
14000 0, /* 41 reserved */
14001 0, /* 42 reserved */
14002 0, /* 43 reserved */
14003 0, /* 44 reserved */
14004 0, /* 45 reserved */
14005 0, /* 46 reserved */
14006 0, /* 47 reserved */
14007 0, /* 48 reserved */
14008 0, /* 49 reserved */
14009 0, /* 50 reserved */
14010 0, /* 51 reserved */
14011 0, /* 52 reserved */
14012 0, /* 53 reserved */
14013 0, /* 54 reserved */
14014 0, /* 55 reserved */
14015 0, /* 56 cisptr_lsw */
14016 0, /* 57 cisprt_msw */
14017 0, /* 58 subsysvid */
14018 0, /* 59 subsysid */
14019 0, /* 60 reserved */
14020 0, /* 61 reserved */
14021 0, /* 62 reserved */
14022 0 /* 63 reserved */
14025 static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __initdata
= {
14026 ADV_EEPROM_BIOS_ENABLE
, /* 00 cfg_lsw */
14027 0x0000, /* 01 cfg_msw */
14028 0xFFFF, /* 02 disc_enable */
14029 0xFFFF, /* 03 wdtr_able */
14030 0x5555, /* 04 sdtr_speed1 */
14031 0xFFFF, /* 05 start_motor */
14032 0xFFFF, /* 06 tagqng_able */
14033 0xFFFF, /* 07 bios_scan */
14034 0, /* 08 scam_tolerant */
14035 7, /* 09 adapter_scsi_id */
14036 0, /* bios_boot_delay */
14037 3, /* 10 scsi_reset_delay */
14038 0, /* bios_id_lun */
14039 0, /* 11 termination_se */
14040 0, /* termination_lvd */
14041 0xFFE7, /* 12 bios_ctrl */
14042 0x5555, /* 13 sdtr_speed2 */
14043 0x5555, /* 14 sdtr_speed3 */
14044 ASC_DEF_MAX_HOST_QNG
, /* 15 max_host_qng */
14045 ASC_DEF_MAX_DVC_QNG
, /* max_dvc_qng */
14046 0, /* 16 dvc_cntl */
14047 0x5555, /* 17 sdtr_speed4 */
14048 0, /* 18 serial_number_word1 */
14049 0, /* 19 serial_number_word2 */
14050 0, /* 20 serial_number_word3 */
14051 0, /* 21 check_sum */
14052 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
14053 , /* 22-29 oem_name[16] */
14054 0, /* 30 dvc_err_code */
14055 0, /* 31 adv_err_code */
14056 0, /* 32 adv_err_addr */
14057 0, /* 33 saved_dvc_err_code */
14058 0, /* 34 saved_adv_err_code */
14059 0, /* 35 saved_adv_err_addr */
14060 0, /* 36 reserved */
14061 0, /* 37 reserved */
14062 0, /* 38 reserved */
14063 0, /* 39 reserved */
14064 0, /* 40 reserved */
14065 0, /* 41 reserved */
14066 0, /* 42 reserved */
14067 0, /* 43 reserved */
14068 0, /* 44 reserved */
14069 0, /* 45 reserved */
14070 0, /* 46 reserved */
14071 0, /* 47 reserved */
14072 0, /* 48 reserved */
14073 0, /* 49 reserved */
14074 0, /* 50 reserved */
14075 0, /* 51 reserved */
14076 0, /* 52 reserved */
14077 0, /* 53 reserved */
14078 0, /* 54 reserved */
14079 0, /* 55 reserved */
14080 0, /* 56 cisptr_lsw */
14081 0, /* 57 cisprt_msw */
14082 PCI_VENDOR_ID_ASP
, /* 58 subsysvid */
14083 PCI_DEVICE_ID_38C1600_REV1
, /* 59 subsysid */
14084 0, /* 60 reserved */
14085 0, /* 61 reserved */
14086 0, /* 62 reserved */
14087 0 /* 63 reserved */
14090 static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __initdata
= {
14091 0, /* 00 cfg_lsw */
14092 0, /* 01 cfg_msw */
14093 0, /* 02 disc_enable */
14094 0, /* 03 wdtr_able */
14095 0, /* 04 sdtr_speed1 */
14096 0, /* 05 start_motor */
14097 0, /* 06 tagqng_able */
14098 0, /* 07 bios_scan */
14099 0, /* 08 scam_tolerant */
14100 1, /* 09 adapter_scsi_id */
14101 1, /* bios_boot_delay */
14102 1, /* 10 scsi_reset_delay */
14103 1, /* bios_id_lun */
14104 1, /* 11 termination_se */
14105 1, /* termination_lvd */
14106 0, /* 12 bios_ctrl */
14107 0, /* 13 sdtr_speed2 */
14108 0, /* 14 sdtr_speed3 */
14109 1, /* 15 max_host_qng */
14110 1, /* max_dvc_qng */
14111 0, /* 16 dvc_cntl */
14112 0, /* 17 sdtr_speed4 */
14113 0, /* 18 serial_number_word1 */
14114 0, /* 19 serial_number_word2 */
14115 0, /* 20 serial_number_word3 */
14116 0, /* 21 check_sum */
14117 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
14118 , /* 22-29 oem_name[16] */
14119 0, /* 30 dvc_err_code */
14120 0, /* 31 adv_err_code */
14121 0, /* 32 adv_err_addr */
14122 0, /* 33 saved_dvc_err_code */
14123 0, /* 34 saved_adv_err_code */
14124 0, /* 35 saved_adv_err_addr */
14125 0, /* 36 reserved */
14126 0, /* 37 reserved */
14127 0, /* 38 reserved */
14128 0, /* 39 reserved */
14129 0, /* 40 reserved */
14130 0, /* 41 reserved */
14131 0, /* 42 reserved */
14132 0, /* 43 reserved */
14133 0, /* 44 reserved */
14134 0, /* 45 reserved */
14135 0, /* 46 reserved */
14136 0, /* 47 reserved */
14137 0, /* 48 reserved */
14138 0, /* 49 reserved */
14139 0, /* 50 reserved */
14140 0, /* 51 reserved */
14141 0, /* 52 reserved */
14142 0, /* 53 reserved */
14143 0, /* 54 reserved */
14144 0, /* 55 reserved */
14145 0, /* 56 cisptr_lsw */
14146 0, /* 57 cisprt_msw */
14147 0, /* 58 subsysvid */
14148 0, /* 59 subsysid */
14149 0, /* 60 reserved */
14150 0, /* 61 reserved */
14151 0, /* 62 reserved */
14152 0 /* 63 reserved */
14156 * Initialize the ADV_DVC_VAR structure.
14158 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
14160 * For a non-fatal error return a warning code. If there are no warnings
14161 * then 0 is returned.
14163 static int __init
AdvInitGetConfig(ADV_DVC_VAR
*asc_dvc
)
14166 AdvPortAddr iop_base
;
14171 asc_dvc
->err_code
= 0;
14172 iop_base
= asc_dvc
->iop_base
;
14175 * PCI Command Register
14177 * Note: AscPCICmdRegBits_BusMastering definition (0x0007) includes
14178 * I/O Space Control, Memory Space Control and Bus Master Control bits.
14181 if (((pci_cmd_reg
= DvcAdvReadPCIConfigByte(asc_dvc
,
14182 AscPCIConfigCommandRegister
))
14183 & AscPCICmdRegBits_BusMastering
)
14184 != AscPCICmdRegBits_BusMastering
) {
14185 pci_cmd_reg
|= AscPCICmdRegBits_BusMastering
;
14187 DvcAdvWritePCIConfigByte(asc_dvc
,
14188 AscPCIConfigCommandRegister
,
14191 if (((DvcAdvReadPCIConfigByte
14192 (asc_dvc
, AscPCIConfigCommandRegister
))
14193 & AscPCICmdRegBits_BusMastering
)
14194 != AscPCICmdRegBits_BusMastering
) {
14195 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
14200 * PCI Latency Timer
14202 * If the "latency timer" register is 0x20 or above, then we don't need
14203 * to change it. Otherwise, set it to 0x20 (i.e. set it to 0x20 if it
14204 * comes up less than 0x20).
14206 if (DvcAdvReadPCIConfigByte(asc_dvc
, AscPCIConfigLatencyTimer
) < 0x20) {
14207 DvcAdvWritePCIConfigByte(asc_dvc
, AscPCIConfigLatencyTimer
,
14209 if (DvcAdvReadPCIConfigByte(asc_dvc
, AscPCIConfigLatencyTimer
) <
14211 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
14216 * Save the state of the PCI Configuration Command Register
14217 * "Parity Error Response Control" Bit. If the bit is clear (0),
14218 * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore
14219 * DMA parity errors.
14221 asc_dvc
->cfg
->control_flag
= 0;
14222 if (((DvcAdvReadPCIConfigByte(asc_dvc
, AscPCIConfigCommandRegister
)
14223 & AscPCICmdRegBits_ParErrRespCtrl
)) == 0) {
14224 asc_dvc
->cfg
->control_flag
|= CONTROL_FLAG_IGNORE_PERR
;
14227 asc_dvc
->cfg
->lib_version
= (ADV_LIB_VERSION_MAJOR
<< 8) |
14228 ADV_LIB_VERSION_MINOR
;
14229 asc_dvc
->cfg
->chip_version
=
14230 AdvGetChipVersion(iop_base
, asc_dvc
->bus_type
);
14232 ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%x\n",
14233 (ushort
)AdvReadByteRegister(iop_base
, IOPB_CHIP_ID_1
),
14234 (ushort
)ADV_CHIP_ID_BYTE
);
14236 ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%x\n",
14237 (ushort
)AdvReadWordRegister(iop_base
, IOPW_CHIP_ID_0
),
14238 (ushort
)ADV_CHIP_ID_WORD
);
14241 * Reset the chip to start and allow register writes.
14243 if (AdvFindSignature(iop_base
) == 0) {
14244 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
14248 * The caller must set 'chip_type' to a valid setting.
14250 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC3550
&&
14251 asc_dvc
->chip_type
!= ADV_CHIP_ASC38C0800
&&
14252 asc_dvc
->chip_type
!= ADV_CHIP_ASC38C1600
) {
14253 asc_dvc
->err_code
|= ASC_IERR_BAD_CHIPTYPE
;
14260 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
,
14261 ADV_CTRL_REG_CMD_RESET
);
14262 DvcSleepMilliSecond(100);
14263 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
,
14264 ADV_CTRL_REG_CMD_WR_IO_REG
);
14266 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
14268 AdvInitFrom38C1600EEP(asc_dvc
)) == ADV_ERROR
) {
14271 } else if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
14273 AdvInitFrom38C0800EEP(asc_dvc
)) == ADV_ERROR
) {
14277 if ((status
= AdvInitFrom3550EEP(asc_dvc
)) == ADV_ERROR
) {
14281 warn_code
|= status
;
14288 * Initialize the ASC-3550.
14290 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
14292 * For a non-fatal error return a warning code. If there are no warnings
14293 * then 0 is returned.
14295 * Needed after initialization for error recovery.
14297 static int AdvInitAsc3550Driver(ADV_DVC_VAR
*asc_dvc
)
14299 AdvPortAddr iop_base
;
14307 int adv_asc3550_expanded_size
;
14309 ADV_DCNT contig_len
;
14310 ADV_SDCNT buf_size
;
14311 ADV_PADDR carr_paddr
;
14315 ushort bios_mem
[ASC_MC_BIOSLEN
/ 2]; /* BIOS RISC Memory 0x40-0x8F. */
14316 ushort wdtr_able
= 0, sdtr_able
, tagqng_able
;
14317 uchar max_cmd
[ADV_MAX_TID
+ 1];
14319 /* If there is already an error, don't continue. */
14320 if (asc_dvc
->err_code
!= 0) {
14325 * The caller must set 'chip_type' to ADV_CHIP_ASC3550.
14327 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC3550
) {
14328 asc_dvc
->err_code
|= ASC_IERR_BAD_CHIPTYPE
;
14333 iop_base
= asc_dvc
->iop_base
;
14336 * Save the RISC memory BIOS region before writing the microcode.
14337 * The BIOS may already be loaded and using its RISC LRAM region
14338 * so its region must be saved and restored.
14340 * Note: This code makes the assumption, which is currently true,
14341 * that a chip reset does not clear RISC LRAM.
14343 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
14344 AdvReadWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
14349 * Save current per TID negotiated values.
14351 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] == 0x55AA) {
14352 ushort bios_version
, major
, minor
;
14355 bios_mem
[(ASC_MC_BIOS_VERSION
- ASC_MC_BIOSMEM
) / 2];
14356 major
= (bios_version
>> 12) & 0xF;
14357 minor
= (bios_version
>> 8) & 0xF;
14358 if (major
< 3 || (major
== 3 && minor
== 1)) {
14359 /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */
14360 AdvReadWordLram(iop_base
, 0x120, wdtr_able
);
14362 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
14365 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
14366 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
14367 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14368 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
14373 * Load the Microcode
14375 * Write the microcode image to RISC memory starting at address 0.
14377 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
14378 /* Assume the following compressed format of the microcode buffer:
14380 * 254 word (508 byte) table indexed by byte code followed
14381 * by the following byte codes:
14384 * 00: Emit word 0 in table.
14385 * 01: Emit word 1 in table.
14387 * FD: Emit word 253 in table.
14390 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
14391 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
14394 for (i
= 253 * 2; i
< _adv_asc3550_size
; i
++) {
14395 if (_adv_asc3550_buf
[i
] == 0xff) {
14396 for (j
= 0; j
< _adv_asc3550_buf
[i
+ 1]; j
++) {
14397 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14406 } else if (_adv_asc3550_buf
[i
] == 0xfe) {
14407 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14408 _adv_asc3550_buf
[i
+
14411 _adv_asc3550_buf
[i
+
14416 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14417 _adv_asc3550_buf
[(_adv_asc3550_buf
[i
] * 2) + 1] << 8) | _adv_asc3550_buf
[_adv_asc3550_buf
[i
] * 2]));
14423 * Set 'word' for later use to clear the rest of memory and save
14424 * the expanded mcode size.
14427 adv_asc3550_expanded_size
= word
;
14430 * Clear the rest of ASC-3550 Internal RAM (8KB).
14432 for (; word
< ADV_3550_MEMSIZE
; word
+= 2) {
14433 AdvWriteWordAutoIncLram(iop_base
, 0);
14437 * Verify the microcode checksum.
14440 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
14442 for (word
= 0; word
< adv_asc3550_expanded_size
; word
+= 2) {
14443 sum
+= AdvReadWordAutoIncLram(iop_base
);
14446 if (sum
!= _adv_asc3550_chksum
) {
14447 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
14452 * Restore the RISC memory BIOS region.
14454 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
14455 AdvWriteWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
14460 * Calculate and write the microcode code checksum to the microcode
14461 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
14463 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, begin_addr
);
14464 AdvReadWordLram(iop_base
, ASC_MC_CODE_END_ADDR
, end_addr
);
14466 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, begin_addr
);
14467 for (word
= begin_addr
; word
< end_addr
; word
+= 2) {
14468 code_sum
+= AdvReadWordAutoIncLram(iop_base
);
14470 AdvWriteWordLram(iop_base
, ASC_MC_CODE_CHK_SUM
, code_sum
);
14473 * Read and save microcode version and date.
14475 AdvReadWordLram(iop_base
, ASC_MC_VERSION_DATE
,
14476 asc_dvc
->cfg
->mcode_date
);
14477 AdvReadWordLram(iop_base
, ASC_MC_VERSION_NUM
,
14478 asc_dvc
->cfg
->mcode_version
);
14481 * Set the chip type to indicate the ASC3550.
14483 AdvWriteWordLram(iop_base
, ASC_MC_CHIP_TYPE
, ADV_CHIP_ASC3550
);
14486 * If the PCI Configuration Command Register "Parity Error Response
14487 * Control" Bit was clear (0), then set the microcode variable
14488 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
14489 * to ignore DMA parity errors.
14491 if (asc_dvc
->cfg
->control_flag
& CONTROL_FLAG_IGNORE_PERR
) {
14492 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
14493 word
|= CONTROL_FLAG_IGNORE_PERR
;
14494 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
14498 * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO
14499 * threshold of 128 bytes. This register is only accessible to the host.
14501 AdvWriteByteRegister(iop_base
, IOPB_DMA_CFG0
,
14502 START_CTL_EMFU
| READ_CMD_MRM
);
14505 * Microcode operating variables for WDTR, SDTR, and command tag
14506 * queuing will be set in AdvInquiryHandling() based on what a
14507 * device reports it is capable of in Inquiry byte 7.
14509 * If SCSI Bus Resets have been disabled, then directly set
14510 * SDTR and WDTR from the EEPROM configuration. This will allow
14511 * the BIOS and warm boot to work without a SCSI bus hang on
14512 * the Inquiry caused by host and target mismatched DTR values.
14513 * Without the SCSI Bus Reset, before an Inquiry a device can't
14514 * be assumed to be in Asynchronous, Narrow mode.
14516 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) == 0) {
14517 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
14518 asc_dvc
->wdtr_able
);
14519 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
14520 asc_dvc
->sdtr_able
);
14524 * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2,
14525 * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID
14526 * bitmask. These values determine the maximum SDTR speed negotiated
14529 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
14530 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
14531 * without determining here whether the device supports SDTR.
14533 * 4-bit speed SDTR speed name
14534 * =========== ===============
14535 * 0000b (0x0) SDTR disabled
14536 * 0001b (0x1) 5 Mhz
14537 * 0010b (0x2) 10 Mhz
14538 * 0011b (0x3) 20 Mhz (Ultra)
14539 * 0100b (0x4) 40 Mhz (LVD/Ultra2)
14540 * 0101b (0x5) 80 Mhz (LVD2/Ultra3)
14541 * 0110b (0x6) Undefined
14543 * 1111b (0xF) Undefined
14546 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14547 if (ADV_TID_TO_TIDMASK(tid
) & asc_dvc
->ultra_able
) {
14548 /* Set Ultra speed for TID 'tid'. */
14549 word
|= (0x3 << (4 * (tid
% 4)));
14551 /* Set Fast speed for TID 'tid'. */
14552 word
|= (0x2 << (4 * (tid
% 4)));
14554 if (tid
== 3) { /* Check if done with sdtr_speed1. */
14555 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED1
, word
);
14557 } else if (tid
== 7) { /* Check if done with sdtr_speed2. */
14558 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED2
, word
);
14560 } else if (tid
== 11) { /* Check if done with sdtr_speed3. */
14561 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED3
, word
);
14563 } else if (tid
== 15) { /* Check if done with sdtr_speed4. */
14564 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED4
, word
);
14570 * Set microcode operating variable for the disconnect per TID bitmask.
14572 AdvWriteWordLram(iop_base
, ASC_MC_DISC_ENABLE
,
14573 asc_dvc
->cfg
->disc_enable
);
14576 * Set SCSI_CFG0 Microcode Default Value.
14578 * The microcode will set the SCSI_CFG0 register using this value
14579 * after it is started below.
14581 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG0
,
14582 PARITY_EN
| QUEUE_128
| SEL_TMO_LONG
| OUR_ID_EN
|
14583 asc_dvc
->chip_scsi_id
);
14586 * Determine SCSI_CFG1 Microcode Default Value.
14588 * The microcode will set the SCSI_CFG1 register using this value
14589 * after it is started below.
14592 /* Read current SCSI_CFG1 Register value. */
14593 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
14596 * If all three connectors are in use, return an error.
14598 if ((scsi_cfg1
& CABLE_ILLEGAL_A
) == 0 ||
14599 (scsi_cfg1
& CABLE_ILLEGAL_B
) == 0) {
14600 asc_dvc
->err_code
|= ASC_IERR_ILLEGAL_CONNECTION
;
14605 * If the internal narrow cable is reversed all of the SCSI_CTRL
14606 * register signals will be set. Check for and return an error if
14607 * this condition is found.
14609 if ((AdvReadWordRegister(iop_base
, IOPW_SCSI_CTRL
) & 0x3F07) == 0x3F07) {
14610 asc_dvc
->err_code
|= ASC_IERR_REVERSED_CABLE
;
14615 * If this is a differential board and a single-ended device
14616 * is attached to one of the connectors, return an error.
14618 if ((scsi_cfg1
& DIFF_MODE
) && (scsi_cfg1
& DIFF_SENSE
) == 0) {
14619 asc_dvc
->err_code
|= ASC_IERR_SINGLE_END_DEVICE
;
14624 * If automatic termination control is enabled, then set the
14625 * termination value based on a table listed in a_condor.h.
14627 * If manual termination was specified with an EEPROM setting
14628 * then 'termination' was set-up in AdvInitFrom3550EEPROM() and
14629 * is ready to be 'ored' into SCSI_CFG1.
14631 if (asc_dvc
->cfg
->termination
== 0) {
14633 * The software always controls termination by setting TERM_CTL_SEL.
14634 * If TERM_CTL_SEL were set to 0, the hardware would set termination.
14636 asc_dvc
->cfg
->termination
|= TERM_CTL_SEL
;
14638 switch (scsi_cfg1
& CABLE_DETECT
) {
14639 /* TERM_CTL_H: on, TERM_CTL_L: on */
14646 asc_dvc
->cfg
->termination
|= (TERM_CTL_H
| TERM_CTL_L
);
14649 /* TERM_CTL_H: on, TERM_CTL_L: off */
14655 asc_dvc
->cfg
->termination
|= TERM_CTL_H
;
14658 /* TERM_CTL_H: off, TERM_CTL_L: off */
14666 * Clear any set TERM_CTL_H and TERM_CTL_L bits.
14668 scsi_cfg1
&= ~TERM_CTL
;
14671 * Invert the TERM_CTL_H and TERM_CTL_L bits and then
14672 * set 'scsi_cfg1'. The TERM_POL bit does not need to be
14673 * referenced, because the hardware internally inverts
14674 * the Termination High and Low bits if TERM_POL is set.
14676 scsi_cfg1
|= (TERM_CTL_SEL
| (~asc_dvc
->cfg
->termination
& TERM_CTL
));
14679 * Set SCSI_CFG1 Microcode Default Value
14681 * Set filter value and possibly modified termination control
14682 * bits in the Microcode SCSI_CFG1 Register Value.
14684 * The microcode will set the SCSI_CFG1 register using this value
14685 * after it is started below.
14687 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG1
,
14688 FLTR_DISABLE
| scsi_cfg1
);
14691 * Set MEM_CFG Microcode Default Value
14693 * The microcode will set the MEM_CFG register using this value
14694 * after it is started below.
14696 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
14699 * ASC-3550 has 8KB internal memory.
14701 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_MEM_CFG
,
14702 BIOS_EN
| RAM_SZ_8KB
);
14705 * Set SEL_MASK Microcode Default Value
14707 * The microcode will set the SEL_MASK register using this value
14708 * after it is started below.
14710 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SEL_MASK
,
14711 ADV_TID_TO_TIDMASK(asc_dvc
->chip_scsi_id
));
14714 * Build carrier freelist.
14716 * Driver must have already allocated memory and set 'carrier_buf'.
14718 ASC_ASSERT(asc_dvc
->carrier_buf
!= NULL
);
14720 carrp
= (ADV_CARR_T
*) ADV_16BALIGN(asc_dvc
->carrier_buf
);
14721 asc_dvc
->carr_freelist
= NULL
;
14722 if (carrp
== (ADV_CARR_T
*) asc_dvc
->carrier_buf
) {
14723 buf_size
= ADV_CARRIER_BUFSIZE
;
14725 buf_size
= ADV_CARRIER_BUFSIZE
- sizeof(ADV_CARR_T
);
14730 * Get physical address of the carrier 'carrp'.
14732 contig_len
= sizeof(ADV_CARR_T
);
14734 cpu_to_le32(DvcGetPhyAddr
14735 (asc_dvc
, NULL
, (uchar
*)carrp
,
14736 (ADV_SDCNT
*)&contig_len
,
14737 ADV_IS_CARRIER_FLAG
));
14739 buf_size
-= sizeof(ADV_CARR_T
);
14742 * If the current carrier is not physically contiguous, then
14743 * maybe there was a page crossing. Try the next carrier aligned
14746 if (contig_len
< sizeof(ADV_CARR_T
)) {
14751 carrp
->carr_pa
= carr_paddr
;
14752 carrp
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(carrp
));
14755 * Insert the carrier at the beginning of the freelist.
14758 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
14759 asc_dvc
->carr_freelist
= carrp
;
14763 while (buf_size
> 0);
14766 * Set-up the Host->RISC Initiator Command Queue (ICQ).
14769 if ((asc_dvc
->icq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
14770 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
14773 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
14774 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->icq_sp
->next_vpa
));
14777 * The first command issued will be placed in the stopper carrier.
14779 asc_dvc
->icq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
14782 * Set RISC ICQ physical address start value.
14784 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_ICQ
, asc_dvc
->icq_sp
->carr_pa
);
14787 * Set-up the RISC->Host Initiator Response Queue (IRQ).
14789 if ((asc_dvc
->irq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
14790 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
14793 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
14794 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
));
14797 * The first command completed by the RISC will be placed in
14800 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
14801 * completed the RISC will set the ASC_RQ_STOPPER bit.
14803 asc_dvc
->irq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
14806 * Set RISC IRQ physical address start value.
14808 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IRQ
, asc_dvc
->irq_sp
->carr_pa
);
14809 asc_dvc
->carr_pending_cnt
= 0;
14811 AdvWriteByteRegister(iop_base
, IOPB_INTR_ENABLES
,
14812 (ADV_INTR_ENABLE_HOST_INTR
|
14813 ADV_INTR_ENABLE_GLOBAL_INTR
));
14815 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, word
);
14816 AdvWriteWordRegister(iop_base
, IOPW_PC
, word
);
14818 /* finally, finally, gentlemen, start your engine */
14819 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_RUN
);
14822 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
14823 * Resets should be performed. The RISC has to be running
14824 * to issue a SCSI Bus Reset.
14826 if (asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) {
14828 * If the BIOS Signature is present in memory, restore the
14829 * BIOS Handshake Configuration Table and do not perform
14830 * a SCSI Bus Reset.
14832 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] ==
14835 * Restore per TID negotiated values.
14837 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
14838 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
14839 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
14841 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14842 AdvWriteByteLram(iop_base
,
14843 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
14847 if (AdvResetSB(asc_dvc
) != ADV_TRUE
) {
14848 warn_code
= ASC_WARN_BUSRESET_ERROR
;
14857 * Initialize the ASC-38C0800.
14859 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
14861 * For a non-fatal error return a warning code. If there are no warnings
14862 * then 0 is returned.
14864 * Needed after initialization for error recovery.
14866 static int AdvInitAsc38C0800Driver(ADV_DVC_VAR
*asc_dvc
)
14868 AdvPortAddr iop_base
;
14876 int adv_asc38C0800_expanded_size
;
14878 ADV_DCNT contig_len
;
14879 ADV_SDCNT buf_size
;
14880 ADV_PADDR carr_paddr
;
14885 ushort bios_mem
[ASC_MC_BIOSLEN
/ 2]; /* BIOS RISC Memory 0x40-0x8F. */
14886 ushort wdtr_able
, sdtr_able
, tagqng_able
;
14887 uchar max_cmd
[ADV_MAX_TID
+ 1];
14889 /* If there is already an error, don't continue. */
14890 if (asc_dvc
->err_code
!= 0) {
14895 * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800.
14897 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC38C0800
) {
14898 asc_dvc
->err_code
= ASC_IERR_BAD_CHIPTYPE
;
14903 iop_base
= asc_dvc
->iop_base
;
14906 * Save the RISC memory BIOS region before writing the microcode.
14907 * The BIOS may already be loaded and using its RISC LRAM region
14908 * so its region must be saved and restored.
14910 * Note: This code makes the assumption, which is currently true,
14911 * that a chip reset does not clear RISC LRAM.
14913 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
14914 AdvReadWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
14919 * Save current per TID negotiated values.
14921 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
14922 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
14923 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
14924 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14925 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
14930 * RAM BIST (RAM Built-In Self Test)
14932 * Address : I/O base + offset 0x38h register (byte).
14933 * Function: Bit 7-6(RW) : RAM mode
14934 * Normal Mode : 0x00
14935 * Pre-test Mode : 0x40
14936 * RAM Test Mode : 0x80
14938 * Bit 4(RO) : Done bit
14939 * Bit 3-0(RO) : Status
14940 * Host Error : 0x08
14941 * Int_RAM Error : 0x04
14942 * RISC Error : 0x02
14943 * SCSI Error : 0x01
14946 * Note: RAM BIST code should be put right here, before loading the
14947 * microcode and after saving the RISC memory BIOS region.
14953 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
14954 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
14955 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
14956 * to NORMAL_MODE, return an error too.
14958 for (i
= 0; i
< 2; i
++) {
14959 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, PRE_TEST_MODE
);
14960 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
14961 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
14962 if ((byte
& RAM_TEST_DONE
) == 0
14963 || (byte
& 0x0F) != PRE_TEST_VALUE
) {
14964 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
14968 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
14969 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
14970 if (AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
)
14972 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
14978 * LRAM Test - It takes about 1.5 ms to run through the test.
14980 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
14981 * If Done bit not set or Status not 0, save register byte, set the
14982 * err_code, and return an error.
14984 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, RAM_TEST_MODE
);
14985 DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */
14987 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
14988 if ((byte
& RAM_TEST_DONE
) == 0 || (byte
& RAM_TEST_STATUS
) != 0) {
14989 /* Get here if Done bit not set or Status not 0. */
14990 asc_dvc
->bist_err_code
= byte
; /* for BIOS display message */
14991 asc_dvc
->err_code
|= ASC_IERR_BIST_RAM_TEST
;
14995 /* We need to reset back to normal mode after LRAM test passes. */
14996 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
14999 * Load the Microcode
15001 * Write the microcode image to RISC memory starting at address 0.
15004 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
15006 /* Assume the following compressed format of the microcode buffer:
15008 * 254 word (508 byte) table indexed by byte code followed
15009 * by the following byte codes:
15012 * 00: Emit word 0 in table.
15013 * 01: Emit word 1 in table.
15015 * FD: Emit word 253 in table.
15018 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
15019 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
15022 for (i
= 253 * 2; i
< _adv_asc38C0800_size
; i
++) {
15023 if (_adv_asc38C0800_buf
[i
] == 0xff) {
15024 for (j
= 0; j
< _adv_asc38C0800_buf
[i
+ 1]; j
++) {
15025 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15026 _adv_asc38C0800_buf
15029 _adv_asc38C0800_buf
15034 } else if (_adv_asc38C0800_buf
[i
] == 0xfe) {
15035 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15036 _adv_asc38C0800_buf
15039 _adv_asc38C0800_buf
[i
15045 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15046 _adv_asc38C0800_buf
[(_adv_asc38C0800_buf
[i
] * 2) + 1] << 8) | _adv_asc38C0800_buf
[_adv_asc38C0800_buf
[i
] * 2]));
15052 * Set 'word' for later use to clear the rest of memory and save
15053 * the expanded mcode size.
15056 adv_asc38C0800_expanded_size
= word
;
15059 * Clear the rest of ASC-38C0800 Internal RAM (16KB).
15061 for (; word
< ADV_38C0800_MEMSIZE
; word
+= 2) {
15062 AdvWriteWordAutoIncLram(iop_base
, 0);
15066 * Verify the microcode checksum.
15069 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
15071 for (word
= 0; word
< adv_asc38C0800_expanded_size
; word
+= 2) {
15072 sum
+= AdvReadWordAutoIncLram(iop_base
);
15074 ASC_DBG2(1, "AdvInitAsc38C0800Driver: word %d, i %d\n", word
, i
);
15077 "AdvInitAsc38C0800Driver: sum 0x%lx, _adv_asc38C0800_chksum 0x%lx\n",
15078 (ulong
)sum
, (ulong
)_adv_asc38C0800_chksum
);
15080 if (sum
!= _adv_asc38C0800_chksum
) {
15081 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
15086 * Restore the RISC memory BIOS region.
15088 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
15089 AdvWriteWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
15094 * Calculate and write the microcode code checksum to the microcode
15095 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
15097 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, begin_addr
);
15098 AdvReadWordLram(iop_base
, ASC_MC_CODE_END_ADDR
, end_addr
);
15100 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, begin_addr
);
15101 for (word
= begin_addr
; word
< end_addr
; word
+= 2) {
15102 code_sum
+= AdvReadWordAutoIncLram(iop_base
);
15104 AdvWriteWordLram(iop_base
, ASC_MC_CODE_CHK_SUM
, code_sum
);
15107 * Read microcode version and date.
15109 AdvReadWordLram(iop_base
, ASC_MC_VERSION_DATE
,
15110 asc_dvc
->cfg
->mcode_date
);
15111 AdvReadWordLram(iop_base
, ASC_MC_VERSION_NUM
,
15112 asc_dvc
->cfg
->mcode_version
);
15115 * Set the chip type to indicate the ASC38C0800.
15117 AdvWriteWordLram(iop_base
, ASC_MC_CHIP_TYPE
, ADV_CHIP_ASC38C0800
);
15120 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
15121 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
15122 * cable detection and then we are able to read C_DET[3:0].
15124 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
15125 * Microcode Default Value' section below.
15127 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15128 AdvWriteWordRegister(iop_base
, IOPW_SCSI_CFG1
,
15129 scsi_cfg1
| DIS_TERM_DRV
);
15132 * If the PCI Configuration Command Register "Parity Error Response
15133 * Control" Bit was clear (0), then set the microcode variable
15134 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
15135 * to ignore DMA parity errors.
15137 if (asc_dvc
->cfg
->control_flag
& CONTROL_FLAG_IGNORE_PERR
) {
15138 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15139 word
|= CONTROL_FLAG_IGNORE_PERR
;
15140 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15144 * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2]
15145 * bits for the default FIFO threshold.
15147 * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes.
15149 * For DMA Errata #4 set the BC_THRESH_ENB bit.
15151 AdvWriteByteRegister(iop_base
, IOPB_DMA_CFG0
,
15152 BC_THRESH_ENB
| FIFO_THRESH_80B
| START_CTL_TH
|
15156 * Microcode operating variables for WDTR, SDTR, and command tag
15157 * queuing will be set in AdvInquiryHandling() based on what a
15158 * device reports it is capable of in Inquiry byte 7.
15160 * If SCSI Bus Resets have been disabled, then directly set
15161 * SDTR and WDTR from the EEPROM configuration. This will allow
15162 * the BIOS and warm boot to work without a SCSI bus hang on
15163 * the Inquiry caused by host and target mismatched DTR values.
15164 * Without the SCSI Bus Reset, before an Inquiry a device can't
15165 * be assumed to be in Asynchronous, Narrow mode.
15167 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) == 0) {
15168 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
15169 asc_dvc
->wdtr_able
);
15170 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
15171 asc_dvc
->sdtr_able
);
15175 * Set microcode operating variables for DISC and SDTR_SPEED1,
15176 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
15177 * configuration values.
15179 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
15180 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
15181 * without determining here whether the device supports SDTR.
15183 AdvWriteWordLram(iop_base
, ASC_MC_DISC_ENABLE
,
15184 asc_dvc
->cfg
->disc_enable
);
15185 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED1
, asc_dvc
->sdtr_speed1
);
15186 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED2
, asc_dvc
->sdtr_speed2
);
15187 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED3
, asc_dvc
->sdtr_speed3
);
15188 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED4
, asc_dvc
->sdtr_speed4
);
15191 * Set SCSI_CFG0 Microcode Default Value.
15193 * The microcode will set the SCSI_CFG0 register using this value
15194 * after it is started below.
15196 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG0
,
15197 PARITY_EN
| QUEUE_128
| SEL_TMO_LONG
| OUR_ID_EN
|
15198 asc_dvc
->chip_scsi_id
);
15201 * Determine SCSI_CFG1 Microcode Default Value.
15203 * The microcode will set the SCSI_CFG1 register using this value
15204 * after it is started below.
15207 /* Read current SCSI_CFG1 Register value. */
15208 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15211 * If the internal narrow cable is reversed all of the SCSI_CTRL
15212 * register signals will be set. Check for and return an error if
15213 * this condition is found.
15215 if ((AdvReadWordRegister(iop_base
, IOPW_SCSI_CTRL
) & 0x3F07) == 0x3F07) {
15216 asc_dvc
->err_code
|= ASC_IERR_REVERSED_CABLE
;
15221 * All kind of combinations of devices attached to one of four connectors
15222 * are acceptable except HVD device attached. For example, LVD device can
15223 * be attached to SE connector while SE device attached to LVD connector.
15224 * If LVD device attached to SE connector, it only runs up to Ultra speed.
15226 * If an HVD device is attached to one of LVD connectors, return an error.
15227 * However, there is no way to detect HVD device attached to SE connectors.
15229 if (scsi_cfg1
& HVD
) {
15230 asc_dvc
->err_code
|= ASC_IERR_HVD_DEVICE
;
15235 * If either SE or LVD automatic termination control is enabled, then
15236 * set the termination value based on a table listed in a_condor.h.
15238 * If manual termination was specified with an EEPROM setting then
15239 * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready to
15240 * be 'ored' into SCSI_CFG1.
15242 if ((asc_dvc
->cfg
->termination
& TERM_SE
) == 0) {
15243 /* SE automatic termination control is enabled. */
15244 switch (scsi_cfg1
& C_DET_SE
) {
15245 /* TERM_SE_HI: on, TERM_SE_LO: on */
15249 asc_dvc
->cfg
->termination
|= TERM_SE
;
15252 /* TERM_SE_HI: on, TERM_SE_LO: off */
15254 asc_dvc
->cfg
->termination
|= TERM_SE_HI
;
15259 if ((asc_dvc
->cfg
->termination
& TERM_LVD
) == 0) {
15260 /* LVD automatic termination control is enabled. */
15261 switch (scsi_cfg1
& C_DET_LVD
) {
15262 /* TERM_LVD_HI: on, TERM_LVD_LO: on */
15266 asc_dvc
->cfg
->termination
|= TERM_LVD
;
15269 /* TERM_LVD_HI: off, TERM_LVD_LO: off */
15276 * Clear any set TERM_SE and TERM_LVD bits.
15278 scsi_cfg1
&= (~TERM_SE
& ~TERM_LVD
);
15281 * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'.
15283 scsi_cfg1
|= (~asc_dvc
->cfg
->termination
& 0xF0);
15286 * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE bits
15287 * and set possibly modified termination control bits in the Microcode
15288 * SCSI_CFG1 Register Value.
15290 scsi_cfg1
&= (~BIG_ENDIAN
& ~DIS_TERM_DRV
& ~TERM_POL
& ~HVD_LVD_SE
);
15293 * Set SCSI_CFG1 Microcode Default Value
15295 * Set possibly modified termination control and reset DIS_TERM_DRV
15296 * bits in the Microcode SCSI_CFG1 Register Value.
15298 * The microcode will set the SCSI_CFG1 register using this value
15299 * after it is started below.
15301 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG1
, scsi_cfg1
);
15304 * Set MEM_CFG Microcode Default Value
15306 * The microcode will set the MEM_CFG register using this value
15307 * after it is started below.
15309 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
15312 * ASC-38C0800 has 16KB internal memory.
15314 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_MEM_CFG
,
15315 BIOS_EN
| RAM_SZ_16KB
);
15318 * Set SEL_MASK Microcode Default Value
15320 * The microcode will set the SEL_MASK register using this value
15321 * after it is started below.
15323 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SEL_MASK
,
15324 ADV_TID_TO_TIDMASK(asc_dvc
->chip_scsi_id
));
15327 * Build the carrier freelist.
15329 * Driver must have already allocated memory and set 'carrier_buf'.
15331 ASC_ASSERT(asc_dvc
->carrier_buf
!= NULL
);
15333 carrp
= (ADV_CARR_T
*) ADV_16BALIGN(asc_dvc
->carrier_buf
);
15334 asc_dvc
->carr_freelist
= NULL
;
15335 if (carrp
== (ADV_CARR_T
*) asc_dvc
->carrier_buf
) {
15336 buf_size
= ADV_CARRIER_BUFSIZE
;
15338 buf_size
= ADV_CARRIER_BUFSIZE
- sizeof(ADV_CARR_T
);
15343 * Get physical address for the carrier 'carrp'.
15345 contig_len
= sizeof(ADV_CARR_T
);
15347 cpu_to_le32(DvcGetPhyAddr
15348 (asc_dvc
, NULL
, (uchar
*)carrp
,
15349 (ADV_SDCNT
*)&contig_len
,
15350 ADV_IS_CARRIER_FLAG
));
15352 buf_size
-= sizeof(ADV_CARR_T
);
15355 * If the current carrier is not physically contiguous, then
15356 * maybe there was a page crossing. Try the next carrier aligned
15359 if (contig_len
< sizeof(ADV_CARR_T
)) {
15364 carrp
->carr_pa
= carr_paddr
;
15365 carrp
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(carrp
));
15368 * Insert the carrier at the beginning of the freelist.
15371 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
15372 asc_dvc
->carr_freelist
= carrp
;
15376 while (buf_size
> 0);
15379 * Set-up the Host->RISC Initiator Command Queue (ICQ).
15382 if ((asc_dvc
->icq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
15383 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
15386 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
15387 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->icq_sp
->next_vpa
));
15390 * The first command issued will be placed in the stopper carrier.
15392 asc_dvc
->icq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
15395 * Set RISC ICQ physical address start value.
15396 * carr_pa is LE, must be native before write
15398 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_ICQ
, asc_dvc
->icq_sp
->carr_pa
);
15401 * Set-up the RISC->Host Initiator Response Queue (IRQ).
15403 if ((asc_dvc
->irq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
15404 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
15407 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
15408 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
));
15411 * The first command completed by the RISC will be placed in
15414 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
15415 * completed the RISC will set the ASC_RQ_STOPPER bit.
15417 asc_dvc
->irq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
15420 * Set RISC IRQ physical address start value.
15422 * carr_pa is LE, must be native before write *
15424 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IRQ
, asc_dvc
->irq_sp
->carr_pa
);
15425 asc_dvc
->carr_pending_cnt
= 0;
15427 AdvWriteByteRegister(iop_base
, IOPB_INTR_ENABLES
,
15428 (ADV_INTR_ENABLE_HOST_INTR
|
15429 ADV_INTR_ENABLE_GLOBAL_INTR
));
15431 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, word
);
15432 AdvWriteWordRegister(iop_base
, IOPW_PC
, word
);
15434 /* finally, finally, gentlemen, start your engine */
15435 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_RUN
);
15438 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
15439 * Resets should be performed. The RISC has to be running
15440 * to issue a SCSI Bus Reset.
15442 if (asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) {
15444 * If the BIOS Signature is present in memory, restore the
15445 * BIOS Handshake Configuration Table and do not perform
15446 * a SCSI Bus Reset.
15448 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] ==
15451 * Restore per TID negotiated values.
15453 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
15454 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
15455 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
15457 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
15458 AdvWriteByteLram(iop_base
,
15459 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
15463 if (AdvResetSB(asc_dvc
) != ADV_TRUE
) {
15464 warn_code
= ASC_WARN_BUSRESET_ERROR
;
15473 * Initialize the ASC-38C1600.
15475 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
15477 * For a non-fatal error return a warning code. If there are no warnings
15478 * then 0 is returned.
15480 * Needed after initialization for error recovery.
15482 static int AdvInitAsc38C1600Driver(ADV_DVC_VAR
*asc_dvc
)
15484 AdvPortAddr iop_base
;
15492 int adv_asc38C1600_expanded_size
;
15494 ADV_DCNT contig_len
;
15495 ADV_SDCNT buf_size
;
15496 ADV_PADDR carr_paddr
;
15501 ushort bios_mem
[ASC_MC_BIOSLEN
/ 2]; /* BIOS RISC Memory 0x40-0x8F. */
15502 ushort wdtr_able
, sdtr_able
, ppr_able
, tagqng_able
;
15503 uchar max_cmd
[ASC_MAX_TID
+ 1];
15505 /* If there is already an error, don't continue. */
15506 if (asc_dvc
->err_code
!= 0) {
15511 * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600.
15513 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC38C1600
) {
15514 asc_dvc
->err_code
= ASC_IERR_BAD_CHIPTYPE
;
15519 iop_base
= asc_dvc
->iop_base
;
15522 * Save the RISC memory BIOS region before writing the microcode.
15523 * The BIOS may already be loaded and using its RISC LRAM region
15524 * so its region must be saved and restored.
15526 * Note: This code makes the assumption, which is currently true,
15527 * that a chip reset does not clear RISC LRAM.
15529 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
15530 AdvReadWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
15535 * Save current per TID negotiated values.
15537 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
15538 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
15539 AdvReadWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
15540 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
15541 for (tid
= 0; tid
<= ASC_MAX_TID
; tid
++) {
15542 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
15547 * RAM BIST (Built-In Self Test)
15549 * Address : I/O base + offset 0x38h register (byte).
15550 * Function: Bit 7-6(RW) : RAM mode
15551 * Normal Mode : 0x00
15552 * Pre-test Mode : 0x40
15553 * RAM Test Mode : 0x80
15555 * Bit 4(RO) : Done bit
15556 * Bit 3-0(RO) : Status
15557 * Host Error : 0x08
15558 * Int_RAM Error : 0x04
15559 * RISC Error : 0x02
15560 * SCSI Error : 0x01
15563 * Note: RAM BIST code should be put right here, before loading the
15564 * microcode and after saving the RISC memory BIOS region.
15570 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
15571 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
15572 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
15573 * to NORMAL_MODE, return an error too.
15575 for (i
= 0; i
< 2; i
++) {
15576 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, PRE_TEST_MODE
);
15577 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
15578 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
15579 if ((byte
& RAM_TEST_DONE
) == 0
15580 || (byte
& 0x0F) != PRE_TEST_VALUE
) {
15581 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
15585 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
15586 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
15587 if (AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
)
15589 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
15595 * LRAM Test - It takes about 1.5 ms to run through the test.
15597 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
15598 * If Done bit not set or Status not 0, save register byte, set the
15599 * err_code, and return an error.
15601 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, RAM_TEST_MODE
);
15602 DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */
15604 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
15605 if ((byte
& RAM_TEST_DONE
) == 0 || (byte
& RAM_TEST_STATUS
) != 0) {
15606 /* Get here if Done bit not set or Status not 0. */
15607 asc_dvc
->bist_err_code
= byte
; /* for BIOS display message */
15608 asc_dvc
->err_code
|= ASC_IERR_BIST_RAM_TEST
;
15612 /* We need to reset back to normal mode after LRAM test passes. */
15613 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
15616 * Load the Microcode
15618 * Write the microcode image to RISC memory starting at address 0.
15621 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
15624 * Assume the following compressed format of the microcode buffer:
15626 * 254 word (508 byte) table indexed by byte code followed
15627 * by the following byte codes:
15630 * 00: Emit word 0 in table.
15631 * 01: Emit word 1 in table.
15633 * FD: Emit word 253 in table.
15636 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
15637 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
15640 for (i
= 253 * 2; i
< _adv_asc38C1600_size
; i
++) {
15641 if (_adv_asc38C1600_buf
[i
] == 0xff) {
15642 for (j
= 0; j
< _adv_asc38C1600_buf
[i
+ 1]; j
++) {
15643 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15644 _adv_asc38C1600_buf
15647 _adv_asc38C1600_buf
15652 } else if (_adv_asc38C1600_buf
[i
] == 0xfe) {
15653 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15654 _adv_asc38C1600_buf
15657 _adv_asc38C1600_buf
[i
15663 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15664 _adv_asc38C1600_buf
[(_adv_asc38C1600_buf
[i
] * 2) + 1] << 8) | _adv_asc38C1600_buf
[_adv_asc38C1600_buf
[i
] * 2]));
15670 * Set 'word' for later use to clear the rest of memory and save
15671 * the expanded mcode size.
15674 adv_asc38C1600_expanded_size
= word
;
15677 * Clear the rest of ASC-38C1600 Internal RAM (32KB).
15679 for (; word
< ADV_38C1600_MEMSIZE
; word
+= 2) {
15680 AdvWriteWordAutoIncLram(iop_base
, 0);
15684 * Verify the microcode checksum.
15687 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
15689 for (word
= 0; word
< adv_asc38C1600_expanded_size
; word
+= 2) {
15690 sum
+= AdvReadWordAutoIncLram(iop_base
);
15693 if (sum
!= _adv_asc38C1600_chksum
) {
15694 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
15699 * Restore the RISC memory BIOS region.
15701 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
15702 AdvWriteWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
15707 * Calculate and write the microcode code checksum to the microcode
15708 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
15710 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, begin_addr
);
15711 AdvReadWordLram(iop_base
, ASC_MC_CODE_END_ADDR
, end_addr
);
15713 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, begin_addr
);
15714 for (word
= begin_addr
; word
< end_addr
; word
+= 2) {
15715 code_sum
+= AdvReadWordAutoIncLram(iop_base
);
15717 AdvWriteWordLram(iop_base
, ASC_MC_CODE_CHK_SUM
, code_sum
);
15720 * Read microcode version and date.
15722 AdvReadWordLram(iop_base
, ASC_MC_VERSION_DATE
,
15723 asc_dvc
->cfg
->mcode_date
);
15724 AdvReadWordLram(iop_base
, ASC_MC_VERSION_NUM
,
15725 asc_dvc
->cfg
->mcode_version
);
15728 * Set the chip type to indicate the ASC38C1600.
15730 AdvWriteWordLram(iop_base
, ASC_MC_CHIP_TYPE
, ADV_CHIP_ASC38C1600
);
15733 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
15734 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
15735 * cable detection and then we are able to read C_DET[3:0].
15737 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
15738 * Microcode Default Value' section below.
15740 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15741 AdvWriteWordRegister(iop_base
, IOPW_SCSI_CFG1
,
15742 scsi_cfg1
| DIS_TERM_DRV
);
15745 * If the PCI Configuration Command Register "Parity Error Response
15746 * Control" Bit was clear (0), then set the microcode variable
15747 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
15748 * to ignore DMA parity errors.
15750 if (asc_dvc
->cfg
->control_flag
& CONTROL_FLAG_IGNORE_PERR
) {
15751 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15752 word
|= CONTROL_FLAG_IGNORE_PERR
;
15753 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15757 * If the BIOS control flag AIPP (Asynchronous Information
15758 * Phase Protection) disable bit is not set, then set the firmware
15759 * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable
15760 * AIPP checking and encoding.
15762 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_AIPP_DIS
) == 0) {
15763 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15764 word
|= CONTROL_FLAG_ENABLE_AIPP
;
15765 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15769 * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4],
15770 * and START_CTL_TH [3:2].
15772 AdvWriteByteRegister(iop_base
, IOPB_DMA_CFG0
,
15773 FIFO_THRESH_80B
| START_CTL_TH
| READ_CMD_MRM
);
15776 * Microcode operating variables for WDTR, SDTR, and command tag
15777 * queuing will be set in AdvInquiryHandling() based on what a
15778 * device reports it is capable of in Inquiry byte 7.
15780 * If SCSI Bus Resets have been disabled, then directly set
15781 * SDTR and WDTR from the EEPROM configuration. This will allow
15782 * the BIOS and warm boot to work without a SCSI bus hang on
15783 * the Inquiry caused by host and target mismatched DTR values.
15784 * Without the SCSI Bus Reset, before an Inquiry a device can't
15785 * be assumed to be in Asynchronous, Narrow mode.
15787 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) == 0) {
15788 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
15789 asc_dvc
->wdtr_able
);
15790 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
15791 asc_dvc
->sdtr_able
);
15795 * Set microcode operating variables for DISC and SDTR_SPEED1,
15796 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
15797 * configuration values.
15799 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
15800 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
15801 * without determining here whether the device supports SDTR.
15803 AdvWriteWordLram(iop_base
, ASC_MC_DISC_ENABLE
,
15804 asc_dvc
->cfg
->disc_enable
);
15805 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED1
, asc_dvc
->sdtr_speed1
);
15806 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED2
, asc_dvc
->sdtr_speed2
);
15807 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED3
, asc_dvc
->sdtr_speed3
);
15808 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED4
, asc_dvc
->sdtr_speed4
);
15811 * Set SCSI_CFG0 Microcode Default Value.
15813 * The microcode will set the SCSI_CFG0 register using this value
15814 * after it is started below.
15816 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG0
,
15817 PARITY_EN
| QUEUE_128
| SEL_TMO_LONG
| OUR_ID_EN
|
15818 asc_dvc
->chip_scsi_id
);
15821 * Calculate SCSI_CFG1 Microcode Default Value.
15823 * The microcode will set the SCSI_CFG1 register using this value
15824 * after it is started below.
15826 * Each ASC-38C1600 function has only two cable detect bits.
15827 * The bus mode override bits are in IOPB_SOFT_OVER_WR.
15829 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15832 * If the cable is reversed all of the SCSI_CTRL register signals
15833 * will be set. Check for and return an error if this condition is
15836 if ((AdvReadWordRegister(iop_base
, IOPW_SCSI_CTRL
) & 0x3F07) == 0x3F07) {
15837 asc_dvc
->err_code
|= ASC_IERR_REVERSED_CABLE
;
15842 * Each ASC-38C1600 function has two connectors. Only an HVD device
15843 * can not be connected to either connector. An LVD device or SE device
15844 * may be connected to either connecor. If an SE device is connected,
15845 * then at most Ultra speed (20 Mhz) can be used on both connectors.
15847 * If an HVD device is attached, return an error.
15849 if (scsi_cfg1
& HVD
) {
15850 asc_dvc
->err_code
|= ASC_IERR_HVD_DEVICE
;
15855 * Each function in the ASC-38C1600 uses only the SE cable detect and
15856 * termination because there are two connectors for each function. Each
15857 * function may use either LVD or SE mode. Corresponding the SE automatic
15858 * termination control EEPROM bits are used for each function. Each
15859 * function has its own EEPROM. If SE automatic control is enabled for
15860 * the function, then set the termination value based on a table listed
15863 * If manual termination is specified in the EEPROM for the function,
15864 * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is
15865 * ready to be 'ored' into SCSI_CFG1.
15867 if ((asc_dvc
->cfg
->termination
& TERM_SE
) == 0) {
15868 /* SE automatic termination control is enabled. */
15869 switch (scsi_cfg1
& C_DET_SE
) {
15870 /* TERM_SE_HI: on, TERM_SE_LO: on */
15874 asc_dvc
->cfg
->termination
|= TERM_SE
;
15878 if (ASC_PCI_ID2FUNC(asc_dvc
->cfg
->pci_slot_info
) == 0) {
15879 /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */
15881 /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */
15882 asc_dvc
->cfg
->termination
|= TERM_SE_HI
;
15889 * Clear any set TERM_SE bits.
15891 scsi_cfg1
&= ~TERM_SE
;
15894 * Invert the TERM_SE bits and then set 'scsi_cfg1'.
15896 scsi_cfg1
|= (~asc_dvc
->cfg
->termination
& TERM_SE
);
15899 * Clear Big Endian and Terminator Polarity bits and set possibly
15900 * modified termination control bits in the Microcode SCSI_CFG1
15903 * Big Endian bit is not used even on big endian machines.
15905 scsi_cfg1
&= (~BIG_ENDIAN
& ~DIS_TERM_DRV
& ~TERM_POL
);
15908 * Set SCSI_CFG1 Microcode Default Value
15910 * Set possibly modified termination control bits in the Microcode
15911 * SCSI_CFG1 Register Value.
15913 * The microcode will set the SCSI_CFG1 register using this value
15914 * after it is started below.
15916 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG1
, scsi_cfg1
);
15919 * Set MEM_CFG Microcode Default Value
15921 * The microcode will set the MEM_CFG register using this value
15922 * after it is started below.
15924 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
15927 * ASC-38C1600 has 32KB internal memory.
15929 * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come
15930 * out a special 16K Adv Library and Microcode version. After the issue
15931 * resolved, we should turn back to the 32K support. Both a_condor.h and
15932 * mcode.sas files also need to be updated.
15934 * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
15935 * BIOS_EN | RAM_SZ_32KB);
15937 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_MEM_CFG
,
15938 BIOS_EN
| RAM_SZ_16KB
);
15941 * Set SEL_MASK Microcode Default Value
15943 * The microcode will set the SEL_MASK register using this value
15944 * after it is started below.
15946 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SEL_MASK
,
15947 ADV_TID_TO_TIDMASK(asc_dvc
->chip_scsi_id
));
15950 * Build the carrier freelist.
15952 * Driver must have already allocated memory and set 'carrier_buf'.
15955 ASC_ASSERT(asc_dvc
->carrier_buf
!= NULL
);
15957 carrp
= (ADV_CARR_T
*) ADV_16BALIGN(asc_dvc
->carrier_buf
);
15958 asc_dvc
->carr_freelist
= NULL
;
15959 if (carrp
== (ADV_CARR_T
*) asc_dvc
->carrier_buf
) {
15960 buf_size
= ADV_CARRIER_BUFSIZE
;
15962 buf_size
= ADV_CARRIER_BUFSIZE
- sizeof(ADV_CARR_T
);
15967 * Get physical address for the carrier 'carrp'.
15969 contig_len
= sizeof(ADV_CARR_T
);
15971 cpu_to_le32(DvcGetPhyAddr
15972 (asc_dvc
, NULL
, (uchar
*)carrp
,
15973 (ADV_SDCNT
*)&contig_len
,
15974 ADV_IS_CARRIER_FLAG
));
15976 buf_size
-= sizeof(ADV_CARR_T
);
15979 * If the current carrier is not physically contiguous, then
15980 * maybe there was a page crossing. Try the next carrier aligned
15983 if (contig_len
< sizeof(ADV_CARR_T
)) {
15988 carrp
->carr_pa
= carr_paddr
;
15989 carrp
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(carrp
));
15992 * Insert the carrier at the beginning of the freelist.
15995 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
15996 asc_dvc
->carr_freelist
= carrp
;
16000 while (buf_size
> 0);
16003 * Set-up the Host->RISC Initiator Command Queue (ICQ).
16005 if ((asc_dvc
->icq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
16006 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
16009 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
16010 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->icq_sp
->next_vpa
));
16013 * The first command issued will be placed in the stopper carrier.
16015 asc_dvc
->icq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
16018 * Set RISC ICQ physical address start value. Initialize the
16019 * COMMA register to the same value otherwise the RISC will
16020 * prematurely detect a command is available.
16022 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_ICQ
, asc_dvc
->icq_sp
->carr_pa
);
16023 AdvWriteDWordRegister(iop_base
, IOPDW_COMMA
,
16024 le32_to_cpu(asc_dvc
->icq_sp
->carr_pa
));
16027 * Set-up the RISC->Host Initiator Response Queue (IRQ).
16029 if ((asc_dvc
->irq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
16030 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
16033 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
16034 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
));
16037 * The first command completed by the RISC will be placed in
16040 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
16041 * completed the RISC will set the ASC_RQ_STOPPER bit.
16043 asc_dvc
->irq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
16046 * Set RISC IRQ physical address start value.
16048 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IRQ
, asc_dvc
->irq_sp
->carr_pa
);
16049 asc_dvc
->carr_pending_cnt
= 0;
16051 AdvWriteByteRegister(iop_base
, IOPB_INTR_ENABLES
,
16052 (ADV_INTR_ENABLE_HOST_INTR
|
16053 ADV_INTR_ENABLE_GLOBAL_INTR
));
16054 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, word
);
16055 AdvWriteWordRegister(iop_base
, IOPW_PC
, word
);
16057 /* finally, finally, gentlemen, start your engine */
16058 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_RUN
);
16061 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
16062 * Resets should be performed. The RISC has to be running
16063 * to issue a SCSI Bus Reset.
16065 if (asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) {
16067 * If the BIOS Signature is present in memory, restore the
16068 * per TID microcode operating variables.
16070 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] ==
16073 * Restore per TID negotiated values.
16075 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
16076 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
16077 AdvWriteWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
16078 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
16080 for (tid
= 0; tid
<= ASC_MAX_TID
; tid
++) {
16081 AdvWriteByteLram(iop_base
,
16082 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
16086 if (AdvResetSB(asc_dvc
) != ADV_TRUE
) {
16087 warn_code
= ASC_WARN_BUSRESET_ERROR
;
16096 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
16097 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
16098 * all of this is done.
16100 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
16102 * For a non-fatal error return a warning code. If there are no warnings
16103 * then 0 is returned.
16105 * Note: Chip is stopped on entry.
16107 static int __init
AdvInitFrom3550EEP(ADV_DVC_VAR
*asc_dvc
)
16109 AdvPortAddr iop_base
;
16111 ADVEEP_3550_CONFIG eep_config
;
16114 iop_base
= asc_dvc
->iop_base
;
16119 * Read the board's EEPROM configuration.
16121 * Set default values if a bad checksum is found.
16123 if (AdvGet3550EEPConfig(iop_base
, &eep_config
) != eep_config
.check_sum
) {
16124 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
16127 * Set EEPROM default values.
16129 for (i
= 0; i
< sizeof(ADVEEP_3550_CONFIG
); i
++) {
16130 *((uchar
*)&eep_config
+ i
) =
16131 *((uchar
*)&Default_3550_EEPROM_Config
+ i
);
16135 * Assume the 6 byte board serial number that was read
16136 * from EEPROM is correct even if the EEPROM checksum
16139 eep_config
.serial_number_word3
=
16140 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 1);
16142 eep_config
.serial_number_word2
=
16143 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 2);
16145 eep_config
.serial_number_word1
=
16146 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 3);
16148 AdvSet3550EEPConfig(iop_base
, &eep_config
);
16151 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
16152 * EEPROM configuration that was read.
16154 * This is the mapping of EEPROM fields to Adv Library fields.
16156 asc_dvc
->wdtr_able
= eep_config
.wdtr_able
;
16157 asc_dvc
->sdtr_able
= eep_config
.sdtr_able
;
16158 asc_dvc
->ultra_able
= eep_config
.ultra_able
;
16159 asc_dvc
->tagqng_able
= eep_config
.tagqng_able
;
16160 asc_dvc
->cfg
->disc_enable
= eep_config
.disc_enable
;
16161 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16162 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16163 asc_dvc
->chip_scsi_id
= (eep_config
.adapter_scsi_id
& ADV_MAX_TID
);
16164 asc_dvc
->start_motor
= eep_config
.start_motor
;
16165 asc_dvc
->scsi_reset_wait
= eep_config
.scsi_reset_delay
;
16166 asc_dvc
->bios_ctrl
= eep_config
.bios_ctrl
;
16167 asc_dvc
->no_scam
= eep_config
.scam_tolerant
;
16168 asc_dvc
->cfg
->serial1
= eep_config
.serial_number_word1
;
16169 asc_dvc
->cfg
->serial2
= eep_config
.serial_number_word2
;
16170 asc_dvc
->cfg
->serial3
= eep_config
.serial_number_word3
;
16173 * Set the host maximum queuing (max. 253, min. 16) and the per device
16174 * maximum queuing (max. 63, min. 4).
16176 if (eep_config
.max_host_qng
> ASC_DEF_MAX_HOST_QNG
) {
16177 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16178 } else if (eep_config
.max_host_qng
< ASC_DEF_MIN_HOST_QNG
) {
16179 /* If the value is zero, assume it is uninitialized. */
16180 if (eep_config
.max_host_qng
== 0) {
16181 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16183 eep_config
.max_host_qng
= ASC_DEF_MIN_HOST_QNG
;
16187 if (eep_config
.max_dvc_qng
> ASC_DEF_MAX_DVC_QNG
) {
16188 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16189 } else if (eep_config
.max_dvc_qng
< ASC_DEF_MIN_DVC_QNG
) {
16190 /* If the value is zero, assume it is uninitialized. */
16191 if (eep_config
.max_dvc_qng
== 0) {
16192 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16194 eep_config
.max_dvc_qng
= ASC_DEF_MIN_DVC_QNG
;
16199 * If 'max_dvc_qng' is greater than 'max_host_qng', then
16200 * set 'max_dvc_qng' to 'max_host_qng'.
16202 if (eep_config
.max_dvc_qng
> eep_config
.max_host_qng
) {
16203 eep_config
.max_dvc_qng
= eep_config
.max_host_qng
;
16207 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
16208 * values based on possibly adjusted EEPROM values.
16210 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16211 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16214 * If the EEPROM 'termination' field is set to automatic (0), then set
16215 * the ADV_DVC_CFG 'termination' field to automatic also.
16217 * If the termination is specified with a non-zero 'termination'
16218 * value check that a legal value is set and set the ADV_DVC_CFG
16219 * 'termination' field appropriately.
16221 if (eep_config
.termination
== 0) {
16222 asc_dvc
->cfg
->termination
= 0; /* auto termination */
16224 /* Enable manual control with low off / high off. */
16225 if (eep_config
.termination
== 1) {
16226 asc_dvc
->cfg
->termination
= TERM_CTL_SEL
;
16228 /* Enable manual control with low off / high on. */
16229 } else if (eep_config
.termination
== 2) {
16230 asc_dvc
->cfg
->termination
= TERM_CTL_SEL
| TERM_CTL_H
;
16232 /* Enable manual control with low on / high on. */
16233 } else if (eep_config
.termination
== 3) {
16234 asc_dvc
->cfg
->termination
=
16235 TERM_CTL_SEL
| TERM_CTL_H
| TERM_CTL_L
;
16238 * The EEPROM 'termination' field contains a bad value. Use
16239 * automatic termination instead.
16241 asc_dvc
->cfg
->termination
= 0;
16242 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16250 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
16251 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
16252 * all of this is done.
16254 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
16256 * For a non-fatal error return a warning code. If there are no warnings
16257 * then 0 is returned.
16259 * Note: Chip is stopped on entry.
16261 static int __init
AdvInitFrom38C0800EEP(ADV_DVC_VAR
*asc_dvc
)
16263 AdvPortAddr iop_base
;
16265 ADVEEP_38C0800_CONFIG eep_config
;
16267 uchar tid
, termination
;
16268 ushort sdtr_speed
= 0;
16270 iop_base
= asc_dvc
->iop_base
;
16275 * Read the board's EEPROM configuration.
16277 * Set default values if a bad checksum is found.
16279 if (AdvGet38C0800EEPConfig(iop_base
, &eep_config
) !=
16280 eep_config
.check_sum
) {
16281 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
16284 * Set EEPROM default values.
16286 for (i
= 0; i
< sizeof(ADVEEP_38C0800_CONFIG
); i
++) {
16287 *((uchar
*)&eep_config
+ i
) =
16288 *((uchar
*)&Default_38C0800_EEPROM_Config
+ i
);
16292 * Assume the 6 byte board serial number that was read
16293 * from EEPROM is correct even if the EEPROM checksum
16296 eep_config
.serial_number_word3
=
16297 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 1);
16299 eep_config
.serial_number_word2
=
16300 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 2);
16302 eep_config
.serial_number_word1
=
16303 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 3);
16305 AdvSet38C0800EEPConfig(iop_base
, &eep_config
);
16308 * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the
16309 * EEPROM configuration that was read.
16311 * This is the mapping of EEPROM fields to Adv Library fields.
16313 asc_dvc
->wdtr_able
= eep_config
.wdtr_able
;
16314 asc_dvc
->sdtr_speed1
= eep_config
.sdtr_speed1
;
16315 asc_dvc
->sdtr_speed2
= eep_config
.sdtr_speed2
;
16316 asc_dvc
->sdtr_speed3
= eep_config
.sdtr_speed3
;
16317 asc_dvc
->sdtr_speed4
= eep_config
.sdtr_speed4
;
16318 asc_dvc
->tagqng_able
= eep_config
.tagqng_able
;
16319 asc_dvc
->cfg
->disc_enable
= eep_config
.disc_enable
;
16320 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16321 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16322 asc_dvc
->chip_scsi_id
= (eep_config
.adapter_scsi_id
& ADV_MAX_TID
);
16323 asc_dvc
->start_motor
= eep_config
.start_motor
;
16324 asc_dvc
->scsi_reset_wait
= eep_config
.scsi_reset_delay
;
16325 asc_dvc
->bios_ctrl
= eep_config
.bios_ctrl
;
16326 asc_dvc
->no_scam
= eep_config
.scam_tolerant
;
16327 asc_dvc
->cfg
->serial1
= eep_config
.serial_number_word1
;
16328 asc_dvc
->cfg
->serial2
= eep_config
.serial_number_word2
;
16329 asc_dvc
->cfg
->serial3
= eep_config
.serial_number_word3
;
16332 * For every Target ID if any of its 'sdtr_speed[1234]' bits
16333 * are set, then set an 'sdtr_able' bit for it.
16335 asc_dvc
->sdtr_able
= 0;
16336 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
16338 sdtr_speed
= asc_dvc
->sdtr_speed1
;
16339 } else if (tid
== 4) {
16340 sdtr_speed
= asc_dvc
->sdtr_speed2
;
16341 } else if (tid
== 8) {
16342 sdtr_speed
= asc_dvc
->sdtr_speed3
;
16343 } else if (tid
== 12) {
16344 sdtr_speed
= asc_dvc
->sdtr_speed4
;
16346 if (sdtr_speed
& ADV_MAX_TID
) {
16347 asc_dvc
->sdtr_able
|= (1 << tid
);
16353 * Set the host maximum queuing (max. 253, min. 16) and the per device
16354 * maximum queuing (max. 63, min. 4).
16356 if (eep_config
.max_host_qng
> ASC_DEF_MAX_HOST_QNG
) {
16357 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16358 } else if (eep_config
.max_host_qng
< ASC_DEF_MIN_HOST_QNG
) {
16359 /* If the value is zero, assume it is uninitialized. */
16360 if (eep_config
.max_host_qng
== 0) {
16361 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16363 eep_config
.max_host_qng
= ASC_DEF_MIN_HOST_QNG
;
16367 if (eep_config
.max_dvc_qng
> ASC_DEF_MAX_DVC_QNG
) {
16368 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16369 } else if (eep_config
.max_dvc_qng
< ASC_DEF_MIN_DVC_QNG
) {
16370 /* If the value is zero, assume it is uninitialized. */
16371 if (eep_config
.max_dvc_qng
== 0) {
16372 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16374 eep_config
.max_dvc_qng
= ASC_DEF_MIN_DVC_QNG
;
16379 * If 'max_dvc_qng' is greater than 'max_host_qng', then
16380 * set 'max_dvc_qng' to 'max_host_qng'.
16382 if (eep_config
.max_dvc_qng
> eep_config
.max_host_qng
) {
16383 eep_config
.max_dvc_qng
= eep_config
.max_host_qng
;
16387 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
16388 * values based on possibly adjusted EEPROM values.
16390 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16391 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16394 * If the EEPROM 'termination' field is set to automatic (0), then set
16395 * the ADV_DVC_CFG 'termination' field to automatic also.
16397 * If the termination is specified with a non-zero 'termination'
16398 * value check that a legal value is set and set the ADV_DVC_CFG
16399 * 'termination' field appropriately.
16401 if (eep_config
.termination_se
== 0) {
16402 termination
= 0; /* auto termination for SE */
16404 /* Enable manual control with low off / high off. */
16405 if (eep_config
.termination_se
== 1) {
16408 /* Enable manual control with low off / high on. */
16409 } else if (eep_config
.termination_se
== 2) {
16410 termination
= TERM_SE_HI
;
16412 /* Enable manual control with low on / high on. */
16413 } else if (eep_config
.termination_se
== 3) {
16414 termination
= TERM_SE
;
16417 * The EEPROM 'termination_se' field contains a bad value.
16418 * Use automatic termination instead.
16421 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16425 if (eep_config
.termination_lvd
== 0) {
16426 asc_dvc
->cfg
->termination
= termination
; /* auto termination for LVD */
16428 /* Enable manual control with low off / high off. */
16429 if (eep_config
.termination_lvd
== 1) {
16430 asc_dvc
->cfg
->termination
= termination
;
16432 /* Enable manual control with low off / high on. */
16433 } else if (eep_config
.termination_lvd
== 2) {
16434 asc_dvc
->cfg
->termination
= termination
| TERM_LVD_HI
;
16436 /* Enable manual control with low on / high on. */
16437 } else if (eep_config
.termination_lvd
== 3) {
16438 asc_dvc
->cfg
->termination
= termination
| TERM_LVD
;
16441 * The EEPROM 'termination_lvd' field contains a bad value.
16442 * Use automatic termination instead.
16444 asc_dvc
->cfg
->termination
= termination
;
16445 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16453 * Read the board's EEPROM configuration. Set fields in ASC_DVC_VAR and
16454 * ASC_DVC_CFG based on the EEPROM settings. The chip is stopped while
16455 * all of this is done.
16457 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
16459 * For a non-fatal error return a warning code. If there are no warnings
16460 * then 0 is returned.
16462 * Note: Chip is stopped on entry.
16464 static int __init
AdvInitFrom38C1600EEP(ADV_DVC_VAR
*asc_dvc
)
16466 AdvPortAddr iop_base
;
16468 ADVEEP_38C1600_CONFIG eep_config
;
16470 uchar tid
, termination
;
16471 ushort sdtr_speed
= 0;
16473 iop_base
= asc_dvc
->iop_base
;
16478 * Read the board's EEPROM configuration.
16480 * Set default values if a bad checksum is found.
16482 if (AdvGet38C1600EEPConfig(iop_base
, &eep_config
) !=
16483 eep_config
.check_sum
) {
16484 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
16487 * Set EEPROM default values.
16489 for (i
= 0; i
< sizeof(ADVEEP_38C1600_CONFIG
); i
++) {
16491 && ASC_PCI_ID2FUNC(asc_dvc
->cfg
->pci_slot_info
) !=
16494 * Set Function 1 EEPROM Word 0 MSB
16496 * Clear the BIOS_ENABLE (bit 14) and INTAB (bit 11)
16499 * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60 and
16500 * old Mac system booting problem. The Expansion ROM must
16501 * be disabled in Function 1 for these systems.
16504 *((uchar
*)&eep_config
+ i
) =
16506 ((uchar
*)&Default_38C1600_EEPROM_Config
16510 (((ADV_EEPROM_BIOS_ENABLE
|
16511 ADV_EEPROM_INTAB
) >> 8) & 0xFF)));
16514 * Set the INTAB (bit 11) if the GPIO 0 input indicates
16515 * the Function 1 interrupt line is wired to INTA.
16517 * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input:
16518 * 1 - Function 1 interrupt line wired to INT A.
16519 * 0 - Function 1 interrupt line wired to INT B.
16521 * Note: Adapter boards always have Function 0 wired to INTA.
16522 * Put all 5 GPIO bits in input mode and then read
16523 * their input values.
16525 AdvWriteByteRegister(iop_base
, IOPB_GPIO_CNTL
,
16527 if (AdvReadByteRegister
16528 (iop_base
, IOPB_GPIO_DATA
) & 0x01) {
16529 /* Function 1 interrupt wired to INTA; Set EEPROM bit. */
16530 *((uchar
*)&eep_config
+ i
) |=
16531 ((ADV_EEPROM_INTAB
>> 8) & 0xFF);
16534 *((uchar
*)&eep_config
+ i
) =
16535 *((uchar
*)&Default_38C1600_EEPROM_Config
16541 * Assume the 6 byte board serial number that was read
16542 * from EEPROM is correct even if the EEPROM checksum
16545 eep_config
.serial_number_word3
=
16546 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 1);
16548 eep_config
.serial_number_word2
=
16549 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 2);
16551 eep_config
.serial_number_word1
=
16552 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 3);
16554 AdvSet38C1600EEPConfig(iop_base
, &eep_config
);
16558 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
16559 * EEPROM configuration that was read.
16561 * This is the mapping of EEPROM fields to Adv Library fields.
16563 asc_dvc
->wdtr_able
= eep_config
.wdtr_able
;
16564 asc_dvc
->sdtr_speed1
= eep_config
.sdtr_speed1
;
16565 asc_dvc
->sdtr_speed2
= eep_config
.sdtr_speed2
;
16566 asc_dvc
->sdtr_speed3
= eep_config
.sdtr_speed3
;
16567 asc_dvc
->sdtr_speed4
= eep_config
.sdtr_speed4
;
16568 asc_dvc
->ppr_able
= 0;
16569 asc_dvc
->tagqng_able
= eep_config
.tagqng_able
;
16570 asc_dvc
->cfg
->disc_enable
= eep_config
.disc_enable
;
16571 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16572 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16573 asc_dvc
->chip_scsi_id
= (eep_config
.adapter_scsi_id
& ASC_MAX_TID
);
16574 asc_dvc
->start_motor
= eep_config
.start_motor
;
16575 asc_dvc
->scsi_reset_wait
= eep_config
.scsi_reset_delay
;
16576 asc_dvc
->bios_ctrl
= eep_config
.bios_ctrl
;
16577 asc_dvc
->no_scam
= eep_config
.scam_tolerant
;
16580 * For every Target ID if any of its 'sdtr_speed[1234]' bits
16581 * are set, then set an 'sdtr_able' bit for it.
16583 asc_dvc
->sdtr_able
= 0;
16584 for (tid
= 0; tid
<= ASC_MAX_TID
; tid
++) {
16586 sdtr_speed
= asc_dvc
->sdtr_speed1
;
16587 } else if (tid
== 4) {
16588 sdtr_speed
= asc_dvc
->sdtr_speed2
;
16589 } else if (tid
== 8) {
16590 sdtr_speed
= asc_dvc
->sdtr_speed3
;
16591 } else if (tid
== 12) {
16592 sdtr_speed
= asc_dvc
->sdtr_speed4
;
16594 if (sdtr_speed
& ASC_MAX_TID
) {
16595 asc_dvc
->sdtr_able
|= (1 << tid
);
16601 * Set the host maximum queuing (max. 253, min. 16) and the per device
16602 * maximum queuing (max. 63, min. 4).
16604 if (eep_config
.max_host_qng
> ASC_DEF_MAX_HOST_QNG
) {
16605 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16606 } else if (eep_config
.max_host_qng
< ASC_DEF_MIN_HOST_QNG
) {
16607 /* If the value is zero, assume it is uninitialized. */
16608 if (eep_config
.max_host_qng
== 0) {
16609 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16611 eep_config
.max_host_qng
= ASC_DEF_MIN_HOST_QNG
;
16615 if (eep_config
.max_dvc_qng
> ASC_DEF_MAX_DVC_QNG
) {
16616 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16617 } else if (eep_config
.max_dvc_qng
< ASC_DEF_MIN_DVC_QNG
) {
16618 /* If the value is zero, assume it is uninitialized. */
16619 if (eep_config
.max_dvc_qng
== 0) {
16620 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16622 eep_config
.max_dvc_qng
= ASC_DEF_MIN_DVC_QNG
;
16627 * If 'max_dvc_qng' is greater than 'max_host_qng', then
16628 * set 'max_dvc_qng' to 'max_host_qng'.
16630 if (eep_config
.max_dvc_qng
> eep_config
.max_host_qng
) {
16631 eep_config
.max_dvc_qng
= eep_config
.max_host_qng
;
16635 * Set ASC_DVC_VAR 'max_host_qng' and ASC_DVC_VAR 'max_dvc_qng'
16636 * values based on possibly adjusted EEPROM values.
16638 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16639 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16642 * If the EEPROM 'termination' field is set to automatic (0), then set
16643 * the ASC_DVC_CFG 'termination' field to automatic also.
16645 * If the termination is specified with a non-zero 'termination'
16646 * value check that a legal value is set and set the ASC_DVC_CFG
16647 * 'termination' field appropriately.
16649 if (eep_config
.termination_se
== 0) {
16650 termination
= 0; /* auto termination for SE */
16652 /* Enable manual control with low off / high off. */
16653 if (eep_config
.termination_se
== 1) {
16656 /* Enable manual control with low off / high on. */
16657 } else if (eep_config
.termination_se
== 2) {
16658 termination
= TERM_SE_HI
;
16660 /* Enable manual control with low on / high on. */
16661 } else if (eep_config
.termination_se
== 3) {
16662 termination
= TERM_SE
;
16665 * The EEPROM 'termination_se' field contains a bad value.
16666 * Use automatic termination instead.
16669 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16673 if (eep_config
.termination_lvd
== 0) {
16674 asc_dvc
->cfg
->termination
= termination
; /* auto termination for LVD */
16676 /* Enable manual control with low off / high off. */
16677 if (eep_config
.termination_lvd
== 1) {
16678 asc_dvc
->cfg
->termination
= termination
;
16680 /* Enable manual control with low off / high on. */
16681 } else if (eep_config
.termination_lvd
== 2) {
16682 asc_dvc
->cfg
->termination
= termination
| TERM_LVD_HI
;
16684 /* Enable manual control with low on / high on. */
16685 } else if (eep_config
.termination_lvd
== 3) {
16686 asc_dvc
->cfg
->termination
= termination
| TERM_LVD
;
16689 * The EEPROM 'termination_lvd' field contains a bad value.
16690 * Use automatic termination instead.
16692 asc_dvc
->cfg
->termination
= termination
;
16693 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16701 * Read EEPROM configuration into the specified buffer.
16703 * Return a checksum based on the EEPROM configuration read.
16705 static ushort __init
16706 AdvGet3550EEPConfig(AdvPortAddr iop_base
, ADVEEP_3550_CONFIG
*cfg_buf
)
16708 ushort wval
, chksum
;
16711 ushort
*charfields
;
16713 charfields
= (ushort
*)&ADVEEP_3550_Config_Field_IsChar
;
16714 wbuf
= (ushort
*)cfg_buf
;
16717 for (eep_addr
= ADV_EEP_DVC_CFG_BEGIN
;
16718 eep_addr
< ADV_EEP_DVC_CFG_END
; eep_addr
++, wbuf
++) {
16719 wval
= AdvReadEEPWord(iop_base
, eep_addr
);
16720 chksum
+= wval
; /* Checksum is calculated from word values. */
16721 if (*charfields
++) {
16722 *wbuf
= le16_to_cpu(wval
);
16727 /* Read checksum word. */
16728 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16732 /* Read rest of EEPROM not covered by the checksum. */
16733 for (eep_addr
= ADV_EEP_DVC_CTL_BEGIN
;
16734 eep_addr
< ADV_EEP_MAX_WORD_ADDR
; eep_addr
++, wbuf
++) {
16735 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16736 if (*charfields
++) {
16737 *wbuf
= le16_to_cpu(*wbuf
);
16744 * Read EEPROM configuration into the specified buffer.
16746 * Return a checksum based on the EEPROM configuration read.
16748 static ushort __init
16749 AdvGet38C0800EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C0800_CONFIG
*cfg_buf
)
16751 ushort wval
, chksum
;
16754 ushort
*charfields
;
16756 charfields
= (ushort
*)&ADVEEP_38C0800_Config_Field_IsChar
;
16757 wbuf
= (ushort
*)cfg_buf
;
16760 for (eep_addr
= ADV_EEP_DVC_CFG_BEGIN
;
16761 eep_addr
< ADV_EEP_DVC_CFG_END
; eep_addr
++, wbuf
++) {
16762 wval
= AdvReadEEPWord(iop_base
, eep_addr
);
16763 chksum
+= wval
; /* Checksum is calculated from word values. */
16764 if (*charfields
++) {
16765 *wbuf
= le16_to_cpu(wval
);
16770 /* Read checksum word. */
16771 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16775 /* Read rest of EEPROM not covered by the checksum. */
16776 for (eep_addr
= ADV_EEP_DVC_CTL_BEGIN
;
16777 eep_addr
< ADV_EEP_MAX_WORD_ADDR
; eep_addr
++, wbuf
++) {
16778 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16779 if (*charfields
++) {
16780 *wbuf
= le16_to_cpu(*wbuf
);
16787 * Read EEPROM configuration into the specified buffer.
16789 * Return a checksum based on the EEPROM configuration read.
16791 static ushort __init
16792 AdvGet38C1600EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C1600_CONFIG
*cfg_buf
)
16794 ushort wval
, chksum
;
16797 ushort
*charfields
;
16799 charfields
= (ushort
*)&ADVEEP_38C1600_Config_Field_IsChar
;
16800 wbuf
= (ushort
*)cfg_buf
;
16803 for (eep_addr
= ADV_EEP_DVC_CFG_BEGIN
;
16804 eep_addr
< ADV_EEP_DVC_CFG_END
; eep_addr
++, wbuf
++) {
16805 wval
= AdvReadEEPWord(iop_base
, eep_addr
);
16806 chksum
+= wval
; /* Checksum is calculated from word values. */
16807 if (*charfields
++) {
16808 *wbuf
= le16_to_cpu(wval
);
16813 /* Read checksum word. */
16814 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16818 /* Read rest of EEPROM not covered by the checksum. */
16819 for (eep_addr
= ADV_EEP_DVC_CTL_BEGIN
;
16820 eep_addr
< ADV_EEP_MAX_WORD_ADDR
; eep_addr
++, wbuf
++) {
16821 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16822 if (*charfields
++) {
16823 *wbuf
= le16_to_cpu(*wbuf
);
16830 * Read the EEPROM from specified location
16832 static ushort __init
AdvReadEEPWord(AdvPortAddr iop_base
, int eep_word_addr
)
16834 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16835 ASC_EEP_CMD_READ
| eep_word_addr
);
16836 AdvWaitEEPCmd(iop_base
);
16837 return AdvReadWordRegister(iop_base
, IOPW_EE_DATA
);
16841 * Wait for EEPROM command to complete
16843 static void __init
AdvWaitEEPCmd(AdvPortAddr iop_base
)
16847 for (eep_delay_ms
= 0; eep_delay_ms
< ADV_EEP_DELAY_MS
; eep_delay_ms
++) {
16848 if (AdvReadWordRegister(iop_base
, IOPW_EE_CMD
) &
16849 ASC_EEP_CMD_DONE
) {
16852 DvcSleepMilliSecond(1);
16854 if ((AdvReadWordRegister(iop_base
, IOPW_EE_CMD
) & ASC_EEP_CMD_DONE
) ==
16862 * Write the EEPROM from 'cfg_buf'.
16865 AdvSet3550EEPConfig(AdvPortAddr iop_base
, ADVEEP_3550_CONFIG
*cfg_buf
)
16868 ushort addr
, chksum
;
16869 ushort
*charfields
;
16871 wbuf
= (ushort
*)cfg_buf
;
16872 charfields
= (ushort
*)&ADVEEP_3550_Config_Field_IsChar
;
16875 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_ABLE
);
16876 AdvWaitEEPCmd(iop_base
);
16879 * Write EEPROM from word 0 to word 20.
16881 for (addr
= ADV_EEP_DVC_CFG_BEGIN
;
16882 addr
< ADV_EEP_DVC_CFG_END
; addr
++, wbuf
++) {
16885 if (*charfields
++) {
16886 word
= cpu_to_le16(*wbuf
);
16890 chksum
+= *wbuf
; /* Checksum is calculated from word values. */
16891 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16892 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16893 ASC_EEP_CMD_WRITE
| addr
);
16894 AdvWaitEEPCmd(iop_base
);
16895 DvcSleepMilliSecond(ADV_EEP_DELAY_MS
);
16899 * Write EEPROM checksum at word 21.
16901 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, chksum
);
16902 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE
| addr
);
16903 AdvWaitEEPCmd(iop_base
);
16908 * Write EEPROM OEM name at words 22 to 29.
16910 for (addr
= ADV_EEP_DVC_CTL_BEGIN
;
16911 addr
< ADV_EEP_MAX_WORD_ADDR
; addr
++, wbuf
++) {
16914 if (*charfields
++) {
16915 word
= cpu_to_le16(*wbuf
);
16919 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16920 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16921 ASC_EEP_CMD_WRITE
| addr
);
16922 AdvWaitEEPCmd(iop_base
);
16924 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_DISABLE
);
16925 AdvWaitEEPCmd(iop_base
);
16930 * Write the EEPROM from 'cfg_buf'.
16933 AdvSet38C0800EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C0800_CONFIG
*cfg_buf
)
16936 ushort
*charfields
;
16937 ushort addr
, chksum
;
16939 wbuf
= (ushort
*)cfg_buf
;
16940 charfields
= (ushort
*)&ADVEEP_38C0800_Config_Field_IsChar
;
16943 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_ABLE
);
16944 AdvWaitEEPCmd(iop_base
);
16947 * Write EEPROM from word 0 to word 20.
16949 for (addr
= ADV_EEP_DVC_CFG_BEGIN
;
16950 addr
< ADV_EEP_DVC_CFG_END
; addr
++, wbuf
++) {
16953 if (*charfields
++) {
16954 word
= cpu_to_le16(*wbuf
);
16958 chksum
+= *wbuf
; /* Checksum is calculated from word values. */
16959 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16960 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16961 ASC_EEP_CMD_WRITE
| addr
);
16962 AdvWaitEEPCmd(iop_base
);
16963 DvcSleepMilliSecond(ADV_EEP_DELAY_MS
);
16967 * Write EEPROM checksum at word 21.
16969 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, chksum
);
16970 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE
| addr
);
16971 AdvWaitEEPCmd(iop_base
);
16976 * Write EEPROM OEM name at words 22 to 29.
16978 for (addr
= ADV_EEP_DVC_CTL_BEGIN
;
16979 addr
< ADV_EEP_MAX_WORD_ADDR
; addr
++, wbuf
++) {
16982 if (*charfields
++) {
16983 word
= cpu_to_le16(*wbuf
);
16987 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16988 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16989 ASC_EEP_CMD_WRITE
| addr
);
16990 AdvWaitEEPCmd(iop_base
);
16992 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_DISABLE
);
16993 AdvWaitEEPCmd(iop_base
);
16998 * Write the EEPROM from 'cfg_buf'.
17001 AdvSet38C1600EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C1600_CONFIG
*cfg_buf
)
17004 ushort
*charfields
;
17005 ushort addr
, chksum
;
17007 wbuf
= (ushort
*)cfg_buf
;
17008 charfields
= (ushort
*)&ADVEEP_38C1600_Config_Field_IsChar
;
17011 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_ABLE
);
17012 AdvWaitEEPCmd(iop_base
);
17015 * Write EEPROM from word 0 to word 20.
17017 for (addr
= ADV_EEP_DVC_CFG_BEGIN
;
17018 addr
< ADV_EEP_DVC_CFG_END
; addr
++, wbuf
++) {
17021 if (*charfields
++) {
17022 word
= cpu_to_le16(*wbuf
);
17026 chksum
+= *wbuf
; /* Checksum is calculated from word values. */
17027 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
17028 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
17029 ASC_EEP_CMD_WRITE
| addr
);
17030 AdvWaitEEPCmd(iop_base
);
17031 DvcSleepMilliSecond(ADV_EEP_DELAY_MS
);
17035 * Write EEPROM checksum at word 21.
17037 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, chksum
);
17038 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE
| addr
);
17039 AdvWaitEEPCmd(iop_base
);
17044 * Write EEPROM OEM name at words 22 to 29.
17046 for (addr
= ADV_EEP_DVC_CTL_BEGIN
;
17047 addr
< ADV_EEP_MAX_WORD_ADDR
; addr
++, wbuf
++) {
17050 if (*charfields
++) {
17051 word
= cpu_to_le16(*wbuf
);
17055 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
17056 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
17057 ASC_EEP_CMD_WRITE
| addr
);
17058 AdvWaitEEPCmd(iop_base
);
17060 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_DISABLE
);
17061 AdvWaitEEPCmd(iop_base
);
17067 * AdvExeScsiQueue() - Send a request to the RISC microcode program.
17069 * Allocate a carrier structure, point the carrier to the ADV_SCSI_REQ_Q,
17070 * add the carrier to the ICQ (Initiator Command Queue), and tickle the
17071 * RISC to notify it a new command is ready to be executed.
17073 * If 'done_status' is not set to QD_DO_RETRY, then 'error_retry' will be
17074 * set to SCSI_MAX_RETRY.
17076 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the microcode
17077 * for DMA addresses or math operations are byte swapped to little-endian
17081 * ADV_SUCCESS(1) - The request was successfully queued.
17082 * ADV_BUSY(0) - Resource unavailable; Retry again after pending
17083 * request completes.
17084 * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure
17087 static int AdvExeScsiQueue(ADV_DVC_VAR
*asc_dvc
, ADV_SCSI_REQ_Q
*scsiq
)
17089 ulong last_int_level
;
17090 AdvPortAddr iop_base
;
17092 ADV_PADDR req_paddr
;
17093 ADV_CARR_T
*new_carrp
;
17095 ASC_ASSERT(scsiq
!= NULL
); /* 'scsiq' should never be NULL. */
17098 * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID.
17100 if (scsiq
->target_id
> ADV_MAX_TID
) {
17101 scsiq
->host_status
= QHSTA_M_INVALID_DEVICE
;
17102 scsiq
->done_status
= QD_WITH_ERROR
;
17106 iop_base
= asc_dvc
->iop_base
;
17108 last_int_level
= DvcEnterCritical();
17111 * Allocate a carrier ensuring at least one carrier always
17112 * remains on the freelist and initialize fields.
17114 if ((new_carrp
= asc_dvc
->carr_freelist
) == NULL
) {
17115 DvcLeaveCritical(last_int_level
);
17118 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
17119 ADV_U32_TO_VADDR(le32_to_cpu(new_carrp
->next_vpa
));
17120 asc_dvc
->carr_pending_cnt
++;
17123 * Set the carrier to be a stopper by setting 'next_vpa'
17124 * to the stopper value. The current stopper will be changed
17125 * below to point to the new stopper.
17127 new_carrp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
17130 * Clear the ADV_SCSI_REQ_Q done flag.
17132 scsiq
->a_flag
&= ~ADV_SCSIQ_DONE
;
17134 req_size
= sizeof(ADV_SCSI_REQ_Q
);
17135 req_paddr
= DvcGetPhyAddr(asc_dvc
, scsiq
, (uchar
*)scsiq
,
17136 (ADV_SDCNT
*)&req_size
, ADV_IS_SCSIQ_FLAG
);
17138 ASC_ASSERT(ADV_32BALIGN(req_paddr
) == req_paddr
);
17139 ASC_ASSERT(req_size
>= sizeof(ADV_SCSI_REQ_Q
));
17141 /* Wait for assertion before making little-endian */
17142 req_paddr
= cpu_to_le32(req_paddr
);
17144 /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */
17145 scsiq
->scsiq_ptr
= cpu_to_le32(ADV_VADDR_TO_U32(scsiq
));
17146 scsiq
->scsiq_rptr
= req_paddr
;
17148 scsiq
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->icq_sp
));
17150 * Every ADV_CARR_T.carr_pa is byte swapped to little-endian
17151 * order during initialization.
17153 scsiq
->carr_pa
= asc_dvc
->icq_sp
->carr_pa
;
17156 * Use the current stopper to send the ADV_SCSI_REQ_Q command to
17157 * the microcode. The newly allocated stopper will become the new
17160 asc_dvc
->icq_sp
->areq_vpa
= req_paddr
;
17163 * Set the 'next_vpa' pointer for the old stopper to be the
17164 * physical address of the new stopper. The RISC can only
17165 * follow physical addresses.
17167 asc_dvc
->icq_sp
->next_vpa
= new_carrp
->carr_pa
;
17170 * Set the host adapter stopper pointer to point to the new carrier.
17172 asc_dvc
->icq_sp
= new_carrp
;
17174 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
||
17175 asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
17177 * Tickle the RISC to tell it to read its Command Queue Head pointer.
17179 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
, ADV_TICKLE_A
);
17180 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
) {
17182 * Clear the tickle value. In the ASC-3550 the RISC flag
17183 * command 'clr_tickle_a' does not work unless the host
17184 * value is cleared.
17186 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
,
17189 } else if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17191 * Notify the RISC a carrier is ready by writing the physical
17192 * address of the new carrier stopper to the COMMA register.
17194 AdvWriteDWordRegister(iop_base
, IOPDW_COMMA
,
17195 le32_to_cpu(new_carrp
->carr_pa
));
17198 DvcLeaveCritical(last_int_level
);
17200 return ADV_SUCCESS
;
17204 * Reset SCSI Bus and purge all outstanding requests.
17207 * ADV_TRUE(1) - All requests are purged and SCSI Bus is reset.
17208 * ADV_FALSE(0) - Microcode command failed.
17209 * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC
17210 * may be hung which requires driver recovery.
17212 static int AdvResetSB(ADV_DVC_VAR
*asc_dvc
)
17217 * Send the SCSI Bus Reset idle start idle command which asserts
17218 * the SCSI Bus Reset signal.
17220 status
= AdvSendIdleCmd(asc_dvc
, (ushort
)IDLE_CMD_SCSI_RESET_START
, 0L);
17221 if (status
!= ADV_TRUE
) {
17226 * Delay for the specified SCSI Bus Reset hold time.
17228 * The hold time delay is done on the host because the RISC has no
17229 * microsecond accurate timer.
17231 DvcDelayMicroSecond(asc_dvc
, (ushort
)ASC_SCSI_RESET_HOLD_TIME_US
);
17234 * Send the SCSI Bus Reset end idle command which de-asserts
17235 * the SCSI Bus Reset signal and purges any pending requests.
17237 status
= AdvSendIdleCmd(asc_dvc
, (ushort
)IDLE_CMD_SCSI_RESET_END
, 0L);
17238 if (status
!= ADV_TRUE
) {
17242 DvcSleepMilliSecond((ADV_DCNT
)asc_dvc
->scsi_reset_wait
* 1000);
17248 * Reset chip and SCSI Bus.
17251 * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful.
17252 * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure.
17254 static int AdvResetChipAndSB(ADV_DVC_VAR
*asc_dvc
)
17257 ushort wdtr_able
, sdtr_able
, tagqng_able
;
17258 ushort ppr_able
= 0;
17259 uchar tid
, max_cmd
[ADV_MAX_TID
+ 1];
17260 AdvPortAddr iop_base
;
17263 iop_base
= asc_dvc
->iop_base
;
17266 * Save current per TID negotiated values.
17268 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
17269 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
17270 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17271 AdvReadWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
17273 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
17274 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
17275 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
17280 * Force the AdvInitAsc3550/38C0800Driver() function to
17281 * perform a SCSI Bus Reset by clearing the BIOS signature word.
17282 * The initialization functions assumes a SCSI Bus Reset is not
17283 * needed if the BIOS signature word is present.
17285 AdvReadWordLram(iop_base
, ASC_MC_BIOS_SIGNATURE
, bios_sig
);
17286 AdvWriteWordLram(iop_base
, ASC_MC_BIOS_SIGNATURE
, 0);
17289 * Stop chip and reset it.
17291 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_STOP
);
17292 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
, ADV_CTRL_REG_CMD_RESET
);
17293 DvcSleepMilliSecond(100);
17294 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
,
17295 ADV_CTRL_REG_CMD_WR_IO_REG
);
17298 * Reset Adv Library error code, if any, and try
17299 * re-initializing the chip.
17301 asc_dvc
->err_code
= 0;
17302 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17303 status
= AdvInitAsc38C1600Driver(asc_dvc
);
17304 } else if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
17305 status
= AdvInitAsc38C0800Driver(asc_dvc
);
17307 status
= AdvInitAsc3550Driver(asc_dvc
);
17310 /* Translate initialization return value to status value. */
17314 status
= ADV_FALSE
;
17318 * Restore the BIOS signature word.
17320 AdvWriteWordLram(iop_base
, ASC_MC_BIOS_SIGNATURE
, bios_sig
);
17323 * Restore per TID negotiated values.
17325 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
17326 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
17327 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17328 AdvWriteWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
17330 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
17331 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
17332 AdvWriteByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
17340 * Adv Library Interrupt Service Routine
17342 * This function is called by a driver's interrupt service routine.
17343 * The function disables and re-enables interrupts.
17345 * When a microcode idle command is completed, the ADV_DVC_VAR
17346 * 'idle_cmd_done' field is set to ADV_TRUE.
17348 * Note: AdvISR() can be called when interrupts are disabled or even
17349 * when there is no hardware interrupt condition present. It will
17350 * always check for completed idle commands and microcode requests.
17351 * This is an important feature that shouldn't be changed because it
17352 * allows commands to be completed from polling mode loops.
17355 * ADV_TRUE(1) - interrupt was pending
17356 * ADV_FALSE(0) - no interrupt was pending
17358 static int AdvISR(ADV_DVC_VAR
*asc_dvc
)
17360 AdvPortAddr iop_base
;
17363 ADV_CARR_T
*free_carrp
;
17364 ADV_VADDR irq_next_vpa
;
17366 ADV_SCSI_REQ_Q
*scsiq
;
17368 flags
= DvcEnterCritical();
17370 iop_base
= asc_dvc
->iop_base
;
17372 /* Reading the register clears the interrupt. */
17373 int_stat
= AdvReadByteRegister(iop_base
, IOPB_INTR_STATUS_REG
);
17375 if ((int_stat
& (ADV_INTR_STATUS_INTRA
| ADV_INTR_STATUS_INTRB
|
17376 ADV_INTR_STATUS_INTRC
)) == 0) {
17377 DvcLeaveCritical(flags
);
17382 * Notify the driver of an asynchronous microcode condition by
17383 * calling the ADV_DVC_VAR.async_callback function. The function
17384 * is passed the microcode ASC_MC_INTRB_CODE byte value.
17386 if (int_stat
& ADV_INTR_STATUS_INTRB
) {
17389 AdvReadByteLram(iop_base
, ASC_MC_INTRB_CODE
, intrb_code
);
17391 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
||
17392 asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
17393 if (intrb_code
== ADV_ASYNC_CARRIER_READY_FAILURE
&&
17394 asc_dvc
->carr_pending_cnt
!= 0) {
17395 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
,
17397 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
) {
17398 AdvWriteByteRegister(iop_base
,
17405 if (asc_dvc
->async_callback
!= 0) {
17406 (*asc_dvc
->async_callback
) (asc_dvc
, intrb_code
);
17411 * Check if the IRQ stopper carrier contains a completed request.
17413 while (((irq_next_vpa
=
17414 le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
)) & ASC_RQ_DONE
) != 0) {
17416 * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure.
17417 * The RISC will have set 'areq_vpa' to a virtual address.
17419 * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr
17420 * field to the carrier ADV_CARR_T.areq_vpa field. The conversion
17421 * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr'
17422 * in AdvExeScsiQueue().
17424 scsiq
= (ADV_SCSI_REQ_Q
*)
17425 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->areq_vpa
));
17428 * Request finished with good status and the queue was not
17429 * DMAed to host memory by the firmware. Set all status fields
17430 * to indicate good status.
17432 if ((irq_next_vpa
& ASC_RQ_GOOD
) != 0) {
17433 scsiq
->done_status
= QD_NO_ERROR
;
17434 scsiq
->host_status
= scsiq
->scsi_status
= 0;
17435 scsiq
->data_cnt
= 0L;
17439 * Advance the stopper pointer to the next carrier
17440 * ignoring the lower four bits. Free the previous
17443 free_carrp
= asc_dvc
->irq_sp
;
17444 asc_dvc
->irq_sp
= (ADV_CARR_T
*)
17445 ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa
));
17447 free_carrp
->next_vpa
=
17448 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
17449 asc_dvc
->carr_freelist
= free_carrp
;
17450 asc_dvc
->carr_pending_cnt
--;
17452 ASC_ASSERT(scsiq
!= NULL
);
17453 target_bit
= ADV_TID_TO_TIDMASK(scsiq
->target_id
);
17456 * Clear request microcode control flag.
17461 * If the command that completed was a SCSI INQUIRY and
17462 * LUN 0 was sent the command, then process the INQUIRY
17463 * command information for the device.
17465 * Note: If data returned were either VPD or CmdDt data,
17466 * don't process the INQUIRY command information for
17467 * the device, otherwise may erroneously set *_able bits.
17469 if (scsiq
->done_status
== QD_NO_ERROR
&&
17470 scsiq
->cdb
[0] == INQUIRY
&&
17471 scsiq
->target_lun
== 0 &&
17472 (scsiq
->cdb
[1] & ADV_INQ_RTN_VPD_AND_CMDDT
)
17473 == ADV_INQ_RTN_STD_INQUIRY_DATA
) {
17474 AdvInquiryHandling(asc_dvc
, scsiq
);
17478 * Notify the driver of the completed request by passing
17479 * the ADV_SCSI_REQ_Q pointer to its callback function.
17481 scsiq
->a_flag
|= ADV_SCSIQ_DONE
;
17482 (*asc_dvc
->isr_callback
) (asc_dvc
, scsiq
);
17484 * Note: After the driver callback function is called, 'scsiq'
17485 * can no longer be referenced.
17487 * Fall through and continue processing other completed
17492 * Disable interrupts again in case the driver inadvertently
17493 * enabled interrupts in its callback function.
17495 * The DvcEnterCritical() return value is ignored, because
17496 * the 'flags' saved when AdvISR() was first entered will be
17497 * used to restore the interrupt flag on exit.
17499 (void)DvcEnterCritical();
17501 DvcLeaveCritical(flags
);
17506 * Send an idle command to the chip and wait for completion.
17508 * Command completion is polled for once per microsecond.
17510 * The function can be called from anywhere including an interrupt handler.
17511 * But the function is not re-entrant, so it uses the DvcEnter/LeaveCritical()
17512 * functions to prevent reentrancy.
17515 * ADV_TRUE - command completed successfully
17516 * ADV_FALSE - command failed
17517 * ADV_ERROR - command timed out
17520 AdvSendIdleCmd(ADV_DVC_VAR
*asc_dvc
,
17521 ushort idle_cmd
, ADV_DCNT idle_cmd_parameter
)
17523 ulong last_int_level
;
17526 AdvPortAddr iop_base
;
17528 last_int_level
= DvcEnterCritical();
17530 iop_base
= asc_dvc
->iop_base
;
17533 * Clear the idle command status which is set by the microcode
17534 * to a non-zero value to indicate when the command is completed.
17535 * The non-zero result is one of the IDLE_CMD_STATUS_* values
17536 * defined in a_advlib.h.
17538 AdvWriteWordLram(iop_base
, ASC_MC_IDLE_CMD_STATUS
, (ushort
)0);
17541 * Write the idle command value after the idle command parameter
17542 * has been written to avoid a race condition. If the order is not
17543 * followed, the microcode may process the idle command before the
17544 * parameters have been written to LRAM.
17546 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IDLE_CMD_PARAMETER
,
17547 cpu_to_le32(idle_cmd_parameter
));
17548 AdvWriteWordLram(iop_base
, ASC_MC_IDLE_CMD
, idle_cmd
);
17551 * Tickle the RISC to tell it to process the idle command.
17553 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
, ADV_TICKLE_B
);
17554 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
) {
17556 * Clear the tickle value. In the ASC-3550 the RISC flag
17557 * command 'clr_tickle_b' does not work unless the host
17558 * value is cleared.
17560 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
, ADV_TICKLE_NOP
);
17563 /* Wait for up to 100 millisecond for the idle command to timeout. */
17564 for (i
= 0; i
< SCSI_WAIT_100_MSEC
; i
++) {
17565 /* Poll once each microsecond for command completion. */
17566 for (j
= 0; j
< SCSI_US_PER_MSEC
; j
++) {
17567 AdvReadWordLram(iop_base
, ASC_MC_IDLE_CMD_STATUS
,
17570 DvcLeaveCritical(last_int_level
);
17573 DvcDelayMicroSecond(asc_dvc
, (ushort
)1);
17577 ASC_ASSERT(0); /* The idle command should never timeout. */
17578 DvcLeaveCritical(last_int_level
);
17583 * Inquiry Information Byte 7 Handling
17585 * Handle SCSI Inquiry Command information for a device by setting
17586 * microcode operating variables that affect WDTR, SDTR, and Tag
17589 static void AdvInquiryHandling(ADV_DVC_VAR
*asc_dvc
, ADV_SCSI_REQ_Q
*scsiq
)
17591 AdvPortAddr iop_base
;
17593 ADV_SCSI_INQUIRY
*inq
;
17598 * AdvInquiryHandling() requires up to INQUIRY information Byte 7
17601 * If less than 8 bytes of INQUIRY information were requested or less
17602 * than 8 bytes were transferred, then return. cdb[4] is the request
17603 * length and the ADV_SCSI_REQ_Q 'data_cnt' field is set by the
17604 * microcode to the transfer residual count.
17607 if (scsiq
->cdb
[4] < 8 ||
17608 (scsiq
->cdb
[4] - le32_to_cpu(scsiq
->data_cnt
)) < 8) {
17612 iop_base
= asc_dvc
->iop_base
;
17613 tid
= scsiq
->target_id
;
17615 inq
= (ADV_SCSI_INQUIRY
*) scsiq
->vdata_addr
;
17618 * WDTR, SDTR, and Tag Queuing cannot be enabled for old devices.
17620 if (ADV_INQ_RESPONSE_FMT(inq
) < 2 && ADV_INQ_ANSI_VER(inq
) < 2) {
17624 * INQUIRY Byte 7 Handling
17626 * Use a device's INQUIRY byte 7 to determine whether it
17627 * supports WDTR, SDTR, and Tag Queuing. If the feature
17628 * is enabled in the EEPROM and the device supports the
17629 * feature, then enable it in the microcode.
17632 tidmask
= ADV_TID_TO_TIDMASK(tid
);
17637 * If the EEPROM enabled WDTR for the device and the device
17638 * supports wide bus (16 bit) transfers, then turn on the
17639 * device's 'wdtr_able' bit and write the new value to the
17642 if ((asc_dvc
->wdtr_able
& tidmask
) && ADV_INQ_WIDE16(inq
)) {
17643 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, cfg_word
);
17644 if ((cfg_word
& tidmask
) == 0) {
17645 cfg_word
|= tidmask
;
17646 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
17650 * Clear the microcode "SDTR negotiation" and "WDTR
17651 * negotiation" done indicators for the target to cause
17652 * it to negotiate with the new setting set above.
17653 * WDTR when accepted causes the target to enter
17654 * asynchronous mode, so SDTR must be negotiated.
17656 AdvReadWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17658 cfg_word
&= ~tidmask
;
17659 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17661 AdvReadWordLram(iop_base
, ASC_MC_WDTR_DONE
,
17663 cfg_word
&= ~tidmask
;
17664 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_DONE
,
17670 * Synchronous Transfers
17672 * If the EEPROM enabled SDTR for the device and the device
17673 * supports synchronous transfers, then turn on the device's
17674 * 'sdtr_able' bit. Write the new value to the microcode.
17676 if ((asc_dvc
->sdtr_able
& tidmask
) && ADV_INQ_SYNC(inq
)) {
17677 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, cfg_word
);
17678 if ((cfg_word
& tidmask
) == 0) {
17679 cfg_word
|= tidmask
;
17680 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
17684 * Clear the microcode "SDTR negotiation" done indicator
17685 * for the target to cause it to negotiate with the new
17686 * setting set above.
17688 AdvReadWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17690 cfg_word
&= ~tidmask
;
17691 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17696 * If the Inquiry data included enough space for the SPI-3
17697 * Clocking field, then check if DT mode is supported.
17699 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
&&
17700 (scsiq
->cdb
[4] >= 57 ||
17701 (scsiq
->cdb
[4] - le32_to_cpu(scsiq
->data_cnt
)) >= 57)) {
17703 * PPR (Parallel Protocol Request) Capable
17705 * If the device supports DT mode, then it must be PPR capable.
17706 * The PPR message will be used in place of the SDTR and WDTR
17707 * messages to negotiate synchronous speed and offset, transfer
17708 * width, and protocol options.
17710 if (ADV_INQ_CLOCKING(inq
) & ADV_INQ_CLOCKING_DT_ONLY
) {
17711 AdvReadWordLram(iop_base
, ASC_MC_PPR_ABLE
,
17712 asc_dvc
->ppr_able
);
17713 asc_dvc
->ppr_able
|= tidmask
;
17714 AdvWriteWordLram(iop_base
, ASC_MC_PPR_ABLE
,
17715 asc_dvc
->ppr_able
);
17720 * If the EEPROM enabled Tag Queuing for the device and the
17721 * device supports Tag Queueing, then turn on the device's
17722 * 'tagqng_enable' bit in the microcode and set the microcode
17723 * maximum command count to the ADV_DVC_VAR 'max_dvc_qng'
17726 * Tag Queuing is disabled for the BIOS which runs in polled
17727 * mode and would see no benefit from Tag Queuing. Also by
17728 * disabling Tag Queuing in the BIOS devices with Tag Queuing
17729 * bugs will at least work with the BIOS.
17731 if ((asc_dvc
->tagqng_able
& tidmask
) && ADV_INQ_CMD_QUEUE(inq
)) {
17732 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, cfg_word
);
17733 cfg_word
|= tidmask
;
17734 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
17737 AdvWriteByteLram(iop_base
,
17738 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
17739 asc_dvc
->max_dvc_qng
);
17744 static struct Scsi_Host
*__devinit
17745 advansys_board_found(int iop
, struct device
*dev
, int bus_type
)
17747 struct Scsi_Host
*shost
;
17748 struct pci_dev
*pdev
= bus_type
== ASC_IS_PCI
? to_pci_dev(dev
) : NULL
;
17749 asc_board_t
*boardp
;
17750 ASC_DVC_VAR
*asc_dvc_varp
= NULL
;
17751 ADV_DVC_VAR
*adv_dvc_varp
= NULL
;
17752 adv_sgblk_t
*sgp
= NULL
;
17755 ADV_PADDR pci_memory_address
;
17756 int warn_code
, err_code
;
17762 * Register the adapter, get its configuration, and
17765 ASC_DBG(2, "advansys_board_found: scsi_register()\n");
17766 shost
= scsi_register(&driver_template
, sizeof(asc_board_t
));
17771 /* Save a pointer to the Scsi_Host of each board found. */
17772 asc_host
[asc_board_count
++] = shost
;
17774 /* Initialize private per board data */
17775 boardp
= ASC_BOARDP(shost
);
17776 memset(boardp
, 0, sizeof(asc_board_t
));
17777 boardp
->id
= asc_board_count
- 1;
17779 /* Initialize spinlock. */
17780 spin_lock_init(&boardp
->lock
);
17783 * Handle both narrow and wide boards.
17785 * If a Wide board was detected, set the board structure
17786 * wide board flag. Set-up the board structure based on
17790 if (bus_type
== ASC_IS_PCI
&&
17791 (pdev
->device
== PCI_DEVICE_ID_ASP_ABP940UW
||
17792 pdev
->device
== PCI_DEVICE_ID_38C0800_REV1
||
17793 pdev
->device
== PCI_DEVICE_ID_38C1600_REV1
)) {
17794 boardp
->flags
|= ASC_IS_WIDE_BOARD
;
17796 #endif /* CONFIG_PCI */
17798 if (ASC_NARROW_BOARD(boardp
)) {
17799 ASC_DBG(1, "advansys_board_found: narrow board\n");
17800 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
17801 asc_dvc_varp
->bus_type
= bus_type
;
17802 asc_dvc_varp
->drv_ptr
= boardp
;
17803 asc_dvc_varp
->cfg
= &boardp
->dvc_cfg
.asc_dvc_cfg
;
17804 asc_dvc_varp
->cfg
->overrun_buf
= &overrun_buf
[0];
17805 asc_dvc_varp
->iop_base
= iop
;
17806 asc_dvc_varp
->isr_callback
= asc_isr_callback
;
17808 ASC_DBG(1, "advansys_board_found: wide board\n");
17809 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
17810 adv_dvc_varp
->drv_ptr
= boardp
;
17811 adv_dvc_varp
->cfg
= &boardp
->dvc_cfg
.adv_dvc_cfg
;
17812 adv_dvc_varp
->isr_callback
= adv_isr_callback
;
17813 adv_dvc_varp
->async_callback
= adv_async_callback
;
17815 if (pdev
->device
== PCI_DEVICE_ID_ASP_ABP940UW
) {
17816 ASC_DBG(1, "advansys_board_found: ASC-3550\n");
17817 adv_dvc_varp
->chip_type
= ADV_CHIP_ASC3550
;
17818 } else if (pdev
->device
== PCI_DEVICE_ID_38C0800_REV1
) {
17819 ASC_DBG(1, "advansys_board_found: ASC-38C0800\n");
17820 adv_dvc_varp
->chip_type
= ADV_CHIP_ASC38C0800
;
17822 ASC_DBG(1, "advansys_board_found: ASC-38C1600\n");
17823 adv_dvc_varp
->chip_type
= ADV_CHIP_ASC38C1600
;
17825 #endif /* CONFIG_PCI */
17828 * Map the board's registers into virtual memory for
17829 * PCI slave access. Only memory accesses are used to
17830 * access the board's registers.
17832 * Note: The PCI register base address is not always
17833 * page aligned, but the address passed to ioremap()
17834 * must be page aligned. It is guaranteed that the
17835 * PCI register base address will not cross a page
17838 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
17839 iolen
= ADV_3550_IOLEN
;
17840 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
17841 iolen
= ADV_38C0800_IOLEN
;
17843 iolen
= ADV_38C1600_IOLEN
;
17846 pci_memory_address
= pci_resource_start(pdev
, 1);
17848 "advansys_board_found: pci_memory_address: 0x%lx\n",
17849 (ulong
)pci_memory_address
);
17850 if ((boardp
->ioremap_addr
=
17851 ioremap(pci_memory_address
& PAGE_MASK
, PAGE_SIZE
)) == 0) {
17853 ("advansys_board_found: board %d: ioremap(%x, %d) returned NULL\n",
17854 boardp
->id
, pci_memory_address
, iolen
);
17855 scsi_unregister(shost
);
17860 "advansys_board_found: ioremap_addr: 0x%lx\n",
17861 (ulong
)boardp
->ioremap_addr
);
17862 adv_dvc_varp
->iop_base
= (AdvPortAddr
)
17863 (boardp
->ioremap_addr
+
17864 (pci_memory_address
- (pci_memory_address
& PAGE_MASK
)));
17866 "advansys_board_found: iop_base: 0x%lx\n",
17867 adv_dvc_varp
->iop_base
);
17868 #endif /* CONFIG_PCI */
17871 * Even though it isn't used to access wide boards, other
17872 * than for the debug line below, save I/O Port address so
17873 * that it can be reported.
17875 boardp
->ioport
= iop
;
17878 "advansys_board_found: iopb_chip_id_1 0x%x, iopw_chip_id_0 0x%x\n",
17879 (ushort
)inp(iop
+ 1), (ushort
)inpw(iop
));
17882 #ifdef CONFIG_PROC_FS
17884 * Allocate buffer for printing information from
17885 * /proc/scsi/advansys/[0...].
17887 if ((boardp
->prtbuf
= kmalloc(ASC_PRTBUF_SIZE
, GFP_ATOMIC
)) == NULL
) {
17889 ("advansys_board_found: board %d: kmalloc(%d, %d) returned NULL\n",
17890 boardp
->id
, ASC_PRTBUF_SIZE
, GFP_ATOMIC
);
17891 scsi_unregister(shost
);
17895 #endif /* CONFIG_PROC_FS */
17897 if (ASC_NARROW_BOARD(boardp
)) {
17898 asc_dvc_varp
->cfg
->dev
= dev
;
17900 * Set the board bus type and PCI IRQ before
17901 * calling AscInitGetConfig().
17903 switch (asc_dvc_varp
->bus_type
) {
17906 shost
->unchecked_isa_dma
= TRUE
;
17910 shost
->unchecked_isa_dma
= FALSE
;
17914 shost
->unchecked_isa_dma
= FALSE
;
17915 share_irq
= IRQF_SHARED
;
17917 #endif /* CONFIG_ISA */
17920 shost
->irq
= asc_dvc_varp
->irq_no
= pdev
->irq
;
17921 asc_dvc_varp
->cfg
->pci_slot_info
=
17922 ASC_PCI_MKID(pdev
->bus
->number
,
17923 PCI_SLOT(pdev
->devfn
),
17924 PCI_FUNC(pdev
->devfn
));
17925 shost
->unchecked_isa_dma
= FALSE
;
17926 share_irq
= IRQF_SHARED
;
17928 #endif /* CONFIG_PCI */
17931 ("advansys_board_found: board %d: unknown adapter type: %d\n",
17932 boardp
->id
, asc_dvc_varp
->bus_type
);
17933 shost
->unchecked_isa_dma
= TRUE
;
17938 adv_dvc_varp
->cfg
->dev
= dev
;
17940 * For Wide boards set PCI information before calling
17941 * AdvInitGetConfig().
17944 shost
->irq
= adv_dvc_varp
->irq_no
= pdev
->irq
;
17945 adv_dvc_varp
->cfg
->pci_slot_info
=
17946 ASC_PCI_MKID(pdev
->bus
->number
,
17947 PCI_SLOT(pdev
->devfn
),
17948 PCI_FUNC(pdev
->devfn
));
17949 shost
->unchecked_isa_dma
= FALSE
;
17950 share_irq
= IRQF_SHARED
;
17951 #endif /* CONFIG_PCI */
17955 * Read the board configuration.
17957 if (ASC_NARROW_BOARD(boardp
)) {
17959 * NOTE: AscInitGetConfig() may change the board's
17960 * bus_type value. The bus_type value should no
17961 * longer be used. If the bus_type field must be
17962 * referenced only use the bit-wise AND operator "&".
17964 ASC_DBG(2, "advansys_board_found: AscInitGetConfig()\n");
17965 switch (ret
= AscInitGetConfig(asc_dvc_varp
)) {
17966 case 0: /* No error */
17968 case ASC_WARN_IO_PORT_ROTATE
:
17970 ("AscInitGetConfig: board %d: I/O port address modified\n",
17973 case ASC_WARN_AUTO_CONFIG
:
17975 ("AscInitGetConfig: board %d: I/O port increment switch enabled\n",
17978 case ASC_WARN_EEPROM_CHKSUM
:
17980 ("AscInitGetConfig: board %d: EEPROM checksum error\n",
17983 case ASC_WARN_IRQ_MODIFIED
:
17985 ("AscInitGetConfig: board %d: IRQ modified\n",
17988 case ASC_WARN_CMD_QNG_CONFLICT
:
17990 ("AscInitGetConfig: board %d: tag queuing enabled w/o disconnects\n",
17995 ("AscInitGetConfig: board %d: unknown warning: 0x%x\n",
17999 if ((err_code
= asc_dvc_varp
->err_code
) != 0) {
18001 ("AscInitGetConfig: board %d error: init_state 0x%x, err_code 0x%x\n",
18003 asc_dvc_varp
->init_state
, asc_dvc_varp
->err_code
);
18006 ASC_DBG(2, "advansys_board_found: AdvInitGetConfig()\n");
18007 if ((ret
= AdvInitGetConfig(adv_dvc_varp
)) != 0) {
18009 ("AdvInitGetConfig: board %d: warning: 0x%x\n",
18012 if ((err_code
= adv_dvc_varp
->err_code
) != 0) {
18014 ("AdvInitGetConfig: board %d error: err_code 0x%x\n",
18015 boardp
->id
, adv_dvc_varp
->err_code
);
18019 if (err_code
!= 0) {
18020 #ifdef CONFIG_PROC_FS
18021 kfree(boardp
->prtbuf
);
18022 #endif /* CONFIG_PROC_FS */
18023 scsi_unregister(shost
);
18029 * Save the EEPROM configuration so that it can be displayed
18030 * from /proc/scsi/advansys/[0...].
18032 if (ASC_NARROW_BOARD(boardp
)) {
18037 * Set the adapter's target id bit in the 'init_tidmask' field.
18039 boardp
->init_tidmask
|=
18040 ADV_TID_TO_TIDMASK(asc_dvc_varp
->cfg
->chip_scsi_id
);
18043 * Save EEPROM settings for the board.
18045 ep
= &boardp
->eep_config
.asc_eep
;
18047 ep
->init_sdtr
= asc_dvc_varp
->cfg
->sdtr_enable
;
18048 ep
->disc_enable
= asc_dvc_varp
->cfg
->disc_enable
;
18049 ep
->use_cmd_qng
= asc_dvc_varp
->cfg
->cmd_qng_enabled
;
18050 ASC_EEP_SET_DMA_SPD(ep
, asc_dvc_varp
->cfg
->isa_dma_speed
);
18051 ep
->start_motor
= asc_dvc_varp
->start_motor
;
18052 ep
->cntl
= asc_dvc_varp
->dvc_cntl
;
18053 ep
->no_scam
= asc_dvc_varp
->no_scam
;
18054 ep
->max_total_qng
= asc_dvc_varp
->max_total_qng
;
18055 ASC_EEP_SET_CHIP_ID(ep
, asc_dvc_varp
->cfg
->chip_scsi_id
);
18056 /* 'max_tag_qng' is set to the same value for every device. */
18057 ep
->max_tag_qng
= asc_dvc_varp
->cfg
->max_tag_qng
[0];
18058 ep
->adapter_info
[0] = asc_dvc_varp
->cfg
->adapter_info
[0];
18059 ep
->adapter_info
[1] = asc_dvc_varp
->cfg
->adapter_info
[1];
18060 ep
->adapter_info
[2] = asc_dvc_varp
->cfg
->adapter_info
[2];
18061 ep
->adapter_info
[3] = asc_dvc_varp
->cfg
->adapter_info
[3];
18062 ep
->adapter_info
[4] = asc_dvc_varp
->cfg
->adapter_info
[4];
18063 ep
->adapter_info
[5] = asc_dvc_varp
->cfg
->adapter_info
[5];
18066 * Modify board configuration.
18068 ASC_DBG(2, "advansys_board_found: AscInitSetConfig()\n");
18069 switch (ret
= AscInitSetConfig(asc_dvc_varp
)) {
18070 case 0: /* No error. */
18072 case ASC_WARN_IO_PORT_ROTATE
:
18074 ("AscInitSetConfig: board %d: I/O port address modified\n",
18077 case ASC_WARN_AUTO_CONFIG
:
18079 ("AscInitSetConfig: board %d: I/O port increment switch enabled\n",
18082 case ASC_WARN_EEPROM_CHKSUM
:
18084 ("AscInitSetConfig: board %d: EEPROM checksum error\n",
18087 case ASC_WARN_IRQ_MODIFIED
:
18089 ("AscInitSetConfig: board %d: IRQ modified\n",
18092 case ASC_WARN_CMD_QNG_CONFLICT
:
18094 ("AscInitSetConfig: board %d: tag queuing w/o disconnects\n",
18099 ("AscInitSetConfig: board %d: unknown warning: 0x%x\n",
18103 if (asc_dvc_varp
->err_code
!= 0) {
18105 ("AscInitSetConfig: board %d error: init_state 0x%x, err_code 0x%x\n",
18107 asc_dvc_varp
->init_state
, asc_dvc_varp
->err_code
);
18108 #ifdef CONFIG_PROC_FS
18109 kfree(boardp
->prtbuf
);
18110 #endif /* CONFIG_PROC_FS */
18111 scsi_unregister(shost
);
18117 * Finish initializing the 'Scsi_Host' structure.
18119 /* AscInitSetConfig() will set the IRQ for non-PCI boards. */
18120 if ((asc_dvc_varp
->bus_type
& ASC_IS_PCI
) == 0) {
18121 shost
->irq
= asc_dvc_varp
->irq_no
;
18124 ADVEEP_3550_CONFIG
*ep_3550
;
18125 ADVEEP_38C0800_CONFIG
*ep_38C0800
;
18126 ADVEEP_38C1600_CONFIG
*ep_38C1600
;
18129 * Save Wide EEP Configuration Information.
18131 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
18132 ep_3550
= &boardp
->eep_config
.adv_3550_eep
;
18134 ep_3550
->adapter_scsi_id
= adv_dvc_varp
->chip_scsi_id
;
18135 ep_3550
->max_host_qng
= adv_dvc_varp
->max_host_qng
;
18136 ep_3550
->max_dvc_qng
= adv_dvc_varp
->max_dvc_qng
;
18137 ep_3550
->termination
= adv_dvc_varp
->cfg
->termination
;
18138 ep_3550
->disc_enable
= adv_dvc_varp
->cfg
->disc_enable
;
18139 ep_3550
->bios_ctrl
= adv_dvc_varp
->bios_ctrl
;
18140 ep_3550
->wdtr_able
= adv_dvc_varp
->wdtr_able
;
18141 ep_3550
->sdtr_able
= adv_dvc_varp
->sdtr_able
;
18142 ep_3550
->ultra_able
= adv_dvc_varp
->ultra_able
;
18143 ep_3550
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18144 ep_3550
->start_motor
= adv_dvc_varp
->start_motor
;
18145 ep_3550
->scsi_reset_delay
=
18146 adv_dvc_varp
->scsi_reset_wait
;
18147 ep_3550
->serial_number_word1
=
18148 adv_dvc_varp
->cfg
->serial1
;
18149 ep_3550
->serial_number_word2
=
18150 adv_dvc_varp
->cfg
->serial2
;
18151 ep_3550
->serial_number_word3
=
18152 adv_dvc_varp
->cfg
->serial3
;
18153 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
18154 ep_38C0800
= &boardp
->eep_config
.adv_38C0800_eep
;
18156 ep_38C0800
->adapter_scsi_id
=
18157 adv_dvc_varp
->chip_scsi_id
;
18158 ep_38C0800
->max_host_qng
= adv_dvc_varp
->max_host_qng
;
18159 ep_38C0800
->max_dvc_qng
= adv_dvc_varp
->max_dvc_qng
;
18160 ep_38C0800
->termination_lvd
=
18161 adv_dvc_varp
->cfg
->termination
;
18162 ep_38C0800
->disc_enable
=
18163 adv_dvc_varp
->cfg
->disc_enable
;
18164 ep_38C0800
->bios_ctrl
= adv_dvc_varp
->bios_ctrl
;
18165 ep_38C0800
->wdtr_able
= adv_dvc_varp
->wdtr_able
;
18166 ep_38C0800
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18167 ep_38C0800
->sdtr_speed1
= adv_dvc_varp
->sdtr_speed1
;
18168 ep_38C0800
->sdtr_speed2
= adv_dvc_varp
->sdtr_speed2
;
18169 ep_38C0800
->sdtr_speed3
= adv_dvc_varp
->sdtr_speed3
;
18170 ep_38C0800
->sdtr_speed4
= adv_dvc_varp
->sdtr_speed4
;
18171 ep_38C0800
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18172 ep_38C0800
->start_motor
= adv_dvc_varp
->start_motor
;
18173 ep_38C0800
->scsi_reset_delay
=
18174 adv_dvc_varp
->scsi_reset_wait
;
18175 ep_38C0800
->serial_number_word1
=
18176 adv_dvc_varp
->cfg
->serial1
;
18177 ep_38C0800
->serial_number_word2
=
18178 adv_dvc_varp
->cfg
->serial2
;
18179 ep_38C0800
->serial_number_word3
=
18180 adv_dvc_varp
->cfg
->serial3
;
18182 ep_38C1600
= &boardp
->eep_config
.adv_38C1600_eep
;
18184 ep_38C1600
->adapter_scsi_id
=
18185 adv_dvc_varp
->chip_scsi_id
;
18186 ep_38C1600
->max_host_qng
= adv_dvc_varp
->max_host_qng
;
18187 ep_38C1600
->max_dvc_qng
= adv_dvc_varp
->max_dvc_qng
;
18188 ep_38C1600
->termination_lvd
=
18189 adv_dvc_varp
->cfg
->termination
;
18190 ep_38C1600
->disc_enable
=
18191 adv_dvc_varp
->cfg
->disc_enable
;
18192 ep_38C1600
->bios_ctrl
= adv_dvc_varp
->bios_ctrl
;
18193 ep_38C1600
->wdtr_able
= adv_dvc_varp
->wdtr_able
;
18194 ep_38C1600
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18195 ep_38C1600
->sdtr_speed1
= adv_dvc_varp
->sdtr_speed1
;
18196 ep_38C1600
->sdtr_speed2
= adv_dvc_varp
->sdtr_speed2
;
18197 ep_38C1600
->sdtr_speed3
= adv_dvc_varp
->sdtr_speed3
;
18198 ep_38C1600
->sdtr_speed4
= adv_dvc_varp
->sdtr_speed4
;
18199 ep_38C1600
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18200 ep_38C1600
->start_motor
= adv_dvc_varp
->start_motor
;
18201 ep_38C1600
->scsi_reset_delay
=
18202 adv_dvc_varp
->scsi_reset_wait
;
18203 ep_38C1600
->serial_number_word1
=
18204 adv_dvc_varp
->cfg
->serial1
;
18205 ep_38C1600
->serial_number_word2
=
18206 adv_dvc_varp
->cfg
->serial2
;
18207 ep_38C1600
->serial_number_word3
=
18208 adv_dvc_varp
->cfg
->serial3
;
18212 * Set the adapter's target id bit in the 'init_tidmask' field.
18214 boardp
->init_tidmask
|=
18215 ADV_TID_TO_TIDMASK(adv_dvc_varp
->chip_scsi_id
);
18218 * Finish initializing the 'Scsi_Host' structure.
18220 shost
->irq
= adv_dvc_varp
->irq_no
;
18224 * Channels are numbered beginning with 0. For AdvanSys one host
18225 * structure supports one channel. Multi-channel boards have a
18226 * separate host structure for each channel.
18228 shost
->max_channel
= 0;
18229 if (ASC_NARROW_BOARD(boardp
)) {
18230 shost
->max_id
= ASC_MAX_TID
+ 1;
18231 shost
->max_lun
= ASC_MAX_LUN
+ 1;
18233 shost
->io_port
= asc_dvc_varp
->iop_base
;
18234 boardp
->asc_n_io_port
= ASC_IOADR_GAP
;
18235 shost
->this_id
= asc_dvc_varp
->cfg
->chip_scsi_id
;
18237 /* Set maximum number of queues the adapter can handle. */
18238 shost
->can_queue
= asc_dvc_varp
->max_total_qng
;
18240 shost
->max_id
= ADV_MAX_TID
+ 1;
18241 shost
->max_lun
= ADV_MAX_LUN
+ 1;
18244 * Save the I/O Port address and length even though
18245 * I/O ports are not used to access Wide boards.
18246 * Instead the Wide boards are accessed with
18247 * PCI Memory Mapped I/O.
18249 shost
->io_port
= iop
;
18250 boardp
->asc_n_io_port
= iolen
;
18252 shost
->this_id
= adv_dvc_varp
->chip_scsi_id
;
18254 /* Set maximum number of queues the adapter can handle. */
18255 shost
->can_queue
= adv_dvc_varp
->max_host_qng
;
18259 * 'n_io_port' currently is one byte.
18261 * Set a value to 'n_io_port', but never referenced it because
18262 * it may be truncated.
18264 shost
->n_io_port
= boardp
->asc_n_io_port
<= 255 ?
18265 boardp
->asc_n_io_port
: 255;
18268 * Following v1.3.89, 'cmd_per_lun' is no longer needed
18269 * and should be set to zero.
18271 * But because of a bug introduced in v1.3.89 if the driver is
18272 * compiled as a module and 'cmd_per_lun' is zero, the Mid-Level
18273 * SCSI function 'allocate_device' will panic. To allow the driver
18274 * to work as a module in these kernels set 'cmd_per_lun' to 1.
18276 * Note: This is wrong. cmd_per_lun should be set to the depth
18277 * you want on untagged devices always.
18280 shost
->cmd_per_lun
= 1;
18282 shost->cmd_per_lun = 0;
18286 * Set the maximum number of scatter-gather elements the
18287 * adapter can handle.
18289 if (ASC_NARROW_BOARD(boardp
)) {
18291 * Allow two commands with 'sg_tablesize' scatter-gather
18292 * elements to be executed simultaneously. This value is
18293 * the theoretical hardware limit. It may be decreased
18296 shost
->sg_tablesize
=
18297 (((asc_dvc_varp
->max_total_qng
- 2) / 2) *
18298 ASC_SG_LIST_PER_Q
) + 1;
18300 shost
->sg_tablesize
= ADV_MAX_SG_LIST
;
18304 * The value of 'sg_tablesize' can not exceed the SCSI
18305 * mid-level driver definition of SG_ALL. SG_ALL also
18306 * must not be exceeded, because it is used to define the
18307 * size of the scatter-gather table in 'struct asc_sg_head'.
18309 if (shost
->sg_tablesize
> SG_ALL
) {
18310 shost
->sg_tablesize
= SG_ALL
;
18313 ASC_DBG1(1, "advansys_board_found: sg_tablesize: %d\n", shost
->sg_tablesize
);
18315 /* BIOS start address. */
18316 if (ASC_NARROW_BOARD(boardp
)) {
18317 shost
->base
= ((ulong
)
18318 AscGetChipBiosAddress(asc_dvc_varp
->
18320 asc_dvc_varp
->bus_type
));
18323 * Fill-in BIOS board variables. The Wide BIOS saves
18324 * information in LRAM that is used by the driver.
18326 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18327 BIOS_SIGNATURE
, boardp
->bios_signature
);
18328 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18329 BIOS_VERSION
, boardp
->bios_version
);
18330 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18331 BIOS_CODESEG
, boardp
->bios_codeseg
);
18332 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18333 BIOS_CODELEN
, boardp
->bios_codelen
);
18336 "advansys_board_found: bios_signature 0x%x, bios_version 0x%x\n",
18337 boardp
->bios_signature
, boardp
->bios_version
);
18340 "advansys_board_found: bios_codeseg 0x%x, bios_codelen 0x%x\n",
18341 boardp
->bios_codeseg
, boardp
->bios_codelen
);
18344 * If the BIOS saved a valid signature, then fill in
18345 * the BIOS code segment base address.
18347 if (boardp
->bios_signature
== 0x55AA) {
18349 * Convert x86 realmode code segment to a linear
18350 * address by shifting left 4.
18352 shost
->base
= ((ulong
)boardp
->bios_codeseg
<< 4);
18359 * Register Board Resources - I/O Port, DMA, IRQ
18363 * Register I/O port range.
18365 * For Wide boards the I/O ports are not used to access
18366 * the board, but request the region anyway.
18368 * 'shost->n_io_port' is not referenced, because it may be truncated.
18371 "advansys_board_found: request_region port 0x%lx, len 0x%x\n",
18372 (ulong
)shost
->io_port
, boardp
->asc_n_io_port
);
18373 if (request_region(shost
->io_port
, boardp
->asc_n_io_port
,
18374 "advansys") == NULL
) {
18376 ("advansys_board_found: board %d: request_region() failed, port 0x%lx, len 0x%x\n",
18377 boardp
->id
, (ulong
)shost
->io_port
, boardp
->asc_n_io_port
);
18378 #ifdef CONFIG_PROC_FS
18379 kfree(boardp
->prtbuf
);
18380 #endif /* CONFIG_PROC_FS */
18381 scsi_unregister(shost
);
18386 /* Register DMA Channel for Narrow boards. */
18387 shost
->dma_channel
= NO_ISA_DMA
; /* Default to no ISA DMA. */
18389 if (ASC_NARROW_BOARD(boardp
)) {
18390 /* Register DMA channel for ISA bus. */
18391 if (asc_dvc_varp
->bus_type
& ASC_IS_ISA
) {
18392 shost
->dma_channel
= asc_dvc_varp
->cfg
->isa_dma_channel
;
18394 request_dma(shost
->dma_channel
, "advansys")) != 0) {
18396 ("advansys_board_found: board %d: request_dma() %d failed %d\n",
18397 boardp
->id
, shost
->dma_channel
, ret
);
18398 release_region(shost
->io_port
,
18399 boardp
->asc_n_io_port
);
18400 #ifdef CONFIG_PROC_FS
18401 kfree(boardp
->prtbuf
);
18402 #endif /* CONFIG_PROC_FS */
18403 scsi_unregister(shost
);
18407 AscEnableIsaDma(shost
->dma_channel
);
18410 #endif /* CONFIG_ISA */
18412 /* Register IRQ Number. */
18413 ASC_DBG1(2, "advansys_board_found: request_irq() %d\n", shost
->irq
);
18415 ret
= request_irq(shost
->irq
, advansys_interrupt
, share_irq
,
18416 "advansys", shost
);
18419 if (ret
== -EBUSY
) {
18421 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x already in use.\n",
18422 boardp
->id
, shost
->irq
);
18423 } else if (ret
== -EINVAL
) {
18425 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x not valid.\n",
18426 boardp
->id
, shost
->irq
);
18429 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x failed with %d\n",
18430 boardp
->id
, shost
->irq
, ret
);
18432 release_region(shost
->io_port
, boardp
->asc_n_io_port
);
18433 iounmap(boardp
->ioremap_addr
);
18434 if (shost
->dma_channel
!= NO_ISA_DMA
) {
18435 free_dma(shost
->dma_channel
);
18437 #ifdef CONFIG_PROC_FS
18438 kfree(boardp
->prtbuf
);
18439 #endif /* CONFIG_PROC_FS */
18440 scsi_unregister(shost
);
18446 * Initialize board RISC chip and enable interrupts.
18448 if (ASC_NARROW_BOARD(boardp
)) {
18449 ASC_DBG(2, "advansys_board_found: AscInitAsc1000Driver()\n");
18450 warn_code
= AscInitAsc1000Driver(asc_dvc_varp
);
18451 err_code
= asc_dvc_varp
->err_code
;
18453 if (warn_code
|| err_code
) {
18455 ("advansys_board_found: board %d error: init_state 0x%x, warn 0x%x, error 0x%x\n",
18457 asc_dvc_varp
->init_state
, warn_code
, err_code
);
18462 adv_req_t
*reqp
= NULL
;
18466 * Allocate buffer carrier structures. The total size
18467 * is about 4 KB, so allocate all at once.
18469 carrp
= (ADV_CARR_T
*) kmalloc(ADV_CARRIER_BUFSIZE
, GFP_ATOMIC
);
18470 ASC_DBG1(1, "advansys_board_found: carrp 0x%lx\n", (ulong
)carrp
);
18472 if (carrp
== NULL
) {
18473 goto kmalloc_error
;
18477 * Allocate up to 'max_host_qng' request structures for
18478 * the Wide board. The total size is about 16 KB, so
18479 * allocate all at once. If the allocation fails decrement
18482 for (req_cnt
= adv_dvc_varp
->max_host_qng
;
18483 req_cnt
> 0; req_cnt
--) {
18485 reqp
= (adv_req_t
*)
18486 kmalloc(sizeof(adv_req_t
) * req_cnt
, GFP_ATOMIC
);
18489 "advansys_board_found: reqp 0x%lx, req_cnt %d, bytes %lu\n",
18490 (ulong
)reqp
, req_cnt
,
18491 (ulong
)sizeof(adv_req_t
) * req_cnt
);
18493 if (reqp
!= NULL
) {
18497 if (reqp
== NULL
) {
18498 goto kmalloc_error
;
18502 * Allocate up to ADV_TOT_SG_BLOCK request structures for
18503 * the Wide board. Each structure is about 136 bytes.
18505 boardp
->adv_sgblkp
= NULL
;
18506 for (sg_cnt
= 0; sg_cnt
< ADV_TOT_SG_BLOCK
; sg_cnt
++) {
18508 sgp
= (adv_sgblk_t
*)
18509 kmalloc(sizeof(adv_sgblk_t
), GFP_ATOMIC
);
18515 sgp
->next_sgblkp
= boardp
->adv_sgblkp
;
18516 boardp
->adv_sgblkp
= sgp
;
18520 "advansys_board_found: sg_cnt %d * %u = %u bytes\n",
18521 sg_cnt
, sizeof(adv_sgblk_t
),
18522 (unsigned)(sizeof(adv_sgblk_t
) * sg_cnt
));
18525 * If no request structures or scatter-gather structures could
18526 * be allocated, then return an error. Otherwise continue with
18530 if (carrp
== NULL
) {
18532 ("advansys_board_found: board %d error: failed to kmalloc() carrier buffer.\n",
18534 err_code
= ADV_ERROR
;
18535 } else if (reqp
== NULL
) {
18538 ("advansys_board_found: board %d error: failed to kmalloc() adv_req_t buffer.\n",
18540 err_code
= ADV_ERROR
;
18541 } else if (boardp
->adv_sgblkp
== NULL
) {
18545 ("advansys_board_found: board %d error: failed to kmalloc() adv_sgblk_t buffers.\n",
18547 err_code
= ADV_ERROR
;
18550 /* Save carrier buffer pointer. */
18551 boardp
->orig_carrp
= carrp
;
18554 * Save original pointer for kfree() in case the
18555 * driver is built as a module and can be unloaded.
18557 boardp
->orig_reqp
= reqp
;
18559 adv_dvc_varp
->carrier_buf
= carrp
;
18562 * Point 'adv_reqp' to the request structures and
18563 * link them together.
18566 reqp
[req_cnt
].next_reqp
= NULL
;
18567 for (; req_cnt
> 0; req_cnt
--) {
18568 reqp
[req_cnt
- 1].next_reqp
= &reqp
[req_cnt
];
18570 boardp
->adv_reqp
= &reqp
[0];
18572 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
18574 "advansys_board_found: AdvInitAsc3550Driver()\n");
18575 warn_code
= AdvInitAsc3550Driver(adv_dvc_varp
);
18576 } else if (adv_dvc_varp
->chip_type
==
18577 ADV_CHIP_ASC38C0800
) {
18579 "advansys_board_found: AdvInitAsc38C0800Driver()\n");
18581 AdvInitAsc38C0800Driver(adv_dvc_varp
);
18584 "advansys_board_found: AdvInitAsc38C1600Driver()\n");
18586 AdvInitAsc38C1600Driver(adv_dvc_varp
);
18588 err_code
= adv_dvc_varp
->err_code
;
18590 if (warn_code
|| err_code
) {
18592 ("advansys_board_found: board %d error: warn 0x%x, error 0x%x\n",
18593 boardp
->id
, warn_code
, err_code
);
18598 if (err_code
!= 0) {
18599 release_region(shost
->io_port
, boardp
->asc_n_io_port
);
18600 if (ASC_WIDE_BOARD(boardp
)) {
18601 iounmap(boardp
->ioremap_addr
);
18602 kfree(boardp
->orig_carrp
);
18603 boardp
->orig_carrp
= NULL
;
18604 if (boardp
->orig_reqp
) {
18605 kfree(boardp
->orig_reqp
);
18606 boardp
->orig_reqp
= boardp
->adv_reqp
= NULL
;
18608 while ((sgp
= boardp
->adv_sgblkp
) != NULL
) {
18609 boardp
->adv_sgblkp
= sgp
->next_sgblkp
;
18613 if (shost
->dma_channel
!= NO_ISA_DMA
) {
18614 free_dma(shost
->dma_channel
);
18616 #ifdef CONFIG_PROC_FS
18617 kfree(boardp
->prtbuf
);
18618 #endif /* CONFIG_PROC_FS */
18619 free_irq(shost
->irq
, shost
);
18620 scsi_unregister(shost
);
18624 ASC_DBG_PRT_SCSI_HOST(2, shost
);
18630 * advansys_detect()
18632 * Detect function for AdvanSys adapters.
18634 * Argument is a pointer to the host driver's scsi_hosts entry.
18636 * Return number of adapters found.
18638 * Note: Because this function is called during system initialization
18639 * it must not call SCSI mid-level functions including scsi_malloc()
18642 static int __init
advansys_detect(struct scsi_host_template
*tpnt
)
18644 static int detect_called
= ASC_FALSE
;
18648 struct device
*dev
= NULL
;
18650 int pci_init_search
= 0;
18651 struct pci_dev
*pci_devicep
[ASC_NUM_BOARD_SUPPORTED
];
18652 int pci_card_cnt_max
= 0;
18653 int pci_card_cnt
= 0;
18654 struct pci_dev
*pdev
= NULL
;
18655 int pci_device_id_cnt
= 0;
18656 unsigned int pci_device_id
[ASC_PCI_DEVICE_ID_CNT
] = {
18657 PCI_DEVICE_ID_ASP_1200A
,
18658 PCI_DEVICE_ID_ASP_ABP940
,
18659 PCI_DEVICE_ID_ASP_ABP940U
,
18660 PCI_DEVICE_ID_ASP_ABP940UW
,
18661 PCI_DEVICE_ID_38C0800_REV1
,
18662 PCI_DEVICE_ID_38C1600_REV1
18664 #endif /* CONFIG_PCI */
18666 if (detect_called
== ASC_FALSE
) {
18667 detect_called
= ASC_TRUE
;
18670 ("AdvanSys SCSI: advansys_detect() multiple calls ignored\n");
18674 ASC_DBG(1, "advansys_detect: begin\n");
18676 asc_board_count
= 0;
18679 * If I/O port probing has been modified, then verify and
18680 * clean-up the 'asc_ioport' list.
18682 if (asc_iopflag
== ASC_TRUE
) {
18683 for (ioport
= 0; ioport
< ASC_NUM_IOPORT_PROBE
; ioport
++) {
18684 ASC_DBG2(1, "advansys_detect: asc_ioport[%d] 0x%x\n",
18685 ioport
, asc_ioport
[ioport
]);
18686 if (asc_ioport
[ioport
] != 0) {
18687 for (iop
= 0; iop
< ASC_IOADR_TABLE_MAX_IX
;
18689 if (_asc_def_iop_base
[iop
] ==
18690 asc_ioport
[ioport
]) {
18694 if (iop
== ASC_IOADR_TABLE_MAX_IX
) {
18696 ("AdvanSys SCSI: specified I/O Port 0x%X is invalid\n",
18697 asc_ioport
[ioport
]);
18698 asc_ioport
[ioport
] = 0;
18705 for (bus
= 0; bus
< ASC_NUM_BUS
; bus
++) {
18707 ASC_DBG2(1, "advansys_detect: bus search type %d (%s)\n",
18708 bus
, asc_bus_name
[bus
]);
18711 while (asc_board_count
< ASC_NUM_BOARD_SUPPORTED
) {
18713 ASC_DBG1(2, "advansys_detect: asc_board_count %d\n",
18716 switch (asc_bus
[bus
]) {
18720 if (asc_iopflag
== ASC_FALSE
) {
18722 AscSearchIOPortAddr(iop
,
18726 * ISA and VL I/O port scanning has either been
18727 * eliminated or limited to selected ports on
18728 * the LILO command line, /etc/lilo.conf, or
18729 * by setting variables when the module was loaded.
18732 "advansys_detect: I/O port scanning modified\n");
18735 for (; ioport
< ASC_NUM_IOPORT_PROBE
;
18738 asc_ioport
[ioport
]) != 0) {
18744 "advansys_detect: probing I/O port 0x%x...\n",
18746 if (!request_region
18747 (iop
, ASC_IOADR_GAP
,
18750 ("AdvanSys SCSI: specified I/O Port 0x%X is busy\n",
18752 /* Don't try this I/O port twice. */
18753 asc_ioport
[ioport
] = 0;
18754 goto ioport_try_again
;
18755 } else if (AscFindSignature(iop
)
18758 ("AdvanSys SCSI: specified I/O Port 0x%X has no adapter\n",
18760 /* Don't try this I/O port twice. */
18761 release_region(iop
,
18763 asc_ioport
[ioport
] = 0;
18764 goto ioport_try_again
;
18767 * If this isn't an ISA board, then it must be
18768 * a VL board. If currently looking an ISA
18769 * board is being looked for then try for
18770 * another ISA board in 'asc_ioport'.
18772 if (asc_bus
[bus
] ==
18778 ASC_CHIP_VER_ISA_BIT
)
18781 * Don't clear 'asc_ioport[ioport]'. Try
18782 * this board again for VL. Increment
18783 * 'ioport' past this board.
18789 goto ioport_try_again
;
18793 * This board appears good, don't try the I/O port
18794 * again by clearing its value. Increment 'ioport'
18795 * for the next iteration.
18797 asc_ioport
[ioport
++] = 0;
18800 #endif /* CONFIG_ISA */
18805 iop
= AscSearchIOPortAddr(iop
, asc_bus
[bus
]);
18806 #endif /* CONFIG_ISA */
18811 if (pci_init_search
== 0) {
18814 pci_init_search
= 1;
18816 /* Find all PCI cards. */
18817 while (pci_device_id_cnt
<
18818 ASC_PCI_DEVICE_ID_CNT
) {
18821 (PCI_VENDOR_ID_ASP
,
18823 [pci_device_id_cnt
],
18825 pci_device_id_cnt
++;
18827 if (pci_enable_device
18830 [pci_card_cnt_max
++]
18837 * Sort PCI cards in ascending order by PCI Bus, Slot,
18838 * and Device Number.
18840 for (i
= 0; i
< pci_card_cnt_max
- 1;
18843 j
< pci_card_cnt_max
;
18845 if ((pci_devicep
[j
]->
18876 if (pci_card_cnt
== pci_card_cnt_max
) {
18879 pdev
= pci_devicep
[pci_card_cnt
];
18882 "advansys_detect: devfn %d, bus number %d\n",
18884 pdev
->bus
->number
);
18885 iop
= pci_resource_start(pdev
, 0);
18887 "advansys_detect: vendorID %X, deviceID %X\n",
18891 "advansys_detect: iop %X, irqLine %d\n",
18897 #endif /* CONFIG_PCI */
18902 ("advansys_detect: unknown bus type: %d\n",
18906 ASC_DBG1(1, "advansys_detect: iop 0x%x\n", iop
);
18909 * Adapter not found, try next bus type.
18915 advansys_board_found(iop
, dev
, asc_bus
[bus
]);
18919 ASC_DBG1(1, "advansys_detect: done: asc_board_count %d\n",
18921 return asc_board_count
;
18925 * advansys_release()
18927 * Release resources allocated for a single AdvanSys adapter.
18929 static int advansys_release(struct Scsi_Host
*shost
)
18931 asc_board_t
*boardp
;
18933 ASC_DBG(1, "advansys_release: begin\n");
18934 boardp
= ASC_BOARDP(shost
);
18935 free_irq(shost
->irq
, shost
);
18936 if (shost
->dma_channel
!= NO_ISA_DMA
) {
18937 ASC_DBG(1, "advansys_release: free_dma()\n");
18938 free_dma(shost
->dma_channel
);
18940 release_region(shost
->io_port
, boardp
->asc_n_io_port
);
18941 if (ASC_WIDE_BOARD(boardp
)) {
18942 adv_sgblk_t
*sgp
= NULL
;
18944 iounmap(boardp
->ioremap_addr
);
18945 kfree(boardp
->orig_carrp
);
18946 boardp
->orig_carrp
= NULL
;
18947 if (boardp
->orig_reqp
) {
18948 kfree(boardp
->orig_reqp
);
18949 boardp
->orig_reqp
= boardp
->adv_reqp
= NULL
;
18951 while ((sgp
= boardp
->adv_sgblkp
) != NULL
) {
18952 boardp
->adv_sgblkp
= sgp
->next_sgblkp
;
18956 #ifdef CONFIG_PROC_FS
18957 ASC_ASSERT(boardp
->prtbuf
!= NULL
);
18958 kfree(boardp
->prtbuf
);
18959 #endif /* CONFIG_PROC_FS */
18960 scsi_unregister(shost
);
18961 ASC_DBG(1, "advansys_release: end\n");
18966 /* PCI Devices supported by this driver */
18967 static struct pci_device_id advansys_pci_tbl
[] __devinitdata
= {
18968 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_1200A
,
18969 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18970 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_ABP940
,
18971 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18972 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_ABP940U
,
18973 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18974 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_ABP940UW
,
18975 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18976 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_38C0800_REV1
,
18977 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18978 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_38C1600_REV1
,
18979 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18983 MODULE_DEVICE_TABLE(pci
, advansys_pci_tbl
);
18984 #endif /* CONFIG_PCI */
18986 MODULE_LICENSE("GPL");