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Pull mca-cleanup into release branch
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / s390 / cio / qdio.c
1 /*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33 #include <linux/config.h>
34 #include <linux/module.h>
35 #include <linux/init.h>
36
37 #include <linux/slab.h>
38 #include <linux/kernel.h>
39 #include <linux/proc_fs.h>
40 #include <linux/timer.h>
41
42 #include <asm/ccwdev.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/semaphore.h>
46 #include <asm/timex.h>
47
48 #include <asm/debug.h>
49 #include <asm/qdio.h>
50
51 #include "cio.h"
52 #include "css.h"
53 #include "device.h"
54 #include "airq.h"
55 #include "qdio.h"
56 #include "ioasm.h"
57 #include "chsc.h"
58
59 /****************** MODULE PARAMETER VARIABLES ********************/
60 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
61 MODULE_DESCRIPTION("QDIO base support version 2, " \
62 "Copyright 2000 IBM Corporation");
63 MODULE_LICENSE("GPL");
64
65 /******************** HERE WE GO ***********************************/
66
67 static const char version[] = "QDIO base support version 2";
68
69 #ifdef QDIO_PERFORMANCE_STATS
70 static int proc_perf_file_registration;
71 static unsigned long i_p_c, i_p_nc, o_p_c, o_p_nc, ii_p_c, ii_p_nc;
72 static struct qdio_perf_stats perf_stats;
73 #endif /* QDIO_PERFORMANCE_STATS */
74
75 static int hydra_thinints;
76 static int is_passthrough = 0;
77 static int omit_svs;
78
79 static int indicator_used[INDICATORS_PER_CACHELINE];
80 static __u32 * volatile indicators;
81 static __u32 volatile spare_indicator;
82 static atomic_t spare_indicator_usecount;
83
84 static debug_info_t *qdio_dbf_setup;
85 static debug_info_t *qdio_dbf_sbal;
86 static debug_info_t *qdio_dbf_trace;
87 static debug_info_t *qdio_dbf_sense;
88 #ifdef CONFIG_QDIO_DEBUG
89 static debug_info_t *qdio_dbf_slsb_out;
90 static debug_info_t *qdio_dbf_slsb_in;
91 #endif /* CONFIG_QDIO_DEBUG */
92
93 /* iQDIO stuff: */
94 static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
95 during a while loop */
96 static DEFINE_SPINLOCK(ttiq_list_lock);
97 static int register_thinint_result;
98 static void tiqdio_tl(unsigned long);
99 static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
100
101 /* not a macro, as one of the arguments is atomic_read */
102 static inline int
103 qdio_min(int a,int b)
104 {
105 if (a<b)
106 return a;
107 else
108 return b;
109 }
110
111 /***************** SCRUBBER HELPER ROUTINES **********************/
112
113 static inline __u64
114 qdio_get_micros(void)
115 {
116 return (get_clock() >> 10); /* time>>12 is microseconds */
117 }
118
119 /*
120 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
121 * the q in any case, so that we'll not be interrupted when we are in
122 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
123 * ever works (last famous words)
124 */
125 static inline int
126 qdio_reserve_q(struct qdio_q *q)
127 {
128 return atomic_add_return(1,&q->use_count) - 1;
129 }
130
131 static inline void
132 qdio_release_q(struct qdio_q *q)
133 {
134 atomic_dec(&q->use_count);
135 }
136
137 /*check ccq */
138 static inline int
139 qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
140 {
141 char dbf_text[15];
142
143 if (ccq == 0 || ccq == 32 || ccq == 96)
144 return 0;
145 if (ccq == 97)
146 return 1;
147 /*notify devices immediately*/
148 sprintf(dbf_text,"%d", ccq);
149 QDIO_DBF_TEXT2(1,trace,dbf_text);
150 return -EIO;
151 }
152 /* EQBS: extract buffer states */
153 static inline int
154 qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
155 unsigned int *start, unsigned int *cnt)
156 {
157 struct qdio_irq *irq;
158 unsigned int tmp_cnt, q_no, ccq;
159 int rc ;
160 char dbf_text[15];
161
162 ccq = 0;
163 tmp_cnt = *cnt;
164 irq = (struct qdio_irq*)q->irq_ptr;
165 q_no = q->q_no;
166 if(!q->is_input_q)
167 q_no += irq->no_input_qs;
168 again:
169 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
170 rc = qdio_check_ccq(q, ccq);
171 if (rc == 1) {
172 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
173 goto again;
174 }
175 if (rc < 0) {
176 QDIO_DBF_TEXT2(1,trace,"eqberr");
177 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
178 QDIO_DBF_TEXT2(1,trace,dbf_text);
179 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
180 QDIO_STATUS_LOOK_FOR_ERROR,
181 0, 0, 0, -1, -1, q->int_parm);
182 return 0;
183 }
184 return (tmp_cnt - *cnt);
185 }
186
187 /* SQBS: set buffer states */
188 static inline int
189 qdio_do_sqbs(struct qdio_q *q, unsigned char state,
190 unsigned int *start, unsigned int *cnt)
191 {
192 struct qdio_irq *irq;
193 unsigned int tmp_cnt, q_no, ccq;
194 int rc;
195 char dbf_text[15];
196
197 ccq = 0;
198 tmp_cnt = *cnt;
199 irq = (struct qdio_irq*)q->irq_ptr;
200 q_no = q->q_no;
201 if(!q->is_input_q)
202 q_no += irq->no_input_qs;
203 again:
204 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
205 rc = qdio_check_ccq(q, ccq);
206 if (rc == 1) {
207 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
208 goto again;
209 }
210 if (rc < 0) {
211 QDIO_DBF_TEXT3(1,trace,"sqberr");
212 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt,*cnt,ccq,q_no);
213 QDIO_DBF_TEXT3(1,trace,dbf_text);
214 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
215 QDIO_STATUS_LOOK_FOR_ERROR,
216 0, 0, 0, -1, -1, q->int_parm);
217 return 0;
218 }
219 return (tmp_cnt - *cnt);
220 }
221
222 static inline int
223 qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
224 unsigned char state, unsigned int *count)
225 {
226 volatile char *slsb;
227 struct qdio_irq *irq;
228
229 irq = (struct qdio_irq*)q->irq_ptr;
230 if (!irq->is_qebsm) {
231 slsb = (char *)&q->slsb.acc.val[(*bufno)];
232 xchg(slsb, state);
233 return 1;
234 }
235 return qdio_do_sqbs(q, state, bufno, count);
236 }
237
238 #ifdef CONFIG_QDIO_DEBUG
239 static inline void
240 qdio_trace_slsb(struct qdio_q *q)
241 {
242 if (q->queue_type==QDIO_TRACE_QTYPE) {
243 if (q->is_input_q)
244 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
245 QDIO_MAX_BUFFERS_PER_Q);
246 else
247 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
248 QDIO_MAX_BUFFERS_PER_Q);
249 }
250 }
251 #endif
252
253 static inline int
254 set_slsb(struct qdio_q *q, unsigned int *bufno,
255 unsigned char state, unsigned int *count)
256 {
257 int rc;
258 #ifdef CONFIG_QDIO_DEBUG
259 qdio_trace_slsb(q);
260 #endif
261 rc = qdio_set_slsb(q, bufno, state, count);
262 #ifdef CONFIG_QDIO_DEBUG
263 qdio_trace_slsb(q);
264 #endif
265 return rc;
266 }
267 static inline int
268 qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
269 unsigned int gpr3)
270 {
271 int cc;
272
273 QDIO_DBF_TEXT4(0,trace,"sigasync");
274 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
275
276 #ifdef QDIO_PERFORMANCE_STATS
277 perf_stats.siga_syncs++;
278 #endif /* QDIO_PERFORMANCE_STATS */
279
280 cc = do_siga_sync(q->schid, gpr2, gpr3);
281 if (cc)
282 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
283
284 return cc;
285 }
286
287 static inline int
288 qdio_siga_sync_q(struct qdio_q *q)
289 {
290 if (q->is_input_q)
291 return qdio_siga_sync(q, 0, q->mask);
292 return qdio_siga_sync(q, q->mask, 0);
293 }
294
295 static int
296 __do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
297 {
298 struct qdio_irq *irq;
299 unsigned int fc = 0;
300 unsigned long schid;
301
302 irq = (struct qdio_irq *) q->irq_ptr;
303 if (!irq->is_qebsm)
304 schid = *((u32 *)&q->schid);
305 else {
306 schid = irq->sch_token;
307 fc |= 0x80;
308 }
309 return do_siga_output(schid, q->mask, busy_bit, fc);
310 }
311
312 /*
313 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
314 * an access exception
315 */
316 static inline int
317 qdio_siga_output(struct qdio_q *q)
318 {
319 int cc;
320 __u32 busy_bit;
321 __u64 start_time=0;
322
323 #ifdef QDIO_PERFORMANCE_STATS
324 perf_stats.siga_outs++;
325 #endif /* QDIO_PERFORMANCE_STATS */
326
327 QDIO_DBF_TEXT4(0,trace,"sigaout");
328 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
329
330 for (;;) {
331 cc = __do_siga_output(q, &busy_bit);
332 //QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
333 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
334 if (!start_time)
335 start_time=NOW;
336 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
337 break;
338 } else
339 break;
340 }
341
342 if ((cc==2) && (busy_bit))
343 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
344
345 if (cc)
346 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
347
348 return cc;
349 }
350
351 static inline int
352 qdio_siga_input(struct qdio_q *q)
353 {
354 int cc;
355
356 QDIO_DBF_TEXT4(0,trace,"sigain");
357 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
358
359 #ifdef QDIO_PERFORMANCE_STATS
360 perf_stats.siga_ins++;
361 #endif /* QDIO_PERFORMANCE_STATS */
362
363 cc = do_siga_input(q->schid, q->mask);
364
365 if (cc)
366 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
367
368 return cc;
369 }
370
371 /* locked by the locks in qdio_activate and qdio_cleanup */
372 static __u32 *
373 qdio_get_indicator(void)
374 {
375 int i;
376
377 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
378 if (!indicator_used[i]) {
379 indicator_used[i]=1;
380 return indicators+i;
381 }
382 atomic_inc(&spare_indicator_usecount);
383 return (__u32 * volatile) &spare_indicator;
384 }
385
386 /* locked by the locks in qdio_activate and qdio_cleanup */
387 static void
388 qdio_put_indicator(__u32 *addr)
389 {
390 int i;
391
392 if ( (addr) && (addr!=&spare_indicator) ) {
393 i=addr-indicators;
394 indicator_used[i]=0;
395 }
396 if (addr == &spare_indicator)
397 atomic_dec(&spare_indicator_usecount);
398 }
399
400 static inline void
401 tiqdio_clear_summary_bit(__u32 *location)
402 {
403 QDIO_DBF_TEXT5(0,trace,"clrsummb");
404 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
405
406 xchg(location,0);
407 }
408
409 static inline void
410 tiqdio_set_summary_bit(__u32 *location)
411 {
412 QDIO_DBF_TEXT5(0,trace,"setsummb");
413 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
414
415 xchg(location,-1);
416 }
417
418 static inline void
419 tiqdio_sched_tl(void)
420 {
421 tasklet_hi_schedule(&tiqdio_tasklet);
422 }
423
424 static inline void
425 qdio_mark_tiq(struct qdio_q *q)
426 {
427 unsigned long flags;
428
429 QDIO_DBF_TEXT4(0,trace,"mark iq");
430 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
431
432 spin_lock_irqsave(&ttiq_list_lock,flags);
433 if (unlikely(atomic_read(&q->is_in_shutdown)))
434 goto out_unlock;
435
436 if (!q->is_input_q)
437 goto out_unlock;
438
439 if ((q->list_prev) || (q->list_next))
440 goto out_unlock;
441
442 if (!tiq_list) {
443 tiq_list=q;
444 q->list_prev=q;
445 q->list_next=q;
446 } else {
447 q->list_next=tiq_list;
448 q->list_prev=tiq_list->list_prev;
449 tiq_list->list_prev->list_next=q;
450 tiq_list->list_prev=q;
451 }
452 spin_unlock_irqrestore(&ttiq_list_lock,flags);
453
454 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
455 tiqdio_sched_tl();
456 return;
457 out_unlock:
458 spin_unlock_irqrestore(&ttiq_list_lock,flags);
459 return;
460 }
461
462 static inline void
463 qdio_mark_q(struct qdio_q *q)
464 {
465 QDIO_DBF_TEXT4(0,trace,"mark q");
466 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
467
468 if (unlikely(atomic_read(&q->is_in_shutdown)))
469 return;
470
471 tasklet_schedule(&q->tasklet);
472 }
473
474 static inline int
475 qdio_stop_polling(struct qdio_q *q)
476 {
477 #ifdef QDIO_USE_PROCESSING_STATE
478 unsigned int tmp, gsf, count = 1;
479 unsigned char state = 0;
480 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
481
482 if (!atomic_swap(&q->polling,0))
483 return 1;
484
485 QDIO_DBF_TEXT4(0,trace,"stoppoll");
486 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
487
488 /* show the card that we are not polling anymore */
489 if (!q->is_input_q)
490 return 1;
491
492 tmp = gsf = GET_SAVED_FRONTIER(q);
493 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
494 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
495
496 /*
497 * we don't issue this SYNC_MEMORY, as we trust Rick T and
498 * moreover will not use the PROCESSING state under VM, so
499 * q->polling was 0 anyway
500 */
501 /*SYNC_MEMORY;*/
502 if (irq->is_qebsm) {
503 count = 1;
504 qdio_do_eqbs(q, &state, &gsf, &count);
505 } else
506 state = q->slsb.acc.val[gsf];
507 if (state != SLSB_P_INPUT_PRIMED)
508 return 1;
509 /*
510 * set our summary bit again, as otherwise there is a
511 * small window we can miss between resetting it and
512 * checking for PRIMED state
513 */
514 if (q->is_thinint_q)
515 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
516 return 0;
517
518 #else /* QDIO_USE_PROCESSING_STATE */
519 return 1;
520 #endif /* QDIO_USE_PROCESSING_STATE */
521 }
522
523 /*
524 * see the comment in do_QDIO and before qdio_reserve_q about the
525 * sophisticated locking outside of unmark_q, so that we don't need to
526 * disable the interrupts :-)
527 */
528 static inline void
529 qdio_unmark_q(struct qdio_q *q)
530 {
531 unsigned long flags;
532
533 QDIO_DBF_TEXT4(0,trace,"unmark q");
534 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
535
536 if ((!q->list_prev)||(!q->list_next))
537 return;
538
539 if ((q->is_thinint_q)&&(q->is_input_q)) {
540 /* iQDIO */
541 spin_lock_irqsave(&ttiq_list_lock,flags);
542 /* in case cleanup has done this already and simultanously
543 * qdio_unmark_q is called from the interrupt handler, we've
544 * got to check this in this specific case again */
545 if ((!q->list_prev)||(!q->list_next))
546 goto out;
547 if (q->list_next==q) {
548 /* q was the only interesting q */
549 tiq_list=NULL;
550 q->list_next=NULL;
551 q->list_prev=NULL;
552 } else {
553 q->list_next->list_prev=q->list_prev;
554 q->list_prev->list_next=q->list_next;
555 tiq_list=q->list_next;
556 q->list_next=NULL;
557 q->list_prev=NULL;
558 }
559 out:
560 spin_unlock_irqrestore(&ttiq_list_lock,flags);
561 }
562 }
563
564 static inline unsigned long
565 tiqdio_clear_global_summary(void)
566 {
567 unsigned long time;
568
569 QDIO_DBF_TEXT5(0,trace,"clrglobl");
570
571 time = do_clear_global_summary();
572
573 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
574
575 return time;
576 }
577
578
579 /************************* OUTBOUND ROUTINES *******************************/
580 static int
581 qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
582 {
583 struct qdio_irq *irq;
584 unsigned char state;
585 unsigned int cnt, count, ftc;
586
587 irq = (struct qdio_irq *) q->irq_ptr;
588 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
589 SYNC_MEMORY;
590
591 ftc = q->first_to_check;
592 count = qdio_min(atomic_read(&q->number_of_buffers_used),
593 (QDIO_MAX_BUFFERS_PER_Q-1));
594 if (count == 0)
595 return q->first_to_check;
596 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
597 if (cnt == 0)
598 return q->first_to_check;
599 switch (state) {
600 case SLSB_P_OUTPUT_ERROR:
601 QDIO_DBF_TEXT3(0,trace,"outperr");
602 atomic_sub(cnt , &q->number_of_buffers_used);
603 if (q->qdio_error)
604 q->error_status_flags |=
605 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
606 q->qdio_error = SLSB_P_OUTPUT_ERROR;
607 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
608 q->first_to_check = ftc;
609 break;
610 case SLSB_P_OUTPUT_EMPTY:
611 QDIO_DBF_TEXT5(0,trace,"outpempt");
612 atomic_sub(cnt, &q->number_of_buffers_used);
613 q->first_to_check = ftc;
614 break;
615 case SLSB_CU_OUTPUT_PRIMED:
616 /* all buffers primed */
617 QDIO_DBF_TEXT5(0,trace,"outpprim");
618 break;
619 default:
620 break;
621 }
622 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
623 return q->first_to_check;
624 }
625
626 static int
627 qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
628 {
629 struct qdio_irq *irq;
630 unsigned char state;
631 int tmp, ftc, count, cnt;
632 char dbf_text[15];
633
634
635 irq = (struct qdio_irq *) q->irq_ptr;
636 ftc = q->first_to_check;
637 count = qdio_min(atomic_read(&q->number_of_buffers_used),
638 (QDIO_MAX_BUFFERS_PER_Q-1));
639 if (count == 0)
640 return q->first_to_check;
641 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
642 if (cnt == 0)
643 return q->first_to_check;
644 switch (state) {
645 case SLSB_P_INPUT_ERROR :
646 #ifdef CONFIG_QDIO_DEBUG
647 QDIO_DBF_TEXT3(1,trace,"inperr");
648 sprintf(dbf_text,"%2x,%2x",ftc,count);
649 QDIO_DBF_TEXT3(1,trace,dbf_text);
650 #endif /* CONFIG_QDIO_DEBUG */
651 if (q->qdio_error)
652 q->error_status_flags |=
653 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
654 q->qdio_error = SLSB_P_INPUT_ERROR;
655 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
656 atomic_sub(cnt, &q->number_of_buffers_used);
657 q->first_to_check = ftc;
658 break;
659 case SLSB_P_INPUT_PRIMED :
660 QDIO_DBF_TEXT3(0,trace,"inptprim");
661 sprintf(dbf_text,"%2x,%2x",ftc,count);
662 QDIO_DBF_TEXT3(1,trace,dbf_text);
663 tmp = 0;
664 ftc = q->first_to_check;
665 #ifdef QDIO_USE_PROCESSING_STATE
666 if (cnt > 1) {
667 cnt -= 1;
668 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
669 if (!tmp)
670 break;
671 }
672 cnt = 1;
673 tmp += set_slsb(q, &ftc,
674 SLSB_P_INPUT_PROCESSING, &cnt);
675 atomic_set(&q->polling, 1);
676 #else
677 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
678 #endif
679 atomic_sub(tmp, &q->number_of_buffers_used);
680 q->first_to_check = ftc;
681 break;
682 case SLSB_CU_INPUT_EMPTY:
683 case SLSB_P_INPUT_NOT_INIT:
684 case SLSB_P_INPUT_PROCESSING:
685 QDIO_DBF_TEXT5(0,trace,"inpnipro");
686 break;
687 default:
688 break;
689 }
690 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
691 return q->first_to_check;
692 }
693
694 static inline int
695 qdio_get_outbound_buffer_frontier(struct qdio_q *q)
696 {
697 struct qdio_irq *irq;
698 volatile char *slsb;
699 unsigned int count = 1;
700 int first_not_to_check, f, f_mod_no;
701 char dbf_text[15];
702
703 QDIO_DBF_TEXT4(0,trace,"getobfro");
704 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
705
706 irq = (struct qdio_irq *) q->irq_ptr;
707 if (irq->is_qebsm)
708 return qdio_qebsm_get_outbound_buffer_frontier(q);
709
710 slsb=&q->slsb.acc.val[0];
711 f_mod_no=f=q->first_to_check;
712 /*
713 * f points to already processed elements, so f+no_used is correct...
714 * ... but: we don't check 128 buffers, as otherwise
715 * qdio_has_outbound_q_moved would return 0
716 */
717 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
718 (QDIO_MAX_BUFFERS_PER_Q-1));
719
720 if ((!q->is_iqdio_q)&&(!q->hydra_gives_outbound_pcis))
721 SYNC_MEMORY;
722
723 check_next:
724 if (f==first_not_to_check)
725 goto out;
726
727 switch(slsb[f_mod_no]) {
728
729 /* the adapter has not fetched the output yet */
730 case SLSB_CU_OUTPUT_PRIMED:
731 QDIO_DBF_TEXT5(0,trace,"outpprim");
732 break;
733
734 /* the adapter got it */
735 case SLSB_P_OUTPUT_EMPTY:
736 atomic_dec(&q->number_of_buffers_used);
737 f++;
738 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
739 QDIO_DBF_TEXT5(0,trace,"outpempt");
740 goto check_next;
741
742 case SLSB_P_OUTPUT_ERROR:
743 QDIO_DBF_TEXT3(0,trace,"outperr");
744 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
745 q->sbal[f_mod_no]->element[14].sbalf.value,
746 q->sbal[f_mod_no]->element[15].sbalf.value);
747 QDIO_DBF_TEXT3(1,trace,dbf_text);
748 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
749
750 /* kind of process the buffer */
751 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
752
753 /*
754 * we increment the frontier, as this buffer
755 * was processed obviously
756 */
757 atomic_dec(&q->number_of_buffers_used);
758 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
759
760 if (q->qdio_error)
761 q->error_status_flags|=
762 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
763 q->qdio_error=SLSB_P_OUTPUT_ERROR;
764 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
765
766 break;
767
768 /* no new buffers */
769 default:
770 QDIO_DBF_TEXT5(0,trace,"outpni");
771 }
772 out:
773 return (q->first_to_check=f_mod_no);
774 }
775
776 /* all buffers are processed */
777 static inline int
778 qdio_is_outbound_q_done(struct qdio_q *q)
779 {
780 int no_used;
781 #ifdef CONFIG_QDIO_DEBUG
782 char dbf_text[15];
783 #endif
784
785 no_used=atomic_read(&q->number_of_buffers_used);
786
787 #ifdef CONFIG_QDIO_DEBUG
788 if (no_used) {
789 sprintf(dbf_text,"oqisnt%02x",no_used);
790 QDIO_DBF_TEXT4(0,trace,dbf_text);
791 } else {
792 QDIO_DBF_TEXT4(0,trace,"oqisdone");
793 }
794 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
795 #endif /* CONFIG_QDIO_DEBUG */
796 return (no_used==0);
797 }
798
799 static inline int
800 qdio_has_outbound_q_moved(struct qdio_q *q)
801 {
802 int i;
803
804 i=qdio_get_outbound_buffer_frontier(q);
805
806 if ( (i!=GET_SAVED_FRONTIER(q)) ||
807 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
808 SAVE_FRONTIER(q,i);
809 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
810 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
811 return 1;
812 } else {
813 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
814 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
815 return 0;
816 }
817 }
818
819 static inline void
820 qdio_kick_outbound_q(struct qdio_q *q)
821 {
822 int result;
823 #ifdef CONFIG_QDIO_DEBUG
824 char dbf_text[15];
825
826 QDIO_DBF_TEXT4(0,trace,"kickoutq");
827 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
828 #endif /* CONFIG_QDIO_DEBUG */
829
830 if (!q->siga_out)
831 return;
832
833 /* here's the story with cc=2 and busy bit set (thanks, Rick):
834 * VM's CP could present us cc=2 and busy bit set on SIGA-write
835 * during reconfiguration of their Guest LAN (only in HIPERS mode,
836 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
837 * the queues down immediately; and not being under VM we have a
838 * problem on cc=2 and busy bit set right away).
839 *
840 * Therefore qdio_siga_output will try for a short time constantly,
841 * if such a condition occurs. If it doesn't change, it will
842 * increase the busy_siga_counter and save the timestamp, and
843 * schedule the queue for later processing (via mark_q, using the
844 * queue tasklet). __qdio_outbound_processing will check out the
845 * counter. If non-zero, it will call qdio_kick_outbound_q as often
846 * as the value of the counter. This will attempt further SIGA
847 * instructions. For each successful SIGA, the counter is
848 * decreased, for failing SIGAs the counter remains the same, after
849 * all.
850 * After some time of no movement, qdio_kick_outbound_q will
851 * finally fail and reflect corresponding error codes to call
852 * the upper layer module and have it take the queues down.
853 *
854 * Note that this is a change from the original HiperSockets design
855 * (saying cc=2 and busy bit means take the queues down), but in
856 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
857 * conditions will still take the queues down, but the threshold is
858 * higher due to the Guest LAN environment.
859 */
860
861
862 result=qdio_siga_output(q);
863
864 switch (result) {
865 case 0:
866 /* went smooth this time, reset timestamp */
867 #ifdef CONFIG_QDIO_DEBUG
868 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
869 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
870 atomic_read(&q->busy_siga_counter));
871 QDIO_DBF_TEXT3(0,trace,dbf_text);
872 #endif /* CONFIG_QDIO_DEBUG */
873 q->timing.busy_start=0;
874 break;
875 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
876 /* cc=2 and busy bit: */
877 atomic_inc(&q->busy_siga_counter);
878
879 /* if the last siga was successful, save
880 * timestamp here */
881 if (!q->timing.busy_start)
882 q->timing.busy_start=NOW;
883
884 /* if we're in time, don't touch error_status_flags
885 * and siga_error */
886 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
887 qdio_mark_q(q);
888 break;
889 }
890 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
891 #ifdef CONFIG_QDIO_DEBUG
892 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
893 atomic_read(&q->busy_siga_counter));
894 QDIO_DBF_TEXT3(0,trace,dbf_text);
895 #endif /* CONFIG_QDIO_DEBUG */
896 /* else fallthrough and report error */
897 default:
898 /* for plain cc=1, 2 or 3: */
899 if (q->siga_error)
900 q->error_status_flags|=
901 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
902 q->error_status_flags|=
903 QDIO_STATUS_LOOK_FOR_ERROR;
904 q->siga_error=result;
905 }
906 }
907
908 static inline void
909 qdio_kick_outbound_handler(struct qdio_q *q)
910 {
911 int start, end, real_end, count;
912 #ifdef CONFIG_QDIO_DEBUG
913 char dbf_text[15];
914 #endif
915
916 start = q->first_element_to_kick;
917 /* last_move_ftc was just updated */
918 real_end = GET_SAVED_FRONTIER(q);
919 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
920 (QDIO_MAX_BUFFERS_PER_Q-1);
921 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
922 (QDIO_MAX_BUFFERS_PER_Q-1);
923
924 #ifdef CONFIG_QDIO_DEBUG
925 QDIO_DBF_TEXT4(0,trace,"kickouth");
926 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
927
928 sprintf(dbf_text,"s=%2xc=%2x",start,count);
929 QDIO_DBF_TEXT4(0,trace,dbf_text);
930 #endif /* CONFIG_QDIO_DEBUG */
931
932 if (q->state==QDIO_IRQ_STATE_ACTIVE)
933 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
934 q->error_status_flags,
935 q->qdio_error,q->siga_error,q->q_no,start,count,
936 q->int_parm);
937
938 /* for the next time: */
939 q->first_element_to_kick=real_end;
940 q->qdio_error=0;
941 q->siga_error=0;
942 q->error_status_flags=0;
943 }
944
945 static inline void
946 __qdio_outbound_processing(struct qdio_q *q)
947 {
948 int siga_attempts;
949
950 QDIO_DBF_TEXT4(0,trace,"qoutproc");
951 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
952
953 if (unlikely(qdio_reserve_q(q))) {
954 qdio_release_q(q);
955 #ifdef QDIO_PERFORMANCE_STATS
956 o_p_c++;
957 #endif /* QDIO_PERFORMANCE_STATS */
958 /* as we're sissies, we'll check next time */
959 if (likely(!atomic_read(&q->is_in_shutdown))) {
960 qdio_mark_q(q);
961 QDIO_DBF_TEXT4(0,trace,"busy,agn");
962 }
963 return;
964 }
965 #ifdef QDIO_PERFORMANCE_STATS
966 o_p_nc++;
967 perf_stats.tl_runs++;
968 #endif /* QDIO_PERFORMANCE_STATS */
969
970 /* see comment in qdio_kick_outbound_q */
971 siga_attempts=atomic_read(&q->busy_siga_counter);
972 while (siga_attempts) {
973 atomic_dec(&q->busy_siga_counter);
974 qdio_kick_outbound_q(q);
975 siga_attempts--;
976 }
977
978 if (qdio_has_outbound_q_moved(q))
979 qdio_kick_outbound_handler(q);
980
981 if (q->is_iqdio_q) {
982 /*
983 * for asynchronous queues, we better check, if the fill
984 * level is too high. for synchronous queues, the fill
985 * level will never be that high.
986 */
987 if (atomic_read(&q->number_of_buffers_used)>
988 IQDIO_FILL_LEVEL_TO_POLL)
989 qdio_mark_q(q);
990
991 } else if (!q->hydra_gives_outbound_pcis)
992 if (!qdio_is_outbound_q_done(q))
993 qdio_mark_q(q);
994
995 qdio_release_q(q);
996 }
997
998 static void
999 qdio_outbound_processing(struct qdio_q *q)
1000 {
1001 __qdio_outbound_processing(q);
1002 }
1003
1004 /************************* INBOUND ROUTINES *******************************/
1005
1006
1007 static inline int
1008 qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1009 {
1010 struct qdio_irq *irq;
1011 int f,f_mod_no;
1012 volatile char *slsb;
1013 unsigned int count = 1;
1014 int first_not_to_check;
1015 #ifdef CONFIG_QDIO_DEBUG
1016 char dbf_text[15];
1017 #endif /* CONFIG_QDIO_DEBUG */
1018 #ifdef QDIO_USE_PROCESSING_STATE
1019 int last_position=-1;
1020 #endif /* QDIO_USE_PROCESSING_STATE */
1021
1022 QDIO_DBF_TEXT4(0,trace,"getibfro");
1023 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1024
1025 irq = (struct qdio_irq *) q->irq_ptr;
1026 if (irq->is_qebsm)
1027 return qdio_qebsm_get_inbound_buffer_frontier(q);
1028
1029 slsb=&q->slsb.acc.val[0];
1030 f_mod_no=f=q->first_to_check;
1031 /*
1032 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1033 * would return 0
1034 */
1035 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1036 (QDIO_MAX_BUFFERS_PER_Q-1));
1037
1038 /*
1039 * we don't use this one, as a PCI or we after a thin interrupt
1040 * will sync the queues
1041 */
1042 /* SYNC_MEMORY;*/
1043
1044 check_next:
1045 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1046 if (f==first_not_to_check)
1047 goto out;
1048 switch (slsb[f_mod_no]) {
1049
1050 /* CU_EMPTY means frontier is reached */
1051 case SLSB_CU_INPUT_EMPTY:
1052 QDIO_DBF_TEXT5(0,trace,"inptempt");
1053 break;
1054
1055 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1056 case SLSB_P_INPUT_PRIMED:
1057 QDIO_DBF_TEXT5(0,trace,"inptprim");
1058
1059 #ifdef QDIO_USE_PROCESSING_STATE
1060 /*
1061 * as soon as running under VM, polling the input queues will
1062 * kill VM in terms of CP overhead
1063 */
1064 if (q->siga_sync) {
1065 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1066 } else {
1067 /* set the previous buffer to NOT_INIT. The current
1068 * buffer will be set to PROCESSING at the end of
1069 * this function to avoid further interrupts. */
1070 if (last_position>=0)
1071 set_slsb(q, &last_position,
1072 SLSB_P_INPUT_NOT_INIT, &count);
1073 atomic_set(&q->polling,1);
1074 last_position=f_mod_no;
1075 }
1076 #else /* QDIO_USE_PROCESSING_STATE */
1077 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1078 #endif /* QDIO_USE_PROCESSING_STATE */
1079 /*
1080 * not needed, as the inbound queue will be synced on the next
1081 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1082 */
1083 /*SYNC_MEMORY;*/
1084 f++;
1085 atomic_dec(&q->number_of_buffers_used);
1086 goto check_next;
1087
1088 case SLSB_P_INPUT_NOT_INIT:
1089 case SLSB_P_INPUT_PROCESSING:
1090 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1091 break;
1092
1093 /* P_ERROR means frontier is reached, break and report error */
1094 case SLSB_P_INPUT_ERROR:
1095 #ifdef CONFIG_QDIO_DEBUG
1096 sprintf(dbf_text,"inperr%2x",f_mod_no);
1097 QDIO_DBF_TEXT3(1,trace,dbf_text);
1098 #endif /* CONFIG_QDIO_DEBUG */
1099 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1100
1101 /* kind of process the buffer */
1102 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1103
1104 if (q->qdio_error)
1105 q->error_status_flags|=
1106 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1107 q->qdio_error=SLSB_P_INPUT_ERROR;
1108 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1109
1110 /* we increment the frontier, as this buffer
1111 * was processed obviously */
1112 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1113 atomic_dec(&q->number_of_buffers_used);
1114
1115 #ifdef QDIO_USE_PROCESSING_STATE
1116 last_position=-1;
1117 #endif /* QDIO_USE_PROCESSING_STATE */
1118
1119 break;
1120
1121 /* everything else means frontier not changed (HALTED or so) */
1122 default:
1123 break;
1124 }
1125 out:
1126 q->first_to_check=f_mod_no;
1127
1128 #ifdef QDIO_USE_PROCESSING_STATE
1129 if (last_position>=0)
1130 set_slsb(q, &last_position, SLSB_P_INPUT_NOT_INIT, &count);
1131 #endif /* QDIO_USE_PROCESSING_STATE */
1132
1133 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1134
1135 return q->first_to_check;
1136 }
1137
1138 static inline int
1139 qdio_has_inbound_q_moved(struct qdio_q *q)
1140 {
1141 int i;
1142
1143 #ifdef QDIO_PERFORMANCE_STATS
1144 static int old_pcis=0;
1145 static int old_thinints=0;
1146
1147 if ((old_pcis==perf_stats.pcis)&&(old_thinints==perf_stats.thinints))
1148 perf_stats.start_time_inbound=NOW;
1149 else
1150 old_pcis=perf_stats.pcis;
1151 #endif /* QDIO_PERFORMANCE_STATS */
1152
1153 i=qdio_get_inbound_buffer_frontier(q);
1154 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1155 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1156 SAVE_FRONTIER(q,i);
1157 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1158 SAVE_TIMESTAMP(q);
1159
1160 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1161 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1162 return 1;
1163 } else {
1164 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1165 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1166 return 0;
1167 }
1168 }
1169
1170 /* means, no more buffers to be filled */
1171 static inline int
1172 tiqdio_is_inbound_q_done(struct qdio_q *q)
1173 {
1174 int no_used;
1175 unsigned int start_buf, count;
1176 unsigned char state = 0;
1177 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1178
1179 #ifdef CONFIG_QDIO_DEBUG
1180 char dbf_text[15];
1181 #endif
1182
1183 no_used=atomic_read(&q->number_of_buffers_used);
1184
1185 /* propagate the change from 82 to 80 through VM */
1186 SYNC_MEMORY;
1187
1188 #ifdef CONFIG_QDIO_DEBUG
1189 if (no_used) {
1190 sprintf(dbf_text,"iqisnt%02x",no_used);
1191 QDIO_DBF_TEXT4(0,trace,dbf_text);
1192 } else {
1193 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1194 }
1195 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1196 #endif /* CONFIG_QDIO_DEBUG */
1197
1198 if (!no_used)
1199 return 1;
1200 if (!q->siga_sync && !irq->is_qebsm)
1201 /* we'll check for more primed buffers in qeth_stop_polling */
1202 return 0;
1203 if (irq->is_qebsm) {
1204 count = 1;
1205 start_buf = q->first_to_check;
1206 qdio_do_eqbs(q, &state, &start_buf, &count);
1207 } else
1208 state = q->slsb.acc.val[q->first_to_check];
1209 if (state != SLSB_P_INPUT_PRIMED)
1210 /*
1211 * nothing more to do, if next buffer is not PRIMED.
1212 * note that we did a SYNC_MEMORY before, that there
1213 * has been a sychnronization.
1214 * we will return 0 below, as there is nothing to do
1215 * (stop_polling not necessary, as we have not been
1216 * using the PROCESSING state
1217 */
1218 return 0;
1219
1220 /*
1221 * ok, the next input buffer is primed. that means, that device state
1222 * change indicator and adapter local summary are set, so we will find
1223 * it next time.
1224 * we will return 0 below, as there is nothing to do, except scheduling
1225 * ourselves for the next time.
1226 */
1227 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1228 tiqdio_sched_tl();
1229 return 0;
1230 }
1231
1232 static inline int
1233 qdio_is_inbound_q_done(struct qdio_q *q)
1234 {
1235 int no_used;
1236 unsigned int start_buf, count;
1237 unsigned char state = 0;
1238 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1239
1240 #ifdef CONFIG_QDIO_DEBUG
1241 char dbf_text[15];
1242 #endif
1243
1244 no_used=atomic_read(&q->number_of_buffers_used);
1245
1246 /*
1247 * we need that one for synchronization with the adapter, as it
1248 * does a kind of PCI avoidance
1249 */
1250 SYNC_MEMORY;
1251
1252 if (!no_used) {
1253 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1254 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1255 QDIO_DBF_TEXT4(0,trace,dbf_text);
1256 return 1;
1257 }
1258 if (irq->is_qebsm) {
1259 count = 1;
1260 start_buf = q->first_to_check;
1261 qdio_do_eqbs(q, &state, &start_buf, &count);
1262 } else
1263 state = q->slsb.acc.val[q->first_to_check];
1264 if (state == SLSB_P_INPUT_PRIMED) {
1265 /* we got something to do */
1266 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1267 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1268 return 0;
1269 }
1270
1271 /* on VM, we don't poll, so the q is always done here */
1272 if (q->siga_sync)
1273 return 1;
1274 if (q->hydra_gives_outbound_pcis)
1275 return 1;
1276
1277 /*
1278 * at this point we know, that inbound first_to_check
1279 * has (probably) not moved (see qdio_inbound_processing)
1280 */
1281 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1282 #ifdef CONFIG_QDIO_DEBUG
1283 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1284 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1285 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1286 QDIO_DBF_TEXT4(0,trace,dbf_text);
1287 #endif /* CONFIG_QDIO_DEBUG */
1288 return 1;
1289 } else {
1290 #ifdef CONFIG_QDIO_DEBUG
1291 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1292 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1293 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1294 QDIO_DBF_TEXT4(0,trace,dbf_text);
1295 #endif /* CONFIG_QDIO_DEBUG */
1296 return 0;
1297 }
1298 }
1299
1300 static inline void
1301 qdio_kick_inbound_handler(struct qdio_q *q)
1302 {
1303 int count, start, end, real_end, i;
1304 #ifdef CONFIG_QDIO_DEBUG
1305 char dbf_text[15];
1306 #endif
1307
1308 QDIO_DBF_TEXT4(0,trace,"kickinh");
1309 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1310
1311 start=q->first_element_to_kick;
1312 real_end=q->first_to_check;
1313 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1314
1315 i=start;
1316 count=0;
1317 while (1) {
1318 count++;
1319 if (i==end)
1320 break;
1321 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1322 }
1323
1324 #ifdef CONFIG_QDIO_DEBUG
1325 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1326 QDIO_DBF_TEXT4(0,trace,dbf_text);
1327 #endif /* CONFIG_QDIO_DEBUG */
1328
1329 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1330 q->handler(q->cdev,
1331 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1332 q->qdio_error,q->siga_error,q->q_no,start,count,
1333 q->int_parm);
1334
1335 /* for the next time: */
1336 q->first_element_to_kick=real_end;
1337 q->qdio_error=0;
1338 q->siga_error=0;
1339 q->error_status_flags=0;
1340
1341 #ifdef QDIO_PERFORMANCE_STATS
1342 perf_stats.inbound_time+=NOW-perf_stats.start_time_inbound;
1343 perf_stats.inbound_cnt++;
1344 #endif /* QDIO_PERFORMANCE_STATS */
1345 }
1346
1347 static inline void
1348 __tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1349 {
1350 struct qdio_irq *irq_ptr;
1351 struct qdio_q *oq;
1352 int i;
1353
1354 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1355 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1356
1357 /*
1358 * we first want to reserve the q, so that we know, that we don't
1359 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1360 * be set
1361 */
1362 if (unlikely(qdio_reserve_q(q))) {
1363 qdio_release_q(q);
1364 #ifdef QDIO_PERFORMANCE_STATS
1365 ii_p_c++;
1366 #endif /* QDIO_PERFORMANCE_STATS */
1367 /*
1368 * as we might just be about to stop polling, we make
1369 * sure that we check again at least once more
1370 */
1371 tiqdio_sched_tl();
1372 return;
1373 }
1374 #ifdef QDIO_PERFORMANCE_STATS
1375 ii_p_nc++;
1376 #endif /* QDIO_PERFORMANCE_STATS */
1377 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1378 qdio_unmark_q(q);
1379 goto out;
1380 }
1381
1382 /*
1383 * we reset spare_ind_was_set, when the queue does not use the
1384 * spare indicator
1385 */
1386 if (spare_ind_was_set)
1387 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1388
1389 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1390 goto out;
1391 /*
1392 * q->dev_st_chg_ind is the indicator, be it shared or not.
1393 * only clear it, if indicator is non-shared
1394 */
1395 if (!spare_ind_was_set)
1396 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1397
1398 if (q->hydra_gives_outbound_pcis) {
1399 if (!q->siga_sync_done_on_thinints) {
1400 SYNC_MEMORY_ALL;
1401 } else if ((!q->siga_sync_done_on_outb_tis)&&
1402 (q->hydra_gives_outbound_pcis)) {
1403 SYNC_MEMORY_ALL_OUTB;
1404 }
1405 } else {
1406 SYNC_MEMORY;
1407 }
1408 /*
1409 * maybe we have to do work on our outbound queues... at least
1410 * we have to check the outbound-int-capable thinint-capable
1411 * queues
1412 */
1413 if (q->hydra_gives_outbound_pcis) {
1414 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1415 for (i=0;i<irq_ptr->no_output_qs;i++) {
1416 oq = irq_ptr->output_qs[i];
1417 #ifdef QDIO_PERFORMANCE_STATS
1418 perf_stats.tl_runs--;
1419 #endif /* QDIO_PERFORMANCE_STATS */
1420 if (!qdio_is_outbound_q_done(oq))
1421 __qdio_outbound_processing(oq);
1422 }
1423 }
1424
1425 if (!qdio_has_inbound_q_moved(q))
1426 goto out;
1427
1428 qdio_kick_inbound_handler(q);
1429 if (tiqdio_is_inbound_q_done(q))
1430 if (!qdio_stop_polling(q)) {
1431 /*
1432 * we set the flags to get into the stuff next time,
1433 * see also comment in qdio_stop_polling
1434 */
1435 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1436 tiqdio_sched_tl();
1437 }
1438 out:
1439 qdio_release_q(q);
1440 }
1441
1442 static void
1443 tiqdio_inbound_processing(struct qdio_q *q)
1444 {
1445 __tiqdio_inbound_processing(q, atomic_read(&spare_indicator_usecount));
1446 }
1447
1448 static inline void
1449 __qdio_inbound_processing(struct qdio_q *q)
1450 {
1451 int q_laps=0;
1452
1453 QDIO_DBF_TEXT4(0,trace,"qinproc");
1454 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1455
1456 if (unlikely(qdio_reserve_q(q))) {
1457 qdio_release_q(q);
1458 #ifdef QDIO_PERFORMANCE_STATS
1459 i_p_c++;
1460 #endif /* QDIO_PERFORMANCE_STATS */
1461 /* as we're sissies, we'll check next time */
1462 if (likely(!atomic_read(&q->is_in_shutdown))) {
1463 qdio_mark_q(q);
1464 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1465 }
1466 return;
1467 }
1468 #ifdef QDIO_PERFORMANCE_STATS
1469 i_p_nc++;
1470 perf_stats.tl_runs++;
1471 #endif /* QDIO_PERFORMANCE_STATS */
1472
1473 again:
1474 if (qdio_has_inbound_q_moved(q)) {
1475 qdio_kick_inbound_handler(q);
1476 if (!qdio_stop_polling(q)) {
1477 q_laps++;
1478 if (q_laps<QDIO_Q_LAPS)
1479 goto again;
1480 }
1481 qdio_mark_q(q);
1482 } else {
1483 if (!qdio_is_inbound_q_done(q))
1484 /* means poll time is not yet over */
1485 qdio_mark_q(q);
1486 }
1487
1488 qdio_release_q(q);
1489 }
1490
1491 static void
1492 qdio_inbound_processing(struct qdio_q *q)
1493 {
1494 __qdio_inbound_processing(q);
1495 }
1496
1497 /************************* MAIN ROUTINES *******************************/
1498
1499 #ifdef QDIO_USE_PROCESSING_STATE
1500 static inline int
1501 tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1502 {
1503 if (!q) {
1504 tiqdio_sched_tl();
1505 return 0;
1506 }
1507
1508 /*
1509 * under VM, we have not used the PROCESSING state, so no
1510 * need to stop polling
1511 */
1512 if (q->siga_sync)
1513 return 2;
1514
1515 if (unlikely(qdio_reserve_q(q))) {
1516 qdio_release_q(q);
1517 #ifdef QDIO_PERFORMANCE_STATS
1518 ii_p_c++;
1519 #endif /* QDIO_PERFORMANCE_STATS */
1520 /*
1521 * as we might just be about to stop polling, we make
1522 * sure that we check again at least once more
1523 */
1524
1525 /*
1526 * sanity -- we'd get here without setting the
1527 * dev st chg ind
1528 */
1529 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1530 tiqdio_sched_tl();
1531 return 0;
1532 }
1533 if (qdio_stop_polling(q)) {
1534 qdio_release_q(q);
1535 return 2;
1536 }
1537 if (q_laps<QDIO_Q_LAPS-1) {
1538 qdio_release_q(q);
1539 return 3;
1540 }
1541 /*
1542 * we set the flags to get into the stuff
1543 * next time, see also comment in qdio_stop_polling
1544 */
1545 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1546 tiqdio_sched_tl();
1547 qdio_release_q(q);
1548 return 1;
1549
1550 }
1551 #endif /* QDIO_USE_PROCESSING_STATE */
1552
1553 static inline void
1554 tiqdio_inbound_checks(void)
1555 {
1556 struct qdio_q *q;
1557 int spare_ind_was_set=0;
1558 #ifdef QDIO_USE_PROCESSING_STATE
1559 int q_laps=0;
1560 #endif /* QDIO_USE_PROCESSING_STATE */
1561
1562 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1563 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1564
1565 #ifdef QDIO_USE_PROCESSING_STATE
1566 again:
1567 #endif /* QDIO_USE_PROCESSING_STATE */
1568
1569 /* when the spare indicator is used and set, save that and clear it */
1570 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1571 spare_ind_was_set = 1;
1572 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1573 }
1574
1575 q=(struct qdio_q*)tiq_list;
1576 do {
1577 if (!q)
1578 break;
1579 __tiqdio_inbound_processing(q, spare_ind_was_set);
1580 q=(struct qdio_q*)q->list_next;
1581 } while (q!=(struct qdio_q*)tiq_list);
1582
1583 #ifdef QDIO_USE_PROCESSING_STATE
1584 q=(struct qdio_q*)tiq_list;
1585 do {
1586 int ret;
1587
1588 ret = tiqdio_reset_processing_state(q, q_laps);
1589 switch (ret) {
1590 case 0:
1591 return;
1592 case 1:
1593 q_laps++;
1594 case 2:
1595 q = (struct qdio_q*)q->list_next;
1596 break;
1597 default:
1598 q_laps++;
1599 goto again;
1600 }
1601 } while (q!=(struct qdio_q*)tiq_list);
1602 #endif /* QDIO_USE_PROCESSING_STATE */
1603 }
1604
1605 static void
1606 tiqdio_tl(unsigned long data)
1607 {
1608 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1609
1610 #ifdef QDIO_PERFORMANCE_STATS
1611 perf_stats.tl_runs++;
1612 #endif /* QDIO_PERFORMANCE_STATS */
1613
1614 tiqdio_inbound_checks();
1615 }
1616
1617 /********************* GENERAL HELPER_ROUTINES ***********************/
1618
1619 static void
1620 qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1621 {
1622 int i;
1623
1624 for (i=0;i<QDIO_MAX_QUEUES_PER_IRQ;i++) {
1625 if (!irq_ptr->input_qs[i])
1626 goto next;
1627
1628 kfree(irq_ptr->input_qs[i]->slib);
1629 kfree(irq_ptr->input_qs[i]);
1630
1631 next:
1632 if (!irq_ptr->output_qs[i])
1633 continue;
1634
1635 kfree(irq_ptr->output_qs[i]->slib);
1636 kfree(irq_ptr->output_qs[i]);
1637
1638 }
1639 kfree(irq_ptr->qdr);
1640 kfree(irq_ptr);
1641 }
1642
1643 static void
1644 qdio_set_impl_params(struct qdio_irq *irq_ptr,
1645 unsigned int qib_param_field_format,
1646 /* pointer to 128 bytes or NULL, if no param field */
1647 unsigned char *qib_param_field,
1648 /* pointer to no_queues*128 words of data or NULL */
1649 unsigned int no_input_qs,
1650 unsigned int no_output_qs,
1651 unsigned long *input_slib_elements,
1652 unsigned long *output_slib_elements)
1653 {
1654 int i,j;
1655
1656 if (!irq_ptr)
1657 return;
1658
1659 irq_ptr->qib.pfmt=qib_param_field_format;
1660 if (qib_param_field)
1661 memcpy(irq_ptr->qib.parm,qib_param_field,
1662 QDIO_MAX_BUFFERS_PER_Q);
1663
1664 if (input_slib_elements)
1665 for (i=0;i<no_input_qs;i++) {
1666 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1667 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1668 input_slib_elements[
1669 i*QDIO_MAX_BUFFERS_PER_Q+j];
1670 }
1671 if (output_slib_elements)
1672 for (i=0;i<no_output_qs;i++) {
1673 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1674 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1675 output_slib_elements[
1676 i*QDIO_MAX_BUFFERS_PER_Q+j];
1677 }
1678 }
1679
1680 static int
1681 qdio_alloc_qs(struct qdio_irq *irq_ptr,
1682 int no_input_qs, int no_output_qs)
1683 {
1684 int i;
1685 struct qdio_q *q;
1686 int result=-ENOMEM;
1687
1688 for (i=0;i<no_input_qs;i++) {
1689 q=kmalloc(sizeof(struct qdio_q),GFP_KERNEL);
1690
1691 if (!q) {
1692 QDIO_PRINT_ERR("kmalloc of q failed!\n");
1693 goto out;
1694 }
1695
1696 memset(q,0,sizeof(struct qdio_q));
1697
1698 q->slib=kmalloc(PAGE_SIZE,GFP_KERNEL);
1699 if (!q->slib) {
1700 QDIO_PRINT_ERR("kmalloc of slib failed!\n");
1701 goto out;
1702 }
1703
1704 irq_ptr->input_qs[i]=q;
1705 }
1706
1707 for (i=0;i<no_output_qs;i++) {
1708 q=kmalloc(sizeof(struct qdio_q),GFP_KERNEL);
1709
1710 if (!q) {
1711 goto out;
1712 }
1713
1714 memset(q,0,sizeof(struct qdio_q));
1715
1716 q->slib=kmalloc(PAGE_SIZE,GFP_KERNEL);
1717 if (!q->slib) {
1718 QDIO_PRINT_ERR("kmalloc of slib failed!\n");
1719 goto out;
1720 }
1721
1722 irq_ptr->output_qs[i]=q;
1723 }
1724
1725 result=0;
1726 out:
1727 return result;
1728 }
1729
1730 static void
1731 qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1732 int no_input_qs, int no_output_qs,
1733 qdio_handler_t *input_handler,
1734 qdio_handler_t *output_handler,
1735 unsigned long int_parm,int q_format,
1736 unsigned long flags,
1737 void **inbound_sbals_array,
1738 void **outbound_sbals_array)
1739 {
1740 struct qdio_q *q;
1741 int i,j;
1742 char dbf_text[20]; /* see qdio_initialize */
1743 void *ptr;
1744 int available;
1745
1746 sprintf(dbf_text,"qfqs%4x",cdev->private->sch_no);
1747 QDIO_DBF_TEXT0(0,setup,dbf_text);
1748 for (i=0;i<no_input_qs;i++) {
1749 q=irq_ptr->input_qs[i];
1750
1751 memset(q,0,((char*)&q->slib)-((char*)q));
1752 sprintf(dbf_text,"in-q%4x",i);
1753 QDIO_DBF_TEXT0(0,setup,dbf_text);
1754 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1755
1756 memset(q->slib,0,PAGE_SIZE);
1757 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1758
1759 available=0;
1760
1761 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1762 q->sbal[j]=*(inbound_sbals_array++);
1763
1764 q->queue_type=q_format;
1765 q->int_parm=int_parm;
1766 q->schid = irq_ptr->schid;
1767 q->irq_ptr = irq_ptr;
1768 q->cdev = cdev;
1769 q->mask=1<<(31-i);
1770 q->q_no=i;
1771 q->is_input_q=1;
1772 q->first_to_check=0;
1773 q->last_move_ftc=0;
1774 q->handler=input_handler;
1775 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1776
1777 q->tasklet.data=(unsigned long)q;
1778 /* q->is_thinint_q isn't valid at this time, but
1779 * irq_ptr->is_thinint_irq is */
1780 q->tasklet.func=(void(*)(unsigned long))
1781 ((irq_ptr->is_thinint_irq)?&tiqdio_inbound_processing:
1782 &qdio_inbound_processing);
1783
1784 /* actually this is not used for inbound queues. yet. */
1785 atomic_set(&q->busy_siga_counter,0);
1786 q->timing.busy_start=0;
1787
1788 /* for (j=0;j<QDIO_STATS_NUMBER;j++)
1789 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1790 QDIO_STATS_NUMBER)*j;
1791 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1792 */
1793
1794 /* fill in slib */
1795 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1796 (unsigned long)(q->slib);
1797 q->slib->sla=(unsigned long)(q->sl);
1798 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1799
1800 /* fill in sl */
1801 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1802 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1803
1804 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1805 ptr=(void*)q->sl;
1806 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1807 ptr=(void*)&q->slsb;
1808 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1809 ptr=(void*)q->sbal[0];
1810 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1811
1812 /* fill in slsb */
1813 if (!irq_ptr->is_qebsm) {
1814 unsigned int count = 1;
1815 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1816 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1817 }
1818 }
1819
1820 for (i=0;i<no_output_qs;i++) {
1821 q=irq_ptr->output_qs[i];
1822 memset(q,0,((char*)&q->slib)-((char*)q));
1823
1824 sprintf(dbf_text,"outq%4x",i);
1825 QDIO_DBF_TEXT0(0,setup,dbf_text);
1826 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1827
1828 memset(q->slib,0,PAGE_SIZE);
1829 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1830
1831 available=0;
1832
1833 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1834 q->sbal[j]=*(outbound_sbals_array++);
1835
1836 q->queue_type=q_format;
1837 q->int_parm=int_parm;
1838 q->is_input_q=0;
1839 q->schid = irq_ptr->schid;
1840 q->cdev = cdev;
1841 q->irq_ptr = irq_ptr;
1842 q->mask=1<<(31-i);
1843 q->q_no=i;
1844 q->first_to_check=0;
1845 q->last_move_ftc=0;
1846 q->handler=output_handler;
1847
1848 q->tasklet.data=(unsigned long)q;
1849 q->tasklet.func=(void(*)(unsigned long))
1850 &qdio_outbound_processing;
1851
1852 atomic_set(&q->busy_siga_counter,0);
1853 q->timing.busy_start=0;
1854
1855 /* fill in slib */
1856 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1857 (unsigned long)(q->slib);
1858 q->slib->sla=(unsigned long)(q->sl);
1859 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1860
1861 /* fill in sl */
1862 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1863 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1864
1865 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1866 ptr=(void*)q->sl;
1867 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1868 ptr=(void*)&q->slsb;
1869 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1870 ptr=(void*)q->sbal[0];
1871 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1872
1873 /* fill in slsb */
1874 if (!irq_ptr->is_qebsm) {
1875 unsigned int count = 1;
1876 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1877 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1878 }
1879 }
1880 }
1881
1882 static void
1883 qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1884 unsigned int no_input_qs,
1885 unsigned int no_output_qs,
1886 unsigned int min_input_threshold,
1887 unsigned int max_input_threshold,
1888 unsigned int min_output_threshold,
1889 unsigned int max_output_threshold)
1890 {
1891 int i;
1892 struct qdio_q *q;
1893
1894 for (i=0;i<no_input_qs;i++) {
1895 q=irq_ptr->input_qs[i];
1896 q->timing.threshold=max_input_threshold;
1897 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1898 q->threshold_classes[j].threshold=
1899 min_input_threshold+
1900 (max_input_threshold-min_input_threshold)/
1901 QDIO_STATS_CLASSES;
1902 }
1903 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1904 }
1905 for (i=0;i<no_output_qs;i++) {
1906 q=irq_ptr->output_qs[i];
1907 q->timing.threshold=max_output_threshold;
1908 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1909 q->threshold_classes[j].threshold=
1910 min_output_threshold+
1911 (max_output_threshold-min_output_threshold)/
1912 QDIO_STATS_CLASSES;
1913 }
1914 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1915 }
1916 }
1917
1918 static int
1919 tiqdio_thinint_handler(void)
1920 {
1921 QDIO_DBF_TEXT4(0,trace,"thin_int");
1922
1923 #ifdef QDIO_PERFORMANCE_STATS
1924 perf_stats.thinints++;
1925 perf_stats.start_time_inbound=NOW;
1926 #endif /* QDIO_PERFORMANCE_STATS */
1927
1928 /* SVS only when needed:
1929 * issue SVS to benefit from iqdio interrupt avoidance
1930 * (SVS clears AISOI)*/
1931 if (!omit_svs)
1932 tiqdio_clear_global_summary();
1933
1934 tiqdio_inbound_checks();
1935 return 0;
1936 }
1937
1938 static void
1939 qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1940 {
1941 int i;
1942 #ifdef CONFIG_QDIO_DEBUG
1943 char dbf_text[15];
1944
1945 QDIO_DBF_TEXT5(0,trace,"newstate");
1946 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1947 QDIO_DBF_TEXT5(0,trace,dbf_text);
1948 #endif /* CONFIG_QDIO_DEBUG */
1949
1950 irq_ptr->state=state;
1951 for (i=0;i<irq_ptr->no_input_qs;i++)
1952 irq_ptr->input_qs[i]->state=state;
1953 for (i=0;i<irq_ptr->no_output_qs;i++)
1954 irq_ptr->output_qs[i]->state=state;
1955 mb();
1956 }
1957
1958 static inline void
1959 qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1960 {
1961 char dbf_text[15];
1962
1963 if (irb->esw.esw0.erw.cons) {
1964 sprintf(dbf_text,"sens%4x",schid.sch_no);
1965 QDIO_DBF_TEXT2(1,trace,dbf_text);
1966 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1967
1968 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1969 HEXDUMP16(WARN,"irb: ",irb);
1970 HEXDUMP16(WARN,"sense data: ",irb->ecw);
1971 }
1972
1973 }
1974
1975 static inline void
1976 qdio_handle_pci(struct qdio_irq *irq_ptr)
1977 {
1978 int i;
1979 struct qdio_q *q;
1980
1981 #ifdef QDIO_PERFORMANCE_STATS
1982 perf_stats.pcis++;
1983 perf_stats.start_time_inbound=NOW;
1984 #endif /* QDIO_PERFORMANCE_STATS */
1985 for (i=0;i<irq_ptr->no_input_qs;i++) {
1986 q=irq_ptr->input_qs[i];
1987 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1988 qdio_mark_q(q);
1989 else {
1990 #ifdef QDIO_PERFORMANCE_STATS
1991 perf_stats.tl_runs--;
1992 #endif /* QDIO_PERFORMANCE_STATS */
1993 __qdio_inbound_processing(q);
1994 }
1995 }
1996 if (!irq_ptr->hydra_gives_outbound_pcis)
1997 return;
1998 for (i=0;i<irq_ptr->no_output_qs;i++) {
1999 q=irq_ptr->output_qs[i];
2000 #ifdef QDIO_PERFORMANCE_STATS
2001 perf_stats.tl_runs--;
2002 #endif /* QDIO_PERFORMANCE_STATS */
2003 if (qdio_is_outbound_q_done(q))
2004 continue;
2005 if (!irq_ptr->sync_done_on_outb_pcis)
2006 SYNC_MEMORY;
2007 __qdio_outbound_processing(q);
2008 }
2009 }
2010
2011 static void qdio_establish_handle_irq(struct ccw_device*, int, int);
2012
2013 static inline void
2014 qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
2015 int cstat, int dstat)
2016 {
2017 struct qdio_irq *irq_ptr;
2018 struct qdio_q *q;
2019 char dbf_text[15];
2020
2021 irq_ptr = cdev->private->qdio_data;
2022
2023 QDIO_DBF_TEXT2(1, trace, "ick2");
2024 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2025 QDIO_DBF_TEXT2(1,trace,dbf_text);
2026 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2027 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2028 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2029 QDIO_PRINT_ERR("received check condition on activate " \
2030 "queues on device %s (cs=x%x, ds=x%x).\n",
2031 cdev->dev.bus_id, cstat, dstat);
2032 if (irq_ptr->no_input_qs) {
2033 q=irq_ptr->input_qs[0];
2034 } else if (irq_ptr->no_output_qs) {
2035 q=irq_ptr->output_qs[0];
2036 } else {
2037 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2038 cdev->dev.bus_id);
2039 goto omit_handler_call;
2040 }
2041 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2042 QDIO_STATUS_LOOK_FOR_ERROR,
2043 0,0,0,-1,-1,q->int_parm);
2044 omit_handler_call:
2045 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2046
2047 }
2048
2049 static void
2050 qdio_call_shutdown(void *data)
2051 {
2052 struct ccw_device *cdev;
2053
2054 cdev = (struct ccw_device *)data;
2055 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2056 put_device(&cdev->dev);
2057 }
2058
2059 static void
2060 qdio_timeout_handler(struct ccw_device *cdev)
2061 {
2062 struct qdio_irq *irq_ptr;
2063 char dbf_text[15];
2064
2065 QDIO_DBF_TEXT2(0, trace, "qtoh");
2066 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2067 QDIO_DBF_TEXT2(0, trace, dbf_text);
2068
2069 irq_ptr = cdev->private->qdio_data;
2070 sprintf(dbf_text, "state:%d", irq_ptr->state);
2071 QDIO_DBF_TEXT2(0, trace, dbf_text);
2072
2073 switch (irq_ptr->state) {
2074 case QDIO_IRQ_STATE_INACTIVE:
2075 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2076 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2077 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2078 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2079 break;
2080 case QDIO_IRQ_STATE_CLEANUP:
2081 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2082 "irq=0.%x.%x.\n",
2083 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2084 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2085 break;
2086 case QDIO_IRQ_STATE_ESTABLISHED:
2087 case QDIO_IRQ_STATE_ACTIVE:
2088 /* I/O has been terminated by common I/O layer. */
2089 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2090 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2091 QDIO_DBF_TEXT2(1, trace, "cio:term");
2092 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2093 if (get_device(&cdev->dev)) {
2094 /* Can't call shutdown from interrupt context. */
2095 PREPARE_WORK(&cdev->private->kick_work,
2096 qdio_call_shutdown, (void *)cdev);
2097 queue_work(ccw_device_work, &cdev->private->kick_work);
2098 }
2099 break;
2100 default:
2101 BUG();
2102 }
2103 ccw_device_set_timeout(cdev, 0);
2104 wake_up(&cdev->private->wait_q);
2105 }
2106
2107 static void
2108 qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2109 {
2110 struct qdio_irq *irq_ptr;
2111 int cstat,dstat;
2112 char dbf_text[15];
2113
2114 #ifdef CONFIG_QDIO_DEBUG
2115 QDIO_DBF_TEXT4(0, trace, "qint");
2116 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2117 QDIO_DBF_TEXT4(0, trace, dbf_text);
2118 #endif /* CONFIG_QDIO_DEBUG */
2119
2120 if (!intparm) {
2121 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2122 "handler, device %s\n", cdev->dev.bus_id);
2123 return;
2124 }
2125
2126 irq_ptr = cdev->private->qdio_data;
2127 if (!irq_ptr) {
2128 QDIO_DBF_TEXT2(1, trace, "uint");
2129 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2130 QDIO_DBF_TEXT2(1,trace,dbf_text);
2131 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2132 cdev->dev.bus_id);
2133 return;
2134 }
2135
2136 if (IS_ERR(irb)) {
2137 /* Currently running i/o is in error. */
2138 switch (PTR_ERR(irb)) {
2139 case -EIO:
2140 QDIO_PRINT_ERR("i/o error on device %s\n",
2141 cdev->dev.bus_id);
2142 return;
2143 case -ETIMEDOUT:
2144 qdio_timeout_handler(cdev);
2145 return;
2146 default:
2147 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2148 PTR_ERR(irb), cdev->dev.bus_id);
2149 return;
2150 }
2151 }
2152
2153 qdio_irq_check_sense(irq_ptr->schid, irb);
2154
2155 #ifdef CONFIG_QDIO_DEBUG
2156 sprintf(dbf_text, "state:%d", irq_ptr->state);
2157 QDIO_DBF_TEXT4(0, trace, dbf_text);
2158 #endif /* CONFIG_QDIO_DEBUG */
2159
2160 cstat = irb->scsw.cstat;
2161 dstat = irb->scsw.dstat;
2162
2163 switch (irq_ptr->state) {
2164 case QDIO_IRQ_STATE_INACTIVE:
2165 qdio_establish_handle_irq(cdev, cstat, dstat);
2166 break;
2167
2168 case QDIO_IRQ_STATE_CLEANUP:
2169 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2170 break;
2171
2172 case QDIO_IRQ_STATE_ESTABLISHED:
2173 case QDIO_IRQ_STATE_ACTIVE:
2174 if (cstat & SCHN_STAT_PCI) {
2175 qdio_handle_pci(irq_ptr);
2176 break;
2177 }
2178
2179 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2180 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2181 break;
2182 }
2183 default:
2184 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2185 "device %s?!\n",
2186 irq_ptr->state, cdev->dev.bus_id);
2187 }
2188 wake_up(&cdev->private->wait_q);
2189
2190 }
2191
2192 int
2193 qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2194 unsigned int queue_number)
2195 {
2196 int cc = 0;
2197 struct qdio_q *q;
2198 struct qdio_irq *irq_ptr;
2199 void *ptr;
2200 #ifdef CONFIG_QDIO_DEBUG
2201 char dbf_text[15]="SyncXXXX";
2202 #endif
2203
2204 irq_ptr = cdev->private->qdio_data;
2205 if (!irq_ptr)
2206 return -ENODEV;
2207
2208 #ifdef CONFIG_QDIO_DEBUG
2209 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
2210 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2211 *((int*)(&dbf_text[0]))=flags;
2212 *((int*)(&dbf_text[4]))=queue_number;
2213 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2214 #endif /* CONFIG_QDIO_DEBUG */
2215
2216 if (flags&QDIO_FLAG_SYNC_INPUT) {
2217 q=irq_ptr->input_qs[queue_number];
2218 if (!q)
2219 return -EINVAL;
2220 if (!(irq_ptr->is_qebsm))
2221 cc = do_siga_sync(q->schid, 0, q->mask);
2222 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2223 q=irq_ptr->output_qs[queue_number];
2224 if (!q)
2225 return -EINVAL;
2226 if (!(irq_ptr->is_qebsm))
2227 cc = do_siga_sync(q->schid, q->mask, 0);
2228 } else
2229 return -EINVAL;
2230
2231 ptr=&cc;
2232 if (cc)
2233 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2234
2235 return cc;
2236 }
2237
2238 static inline void
2239 qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned char qdioac,
2240 unsigned long token)
2241 {
2242 struct qdio_q *q;
2243 int i;
2244 unsigned int count, start_buf;
2245 char dbf_text[15];
2246
2247 /*check if QEBSM is disabled */
2248 if (!(irq_ptr->is_qebsm) || !(qdioac & 0x01)) {
2249 irq_ptr->is_qebsm = 0;
2250 irq_ptr->sch_token = 0;
2251 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2252 QDIO_DBF_TEXT0(0,setup,"noV=V");
2253 return;
2254 }
2255 irq_ptr->sch_token = token;
2256 /*input queue*/
2257 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2258 q = irq_ptr->input_qs[i];
2259 count = QDIO_MAX_BUFFERS_PER_Q;
2260 start_buf = 0;
2261 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2262 }
2263 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2264 QDIO_DBF_TEXT0(0,setup,dbf_text);
2265 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2266 QDIO_DBF_TEXT0(0,setup,dbf_text);
2267 /*output queue*/
2268 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2269 q = irq_ptr->output_qs[i];
2270 count = QDIO_MAX_BUFFERS_PER_Q;
2271 start_buf = 0;
2272 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2273 }
2274 }
2275
2276 static void
2277 qdio_get_ssqd_information(struct qdio_irq *irq_ptr)
2278 {
2279 int result;
2280 unsigned char qdioac;
2281 struct {
2282 struct chsc_header request;
2283 u16 reserved1:10;
2284 u16 ssid:2;
2285 u16 fmt:4;
2286 u16 first_sch;
2287 u16 reserved2;
2288 u16 last_sch;
2289 u32 reserved3;
2290 struct chsc_header response;
2291 u32 reserved4;
2292 u8 flags;
2293 u8 reserved5;
2294 u16 sch;
2295 u8 qfmt;
2296 u8 parm;
2297 u8 qdioac1;
2298 u8 sch_class;
2299 u8 reserved7;
2300 u8 icnt;
2301 u8 reserved8;
2302 u8 ocnt;
2303 u8 reserved9;
2304 u8 mbccnt;
2305 u16 qdioac2;
2306 u64 sch_token;
2307 } *ssqd_area;
2308
2309 QDIO_DBF_TEXT0(0,setup,"getssqd");
2310 qdioac = 0;
2311 ssqd_area = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
2312 if (!ssqd_area) {
2313 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
2314 "SIGAs for sch x%x.\n", irq_ptr->schid.sch_no);
2315 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2316 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2317 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2318 irq_ptr->is_qebsm = 0;
2319 irq_ptr->sch_token = 0;
2320 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2321 return;
2322 }
2323
2324 ssqd_area->request = (struct chsc_header) {
2325 .length = 0x0010,
2326 .code = 0x0024,
2327 };
2328 ssqd_area->first_sch = irq_ptr->schid.sch_no;
2329 ssqd_area->last_sch = irq_ptr->schid.sch_no;
2330 ssqd_area->ssid = irq_ptr->schid.ssid;
2331 result = chsc(ssqd_area);
2332
2333 if (result) {
2334 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
2335 "SIGAs for sch 0.%x.%x.\n", result,
2336 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2337 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2338 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2339 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2340 irq_ptr->is_qebsm = 0;
2341 goto out;
2342 }
2343
2344 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2345 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2346 "is 0x%x. Using all SIGAs for sch 0.%x.%x.\n",
2347 ssqd_area->response.code,
2348 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2349 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2350 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2351 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2352 irq_ptr->is_qebsm = 0;
2353 goto out;
2354 }
2355 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2356 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2357 (ssqd_area->sch != irq_ptr->schid.sch_no)) {
2358 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2359 "using all SIGAs.\n",
2360 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2361 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2362 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2363 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2364 irq_ptr->is_qebsm = 0;
2365 goto out;
2366 }
2367 qdioac = ssqd_area->qdioac1;
2368 out:
2369 qdio_check_subchannel_qebsm(irq_ptr, qdioac,
2370 ssqd_area->sch_token);
2371 free_page ((unsigned long) ssqd_area);
2372 irq_ptr->qdioac = qdioac;
2373 }
2374
2375 static unsigned int
2376 tiqdio_check_chsc_availability(void)
2377 {
2378 char dbf_text[15];
2379
2380 if (!css_characteristics_avail)
2381 return -EIO;
2382
2383 /* Check for bit 41. */
2384 if (!css_general_characteristics.aif) {
2385 QDIO_PRINT_WARN("Adapter interruption facility not " \
2386 "installed.\n");
2387 return -ENOENT;
2388 }
2389
2390 /* Check for bits 107 and 108. */
2391 if (!css_chsc_characteristics.scssc ||
2392 !css_chsc_characteristics.scsscf) {
2393 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2394 "not available.\n");
2395 return -ENOENT;
2396 }
2397
2398 /* Check for OSA/FCP thin interrupts (bit 67). */
2399 hydra_thinints = css_general_characteristics.aif_osa;
2400 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2401 QDIO_DBF_TEXT0(0,setup,dbf_text);
2402
2403 #ifdef CONFIG_64BIT
2404 /* Check for QEBSM support in general (bit 58). */
2405 is_passthrough = css_general_characteristics.qebsm;
2406 #endif
2407 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2408 QDIO_DBF_TEXT0(0,setup,dbf_text);
2409
2410 /* Check for aif time delay disablement fac (bit 56). If installed,
2411 * omit svs even under lpar (good point by rick again) */
2412 omit_svs = css_general_characteristics.aif_tdd;
2413 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2414 QDIO_DBF_TEXT0(0,setup,dbf_text);
2415 return 0;
2416 }
2417
2418
2419 static unsigned int
2420 tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2421 {
2422 unsigned long real_addr_local_summary_bit;
2423 unsigned long real_addr_dev_st_chg_ind;
2424 void *ptr;
2425 char dbf_text[15];
2426
2427 unsigned int resp_code;
2428 int result;
2429
2430 struct {
2431 struct chsc_header request;
2432 u16 operation_code;
2433 u16 reserved1;
2434 u32 reserved2;
2435 u32 reserved3;
2436 u64 summary_indicator_addr;
2437 u64 subchannel_indicator_addr;
2438 u32 ks:4;
2439 u32 kc:4;
2440 u32 reserved4:21;
2441 u32 isc:3;
2442 u32 word_with_d_bit;
2443 /* set to 0x10000000 to enable
2444 * time delay disablement facility */
2445 u32 reserved5;
2446 struct subchannel_id schid;
2447 u32 reserved6[1004];
2448 struct chsc_header response;
2449 u32 reserved7;
2450 } *scssc_area;
2451
2452 if (!irq_ptr->is_thinint_irq)
2453 return -ENODEV;
2454
2455 if (reset_to_zero) {
2456 real_addr_local_summary_bit=0;
2457 real_addr_dev_st_chg_ind=0;
2458 } else {
2459 real_addr_local_summary_bit=
2460 virt_to_phys((volatile void *)indicators);
2461 real_addr_dev_st_chg_ind=
2462 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2463 }
2464
2465 scssc_area = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
2466 if (!scssc_area) {
2467 QDIO_PRINT_WARN("No memory for setting indicators on " \
2468 "subchannel 0.%x.%x.\n",
2469 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2470 return -ENOMEM;
2471 }
2472 scssc_area->request = (struct chsc_header) {
2473 .length = 0x0fe0,
2474 .code = 0x0021,
2475 };
2476 scssc_area->operation_code = 0;
2477
2478 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2479 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2480 scssc_area->ks = QDIO_STORAGE_KEY;
2481 scssc_area->kc = QDIO_STORAGE_KEY;
2482 scssc_area->isc = TIQDIO_THININT_ISC;
2483 scssc_area->schid = irq_ptr->schid;
2484 /* enables the time delay disablement facility. Don't care
2485 * whether it is really there (i.e. we haven't checked for
2486 * it) */
2487 if (css_general_characteristics.aif_tdd)
2488 scssc_area->word_with_d_bit = 0x10000000;
2489 else
2490 QDIO_PRINT_WARN("Time delay disablement facility " \
2491 "not available\n");
2492
2493 result = chsc(scssc_area);
2494 if (result) {
2495 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2496 "cc=%i.\n",
2497 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
2498 result = -EIO;
2499 goto out;
2500 }
2501
2502 resp_code = scssc_area->response.code;
2503 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2504 QDIO_PRINT_WARN("response upon setting indicators " \
2505 "is 0x%x.\n",resp_code);
2506 sprintf(dbf_text,"sidR%4x",resp_code);
2507 QDIO_DBF_TEXT1(0,trace,dbf_text);
2508 QDIO_DBF_TEXT1(0,setup,dbf_text);
2509 ptr=&scssc_area->response;
2510 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2511 result = -EIO;
2512 goto out;
2513 }
2514
2515 QDIO_DBF_TEXT2(0,setup,"setscind");
2516 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2517 sizeof(unsigned long));
2518 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2519 result = 0;
2520 out:
2521 free_page ((unsigned long) scssc_area);
2522 return result;
2523
2524 }
2525
2526 static unsigned int
2527 tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2528 {
2529 unsigned int resp_code;
2530 int result;
2531 void *ptr;
2532 char dbf_text[15];
2533
2534 struct {
2535 struct chsc_header request;
2536 u16 operation_code;
2537 u16 reserved1;
2538 u32 reserved2;
2539 u32 reserved3;
2540 u32 reserved4[2];
2541 u32 delay_target;
2542 u32 reserved5[1009];
2543 struct chsc_header response;
2544 u32 reserved6;
2545 } *scsscf_area;
2546
2547 if (!irq_ptr->is_thinint_irq)
2548 return -ENODEV;
2549
2550 scsscf_area = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
2551 if (!scsscf_area) {
2552 QDIO_PRINT_WARN("No memory for setting delay target on " \
2553 "subchannel 0.%x.%x.\n",
2554 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2555 return -ENOMEM;
2556 }
2557 scsscf_area->request = (struct chsc_header) {
2558 .length = 0x0fe0,
2559 .code = 0x1027,
2560 };
2561
2562 scsscf_area->delay_target = delay_target<<16;
2563
2564 result=chsc(scsscf_area);
2565 if (result) {
2566 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2567 "cc=%i. Continuing.\n",
2568 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2569 result);
2570 result = -EIO;
2571 goto out;
2572 }
2573
2574 resp_code = scsscf_area->response.code;
2575 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2576 QDIO_PRINT_WARN("response upon setting delay target " \
2577 "is 0x%x. Continuing.\n",resp_code);
2578 sprintf(dbf_text,"sdtR%4x",resp_code);
2579 QDIO_DBF_TEXT1(0,trace,dbf_text);
2580 QDIO_DBF_TEXT1(0,setup,dbf_text);
2581 ptr=&scsscf_area->response;
2582 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2583 }
2584 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2585 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2586 result = 0; /* not critical */
2587 out:
2588 free_page ((unsigned long) scsscf_area);
2589 return result;
2590 }
2591
2592 int
2593 qdio_cleanup(struct ccw_device *cdev, int how)
2594 {
2595 struct qdio_irq *irq_ptr;
2596 char dbf_text[15];
2597 int rc;
2598
2599 irq_ptr = cdev->private->qdio_data;
2600 if (!irq_ptr)
2601 return -ENODEV;
2602
2603 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
2604 QDIO_DBF_TEXT1(0,trace,dbf_text);
2605 QDIO_DBF_TEXT0(0,setup,dbf_text);
2606
2607 rc = qdio_shutdown(cdev, how);
2608 if ((rc == 0) || (rc == -EINPROGRESS))
2609 rc = qdio_free(cdev);
2610 return rc;
2611 }
2612
2613 int
2614 qdio_shutdown(struct ccw_device *cdev, int how)
2615 {
2616 struct qdio_irq *irq_ptr;
2617 int i;
2618 int result = 0;
2619 int rc;
2620 unsigned long flags;
2621 int timeout;
2622 char dbf_text[15];
2623
2624 irq_ptr = cdev->private->qdio_data;
2625 if (!irq_ptr)
2626 return -ENODEV;
2627
2628 down(&irq_ptr->setting_up_sema);
2629
2630 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
2631 QDIO_DBF_TEXT1(0,trace,dbf_text);
2632 QDIO_DBF_TEXT0(0,setup,dbf_text);
2633
2634 /* mark all qs as uninteresting */
2635 for (i=0;i<irq_ptr->no_input_qs;i++)
2636 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2637
2638 for (i=0;i<irq_ptr->no_output_qs;i++)
2639 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2640
2641 tasklet_kill(&tiqdio_tasklet);
2642
2643 for (i=0;i<irq_ptr->no_input_qs;i++) {
2644 qdio_unmark_q(irq_ptr->input_qs[i]);
2645 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2646 wait_event_interruptible_timeout(cdev->private->wait_q,
2647 !atomic_read(&irq_ptr->
2648 input_qs[i]->
2649 use_count),
2650 QDIO_NO_USE_COUNT_TIMEOUT);
2651 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2652 result=-EINPROGRESS;
2653 }
2654
2655 for (i=0;i<irq_ptr->no_output_qs;i++) {
2656 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2657 wait_event_interruptible_timeout(cdev->private->wait_q,
2658 !atomic_read(&irq_ptr->
2659 output_qs[i]->
2660 use_count),
2661 QDIO_NO_USE_COUNT_TIMEOUT);
2662 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2663 result=-EINPROGRESS;
2664 }
2665
2666 /* cleanup subchannel */
2667 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2668 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2669 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2670 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2671 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2672 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2673 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2674 } else { /* default behaviour */
2675 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2676 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2677 }
2678 if (rc == -ENODEV) {
2679 /* No need to wait for device no longer present. */
2680 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2681 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2682 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2683 /*
2684 * Whoever put another handler there, has to cope with the
2685 * interrupt theirself. Might happen if qdio_shutdown was
2686 * called on already shutdown queues, but this shouldn't have
2687 * bad side effects.
2688 */
2689 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2690 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2691 } else if (rc == 0) {
2692 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2693 ccw_device_set_timeout(cdev, timeout);
2694 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2695
2696 wait_event(cdev->private->wait_q,
2697 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2698 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2699 } else {
2700 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2701 "device %s\n", result, cdev->dev.bus_id);
2702 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2703 result = rc;
2704 goto out;
2705 }
2706 if (irq_ptr->is_thinint_irq) {
2707 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2708 tiqdio_set_subchannel_ind(irq_ptr,1);
2709 /* reset adapter interrupt indicators */
2710 }
2711
2712 /* exchange int handlers, if necessary */
2713 if ((void*)cdev->handler == (void*)qdio_handler)
2714 cdev->handler=irq_ptr->original_int_handler;
2715
2716 /* Ignore errors. */
2717 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2718 ccw_device_set_timeout(cdev, 0);
2719 out:
2720 up(&irq_ptr->setting_up_sema);
2721 return result;
2722 }
2723
2724 int
2725 qdio_free(struct ccw_device *cdev)
2726 {
2727 struct qdio_irq *irq_ptr;
2728 char dbf_text[15];
2729
2730 irq_ptr = cdev->private->qdio_data;
2731 if (!irq_ptr)
2732 return -ENODEV;
2733
2734 down(&irq_ptr->setting_up_sema);
2735
2736 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
2737 QDIO_DBF_TEXT1(0,trace,dbf_text);
2738 QDIO_DBF_TEXT0(0,setup,dbf_text);
2739
2740 cdev->private->qdio_data = 0;
2741
2742 up(&irq_ptr->setting_up_sema);
2743
2744 qdio_release_irq_memory(irq_ptr);
2745 module_put(THIS_MODULE);
2746 return 0;
2747 }
2748
2749 static inline void
2750 qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2751 {
2752 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2753
2754 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2755 QDIO_DBF_TEXT0(0,setup,dbf_text);
2756 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2757 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2758 QDIO_DBF_TEXT0(0,setup,dbf_text);
2759 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2760 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2761 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2762 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2763 QDIO_DBF_TEXT0(0,setup,dbf_text);
2764 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2765 QDIO_DBF_TEXT0(0,setup,dbf_text);
2766 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2767 QDIO_DBF_TEXT0(0,setup,dbf_text);
2768 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2769 QDIO_DBF_TEXT0(0,setup,dbf_text);
2770 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2771 QDIO_DBF_TEXT0(0,setup,dbf_text);
2772 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2773 QDIO_DBF_TEXT0(0,setup,dbf_text);
2774 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2775 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2776 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2777 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2778 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2779 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2780 }
2781
2782 static inline void
2783 qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2784 {
2785 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2786 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2787
2788 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2789
2790 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2791
2792 irq_ptr->qdr->qdf0[i].slsba=
2793 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2794
2795 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2796 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2797 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2798 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2799 }
2800
2801 static inline void
2802 qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2803 int j, int iqfmt)
2804 {
2805 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2806 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2807
2808 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2809
2810 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2811
2812 irq_ptr->qdr->qdf0[i+j].slsba=
2813 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2814
2815 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2816 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2817 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2818 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2819 }
2820
2821
2822 static inline void
2823 qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2824 {
2825 int i;
2826
2827 for (i=0;i<irq_ptr->no_input_qs;i++) {
2828 irq_ptr->input_qs[i]->siga_sync=
2829 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2830 irq_ptr->input_qs[i]->siga_in=
2831 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2832 irq_ptr->input_qs[i]->siga_out=
2833 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2834 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2835 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2836 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2837 irq_ptr->hydra_gives_outbound_pcis;
2838 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2839 ((irq_ptr->qdioac&
2840 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2841 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2842 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2843 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2844
2845 }
2846 }
2847
2848 static inline void
2849 qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2850 {
2851 int i;
2852
2853 for (i=0;i<irq_ptr->no_output_qs;i++) {
2854 irq_ptr->output_qs[i]->siga_sync=
2855 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2856 irq_ptr->output_qs[i]->siga_in=
2857 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2858 irq_ptr->output_qs[i]->siga_out=
2859 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2860 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2861 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2862 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2863 irq_ptr->hydra_gives_outbound_pcis;
2864 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2865 ((irq_ptr->qdioac&
2866 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2867 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2868 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2869 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2870
2871 }
2872 }
2873
2874 static inline int
2875 qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2876 int dstat)
2877 {
2878 char dbf_text[15];
2879 struct qdio_irq *irq_ptr;
2880
2881 irq_ptr = cdev->private->qdio_data;
2882
2883 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2884 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
2885 QDIO_DBF_TEXT2(1,trace,dbf_text);
2886 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2887 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2888 QDIO_PRINT_ERR("received check condition on establish " \
2889 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2890 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2891 cstat,dstat);
2892 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2893 }
2894
2895 if (!(dstat & DEV_STAT_DEV_END)) {
2896 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2897 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2898 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2899 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
2900 "device end: dstat=%02x, cstat=%02x\n",
2901 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2902 dstat, cstat);
2903 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2904 return 1;
2905 }
2906
2907 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2908 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2909 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2910 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2911 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
2912 "the following devstat: dstat=%02x, "
2913 "cstat=%02x\n", irq_ptr->schid.ssid,
2914 irq_ptr->schid.sch_no, dstat, cstat);
2915 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2916 return 1;
2917 }
2918 return 0;
2919 }
2920
2921 static void
2922 qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2923 {
2924 struct qdio_irq *irq_ptr;
2925 char dbf_text[15];
2926
2927 irq_ptr = cdev->private->qdio_data;
2928
2929 sprintf(dbf_text,"qehi%4x",cdev->private->sch_no);
2930 QDIO_DBF_TEXT0(0,setup,dbf_text);
2931 QDIO_DBF_TEXT0(0,trace,dbf_text);
2932
2933 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2934 ccw_device_set_timeout(cdev, 0);
2935 return;
2936 }
2937
2938 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2939 ccw_device_set_timeout(cdev, 0);
2940 }
2941
2942 int
2943 qdio_initialize(struct qdio_initialize *init_data)
2944 {
2945 int rc;
2946 char dbf_text[15];
2947
2948 sprintf(dbf_text,"qini%4x",init_data->cdev->private->sch_no);
2949 QDIO_DBF_TEXT0(0,setup,dbf_text);
2950 QDIO_DBF_TEXT0(0,trace,dbf_text);
2951
2952 rc = qdio_allocate(init_data);
2953 if (rc == 0) {
2954 rc = qdio_establish(init_data);
2955 if (rc != 0)
2956 qdio_free(init_data->cdev);
2957 }
2958
2959 return rc;
2960 }
2961
2962
2963 int
2964 qdio_allocate(struct qdio_initialize *init_data)
2965 {
2966 struct qdio_irq *irq_ptr;
2967 char dbf_text[15];
2968
2969 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->sch_no);
2970 QDIO_DBF_TEXT0(0,setup,dbf_text);
2971 QDIO_DBF_TEXT0(0,trace,dbf_text);
2972 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2973 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2974 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2975 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2976 return -EINVAL;
2977
2978 if (!init_data->input_sbal_addr_array)
2979 return -EINVAL;
2980
2981 if (!init_data->output_sbal_addr_array)
2982 return -EINVAL;
2983
2984 qdio_allocate_do_dbf(init_data);
2985
2986 /* create irq */
2987 irq_ptr=kmalloc(sizeof(struct qdio_irq), GFP_KERNEL | GFP_DMA);
2988
2989 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2990 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2991
2992 if (!irq_ptr) {
2993 QDIO_PRINT_ERR("kmalloc of irq_ptr failed!\n");
2994 return -ENOMEM;
2995 }
2996
2997 memset(irq_ptr,0,sizeof(struct qdio_irq));
2998
2999 init_MUTEX(&irq_ptr->setting_up_sema);
3000
3001 /* QDR must be in DMA area since CCW data address is only 32 bit */
3002 irq_ptr->qdr=kmalloc(sizeof(struct qdr), GFP_KERNEL | GFP_DMA);
3003 if (!(irq_ptr->qdr)) {
3004 kfree(irq_ptr);
3005 QDIO_PRINT_ERR("kmalloc of irq_ptr->qdr failed!\n");
3006 return -ENOMEM;
3007 }
3008 QDIO_DBF_TEXT0(0,setup,"qdr:");
3009 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
3010
3011 if (qdio_alloc_qs(irq_ptr,
3012 init_data->no_input_qs,
3013 init_data->no_output_qs)) {
3014 qdio_release_irq_memory(irq_ptr);
3015 return -ENOMEM;
3016 }
3017
3018 init_data->cdev->private->qdio_data = irq_ptr;
3019
3020 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
3021
3022 return 0;
3023 }
3024
3025 int qdio_fill_irq(struct qdio_initialize *init_data)
3026 {
3027 int i;
3028 char dbf_text[15];
3029 struct ciw *ciw;
3030 int is_iqdio;
3031 struct qdio_irq *irq_ptr;
3032
3033 irq_ptr = init_data->cdev->private->qdio_data;
3034
3035 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3036
3037 /* wipes qib.ac, required by ar7063 */
3038 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3039
3040 irq_ptr->int_parm=init_data->int_parm;
3041
3042 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
3043 irq_ptr->no_input_qs=init_data->no_input_qs;
3044 irq_ptr->no_output_qs=init_data->no_output_qs;
3045
3046 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3047 irq_ptr->is_iqdio_irq=1;
3048 irq_ptr->is_thinint_irq=1;
3049 } else {
3050 irq_ptr->is_iqdio_irq=0;
3051 irq_ptr->is_thinint_irq=hydra_thinints;
3052 }
3053 sprintf(dbf_text,"is_i_t%1x%1x",
3054 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3055 QDIO_DBF_TEXT2(0,setup,dbf_text);
3056
3057 if (irq_ptr->is_thinint_irq) {
3058 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
3059 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3060 if (!irq_ptr->dev_st_chg_ind) {
3061 QDIO_PRINT_WARN("no indicator location available " \
3062 "for irq 0.%x.%x\n",
3063 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
3064 qdio_release_irq_memory(irq_ptr);
3065 return -ENOBUFS;
3066 }
3067 }
3068
3069 /* defaults */
3070 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3071 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3072 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3073 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3074
3075 qdio_fill_qs(irq_ptr, init_data->cdev,
3076 init_data->no_input_qs,
3077 init_data->no_output_qs,
3078 init_data->input_handler,
3079 init_data->output_handler,init_data->int_parm,
3080 init_data->q_format,init_data->flags,
3081 init_data->input_sbal_addr_array,
3082 init_data->output_sbal_addr_array);
3083
3084 if (!try_module_get(THIS_MODULE)) {
3085 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3086 qdio_release_irq_memory(irq_ptr);
3087 return -EINVAL;
3088 }
3089
3090 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3091 init_data->no_output_qs,
3092 init_data->min_input_threshold,
3093 init_data->max_input_threshold,
3094 init_data->min_output_threshold,
3095 init_data->max_output_threshold);
3096
3097 /* fill in qdr */
3098 irq_ptr->qdr->qfmt=init_data->q_format;
3099 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3100 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3101 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3102 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3103
3104 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3105 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3106
3107 /* fill in qib */
3108 irq_ptr->is_qebsm = is_passthrough;
3109 if (irq_ptr->is_qebsm)
3110 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3111
3112 irq_ptr->qib.qfmt=init_data->q_format;
3113 if (init_data->no_input_qs)
3114 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3115 if (init_data->no_output_qs)
3116 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3117 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3118
3119 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3120 init_data->qib_param_field,
3121 init_data->no_input_qs,
3122 init_data->no_output_qs,
3123 init_data->input_slib_elements,
3124 init_data->output_slib_elements);
3125
3126 /* first input descriptors, then output descriptors */
3127 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3128 for (i=0;i<init_data->no_input_qs;i++)
3129 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3130
3131 for (i=0;i<init_data->no_output_qs;i++)
3132 qdio_allocate_fill_output_desc(irq_ptr, i,
3133 init_data->no_input_qs,
3134 is_iqdio);
3135
3136 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3137
3138 /* get qdio commands */
3139 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3140 if (!ciw) {
3141 QDIO_DBF_TEXT2(1,setup,"no eq");
3142 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3143 "Trying to use default.\n");
3144 } else
3145 irq_ptr->equeue = *ciw;
3146 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3147 if (!ciw) {
3148 QDIO_DBF_TEXT2(1,setup,"no aq");
3149 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3150 "Trying to use default.\n");
3151 } else
3152 irq_ptr->aqueue = *ciw;
3153
3154 /* Set new interrupt handler. */
3155 irq_ptr->original_int_handler = init_data->cdev->handler;
3156 init_data->cdev->handler = qdio_handler;
3157
3158 return 0;
3159 }
3160
3161 int
3162 qdio_establish(struct qdio_initialize *init_data)
3163 {
3164 struct qdio_irq *irq_ptr;
3165 unsigned long saveflags;
3166 int result, result2;
3167 struct ccw_device *cdev;
3168 char dbf_text[20];
3169
3170 cdev=init_data->cdev;
3171 irq_ptr = cdev->private->qdio_data;
3172 if (!irq_ptr)
3173 return -EINVAL;
3174
3175 if (cdev->private->state != DEV_STATE_ONLINE)
3176 return -EINVAL;
3177
3178 down(&irq_ptr->setting_up_sema);
3179
3180 qdio_fill_irq(init_data);
3181
3182 /* the thinint CHSC stuff */
3183 if (irq_ptr->is_thinint_irq) {
3184
3185 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3186 if (result) {
3187 up(&irq_ptr->setting_up_sema);
3188 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3189 return result;
3190 }
3191 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3192 }
3193
3194 sprintf(dbf_text,"qest%4x",cdev->private->sch_no);
3195 QDIO_DBF_TEXT0(0,setup,dbf_text);
3196 QDIO_DBF_TEXT0(0,trace,dbf_text);
3197
3198 /* establish q */
3199 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3200 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3201 irq_ptr->ccw.count=irq_ptr->equeue.count;
3202 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3203
3204 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3205
3206 ccw_device_set_options(cdev, 0);
3207 result=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3208 QDIO_DOING_ESTABLISH,0, 0,
3209 QDIO_ESTABLISH_TIMEOUT);
3210 if (result) {
3211 result2=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3212 QDIO_DOING_ESTABLISH,0,0,
3213 QDIO_ESTABLISH_TIMEOUT);
3214 sprintf(dbf_text,"eq:io%4x",result);
3215 QDIO_DBF_TEXT2(1,setup,dbf_text);
3216 if (result2) {
3217 sprintf(dbf_text,"eq:io%4x",result);
3218 QDIO_DBF_TEXT2(1,setup,dbf_text);
3219 }
3220 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3221 "returned %i, next try returned %i\n",
3222 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3223 result, result2);
3224 result=result2;
3225 if (result)
3226 ccw_device_set_timeout(cdev, 0);
3227 }
3228
3229 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3230
3231 if (result) {
3232 up(&irq_ptr->setting_up_sema);
3233 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3234 return result;
3235 }
3236
3237 /* Timeout is cared for already by using ccw_device_start_timeout(). */
3238 wait_event_interruptible(cdev->private->wait_q,
3239 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3240 irq_ptr->state == QDIO_IRQ_STATE_ERR);
3241
3242 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3243 result = 0;
3244 else {
3245 up(&irq_ptr->setting_up_sema);
3246 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3247 return -EIO;
3248 }
3249
3250 qdio_get_ssqd_information(irq_ptr);
3251 /* if this gets set once, we're running under VM and can omit SVSes */
3252 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3253 omit_svs=1;
3254
3255 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3256 QDIO_DBF_TEXT2(0,setup,dbf_text);
3257
3258 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3259 QDIO_DBF_TEXT2(0,setup,dbf_text);
3260
3261 irq_ptr->hydra_gives_outbound_pcis=
3262 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3263 irq_ptr->sync_done_on_outb_pcis=
3264 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3265
3266 qdio_initialize_set_siga_flags_input(irq_ptr);
3267 qdio_initialize_set_siga_flags_output(irq_ptr);
3268
3269 up(&irq_ptr->setting_up_sema);
3270
3271 return result;
3272
3273 }
3274
3275 int
3276 qdio_activate(struct ccw_device *cdev, int flags)
3277 {
3278 struct qdio_irq *irq_ptr;
3279 int i,result=0,result2;
3280 unsigned long saveflags;
3281 char dbf_text[20]; /* see qdio_initialize */
3282
3283 irq_ptr = cdev->private->qdio_data;
3284 if (!irq_ptr)
3285 return -ENODEV;
3286
3287 if (cdev->private->state != DEV_STATE_ONLINE)
3288 return -EINVAL;
3289
3290 down(&irq_ptr->setting_up_sema);
3291 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3292 result=-EBUSY;
3293 goto out;
3294 }
3295
3296 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
3297 QDIO_DBF_TEXT2(0,setup,dbf_text);
3298 QDIO_DBF_TEXT2(0,trace,dbf_text);
3299
3300 /* activate q */
3301 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3302 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3303 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3304 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3305
3306 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3307
3308 ccw_device_set_timeout(cdev, 0);
3309 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3310 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3311 0, DOIO_DENY_PREFETCH);
3312 if (result) {
3313 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3314 QDIO_DOING_ACTIVATE,0,0);
3315 sprintf(dbf_text,"aq:io%4x",result);
3316 QDIO_DBF_TEXT2(1,setup,dbf_text);
3317 if (result2) {
3318 sprintf(dbf_text,"aq:io%4x",result);
3319 QDIO_DBF_TEXT2(1,setup,dbf_text);
3320 }
3321 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3322 "returned %i, next try returned %i\n",
3323 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3324 result, result2);
3325 result=result2;
3326 }
3327
3328 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3329 if (result)
3330 goto out;
3331
3332 for (i=0;i<irq_ptr->no_input_qs;i++) {
3333 if (irq_ptr->is_thinint_irq) {
3334 /*
3335 * that way we know, that, if we will get interrupted
3336 * by tiqdio_inbound_processing, qdio_unmark_q will
3337 * not be called
3338 */
3339 qdio_reserve_q(irq_ptr->input_qs[i]);
3340 qdio_mark_tiq(irq_ptr->input_qs[i]);
3341 qdio_release_q(irq_ptr->input_qs[i]);
3342 }
3343 }
3344
3345 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3346 for (i=0;i<irq_ptr->no_input_qs;i++) {
3347 irq_ptr->input_qs[i]->is_input_q|=
3348 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3349 }
3350 }
3351
3352 wait_event_interruptible_timeout(cdev->private->wait_q,
3353 ((irq_ptr->state ==
3354 QDIO_IRQ_STATE_STOPPED) ||
3355 (irq_ptr->state ==
3356 QDIO_IRQ_STATE_ERR)),
3357 QDIO_ACTIVATE_TIMEOUT);
3358
3359 switch (irq_ptr->state) {
3360 case QDIO_IRQ_STATE_STOPPED:
3361 case QDIO_IRQ_STATE_ERR:
3362 up(&irq_ptr->setting_up_sema);
3363 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3364 down(&irq_ptr->setting_up_sema);
3365 result = -EIO;
3366 break;
3367 default:
3368 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3369 result = 0;
3370 }
3371 out:
3372 up(&irq_ptr->setting_up_sema);
3373
3374 return result;
3375 }
3376
3377 /* buffers filled forwards again to make Rick happy */
3378 static inline void
3379 qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3380 unsigned int count, struct qdio_buffer *buffers)
3381 {
3382 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3383 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3384 if (irq->is_qebsm) {
3385 while (count)
3386 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3387 return;
3388 }
3389 for (;;) {
3390 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3391 count--;
3392 if (!count) break;
3393 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3394 }
3395 }
3396
3397 static inline void
3398 qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3399 unsigned int count, struct qdio_buffer *buffers)
3400 {
3401 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3402
3403 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3404 if (irq->is_qebsm) {
3405 while (count)
3406 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3407 return;
3408 }
3409
3410 for (;;) {
3411 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3412 count--;
3413 if (!count) break;
3414 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3415 }
3416 }
3417
3418 static inline void
3419 do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3420 unsigned int qidx, unsigned int count,
3421 struct qdio_buffer *buffers)
3422 {
3423 int used_elements;
3424
3425 /* This is the inbound handling of queues */
3426 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3427
3428 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3429
3430 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3431 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3432 atomic_swap(&q->polling,0);
3433
3434 if (used_elements)
3435 return;
3436 if (callflags&QDIO_FLAG_DONT_SIGA)
3437 return;
3438 if (q->siga_in) {
3439 int result;
3440
3441 result=qdio_siga_input(q);
3442 if (result) {
3443 if (q->siga_error)
3444 q->error_status_flags|=
3445 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3446 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3447 q->siga_error=result;
3448 }
3449 }
3450
3451 qdio_mark_q(q);
3452 }
3453
3454 static inline void
3455 do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3456 unsigned int qidx, unsigned int count,
3457 struct qdio_buffer *buffers)
3458 {
3459 int used_elements;
3460 unsigned int cnt, start_buf;
3461 unsigned char state = 0;
3462 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3463
3464 /* This is the outbound handling of queues */
3465 #ifdef QDIO_PERFORMANCE_STATS
3466 perf_stats.start_time_outbound=NOW;
3467 #endif /* QDIO_PERFORMANCE_STATS */
3468
3469 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3470
3471 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3472
3473 if (callflags&QDIO_FLAG_DONT_SIGA) {
3474 #ifdef QDIO_PERFORMANCE_STATS
3475 perf_stats.outbound_time+=NOW-perf_stats.start_time_outbound;
3476 perf_stats.outbound_cnt++;
3477 #endif /* QDIO_PERFORMANCE_STATS */
3478 return;
3479 }
3480 if (q->is_iqdio_q) {
3481 /* one siga for every sbal */
3482 while (count--)
3483 qdio_kick_outbound_q(q);
3484
3485 __qdio_outbound_processing(q);
3486 } else {
3487 /* under VM, we do a SIGA sync unconditionally */
3488 SYNC_MEMORY;
3489 else {
3490 /*
3491 * w/o shadow queues (else branch of
3492 * SYNC_MEMORY :-/ ), we try to
3493 * fast-requeue buffers
3494 */
3495 if (irq->is_qebsm) {
3496 cnt = 1;
3497 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3498 (QDIO_MAX_BUFFERS_PER_Q-1));
3499 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3500 } else
3501 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3502 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3503 if (state != SLSB_CU_OUTPUT_PRIMED) {
3504 qdio_kick_outbound_q(q);
3505 } else {
3506 QDIO_DBF_TEXT3(0,trace, "fast-req");
3507 #ifdef QDIO_PERFORMANCE_STATS
3508 perf_stats.fast_reqs++;
3509 #endif /* QDIO_PERFORMANCE_STATS */
3510 }
3511 }
3512 /*
3513 * only marking the q could take too long,
3514 * the upper layer module could do a lot of
3515 * traffic in that time
3516 */
3517 __qdio_outbound_processing(q);
3518 }
3519
3520 #ifdef QDIO_PERFORMANCE_STATS
3521 perf_stats.outbound_time+=NOW-perf_stats.start_time_outbound;
3522 perf_stats.outbound_cnt++;
3523 #endif /* QDIO_PERFORMANCE_STATS */
3524 }
3525
3526 /* count must be 1 in iqdio */
3527 int
3528 do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3529 unsigned int queue_number, unsigned int qidx,
3530 unsigned int count,struct qdio_buffer *buffers)
3531 {
3532 struct qdio_irq *irq_ptr;
3533 #ifdef CONFIG_QDIO_DEBUG
3534 char dbf_text[20];
3535
3536 sprintf(dbf_text,"doQD%04x",cdev->private->sch_no);
3537 QDIO_DBF_TEXT3(0,trace,dbf_text);
3538 #endif /* CONFIG_QDIO_DEBUG */
3539
3540 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3541 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3542 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3543 return -EINVAL;
3544
3545 if (count==0)
3546 return 0;
3547
3548 irq_ptr = cdev->private->qdio_data;
3549 if (!irq_ptr)
3550 return -ENODEV;
3551
3552 #ifdef CONFIG_QDIO_DEBUG
3553 if (callflags&QDIO_FLAG_SYNC_INPUT)
3554 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3555 sizeof(void*));
3556 else
3557 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3558 sizeof(void*));
3559 sprintf(dbf_text,"flag%04x",callflags);
3560 QDIO_DBF_TEXT3(0,trace,dbf_text);
3561 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3562 QDIO_DBF_TEXT3(0,trace,dbf_text);
3563 #endif /* CONFIG_QDIO_DEBUG */
3564
3565 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3566 return -EBUSY;
3567
3568 if (callflags&QDIO_FLAG_SYNC_INPUT)
3569 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3570 callflags, qidx, count, buffers);
3571 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3572 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3573 callflags, qidx, count, buffers);
3574 else {
3575 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3576 return -EINVAL;
3577 }
3578 return 0;
3579 }
3580
3581 #ifdef QDIO_PERFORMANCE_STATS
3582 static int
3583 qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3584 int buffer_length, int *eof, void *data)
3585 {
3586 int c=0;
3587
3588 /* we are always called with buffer_length=4k, so we all
3589 deliver on the first read */
3590 if (offset>0)
3591 return 0;
3592
3593 #define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3594 _OUTP_IT("i_p_nc/c=%lu/%lu\n",i_p_nc,i_p_c);
3595 _OUTP_IT("ii_p_nc/c=%lu/%lu\n",ii_p_nc,ii_p_c);
3596 _OUTP_IT("o_p_nc/c=%lu/%lu\n",o_p_nc,o_p_c);
3597 _OUTP_IT("Number of tasklet runs (total) : %u\n",
3598 perf_stats.tl_runs);
3599 _OUTP_IT("\n");
3600 _OUTP_IT("Number of SIGA sync's issued : %u\n",
3601 perf_stats.siga_syncs);
3602 _OUTP_IT("Number of SIGA in's issued : %u\n",
3603 perf_stats.siga_ins);
3604 _OUTP_IT("Number of SIGA out's issued : %u\n",
3605 perf_stats.siga_outs);
3606 _OUTP_IT("Number of PCIs caught : %u\n",
3607 perf_stats.pcis);
3608 _OUTP_IT("Number of adapter interrupts caught : %u\n",
3609 perf_stats.thinints);
3610 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %u\n",
3611 perf_stats.fast_reqs);
3612 _OUTP_IT("\n");
3613 _OUTP_IT("Total time of all inbound actions (us) incl. UL : %u\n",
3614 perf_stats.inbound_time);
3615 _OUTP_IT("Number of inbound transfers : %u\n",
3616 perf_stats.inbound_cnt);
3617 _OUTP_IT("Total time of all outbound do_QDIOs (us) : %u\n",
3618 perf_stats.outbound_time);
3619 _OUTP_IT("Number of do_QDIOs outbound : %u\n",
3620 perf_stats.outbound_cnt);
3621 _OUTP_IT("\n");
3622
3623 return c;
3624 }
3625
3626 static struct proc_dir_entry *qdio_perf_proc_file;
3627 #endif /* QDIO_PERFORMANCE_STATS */
3628
3629 static void
3630 qdio_add_procfs_entry(void)
3631 {
3632 #ifdef QDIO_PERFORMANCE_STATS
3633 proc_perf_file_registration=0;
3634 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3635 S_IFREG|0444,&proc_root);
3636 if (qdio_perf_proc_file) {
3637 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3638 } else proc_perf_file_registration=-1;
3639
3640 if (proc_perf_file_registration)
3641 QDIO_PRINT_WARN("was not able to register perf. " \
3642 "proc-file (%i).\n",
3643 proc_perf_file_registration);
3644 #endif /* QDIO_PERFORMANCE_STATS */
3645 }
3646
3647 static void
3648 qdio_remove_procfs_entry(void)
3649 {
3650 #ifdef QDIO_PERFORMANCE_STATS
3651 perf_stats.tl_runs=0;
3652
3653 if (!proc_perf_file_registration) /* means if it went ok earlier */
3654 remove_proc_entry(QDIO_PERF,&proc_root);
3655 #endif /* QDIO_PERFORMANCE_STATS */
3656 }
3657
3658 static void
3659 tiqdio_register_thinints(void)
3660 {
3661 char dbf_text[20];
3662 register_thinint_result=
3663 s390_register_adapter_interrupt(&tiqdio_thinint_handler);
3664 if (register_thinint_result) {
3665 sprintf(dbf_text,"regthn%x",(register_thinint_result&0xff));
3666 QDIO_DBF_TEXT0(0,setup,dbf_text);
3667 QDIO_PRINT_ERR("failed to register adapter handler " \
3668 "(rc=%i).\nAdapter interrupts might " \
3669 "not work. Continuing.\n",
3670 register_thinint_result);
3671 }
3672 }
3673
3674 static void
3675 tiqdio_unregister_thinints(void)
3676 {
3677 if (!register_thinint_result)
3678 s390_unregister_adapter_interrupt(&tiqdio_thinint_handler);
3679 }
3680
3681 static int
3682 qdio_get_qdio_memory(void)
3683 {
3684 int i;
3685 indicator_used[0]=1;
3686
3687 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3688 indicator_used[i]=0;
3689 indicators=(__u32*)kmalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3690 GFP_KERNEL);
3691 if (!indicators) return -ENOMEM;
3692 memset(indicators,0,sizeof(__u32)*(INDICATORS_PER_CACHELINE));
3693 return 0;
3694 }
3695
3696 static void
3697 qdio_release_qdio_memory(void)
3698 {
3699 kfree(indicators);
3700 }
3701
3702 static void
3703 qdio_unregister_dbf_views(void)
3704 {
3705 if (qdio_dbf_setup)
3706 debug_unregister(qdio_dbf_setup);
3707 if (qdio_dbf_sbal)
3708 debug_unregister(qdio_dbf_sbal);
3709 if (qdio_dbf_sense)
3710 debug_unregister(qdio_dbf_sense);
3711 if (qdio_dbf_trace)
3712 debug_unregister(qdio_dbf_trace);
3713 #ifdef CONFIG_QDIO_DEBUG
3714 if (qdio_dbf_slsb_out)
3715 debug_unregister(qdio_dbf_slsb_out);
3716 if (qdio_dbf_slsb_in)
3717 debug_unregister(qdio_dbf_slsb_in);
3718 #endif /* CONFIG_QDIO_DEBUG */
3719 }
3720
3721 static int
3722 qdio_register_dbf_views(void)
3723 {
3724 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3725 QDIO_DBF_SETUP_PAGES,
3726 QDIO_DBF_SETUP_NR_AREAS,
3727 QDIO_DBF_SETUP_LEN);
3728 if (!qdio_dbf_setup)
3729 goto oom;
3730 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3731 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3732
3733 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3734 QDIO_DBF_SBAL_PAGES,
3735 QDIO_DBF_SBAL_NR_AREAS,
3736 QDIO_DBF_SBAL_LEN);
3737 if (!qdio_dbf_sbal)
3738 goto oom;
3739
3740 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3741 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3742
3743 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3744 QDIO_DBF_SENSE_PAGES,
3745 QDIO_DBF_SENSE_NR_AREAS,
3746 QDIO_DBF_SENSE_LEN);
3747 if (!qdio_dbf_sense)
3748 goto oom;
3749
3750 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3751 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3752
3753 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3754 QDIO_DBF_TRACE_PAGES,
3755 QDIO_DBF_TRACE_NR_AREAS,
3756 QDIO_DBF_TRACE_LEN);
3757 if (!qdio_dbf_trace)
3758 goto oom;
3759
3760 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3761 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3762
3763 #ifdef CONFIG_QDIO_DEBUG
3764 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3765 QDIO_DBF_SLSB_OUT_PAGES,
3766 QDIO_DBF_SLSB_OUT_NR_AREAS,
3767 QDIO_DBF_SLSB_OUT_LEN);
3768 if (!qdio_dbf_slsb_out)
3769 goto oom;
3770 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3771 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3772
3773 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3774 QDIO_DBF_SLSB_IN_PAGES,
3775 QDIO_DBF_SLSB_IN_NR_AREAS,
3776 QDIO_DBF_SLSB_IN_LEN);
3777 if (!qdio_dbf_slsb_in)
3778 goto oom;
3779 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3780 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3781 #endif /* CONFIG_QDIO_DEBUG */
3782 return 0;
3783 oom:
3784 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3785 qdio_unregister_dbf_views();
3786 return -ENOMEM;
3787 }
3788
3789 static int __init
3790 init_QDIO(void)
3791 {
3792 int res;
3793 #ifdef QDIO_PERFORMANCE_STATS
3794 void *ptr;
3795 #endif /* QDIO_PERFORMANCE_STATS */
3796
3797 printk("qdio: loading %s\n",version);
3798
3799 res=qdio_get_qdio_memory();
3800 if (res)
3801 return res;
3802
3803 res = qdio_register_dbf_views();
3804 if (res)
3805 return res;
3806
3807 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3808
3809 #ifdef QDIO_PERFORMANCE_STATS
3810 memset((void*)&perf_stats,0,sizeof(perf_stats));
3811 QDIO_DBF_TEXT0(0,setup,"perfstat");
3812 ptr=&perf_stats;
3813 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3814 #endif /* QDIO_PERFORMANCE_STATS */
3815
3816 qdio_add_procfs_entry();
3817
3818 if (tiqdio_check_chsc_availability())
3819 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3820
3821 tiqdio_register_thinints();
3822
3823 return 0;
3824 }
3825
3826 static void __exit
3827 cleanup_QDIO(void)
3828 {
3829 tiqdio_unregister_thinints();
3830 qdio_remove_procfs_entry();
3831 qdio_release_qdio_memory();
3832 qdio_unregister_dbf_views();
3833
3834 printk("qdio: %s: module removed\n",version);
3835 }
3836
3837 module_init(init_QDIO);
3838 module_exit(cleanup_QDIO);
3839
3840 EXPORT_SYMBOL(qdio_allocate);
3841 EXPORT_SYMBOL(qdio_establish);
3842 EXPORT_SYMBOL(qdio_initialize);
3843 EXPORT_SYMBOL(qdio_activate);
3844 EXPORT_SYMBOL(do_QDIO);
3845 EXPORT_SYMBOL(qdio_shutdown);
3846 EXPORT_SYMBOL(qdio_free);
3847 EXPORT_SYMBOL(qdio_cleanup);
3848 EXPORT_SYMBOL(qdio_synchronize);
kernel source for telekom puls (alcatel/mediatek)