IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pcmcia / hd64465_ss.c
1 /*
2 * $Id: hd64465_ss.c,v 1.7 2003/07/06 14:42:50 lethal Exp $
3 *
4 * Device driver for the PCMCIA controller module of the
5 * Hitachi HD64465 handheld companion chip.
6 *
7 * Note that the HD64465 provides a very thin PCMCIA host bridge
8 * layer, requiring a lot of the work of supporting cards to be
9 * performed by the processor. For example: mapping of card
10 * interrupts to processor IRQs is done by IRQ demuxing software;
11 * IO and memory mappings are fixed; setting voltages according
12 * to card Voltage Select pins etc is done in software.
13 *
14 * Note also that this driver uses only the simple, fixed,
15 * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
16 * HD64465. Larger mappings, smaller mappings, or mappings of
17 * different width to the same socket, are all possible only by
18 * involving the SH7750's MMU, which is considered unnecessary here.
19 * The downside is that it may be possible for some drivers to
20 * break because they need or expect 8-bit mappings.
21 *
22 * This driver currently supports only the following configuration:
23 * SH7750 CPU, HD64465, TPS2206 voltage control chip.
24 *
25 * by Greg Banks <gbanks@pocketpenguins.com>
26 * (c) 2000 PocketPenguins Inc
27 */
28
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/init.h>
32 #include <linux/string.h>
33 #include <linux/kernel.h>
34 #include <linux/ioport.h>
35 #include <linux/mm.h>
36 #include <linux/vmalloc.h>
37 #include <asm/errno.h>
38 #include <linux/irq.h>
39 #include <linux/interrupt.h>
40 #include <linux/platform_device.h>
41
42 #include <asm/io.h>
43 #include <asm/hd64465/hd64465.h>
44 #include <asm/hd64465/io.h>
45
46 #include <pcmcia/cs_types.h>
47 #include <pcmcia/cs.h>
48 #include <pcmcia/cistpl.h>
49 #include <pcmcia/ds.h>
50 #include <pcmcia/ss.h>
51 #include <pcmcia/bulkmem.h>
52 #include "cs_internal.h"
53
54 #define MODNAME "hd64465_ss"
55
56 /* #define HD64465_DEBUG 1 */
57
58 #if HD64465_DEBUG
59 #define DPRINTK(args...) printk(MODNAME ": " args)
60 #else
61 #define DPRINTK(args...)
62 #endif
63
64 extern int hd64465_io_debug;
65 extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
66 extern void p3_iounmap(void *addr);
67
68 /*============================================================*/
69
70 #define HS_IO_MAP_SIZE (64*1024)
71
72 typedef struct hs_socket_t
73 {
74 unsigned int number;
75 u_int irq;
76 u_long mem_base;
77 void *io_base;
78 u_long mem_length;
79 u_int ctrl_base;
80 socket_state_t state;
81 pccard_io_map io_maps[MAX_IO_WIN];
82 pccard_mem_map mem_maps[MAX_WIN];
83 struct pcmcia_socket socket;
84 } hs_socket_t;
85
86
87
88 #define HS_MAX_SOCKETS 2
89 static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
90
91 #define hs_in(sp, r) inb((sp)->ctrl_base + (r))
92 #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
93
94
95 /* translate a boolean value to a bit in a register */
96 #define bool_to_regbit(sp, r, bi, bo) \
97 do { \
98 unsigned short v = hs_in(sp, r); \
99 if (bo) \
100 v |= (bi); \
101 else \
102 v &= ~(bi); \
103 hs_out(sp, v, r); \
104 } while(0)
105
106 /* register offsets from HD64465_REG_PCC[01]ISR */
107 #define ISR 0x0
108 #define GCR 0x2
109 #define CSCR 0x4
110 #define CSCIER 0x6
111 #define SCR 0x8
112
113
114 /* Mask and values for CSCIER register */
115 #define IER_MASK 0x80
116 #define IER_ON 0x3f /* interrupts on */
117 #define IER_OFF 0x00 /* interrupts off */
118
119 /*============================================================*/
120
121 #if HD64465_DEBUG > 10
122
123 static void cis_hex_dump(const unsigned char *x, int len)
124 {
125 int i;
126
127 for (i=0 ; i<len ; i++)
128 {
129 if (!(i & 0xf))
130 printk("\n%08x", (unsigned)(x + i));
131 printk(" %02x", *(volatile unsigned short*)x);
132 x += 2;
133 }
134 printk("\n");
135 }
136
137 #endif
138 /*============================================================*/
139
140 /*
141 * This code helps create the illusion that the IREQ line from
142 * the PC card is mapped to one of the CPU's IRQ lines by the
143 * host bridge hardware (which is how every host bridge *except*
144 * the HD64465 works). In particular, it supports enabling
145 * and disabling the IREQ line by code which knows nothing
146 * about the host bridge (e.g. device drivers, IDE code) using
147 * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
148 * functions. Also, it supports sharing the mapped IRQ with
149 * real hardware IRQs from the -IRL0-3 lines.
150 */
151
152 #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
153 static struct
154 {
155 /* index is mapped irq number */
156 hs_socket_t *sock;
157 hw_irq_controller *old_handler;
158 } hs_mapped_irq[HS_NUM_MAPPED_IRQS];
159
160 static void hs_socket_enable_ireq(hs_socket_t *sp)
161 {
162 unsigned short cscier;
163
164 DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
165
166 cscier = hs_in(sp, CSCIER);
167 cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
168 cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
169 hs_out(sp, cscier, CSCIER);
170 }
171
172 static void hs_socket_disable_ireq(hs_socket_t *sp)
173 {
174 unsigned short cscier;
175
176 DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
177
178 cscier = hs_in(sp, CSCIER);
179 cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
180 hs_out(sp, cscier, CSCIER);
181 }
182
183 static unsigned int hs_startup_irq(unsigned int irq)
184 {
185 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
186 hs_mapped_irq[irq].old_handler->startup(irq);
187 return 0;
188 }
189
190 static void hs_shutdown_irq(unsigned int irq)
191 {
192 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
193 hs_mapped_irq[irq].old_handler->shutdown(irq);
194 }
195
196 static void hs_enable_irq(unsigned int irq)
197 {
198 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
199 hs_mapped_irq[irq].old_handler->enable(irq);
200 }
201
202 static void hs_disable_irq(unsigned int irq)
203 {
204 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
205 hs_mapped_irq[irq].old_handler->disable(irq);
206 }
207
208 extern struct hw_interrupt_type no_irq_type;
209
210 static void hs_mask_and_ack_irq(unsigned int irq)
211 {
212 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
213 /* ack_none() spuriously complains about an unexpected IRQ */
214 if (hs_mapped_irq[irq].old_handler != &no_irq_type)
215 hs_mapped_irq[irq].old_handler->ack(irq);
216 }
217
218 static void hs_end_irq(unsigned int irq)
219 {
220 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
221 hs_mapped_irq[irq].old_handler->end(irq);
222 }
223
224
225 static struct hw_interrupt_type hd64465_ss_irq_type = {
226 .typename = "PCMCIA-IRQ",
227 .startup = hs_startup_irq,
228 .shutdown = hs_shutdown_irq,
229 .enable = hs_enable_irq,
230 .disable = hs_disable_irq,
231 .ack = hs_mask_and_ack_irq,
232 .end = hs_end_irq
233 };
234
235 /*
236 * This function should only ever be called with interrupts disabled.
237 */
238 static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
239 {
240 DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
241
242 if (irq >= HS_NUM_MAPPED_IRQS)
243 return;
244
245 hs_mapped_irq[irq].sock = sp;
246 /* insert ourselves as the irq controller */
247 hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
248 irq_desc[irq].chip = &hd64465_ss_irq_type;
249 }
250
251
252 /*
253 * This function should only ever be called with interrupts disabled.
254 */
255 static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
256 {
257 DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
258
259 if (irq >= HS_NUM_MAPPED_IRQS)
260 return;
261
262 /* restore the original irq controller */
263 irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
264 }
265
266 /*============================================================*/
267
268
269 /*
270 * Set Vpp and Vcc (in tenths of a Volt). Does not
271 * support the hi-Z state.
272 *
273 * Note, this assumes the board uses a TPS2206 chip to control
274 * the Vcc and Vpp voltages to the hs_sockets. If your board
275 * uses the MIC2563 (also supported by the HD64465) then you
276 * will have to modify this function.
277 */
278 /* 0V 3.3V 5.5V */
279 static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
280 static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
281
282 static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
283 {
284 u_int psr;
285 u_int vcci = 0;
286 u_int sock = sp->number;
287
288 DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
289
290 switch (Vcc)
291 {
292 case 0: vcci = 0; break;
293 case 33: vcci = 1; break;
294 case 50: vcci = 2; break;
295 default: return 0;
296 }
297
298 /* Note: Vpp = 120 not supported -- Greg Banks */
299 if (Vpp != 0 && Vpp != Vcc)
300 return 0;
301
302 /* The PSR register holds 8 of the 9 bits which control
303 * the TPS2206 via its serial interface.
304 */
305 psr = inw(HD64465_REG_PCCPSR);
306 switch (sock)
307 {
308 case 0:
309 psr &= 0x0f;
310 psr |= hs_tps2206_avcc[vcci];
311 psr |= (Vpp == 0 ? 0x00 : 0x02);
312 break;
313 case 1:
314 psr &= 0xf0;
315 psr |= hs_tps2206_bvcc[vcci];
316 psr |= (Vpp == 0 ? 0x00 : 0x20);
317 break;
318 };
319 outw(psr, HD64465_REG_PCCPSR);
320
321 return 1;
322 }
323
324
325 /*============================================================*/
326
327 /*
328 * Drive the RESET line to the card.
329 */
330 static void hs_reset_socket(hs_socket_t *sp, int on)
331 {
332 unsigned short v;
333
334 v = hs_in(sp, GCR);
335 if (on)
336 v |= HD64465_PCCGCR_PCCR;
337 else
338 v &= ~HD64465_PCCGCR_PCCR;
339 hs_out(sp, v, GCR);
340 }
341
342 /*============================================================*/
343
344 static int hs_init(struct pcmcia_socket *s)
345 {
346 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
347
348 DPRINTK("hs_init(%d)\n", sp->number);
349
350 return 0;
351 }
352
353 /*============================================================*/
354
355
356 static int hs_get_status(struct pcmcia_socket *s, u_int *value)
357 {
358 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
359 unsigned int isr;
360 u_int status = 0;
361
362
363 isr = hs_in(sp, ISR);
364
365 /* Card is seated and powered when *both* CD pins are low */
366 if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
367 {
368 status |= SS_DETECT; /* card present */
369
370 switch (isr & HD64465_PCCISR_PBVD_MASK)
371 {
372 case HD64465_PCCISR_PBVD_BATGOOD:
373 break;
374 case HD64465_PCCISR_PBVD_BATWARN:
375 status |= SS_BATWARN;
376 break;
377 default:
378 status |= SS_BATDEAD;
379 break;
380 }
381
382 if (isr & HD64465_PCCISR_PREADY)
383 status |= SS_READY;
384
385 if (isr & HD64465_PCCISR_PMWP)
386 status |= SS_WRPROT;
387
388 /* Voltage Select pins interpreted as per Table 4-5 of the std.
389 * Assuming we have the TPS2206, the socket is a "Low Voltage
390 * key, 3.3V and 5V available, no X.XV available".
391 */
392 switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
393 {
394 case HD64465_PCCISR_PVS1:
395 printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
396 status = 0;
397 break;
398 case 0:
399 case HD64465_PCCISR_PVS2:
400 /* 3.3V */
401 status |= SS_3VCARD;
402 break;
403 case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
404 /* 5V */
405 break;
406 }
407
408 /* TODO: SS_POWERON */
409 /* TODO: SS_STSCHG */
410 }
411
412 DPRINTK("hs_get_status(%d) = %x\n", sock, status);
413
414 *value = status;
415 return 0;
416 }
417
418 /*============================================================*/
419
420 static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
421 {
422 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
423 u_long flags;
424 u_int changed;
425 unsigned short cscier;
426
427 DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
428 sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
429
430 local_irq_save(flags); /* Don't want interrupts happening here */
431
432 if (state->Vpp != sp->state.Vpp ||
433 state->Vcc != sp->state.Vcc) {
434 if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
435 local_irq_restore(flags);
436 return -EINVAL;
437 }
438 }
439
440 /* hd64465_io_debug = 1; */
441 /*
442 * Handle changes in the Card Status Change mask,
443 * by propagating to the CSCR register
444 */
445 changed = sp->state.csc_mask ^ state->csc_mask;
446 cscier = hs_in(sp, CSCIER);
447
448 if (changed & SS_DETECT) {
449 if (state->csc_mask & SS_DETECT)
450 cscier |= HD64465_PCCCSCIER_PCDE;
451 else
452 cscier &= ~HD64465_PCCCSCIER_PCDE;
453 }
454
455 if (changed & SS_READY) {
456 if (state->csc_mask & SS_READY)
457 cscier |= HD64465_PCCCSCIER_PRE;
458 else
459 cscier &= ~HD64465_PCCCSCIER_PRE;
460 }
461
462 if (changed & SS_BATDEAD) {
463 if (state->csc_mask & SS_BATDEAD)
464 cscier |= HD64465_PCCCSCIER_PBDE;
465 else
466 cscier &= ~HD64465_PCCCSCIER_PBDE;
467 }
468
469 if (changed & SS_BATWARN) {
470 if (state->csc_mask & SS_BATWARN)
471 cscier |= HD64465_PCCCSCIER_PBWE;
472 else
473 cscier &= ~HD64465_PCCCSCIER_PBWE;
474 }
475
476 if (changed & SS_STSCHG) {
477 if (state->csc_mask & SS_STSCHG)
478 cscier |= HD64465_PCCCSCIER_PSCE;
479 else
480 cscier &= ~HD64465_PCCCSCIER_PSCE;
481 }
482
483 hs_out(sp, cscier, CSCIER);
484
485 if (sp->state.io_irq && !state->io_irq)
486 hs_unmap_irq(sp, sp->state.io_irq);
487 else if (!sp->state.io_irq && state->io_irq)
488 hs_map_irq(sp, state->io_irq);
489
490
491 /*
492 * Handle changes in the flags field,
493 * by propagating to config registers.
494 */
495 changed = sp->state.flags ^ state->flags;
496
497 if (changed & SS_IOCARD) {
498 DPRINTK("card type: %s\n",
499 (state->flags & SS_IOCARD ? "i/o" : "memory" ));
500 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
501 state->flags & SS_IOCARD);
502 }
503
504 if (changed & SS_RESET) {
505 DPRINTK("%s reset card\n",
506 (state->flags & SS_RESET ? "start" : "stop"));
507 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
508 state->flags & SS_RESET);
509 }
510
511 if (changed & SS_OUTPUT_ENA) {
512 DPRINTK("%sabling card output\n",
513 (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
514 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
515 state->flags & SS_OUTPUT_ENA);
516 }
517
518 /* TODO: SS_SPKR_ENA */
519
520 /* hd64465_io_debug = 0; */
521 sp->state = *state;
522
523 local_irq_restore(flags);
524
525 #if HD64465_DEBUG > 10
526 if (state->flags & SS_OUTPUT_ENA)
527 cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
528 #endif
529 return 0;
530 }
531
532 /*============================================================*/
533
534 static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
535 {
536 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
537 int map = io->map;
538 int sock = sp->number;
539 struct pccard_io_map *sio;
540 pgprot_t prot;
541
542 DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
543 sock, map, io->flags, io->speed, io->start, io->stop);
544 if (map >= MAX_IO_WIN)
545 return -EINVAL;
546 sio = &sp->io_maps[map];
547
548 /* check for null changes */
549 if (io->flags == sio->flags &&
550 io->start == sio->start &&
551 io->stop == sio->stop)
552 return 0;
553
554 if (io->flags & MAP_AUTOSZ)
555 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
556 else if (io->flags & MAP_16BIT)
557 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
558 else
559 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
560
561 /* TODO: handle MAP_USE_WAIT */
562 if (io->flags & MAP_USE_WAIT)
563 printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
564 /* TODO: handle MAP_PREFETCH */
565 if (io->flags & MAP_PREFETCH)
566 printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
567 /* TODO: handle MAP_WRPROT */
568 if (io->flags & MAP_WRPROT)
569 printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
570 /* TODO: handle MAP_0WS */
571 if (io->flags & MAP_0WS)
572 printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
573
574 if (io->flags & MAP_ACTIVE) {
575 unsigned long pstart, psize, paddrbase;
576
577 paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
578 pstart = io->start & PAGE_MASK;
579 psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
580
581 /*
582 * Change PTEs in only that portion of the mapping requested
583 * by the caller. This means that most of the time, most of
584 * the PTEs in the io_vma will be unmapped and only the bottom
585 * page will be mapped. But the code allows for weird cards
586 * that might want IO ports > 4K.
587 */
588 sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
589
590 /*
591 * Change the mapping used by inb() outb() etc
592 */
593 hd64465_port_map(io->start,
594 io->stop - io->start + 1,
595 (unsigned long)sp->io_base + io->start, 0);
596 } else {
597 hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
598 p3_iounmap(sp->io_base);
599 }
600
601 *sio = *io;
602 return 0;
603 }
604
605 /*============================================================*/
606
607 static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
608 {
609 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
610 struct pccard_mem_map *smem;
611 int map = mem->map;
612 unsigned long paddr;
613
614 #if 0
615 DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
616 sock, map, mem->flags, mem->card_start);
617 #endif
618
619 if (map >= MAX_WIN)
620 return -EINVAL;
621 smem = &sp->mem_maps[map];
622
623 paddr = sp->mem_base; /* base of Attribute mapping */
624 if (!(mem->flags & MAP_ATTRIB))
625 paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
626 paddr += mem->card_start;
627
628 /* Because we specified SS_CAP_STATIC_MAP, we are obliged
629 * at this time to report the system address corresponding
630 * to the card address requested. This is how Socket Services
631 * queries our fixed mapping. I wish this fact had been
632 * documented - Greg Banks.
633 */
634 mem->static_start = paddr;
635
636 *smem = *mem;
637
638 return 0;
639 }
640
641 /* TODO: do we need to use the MMU to access Common memory ??? */
642
643 /*============================================================*/
644
645 /*
646 * This function is registered with the HD64465 glue code to do a
647 * secondary demux step on the PCMCIA interrupts. It handles
648 * mapping the IREQ request from the card to a standard Linux
649 * IRQ, as requested by SocketServices.
650 */
651 static int hs_irq_demux(int irq, void *dev)
652 {
653 hs_socket_t *sp = (hs_socket_t *)dev;
654 u_int cscr;
655
656 DPRINTK("hs_irq_demux(irq=%d)\n", irq);
657
658 if (sp->state.io_irq &&
659 (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
660 cscr &= ~HD64465_PCCCSCR_PIREQ;
661 hs_out(sp, cscr, CSCR);
662 return sp->state.io_irq;
663 }
664
665 return irq;
666 }
667
668 /*============================================================*/
669
670 /*
671 * Interrupt handling routine.
672 */
673
674 static irqreturn_t hs_interrupt(int irq, void *dev)
675 {
676 hs_socket_t *sp = (hs_socket_t *)dev;
677 u_int events = 0;
678 u_int cscr;
679
680
681 cscr = hs_in(sp, CSCR);
682
683 DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
684
685 /* check for bus-related changes to be reported to Socket Services */
686 if (cscr & HD64465_PCCCSCR_PCDC) {
687 /* double-check for a 16-bit card, as we don't support CardBus */
688 if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
689 printk(KERN_NOTICE MODNAME
690 ": socket %d, card not a supported card type or not inserted correctly\n",
691 sp->number);
692 /* Don't do the rest unless a card is present */
693 cscr &= ~(HD64465_PCCCSCR_PCDC|
694 HD64465_PCCCSCR_PRC|
695 HD64465_PCCCSCR_PBW|
696 HD64465_PCCCSCR_PBD|
697 HD64465_PCCCSCR_PSC);
698 } else {
699 cscr &= ~HD64465_PCCCSCR_PCDC;
700 events |= SS_DETECT; /* card insertion or removal */
701 }
702 }
703 if (cscr & HD64465_PCCCSCR_PRC) {
704 cscr &= ~HD64465_PCCCSCR_PRC;
705 events |= SS_READY; /* ready signal changed */
706 }
707 if (cscr & HD64465_PCCCSCR_PBW) {
708 cscr &= ~HD64465_PCCCSCR_PSC;
709 events |= SS_BATWARN; /* battery warning */
710 }
711 if (cscr & HD64465_PCCCSCR_PBD) {
712 cscr &= ~HD64465_PCCCSCR_PSC;
713 events |= SS_BATDEAD; /* battery dead */
714 }
715 if (cscr & HD64465_PCCCSCR_PSC) {
716 cscr &= ~HD64465_PCCCSCR_PSC;
717 events |= SS_STSCHG; /* STSCHG (status changed) signal */
718 }
719
720 if (cscr & HD64465_PCCCSCR_PIREQ) {
721 cscr &= ~HD64465_PCCCSCR_PIREQ;
722
723 /* This should have been dealt with during irq demux */
724 printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
725 }
726
727 hs_out(sp, cscr, CSCR);
728
729 if (events)
730 pcmcia_parse_events(&sp->socket, events);
731
732 return IRQ_HANDLED;
733 }
734
735 /*============================================================*/
736
737 static struct pccard_operations hs_operations = {
738 .init = hs_init,
739 .get_status = hs_get_status,
740 .set_socket = hs_set_socket,
741 .set_io_map = hs_set_io_map,
742 .set_mem_map = hs_set_mem_map,
743 };
744
745 static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
746 unsigned int ctrl_base)
747 {
748 unsigned short v;
749 int i, err;
750
751 memset(sp, 0, sizeof(*sp));
752 sp->irq = irq;
753 sp->mem_base = mem_base;
754 sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
755 sp->ctrl_base = ctrl_base;
756
757 for (i=0 ; i<MAX_IO_WIN ; i++)
758 sp->io_maps[i].map = i;
759 for (i=0 ; i<MAX_WIN ; i++)
760 sp->mem_maps[i].map = i;
761
762 hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
763
764 if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0)
765 return err;
766 if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
767 sp->mem_base = 0;
768 return -ENOMEM;
769 }
770
771
772 /* According to section 3.2 of the PCMCIA standard, low-voltage
773 * capable cards must implement cold insertion, i.e. Vpp and
774 * Vcc set to 0 before card is inserted.
775 */
776 /*hs_set_voltages(sp, 0, 0);*/
777
778 /* hi-Z the outputs to the card and set 16MB map mode */
779 v = hs_in(sp, GCR);
780 v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
781 hs_out(sp, v, GCR);
782
783 v = hs_in(sp, GCR);
784 v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
785 hs_out(sp, v, GCR);
786
787 v = hs_in(sp, GCR);
788 v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
789 hs_out(sp, v, GCR);
790
791 v = hs_in(sp, GCR);
792 /* lowest 16MB of Common */
793 v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
794 hs_out(sp, v, GCR);
795
796 hs_reset_socket(sp, 1);
797
798 printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
799 i, sp->mem_base, sp->irq);
800
801 return 0;
802 }
803
804 static void hs_exit_socket(hs_socket_t *sp)
805 {
806 unsigned short cscier, gcr;
807 unsigned long flags;
808
809 local_irq_save(flags);
810
811 /* turn off interrupts in hardware */
812 cscier = hs_in(sp, CSCIER);
813 cscier = (cscier & IER_MASK) | IER_OFF;
814 hs_out(sp, cscier, CSCIER);
815
816 /* hi-Z the outputs to the card */
817 gcr = hs_in(sp, GCR);
818 gcr &= HD64465_PCCGCR_PDRV;
819 hs_out(sp, gcr, GCR);
820
821 /* power the card down */
822 hs_set_voltages(sp, 0, 0);
823
824 if (sp->mem_base != 0)
825 release_mem_region(sp->mem_base, sp->mem_length);
826 if (sp->irq != 0) {
827 free_irq(sp->irq, hs_interrupt);
828 hd64465_unregister_irq_demux(sp->irq);
829 }
830
831 local_irq_restore(flags);
832 }
833
834 static struct device_driver hd64465_driver = {
835 .name = "hd64465-pcmcia",
836 .bus = &platform_bus_type,
837 .suspend = pcmcia_socket_dev_suspend,
838 .resume = pcmcia_socket_dev_resume,
839 };
840
841 static struct platform_device hd64465_device = {
842 .name = "hd64465-pcmcia",
843 .id = 0,
844 };
845
846 static int __init init_hs(void)
847 {
848 int i;
849 unsigned short v;
850
851 /* hd64465_io_debug = 1; */
852 if (driver_register(&hd64465_driver))
853 return -EINVAL;
854
855 /* Wake both sockets out of STANDBY mode */
856 /* TODO: wait 15ms */
857 v = inw(HD64465_REG_SMSCR);
858 v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
859 outw(v, HD64465_REG_SMSCR);
860
861 /* keep power controller out of shutdown mode */
862 v = inb(HD64465_REG_PCC0SCR);
863 v |= HD64465_PCCSCR_SHDN;
864 outb(v, HD64465_REG_PCC0SCR);
865
866 /* use serial (TPS2206) power controller */
867 v = inb(HD64465_REG_PCC0CSCR);
868 v |= HD64465_PCCCSCR_PSWSEL;
869 outb(v, HD64465_REG_PCC0CSCR);
870
871 /*
872 * Setup hs_sockets[] structures and request system resources.
873 * TODO: on memory allocation failure, power down the socket
874 * before quitting.
875 */
876 for (i=0; i<HS_MAX_SOCKETS; i++) {
877 hs_set_voltages(&hs_sockets[i], 0, 0);
878
879 hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
880 hs_sockets[i].socket.resource_ops = &pccard_static_ops;
881 hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
882 hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
883
884 hs_sockets[i].socket.owner = THIS_MODULE;
885 hs_sockets[i].socket.ss_entry = &hs_operations;
886 }
887
888 i = hs_init_socket(&hs_sockets[0],
889 HD64465_IRQ_PCMCIA0,
890 HD64465_PCC0_BASE,
891 HD64465_REG_PCC0ISR);
892 if (i < 0) {
893 unregister_driver(&hd64465_driver);
894 return i;
895 }
896 i = hs_init_socket(&hs_sockets[1],
897 HD64465_IRQ_PCMCIA1,
898 HD64465_PCC1_BASE,
899 HD64465_REG_PCC1ISR);
900 if (i < 0) {
901 unregister_driver(&hd64465_driver);
902 return i;
903 }
904
905 /* hd64465_io_debug = 0; */
906
907 platform_device_register(&hd64465_device);
908
909 for (i=0; i<HS_MAX_SOCKETS; i++) {
910 unsigned int ret;
911 hs_sockets[i].socket.dev.dev = &hd64465_device.dev;
912 hs_sockets[i].number = i;
913 ret = pcmcia_register_socket(&hs_sockets[i].socket);
914 if (ret && i)
915 pcmcia_unregister_socket(&hs_sockets[0].socket);
916 }
917
918 return 0;
919 }
920
921 static void __exit exit_hs(void)
922 {
923 int i;
924
925 for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
926 pcmcia_unregister_socket(&hs_sockets[i].socket);
927 hs_exit_socket(&hs_sockets[i]);
928 }
929
930 platform_device_unregister(&hd64465_device);
931 unregister_driver(&hd64465_driver);
932 }
933
934 module_init(init_hs);
935 module_exit(exit_hs);
936
937 /*============================================================*/
938 /*END*/