ce8acc71f1a81ddbffaf4d202a421fa0293239c6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pci / pcie / portdrv_pci.c
1 /*
2 * File: portdrv_pci.c
3 * Purpose: PCI Express Port Bus Driver
4 *
5 * Copyright (C) 2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/pm.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/init.h>
16 #include <linux/pcieport_if.h>
17 #include <linux/aer.h>
18 #include <linux/dmi.h>
19 #include <linux/pci-aspm.h>
20
21 #include "portdrv.h"
22 #include "aer/aerdrv.h"
23
24 /*
25 * Version Information
26 */
27 #define DRIVER_VERSION "v1.0"
28 #define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
29 #define DRIVER_DESC "PCIe Port Bus Driver"
30 MODULE_AUTHOR(DRIVER_AUTHOR);
31 MODULE_DESCRIPTION(DRIVER_DESC);
32 MODULE_LICENSE("GPL");
33
34 /* If this switch is set, PCIe port native services should not be enabled. */
35 bool pcie_ports_disabled;
36
37 /*
38 * If this switch is set, ACPI _OSC will be used to determine whether or not to
39 * enable PCIe port native services.
40 */
41 bool pcie_ports_auto = true;
42
43 static int __init pcie_port_setup(char *str)
44 {
45 if (!strncmp(str, "compat", 6)) {
46 pcie_ports_disabled = true;
47 } else if (!strncmp(str, "native", 6)) {
48 pcie_ports_disabled = false;
49 pcie_ports_auto = false;
50 } else if (!strncmp(str, "auto", 4)) {
51 pcie_ports_disabled = false;
52 pcie_ports_auto = true;
53 }
54
55 return 1;
56 }
57 __setup("pcie_ports=", pcie_port_setup);
58
59 /* global data */
60
61 /**
62 * pcie_clear_root_pme_status - Clear root port PME interrupt status.
63 * @dev: PCIe root port or event collector.
64 */
65 void pcie_clear_root_pme_status(struct pci_dev *dev)
66 {
67 pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
68 }
69
70 static int pcie_portdrv_restore_config(struct pci_dev *dev)
71 {
72 int retval;
73
74 retval = pci_enable_device(dev);
75 if (retval)
76 return retval;
77 pci_set_master(dev);
78 return 0;
79 }
80
81 #ifdef CONFIG_PM
82 static int pcie_port_resume_noirq(struct device *dev)
83 {
84 struct pci_dev *pdev = to_pci_dev(dev);
85
86 /*
87 * Some BIOSes forget to clear Root PME Status bits after system wakeup
88 * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
89 * bits now just in case (shouldn't hurt).
90 */
91 if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
92 pcie_clear_root_pme_status(pdev);
93 return 0;
94 }
95
96 #ifdef CONFIG_PM_RUNTIME
97 struct d3cold_info {
98 bool no_d3cold;
99 unsigned int d3cold_delay;
100 };
101
102 static int pci_dev_d3cold_info(struct pci_dev *pdev, void *data)
103 {
104 struct d3cold_info *info = data;
105
106 info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
107 info->d3cold_delay);
108 if (pdev->no_d3cold)
109 info->no_d3cold = true;
110 return 0;
111 }
112
113 static int pcie_port_runtime_suspend(struct device *dev)
114 {
115 struct pci_dev *pdev = to_pci_dev(dev);
116 struct d3cold_info d3cold_info = {
117 .no_d3cold = false,
118 .d3cold_delay = PCI_PM_D3_WAIT,
119 };
120
121 /*
122 * If any subordinate device disable D3cold, we should not put
123 * the port into D3cold. The D3cold delay of port should be
124 * the max of that of all subordinate devices.
125 */
126 pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
127 pdev->no_d3cold = d3cold_info.no_d3cold;
128 pdev->d3cold_delay = d3cold_info.d3cold_delay;
129 return 0;
130 }
131
132 static int pcie_port_runtime_resume(struct device *dev)
133 {
134 return 0;
135 }
136
137 static int pci_dev_pme_poll(struct pci_dev *pdev, void *data)
138 {
139 bool *pme_poll = data;
140
141 if (pdev->pme_poll)
142 *pme_poll = true;
143 return 0;
144 }
145
146 static int pcie_port_runtime_idle(struct device *dev)
147 {
148 struct pci_dev *pdev = to_pci_dev(dev);
149 bool pme_poll = false;
150
151 /*
152 * If any subordinate device needs pme poll, we should keep
153 * the port in D0, because we need port in D0 to poll it.
154 */
155 pci_walk_bus(pdev->subordinate, pci_dev_pme_poll, &pme_poll);
156 /* Delay for a short while to prevent too frequent suspend/resume */
157 if (!pme_poll)
158 pm_schedule_suspend(dev, 10);
159 return -EBUSY;
160 }
161 #else
162 #define pcie_port_runtime_suspend NULL
163 #define pcie_port_runtime_resume NULL
164 #define pcie_port_runtime_idle NULL
165 #endif
166
167 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
168 .suspend = pcie_port_device_suspend,
169 .resume = pcie_port_device_resume,
170 .freeze = pcie_port_device_suspend,
171 .thaw = pcie_port_device_resume,
172 .poweroff = pcie_port_device_suspend,
173 .restore = pcie_port_device_resume,
174 .resume_noirq = pcie_port_resume_noirq,
175 .runtime_suspend = pcie_port_runtime_suspend,
176 .runtime_resume = pcie_port_runtime_resume,
177 .runtime_idle = pcie_port_runtime_idle,
178 };
179
180 #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
181
182 #else /* !PM */
183
184 #define PCIE_PORTDRV_PM_OPS NULL
185 #endif /* !PM */
186
187 /*
188 * pcie_portdrv_probe - Probe PCI-Express port devices
189 * @dev: PCI-Express port device being probed
190 *
191 * If detected invokes the pcie_port_device_register() method for
192 * this port device.
193 *
194 */
195 static int pcie_portdrv_probe(struct pci_dev *dev,
196 const struct pci_device_id *id)
197 {
198 int status;
199
200 if (!pci_is_pcie(dev) ||
201 ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
202 (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
203 (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
204 return -ENODEV;
205
206 if (!dev->irq && dev->pin) {
207 dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
208 "check vendor BIOS\n", dev->vendor, dev->device);
209 }
210 status = pcie_port_device_register(dev);
211 if (status)
212 return status;
213
214 pci_save_state(dev);
215 /*
216 * D3cold may not work properly on some PCIe port, so disable
217 * it by default.
218 */
219 dev->d3cold_allowed = false;
220 return 0;
221 }
222
223 static void pcie_portdrv_remove(struct pci_dev *dev)
224 {
225 pcie_port_device_remove(dev);
226 }
227
228 static int error_detected_iter(struct device *device, void *data)
229 {
230 struct pcie_device *pcie_device;
231 struct pcie_port_service_driver *driver;
232 struct aer_broadcast_data *result_data;
233 pci_ers_result_t status;
234
235 result_data = (struct aer_broadcast_data *) data;
236
237 if (device->bus == &pcie_port_bus_type && device->driver) {
238 driver = to_service_driver(device->driver);
239 if (!driver ||
240 !driver->err_handler ||
241 !driver->err_handler->error_detected)
242 return 0;
243
244 pcie_device = to_pcie_device(device);
245
246 /* Forward error detected message to service drivers */
247 status = driver->err_handler->error_detected(
248 pcie_device->port,
249 result_data->state);
250 result_data->result =
251 merge_result(result_data->result, status);
252 }
253
254 return 0;
255 }
256
257 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
258 enum pci_channel_state error)
259 {
260 struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
261
262 /* get true return value from &data */
263 device_for_each_child(&dev->dev, &data, error_detected_iter);
264 return data.result;
265 }
266
267 static int mmio_enabled_iter(struct device *device, void *data)
268 {
269 struct pcie_device *pcie_device;
270 struct pcie_port_service_driver *driver;
271 pci_ers_result_t status, *result;
272
273 result = (pci_ers_result_t *) data;
274
275 if (device->bus == &pcie_port_bus_type && device->driver) {
276 driver = to_service_driver(device->driver);
277 if (driver &&
278 driver->err_handler &&
279 driver->err_handler->mmio_enabled) {
280 pcie_device = to_pcie_device(device);
281
282 /* Forward error message to service drivers */
283 status = driver->err_handler->mmio_enabled(
284 pcie_device->port);
285 *result = merge_result(*result, status);
286 }
287 }
288
289 return 0;
290 }
291
292 static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
293 {
294 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
295
296 /* get true return value from &status */
297 device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
298 return status;
299 }
300
301 static int slot_reset_iter(struct device *device, void *data)
302 {
303 struct pcie_device *pcie_device;
304 struct pcie_port_service_driver *driver;
305 pci_ers_result_t status, *result;
306
307 result = (pci_ers_result_t *) data;
308
309 if (device->bus == &pcie_port_bus_type && device->driver) {
310 driver = to_service_driver(device->driver);
311 if (driver &&
312 driver->err_handler &&
313 driver->err_handler->slot_reset) {
314 pcie_device = to_pcie_device(device);
315
316 /* Forward error message to service drivers */
317 status = driver->err_handler->slot_reset(
318 pcie_device->port);
319 *result = merge_result(*result, status);
320 }
321 }
322
323 return 0;
324 }
325
326 static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
327 {
328 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
329
330 /* If fatal, restore cfg space for possible link reset at upstream */
331 if (dev->error_state == pci_channel_io_frozen) {
332 dev->state_saved = true;
333 pci_restore_state(dev);
334 pcie_portdrv_restore_config(dev);
335 pci_enable_pcie_error_reporting(dev);
336 }
337
338 /* get true return value from &status */
339 device_for_each_child(&dev->dev, &status, slot_reset_iter);
340 return status;
341 }
342
343 static int resume_iter(struct device *device, void *data)
344 {
345 struct pcie_device *pcie_device;
346 struct pcie_port_service_driver *driver;
347
348 if (device->bus == &pcie_port_bus_type && device->driver) {
349 driver = to_service_driver(device->driver);
350 if (driver &&
351 driver->err_handler &&
352 driver->err_handler->resume) {
353 pcie_device = to_pcie_device(device);
354
355 /* Forward error message to service drivers */
356 driver->err_handler->resume(pcie_device->port);
357 }
358 }
359
360 return 0;
361 }
362
363 static void pcie_portdrv_err_resume(struct pci_dev *dev)
364 {
365 device_for_each_child(&dev->dev, NULL, resume_iter);
366 }
367
368 /*
369 * LINUX Device Driver Model
370 */
371 static const struct pci_device_id port_pci_ids[] = { {
372 /* handle any PCI-Express port */
373 PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
374 }, { /* end: all zeroes */ }
375 };
376 MODULE_DEVICE_TABLE(pci, port_pci_ids);
377
378 static const struct pci_error_handlers pcie_portdrv_err_handler = {
379 .error_detected = pcie_portdrv_error_detected,
380 .mmio_enabled = pcie_portdrv_mmio_enabled,
381 .slot_reset = pcie_portdrv_slot_reset,
382 .resume = pcie_portdrv_err_resume,
383 };
384
385 static struct pci_driver pcie_portdriver = {
386 .name = "pcieport",
387 .id_table = &port_pci_ids[0],
388
389 .probe = pcie_portdrv_probe,
390 .remove = pcie_portdrv_remove,
391
392 .err_handler = &pcie_portdrv_err_handler,
393
394 .driver.pm = PCIE_PORTDRV_PM_OPS,
395 };
396
397 static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
398 {
399 pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
400 d->ident);
401 pcie_pme_disable_msi();
402 return 0;
403 }
404
405 static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
406 /*
407 * Boxes that should not use MSI for PCIe PME signaling.
408 */
409 {
410 .callback = dmi_pcie_pme_disable_msi,
411 .ident = "MSI Wind U-100",
412 .matches = {
413 DMI_MATCH(DMI_SYS_VENDOR,
414 "MICRO-STAR INTERNATIONAL CO., LTD"),
415 DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
416 },
417 },
418 {}
419 };
420
421 static int __init pcie_portdrv_init(void)
422 {
423 int retval;
424
425 if (pcie_ports_disabled)
426 return pci_register_driver(&pcie_portdriver);
427
428 dmi_check_system(pcie_portdrv_dmi_table);
429
430 retval = pcie_port_bus_register();
431 if (retval) {
432 printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
433 goto out;
434 }
435 retval = pci_register_driver(&pcie_portdriver);
436 if (retval)
437 pcie_port_bus_unregister();
438 out:
439 return retval;
440 }
441
442 module_init(pcie_portdrv_init);