drivers/net/wireless/ti/wlcore/ini.h

   1 /*
   2  * This file is part of wl1271
   3  *
   4  * Copyright (C) 2010 Nokia Corporation
   5  *
   6  * Contact: Luciano Coelho <luciano.coelho@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  *
  22  */
  23
  24 #ifndef __INI_H__
  25 #define __INI_H__
  26
  27 #define GENERAL_SETTINGS_DRPW_LPD 0xc0
  28 #define SCRATCH_ENABLE_LPD        BIT(25)
  29
  30 #define WL1271_INI_MAX_SMART_REFLEX_PARAM 16
  31
  32 struct wl1271_ini_general_params {
  33         u8 ref_clock;
  34         u8 settling_time;
  35         u8 clk_valid_on_wakeup;
  36         u8 dc2dc_mode;
  37         u8 dual_mode_select;
  38         u8 tx_bip_fem_auto_detect;
  39         u8 tx_bip_fem_manufacturer;
  40         u8 general_settings;
  41         u8 sr_state;
  42         u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
  43         u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
  44         u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
  45 } __packed;
  46
  47 #define WL128X_INI_MAX_SETTINGS_PARAM 4
  48
  49 struct wl128x_ini_general_params {
  50         u8 ref_clock;
  51         u8 settling_time;
  52         u8 clk_valid_on_wakeup;
  53         u8 tcxo_ref_clock;
  54         u8 tcxo_settling_time;
  55         u8 tcxo_valid_on_wakeup;
  56         u8 tcxo_ldo_voltage;
  57         u8 xtal_itrim_val;
  58         u8 platform_conf;
  59         u8 dual_mode_select;
  60         u8 tx_bip_fem_auto_detect;
  61         u8 tx_bip_fem_manufacturer;
  62         u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
  63         u8 sr_state;
  64         u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
  65         u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
  66         u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
  67 } __packed;
  68
  69 #define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15
  70
  71 struct wl1271_ini_band_params_2 {
  72         u8 rx_trace_insertion_loss;
  73         u8 tx_trace_loss;
  74         u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
  75 } __packed;
  76
  77 #define WL1271_INI_CHANNEL_COUNT_2 14
  78
  79 struct wl128x_ini_band_params_2 {
  80         u8 rx_trace_insertion_loss;
  81         u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
  82         u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
  83 } __packed;
  84
  85 #define WL1271_INI_RATE_GROUP_COUNT 6
  86
  87 struct wl1271_ini_fem_params_2 {
  88         __le16 tx_bip_ref_pd_voltage;
  89         u8 tx_bip_ref_power;
  90         u8 tx_bip_ref_offset;
  91         u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
  92         u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
  93         u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
  94         u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
  95         u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
  96         u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
  97         u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
  98         u8 rx_fem_insertion_loss;
  99         u8 degraded_low_to_normal_thr;
 100         u8 normal_to_degraded_high_thr;
 101 } __packed;
 102
 103 #define WL128X_INI_RATE_GROUP_COUNT 7
 104 /* low and high temperatures */
 105 #define WL128X_INI_PD_VS_TEMPERATURE_RANGES 2
 106
 107 struct wl128x_ini_fem_params_2 {
 108         __le16 tx_bip_ref_pd_voltage;
 109         u8 tx_bip_ref_power;
 110         u8 tx_bip_ref_offset;
 111         u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
 112         u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
 113         u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
 114         u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
 115         u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
 116         u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
 117         u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
 118         u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
 119         u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
 120         u8 rx_fem_insertion_loss;
 121         u8 degraded_low_to_normal_thr;
 122         u8 normal_to_degraded_high_thr;
 123 } __packed;
 124
 125 #define WL1271_INI_CHANNEL_COUNT_5 35
 126 #define WL1271_INI_SUB_BAND_COUNT_5 7
 127
 128 struct wl1271_ini_band_params_5 {
 129         u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
 130         u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
 131         u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
 132 } __packed;
 133
 134 struct wl128x_ini_band_params_5 {
 135         u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
 136         u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
 137         u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
 138 } __packed;
 139
 140 struct wl1271_ini_fem_params_5 {
 141         __le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
 142         u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
 143         u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
 144         u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
 145         u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
 146         u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
 147         u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
 148         u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
 149         u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
 150         u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
 151         u8 degraded_low_to_normal_thr;
 152         u8 normal_to_degraded_high_thr;
 153 } __packed;
 154
 155 struct wl128x_ini_fem_params_5 {
 156         __le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
 157         u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
 158         u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
 159         u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
 160         u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
 161         u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
 162         u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
 163         u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
 164         u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
 165         u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
 166         u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
 167                 WL128X_INI_PD_VS_TEMPERATURE_RANGES];
 168         u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
 169         u8 degraded_low_to_normal_thr;
 170         u8 normal_to_degraded_high_thr;
 171 } __packed;
 172
 173 /* NVS data structure */
 174 #define WL1271_INI_NVS_SECTION_SIZE                  468
 175
 176 /* We have four FEM module types: 0-RFMD, 1-TQS, 2-SKW, 3-TQS_HP */
 177 #define WL1271_INI_FEM_MODULE_COUNT                  4
 178
 179 /*
 180  * In NVS we only store two FEM module entries -
 181  *        FEM modules 0,2,3 are stored in entry 0
 182  *        FEM module 1 is stored in entry 1
 183  */
 184 #define WL12XX_NVS_FEM_MODULE_COUNT                  2
 185
 186 #define WL12XX_FEM_TO_NVS_ENTRY(ini_fem_module)      \
 187         ((ini_fem_module) == 1 ? 1 : 0)
 188
 189 #define WL1271_INI_LEGACY_NVS_FILE_SIZE              800
 190
 191 struct wl1271_nvs_file {
 192         /* NVS section - must be first! */
 193         u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
 194
 195         /* INI section */
 196         struct wl1271_ini_general_params general_params;
 197         u8 padding1;
 198         struct wl1271_ini_band_params_2 stat_radio_params_2;
 199         u8 padding2;
 200         struct {
 201                 struct wl1271_ini_fem_params_2 params;
 202                 u8 padding;
 203         } dyn_radio_params_2[WL12XX_NVS_FEM_MODULE_COUNT];
 204         struct wl1271_ini_band_params_5 stat_radio_params_5;
 205         u8 padding3;
 206         struct {
 207                 struct wl1271_ini_fem_params_5 params;
 208                 u8 padding;
 209         } dyn_radio_params_5[WL12XX_NVS_FEM_MODULE_COUNT];
 210 } __packed;
 211
 212 struct wl128x_nvs_file {
 213         /* NVS section - must be first! */
 214         u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
 215
 216         /* INI section */
 217         struct wl128x_ini_general_params general_params;
 218         u8 fem_vendor_and_options;
 219         struct wl128x_ini_band_params_2 stat_radio_params_2;
 220         u8 padding2;
 221         struct {
 222                 struct wl128x_ini_fem_params_2 params;
 223                 u8 padding;
 224         } dyn_radio_params_2[WL12XX_NVS_FEM_MODULE_COUNT];
 225         struct wl128x_ini_band_params_5 stat_radio_params_5;
 226         u8 padding3;
 227         struct {
 228                 struct wl128x_ini_fem_params_5 params;
 229                 u8 padding;
 230         } dyn_radio_params_5[WL12XX_NVS_FEM_MODULE_COUNT];
 231 } __packed;
 232 #endif