2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init
)(void *rxd
, dma_addr_t next_dma_addr
);
86 void (*rxd_refill
)(void *rxd
, dma_addr_t addr
, int len
);
87 int (*rxd_process
)(void *rxd
, struct ieee80211_rx_status
*status
,
91 struct mwl8k_device_info
{
95 struct rxd_ops
*rxd_ops
;
99 struct mwl8k_rx_queue
{
102 /* hw receives here */
105 /* refill descs here */
112 DECLARE_PCI_UNMAP_ADDR(dma
)
116 struct mwl8k_tx_queue
{
117 /* hw transmits here */
120 /* sw appends here */
123 struct ieee80211_tx_queue_stats stats
;
124 struct mwl8k_tx_desc
*txd
;
126 struct sk_buff
**skb
;
129 /* Pointers to the firmware data and meta information about it. */
130 struct mwl8k_firmware
{
131 /* Boot helper code */
132 struct firmware
*helper
;
135 struct firmware
*ucode
;
141 struct ieee80211_hw
*hw
;
143 struct pci_dev
*pdev
;
145 struct mwl8k_device_info
*device_info
;
147 struct rxd_ops
*rxd_ops
;
149 /* firmware files and meta data */
150 struct mwl8k_firmware fw
;
152 /* firmware access */
153 struct mutex fw_mutex
;
154 struct task_struct
*fw_mutex_owner
;
156 struct completion
*hostcmd_wait
;
158 /* lock held over TX and TX reap */
161 /* TX quiesce completion, protected by fw_mutex and tx_lock */
162 struct completion
*tx_wait
;
164 struct ieee80211_vif
*vif
;
166 struct ieee80211_channel
*current_channel
;
168 /* power management status cookie from firmware */
170 dma_addr_t cookie_dma
;
177 * Running count of TX packets in flight, to avoid
178 * iterating over the transmit rings each time.
182 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
183 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
186 struct ieee80211_supported_band band
;
187 struct ieee80211_channel channels
[14];
188 struct ieee80211_rate rates
[14];
191 bool radio_short_preamble
;
192 bool sniffer_enabled
;
195 /* XXX need to convert this to handle multiple interfaces */
197 u8 capture_bssid
[ETH_ALEN
];
198 struct sk_buff
*beacon_skb
;
201 * This FJ worker has to be global as it is scheduled from the
202 * RX handler. At this point we don't know which interface it
203 * belongs to until the list of bssids waiting to complete join
206 struct work_struct finalize_join_worker
;
208 /* Tasklet to reclaim TX descriptors and buffers after tx */
209 struct tasklet_struct tx_reclaim_task
;
212 /* Per interface specific private data */
214 /* backpointer to parent config block */
215 struct mwl8k_priv
*priv
;
217 /* BSS config of AP or IBSS from mac80211*/
218 struct ieee80211_bss_conf bss_info
;
220 /* BSSID of AP or IBSS */
222 u8 mac_addr
[ETH_ALEN
];
224 /* Index into station database.Returned by update_sta_db call */
227 /* Non AMPDU sequence number assigned by driver */
231 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
233 static const struct ieee80211_channel mwl8k_channels
[] = {
234 { .center_freq
= 2412, .hw_value
= 1, },
235 { .center_freq
= 2417, .hw_value
= 2, },
236 { .center_freq
= 2422, .hw_value
= 3, },
237 { .center_freq
= 2427, .hw_value
= 4, },
238 { .center_freq
= 2432, .hw_value
= 5, },
239 { .center_freq
= 2437, .hw_value
= 6, },
240 { .center_freq
= 2442, .hw_value
= 7, },
241 { .center_freq
= 2447, .hw_value
= 8, },
242 { .center_freq
= 2452, .hw_value
= 9, },
243 { .center_freq
= 2457, .hw_value
= 10, },
244 { .center_freq
= 2462, .hw_value
= 11, },
247 static const struct ieee80211_rate mwl8k_rates
[] = {
248 { .bitrate
= 10, .hw_value
= 2, },
249 { .bitrate
= 20, .hw_value
= 4, },
250 { .bitrate
= 55, .hw_value
= 11, },
251 { .bitrate
= 110, .hw_value
= 22, },
252 { .bitrate
= 220, .hw_value
= 44, },
253 { .bitrate
= 60, .hw_value
= 12, },
254 { .bitrate
= 90, .hw_value
= 18, },
255 { .bitrate
= 120, .hw_value
= 24, },
256 { .bitrate
= 180, .hw_value
= 36, },
257 { .bitrate
= 240, .hw_value
= 48, },
258 { .bitrate
= 360, .hw_value
= 72, },
259 { .bitrate
= 480, .hw_value
= 96, },
260 { .bitrate
= 540, .hw_value
= 108, },
261 { .bitrate
= 720, .hw_value
= 144, },
264 static const u8 mwl8k_rateids
[12] = {
265 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108,
268 /* Set or get info from Firmware */
269 #define MWL8K_CMD_SET 0x0001
270 #define MWL8K_CMD_GET 0x0000
272 /* Firmware command codes */
273 #define MWL8K_CMD_CODE_DNLD 0x0001
274 #define MWL8K_CMD_GET_HW_SPEC 0x0003
275 #define MWL8K_CMD_SET_HW_SPEC 0x0004
276 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
277 #define MWL8K_CMD_GET_STAT 0x0014
278 #define MWL8K_CMD_RADIO_CONTROL 0x001c
279 #define MWL8K_CMD_RF_TX_POWER 0x001e
280 #define MWL8K_CMD_RF_ANTENNA 0x0020
281 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
282 #define MWL8K_CMD_SET_POST_SCAN 0x0108
283 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
284 #define MWL8K_CMD_SET_AID 0x010d
285 #define MWL8K_CMD_SET_RATE 0x0110
286 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
287 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
288 #define MWL8K_CMD_SET_SLOT 0x0114
289 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
290 #define MWL8K_CMD_SET_WMM_MODE 0x0123
291 #define MWL8K_CMD_MIMO_CONFIG 0x0125
292 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
293 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
294 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
295 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
296 #define MWL8K_CMD_UPDATE_STADB 0x1123
298 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
300 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
301 snprintf(buf, bufsize, "%s", #x);\
304 switch (cmd
& ~0x8000) {
305 MWL8K_CMDNAME(CODE_DNLD
);
306 MWL8K_CMDNAME(GET_HW_SPEC
);
307 MWL8K_CMDNAME(SET_HW_SPEC
);
308 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
309 MWL8K_CMDNAME(GET_STAT
);
310 MWL8K_CMDNAME(RADIO_CONTROL
);
311 MWL8K_CMDNAME(RF_TX_POWER
);
312 MWL8K_CMDNAME(RF_ANTENNA
);
313 MWL8K_CMDNAME(SET_PRE_SCAN
);
314 MWL8K_CMDNAME(SET_POST_SCAN
);
315 MWL8K_CMDNAME(SET_RF_CHANNEL
);
316 MWL8K_CMDNAME(SET_AID
);
317 MWL8K_CMDNAME(SET_RATE
);
318 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
319 MWL8K_CMDNAME(RTS_THRESHOLD
);
320 MWL8K_CMDNAME(SET_SLOT
);
321 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
322 MWL8K_CMDNAME(SET_WMM_MODE
);
323 MWL8K_CMDNAME(MIMO_CONFIG
);
324 MWL8K_CMDNAME(USE_FIXED_RATE
);
325 MWL8K_CMDNAME(ENABLE_SNIFFER
);
326 MWL8K_CMDNAME(SET_MAC_ADDR
);
327 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
328 MWL8K_CMDNAME(UPDATE_STADB
);
330 snprintf(buf
, bufsize
, "0x%x", cmd
);
337 /* Hardware and firmware reset */
338 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
340 iowrite32(MWL8K_H2A_INT_RESET
,
341 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
342 iowrite32(MWL8K_H2A_INT_RESET
,
343 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
347 /* Release fw image */
348 static void mwl8k_release_fw(struct firmware
**fw
)
352 release_firmware(*fw
);
356 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
358 mwl8k_release_fw(&priv
->fw
.ucode
);
359 mwl8k_release_fw(&priv
->fw
.helper
);
362 /* Request fw image */
363 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
364 const char *fname
, struct firmware
**fw
)
366 /* release current image */
368 mwl8k_release_fw(fw
);
370 return request_firmware((const struct firmware
**)fw
,
371 fname
, &priv
->pdev
->dev
);
374 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
)
376 struct mwl8k_device_info
*di
= priv
->device_info
;
379 if (di
->helper_image
!= NULL
) {
380 rc
= mwl8k_request_fw(priv
, di
->helper_image
, &priv
->fw
.helper
);
382 printk(KERN_ERR
"%s: Error requesting helper "
383 "firmware file %s\n", pci_name(priv
->pdev
),
389 rc
= mwl8k_request_fw(priv
, di
->fw_image
, &priv
->fw
.ucode
);
391 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
392 pci_name(priv
->pdev
), di
->fw_image
);
393 mwl8k_release_fw(&priv
->fw
.helper
);
400 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
401 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
403 struct mwl8k_cmd_pkt
{
409 } __attribute__((packed
));
415 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
417 void __iomem
*regs
= priv
->regs
;
421 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
422 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
425 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
426 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
427 iowrite32(MWL8K_H2A_INT_DOORBELL
,
428 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
429 iowrite32(MWL8K_H2A_INT_DUMMY
,
430 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
436 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
437 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
438 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
446 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
448 return loops
? 0 : -ETIMEDOUT
;
451 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
452 const u8
*data
, size_t length
)
454 struct mwl8k_cmd_pkt
*cmd
;
458 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
462 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
468 int block_size
= length
> 256 ? 256 : length
;
470 memcpy(cmd
->payload
, data
+ done
, block_size
);
471 cmd
->length
= cpu_to_le16(block_size
);
473 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
474 sizeof(*cmd
) + block_size
);
479 length
-= block_size
;
484 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
492 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
493 const u8
*data
, size_t length
)
495 unsigned char *buffer
;
496 int may_continue
, rc
= 0;
497 u32 done
, prev_block_size
;
499 buffer
= kmalloc(1024, GFP_KERNEL
);
506 while (may_continue
> 0) {
509 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
510 if (block_size
& 1) {
514 done
+= prev_block_size
;
515 length
-= prev_block_size
;
518 if (block_size
> 1024 || block_size
> length
) {
528 if (block_size
== 0) {
535 prev_block_size
= block_size
;
536 memcpy(buffer
, data
+ done
, block_size
);
538 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
543 if (!rc
&& length
!= 0)
551 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
553 struct mwl8k_priv
*priv
= hw
->priv
;
554 struct firmware
*fw
= priv
->fw
.ucode
;
555 struct mwl8k_device_info
*di
= priv
->device_info
;
559 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
560 struct firmware
*helper
= priv
->fw
.helper
;
562 if (helper
== NULL
) {
563 printk(KERN_ERR
"%s: helper image needed but none "
564 "given\n", pci_name(priv
->pdev
));
568 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
570 printk(KERN_ERR
"%s: unable to load firmware "
571 "helper image\n", pci_name(priv
->pdev
));
576 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
578 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
582 printk(KERN_ERR
"%s: unable to load firmware image\n",
583 pci_name(priv
->pdev
));
587 if (di
->modes
& BIT(NL80211_IFTYPE_AP
))
588 iowrite32(MWL8K_MODE_AP
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
590 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
597 ready_code
= ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
598 if (ready_code
== MWL8K_FWAP_READY
) {
601 } else if (ready_code
== MWL8K_FWSTA_READY
) {
610 return loops
? 0 : -ETIMEDOUT
;
615 * Defines shared between transmission and reception.
617 /* HT control fields for firmware */
622 } __attribute__((packed
));
624 /* Firmware Station database operations */
625 #define MWL8K_STA_DB_ADD_ENTRY 0
626 #define MWL8K_STA_DB_MODIFY_ENTRY 1
627 #define MWL8K_STA_DB_DEL_ENTRY 2
628 #define MWL8K_STA_DB_FLUSH 3
630 /* Peer Entry flags - used to define the type of the peer node */
631 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
633 struct peer_capability_info
{
634 /* Peer type - AP vs. STA. */
637 /* Basic 802.11 capabilities from assoc resp. */
640 /* Set if peer supports 802.11n high throughput (HT). */
643 /* Valid if HT is supported. */
645 __u8 extended_ht_caps
;
646 struct ewc_ht_info ewc_info
;
648 /* Legacy rate table. Intersection of our rates and peer rates. */
649 __u8 legacy_rates
[12];
651 /* HT rate table. Intersection of our rates and peer rates. */
655 /* If set, interoperability mode, no proprietary extensions. */
659 __le16 amsdu_enabled
;
660 } __attribute__((packed
));
662 /* Inline functions to manipulate QoS field in data descriptor. */
663 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
665 u16 val_mask
= 1 << 4;
667 /* End of Service Period Bit 4 */
668 return qos
| val_mask
;
671 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
675 u16 qos_mask
= ~(val_mask
<< shift
);
677 /* Ack Policy Bit 5-6 */
678 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
681 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
683 u16 val_mask
= 1 << 7;
685 /* AMSDU present Bit 7 */
686 return qos
| val_mask
;
689 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
693 u16 qos_mask
= ~(val_mask
<< shift
);
695 /* Queue Length Bits 8-15 */
696 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
699 /* DMA header used by firmware and hardware. */
700 struct mwl8k_dma_data
{
702 struct ieee80211_hdr wh
;
704 } __attribute__((packed
));
706 /* Routines to add/remove DMA header from skb. */
707 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
, __le16 qos
)
709 struct mwl8k_dma_data
*tr
;
712 tr
= (struct mwl8k_dma_data
*)skb
->data
;
713 hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
715 if (hdrlen
!= sizeof(tr
->wh
)) {
716 if (ieee80211_is_data_qos(tr
->wh
.frame_control
)) {
717 memmove(tr
->data
- hdrlen
, &tr
->wh
, hdrlen
- 2);
718 *((__le16
*)(tr
->data
- 2)) = qos
;
720 memmove(tr
->data
- hdrlen
, &tr
->wh
, hdrlen
);
724 if (hdrlen
!= sizeof(*tr
))
725 skb_pull(skb
, sizeof(*tr
) - hdrlen
);
728 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
730 struct ieee80211_hdr
*wh
;
732 struct mwl8k_dma_data
*tr
;
735 * Add a firmware DMA header; the firmware requires that we
736 * present a 2-byte payload length followed by a 4-address
737 * header (without QoS field), followed (optionally) by any
738 * WEP/ExtIV header (but only filled in for CCMP).
740 wh
= (struct ieee80211_hdr
*)skb
->data
;
742 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
743 if (hdrlen
!= sizeof(*tr
))
744 skb_push(skb
, sizeof(*tr
) - hdrlen
);
746 if (ieee80211_is_data_qos(wh
->frame_control
))
749 tr
= (struct mwl8k_dma_data
*)skb
->data
;
751 memmove(&tr
->wh
, wh
, hdrlen
);
752 if (hdrlen
!= sizeof(tr
->wh
))
753 memset(((void *)&tr
->wh
) + hdrlen
, 0, sizeof(tr
->wh
) - hdrlen
);
756 * Firmware length is the length of the fully formed "802.11
757 * payload". That is, everything except for the 802.11 header.
758 * This includes all crypto material including the MIC.
760 tr
->fwlen
= cpu_to_le16(skb
->len
- sizeof(*tr
));
765 * Packet reception for 88w8366.
767 struct mwl8k_rxd_8366
{
771 __le32 pkt_phys_addr
;
772 __le32 next_rxd_phys_addr
;
776 __le32 hw_noise_floor_info
;
783 } __attribute__((packed
));
785 #define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80
787 static void mwl8k_rxd_8366_init(void *_rxd
, dma_addr_t next_dma_addr
)
789 struct mwl8k_rxd_8366
*rxd
= _rxd
;
791 rxd
->next_rxd_phys_addr
= cpu_to_le32(next_dma_addr
);
792 rxd
->rx_ctrl
= MWL8K_8366_RX_CTRL_OWNED_BY_HOST
;
795 static void mwl8k_rxd_8366_refill(void *_rxd
, dma_addr_t addr
, int len
)
797 struct mwl8k_rxd_8366
*rxd
= _rxd
;
799 rxd
->pkt_len
= cpu_to_le16(len
);
800 rxd
->pkt_phys_addr
= cpu_to_le32(addr
);
806 mwl8k_rxd_8366_process(void *_rxd
, struct ieee80211_rx_status
*status
,
809 struct mwl8k_rxd_8366
*rxd
= _rxd
;
811 if (!(rxd
->rx_ctrl
& MWL8K_8366_RX_CTRL_OWNED_BY_HOST
))
815 memset(status
, 0, sizeof(*status
));
817 status
->signal
= -rxd
->rssi
;
818 status
->noise
= -rxd
->noise_floor
;
820 if (rxd
->rate
& 0x80) {
821 status
->flag
|= RX_FLAG_HT
;
822 status
->rate_idx
= rxd
->rate
& 0x7f;
826 for (i
= 0; i
< ARRAY_SIZE(mwl8k_rates
); i
++) {
827 if (mwl8k_rates
[i
].hw_value
== rxd
->rate
) {
828 status
->rate_idx
= i
;
834 status
->band
= IEEE80211_BAND_2GHZ
;
835 status
->freq
= ieee80211_channel_to_frequency(rxd
->channel
);
837 *qos
= rxd
->qos_control
;
839 return le16_to_cpu(rxd
->pkt_len
);
842 static struct rxd_ops rxd_8366_ops
= {
843 .rxd_size
= sizeof(struct mwl8k_rxd_8366
),
844 .rxd_init
= mwl8k_rxd_8366_init
,
845 .rxd_refill
= mwl8k_rxd_8366_refill
,
846 .rxd_process
= mwl8k_rxd_8366_process
,
850 * Packet reception for 88w8687.
852 struct mwl8k_rxd_8687
{
856 __le32 pkt_phys_addr
;
857 __le32 next_rxd_phys_addr
;
867 } __attribute__((packed
));
869 #define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
870 #define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
871 #define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
872 #define MWL8K_8687_RATE_INFO_40MHZ 0x0004
873 #define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
874 #define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
876 #define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
878 static void mwl8k_rxd_8687_init(void *_rxd
, dma_addr_t next_dma_addr
)
880 struct mwl8k_rxd_8687
*rxd
= _rxd
;
882 rxd
->next_rxd_phys_addr
= cpu_to_le32(next_dma_addr
);
883 rxd
->rx_ctrl
= MWL8K_8687_RX_CTRL_OWNED_BY_HOST
;
886 static void mwl8k_rxd_8687_refill(void *_rxd
, dma_addr_t addr
, int len
)
888 struct mwl8k_rxd_8687
*rxd
= _rxd
;
890 rxd
->pkt_len
= cpu_to_le16(len
);
891 rxd
->pkt_phys_addr
= cpu_to_le32(addr
);
897 mwl8k_rxd_8687_process(void *_rxd
, struct ieee80211_rx_status
*status
,
900 struct mwl8k_rxd_8687
*rxd
= _rxd
;
903 if (!(rxd
->rx_ctrl
& MWL8K_8687_RX_CTRL_OWNED_BY_HOST
))
907 rate_info
= le16_to_cpu(rxd
->rate_info
);
909 memset(status
, 0, sizeof(*status
));
911 status
->signal
= -rxd
->rssi
;
912 status
->noise
= -rxd
->noise_level
;
913 status
->qual
= rxd
->link_quality
;
914 status
->antenna
= MWL8K_8687_RATE_INFO_ANTSELECT(rate_info
);
915 status
->rate_idx
= MWL8K_8687_RATE_INFO_RATEID(rate_info
);
917 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTPRE
)
918 status
->flag
|= RX_FLAG_SHORTPRE
;
919 if (rate_info
& MWL8K_8687_RATE_INFO_40MHZ
)
920 status
->flag
|= RX_FLAG_40MHZ
;
921 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTGI
)
922 status
->flag
|= RX_FLAG_SHORT_GI
;
923 if (rate_info
& MWL8K_8687_RATE_INFO_MCS_FORMAT
)
924 status
->flag
|= RX_FLAG_HT
;
926 status
->band
= IEEE80211_BAND_2GHZ
;
927 status
->freq
= ieee80211_channel_to_frequency(rxd
->channel
);
929 *qos
= rxd
->qos_control
;
931 return le16_to_cpu(rxd
->pkt_len
);
934 static struct rxd_ops rxd_8687_ops
= {
935 .rxd_size
= sizeof(struct mwl8k_rxd_8687
),
936 .rxd_init
= mwl8k_rxd_8687_init
,
937 .rxd_refill
= mwl8k_rxd_8687_refill
,
938 .rxd_process
= mwl8k_rxd_8687_process
,
942 #define MWL8K_RX_DESCS 256
943 #define MWL8K_RX_MAXSZ 3800
945 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
947 struct mwl8k_priv
*priv
= hw
->priv
;
948 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
956 size
= MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
;
958 rxq
->rxd
= pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rxd_dma
);
959 if (rxq
->rxd
== NULL
) {
960 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
961 wiphy_name(hw
->wiphy
));
964 memset(rxq
->rxd
, 0, size
);
966 rxq
->buf
= kmalloc(MWL8K_RX_DESCS
* sizeof(*rxq
->buf
), GFP_KERNEL
);
967 if (rxq
->buf
== NULL
) {
968 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
969 wiphy_name(hw
->wiphy
));
970 pci_free_consistent(priv
->pdev
, size
, rxq
->rxd
, rxq
->rxd_dma
);
973 memset(rxq
->buf
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->buf
));
975 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
979 dma_addr_t next_dma_addr
;
981 desc_size
= priv
->rxd_ops
->rxd_size
;
982 rxd
= rxq
->rxd
+ (i
* priv
->rxd_ops
->rxd_size
);
985 if (nexti
== MWL8K_RX_DESCS
)
987 next_dma_addr
= rxq
->rxd_dma
+ (nexti
* desc_size
);
989 priv
->rxd_ops
->rxd_init(rxd
, next_dma_addr
);
995 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
997 struct mwl8k_priv
*priv
= hw
->priv
;
998 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1002 while (rxq
->rxd_count
< MWL8K_RX_DESCS
&& limit
--) {
1003 struct sk_buff
*skb
;
1008 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
1012 addr
= pci_map_single(priv
->pdev
, skb
->data
,
1013 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
);
1017 if (rxq
->tail
== MWL8K_RX_DESCS
)
1019 rxq
->buf
[rx
].skb
= skb
;
1020 pci_unmap_addr_set(&rxq
->buf
[rx
], dma
, addr
);
1022 rxd
= rxq
->rxd
+ (rx
* priv
->rxd_ops
->rxd_size
);
1023 priv
->rxd_ops
->rxd_refill(rxd
, addr
, MWL8K_RX_MAXSZ
);
1031 /* Must be called only when the card's reception is completely halted */
1032 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
1034 struct mwl8k_priv
*priv
= hw
->priv
;
1035 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1038 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
1039 if (rxq
->buf
[i
].skb
!= NULL
) {
1040 pci_unmap_single(priv
->pdev
,
1041 pci_unmap_addr(&rxq
->buf
[i
], dma
),
1042 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
1043 pci_unmap_addr_set(&rxq
->buf
[i
], dma
, 0);
1045 kfree_skb(rxq
->buf
[i
].skb
);
1046 rxq
->buf
[i
].skb
= NULL
;
1053 pci_free_consistent(priv
->pdev
,
1054 MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
,
1055 rxq
->rxd
, rxq
->rxd_dma
);
1061 * Scan a list of BSSIDs to process for finalize join.
1062 * Allows for extension to process multiple BSSIDs.
1065 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
1067 return priv
->capture_beacon
&&
1068 ieee80211_is_beacon(wh
->frame_control
) &&
1069 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
1072 static inline void mwl8k_save_beacon(struct ieee80211_hw
*hw
,
1073 struct sk_buff
*skb
)
1075 struct mwl8k_priv
*priv
= hw
->priv
;
1077 priv
->capture_beacon
= false;
1078 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
1081 * Use GFP_ATOMIC as rxq_process is called from
1082 * the primary interrupt handler, memory allocation call
1085 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
1086 if (priv
->beacon_skb
!= NULL
)
1087 ieee80211_queue_work(hw
, &priv
->finalize_join_worker
);
1090 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
1092 struct mwl8k_priv
*priv
= hw
->priv
;
1093 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1097 while (rxq
->rxd_count
&& limit
--) {
1098 struct sk_buff
*skb
;
1101 struct ieee80211_rx_status status
;
1104 skb
= rxq
->buf
[rxq
->head
].skb
;
1108 rxd
= rxq
->rxd
+ (rxq
->head
* priv
->rxd_ops
->rxd_size
);
1110 pkt_len
= priv
->rxd_ops
->rxd_process(rxd
, &status
, &qos
);
1114 rxq
->buf
[rxq
->head
].skb
= NULL
;
1116 pci_unmap_single(priv
->pdev
,
1117 pci_unmap_addr(&rxq
->buf
[rxq
->head
], dma
),
1118 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
1119 pci_unmap_addr_set(&rxq
->buf
[rxq
->head
], dma
, 0);
1122 if (rxq
->head
== MWL8K_RX_DESCS
)
1127 skb_put(skb
, pkt_len
);
1128 mwl8k_remove_dma_header(skb
, qos
);
1131 * Check for a pending join operation. Save a
1132 * copy of the beacon and schedule a tasklet to
1133 * send a FINALIZE_JOIN command to the firmware.
1135 if (mwl8k_capture_bssid(priv
, (void *)skb
->data
))
1136 mwl8k_save_beacon(hw
, skb
);
1138 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
1139 ieee80211_rx_irqsafe(hw
, skb
);
1149 * Packet transmission.
1152 /* Transmit packet ACK policy */
1153 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1154 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1156 #define MWL8K_TXD_STATUS_OK 0x00000001
1157 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1158 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1159 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1160 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1162 struct mwl8k_tx_desc
{
1167 __le32 pkt_phys_addr
;
1169 __u8 dest_MAC_addr
[ETH_ALEN
];
1170 __le32 next_txd_phys_addr
;
1175 } __attribute__((packed
));
1177 #define MWL8K_TX_DESCS 128
1179 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1181 struct mwl8k_priv
*priv
= hw
->priv
;
1182 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1186 memset(&txq
->stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1187 txq
->stats
.limit
= MWL8K_TX_DESCS
;
1191 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1193 txq
->txd
= pci_alloc_consistent(priv
->pdev
, size
, &txq
->txd_dma
);
1194 if (txq
->txd
== NULL
) {
1195 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1196 wiphy_name(hw
->wiphy
));
1199 memset(txq
->txd
, 0, size
);
1201 txq
->skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->skb
), GFP_KERNEL
);
1202 if (txq
->skb
== NULL
) {
1203 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1204 wiphy_name(hw
->wiphy
));
1205 pci_free_consistent(priv
->pdev
, size
, txq
->txd
, txq
->txd_dma
);
1208 memset(txq
->skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->skb
));
1210 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1211 struct mwl8k_tx_desc
*tx_desc
;
1214 tx_desc
= txq
->txd
+ i
;
1215 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1217 tx_desc
->status
= 0;
1218 tx_desc
->next_txd_phys_addr
=
1219 cpu_to_le32(txq
->txd_dma
+ nexti
* sizeof(*tx_desc
));
1225 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1227 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1228 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1229 iowrite32(MWL8K_H2A_INT_DUMMY
,
1230 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1231 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1234 struct mwl8k_txq_info
{
1243 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1244 struct mwl8k_txq_info
*txinfo
)
1246 int count
, desc
, status
;
1247 struct mwl8k_tx_queue
*txq
;
1248 struct mwl8k_tx_desc
*tx_desc
;
1251 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1253 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1254 txq
= priv
->txq
+ count
;
1255 txinfo
[count
].len
= txq
->stats
.len
;
1256 txinfo
[count
].head
= txq
->head
;
1257 txinfo
[count
].tail
= txq
->tail
;
1258 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1259 tx_desc
= txq
->txd
+ desc
;
1260 status
= le32_to_cpu(tx_desc
->status
);
1262 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1263 txinfo
[count
].fw_owned
++;
1265 txinfo
[count
].drv_owned
++;
1267 if (tx_desc
->pkt_len
== 0)
1268 txinfo
[count
].unused
++;
1276 * Must be called with priv->fw_mutex held and tx queues stopped.
1278 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1280 struct mwl8k_priv
*priv
= hw
->priv
;
1281 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1283 unsigned long timeout
;
1287 spin_lock_bh(&priv
->tx_lock
);
1288 count
= priv
->pending_tx_pkts
;
1290 priv
->tx_wait
= &tx_wait
;
1291 spin_unlock_bh(&priv
->tx_lock
);
1294 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1298 timeout
= wait_for_completion_timeout(&tx_wait
,
1299 msecs_to_jiffies(5000));
1303 spin_lock_bh(&priv
->tx_lock
);
1304 priv
->tx_wait
= NULL
;
1305 newcount
= priv
->pending_tx_pkts
;
1306 mwl8k_scan_tx_ring(priv
, txinfo
);
1307 spin_unlock_bh(&priv
->tx_lock
);
1309 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1310 __func__
, __LINE__
, count
, newcount
);
1312 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1313 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1319 txinfo
[index
].fw_owned
,
1320 txinfo
[index
].drv_owned
,
1321 txinfo
[index
].unused
);
1329 #define MWL8K_TXD_SUCCESS(status) \
1330 ((status) & (MWL8K_TXD_STATUS_OK | \
1331 MWL8K_TXD_STATUS_OK_RETRY | \
1332 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1334 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1336 struct mwl8k_priv
*priv
= hw
->priv
;
1337 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1340 while (txq
->stats
.len
> 0) {
1342 struct mwl8k_tx_desc
*tx_desc
;
1345 struct sk_buff
*skb
;
1346 struct ieee80211_tx_info
*info
;
1350 tx_desc
= txq
->txd
+ tx
;
1352 status
= le32_to_cpu(tx_desc
->status
);
1354 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1358 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1361 txq
->head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1362 BUG_ON(txq
->stats
.len
== 0);
1364 priv
->pending_tx_pkts
--;
1366 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1367 size
= le16_to_cpu(tx_desc
->pkt_len
);
1369 txq
->skb
[tx
] = NULL
;
1371 BUG_ON(skb
== NULL
);
1372 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1374 mwl8k_remove_dma_header(skb
, tx_desc
->qos_control
);
1376 /* Mark descriptor as unused */
1377 tx_desc
->pkt_phys_addr
= 0;
1378 tx_desc
->pkt_len
= 0;
1380 info
= IEEE80211_SKB_CB(skb
);
1381 ieee80211_tx_info_clear_status(info
);
1382 if (MWL8K_TXD_SUCCESS(status
))
1383 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1385 ieee80211_tx_status_irqsafe(hw
, skb
);
1390 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1391 ieee80211_wake_queue(hw
, index
);
1394 /* must be called only when the card's transmit is completely halted */
1395 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1397 struct mwl8k_priv
*priv
= hw
->priv
;
1398 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1400 mwl8k_txq_reclaim(hw
, index
, 1);
1405 pci_free_consistent(priv
->pdev
,
1406 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1407 txq
->txd
, txq
->txd_dma
);
1412 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1414 struct mwl8k_priv
*priv
= hw
->priv
;
1415 struct ieee80211_tx_info
*tx_info
;
1416 struct mwl8k_vif
*mwl8k_vif
;
1417 struct ieee80211_hdr
*wh
;
1418 struct mwl8k_tx_queue
*txq
;
1419 struct mwl8k_tx_desc
*tx
;
1425 wh
= (struct ieee80211_hdr
*)skb
->data
;
1426 if (ieee80211_is_data_qos(wh
->frame_control
))
1427 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1431 mwl8k_add_dma_header(skb
);
1432 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1434 tx_info
= IEEE80211_SKB_CB(skb
);
1435 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1437 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1438 u16 seqno
= mwl8k_vif
->seqno
;
1440 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1441 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1442 mwl8k_vif
->seqno
= seqno
++ % 4096;
1445 /* Setup firmware control bit fields for each frame type. */
1448 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1449 ieee80211_is_ctl(wh
->frame_control
)) {
1451 qos
= mwl8k_qos_setbit_eosp(qos
);
1452 /* Set Queue size to unspecified */
1453 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1454 } else if (ieee80211_is_data(wh
->frame_control
)) {
1456 if (is_multicast_ether_addr(wh
->addr1
))
1457 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1459 /* Send pkt in an aggregate if AMPDU frame. */
1460 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1461 qos
= mwl8k_qos_setbit_ack(qos
,
1462 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1464 qos
= mwl8k_qos_setbit_ack(qos
,
1465 MWL8K_TXD_ACK_POLICY_NORMAL
);
1467 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1468 qos
= mwl8k_qos_setbit_amsdu(qos
);
1471 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1472 skb
->len
, PCI_DMA_TODEVICE
);
1474 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1475 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1476 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1478 return NETDEV_TX_OK
;
1481 spin_lock_bh(&priv
->tx_lock
);
1483 txq
= priv
->txq
+ index
;
1485 BUG_ON(txq
->skb
[txq
->tail
] != NULL
);
1486 txq
->skb
[txq
->tail
] = skb
;
1488 tx
= txq
->txd
+ txq
->tail
;
1489 tx
->data_rate
= txdatarate
;
1490 tx
->tx_priority
= index
;
1491 tx
->qos_control
= cpu_to_le16(qos
);
1492 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1493 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1495 tx
->peer_id
= mwl8k_vif
->peer_id
;
1497 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1501 priv
->pending_tx_pkts
++;
1504 if (txq
->tail
== MWL8K_TX_DESCS
)
1507 if (txq
->head
== txq
->tail
)
1508 ieee80211_stop_queue(hw
, index
);
1510 mwl8k_tx_start(priv
);
1512 spin_unlock_bh(&priv
->tx_lock
);
1514 return NETDEV_TX_OK
;
1521 * We have the following requirements for issuing firmware commands:
1522 * - Some commands require that the packet transmit path is idle when
1523 * the command is issued. (For simplicity, we'll just quiesce the
1524 * transmit path for every command.)
1525 * - There are certain sequences of commands that need to be issued to
1526 * the hardware sequentially, with no other intervening commands.
1528 * This leads to an implementation of a "firmware lock" as a mutex that
1529 * can be taken recursively, and which is taken by both the low-level
1530 * command submission function (mwl8k_post_cmd) as well as any users of
1531 * that function that require issuing of an atomic sequence of commands,
1532 * and quiesces the transmit path whenever it's taken.
1534 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1536 struct mwl8k_priv
*priv
= hw
->priv
;
1538 if (priv
->fw_mutex_owner
!= current
) {
1541 mutex_lock(&priv
->fw_mutex
);
1542 ieee80211_stop_queues(hw
);
1544 rc
= mwl8k_tx_wait_empty(hw
);
1546 ieee80211_wake_queues(hw
);
1547 mutex_unlock(&priv
->fw_mutex
);
1552 priv
->fw_mutex_owner
= current
;
1555 priv
->fw_mutex_depth
++;
1560 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1562 struct mwl8k_priv
*priv
= hw
->priv
;
1564 if (!--priv
->fw_mutex_depth
) {
1565 ieee80211_wake_queues(hw
);
1566 priv
->fw_mutex_owner
= NULL
;
1567 mutex_unlock(&priv
->fw_mutex
);
1573 * Command processing.
1576 /* Timeout firmware commands after 2000ms */
1577 #define MWL8K_CMD_TIMEOUT_MS 2000
1579 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1581 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1582 struct mwl8k_priv
*priv
= hw
->priv
;
1583 void __iomem
*regs
= priv
->regs
;
1584 dma_addr_t dma_addr
;
1585 unsigned int dma_size
;
1587 unsigned long timeout
= 0;
1590 cmd
->result
= 0xffff;
1591 dma_size
= le16_to_cpu(cmd
->length
);
1592 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1593 PCI_DMA_BIDIRECTIONAL
);
1594 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1597 rc
= mwl8k_fw_lock(hw
);
1599 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1600 PCI_DMA_BIDIRECTIONAL
);
1604 priv
->hostcmd_wait
= &cmd_wait
;
1605 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1606 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1607 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1608 iowrite32(MWL8K_H2A_INT_DUMMY
,
1609 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1611 timeout
= wait_for_completion_timeout(&cmd_wait
,
1612 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1614 priv
->hostcmd_wait
= NULL
;
1616 mwl8k_fw_unlock(hw
);
1618 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1619 PCI_DMA_BIDIRECTIONAL
);
1622 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1623 wiphy_name(hw
->wiphy
),
1624 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1625 MWL8K_CMD_TIMEOUT_MS
);
1628 rc
= cmd
->result
? -EINVAL
: 0;
1630 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1631 wiphy_name(hw
->wiphy
),
1632 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1633 le16_to_cpu(cmd
->result
));
1640 * CMD_GET_HW_SPEC (STA version).
1642 struct mwl8k_cmd_get_hw_spec_sta
{
1643 struct mwl8k_cmd_pkt header
;
1645 __u8 host_interface
;
1647 __u8 perm_addr
[ETH_ALEN
];
1652 __u8 mcs_bitmap
[16];
1653 __le32 rx_queue_ptr
;
1654 __le32 num_tx_queues
;
1655 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1657 __le32 num_tx_desc_per_queue
;
1659 } __attribute__((packed
));
1661 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw
*hw
)
1663 struct mwl8k_priv
*priv
= hw
->priv
;
1664 struct mwl8k_cmd_get_hw_spec_sta
*cmd
;
1668 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1672 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1673 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1675 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1676 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1677 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1678 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1679 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1680 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1681 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1682 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1684 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1687 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1688 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1689 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1690 priv
->hw_rev
= cmd
->hw_rev
;
1698 * CMD_GET_HW_SPEC (AP version).
1700 struct mwl8k_cmd_get_hw_spec_ap
{
1701 struct mwl8k_cmd_pkt header
;
1703 __u8 host_interface
;
1706 __u8 perm_addr
[ETH_ALEN
];
1717 } __attribute__((packed
));
1719 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw
*hw
)
1721 struct mwl8k_priv
*priv
= hw
->priv
;
1722 struct mwl8k_cmd_get_hw_spec_ap
*cmd
;
1725 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1729 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1730 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1732 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1733 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1735 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1740 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1741 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1742 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1743 priv
->hw_rev
= cmd
->hw_rev
;
1745 off
= le32_to_cpu(cmd
->wcbbase0
) & 0xffff;
1746 iowrite32(cpu_to_le32(priv
->txq
[0].txd_dma
), priv
->sram
+ off
);
1748 off
= le32_to_cpu(cmd
->rxwrptr
) & 0xffff;
1749 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1751 off
= le32_to_cpu(cmd
->rxrdptr
) & 0xffff;
1752 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1754 off
= le32_to_cpu(cmd
->wcbbase1
) & 0xffff;
1755 iowrite32(cpu_to_le32(priv
->txq
[1].txd_dma
), priv
->sram
+ off
);
1757 off
= le32_to_cpu(cmd
->wcbbase2
) & 0xffff;
1758 iowrite32(cpu_to_le32(priv
->txq
[2].txd_dma
), priv
->sram
+ off
);
1760 off
= le32_to_cpu(cmd
->wcbbase3
) & 0xffff;
1761 iowrite32(cpu_to_le32(priv
->txq
[3].txd_dma
), priv
->sram
+ off
);
1771 struct mwl8k_cmd_set_hw_spec
{
1772 struct mwl8k_cmd_pkt header
;
1774 __u8 host_interface
;
1776 __u8 perm_addr
[ETH_ALEN
];
1781 __le32 rx_queue_ptr
;
1782 __le32 num_tx_queues
;
1783 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1785 __le32 num_tx_desc_per_queue
;
1787 } __attribute__((packed
));
1789 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1791 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw
*hw
)
1793 struct mwl8k_priv
*priv
= hw
->priv
;
1794 struct mwl8k_cmd_set_hw_spec
*cmd
;
1798 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1802 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_HW_SPEC
);
1803 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1805 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1806 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1807 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1808 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1809 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1810 cmd
->flags
= cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT
);
1811 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1812 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1814 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1821 * CMD_MAC_MULTICAST_ADR.
1823 struct mwl8k_cmd_mac_multicast_adr
{
1824 struct mwl8k_cmd_pkt header
;
1827 __u8 addr
[0][ETH_ALEN
];
1830 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1831 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1832 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1833 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1835 static struct mwl8k_cmd_pkt
*
1836 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
, int allmulti
,
1837 int mc_count
, struct dev_addr_list
*mclist
)
1839 struct mwl8k_priv
*priv
= hw
->priv
;
1840 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1843 if (allmulti
|| mc_count
> priv
->num_mcaddrs
) {
1848 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1850 cmd
= kzalloc(size
, GFP_ATOMIC
);
1854 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1855 cmd
->header
.length
= cpu_to_le16(size
);
1856 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1857 MWL8K_ENABLE_RX_BROADCAST
);
1860 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1861 } else if (mc_count
) {
1864 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1865 cmd
->numaddr
= cpu_to_le16(mc_count
);
1866 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1867 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1871 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1872 mclist
= mclist
->next
;
1876 return &cmd
->header
;
1880 * CMD_802_11_GET_STAT.
1882 struct mwl8k_cmd_802_11_get_stat
{
1883 struct mwl8k_cmd_pkt header
;
1885 } __attribute__((packed
));
1887 #define MWL8K_STAT_ACK_FAILURE 9
1888 #define MWL8K_STAT_RTS_FAILURE 12
1889 #define MWL8K_STAT_FCS_ERROR 24
1890 #define MWL8K_STAT_RTS_SUCCESS 11
1892 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1893 struct ieee80211_low_level_stats
*stats
)
1895 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1898 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1902 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1903 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1905 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1907 stats
->dot11ACKFailureCount
=
1908 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1909 stats
->dot11RTSFailureCount
=
1910 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1911 stats
->dot11FCSErrorCount
=
1912 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1913 stats
->dot11RTSSuccessCount
=
1914 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1922 * CMD_802_11_RADIO_CONTROL.
1924 struct mwl8k_cmd_802_11_radio_control
{
1925 struct mwl8k_cmd_pkt header
;
1929 } __attribute__((packed
));
1932 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1934 struct mwl8k_priv
*priv
= hw
->priv
;
1935 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1938 if (enable
== priv
->radio_on
&& !force
)
1941 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1945 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1946 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1947 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1948 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1949 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1951 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1955 priv
->radio_on
= enable
;
1960 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1962 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1965 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1967 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1971 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1973 struct mwl8k_priv
*priv
;
1975 if (hw
== NULL
|| hw
->priv
== NULL
)
1979 priv
->radio_short_preamble
= short_preamble
;
1981 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1985 * CMD_802_11_RF_TX_POWER.
1987 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1989 struct mwl8k_cmd_802_11_rf_tx_power
{
1990 struct mwl8k_cmd_pkt header
;
1992 __le16 support_level
;
1993 __le16 current_level
;
1995 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1996 } __attribute__((packed
));
1998 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
2000 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
2003 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2007 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
2008 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2009 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2010 cmd
->support_level
= cpu_to_le16(dBm
);
2012 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2021 struct mwl8k_cmd_rf_antenna
{
2022 struct mwl8k_cmd_pkt header
;
2025 } __attribute__((packed
));
2027 #define MWL8K_RF_ANTENNA_RX 1
2028 #define MWL8K_RF_ANTENNA_TX 2
2031 mwl8k_cmd_rf_antenna(struct ieee80211_hw
*hw
, int antenna
, int mask
)
2033 struct mwl8k_cmd_rf_antenna
*cmd
;
2036 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2040 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_ANTENNA
);
2041 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2042 cmd
->antenna
= cpu_to_le16(antenna
);
2043 cmd
->mode
= cpu_to_le16(mask
);
2045 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2054 struct mwl8k_cmd_set_pre_scan
{
2055 struct mwl8k_cmd_pkt header
;
2056 } __attribute__((packed
));
2058 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
2060 struct mwl8k_cmd_set_pre_scan
*cmd
;
2063 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2067 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
2068 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2070 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2077 * CMD_SET_POST_SCAN.
2079 struct mwl8k_cmd_set_post_scan
{
2080 struct mwl8k_cmd_pkt header
;
2082 __u8 bssid
[ETH_ALEN
];
2083 } __attribute__((packed
));
2086 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
2088 struct mwl8k_cmd_set_post_scan
*cmd
;
2091 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2095 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
2096 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2098 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
2100 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2107 * CMD_SET_RF_CHANNEL.
2109 struct mwl8k_cmd_set_rf_channel
{
2110 struct mwl8k_cmd_pkt header
;
2112 __u8 current_channel
;
2113 __le32 channel_flags
;
2114 } __attribute__((packed
));
2116 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
2117 struct ieee80211_channel
*channel
)
2119 struct mwl8k_cmd_set_rf_channel
*cmd
;
2122 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2126 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
2127 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2128 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2129 cmd
->current_channel
= channel
->hw_value
;
2130 if (channel
->band
== IEEE80211_BAND_2GHZ
)
2131 cmd
->channel_flags
= cpu_to_le32(0x00000081);
2133 cmd
->channel_flags
= cpu_to_le32(0x00000000);
2135 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2144 struct mwl8k_cmd_set_slot
{
2145 struct mwl8k_cmd_pkt header
;
2148 } __attribute__((packed
));
2150 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
2152 struct mwl8k_cmd_set_slot
*cmd
;
2155 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2159 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
2160 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2161 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2162 cmd
->short_slot
= short_slot_time
;
2164 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2173 struct mwl8k_cmd_mimo_config
{
2174 struct mwl8k_cmd_pkt header
;
2176 __u8 rx_antenna_map
;
2177 __u8 tx_antenna_map
;
2178 } __attribute__((packed
));
2180 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
2182 struct mwl8k_cmd_mimo_config
*cmd
;
2185 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2189 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
2190 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2191 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
2192 cmd
->rx_antenna_map
= rx
;
2193 cmd
->tx_antenna_map
= tx
;
2195 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2202 * CMD_ENABLE_SNIFFER.
2204 struct mwl8k_cmd_enable_sniffer
{
2205 struct mwl8k_cmd_pkt header
;
2207 } __attribute__((packed
));
2209 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
2211 struct mwl8k_cmd_enable_sniffer
*cmd
;
2214 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2218 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
2219 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2220 cmd
->action
= cpu_to_le32(!!enable
);
2222 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2231 struct mwl8k_cmd_set_mac_addr
{
2232 struct mwl8k_cmd_pkt header
;
2236 __u8 mac_addr
[ETH_ALEN
];
2238 __u8 mac_addr
[ETH_ALEN
];
2240 } __attribute__((packed
));
2242 static int mwl8k_set_mac_addr(struct ieee80211_hw
*hw
, u8
*mac
)
2244 struct mwl8k_priv
*priv
= hw
->priv
;
2245 struct mwl8k_cmd_set_mac_addr
*cmd
;
2248 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2252 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR
);
2253 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2255 cmd
->mbss
.mac_type
= 0;
2256 memcpy(cmd
->mbss
.mac_addr
, mac
, ETH_ALEN
);
2258 memcpy(cmd
->mac_addr
, mac
, ETH_ALEN
);
2261 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2269 * CMD_SET_RATEADAPT_MODE.
2271 struct mwl8k_cmd_set_rate_adapt_mode
{
2272 struct mwl8k_cmd_pkt header
;
2275 } __attribute__((packed
));
2277 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
2279 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
2282 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2286 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
2287 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2288 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2289 cmd
->mode
= cpu_to_le16(mode
);
2291 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2300 struct mwl8k_cmd_set_wmm
{
2301 struct mwl8k_cmd_pkt header
;
2303 } __attribute__((packed
));
2305 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
2307 struct mwl8k_priv
*priv
= hw
->priv
;
2308 struct mwl8k_cmd_set_wmm
*cmd
;
2311 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2315 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
2316 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2317 cmd
->action
= cpu_to_le16(!!enable
);
2319 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2323 priv
->wmm_enabled
= enable
;
2329 * CMD_SET_RTS_THRESHOLD.
2331 struct mwl8k_cmd_rts_threshold
{
2332 struct mwl8k_cmd_pkt header
;
2335 } __attribute__((packed
));
2337 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
2338 u16 action
, u16 threshold
)
2340 struct mwl8k_cmd_rts_threshold
*cmd
;
2343 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2347 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
2348 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2349 cmd
->action
= cpu_to_le16(action
);
2350 cmd
->threshold
= cpu_to_le16(threshold
);
2352 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2359 * CMD_SET_EDCA_PARAMS.
2361 struct mwl8k_cmd_set_edca_params
{
2362 struct mwl8k_cmd_pkt header
;
2364 /* See MWL8K_SET_EDCA_XXX below */
2367 /* TX opportunity in units of 32 us */
2372 /* Log exponent of max contention period: 0...15 */
2375 /* Log exponent of min contention period: 0...15 */
2378 /* Adaptive interframe spacing in units of 32us */
2381 /* TX queue to configure */
2385 /* Log exponent of max contention period: 0...15 */
2388 /* Log exponent of min contention period: 0...15 */
2391 /* Adaptive interframe spacing in units of 32us */
2394 /* TX queue to configure */
2398 } __attribute__((packed
));
2400 #define MWL8K_SET_EDCA_CW 0x01
2401 #define MWL8K_SET_EDCA_TXOP 0x02
2402 #define MWL8K_SET_EDCA_AIFS 0x04
2404 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2405 MWL8K_SET_EDCA_TXOP | \
2406 MWL8K_SET_EDCA_AIFS)
2409 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2410 __u16 cw_min
, __u16 cw_max
,
2411 __u8 aifs
, __u16 txop
)
2413 struct mwl8k_priv
*priv
= hw
->priv
;
2414 struct mwl8k_cmd_set_edca_params
*cmd
;
2417 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2422 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2425 qnum
^= !(qnum
>> 1);
2427 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2428 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2429 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2430 cmd
->txop
= cpu_to_le16(txop
);
2432 cmd
->ap
.log_cw_max
= cpu_to_le32(ilog2(cw_max
+ 1));
2433 cmd
->ap
.log_cw_min
= cpu_to_le32(ilog2(cw_min
+ 1));
2434 cmd
->ap
.aifs
= aifs
;
2437 cmd
->sta
.log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2438 cmd
->sta
.log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2439 cmd
->sta
.aifs
= aifs
;
2440 cmd
->sta
.txq
= qnum
;
2443 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2450 * CMD_FINALIZE_JOIN.
2453 /* FJ beacon buffer size is compiled into the firmware. */
2454 #define MWL8K_FJ_BEACON_MAXLEN 128
2456 struct mwl8k_cmd_finalize_join
{
2457 struct mwl8k_cmd_pkt header
;
2458 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2459 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2460 } __attribute__((packed
));
2462 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2463 __u16 framelen
, __u16 dtim
)
2465 struct mwl8k_cmd_finalize_join
*cmd
;
2466 struct ieee80211_mgmt
*payload
= frame
;
2474 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2478 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2479 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2480 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2482 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2484 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2486 /* XXX TBD Might just have to abort and return an error */
2487 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2488 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2489 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2490 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2492 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2493 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2495 if (payload
&& payload_len
)
2496 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2498 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2506 struct mwl8k_cmd_update_sta_db
{
2507 struct mwl8k_cmd_pkt header
;
2509 /* See STADB_ACTION_TYPE */
2512 /* Peer MAC address */
2513 __u8 peer_addr
[ETH_ALEN
];
2517 /* Peer info - valid during add/update. */
2518 struct peer_capability_info peer_info
;
2519 } __attribute__((packed
));
2521 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2522 struct ieee80211_vif
*vif
, __u32 action
)
2524 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2525 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2526 struct mwl8k_cmd_update_sta_db
*cmd
;
2527 struct peer_capability_info
*peer_info
;
2530 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2534 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2535 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2537 cmd
->action
= cpu_to_le32(action
);
2538 peer_info
= &cmd
->peer_info
;
2539 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2542 case MWL8K_STA_DB_ADD_ENTRY
:
2543 case MWL8K_STA_DB_MODIFY_ENTRY
:
2544 /* Build peer_info block */
2545 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2546 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2547 memcpy(peer_info
->legacy_rates
, mwl8k_rateids
,
2548 sizeof(mwl8k_rateids
));
2549 peer_info
->interop
= 1;
2550 peer_info
->amsdu_enabled
= 0;
2552 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2554 mv_vif
->peer_id
= peer_info
->station_id
;
2558 case MWL8K_STA_DB_DEL_ENTRY
:
2559 case MWL8K_STA_DB_FLUSH
:
2561 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2563 mv_vif
->peer_id
= 0;
2574 #define MWL8K_FRAME_PROT_DISABLED 0x00
2575 #define MWL8K_FRAME_PROT_11G 0x07
2576 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2577 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2579 struct mwl8k_cmd_update_set_aid
{
2580 struct mwl8k_cmd_pkt header
;
2583 /* AP's MAC address (BSSID) */
2584 __u8 bssid
[ETH_ALEN
];
2585 __le16 protection_mode
;
2586 __u8 supp_rates
[14];
2587 } __attribute__((packed
));
2589 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2590 struct ieee80211_vif
*vif
)
2592 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2593 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2594 struct mwl8k_cmd_update_set_aid
*cmd
;
2598 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2602 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2603 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2604 cmd
->aid
= cpu_to_le16(info
->aid
);
2606 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2608 if (info
->use_cts_prot
) {
2609 prot_mode
= MWL8K_FRAME_PROT_11G
;
2611 switch (info
->ht_operation_mode
&
2612 IEEE80211_HT_OP_MODE_PROTECTION
) {
2613 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2614 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2616 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2617 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2620 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2624 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2626 memcpy(cmd
->supp_rates
, mwl8k_rateids
, sizeof(mwl8k_rateids
));
2628 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2637 struct mwl8k_cmd_update_rateset
{
2638 struct mwl8k_cmd_pkt header
;
2639 __u8 legacy_rates
[14];
2641 /* Bitmap for supported MCS codes. */
2644 } __attribute__((packed
));
2646 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2647 struct ieee80211_vif
*vif
)
2649 struct mwl8k_cmd_update_rateset
*cmd
;
2652 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2656 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2657 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2658 memcpy(cmd
->legacy_rates
, mwl8k_rateids
, sizeof(mwl8k_rateids
));
2660 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2667 * CMD_USE_FIXED_RATE.
2669 #define MWL8K_RATE_TABLE_SIZE 8
2670 #define MWL8K_UCAST_RATE 0
2671 #define MWL8K_USE_AUTO_RATE 0x0002
2673 struct mwl8k_rate_entry
{
2674 /* Set to 1 if HT rate, 0 if legacy. */
2677 /* Set to 1 to use retry_count field. */
2678 __le32 enable_retry
;
2680 /* Specified legacy rate or MCS. */
2683 /* Number of allowed retries. */
2685 } __attribute__((packed
));
2687 struct mwl8k_rate_table
{
2688 /* 1 to allow specified rate and below */
2689 __le32 allow_rate_drop
;
2691 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2692 } __attribute__((packed
));
2694 struct mwl8k_cmd_use_fixed_rate
{
2695 struct mwl8k_cmd_pkt header
;
2697 struct mwl8k_rate_table rate_table
;
2699 /* Unicast, Broadcast or Multicast */
2703 } __attribute__((packed
));
2705 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2706 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2708 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2712 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2716 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2717 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2719 cmd
->action
= cpu_to_le32(action
);
2720 cmd
->rate_type
= cpu_to_le32(rate_type
);
2722 if (rate_table
!= NULL
) {
2724 * Copy over each field manually so that endian
2725 * conversion can be done.
2727 cmd
->rate_table
.allow_rate_drop
=
2728 cpu_to_le32(rate_table
->allow_rate_drop
);
2729 cmd
->rate_table
.num_rates
=
2730 cpu_to_le32(rate_table
->num_rates
);
2732 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2733 struct mwl8k_rate_entry
*dst
=
2734 &cmd
->rate_table
.rate_entry
[count
];
2735 struct mwl8k_rate_entry
*src
=
2736 &rate_table
->rate_entry
[count
];
2738 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2739 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2740 dst
->rate
= cpu_to_le32(src
->rate
);
2741 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2745 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2753 * Interrupt handling.
2755 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2757 struct ieee80211_hw
*hw
= dev_id
;
2758 struct mwl8k_priv
*priv
= hw
->priv
;
2761 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2762 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2767 if (status
& MWL8K_A2H_INT_TX_DONE
)
2768 tasklet_schedule(&priv
->tx_reclaim_task
);
2770 if (status
& MWL8K_A2H_INT_RX_READY
) {
2771 while (rxq_process(hw
, 0, 1))
2772 rxq_refill(hw
, 0, 1);
2775 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2776 if (priv
->hostcmd_wait
!= NULL
)
2777 complete(priv
->hostcmd_wait
);
2780 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2781 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2782 priv
->radio_on
&& priv
->pending_tx_pkts
)
2783 mwl8k_tx_start(priv
);
2791 * Core driver operations.
2793 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2795 struct mwl8k_priv
*priv
= hw
->priv
;
2796 int index
= skb_get_queue_mapping(skb
);
2799 if (priv
->current_channel
== NULL
) {
2800 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2801 "disabled\n", wiphy_name(hw
->wiphy
));
2803 return NETDEV_TX_OK
;
2806 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2811 static int mwl8k_start(struct ieee80211_hw
*hw
)
2813 struct mwl8k_priv
*priv
= hw
->priv
;
2816 rc
= request_irq(priv
->pdev
->irq
, mwl8k_interrupt
,
2817 IRQF_SHARED
, MWL8K_NAME
, hw
);
2819 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2820 wiphy_name(hw
->wiphy
));
2824 /* Enable tx reclaim tasklet */
2825 tasklet_enable(&priv
->tx_reclaim_task
);
2827 /* Enable interrupts */
2828 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2830 rc
= mwl8k_fw_lock(hw
);
2832 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2836 rc
= mwl8k_enable_sniffer(hw
, 0);
2839 rc
= mwl8k_cmd_set_pre_scan(hw
);
2842 rc
= mwl8k_cmd_set_post_scan(hw
,
2843 "\x00\x00\x00\x00\x00\x00");
2847 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2850 rc
= mwl8k_set_wmm(hw
, 0);
2852 mwl8k_fw_unlock(hw
);
2856 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2857 free_irq(priv
->pdev
->irq
, hw
);
2858 tasklet_disable(&priv
->tx_reclaim_task
);
2864 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2866 struct mwl8k_priv
*priv
= hw
->priv
;
2869 mwl8k_cmd_802_11_radio_disable(hw
);
2871 ieee80211_stop_queues(hw
);
2873 /* Disable interrupts */
2874 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2875 free_irq(priv
->pdev
->irq
, hw
);
2877 /* Stop finalize join worker */
2878 cancel_work_sync(&priv
->finalize_join_worker
);
2879 if (priv
->beacon_skb
!= NULL
)
2880 dev_kfree_skb(priv
->beacon_skb
);
2882 /* Stop tx reclaim tasklet */
2883 tasklet_disable(&priv
->tx_reclaim_task
);
2885 /* Return all skbs to mac80211 */
2886 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2887 mwl8k_txq_reclaim(hw
, i
, 1);
2890 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2891 struct ieee80211_if_init_conf
*conf
)
2893 struct mwl8k_priv
*priv
= hw
->priv
;
2894 struct mwl8k_vif
*mwl8k_vif
;
2897 * We only support one active interface at a time.
2899 if (priv
->vif
!= NULL
)
2903 * We only support managed interfaces for now.
2905 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2909 * Reject interface creation if sniffer mode is active, as
2910 * STA operation is mutually exclusive with hardware sniffer
2913 if (priv
->sniffer_enabled
) {
2914 printk(KERN_INFO
"%s: unable to create STA "
2915 "interface due to sniffer mode being enabled\n",
2916 wiphy_name(hw
->wiphy
));
2920 /* Clean out driver private area */
2921 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2922 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2924 /* Set and save the mac address */
2925 mwl8k_set_mac_addr(hw
, conf
->mac_addr
);
2926 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2928 /* Back pointer to parent config block */
2929 mwl8k_vif
->priv
= priv
;
2931 /* Set Initial sequence number to zero */
2932 mwl8k_vif
->seqno
= 0;
2934 priv
->vif
= conf
->vif
;
2935 priv
->current_channel
= NULL
;
2940 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2941 struct ieee80211_if_init_conf
*conf
)
2943 struct mwl8k_priv
*priv
= hw
->priv
;
2945 if (priv
->vif
== NULL
)
2948 mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
2953 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2955 struct ieee80211_conf
*conf
= &hw
->conf
;
2956 struct mwl8k_priv
*priv
= hw
->priv
;
2959 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2960 mwl8k_cmd_802_11_radio_disable(hw
);
2961 priv
->current_channel
= NULL
;
2965 rc
= mwl8k_fw_lock(hw
);
2969 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2973 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2977 priv
->current_channel
= conf
->channel
;
2979 if (conf
->power_level
> 18)
2980 conf
->power_level
= 18;
2981 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2986 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_RX
, 0x7);
2988 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_TX
, 0x7);
2990 rc
= mwl8k_cmd_mimo_config(hw
, 0x7, 0x7);
2994 mwl8k_fw_unlock(hw
);
2999 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
3000 struct ieee80211_vif
*vif
,
3001 struct ieee80211_bss_conf
*info
,
3004 struct mwl8k_priv
*priv
= hw
->priv
;
3005 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
3008 if (changed
& BSS_CHANGED_BSSID
)
3009 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
3011 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
3014 priv
->capture_beacon
= false;
3016 rc
= mwl8k_fw_lock(hw
);
3021 memcpy(&mwl8k_vif
->bss_info
, info
,
3022 sizeof(struct ieee80211_bss_conf
));
3025 rc
= mwl8k_update_rateset(hw
, vif
);
3029 /* Turn on rate adaptation */
3030 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
3031 MWL8K_UCAST_RATE
, NULL
);
3035 /* Set radio preamble */
3036 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
3041 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
3045 /* Update peer rate info */
3046 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
3047 MWL8K_STA_DB_MODIFY_ENTRY
);
3052 rc
= mwl8k_cmd_set_aid(hw
, vif
);
3057 * Finalize the join. Tell rx handler to process
3058 * next beacon from our BSSID.
3060 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
3061 priv
->capture_beacon
= true;
3063 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
3064 memset(&mwl8k_vif
->bss_info
, 0,
3065 sizeof(struct ieee80211_bss_conf
));
3066 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
3070 mwl8k_fw_unlock(hw
);
3073 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
3074 int mc_count
, struct dev_addr_list
*mclist
)
3076 struct mwl8k_cmd_pkt
*cmd
;
3079 * Synthesize and return a command packet that programs the
3080 * hardware multicast address filter. At this point we don't
3081 * know whether FIF_ALLMULTI is being requested, but if it is,
3082 * we'll end up throwing this packet away and creating a new
3083 * one in mwl8k_configure_filter().
3085 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 0, mc_count
, mclist
);
3087 return (unsigned long)cmd
;
3091 mwl8k_configure_filter_sniffer(struct ieee80211_hw
*hw
,
3092 unsigned int changed_flags
,
3093 unsigned int *total_flags
)
3095 struct mwl8k_priv
*priv
= hw
->priv
;
3098 * Hardware sniffer mode is mutually exclusive with STA
3099 * operation, so refuse to enable sniffer mode if a STA
3100 * interface is active.
3102 if (priv
->vif
!= NULL
) {
3103 if (net_ratelimit())
3104 printk(KERN_INFO
"%s: not enabling sniffer "
3105 "mode because STA interface is active\n",
3106 wiphy_name(hw
->wiphy
));
3110 if (!priv
->sniffer_enabled
) {
3111 if (mwl8k_enable_sniffer(hw
, 1))
3113 priv
->sniffer_enabled
= true;
3116 *total_flags
&= FIF_PROMISC_IN_BSS
| FIF_ALLMULTI
|
3117 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
|
3123 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
3124 unsigned int changed_flags
,
3125 unsigned int *total_flags
,
3128 struct mwl8k_priv
*priv
= hw
->priv
;
3129 struct mwl8k_cmd_pkt
*cmd
= (void *)(unsigned long)multicast
;
3132 * AP firmware doesn't allow fine-grained control over
3133 * the receive filter.
3136 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3142 * Enable hardware sniffer mode if FIF_CONTROL or
3143 * FIF_OTHER_BSS is requested.
3145 if (*total_flags
& (FIF_CONTROL
| FIF_OTHER_BSS
) &&
3146 mwl8k_configure_filter_sniffer(hw
, changed_flags
, total_flags
)) {
3151 /* Clear unsupported feature flags */
3152 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3154 if (mwl8k_fw_lock(hw
))
3157 if (priv
->sniffer_enabled
) {
3158 mwl8k_enable_sniffer(hw
, 0);
3159 priv
->sniffer_enabled
= false;
3162 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3163 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3165 * Disable the BSS filter.
3167 mwl8k_cmd_set_pre_scan(hw
);
3172 * Enable the BSS filter.
3174 * If there is an active STA interface, use that
3175 * interface's BSSID, otherwise use a dummy one
3176 * (where the OUI part needs to be nonzero for
3177 * the BSSID to be accepted by POST_SCAN).
3179 bssid
= "\x01\x00\x00\x00\x00\x00";
3180 if (priv
->vif
!= NULL
)
3181 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
3183 mwl8k_cmd_set_post_scan(hw
, bssid
);
3188 * If FIF_ALLMULTI is being requested, throw away the command
3189 * packet that ->prepare_multicast() built and replace it with
3190 * a command packet that enables reception of all multicast
3193 if (*total_flags
& FIF_ALLMULTI
) {
3195 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 1, 0, NULL
);
3199 mwl8k_post_cmd(hw
, cmd
);
3203 mwl8k_fw_unlock(hw
);
3206 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
3208 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
3211 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
3212 const struct ieee80211_tx_queue_params
*params
)
3214 struct mwl8k_priv
*priv
= hw
->priv
;
3217 rc
= mwl8k_fw_lock(hw
);
3219 if (!priv
->wmm_enabled
)
3220 rc
= mwl8k_set_wmm(hw
, 1);
3223 rc
= mwl8k_set_edca_params(hw
, queue
,
3229 mwl8k_fw_unlock(hw
);
3235 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
3236 struct ieee80211_tx_queue_stats
*stats
)
3238 struct mwl8k_priv
*priv
= hw
->priv
;
3239 struct mwl8k_tx_queue
*txq
;
3242 spin_lock_bh(&priv
->tx_lock
);
3243 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
3244 txq
= priv
->txq
+ index
;
3245 memcpy(&stats
[index
], &txq
->stats
,
3246 sizeof(struct ieee80211_tx_queue_stats
));
3248 spin_unlock_bh(&priv
->tx_lock
);
3253 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
3254 struct ieee80211_low_level_stats
*stats
)
3256 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
3259 static const struct ieee80211_ops mwl8k_ops
= {
3261 .start
= mwl8k_start
,
3263 .add_interface
= mwl8k_add_interface
,
3264 .remove_interface
= mwl8k_remove_interface
,
3265 .config
= mwl8k_config
,
3266 .bss_info_changed
= mwl8k_bss_info_changed
,
3267 .prepare_multicast
= mwl8k_prepare_multicast
,
3268 .configure_filter
= mwl8k_configure_filter
,
3269 .set_rts_threshold
= mwl8k_set_rts_threshold
,
3270 .conf_tx
= mwl8k_conf_tx
,
3271 .get_tx_stats
= mwl8k_get_tx_stats
,
3272 .get_stats
= mwl8k_get_stats
,
3275 static void mwl8k_tx_reclaim_handler(unsigned long data
)
3278 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
3279 struct mwl8k_priv
*priv
= hw
->priv
;
3281 spin_lock_bh(&priv
->tx_lock
);
3282 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3283 mwl8k_txq_reclaim(hw
, i
, 0);
3285 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
3286 complete(priv
->tx_wait
);
3287 priv
->tx_wait
= NULL
;
3289 spin_unlock_bh(&priv
->tx_lock
);
3292 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
3294 struct mwl8k_priv
*priv
=
3295 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
3296 struct sk_buff
*skb
= priv
->beacon_skb
;
3297 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
3299 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
3302 priv
->beacon_skb
= NULL
;
3310 static struct mwl8k_device_info mwl8k_info_tbl
[] __devinitdata
= {
3312 .part_name
= "88w8687",
3313 .helper_image
= "mwl8k/helper_8687.fw",
3314 .fw_image
= "mwl8k/fmimage_8687.fw",
3315 .rxd_ops
= &rxd_8687_ops
,
3316 .modes
= BIT(NL80211_IFTYPE_STATION
),
3319 .part_name
= "88w8366",
3320 .helper_image
= "mwl8k/helper_8366.fw",
3321 .fw_image
= "mwl8k/fmimage_8366.fw",
3322 .rxd_ops
= &rxd_8366_ops
,
3327 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table
) = {
3328 { PCI_VDEVICE(MARVELL
, 0x2a2b), .driver_data
= MWL8687
, },
3329 { PCI_VDEVICE(MARVELL
, 0x2a30), .driver_data
= MWL8687
, },
3330 { PCI_VDEVICE(MARVELL
, 0x2a40), .driver_data
= MWL8366
, },
3333 MODULE_DEVICE_TABLE(pci
, mwl8k_pci_id_table
);
3335 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
3336 const struct pci_device_id
*id
)
3338 static int printed_version
= 0;
3339 struct ieee80211_hw
*hw
;
3340 struct mwl8k_priv
*priv
;
3344 if (!printed_version
) {
3345 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
3346 printed_version
= 1;
3349 rc
= pci_enable_device(pdev
);
3351 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
3356 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
3358 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
3363 pci_set_master(pdev
);
3365 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
3367 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
3375 priv
->device_info
= &mwl8k_info_tbl
[id
->driver_data
];
3376 priv
->rxd_ops
= priv
->device_info
->rxd_ops
;
3377 priv
->sniffer_enabled
= false;
3378 priv
->wmm_enabled
= false;
3379 priv
->pending_tx_pkts
= 0;
3381 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
3382 pci_set_drvdata(pdev
, hw
);
3384 priv
->sram
= pci_iomap(pdev
, 0, 0x10000);
3385 if (priv
->sram
== NULL
) {
3386 printk(KERN_ERR
"%s: Cannot map device SRAM\n",
3387 wiphy_name(hw
->wiphy
));
3392 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3393 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3395 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
3396 if (priv
->regs
== NULL
) {
3397 priv
->regs
= pci_iomap(pdev
, 2, 0x10000);
3398 if (priv
->regs
== NULL
) {
3399 printk(KERN_ERR
"%s: Cannot map device registers\n",
3400 wiphy_name(hw
->wiphy
));
3405 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
3406 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
3407 priv
->band
.channels
= priv
->channels
;
3408 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
3409 priv
->band
.bitrates
= priv
->rates
;
3410 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
3411 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
3413 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
3414 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
3417 * Extra headroom is the size of the required DMA header
3418 * minus the size of the smallest 802.11 frame (CTS frame).
3420 hw
->extra_tx_headroom
=
3421 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
3423 hw
->channel_change_time
= 10;
3425 hw
->queues
= MWL8K_TX_QUEUES
;
3427 hw
->wiphy
->interface_modes
= priv
->device_info
->modes
;
3429 /* Set rssi and noise values to dBm */
3430 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
3431 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
3434 /* Set default radio state and preamble */
3436 priv
->radio_short_preamble
= 0;
3438 /* Finalize join worker */
3439 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
3441 /* TX reclaim tasklet */
3442 tasklet_init(&priv
->tx_reclaim_task
,
3443 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
3444 tasklet_disable(&priv
->tx_reclaim_task
);
3446 /* Power management cookie */
3447 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
3448 if (priv
->cookie
== NULL
)
3451 rc
= mwl8k_rxq_init(hw
, 0);
3454 rxq_refill(hw
, 0, INT_MAX
);
3456 mutex_init(&priv
->fw_mutex
);
3457 priv
->fw_mutex_owner
= NULL
;
3458 priv
->fw_mutex_depth
= 0;
3459 priv
->hostcmd_wait
= NULL
;
3461 spin_lock_init(&priv
->tx_lock
);
3463 priv
->tx_wait
= NULL
;
3465 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
3466 rc
= mwl8k_txq_init(hw
, i
);
3468 goto err_free_queues
;
3471 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
3472 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3473 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
3474 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
3476 rc
= request_irq(priv
->pdev
->irq
, mwl8k_interrupt
,
3477 IRQF_SHARED
, MWL8K_NAME
, hw
);
3479 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
3480 wiphy_name(hw
->wiphy
));
3481 goto err_free_queues
;
3484 /* Reset firmware and hardware */
3485 mwl8k_hw_reset(priv
);
3487 /* Ask userland hotplug daemon for the device firmware */
3488 rc
= mwl8k_request_firmware(priv
);
3490 printk(KERN_ERR
"%s: Firmware files not found\n",
3491 wiphy_name(hw
->wiphy
));
3495 /* Load firmware into hardware */
3496 rc
= mwl8k_load_firmware(hw
);
3498 printk(KERN_ERR
"%s: Cannot start firmware\n",
3499 wiphy_name(hw
->wiphy
));
3500 goto err_stop_firmware
;
3503 /* Reclaim memory once firmware is successfully loaded */
3504 mwl8k_release_firmware(priv
);
3507 * Temporarily enable interrupts. Initial firmware host
3508 * commands use interrupts and avoids polling. Disable
3509 * interrupts when done.
3511 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3513 /* Get config data, mac addrs etc */
3515 rc
= mwl8k_cmd_get_hw_spec_ap(hw
);
3517 rc
= mwl8k_cmd_set_hw_spec(hw
);
3519 rc
= mwl8k_cmd_get_hw_spec_sta(hw
);
3522 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
3523 wiphy_name(hw
->wiphy
));
3524 goto err_stop_firmware
;
3527 /* Turn radio off */
3528 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3530 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3531 goto err_stop_firmware
;
3534 /* Clear MAC address */
3535 rc
= mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
3537 printk(KERN_ERR
"%s: Cannot clear MAC address\n",
3538 wiphy_name(hw
->wiphy
));
3539 goto err_stop_firmware
;
3542 /* Disable interrupts */
3543 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3544 free_irq(priv
->pdev
->irq
, hw
);
3546 rc
= ieee80211_register_hw(hw
);
3548 printk(KERN_ERR
"%s: Cannot register device\n",
3549 wiphy_name(hw
->wiphy
));
3550 goto err_stop_firmware
;
3553 printk(KERN_INFO
"%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3554 wiphy_name(hw
->wiphy
), priv
->device_info
->part_name
,
3555 priv
->hw_rev
, hw
->wiphy
->perm_addr
,
3556 priv
->ap_fw
? "AP" : "STA",
3557 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3558 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3563 mwl8k_hw_reset(priv
);
3564 mwl8k_release_firmware(priv
);
3567 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3568 free_irq(priv
->pdev
->irq
, hw
);
3571 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3572 mwl8k_txq_deinit(hw
, i
);
3573 mwl8k_rxq_deinit(hw
, 0);
3576 if (priv
->cookie
!= NULL
)
3577 pci_free_consistent(priv
->pdev
, 4,
3578 priv
->cookie
, priv
->cookie_dma
);
3580 if (priv
->regs
!= NULL
)
3581 pci_iounmap(pdev
, priv
->regs
);
3583 if (priv
->sram
!= NULL
)
3584 pci_iounmap(pdev
, priv
->sram
);
3586 pci_set_drvdata(pdev
, NULL
);
3587 ieee80211_free_hw(hw
);
3590 pci_release_regions(pdev
);
3591 pci_disable_device(pdev
);
3596 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3598 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3601 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3603 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3604 struct mwl8k_priv
*priv
;
3611 ieee80211_stop_queues(hw
);
3613 ieee80211_unregister_hw(hw
);
3615 /* Remove tx reclaim tasklet */
3616 tasklet_kill(&priv
->tx_reclaim_task
);
3619 mwl8k_hw_reset(priv
);
3621 /* Return all skbs to mac80211 */
3622 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3623 mwl8k_txq_reclaim(hw
, i
, 1);
3625 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3626 mwl8k_txq_deinit(hw
, i
);
3628 mwl8k_rxq_deinit(hw
, 0);
3630 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3632 pci_iounmap(pdev
, priv
->regs
);
3633 pci_iounmap(pdev
, priv
->sram
);
3634 pci_set_drvdata(pdev
, NULL
);
3635 ieee80211_free_hw(hw
);
3636 pci_release_regions(pdev
);
3637 pci_disable_device(pdev
);
3640 static struct pci_driver mwl8k_driver
= {
3642 .id_table
= mwl8k_pci_id_table
,
3643 .probe
= mwl8k_probe
,
3644 .remove
= __devexit_p(mwl8k_remove
),
3645 .shutdown
= __devexit_p(mwl8k_shutdown
),
3648 static int __init
mwl8k_init(void)
3650 return pci_register_driver(&mwl8k_driver
);
3653 static void __exit
mwl8k_exit(void)
3655 pci_unregister_driver(&mwl8k_driver
);
3658 module_init(mwl8k_init
);
3659 module_exit(mwl8k_exit
);
3661 MODULE_DESCRIPTION(MWL8K_DESC
);
3662 MODULE_VERSION(MWL8K_VERSION
);
3663 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3664 MODULE_LICENSE("GPL");