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[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
25
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.9.1"
29
30 MODULE_DESCRIPTION(MWL8K_DESC);
31 MODULE_VERSION(MWL8K_VERSION);
32 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
33 MODULE_LICENSE("GPL");
34
35 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
36 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
37 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
38 { }
39 };
40 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41
42 /* Register definitions */
43 #define MWL8K_HIU_GEN_PTR 0x00000c10
44 #define MWL8K_MODE_STA 0x0000005a
45 #define MWL8K_MODE_AP 0x000000a5
46 #define MWL8K_HIU_INT_CODE 0x00000c14
47 #define MWL8K_FWSTA_READY 0xf0f1f2f4
48 #define MWL8K_FWAP_READY 0xf1f2f4a5
49 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
50 #define MWL8K_HIU_SCRATCH 0x00000c40
51
52 /* Host->device communications */
53 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
54 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
55 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
56 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
57 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
58 #define MWL8K_H2A_INT_DUMMY (1 << 20)
59 #define MWL8K_H2A_INT_RESET (1 << 15)
60 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
61 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
62
63 /* Device->host communications */
64 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
65 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
66 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
67 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
68 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
69 #define MWL8K_A2H_INT_DUMMY (1 << 20)
70 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
71 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
72 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
73 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
74 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
75 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
76 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
77 #define MWL8K_A2H_INT_RX_READY (1 << 1)
78 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
79
80 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
81 MWL8K_A2H_INT_CHNL_SWITCHED | \
82 MWL8K_A2H_INT_QUEUE_EMPTY | \
83 MWL8K_A2H_INT_RADAR_DETECT | \
84 MWL8K_A2H_INT_RADIO_ON | \
85 MWL8K_A2H_INT_RADIO_OFF | \
86 MWL8K_A2H_INT_MAC_EVENT | \
87 MWL8K_A2H_INT_OPC_DONE | \
88 MWL8K_A2H_INT_RX_READY | \
89 MWL8K_A2H_INT_TX_DONE)
90
91 /* WME stream classes */
92 #define WME_AC_BE 0 /* best effort */
93 #define WME_AC_BK 1 /* background */
94 #define WME_AC_VI 2 /* video */
95 #define WME_AC_VO 3 /* voice */
96
97 #define MWL8K_RX_QUEUES 1
98 #define MWL8K_TX_QUEUES 4
99
100 struct mwl8k_rx_queue {
101 int rx_desc_count;
102
103 /* hw receives here */
104 int rx_head;
105
106 /* refill descs here */
107 int rx_tail;
108
109 struct mwl8k_rx_desc *rx_desc_area;
110 dma_addr_t rx_desc_dma;
111 struct sk_buff **rx_skb;
112 };
113
114 struct mwl8k_skb {
115 /*
116 * The DMA engine requires a modification to the payload.
117 * If the skbuff is shared/cloned, it needs to be unshared.
118 * This method is used to ensure the stack always gets back
119 * the skbuff it sent for transmission.
120 */
121 struct sk_buff *clone;
122 struct sk_buff *skb;
123 };
124
125 struct mwl8k_tx_queue {
126 /* hw transmits here */
127 int tx_head;
128
129 /* sw appends here */
130 int tx_tail;
131
132 struct ieee80211_tx_queue_stats tx_stats;
133 struct mwl8k_tx_desc *tx_desc_area;
134 dma_addr_t tx_desc_dma;
135 struct mwl8k_skb *tx_skb;
136 };
137
138 /* Pointers to the firmware data and meta information about it. */
139 struct mwl8k_firmware {
140 /* Microcode */
141 struct firmware *ucode;
142
143 /* Boot helper code */
144 struct firmware *helper;
145 };
146
147 struct mwl8k_priv {
148 void __iomem *regs;
149 struct ieee80211_hw *hw;
150
151 struct pci_dev *pdev;
152 u8 name[16];
153 /* firmware access lock */
154 spinlock_t fw_lock;
155
156 /* firmware files and meta data */
157 struct mwl8k_firmware fw;
158 u32 part_num;
159
160 /* lock held over TX and TX reap */
161 spinlock_t tx_lock;
162
163 struct ieee80211_vif *vif;
164
165 struct ieee80211_channel *current_channel;
166
167 /* power management status cookie from firmware */
168 u32 *cookie;
169 dma_addr_t cookie_dma;
170
171 u16 num_mcaddrs;
172 u8 hw_rev;
173 __le32 fw_rev;
174
175 /*
176 * Running count of TX packets in flight, to avoid
177 * iterating over the transmit rings each time.
178 */
179 int pending_tx_pkts;
180
181 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
182 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
183
184 /* PHY parameters */
185 struct ieee80211_supported_band band;
186 struct ieee80211_channel channels[14];
187 struct ieee80211_rate rates[12];
188
189 /* RF preamble: Short, Long or Auto */
190 u8 radio_preamble;
191 u8 radio_state;
192
193 /* WMM MODE 1 for enabled; 0 for disabled */
194 bool wmm_mode;
195
196 /* Set if PHY config is in progress */
197 bool inconfig;
198
199 /* XXX need to convert this to handle multiple interfaces */
200 bool capture_beacon;
201 u8 capture_bssid[ETH_ALEN];
202 struct sk_buff *beacon_skb;
203
204 /*
205 * This FJ worker has to be global as it is scheduled from the
206 * RX handler. At this point we don't know which interface it
207 * belongs to until the list of bssids waiting to complete join
208 * is checked.
209 */
210 struct work_struct finalize_join_worker;
211
212 /* Tasklet to reclaim TX descriptors and buffers after tx */
213 struct tasklet_struct tx_reclaim_task;
214
215 /* Work thread to serialize configuration requests */
216 struct workqueue_struct *config_wq;
217 struct completion *hostcmd_wait;
218 struct completion *tx_wait;
219 };
220
221 /* Per interface specific private data */
222 struct mwl8k_vif {
223 /* backpointer to parent config block */
224 struct mwl8k_priv *priv;
225
226 /* BSS config of AP or IBSS from mac80211*/
227 struct ieee80211_bss_conf bss_info;
228
229 /* BSSID of AP or IBSS */
230 u8 bssid[ETH_ALEN];
231 u8 mac_addr[ETH_ALEN];
232
233 /*
234 * Subset of supported legacy rates.
235 * Intersection of AP and STA supported rates.
236 */
237 struct ieee80211_rate legacy_rates[12];
238
239 /* number of supported legacy rates */
240 u8 legacy_nrates;
241
242 /* Index into station database.Returned by update_sta_db call */
243 u8 peer_id;
244
245 /* Non AMPDU sequence number assigned by driver */
246 u16 seqno;
247 };
248
249 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
250
251 static const struct ieee80211_channel mwl8k_channels[] = {
252 { .center_freq = 2412, .hw_value = 1, },
253 { .center_freq = 2417, .hw_value = 2, },
254 { .center_freq = 2422, .hw_value = 3, },
255 { .center_freq = 2427, .hw_value = 4, },
256 { .center_freq = 2432, .hw_value = 5, },
257 { .center_freq = 2437, .hw_value = 6, },
258 { .center_freq = 2442, .hw_value = 7, },
259 { .center_freq = 2447, .hw_value = 8, },
260 { .center_freq = 2452, .hw_value = 9, },
261 { .center_freq = 2457, .hw_value = 10, },
262 { .center_freq = 2462, .hw_value = 11, },
263 };
264
265 static const struct ieee80211_rate mwl8k_rates[] = {
266 { .bitrate = 10, .hw_value = 2, },
267 { .bitrate = 20, .hw_value = 4, },
268 { .bitrate = 55, .hw_value = 11, },
269 { .bitrate = 60, .hw_value = 12, },
270 { .bitrate = 90, .hw_value = 18, },
271 { .bitrate = 110, .hw_value = 22, },
272 { .bitrate = 120, .hw_value = 24, },
273 { .bitrate = 180, .hw_value = 36, },
274 { .bitrate = 240, .hw_value = 48, },
275 { .bitrate = 360, .hw_value = 72, },
276 { .bitrate = 480, .hw_value = 96, },
277 { .bitrate = 540, .hw_value = 108, },
278 };
279
280 /* Radio settings */
281 #define MWL8K_RADIO_FORCE 0x2
282 #define MWL8K_RADIO_ENABLE 0x1
283 #define MWL8K_RADIO_DISABLE 0x0
284 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
285 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
286 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
287
288 /* WMM */
289 #define MWL8K_WMM_ENABLE 1
290 #define MWL8K_WMM_DISABLE 0
291
292 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
293
294 /* Slot time */
295
296 /* Short Slot: 9us slot time */
297 #define MWL8K_SHORT_SLOTTIME 1
298
299 /* Long slot: 20us slot time */
300 #define MWL8K_LONG_SLOTTIME 0
301
302 /* Set or get info from Firmware */
303 #define MWL8K_CMD_SET 0x0001
304 #define MWL8K_CMD_GET 0x0000
305
306 /* Firmware command codes */
307 #define MWL8K_CMD_CODE_DNLD 0x0001
308 #define MWL8K_CMD_GET_HW_SPEC 0x0003
309 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
310 #define MWL8K_CMD_GET_STAT 0x0014
311 #define MWL8K_CMD_RADIO_CONTROL 0x001c
312 #define MWL8K_CMD_RF_TX_POWER 0x001e
313 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
314 #define MWL8K_CMD_SET_POST_SCAN 0x0108
315 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
316 #define MWL8K_CMD_SET_AID 0x010d
317 #define MWL8K_CMD_SET_RATE 0x0110
318 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
319 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
320 #define MWL8K_CMD_SET_SLOT 0x0114
321 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
322 #define MWL8K_CMD_SET_WMM_MODE 0x0123
323 #define MWL8K_CMD_MIMO_CONFIG 0x0125
324 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
325 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
326 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
327 #define MWL8K_CMD_UPDATE_STADB 0x1123
328
329 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
330 {
331 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
332 snprintf(buf, bufsize, "%s", #x);\
333 return buf;\
334 } while (0)
335 switch (cmd & ~0x8000) {
336 MWL8K_CMDNAME(CODE_DNLD);
337 MWL8K_CMDNAME(GET_HW_SPEC);
338 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
339 MWL8K_CMDNAME(GET_STAT);
340 MWL8K_CMDNAME(RADIO_CONTROL);
341 MWL8K_CMDNAME(RF_TX_POWER);
342 MWL8K_CMDNAME(SET_PRE_SCAN);
343 MWL8K_CMDNAME(SET_POST_SCAN);
344 MWL8K_CMDNAME(SET_RF_CHANNEL);
345 MWL8K_CMDNAME(SET_AID);
346 MWL8K_CMDNAME(SET_RATE);
347 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
348 MWL8K_CMDNAME(RTS_THRESHOLD);
349 MWL8K_CMDNAME(SET_SLOT);
350 MWL8K_CMDNAME(SET_EDCA_PARAMS);
351 MWL8K_CMDNAME(SET_WMM_MODE);
352 MWL8K_CMDNAME(MIMO_CONFIG);
353 MWL8K_CMDNAME(USE_FIXED_RATE);
354 MWL8K_CMDNAME(ENABLE_SNIFFER);
355 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
356 MWL8K_CMDNAME(UPDATE_STADB);
357 default:
358 snprintf(buf, bufsize, "0x%x", cmd);
359 }
360 #undef MWL8K_CMDNAME
361
362 return buf;
363 }
364
365 /* Hardware and firmware reset */
366 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
367 {
368 iowrite32(MWL8K_H2A_INT_RESET,
369 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
370 iowrite32(MWL8K_H2A_INT_RESET,
371 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
372 msleep(20);
373 }
374
375 /* Release fw image */
376 static void mwl8k_release_fw(struct firmware **fw)
377 {
378 if (*fw == NULL)
379 return;
380 release_firmware(*fw);
381 *fw = NULL;
382 }
383
384 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
385 {
386 mwl8k_release_fw(&priv->fw.ucode);
387 mwl8k_release_fw(&priv->fw.helper);
388 }
389
390 /* Request fw image */
391 static int mwl8k_request_fw(struct mwl8k_priv *priv,
392 const char *fname, struct firmware **fw)
393 {
394 /* release current image */
395 if (*fw != NULL)
396 mwl8k_release_fw(fw);
397
398 return request_firmware((const struct firmware **)fw,
399 fname, &priv->pdev->dev);
400 }
401
402 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
403 {
404 u8 filename[64];
405 int rc;
406
407 priv->part_num = part_num;
408
409 snprintf(filename, sizeof(filename),
410 "mwl8k/helper_%u.fw", priv->part_num);
411
412 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
413 if (rc) {
414 printk(KERN_ERR
415 "%s Error requesting helper firmware file %s\n",
416 pci_name(priv->pdev), filename);
417 return rc;
418 }
419
420 snprintf(filename, sizeof(filename),
421 "mwl8k/fmimage_%u.fw", priv->part_num);
422
423 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
424 if (rc) {
425 printk(KERN_ERR "%s Error requesting firmware file %s\n",
426 pci_name(priv->pdev), filename);
427 mwl8k_release_fw(&priv->fw.helper);
428 return rc;
429 }
430
431 return 0;
432 }
433
434 struct mwl8k_cmd_pkt {
435 __le16 code;
436 __le16 length;
437 __le16 seq_num;
438 __le16 result;
439 char payload[0];
440 } __attribute__((packed));
441
442 /*
443 * Firmware loading.
444 */
445 static int
446 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
447 {
448 void __iomem *regs = priv->regs;
449 dma_addr_t dma_addr;
450 int rc;
451 int loops;
452
453 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
454 if (pci_dma_mapping_error(priv->pdev, dma_addr))
455 return -ENOMEM;
456
457 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
458 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
459 iowrite32(MWL8K_H2A_INT_DOORBELL,
460 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
461 iowrite32(MWL8K_H2A_INT_DUMMY,
462 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
463
464 rc = -ETIMEDOUT;
465 loops = 1000;
466 do {
467 u32 int_code;
468
469 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
470 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
471 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
472 rc = 0;
473 break;
474 }
475
476 udelay(1);
477 } while (--loops);
478
479 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
480
481 /*
482 * Clear 'command done' interrupt bit.
483 */
484 loops = 1000;
485 do {
486 u32 status;
487
488 status = ioread32(priv->regs +
489 MWL8K_HIU_A2H_INTERRUPT_STATUS);
490 if (status & MWL8K_A2H_INT_OPC_DONE) {
491 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
492 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
493 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
494 break;
495 }
496
497 udelay(1);
498 } while (--loops);
499
500 return rc;
501 }
502
503 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
504 const u8 *data, size_t length)
505 {
506 struct mwl8k_cmd_pkt *cmd;
507 int done;
508 int rc = 0;
509
510 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
511 if (cmd == NULL)
512 return -ENOMEM;
513
514 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
515 cmd->seq_num = 0;
516 cmd->result = 0;
517
518 done = 0;
519 while (length) {
520 int block_size = length > 256 ? 256 : length;
521
522 memcpy(cmd->payload, data + done, block_size);
523 cmd->length = cpu_to_le16(block_size);
524
525 rc = mwl8k_send_fw_load_cmd(priv, cmd,
526 sizeof(*cmd) + block_size);
527 if (rc)
528 break;
529
530 done += block_size;
531 length -= block_size;
532 }
533
534 if (!rc) {
535 cmd->length = 0;
536 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
537 }
538
539 kfree(cmd);
540
541 return rc;
542 }
543
544 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
545 const u8 *data, size_t length)
546 {
547 unsigned char *buffer;
548 int may_continue, rc = 0;
549 u32 done, prev_block_size;
550
551 buffer = kmalloc(1024, GFP_KERNEL);
552 if (buffer == NULL)
553 return -ENOMEM;
554
555 done = 0;
556 prev_block_size = 0;
557 may_continue = 1000;
558 while (may_continue > 0) {
559 u32 block_size;
560
561 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
562 if (block_size & 1) {
563 block_size &= ~1;
564 may_continue--;
565 } else {
566 done += prev_block_size;
567 length -= prev_block_size;
568 }
569
570 if (block_size > 1024 || block_size > length) {
571 rc = -EOVERFLOW;
572 break;
573 }
574
575 if (length == 0) {
576 rc = 0;
577 break;
578 }
579
580 if (block_size == 0) {
581 rc = -EPROTO;
582 may_continue--;
583 udelay(1);
584 continue;
585 }
586
587 prev_block_size = block_size;
588 memcpy(buffer, data + done, block_size);
589
590 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
591 if (rc)
592 break;
593 }
594
595 if (!rc && length != 0)
596 rc = -EREMOTEIO;
597
598 kfree(buffer);
599
600 return rc;
601 }
602
603 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
604 {
605 int loops, rc;
606
607 const u8 *ucode = priv->fw.ucode->data;
608 size_t ucode_len = priv->fw.ucode->size;
609 const u8 *helper = priv->fw.helper->data;
610 size_t helper_len = priv->fw.helper->size;
611
612 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
613 rc = mwl8k_load_fw_image(priv, helper, helper_len);
614 if (rc) {
615 printk(KERN_ERR "%s: unable to load firmware "
616 "helper image\n", pci_name(priv->pdev));
617 return rc;
618 }
619 msleep(1);
620
621 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
622 } else {
623 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
624 }
625
626 if (rc) {
627 printk(KERN_ERR "%s: unable to load firmware data\n",
628 pci_name(priv->pdev));
629 return rc;
630 }
631
632 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
633 msleep(1);
634
635 loops = 200000;
636 do {
637 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
638 == MWL8K_FWSTA_READY)
639 break;
640 udelay(1);
641 } while (--loops);
642
643 return loops ? 0 : -ETIMEDOUT;
644 }
645
646
647 /*
648 * Defines shared between transmission and reception.
649 */
650 /* HT control fields for firmware */
651 struct ewc_ht_info {
652 __le16 control1;
653 __le16 control2;
654 __le16 control3;
655 } __attribute__((packed));
656
657 /* Firmware Station database operations */
658 #define MWL8K_STA_DB_ADD_ENTRY 0
659 #define MWL8K_STA_DB_MODIFY_ENTRY 1
660 #define MWL8K_STA_DB_DEL_ENTRY 2
661 #define MWL8K_STA_DB_FLUSH 3
662
663 /* Peer Entry flags - used to define the type of the peer node */
664 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
665
666 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
667 #define MWL8K_MCS_BITMAP_SIZE 16
668
669 struct peer_capability_info {
670 /* Peer type - AP vs. STA. */
671 __u8 peer_type;
672
673 /* Basic 802.11 capabilities from assoc resp. */
674 __le16 basic_caps;
675
676 /* Set if peer supports 802.11n high throughput (HT). */
677 __u8 ht_support;
678
679 /* Valid if HT is supported. */
680 __le16 ht_caps;
681 __u8 extended_ht_caps;
682 struct ewc_ht_info ewc_info;
683
684 /* Legacy rate table. Intersection of our rates and peer rates. */
685 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
686
687 /* HT rate table. Intersection of our rates and peer rates. */
688 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
689 __u8 pad[16];
690
691 /* If set, interoperability mode, no proprietary extensions. */
692 __u8 interop;
693 __u8 pad2;
694 __u8 station_id;
695 __le16 amsdu_enabled;
696 } __attribute__((packed));
697
698 /* Inline functions to manipulate QoS field in data descriptor. */
699 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
700 {
701 u16 val_mask = 1 << 4;
702
703 /* End of Service Period Bit 4 */
704 return qos | val_mask;
705 }
706
707 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
708 {
709 u16 val_mask = 0x3;
710 u8 shift = 5;
711 u16 qos_mask = ~(val_mask << shift);
712
713 /* Ack Policy Bit 5-6 */
714 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
715 }
716
717 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
718 {
719 u16 val_mask = 1 << 7;
720
721 /* AMSDU present Bit 7 */
722 return qos | val_mask;
723 }
724
725 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
726 {
727 u16 val_mask = 0xff;
728 u8 shift = 8;
729 u16 qos_mask = ~(val_mask << shift);
730
731 /* Queue Length Bits 8-15 */
732 return (qos & qos_mask) | ((len & val_mask) << shift);
733 }
734
735 /* DMA header used by firmware and hardware. */
736 struct mwl8k_dma_data {
737 __le16 fwlen;
738 struct ieee80211_hdr wh;
739 } __attribute__((packed));
740
741 /* Routines to add/remove DMA header from skb. */
742 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
743 {
744 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
745 void *dst, *src = &tr->wh;
746 __le16 fc = tr->wh.frame_control;
747 int hdrlen = ieee80211_hdrlen(fc);
748 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
749
750 dst = (void *)tr + space;
751 if (dst != src) {
752 memmove(dst, src, hdrlen);
753 skb_pull(skb, space);
754 }
755
756 return 0;
757 }
758
759 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
760 {
761 struct ieee80211_hdr *wh;
762 u32 hdrlen, pktlen;
763 struct mwl8k_dma_data *tr;
764
765 wh = (struct ieee80211_hdr *)skb->data;
766 hdrlen = ieee80211_hdrlen(wh->frame_control);
767 pktlen = skb->len;
768
769 /*
770 * Copy up/down the 802.11 header; the firmware requires
771 * we present a 2-byte payload length followed by a
772 * 4-address header (w/o QoS), followed (optionally) by
773 * any WEP/ExtIV header (but only filled in for CCMP).
774 */
775 if (hdrlen != sizeof(struct mwl8k_dma_data))
776 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
777
778 tr = (struct mwl8k_dma_data *)skb->data;
779 if (wh != &tr->wh)
780 memmove(&tr->wh, wh, hdrlen);
781
782 /* Clear addr4 */
783 memset(tr->wh.addr4, 0, ETH_ALEN);
784
785 /*
786 * Firmware length is the length of the fully formed "802.11
787 * payload". That is, everything except for the 802.11 header.
788 * This includes all crypto material including the MIC.
789 */
790 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
791
792 return skb;
793 }
794
795
796 /*
797 * Packet reception.
798 */
799 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
800
801 struct mwl8k_rx_desc {
802 __le16 pkt_len;
803 __u8 link_quality;
804 __u8 noise_level;
805 __le32 pkt_phys_addr;
806 __le32 next_rx_desc_phys_addr;
807 __le16 qos_control;
808 __le16 rate_info;
809 __le32 pad0[4];
810 __u8 rssi;
811 __u8 channel;
812 __le16 pad1;
813 __u8 rx_ctrl;
814 __u8 rx_status;
815 __u8 pad2[2];
816 } __attribute__((packed));
817
818 #define MWL8K_RX_DESCS 256
819 #define MWL8K_RX_MAXSZ 3800
820
821 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
822 {
823 struct mwl8k_priv *priv = hw->priv;
824 struct mwl8k_rx_queue *rxq = priv->rxq + index;
825 int size;
826 int i;
827
828 rxq->rx_desc_count = 0;
829 rxq->rx_head = 0;
830 rxq->rx_tail = 0;
831
832 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
833
834 rxq->rx_desc_area =
835 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
836 if (rxq->rx_desc_area == NULL) {
837 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
838 priv->name);
839 return -ENOMEM;
840 }
841 memset(rxq->rx_desc_area, 0, size);
842
843 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
844 sizeof(*rxq->rx_skb), GFP_KERNEL);
845 if (rxq->rx_skb == NULL) {
846 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
847 priv->name);
848 pci_free_consistent(priv->pdev, size,
849 rxq->rx_desc_area, rxq->rx_desc_dma);
850 return -ENOMEM;
851 }
852 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
853
854 for (i = 0; i < MWL8K_RX_DESCS; i++) {
855 struct mwl8k_rx_desc *rx_desc;
856 int nexti;
857
858 rx_desc = rxq->rx_desc_area + i;
859 nexti = (i + 1) % MWL8K_RX_DESCS;
860
861 rx_desc->next_rx_desc_phys_addr =
862 cpu_to_le32(rxq->rx_desc_dma
863 + nexti * sizeof(*rx_desc));
864 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
865 }
866
867 return 0;
868 }
869
870 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
871 {
872 struct mwl8k_priv *priv = hw->priv;
873 struct mwl8k_rx_queue *rxq = priv->rxq + index;
874 int refilled;
875
876 refilled = 0;
877 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
878 struct sk_buff *skb;
879 int rx;
880
881 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
882 if (skb == NULL)
883 break;
884
885 rxq->rx_desc_count++;
886
887 rx = rxq->rx_tail;
888 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
889
890 rxq->rx_desc_area[rx].pkt_phys_addr =
891 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
892 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
893
894 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
895 rxq->rx_skb[rx] = skb;
896 wmb();
897 rxq->rx_desc_area[rx].rx_ctrl = 0;
898
899 refilled++;
900 }
901
902 return refilled;
903 }
904
905 /* Must be called only when the card's reception is completely halted */
906 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
907 {
908 struct mwl8k_priv *priv = hw->priv;
909 struct mwl8k_rx_queue *rxq = priv->rxq + index;
910 int i;
911
912 for (i = 0; i < MWL8K_RX_DESCS; i++) {
913 if (rxq->rx_skb[i] != NULL) {
914 unsigned long addr;
915
916 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
917 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
918 PCI_DMA_FROMDEVICE);
919 kfree_skb(rxq->rx_skb[i]);
920 rxq->rx_skb[i] = NULL;
921 }
922 }
923
924 kfree(rxq->rx_skb);
925 rxq->rx_skb = NULL;
926
927 pci_free_consistent(priv->pdev,
928 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
929 rxq->rx_desc_area, rxq->rx_desc_dma);
930 rxq->rx_desc_area = NULL;
931 }
932
933
934 /*
935 * Scan a list of BSSIDs to process for finalize join.
936 * Allows for extension to process multiple BSSIDs.
937 */
938 static inline int
939 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
940 {
941 return priv->capture_beacon &&
942 ieee80211_is_beacon(wh->frame_control) &&
943 !compare_ether_addr(wh->addr3, priv->capture_bssid);
944 }
945
946 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
947 struct sk_buff *skb)
948 {
949 priv->capture_beacon = false;
950 memset(priv->capture_bssid, 0, ETH_ALEN);
951
952 /*
953 * Use GFP_ATOMIC as rxq_process is called from
954 * the primary interrupt handler, memory allocation call
955 * must not sleep.
956 */
957 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
958 if (priv->beacon_skb != NULL)
959 queue_work(priv->config_wq,
960 &priv->finalize_join_worker);
961 }
962
963 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
964 {
965 struct mwl8k_priv *priv = hw->priv;
966 struct mwl8k_rx_queue *rxq = priv->rxq + index;
967 int processed;
968
969 processed = 0;
970 while (rxq->rx_desc_count && limit--) {
971 struct mwl8k_rx_desc *rx_desc;
972 struct sk_buff *skb;
973 struct ieee80211_rx_status status;
974 unsigned long addr;
975 struct ieee80211_hdr *wh;
976
977 rx_desc = rxq->rx_desc_area + rxq->rx_head;
978 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
979 break;
980 rmb();
981
982 skb = rxq->rx_skb[rxq->rx_head];
983 if (skb == NULL)
984 break;
985 rxq->rx_skb[rxq->rx_head] = NULL;
986
987 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
988 rxq->rx_desc_count--;
989
990 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
991 pci_unmap_single(priv->pdev, addr,
992 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
993
994 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
995 if (mwl8k_remove_dma_header(skb)) {
996 dev_kfree_skb(skb);
997 continue;
998 }
999
1000 wh = (struct ieee80211_hdr *)skb->data;
1001
1002 /*
1003 * Check for pending join operation. save a copy of
1004 * the beacon and schedule a tasklet to send finalize
1005 * join command to the firmware.
1006 */
1007 if (mwl8k_capture_bssid(priv, wh))
1008 mwl8k_save_beacon(priv, skb);
1009
1010 memset(&status, 0, sizeof(status));
1011 status.mactime = 0;
1012 status.signal = -rx_desc->rssi;
1013 status.noise = -rx_desc->noise_level;
1014 status.qual = rx_desc->link_quality;
1015 status.antenna = 1;
1016 status.rate_idx = 1;
1017 status.flag = 0;
1018 status.band = IEEE80211_BAND_2GHZ;
1019 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1020 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1021 ieee80211_rx_irqsafe(hw, skb);
1022
1023 processed++;
1024 }
1025
1026 return processed;
1027 }
1028
1029
1030 /*
1031 * Packet transmission.
1032 */
1033
1034 /* Transmit queue assignment. */
1035 enum {
1036 MWL8K_WME_AC_BK = 0, /* background access */
1037 MWL8K_WME_AC_BE = 1, /* best effort access */
1038 MWL8K_WME_AC_VI = 2, /* video access */
1039 MWL8K_WME_AC_VO = 3, /* voice access */
1040 };
1041
1042 /* Transmit packet ACK policy */
1043 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1044 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1045
1046 #define GET_TXQ(_ac) (\
1047 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1048 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1049 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1050 MWL8K_WME_AC_BE)
1051
1052 #define MWL8K_TXD_STATUS_OK 0x00000001
1053 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1054 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1055 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1056 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1057
1058 struct mwl8k_tx_desc {
1059 __le32 status;
1060 __u8 data_rate;
1061 __u8 tx_priority;
1062 __le16 qos_control;
1063 __le32 pkt_phys_addr;
1064 __le16 pkt_len;
1065 __u8 dest_MAC_addr[ETH_ALEN];
1066 __le32 next_tx_desc_phys_addr;
1067 __le32 reserved;
1068 __le16 rate_info;
1069 __u8 peer_id;
1070 __u8 tx_frag_cnt;
1071 } __attribute__((packed));
1072
1073 #define MWL8K_TX_DESCS 128
1074
1075 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1076 {
1077 struct mwl8k_priv *priv = hw->priv;
1078 struct mwl8k_tx_queue *txq = priv->txq + index;
1079 int size;
1080 int i;
1081
1082 memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1083 txq->tx_stats.limit = MWL8K_TX_DESCS;
1084 txq->tx_head = 0;
1085 txq->tx_tail = 0;
1086
1087 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1088
1089 txq->tx_desc_area =
1090 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1091 if (txq->tx_desc_area == NULL) {
1092 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1093 priv->name);
1094 return -ENOMEM;
1095 }
1096 memset(txq->tx_desc_area, 0, size);
1097
1098 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1099 GFP_KERNEL);
1100 if (txq->tx_skb == NULL) {
1101 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1102 priv->name);
1103 pci_free_consistent(priv->pdev, size,
1104 txq->tx_desc_area, txq->tx_desc_dma);
1105 return -ENOMEM;
1106 }
1107 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1108
1109 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1110 struct mwl8k_tx_desc *tx_desc;
1111 int nexti;
1112
1113 tx_desc = txq->tx_desc_area + i;
1114 nexti = (i + 1) % MWL8K_TX_DESCS;
1115
1116 tx_desc->status = 0;
1117 tx_desc->next_tx_desc_phys_addr =
1118 cpu_to_le32(txq->tx_desc_dma +
1119 nexti * sizeof(*tx_desc));
1120 }
1121
1122 return 0;
1123 }
1124
1125 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1126 {
1127 iowrite32(MWL8K_H2A_INT_PPA_READY,
1128 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1129 iowrite32(MWL8K_H2A_INT_DUMMY,
1130 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1131 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1132 }
1133
1134 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1135 {
1136 return priv->pending_tx_pkts;
1137 }
1138
1139 struct mwl8k_txq_info {
1140 u32 fw_owned;
1141 u32 drv_owned;
1142 u32 unused;
1143 u32 len;
1144 u32 head;
1145 u32 tail;
1146 };
1147
1148 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1149 struct mwl8k_txq_info txinfo[],
1150 u32 num_queues)
1151 {
1152 int count, desc, status;
1153 struct mwl8k_tx_queue *txq;
1154 struct mwl8k_tx_desc *tx_desc;
1155 int ndescs = 0;
1156
1157 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1158 spin_lock_bh(&priv->tx_lock);
1159 for (count = 0; count < num_queues; count++) {
1160 txq = priv->txq + count;
1161 txinfo[count].len = txq->tx_stats.len;
1162 txinfo[count].head = txq->tx_head;
1163 txinfo[count].tail = txq->tx_tail;
1164 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1165 tx_desc = txq->tx_desc_area + desc;
1166 status = le32_to_cpu(tx_desc->status);
1167
1168 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1169 txinfo[count].fw_owned++;
1170 else
1171 txinfo[count].drv_owned++;
1172
1173 if (tx_desc->pkt_len == 0)
1174 txinfo[count].unused++;
1175 }
1176 }
1177 spin_unlock_bh(&priv->tx_lock);
1178
1179 return ndescs;
1180 }
1181
1182 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1183 {
1184 struct mwl8k_priv *priv = hw->priv;
1185 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1186 u32 count;
1187 unsigned long timeout;
1188
1189 might_sleep();
1190
1191 if (priv->tx_wait != NULL)
1192 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1193
1194 spin_lock_bh(&priv->tx_lock);
1195 count = mwl8k_txq_busy(priv);
1196 if (count) {
1197 priv->tx_wait = &cmd_wait;
1198 if (priv->radio_state)
1199 mwl8k_tx_start(priv);
1200 }
1201 spin_unlock_bh(&priv->tx_lock);
1202
1203 if (count) {
1204 struct mwl8k_txq_info txinfo[4];
1205 int index;
1206 int newcount;
1207
1208 timeout = wait_for_completion_timeout(&cmd_wait,
1209 msecs_to_jiffies(delay_ms));
1210 if (timeout)
1211 return 0;
1212
1213 spin_lock_bh(&priv->tx_lock);
1214 priv->tx_wait = NULL;
1215 newcount = mwl8k_txq_busy(priv);
1216 spin_unlock_bh(&priv->tx_lock);
1217
1218 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1219 __func__, __LINE__, delay_ms, count, newcount);
1220
1221 mwl8k_scan_tx_ring(priv, txinfo, 4);
1222 for (index = 0; index < 4; index++)
1223 printk(KERN_ERR
1224 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1225 index,
1226 txinfo[index].len,
1227 txinfo[index].head,
1228 txinfo[index].tail,
1229 txinfo[index].fw_owned,
1230 txinfo[index].drv_owned,
1231 txinfo[index].unused);
1232
1233 return -ETIMEDOUT;
1234 }
1235
1236 return 0;
1237 }
1238
1239 #define MWL8K_TXD_SUCCESS(status) \
1240 ((status) & (MWL8K_TXD_STATUS_OK | \
1241 MWL8K_TXD_STATUS_OK_RETRY | \
1242 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1243
1244 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1245 {
1246 struct mwl8k_priv *priv = hw->priv;
1247 struct mwl8k_tx_queue *txq = priv->txq + index;
1248 int wake = 0;
1249
1250 while (txq->tx_stats.len > 0) {
1251 int tx;
1252 int rc;
1253 struct mwl8k_tx_desc *tx_desc;
1254 unsigned long addr;
1255 int size;
1256 struct sk_buff *skb;
1257 struct ieee80211_tx_info *info;
1258 u32 status;
1259
1260 rc = 0;
1261 tx = txq->tx_head;
1262 tx_desc = txq->tx_desc_area + tx;
1263
1264 status = le32_to_cpu(tx_desc->status);
1265
1266 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1267 if (!force)
1268 break;
1269 tx_desc->status &=
1270 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1271 }
1272
1273 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1274 BUG_ON(txq->tx_stats.len == 0);
1275 txq->tx_stats.len--;
1276 priv->pending_tx_pkts--;
1277
1278 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1279 size = le16_to_cpu(tx_desc->pkt_len);
1280 skb = txq->tx_skb[tx].skb;
1281 txq->tx_skb[tx].skb = NULL;
1282
1283 BUG_ON(skb == NULL);
1284 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1285
1286 rc = mwl8k_remove_dma_header(skb);
1287
1288 /* Mark descriptor as unused */
1289 tx_desc->pkt_phys_addr = 0;
1290 tx_desc->pkt_len = 0;
1291
1292 if (txq->tx_skb[tx].clone) {
1293 /* Replace with original skb
1294 * before returning to stack
1295 * as buffer has been cloned
1296 */
1297 dev_kfree_skb(skb);
1298 skb = txq->tx_skb[tx].clone;
1299 txq->tx_skb[tx].clone = NULL;
1300 }
1301
1302 if (rc) {
1303 /* Something has gone wrong here.
1304 * Failed to remove DMA header.
1305 * Print error message and drop packet.
1306 */
1307 printk(KERN_ERR "%s: Error removing DMA header from "
1308 "tx skb 0x%p.\n", priv->name, skb);
1309
1310 dev_kfree_skb(skb);
1311 continue;
1312 }
1313
1314 info = IEEE80211_SKB_CB(skb);
1315 ieee80211_tx_info_clear_status(info);
1316 if (MWL8K_TXD_SUCCESS(status))
1317 info->flags |= IEEE80211_TX_STAT_ACK;
1318
1319 ieee80211_tx_status_irqsafe(hw, skb);
1320
1321 wake = !priv->inconfig && priv->radio_state;
1322 }
1323
1324 if (wake)
1325 ieee80211_wake_queue(hw, index);
1326 }
1327
1328 /* must be called only when the card's transmit is completely halted */
1329 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1330 {
1331 struct mwl8k_priv *priv = hw->priv;
1332 struct mwl8k_tx_queue *txq = priv->txq + index;
1333
1334 mwl8k_txq_reclaim(hw, index, 1);
1335
1336 kfree(txq->tx_skb);
1337 txq->tx_skb = NULL;
1338
1339 pci_free_consistent(priv->pdev,
1340 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1341 txq->tx_desc_area, txq->tx_desc_dma);
1342 txq->tx_desc_area = NULL;
1343 }
1344
1345 static int
1346 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1347 {
1348 struct mwl8k_priv *priv = hw->priv;
1349 struct ieee80211_tx_info *tx_info;
1350 struct ieee80211_hdr *wh;
1351 struct mwl8k_tx_queue *txq;
1352 struct mwl8k_tx_desc *tx;
1353 struct mwl8k_dma_data *tr;
1354 struct mwl8k_vif *mwl8k_vif;
1355 struct sk_buff *org_skb = skb;
1356 dma_addr_t dma;
1357 u16 qos = 0;
1358 bool qosframe = false, ampduframe = false;
1359 bool mcframe = false, eapolframe = false;
1360 bool amsduframe = false;
1361 __le16 fc;
1362
1363 txq = priv->txq + index;
1364 tx = txq->tx_desc_area + txq->tx_tail;
1365
1366 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1367
1368 /*
1369 * Append HW DMA header to start of packet. Drop packet if
1370 * there is not enough space or a failure to unshare/unclone
1371 * the skb.
1372 */
1373 skb = mwl8k_add_dma_header(skb);
1374
1375 if (skb == NULL) {
1376 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1377 "header, dropping TX frame.\n", priv->name);
1378 dev_kfree_skb(org_skb);
1379 return NETDEV_TX_OK;
1380 }
1381
1382 tx_info = IEEE80211_SKB_CB(skb);
1383 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1384 tr = (struct mwl8k_dma_data *)skb->data;
1385 wh = &tr->wh;
1386 fc = wh->frame_control;
1387 qosframe = ieee80211_is_data_qos(fc);
1388 mcframe = is_multicast_ether_addr(wh->addr1);
1389 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1390
1391 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1392 u16 seqno = mwl8k_vif->seqno;
1393 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1394 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1395 mwl8k_vif->seqno = seqno++ % 4096;
1396 }
1397
1398 if (qosframe)
1399 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1400
1401 dma = pci_map_single(priv->pdev, skb->data,
1402 skb->len, PCI_DMA_TODEVICE);
1403
1404 if (pci_dma_mapping_error(priv->pdev, dma)) {
1405 printk(KERN_DEBUG "%s: failed to dma map skb, "
1406 "dropping TX frame.\n", priv->name);
1407
1408 if (org_skb != NULL)
1409 dev_kfree_skb(org_skb);
1410 if (skb != NULL)
1411 dev_kfree_skb(skb);
1412 return NETDEV_TX_OK;
1413 }
1414
1415 /* Set desc header, cpu bit order. */
1416 tx->status = 0;
1417 tx->data_rate = 0;
1418 tx->tx_priority = index;
1419 tx->qos_control = 0;
1420 tx->rate_info = 0;
1421 tx->peer_id = mwl8k_vif->peer_id;
1422
1423 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1424
1425 /* Setup firmware control bit fields for each frame type. */
1426 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1427 tx->data_rate = 0;
1428 qos = mwl8k_qos_setbit_eosp(qos);
1429 /* Set Queue size to unspecified */
1430 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1431 } else if (ieee80211_is_data(fc)) {
1432 tx->data_rate = 1;
1433 if (mcframe)
1434 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1435
1436 /*
1437 * Tell firmware to not send EAPOL pkts in an
1438 * aggregate. Verify against mac80211 tx path. If
1439 * stack turns off AMPDU for an EAPOL frame this
1440 * check will be removed.
1441 */
1442 if (eapolframe) {
1443 qos = mwl8k_qos_setbit_ack(qos,
1444 MWL8K_TXD_ACK_POLICY_NORMAL);
1445 } else {
1446 /* Send pkt in an aggregate if AMPDU frame. */
1447 if (ampduframe)
1448 qos = mwl8k_qos_setbit_ack(qos,
1449 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1450 else
1451 qos = mwl8k_qos_setbit_ack(qos,
1452 MWL8K_TXD_ACK_POLICY_NORMAL);
1453
1454 if (amsduframe)
1455 qos = mwl8k_qos_setbit_amsdu(qos);
1456 }
1457 }
1458
1459 /* Convert to little endian */
1460 tx->qos_control = cpu_to_le16(qos);
1461 tx->status = cpu_to_le32(tx->status);
1462 tx->pkt_phys_addr = cpu_to_le32(dma);
1463 tx->pkt_len = cpu_to_le16(skb->len);
1464
1465 txq->tx_skb[txq->tx_tail].skb = skb;
1466 txq->tx_skb[txq->tx_tail].clone =
1467 skb == org_skb ? NULL : org_skb;
1468
1469 spin_lock_bh(&priv->tx_lock);
1470
1471 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1472 MWL8K_TXD_STATUS_FW_OWNED);
1473 wmb();
1474 txq->tx_stats.len++;
1475 priv->pending_tx_pkts++;
1476 txq->tx_stats.count++;
1477 txq->tx_tail++;
1478
1479 if (txq->tx_tail == MWL8K_TX_DESCS)
1480 txq->tx_tail = 0;
1481 if (txq->tx_head == txq->tx_tail)
1482 ieee80211_stop_queue(hw, index);
1483
1484 if (priv->inconfig) {
1485 /*
1486 * Silently queue packet when we are in the middle of
1487 * a config cycle. Notify firmware only if we are
1488 * waiting for TXQs to empty. If a packet is sent
1489 * before .config() is complete, perhaps it is better
1490 * to drop the packet, as the channel is being changed
1491 * and the packet will end up on the wrong channel.
1492 */
1493 printk(KERN_ERR "%s(): WARNING TX activity while "
1494 "in config\n", __func__);
1495
1496 if (priv->tx_wait != NULL)
1497 mwl8k_tx_start(priv);
1498 } else
1499 mwl8k_tx_start(priv);
1500
1501 spin_unlock_bh(&priv->tx_lock);
1502
1503 return NETDEV_TX_OK;
1504 }
1505
1506
1507 /*
1508 * Command processing.
1509 */
1510
1511 /* Timeout firmware commands after 2000ms */
1512 #define MWL8K_CMD_TIMEOUT_MS 2000
1513
1514 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1515 {
1516 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1517 struct mwl8k_priv *priv = hw->priv;
1518 void __iomem *regs = priv->regs;
1519 dma_addr_t dma_addr;
1520 unsigned int dma_size;
1521 int rc;
1522 unsigned long timeout = 0;
1523 u8 buf[32];
1524
1525 cmd->result = 0xFFFF;
1526 dma_size = le16_to_cpu(cmd->length);
1527 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1528 PCI_DMA_BIDIRECTIONAL);
1529 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1530 return -ENOMEM;
1531
1532 if (priv->hostcmd_wait != NULL)
1533 printk(KERN_ERR "WARNING host command in progress\n");
1534
1535 spin_lock_irq(&priv->fw_lock);
1536 priv->hostcmd_wait = &cmd_wait;
1537 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1538 iowrite32(MWL8K_H2A_INT_DOORBELL,
1539 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1540 iowrite32(MWL8K_H2A_INT_DUMMY,
1541 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1542 spin_unlock_irq(&priv->fw_lock);
1543
1544 timeout = wait_for_completion_timeout(&cmd_wait,
1545 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1546
1547 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1548 PCI_DMA_BIDIRECTIONAL);
1549
1550 if (!timeout) {
1551 spin_lock_irq(&priv->fw_lock);
1552 priv->hostcmd_wait = NULL;
1553 spin_unlock_irq(&priv->fw_lock);
1554 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1555 priv->name,
1556 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1557 MWL8K_CMD_TIMEOUT_MS);
1558 rc = -ETIMEDOUT;
1559 } else {
1560 rc = cmd->result ? -EINVAL : 0;
1561 if (rc)
1562 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1563 priv->name,
1564 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1565 cmd->result);
1566 }
1567
1568 return rc;
1569 }
1570
1571 /*
1572 * GET_HW_SPEC.
1573 */
1574 struct mwl8k_cmd_get_hw_spec {
1575 struct mwl8k_cmd_pkt header;
1576 __u8 hw_rev;
1577 __u8 host_interface;
1578 __le16 num_mcaddrs;
1579 __u8 perm_addr[ETH_ALEN];
1580 __le16 region_code;
1581 __le32 fw_rev;
1582 __le32 ps_cookie;
1583 __le32 caps;
1584 __u8 mcs_bitmap[16];
1585 __le32 rx_queue_ptr;
1586 __le32 num_tx_queues;
1587 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1588 __le32 caps2;
1589 __le32 num_tx_desc_per_queue;
1590 __le32 total_rx_desc;
1591 } __attribute__((packed));
1592
1593 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1594 {
1595 struct mwl8k_priv *priv = hw->priv;
1596 struct mwl8k_cmd_get_hw_spec *cmd;
1597 int rc;
1598 int i;
1599
1600 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1601 if (cmd == NULL)
1602 return -ENOMEM;
1603
1604 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1605 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1606
1607 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1608 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1609 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1610 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1611 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1612 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1613 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1614 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1615
1616 rc = mwl8k_post_cmd(hw, &cmd->header);
1617
1618 if (!rc) {
1619 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1620 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1621 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1622 priv->hw_rev = cmd->hw_rev;
1623 }
1624
1625 kfree(cmd);
1626 return rc;
1627 }
1628
1629 /*
1630 * CMD_MAC_MULTICAST_ADR.
1631 */
1632 struct mwl8k_cmd_mac_multicast_adr {
1633 struct mwl8k_cmd_pkt header;
1634 __le16 action;
1635 __le16 numaddr;
1636 __u8 addr[0][ETH_ALEN];
1637 };
1638
1639 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1640
1641 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1642 int mc_count,
1643 struct dev_addr_list *mclist)
1644 {
1645 struct mwl8k_cmd_mac_multicast_adr *cmd;
1646 int index = 0;
1647 int rc;
1648 int size = sizeof(*cmd) + mc_count * ETH_ALEN;
1649
1650 cmd = kzalloc(size, GFP_KERNEL);
1651 if (cmd == NULL)
1652 return -ENOMEM;
1653
1654 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1655 cmd->header.length = cpu_to_le16(size);
1656 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1657 cmd->numaddr = cpu_to_le16(mc_count);
1658
1659 while (index < mc_count && mclist) {
1660 if (mclist->da_addrlen != ETH_ALEN) {
1661 rc = -EINVAL;
1662 goto mwl8k_cmd_mac_multicast_adr_exit;
1663 }
1664 memcpy(cmd->addr[index++], mclist->da_addr, ETH_ALEN);
1665 mclist = mclist->next;
1666 }
1667
1668 rc = mwl8k_post_cmd(hw, &cmd->header);
1669
1670 mwl8k_cmd_mac_multicast_adr_exit:
1671 kfree(cmd);
1672 return rc;
1673 }
1674
1675 /*
1676 * CMD_802_11_GET_STAT.
1677 */
1678 struct mwl8k_cmd_802_11_get_stat {
1679 struct mwl8k_cmd_pkt header;
1680 __le16 action;
1681 __le32 stats[64];
1682 } __attribute__((packed));
1683
1684 #define MWL8K_STAT_ACK_FAILURE 9
1685 #define MWL8K_STAT_RTS_FAILURE 12
1686 #define MWL8K_STAT_FCS_ERROR 24
1687 #define MWL8K_STAT_RTS_SUCCESS 11
1688
1689 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1690 struct ieee80211_low_level_stats *stats)
1691 {
1692 struct mwl8k_cmd_802_11_get_stat *cmd;
1693 int rc;
1694
1695 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1696 if (cmd == NULL)
1697 return -ENOMEM;
1698
1699 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1700 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1701 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1702
1703 rc = mwl8k_post_cmd(hw, &cmd->header);
1704 if (!rc) {
1705 stats->dot11ACKFailureCount =
1706 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1707 stats->dot11RTSFailureCount =
1708 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1709 stats->dot11FCSErrorCount =
1710 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1711 stats->dot11RTSSuccessCount =
1712 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1713 }
1714 kfree(cmd);
1715
1716 return rc;
1717 }
1718
1719 /*
1720 * CMD_802_11_RADIO_CONTROL.
1721 */
1722 struct mwl8k_cmd_802_11_radio_control {
1723 struct mwl8k_cmd_pkt header;
1724 __le16 action;
1725 __le16 control;
1726 __le16 radio_on;
1727 } __attribute__((packed));
1728
1729 static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1730 {
1731 struct mwl8k_priv *priv = hw->priv;
1732 struct mwl8k_cmd_802_11_radio_control *cmd;
1733 int rc;
1734
1735 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1736 !(enable & MWL8K_RADIO_FORCE))
1737 return 0;
1738
1739 enable &= MWL8K_RADIO_ENABLE;
1740
1741 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1742 if (cmd == NULL)
1743 return -ENOMEM;
1744
1745 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1746 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1747 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1748 cmd->control = cpu_to_le16(priv->radio_preamble);
1749 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1750
1751 rc = mwl8k_post_cmd(hw, &cmd->header);
1752 kfree(cmd);
1753
1754 if (!rc)
1755 priv->radio_state = enable;
1756
1757 return rc;
1758 }
1759
1760 static int
1761 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1762 {
1763 struct mwl8k_priv *priv;
1764
1765 if (hw == NULL || hw->priv == NULL)
1766 return -EINVAL;
1767 priv = hw->priv;
1768
1769 priv->radio_preamble = (short_preamble ?
1770 MWL8K_RADIO_SHORT_PREAMBLE :
1771 MWL8K_RADIO_LONG_PREAMBLE);
1772
1773 return mwl8k_cmd_802_11_radio_control(hw,
1774 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1775 }
1776
1777 /*
1778 * CMD_802_11_RF_TX_POWER.
1779 */
1780 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1781
1782 struct mwl8k_cmd_802_11_rf_tx_power {
1783 struct mwl8k_cmd_pkt header;
1784 __le16 action;
1785 __le16 support_level;
1786 __le16 current_level;
1787 __le16 reserved;
1788 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1789 } __attribute__((packed));
1790
1791 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1792 {
1793 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1794 int rc;
1795
1796 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1797 if (cmd == NULL)
1798 return -ENOMEM;
1799
1800 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1801 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1802 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1803 cmd->support_level = cpu_to_le16(dBm);
1804
1805 rc = mwl8k_post_cmd(hw, &cmd->header);
1806 kfree(cmd);
1807
1808 return rc;
1809 }
1810
1811 /*
1812 * CMD_SET_PRE_SCAN.
1813 */
1814 struct mwl8k_cmd_set_pre_scan {
1815 struct mwl8k_cmd_pkt header;
1816 } __attribute__((packed));
1817
1818 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1819 {
1820 struct mwl8k_cmd_set_pre_scan *cmd;
1821 int rc;
1822
1823 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1824 if (cmd == NULL)
1825 return -ENOMEM;
1826
1827 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1828 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1829
1830 rc = mwl8k_post_cmd(hw, &cmd->header);
1831 kfree(cmd);
1832
1833 return rc;
1834 }
1835
1836 /*
1837 * CMD_SET_POST_SCAN.
1838 */
1839 struct mwl8k_cmd_set_post_scan {
1840 struct mwl8k_cmd_pkt header;
1841 __le32 isibss;
1842 __u8 bssid[ETH_ALEN];
1843 } __attribute__((packed));
1844
1845 static int
1846 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1847 {
1848 struct mwl8k_cmd_set_post_scan *cmd;
1849 int rc;
1850
1851 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1852 if (cmd == NULL)
1853 return -ENOMEM;
1854
1855 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1856 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1857 cmd->isibss = 0;
1858 memcpy(cmd->bssid, mac, ETH_ALEN);
1859
1860 rc = mwl8k_post_cmd(hw, &cmd->header);
1861 kfree(cmd);
1862
1863 return rc;
1864 }
1865
1866 /*
1867 * CMD_SET_RF_CHANNEL.
1868 */
1869 struct mwl8k_cmd_set_rf_channel {
1870 struct mwl8k_cmd_pkt header;
1871 __le16 action;
1872 __u8 current_channel;
1873 __le32 channel_flags;
1874 } __attribute__((packed));
1875
1876 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1877 struct ieee80211_channel *channel)
1878 {
1879 struct mwl8k_cmd_set_rf_channel *cmd;
1880 int rc;
1881
1882 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1883 if (cmd == NULL)
1884 return -ENOMEM;
1885
1886 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1887 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1888 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1889 cmd->current_channel = channel->hw_value;
1890 if (channel->band == IEEE80211_BAND_2GHZ)
1891 cmd->channel_flags = cpu_to_le32(0x00000081);
1892 else
1893 cmd->channel_flags = cpu_to_le32(0x00000000);
1894
1895 rc = mwl8k_post_cmd(hw, &cmd->header);
1896 kfree(cmd);
1897
1898 return rc;
1899 }
1900
1901 /*
1902 * CMD_SET_SLOT.
1903 */
1904 struct mwl8k_cmd_set_slot {
1905 struct mwl8k_cmd_pkt header;
1906 __le16 action;
1907 __u8 short_slot;
1908 } __attribute__((packed));
1909
1910 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1911 {
1912 struct mwl8k_cmd_set_slot *cmd;
1913 int rc;
1914
1915 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1916 if (cmd == NULL)
1917 return -ENOMEM;
1918
1919 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1920 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1921 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1922 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1923
1924 rc = mwl8k_post_cmd(hw, &cmd->header);
1925 kfree(cmd);
1926
1927 return rc;
1928 }
1929
1930 /*
1931 * CMD_MIMO_CONFIG.
1932 */
1933 struct mwl8k_cmd_mimo_config {
1934 struct mwl8k_cmd_pkt header;
1935 __le32 action;
1936 __u8 rx_antenna_map;
1937 __u8 tx_antenna_map;
1938 } __attribute__((packed));
1939
1940 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1941 {
1942 struct mwl8k_cmd_mimo_config *cmd;
1943 int rc;
1944
1945 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1946 if (cmd == NULL)
1947 return -ENOMEM;
1948
1949 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1950 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1951 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1952 cmd->rx_antenna_map = rx;
1953 cmd->tx_antenna_map = tx;
1954
1955 rc = mwl8k_post_cmd(hw, &cmd->header);
1956 kfree(cmd);
1957
1958 return rc;
1959 }
1960
1961 /*
1962 * CMD_ENABLE_SNIFFER.
1963 */
1964 struct mwl8k_cmd_enable_sniffer {
1965 struct mwl8k_cmd_pkt header;
1966 __le32 action;
1967 } __attribute__((packed));
1968
1969 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1970 {
1971 struct mwl8k_cmd_enable_sniffer *cmd;
1972 int rc;
1973
1974 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1975 if (cmd == NULL)
1976 return -ENOMEM;
1977
1978 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1979 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1980 cmd->action = cpu_to_le32(!!enable);
1981
1982 rc = mwl8k_post_cmd(hw, &cmd->header);
1983 kfree(cmd);
1984
1985 return rc;
1986 }
1987
1988 /*
1989 * CMD_SET_RATEADAPT_MODE.
1990 */
1991 struct mwl8k_cmd_set_rate_adapt_mode {
1992 struct mwl8k_cmd_pkt header;
1993 __le16 action;
1994 __le16 mode;
1995 } __attribute__((packed));
1996
1997 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
1998 {
1999 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2000 int rc;
2001
2002 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2003 if (cmd == NULL)
2004 return -ENOMEM;
2005
2006 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2007 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2008 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2009 cmd->mode = cpu_to_le16(mode);
2010
2011 rc = mwl8k_post_cmd(hw, &cmd->header);
2012 kfree(cmd);
2013
2014 return rc;
2015 }
2016
2017 /*
2018 * CMD_SET_WMM_MODE.
2019 */
2020 struct mwl8k_cmd_set_wmm {
2021 struct mwl8k_cmd_pkt header;
2022 __le16 action;
2023 } __attribute__((packed));
2024
2025 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2026 {
2027 struct mwl8k_priv *priv = hw->priv;
2028 struct mwl8k_cmd_set_wmm *cmd;
2029 int rc;
2030
2031 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2032 if (cmd == NULL)
2033 return -ENOMEM;
2034
2035 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2036 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2037 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2038
2039 rc = mwl8k_post_cmd(hw, &cmd->header);
2040 kfree(cmd);
2041
2042 if (!rc)
2043 priv->wmm_mode = enable;
2044
2045 return rc;
2046 }
2047
2048 /*
2049 * CMD_SET_RTS_THRESHOLD.
2050 */
2051 struct mwl8k_cmd_rts_threshold {
2052 struct mwl8k_cmd_pkt header;
2053 __le16 action;
2054 __le16 threshold;
2055 } __attribute__((packed));
2056
2057 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2058 u16 action, u16 *threshold)
2059 {
2060 struct mwl8k_cmd_rts_threshold *cmd;
2061 int rc;
2062
2063 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2064 if (cmd == NULL)
2065 return -ENOMEM;
2066
2067 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2068 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2069 cmd->action = cpu_to_le16(action);
2070 cmd->threshold = cpu_to_le16(*threshold);
2071
2072 rc = mwl8k_post_cmd(hw, &cmd->header);
2073 kfree(cmd);
2074
2075 return rc;
2076 }
2077
2078 /*
2079 * CMD_SET_EDCA_PARAMS.
2080 */
2081 struct mwl8k_cmd_set_edca_params {
2082 struct mwl8k_cmd_pkt header;
2083
2084 /* See MWL8K_SET_EDCA_XXX below */
2085 __le16 action;
2086
2087 /* TX opportunity in units of 32 us */
2088 __le16 txop;
2089
2090 /* Log exponent of max contention period: 0...15*/
2091 __u8 log_cw_max;
2092
2093 /* Log exponent of min contention period: 0...15 */
2094 __u8 log_cw_min;
2095
2096 /* Adaptive interframe spacing in units of 32us */
2097 __u8 aifs;
2098
2099 /* TX queue to configure */
2100 __u8 txq;
2101 } __attribute__((packed));
2102
2103 #define MWL8K_SET_EDCA_CW 0x01
2104 #define MWL8K_SET_EDCA_TXOP 0x02
2105 #define MWL8K_SET_EDCA_AIFS 0x04
2106
2107 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2108 MWL8K_SET_EDCA_TXOP | \
2109 MWL8K_SET_EDCA_AIFS)
2110
2111 static int
2112 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2113 __u16 cw_min, __u16 cw_max,
2114 __u8 aifs, __u16 txop)
2115 {
2116 struct mwl8k_cmd_set_edca_params *cmd;
2117 int rc;
2118
2119 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2120 if (cmd == NULL)
2121 return -ENOMEM;
2122
2123 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2124 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2125 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2126 cmd->txop = cpu_to_le16(txop);
2127 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
2128 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2129 cmd->aifs = aifs;
2130 cmd->txq = qnum;
2131
2132 rc = mwl8k_post_cmd(hw, &cmd->header);
2133 kfree(cmd);
2134
2135 return rc;
2136 }
2137
2138 /*
2139 * CMD_FINALIZE_JOIN.
2140 */
2141
2142 /* FJ beacon buffer size is compiled into the firmware. */
2143 #define MWL8K_FJ_BEACON_MAXLEN 128
2144
2145 struct mwl8k_cmd_finalize_join {
2146 struct mwl8k_cmd_pkt header;
2147 __le32 sleep_interval; /* Number of beacon periods to sleep */
2148 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2149 } __attribute__((packed));
2150
2151 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2152 __u16 framelen, __u16 dtim)
2153 {
2154 struct mwl8k_cmd_finalize_join *cmd;
2155 struct ieee80211_mgmt *payload = frame;
2156 u16 hdrlen;
2157 u32 payload_len;
2158 int rc;
2159
2160 if (frame == NULL)
2161 return -EINVAL;
2162
2163 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2164 if (cmd == NULL)
2165 return -ENOMEM;
2166
2167 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2168 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2169 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2170
2171 hdrlen = ieee80211_hdrlen(payload->frame_control);
2172
2173 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2174
2175 /* XXX TBD Might just have to abort and return an error */
2176 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2177 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2178 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2179 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2180
2181 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2182 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2183
2184 if (payload && payload_len)
2185 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2186
2187 rc = mwl8k_post_cmd(hw, &cmd->header);
2188 kfree(cmd);
2189 return rc;
2190 }
2191
2192 /*
2193 * CMD_UPDATE_STADB.
2194 */
2195 struct mwl8k_cmd_update_sta_db {
2196 struct mwl8k_cmd_pkt header;
2197
2198 /* See STADB_ACTION_TYPE */
2199 __le32 action;
2200
2201 /* Peer MAC address */
2202 __u8 peer_addr[ETH_ALEN];
2203
2204 __le32 reserved;
2205
2206 /* Peer info - valid during add/update. */
2207 struct peer_capability_info peer_info;
2208 } __attribute__((packed));
2209
2210 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2211 struct ieee80211_vif *vif, __u32 action)
2212 {
2213 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2214 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2215 struct mwl8k_cmd_update_sta_db *cmd;
2216 struct peer_capability_info *peer_info;
2217 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2218 int rc;
2219 __u8 count, *rates;
2220
2221 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2222 if (cmd == NULL)
2223 return -ENOMEM;
2224
2225 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2226 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2227
2228 cmd->action = cpu_to_le32(action);
2229 peer_info = &cmd->peer_info;
2230 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2231
2232 switch (action) {
2233 case MWL8K_STA_DB_ADD_ENTRY:
2234 case MWL8K_STA_DB_MODIFY_ENTRY:
2235 /* Build peer_info block */
2236 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2237 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2238 peer_info->interop = 1;
2239 peer_info->amsdu_enabled = 0;
2240
2241 rates = peer_info->legacy_rates;
2242 for (count = 0; count < mv_vif->legacy_nrates; count++)
2243 rates[count] = bitrates[count].hw_value;
2244
2245 rc = mwl8k_post_cmd(hw, &cmd->header);
2246 if (rc == 0)
2247 mv_vif->peer_id = peer_info->station_id;
2248
2249 break;
2250
2251 case MWL8K_STA_DB_DEL_ENTRY:
2252 case MWL8K_STA_DB_FLUSH:
2253 default:
2254 rc = mwl8k_post_cmd(hw, &cmd->header);
2255 if (rc == 0)
2256 mv_vif->peer_id = 0;
2257 break;
2258 }
2259 kfree(cmd);
2260
2261 return rc;
2262 }
2263
2264 /*
2265 * CMD_SET_AID.
2266 */
2267 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2268
2269 #define MWL8K_FRAME_PROT_DISABLED 0x00
2270 #define MWL8K_FRAME_PROT_11G 0x07
2271 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2272 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2273
2274 struct mwl8k_cmd_update_set_aid {
2275 struct mwl8k_cmd_pkt header;
2276 __le16 aid;
2277
2278 /* AP's MAC address (BSSID) */
2279 __u8 bssid[ETH_ALEN];
2280 __le16 protection_mode;
2281 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2282 } __attribute__((packed));
2283
2284 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2285 struct ieee80211_vif *vif)
2286 {
2287 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2288 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2289 struct mwl8k_cmd_update_set_aid *cmd;
2290 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2291 int count;
2292 u16 prot_mode;
2293 int rc;
2294
2295 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2296 if (cmd == NULL)
2297 return -ENOMEM;
2298
2299 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2300 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2301 cmd->aid = cpu_to_le16(info->aid);
2302
2303 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2304
2305 if (info->use_cts_prot) {
2306 prot_mode = MWL8K_FRAME_PROT_11G;
2307 } else {
2308 switch (info->ht_operation_mode &
2309 IEEE80211_HT_OP_MODE_PROTECTION) {
2310 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2311 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2312 break;
2313 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2314 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2315 break;
2316 default:
2317 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2318 break;
2319 }
2320 }
2321 cmd->protection_mode = cpu_to_le16(prot_mode);
2322
2323 for (count = 0; count < mv_vif->legacy_nrates; count++)
2324 cmd->supp_rates[count] = bitrates[count].hw_value;
2325
2326 rc = mwl8k_post_cmd(hw, &cmd->header);
2327 kfree(cmd);
2328
2329 return rc;
2330 }
2331
2332 /*
2333 * CMD_SET_RATE.
2334 */
2335 struct mwl8k_cmd_update_rateset {
2336 struct mwl8k_cmd_pkt header;
2337 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2338
2339 /* Bitmap for supported MCS codes. */
2340 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2341 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2342 } __attribute__((packed));
2343
2344 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2345 struct ieee80211_vif *vif)
2346 {
2347 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2348 struct mwl8k_cmd_update_rateset *cmd;
2349 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2350 int count;
2351 int rc;
2352
2353 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2354 if (cmd == NULL)
2355 return -ENOMEM;
2356
2357 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2358 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2359
2360 for (count = 0; count < mv_vif->legacy_nrates; count++)
2361 cmd->legacy_rates[count] = bitrates[count].hw_value;
2362
2363 rc = mwl8k_post_cmd(hw, &cmd->header);
2364 kfree(cmd);
2365
2366 return rc;
2367 }
2368
2369 /*
2370 * CMD_USE_FIXED_RATE.
2371 */
2372 #define MWL8K_RATE_TABLE_SIZE 8
2373 #define MWL8K_UCAST_RATE 0
2374 #define MWL8K_USE_AUTO_RATE 0x0002
2375
2376 struct mwl8k_rate_entry {
2377 /* Set to 1 if HT rate, 0 if legacy. */
2378 __le32 is_ht_rate;
2379
2380 /* Set to 1 to use retry_count field. */
2381 __le32 enable_retry;
2382
2383 /* Specified legacy rate or MCS. */
2384 __le32 rate;
2385
2386 /* Number of allowed retries. */
2387 __le32 retry_count;
2388 } __attribute__((packed));
2389
2390 struct mwl8k_rate_table {
2391 /* 1 to allow specified rate and below */
2392 __le32 allow_rate_drop;
2393 __le32 num_rates;
2394 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2395 } __attribute__((packed));
2396
2397 struct mwl8k_cmd_use_fixed_rate {
2398 struct mwl8k_cmd_pkt header;
2399 __le32 action;
2400 struct mwl8k_rate_table rate_table;
2401
2402 /* Unicast, Broadcast or Multicast */
2403 __le32 rate_type;
2404 __le32 reserved1;
2405 __le32 reserved2;
2406 } __attribute__((packed));
2407
2408 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2409 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2410 {
2411 struct mwl8k_cmd_use_fixed_rate *cmd;
2412 int count;
2413 int rc;
2414
2415 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2416 if (cmd == NULL)
2417 return -ENOMEM;
2418
2419 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2420 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2421
2422 cmd->action = cpu_to_le32(action);
2423 cmd->rate_type = cpu_to_le32(rate_type);
2424
2425 if (rate_table != NULL) {
2426 /* Copy over each field manually so
2427 * that bitflipping can be done
2428 */
2429 cmd->rate_table.allow_rate_drop =
2430 cpu_to_le32(rate_table->allow_rate_drop);
2431 cmd->rate_table.num_rates =
2432 cpu_to_le32(rate_table->num_rates);
2433
2434 for (count = 0; count < rate_table->num_rates; count++) {
2435 struct mwl8k_rate_entry *dst =
2436 &cmd->rate_table.rate_entry[count];
2437 struct mwl8k_rate_entry *src =
2438 &rate_table->rate_entry[count];
2439
2440 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2441 dst->enable_retry = cpu_to_le32(src->enable_retry);
2442 dst->rate = cpu_to_le32(src->rate);
2443 dst->retry_count = cpu_to_le32(src->retry_count);
2444 }
2445 }
2446
2447 rc = mwl8k_post_cmd(hw, &cmd->header);
2448 kfree(cmd);
2449
2450 return rc;
2451 }
2452
2453
2454 /*
2455 * Interrupt handling.
2456 */
2457 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2458 {
2459 struct ieee80211_hw *hw = dev_id;
2460 struct mwl8k_priv *priv = hw->priv;
2461 u32 status;
2462
2463 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2464 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2465
2466 if (!status)
2467 return IRQ_NONE;
2468
2469 if (status & MWL8K_A2H_INT_TX_DONE)
2470 tasklet_schedule(&priv->tx_reclaim_task);
2471
2472 if (status & MWL8K_A2H_INT_RX_READY) {
2473 while (rxq_process(hw, 0, 1))
2474 rxq_refill(hw, 0, 1);
2475 }
2476
2477 if (status & MWL8K_A2H_INT_OPC_DONE) {
2478 if (priv->hostcmd_wait != NULL) {
2479 complete(priv->hostcmd_wait);
2480 priv->hostcmd_wait = NULL;
2481 }
2482 }
2483
2484 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2485 if (!priv->inconfig &&
2486 priv->radio_state &&
2487 mwl8k_txq_busy(priv))
2488 mwl8k_tx_start(priv);
2489 }
2490
2491 return IRQ_HANDLED;
2492 }
2493
2494
2495 /*
2496 * Core driver operations.
2497 */
2498 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2499 {
2500 struct mwl8k_priv *priv = hw->priv;
2501 int index = skb_get_queue_mapping(skb);
2502 int rc;
2503
2504 if (priv->current_channel == NULL) {
2505 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2506 "disabled\n", priv->name);
2507 dev_kfree_skb(skb);
2508 return NETDEV_TX_OK;
2509 }
2510
2511 rc = mwl8k_txq_xmit(hw, index, skb);
2512
2513 return rc;
2514 }
2515
2516 struct mwl8k_work_struct {
2517 /* Initialized by mwl8k_queue_work(). */
2518 struct work_struct wt;
2519
2520 /* Required field passed in to mwl8k_queue_work(). */
2521 struct ieee80211_hw *hw;
2522
2523 /* Required field passed in to mwl8k_queue_work(). */
2524 int (*wfunc)(struct work_struct *w);
2525
2526 /* Initialized by mwl8k_queue_work(). */
2527 struct completion *cmd_wait;
2528
2529 /* Result code. */
2530 int rc;
2531
2532 /*
2533 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2534 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2535 */
2536 u32 options;
2537
2538 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2539 unsigned long timeout_ms;
2540
2541 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2542 u32 txwait_attempts;
2543
2544 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2545 u32 tx_timeout_ms;
2546 u32 step;
2547 };
2548
2549 /* Flags controlling behavior of config queue requests */
2550
2551 /* Caller spins while waiting for completion. */
2552 #define MWL8K_WQ_SPIN 0x00000001
2553
2554 /* Wait for TX queues to empty before proceeding with configuration. */
2555 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2556
2557 /* Queue request and return immediately. */
2558 #define MWL8K_WQ_POST_REQUEST 0x00000004
2559
2560 /*
2561 * Caller sleeps and waits for task complete notification.
2562 * Do not use in atomic context.
2563 */
2564 #define MWL8K_WQ_SLEEP 0x00000008
2565
2566 /* Free work struct when task is done. */
2567 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2568
2569 /*
2570 * Config request is queued and returns to caller imediately. Use
2571 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2572 * when this flag is set.
2573 */
2574 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2575 MWL8K_WQ_FREE_WORKSTRUCT)
2576
2577 /* Default work queue behavior is to sleep and wait for tx completion. */
2578 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2579
2580 /*
2581 * Default config request timeout. Add adjustments to make sure the
2582 * config thread waits long enough for both tx wait and cmd wait before
2583 * timing out.
2584 */
2585
2586 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2587 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2588
2589 /* Default number of TX wait attempts. */
2590 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2591
2592 /* Total time to wait for TXQ to drain. */
2593 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2594 MWL8K_WQ_TXWAIT_ATTEMPTS)
2595
2596 /* Scheduling slop. */
2597 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2598
2599 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2600 MWL8K_TXWAIT_MS + \
2601 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2602
2603 static void mwl8k_config_thread(struct work_struct *wt)
2604 {
2605 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2606 struct ieee80211_hw *hw = worker->hw;
2607 struct mwl8k_priv *priv = hw->priv;
2608 int rc = 0;
2609
2610 spin_lock_irq(&priv->tx_lock);
2611 priv->inconfig = true;
2612 spin_unlock_irq(&priv->tx_lock);
2613
2614 ieee80211_stop_queues(hw);
2615
2616 /*
2617 * Wait for host queues to drain before doing PHY
2618 * reconfiguration. This avoids interrupting any in-flight
2619 * DMA transfers to the hardware.
2620 */
2621 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2622 u32 timeout;
2623 u32 time_remaining;
2624 u32 iter;
2625 u32 tx_wait_attempts = worker->txwait_attempts;
2626
2627 time_remaining = worker->tx_timeout_ms;
2628 if (!tx_wait_attempts)
2629 tx_wait_attempts = 1;
2630
2631 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2632 if (!timeout)
2633 timeout = 1;
2634
2635 iter = tx_wait_attempts;
2636 do {
2637 int wait_time;
2638
2639 if (time_remaining > timeout) {
2640 time_remaining -= timeout;
2641 wait_time = timeout;
2642 } else
2643 wait_time = time_remaining;
2644
2645 if (!wait_time)
2646 wait_time = 1;
2647
2648 rc = mwl8k_tx_wait_empty(hw, wait_time);
2649 if (rc)
2650 printk(KERN_ERR "%s() txwait timeout=%ums "
2651 "Retry:%u/%u\n", __func__, timeout,
2652 tx_wait_attempts - iter + 1,
2653 tx_wait_attempts);
2654
2655 } while (rc && --iter);
2656
2657 rc = iter ? 0 : -ETIMEDOUT;
2658 }
2659 if (!rc)
2660 rc = worker->wfunc(wt);
2661
2662 spin_lock_irq(&priv->tx_lock);
2663 priv->inconfig = false;
2664 if (priv->pending_tx_pkts && priv->radio_state)
2665 mwl8k_tx_start(priv);
2666 spin_unlock_irq(&priv->tx_lock);
2667 ieee80211_wake_queues(hw);
2668
2669 worker->rc = rc;
2670 if (worker->options & MWL8K_WQ_SLEEP)
2671 complete(worker->cmd_wait);
2672
2673 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2674 kfree(wt);
2675 }
2676
2677 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2678 struct mwl8k_work_struct *worker,
2679 struct workqueue_struct *wqueue,
2680 int (*wfunc)(struct work_struct *w))
2681 {
2682 unsigned long timeout = 0;
2683 int rc = 0;
2684
2685 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2686
2687 if (!worker->timeout_ms)
2688 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2689
2690 if (!worker->options)
2691 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2692
2693 if (!worker->txwait_attempts)
2694 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2695
2696 if (!worker->tx_timeout_ms)
2697 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2698
2699 worker->hw = hw;
2700 worker->cmd_wait = &cmd_wait;
2701 worker->rc = 1;
2702 worker->wfunc = wfunc;
2703
2704 INIT_WORK(&worker->wt, mwl8k_config_thread);
2705 queue_work(wqueue, &worker->wt);
2706
2707 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2708 rc = 0;
2709 } else {
2710 if (worker->options & MWL8K_WQ_SPIN) {
2711 timeout = worker->timeout_ms;
2712 while (timeout && (worker->rc > 0)) {
2713 mdelay(1);
2714 timeout--;
2715 }
2716 } else if (worker->options & MWL8K_WQ_SLEEP)
2717 timeout = wait_for_completion_timeout(&cmd_wait,
2718 msecs_to_jiffies(worker->timeout_ms));
2719
2720 if (timeout)
2721 rc = worker->rc;
2722 else {
2723 cancel_work_sync(&worker->wt);
2724 rc = -ETIMEDOUT;
2725 }
2726 }
2727
2728 return rc;
2729 }
2730
2731 struct mwl8k_start_worker {
2732 struct mwl8k_work_struct header;
2733 };
2734
2735 static int mwl8k_start_wt(struct work_struct *wt)
2736 {
2737 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2738 struct ieee80211_hw *hw = worker->header.hw;
2739 struct mwl8k_priv *priv = hw->priv;
2740 int rc = 0;
2741
2742 if (priv->vif != NULL) {
2743 rc = -EIO;
2744 goto mwl8k_start_exit;
2745 }
2746
2747 /* Turn on radio */
2748 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2749 rc = -EIO;
2750 goto mwl8k_start_exit;
2751 }
2752
2753 /* Purge TX/RX HW queues */
2754 if (mwl8k_cmd_set_pre_scan(hw)) {
2755 rc = -EIO;
2756 goto mwl8k_start_exit;
2757 }
2758
2759 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2760 rc = -EIO;
2761 goto mwl8k_start_exit;
2762 }
2763
2764 /* Enable firmware rate adaptation */
2765 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2766 rc = -EIO;
2767 goto mwl8k_start_exit;
2768 }
2769
2770 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2771 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2772 rc = -EIO;
2773 goto mwl8k_start_exit;
2774 }
2775
2776 /* Disable sniffer mode */
2777 if (mwl8k_enable_sniffer(hw, 0))
2778 rc = -EIO;
2779
2780 mwl8k_start_exit:
2781 return rc;
2782 }
2783
2784 static int mwl8k_start(struct ieee80211_hw *hw)
2785 {
2786 struct mwl8k_start_worker *worker;
2787 struct mwl8k_priv *priv = hw->priv;
2788 int rc;
2789
2790 /* Enable tx reclaim tasklet */
2791 tasklet_enable(&priv->tx_reclaim_task);
2792
2793 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2794 IRQF_SHARED, MWL8K_NAME, hw);
2795 if (rc) {
2796 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2797 priv->name);
2798 rc = -EIO;
2799 goto mwl8k_start_disable_tasklet;
2800 }
2801
2802 /* Enable interrupts */
2803 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2804
2805 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2806 if (worker == NULL) {
2807 rc = -ENOMEM;
2808 goto mwl8k_start_disable_irq;
2809 }
2810
2811 rc = mwl8k_queue_work(hw, &worker->header,
2812 priv->config_wq, mwl8k_start_wt);
2813 kfree(worker);
2814 if (!rc)
2815 return rc;
2816
2817 if (rc == -ETIMEDOUT)
2818 printk(KERN_ERR "%s() timed out\n", __func__);
2819
2820 rc = -EIO;
2821
2822 mwl8k_start_disable_irq:
2823 spin_lock_irq(&priv->tx_lock);
2824 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2825 spin_unlock_irq(&priv->tx_lock);
2826 free_irq(priv->pdev->irq, hw);
2827
2828 mwl8k_start_disable_tasklet:
2829 tasklet_disable(&priv->tx_reclaim_task);
2830
2831 return rc;
2832 }
2833
2834 struct mwl8k_stop_worker {
2835 struct mwl8k_work_struct header;
2836 };
2837
2838 static int mwl8k_stop_wt(struct work_struct *wt)
2839 {
2840 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2841 struct ieee80211_hw *hw = worker->header.hw;
2842 int rc;
2843
2844 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2845
2846 return rc;
2847 }
2848
2849 static void mwl8k_stop(struct ieee80211_hw *hw)
2850 {
2851 int rc;
2852 struct mwl8k_stop_worker *worker;
2853 struct mwl8k_priv *priv = hw->priv;
2854 int i;
2855
2856 if (priv->vif != NULL)
2857 return;
2858
2859 ieee80211_stop_queues(hw);
2860
2861 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2862 if (worker == NULL)
2863 return;
2864
2865 rc = mwl8k_queue_work(hw, &worker->header,
2866 priv->config_wq, mwl8k_stop_wt);
2867 kfree(worker);
2868 if (rc == -ETIMEDOUT)
2869 printk(KERN_ERR "%s() timed out\n", __func__);
2870
2871 /* Disable interrupts */
2872 spin_lock_irq(&priv->tx_lock);
2873 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2874 spin_unlock_irq(&priv->tx_lock);
2875 free_irq(priv->pdev->irq, hw);
2876
2877 /* Stop finalize join worker */
2878 cancel_work_sync(&priv->finalize_join_worker);
2879 if (priv->beacon_skb != NULL)
2880 dev_kfree_skb(priv->beacon_skb);
2881
2882 /* Stop tx reclaim tasklet */
2883 tasklet_disable(&priv->tx_reclaim_task);
2884
2885 /* Stop config thread */
2886 flush_workqueue(priv->config_wq);
2887
2888 /* Return all skbs to mac80211 */
2889 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2890 mwl8k_txq_reclaim(hw, i, 1);
2891 }
2892
2893 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2894 struct ieee80211_if_init_conf *conf)
2895 {
2896 struct mwl8k_priv *priv = hw->priv;
2897 struct mwl8k_vif *mwl8k_vif;
2898
2899 /*
2900 * We only support one active interface at a time.
2901 */
2902 if (priv->vif != NULL)
2903 return -EBUSY;
2904
2905 /*
2906 * We only support managed interfaces for now.
2907 */
2908 if (conf->type != NL80211_IFTYPE_STATION &&
2909 conf->type != NL80211_IFTYPE_MONITOR)
2910 return -EINVAL;
2911
2912 /* Clean out driver private area */
2913 mwl8k_vif = MWL8K_VIF(conf->vif);
2914 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2915
2916 /* Save the mac address */
2917 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2918
2919 /* Back pointer to parent config block */
2920 mwl8k_vif->priv = priv;
2921
2922 /* Setup initial PHY parameters */
2923 memcpy(mwl8k_vif->legacy_rates,
2924 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2925 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2926
2927 /* Set Initial sequence number to zero */
2928 mwl8k_vif->seqno = 0;
2929
2930 priv->vif = conf->vif;
2931 priv->current_channel = NULL;
2932
2933 return 0;
2934 }
2935
2936 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2937 struct ieee80211_if_init_conf *conf)
2938 {
2939 struct mwl8k_priv *priv = hw->priv;
2940
2941 if (priv->vif == NULL)
2942 return;
2943
2944 priv->vif = NULL;
2945 }
2946
2947 struct mwl8k_config_worker {
2948 struct mwl8k_work_struct header;
2949 u32 changed;
2950 };
2951
2952 static int mwl8k_config_wt(struct work_struct *wt)
2953 {
2954 struct mwl8k_config_worker *worker =
2955 (struct mwl8k_config_worker *)wt;
2956 struct ieee80211_hw *hw = worker->header.hw;
2957 struct ieee80211_conf *conf = &hw->conf;
2958 struct mwl8k_priv *priv = hw->priv;
2959 int rc = 0;
2960
2961 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2962 rc = -EINVAL;
2963 goto mwl8k_config_exit;
2964 }
2965
2966 priv->current_channel = conf->channel;
2967
2968 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
2969 rc = -EINVAL;
2970 goto mwl8k_config_exit;
2971 }
2972
2973 if (conf->power_level > 18)
2974 conf->power_level = 18;
2975 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
2976 rc = -EINVAL;
2977 goto mwl8k_config_exit;
2978 }
2979
2980 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2981 rc = -EINVAL;
2982
2983 mwl8k_config_exit:
2984 return rc;
2985 }
2986
2987 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2988 {
2989 int rc = 0;
2990 struct mwl8k_config_worker *worker;
2991 struct mwl8k_priv *priv = hw->priv;
2992
2993 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2994 if (worker == NULL)
2995 return -ENOMEM;
2996
2997 worker->changed = changed;
2998 rc = mwl8k_queue_work(hw, &worker->header,
2999 priv->config_wq, mwl8k_config_wt);
3000 if (rc == -ETIMEDOUT) {
3001 printk(KERN_ERR "%s() timed out.\n", __func__);
3002 rc = -EINVAL;
3003 }
3004
3005 kfree(worker);
3006
3007 /*
3008 * mac80211 will crash on anything other than -EINVAL on
3009 * error. Looks like wireless extensions which calls mac80211
3010 * may be the actual culprit...
3011 */
3012 return rc ? -EINVAL : 0;
3013 }
3014
3015 struct mwl8k_bss_info_changed_worker {
3016 struct mwl8k_work_struct header;
3017 struct ieee80211_vif *vif;
3018 struct ieee80211_bss_conf *info;
3019 u32 changed;
3020 };
3021
3022 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3023 {
3024 struct mwl8k_bss_info_changed_worker *worker =
3025 (struct mwl8k_bss_info_changed_worker *)wt;
3026 struct ieee80211_hw *hw = worker->header.hw;
3027 struct ieee80211_vif *vif = worker->vif;
3028 struct ieee80211_bss_conf *info = worker->info;
3029 u32 changed;
3030 int rc;
3031
3032 struct mwl8k_priv *priv = hw->priv;
3033 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3034
3035 changed = worker->changed;
3036 priv->capture_beacon = false;
3037
3038 if (info->assoc) {
3039 memcpy(&mwl8k_vif->bss_info, info,
3040 sizeof(struct ieee80211_bss_conf));
3041
3042 /* Install rates */
3043 if (mwl8k_update_rateset(hw, vif))
3044 goto mwl8k_bss_info_changed_exit;
3045
3046 /* Turn on rate adaptation */
3047 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3048 MWL8K_UCAST_RATE, NULL))
3049 goto mwl8k_bss_info_changed_exit;
3050
3051 /* Set radio preamble */
3052 if (mwl8k_set_radio_preamble(hw,
3053 info->use_short_preamble))
3054 goto mwl8k_bss_info_changed_exit;
3055
3056 /* Set slot time */
3057 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3058 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3059 goto mwl8k_bss_info_changed_exit;
3060
3061 /* Update peer rate info */
3062 if (mwl8k_cmd_update_sta_db(hw, vif,
3063 MWL8K_STA_DB_MODIFY_ENTRY))
3064 goto mwl8k_bss_info_changed_exit;
3065
3066 /* Set AID */
3067 if (mwl8k_cmd_set_aid(hw, vif))
3068 goto mwl8k_bss_info_changed_exit;
3069
3070 /*
3071 * Finalize the join. Tell rx handler to process
3072 * next beacon from our BSSID.
3073 */
3074 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
3075 priv->capture_beacon = true;
3076 } else {
3077 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3078 memset(&mwl8k_vif->bss_info, 0,
3079 sizeof(struct ieee80211_bss_conf));
3080 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
3081 }
3082
3083 mwl8k_bss_info_changed_exit:
3084 rc = 0;
3085 return rc;
3086 }
3087
3088 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3089 struct ieee80211_vif *vif,
3090 struct ieee80211_bss_conf *info,
3091 u32 changed)
3092 {
3093 struct mwl8k_bss_info_changed_worker *worker;
3094 struct mwl8k_priv *priv = hw->priv;
3095 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3096 int rc;
3097
3098 if (changed & BSS_CHANGED_BSSID)
3099 memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
3100
3101 if ((changed & BSS_CHANGED_ASSOC) == 0)
3102 return;
3103
3104 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3105 if (worker == NULL)
3106 return;
3107
3108 worker->vif = vif;
3109 worker->info = info;
3110 worker->changed = changed;
3111 rc = mwl8k_queue_work(hw, &worker->header,
3112 priv->config_wq,
3113 mwl8k_bss_info_changed_wt);
3114 kfree(worker);
3115 if (rc == -ETIMEDOUT)
3116 printk(KERN_ERR "%s() timed out\n", __func__);
3117 }
3118
3119 struct mwl8k_configure_filter_worker {
3120 struct mwl8k_work_struct header;
3121 unsigned int changed_flags;
3122 unsigned int *total_flags;
3123 int mc_count;
3124 struct dev_addr_list *mclist;
3125 };
3126
3127 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3128
3129 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3130 {
3131 struct mwl8k_configure_filter_worker *worker =
3132 (struct mwl8k_configure_filter_worker *)wt;
3133
3134 struct ieee80211_hw *hw = worker->header.hw;
3135 unsigned int changed_flags = worker->changed_flags;
3136 unsigned int *total_flags = worker->total_flags;
3137 int mc_count = worker->mc_count;
3138 struct dev_addr_list *mclist = worker->mclist;
3139
3140 struct mwl8k_priv *priv = hw->priv;
3141 int rc = 0;
3142
3143 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3144 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3145 rc = mwl8k_cmd_set_pre_scan(hw);
3146 else {
3147 u8 *bssid;
3148
3149 bssid = "\x00\x00\x00\x00\x00\x00";
3150 if (priv->vif != NULL)
3151 bssid = MWL8K_VIF(priv->vif)->bssid;
3152
3153 rc = mwl8k_cmd_set_post_scan(hw, bssid);
3154 }
3155 }
3156
3157 if (rc)
3158 goto mwl8k_configure_filter_exit;
3159 if (mc_count) {
3160 if (mc_count > priv->num_mcaddrs)
3161 mc_count = priv->num_mcaddrs;
3162
3163 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3164 if (rc)
3165 printk(KERN_ERR
3166 "%s()Error setting multicast addresses\n",
3167 __func__);
3168 }
3169
3170 mwl8k_configure_filter_exit:
3171 return rc;
3172 }
3173
3174 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3175 int mc_count, struct dev_addr_list *mclist)
3176 {
3177 struct mwl8k_configure_filter_worker *worker;
3178
3179 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3180
3181 if (!worker)
3182 return 0;
3183
3184 /*
3185 * XXX: This is _HORRIBLY_ broken!!
3186 *
3187 * No locking, the mclist pointer might be invalid as soon as this
3188 * function returns, something in the list might be invalidated
3189 * once we get to the worker, etc...
3190 */
3191 worker->mc_count = mc_count;
3192 worker->mclist = mclist;
3193
3194 return (u64)worker;
3195 }
3196
3197 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3198 unsigned int changed_flags,
3199 unsigned int *total_flags,
3200 u64 multicast)
3201 {
3202
3203 struct mwl8k_configure_filter_worker *worker = (void *)multicast;
3204 struct mwl8k_priv *priv = hw->priv;
3205
3206 /* Clear unsupported feature flags */
3207 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3208
3209 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
3210 return;
3211
3212 if (worker == NULL)
3213 return;
3214
3215 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3216 worker->changed_flags = changed_flags;
3217 worker->total_flags = total_flags;
3218
3219 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3220 mwl8k_configure_filter_wt);
3221 }
3222
3223 struct mwl8k_set_rts_threshold_worker {
3224 struct mwl8k_work_struct header;
3225 u32 value;
3226 };
3227
3228 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3229 {
3230 struct mwl8k_set_rts_threshold_worker *worker =
3231 (struct mwl8k_set_rts_threshold_worker *)wt;
3232
3233 struct ieee80211_hw *hw = worker->header.hw;
3234 u16 threshold = (u16)(worker->value);
3235 int rc;
3236
3237 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3238
3239 return rc;
3240 }
3241
3242 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3243 {
3244 int rc;
3245 struct mwl8k_set_rts_threshold_worker *worker;
3246 struct mwl8k_priv *priv = hw->priv;
3247
3248 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3249 if (worker == NULL)
3250 return -ENOMEM;
3251
3252 worker->value = value;
3253
3254 rc = mwl8k_queue_work(hw, &worker->header,
3255 priv->config_wq,
3256 mwl8k_set_rts_threshold_wt);
3257 kfree(worker);
3258
3259 if (rc == -ETIMEDOUT) {
3260 printk(KERN_ERR "%s() timed out\n", __func__);
3261 rc = -EINVAL;
3262 }
3263
3264 return rc;
3265 }
3266
3267 struct mwl8k_conf_tx_worker {
3268 struct mwl8k_work_struct header;
3269 u16 queue;
3270 const struct ieee80211_tx_queue_params *params;
3271 };
3272
3273 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3274 {
3275 struct mwl8k_conf_tx_worker *worker =
3276 (struct mwl8k_conf_tx_worker *)wt;
3277
3278 struct ieee80211_hw *hw = worker->header.hw;
3279 u16 queue = worker->queue;
3280 const struct ieee80211_tx_queue_params *params = worker->params;
3281
3282 struct mwl8k_priv *priv = hw->priv;
3283 int rc = 0;
3284
3285 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3286 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3287 rc = -EINVAL;
3288 goto mwl8k_conf_tx_exit;
3289 }
3290
3291 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3292 params->cw_max, params->aifs, params->txop))
3293 rc = -EINVAL;
3294 mwl8k_conf_tx_exit:
3295 return rc;
3296 }
3297
3298 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3299 const struct ieee80211_tx_queue_params *params)
3300 {
3301 int rc;
3302 struct mwl8k_conf_tx_worker *worker;
3303 struct mwl8k_priv *priv = hw->priv;
3304
3305 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3306 if (worker == NULL)
3307 return -ENOMEM;
3308
3309 worker->queue = queue;
3310 worker->params = params;
3311 rc = mwl8k_queue_work(hw, &worker->header,
3312 priv->config_wq, mwl8k_conf_tx_wt);
3313 kfree(worker);
3314 if (rc == -ETIMEDOUT) {
3315 printk(KERN_ERR "%s() timed out\n", __func__);
3316 rc = -EINVAL;
3317 }
3318 return rc;
3319 }
3320
3321 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3322 struct ieee80211_tx_queue_stats *stats)
3323 {
3324 struct mwl8k_priv *priv = hw->priv;
3325 struct mwl8k_tx_queue *txq;
3326 int index;
3327
3328 spin_lock_bh(&priv->tx_lock);
3329 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3330 txq = priv->txq + index;
3331 memcpy(&stats[index], &txq->tx_stats,
3332 sizeof(struct ieee80211_tx_queue_stats));
3333 }
3334 spin_unlock_bh(&priv->tx_lock);
3335 return 0;
3336 }
3337
3338 struct mwl8k_get_stats_worker {
3339 struct mwl8k_work_struct header;
3340 struct ieee80211_low_level_stats *stats;
3341 };
3342
3343 static int mwl8k_get_stats_wt(struct work_struct *wt)
3344 {
3345 struct mwl8k_get_stats_worker *worker =
3346 (struct mwl8k_get_stats_worker *)wt;
3347
3348 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3349 }
3350
3351 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3352 struct ieee80211_low_level_stats *stats)
3353 {
3354 int rc;
3355 struct mwl8k_get_stats_worker *worker;
3356 struct mwl8k_priv *priv = hw->priv;
3357
3358 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3359 if (worker == NULL)
3360 return -ENOMEM;
3361
3362 worker->stats = stats;
3363 rc = mwl8k_queue_work(hw, &worker->header,
3364 priv->config_wq, mwl8k_get_stats_wt);
3365
3366 kfree(worker);
3367 if (rc == -ETIMEDOUT) {
3368 printk(KERN_ERR "%s() timed out\n", __func__);
3369 rc = -EINVAL;
3370 }
3371
3372 return rc;
3373 }
3374
3375 static const struct ieee80211_ops mwl8k_ops = {
3376 .tx = mwl8k_tx,
3377 .start = mwl8k_start,
3378 .stop = mwl8k_stop,
3379 .add_interface = mwl8k_add_interface,
3380 .remove_interface = mwl8k_remove_interface,
3381 .config = mwl8k_config,
3382 .bss_info_changed = mwl8k_bss_info_changed,
3383 .prepare_multicast = mwl8k_prepare_multicast,
3384 .configure_filter = mwl8k_configure_filter,
3385 .set_rts_threshold = mwl8k_set_rts_threshold,
3386 .conf_tx = mwl8k_conf_tx,
3387 .get_tx_stats = mwl8k_get_tx_stats,
3388 .get_stats = mwl8k_get_stats,
3389 };
3390
3391 static void mwl8k_tx_reclaim_handler(unsigned long data)
3392 {
3393 int i;
3394 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3395 struct mwl8k_priv *priv = hw->priv;
3396
3397 spin_lock_bh(&priv->tx_lock);
3398 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3399 mwl8k_txq_reclaim(hw, i, 0);
3400
3401 if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
3402 complete(priv->tx_wait);
3403 priv->tx_wait = NULL;
3404 }
3405 spin_unlock_bh(&priv->tx_lock);
3406 }
3407
3408 static void mwl8k_finalize_join_worker(struct work_struct *work)
3409 {
3410 struct mwl8k_priv *priv =
3411 container_of(work, struct mwl8k_priv, finalize_join_worker);
3412 struct sk_buff *skb = priv->beacon_skb;
3413 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3414
3415 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3416 dev_kfree_skb(skb);
3417
3418 priv->beacon_skb = NULL;
3419 }
3420
3421 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3422 const struct pci_device_id *id)
3423 {
3424 struct ieee80211_hw *hw;
3425 struct mwl8k_priv *priv;
3426 int rc;
3427 int i;
3428 u8 *fw;
3429
3430 rc = pci_enable_device(pdev);
3431 if (rc) {
3432 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3433 MWL8K_NAME);
3434 return rc;
3435 }
3436
3437 rc = pci_request_regions(pdev, MWL8K_NAME);
3438 if (rc) {
3439 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3440 MWL8K_NAME);
3441 return rc;
3442 }
3443
3444 pci_set_master(pdev);
3445
3446 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3447 if (hw == NULL) {
3448 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3449 rc = -ENOMEM;
3450 goto err_free_reg;
3451 }
3452
3453 priv = hw->priv;
3454 priv->hw = hw;
3455 priv->pdev = pdev;
3456 priv->hostcmd_wait = NULL;
3457 priv->tx_wait = NULL;
3458 priv->inconfig = false;
3459 priv->wmm_mode = false;
3460 priv->pending_tx_pkts = 0;
3461 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3462
3463 spin_lock_init(&priv->fw_lock);
3464
3465 SET_IEEE80211_DEV(hw, &pdev->dev);
3466 pci_set_drvdata(pdev, hw);
3467
3468 priv->regs = pci_iomap(pdev, 1, 0x10000);
3469 if (priv->regs == NULL) {
3470 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3471 goto err_iounmap;
3472 }
3473
3474 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3475 priv->band.band = IEEE80211_BAND_2GHZ;
3476 priv->band.channels = priv->channels;
3477 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3478 priv->band.bitrates = priv->rates;
3479 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3480 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3481
3482 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3483 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3484
3485 /*
3486 * Extra headroom is the size of the required DMA header
3487 * minus the size of the smallest 802.11 frame (CTS frame).
3488 */
3489 hw->extra_tx_headroom =
3490 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3491
3492 hw->channel_change_time = 10;
3493
3494 hw->queues = MWL8K_TX_QUEUES;
3495
3496 hw->wiphy->interface_modes =
3497 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3498
3499 /* Set rssi and noise values to dBm */
3500 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3501 hw->vif_data_size = sizeof(struct mwl8k_vif);
3502 priv->vif = NULL;
3503
3504 /* Set default radio state and preamble */
3505 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3506 priv->radio_state = MWL8K_RADIO_DISABLE;
3507
3508 /* Finalize join worker */
3509 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3510
3511 /* TX reclaim tasklet */
3512 tasklet_init(&priv->tx_reclaim_task,
3513 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3514 tasklet_disable(&priv->tx_reclaim_task);
3515
3516 /* Config workthread */
3517 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3518 if (priv->config_wq == NULL)
3519 goto err_iounmap;
3520
3521 /* Power management cookie */
3522 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3523 if (priv->cookie == NULL)
3524 goto err_iounmap;
3525
3526 rc = mwl8k_rxq_init(hw, 0);
3527 if (rc)
3528 goto err_iounmap;
3529 rxq_refill(hw, 0, INT_MAX);
3530
3531 spin_lock_init(&priv->tx_lock);
3532
3533 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3534 rc = mwl8k_txq_init(hw, i);
3535 if (rc)
3536 goto err_free_queues;
3537 }
3538
3539 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3540 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3541 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3542 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3543
3544 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3545 IRQF_SHARED, MWL8K_NAME, hw);
3546 if (rc) {
3547 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3548 priv->name);
3549 goto err_free_queues;
3550 }
3551
3552 /* Reset firmware and hardware */
3553 mwl8k_hw_reset(priv);
3554
3555 /* Ask userland hotplug daemon for the device firmware */
3556 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3557 if (rc) {
3558 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3559 goto err_free_irq;
3560 }
3561
3562 /* Load firmware into hardware */
3563 rc = mwl8k_load_firmware(priv);
3564 if (rc) {
3565 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3566 goto err_stop_firmware;
3567 }
3568
3569 /* Reclaim memory once firmware is successfully loaded */
3570 mwl8k_release_firmware(priv);
3571
3572 /*
3573 * Temporarily enable interrupts. Initial firmware host
3574 * commands use interrupts and avoids polling. Disable
3575 * interrupts when done.
3576 */
3577 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3578
3579 /* Get config data, mac addrs etc */
3580 rc = mwl8k_cmd_get_hw_spec(hw);
3581 if (rc) {
3582 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3583 goto err_stop_firmware;
3584 }
3585
3586 /* Turn radio off */
3587 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3588 if (rc) {
3589 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3590 goto err_stop_firmware;
3591 }
3592
3593 /* Disable interrupts */
3594 spin_lock_irq(&priv->tx_lock);
3595 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3596 spin_unlock_irq(&priv->tx_lock);
3597 free_irq(priv->pdev->irq, hw);
3598
3599 rc = ieee80211_register_hw(hw);
3600 if (rc) {
3601 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3602 goto err_stop_firmware;
3603 }
3604
3605 fw = (u8 *)&priv->fw_rev;
3606 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3607 MWL8K_DESC);
3608 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3609 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3610 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3611 hw->wiphy->perm_addr);
3612
3613 return 0;
3614
3615 err_stop_firmware:
3616 mwl8k_hw_reset(priv);
3617 mwl8k_release_firmware(priv);
3618
3619 err_free_irq:
3620 spin_lock_irq(&priv->tx_lock);
3621 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3622 spin_unlock_irq(&priv->tx_lock);
3623 free_irq(priv->pdev->irq, hw);
3624
3625 err_free_queues:
3626 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3627 mwl8k_txq_deinit(hw, i);
3628 mwl8k_rxq_deinit(hw, 0);
3629
3630 err_iounmap:
3631 if (priv->cookie != NULL)
3632 pci_free_consistent(priv->pdev, 4,
3633 priv->cookie, priv->cookie_dma);
3634
3635 if (priv->regs != NULL)
3636 pci_iounmap(pdev, priv->regs);
3637
3638 if (priv->config_wq != NULL)
3639 destroy_workqueue(priv->config_wq);
3640
3641 pci_set_drvdata(pdev, NULL);
3642 ieee80211_free_hw(hw);
3643
3644 err_free_reg:
3645 pci_release_regions(pdev);
3646 pci_disable_device(pdev);
3647
3648 return rc;
3649 }
3650
3651 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3652 {
3653 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3654 }
3655
3656 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3657 {
3658 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3659 struct mwl8k_priv *priv;
3660 int i;
3661
3662 if (hw == NULL)
3663 return;
3664 priv = hw->priv;
3665
3666 ieee80211_stop_queues(hw);
3667
3668 ieee80211_unregister_hw(hw);
3669
3670 /* Remove tx reclaim tasklet */
3671 tasklet_kill(&priv->tx_reclaim_task);
3672
3673 /* Stop config thread */
3674 destroy_workqueue(priv->config_wq);
3675
3676 /* Stop hardware */
3677 mwl8k_hw_reset(priv);
3678
3679 /* Return all skbs to mac80211 */
3680 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3681 mwl8k_txq_reclaim(hw, i, 1);
3682
3683 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3684 mwl8k_txq_deinit(hw, i);
3685
3686 mwl8k_rxq_deinit(hw, 0);
3687
3688 pci_free_consistent(priv->pdev, 4,
3689 priv->cookie, priv->cookie_dma);
3690
3691 pci_iounmap(pdev, priv->regs);
3692 pci_set_drvdata(pdev, NULL);
3693 ieee80211_free_hw(hw);
3694 pci_release_regions(pdev);
3695 pci_disable_device(pdev);
3696 }
3697
3698 static struct pci_driver mwl8k_driver = {
3699 .name = MWL8K_NAME,
3700 .id_table = mwl8k_table,
3701 .probe = mwl8k_probe,
3702 .remove = __devexit_p(mwl8k_remove),
3703 .shutdown = __devexit_p(mwl8k_shutdown),
3704 };
3705
3706 static int __init mwl8k_init(void)
3707 {
3708 return pci_register_driver(&mwl8k_driver);
3709 }
3710
3711 static void __exit mwl8k_exit(void)
3712 {
3713 pci_unregister_driver(&mwl8k_driver);
3714 }
3715
3716 module_init(mwl8k_init);
3717 module_exit(mwl8k_exit);
Motorola kernel-slsi