2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
83 struct mwl8k_device_info
{
89 struct mwl8k_rx_queue
{
92 /* hw receives here */
95 /* refill descs here */
98 struct mwl8k_rx_desc
*rxd
;
100 struct sk_buff
**skb
;
103 struct mwl8k_tx_queue
{
104 /* hw transmits here */
107 /* sw appends here */
110 struct ieee80211_tx_queue_stats stats
;
111 struct mwl8k_tx_desc
*txd
;
113 struct sk_buff
**skb
;
116 /* Pointers to the firmware data and meta information about it. */
117 struct mwl8k_firmware
{
118 /* Boot helper code */
119 struct firmware
*helper
;
122 struct firmware
*ucode
;
128 struct ieee80211_hw
*hw
;
130 struct pci_dev
*pdev
;
132 struct mwl8k_device_info
*device_info
;
135 /* firmware files and meta data */
136 struct mwl8k_firmware fw
;
138 /* firmware access */
139 struct mutex fw_mutex
;
140 struct task_struct
*fw_mutex_owner
;
142 struct completion
*hostcmd_wait
;
144 /* lock held over TX and TX reap */
147 /* TX quiesce completion, protected by fw_mutex and tx_lock */
148 struct completion
*tx_wait
;
150 struct ieee80211_vif
*vif
;
152 struct ieee80211_channel
*current_channel
;
154 /* power management status cookie from firmware */
156 dma_addr_t cookie_dma
;
163 * Running count of TX packets in flight, to avoid
164 * iterating over the transmit rings each time.
168 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
169 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
172 struct ieee80211_supported_band band
;
173 struct ieee80211_channel channels
[14];
174 struct ieee80211_rate rates
[13];
177 bool radio_short_preamble
;
178 bool sniffer_enabled
;
181 /* XXX need to convert this to handle multiple interfaces */
183 u8 capture_bssid
[ETH_ALEN
];
184 struct sk_buff
*beacon_skb
;
187 * This FJ worker has to be global as it is scheduled from the
188 * RX handler. At this point we don't know which interface it
189 * belongs to until the list of bssids waiting to complete join
192 struct work_struct finalize_join_worker
;
194 /* Tasklet to reclaim TX descriptors and buffers after tx */
195 struct tasklet_struct tx_reclaim_task
;
198 /* Per interface specific private data */
200 /* backpointer to parent config block */
201 struct mwl8k_priv
*priv
;
203 /* BSS config of AP or IBSS from mac80211*/
204 struct ieee80211_bss_conf bss_info
;
206 /* BSSID of AP or IBSS */
208 u8 mac_addr
[ETH_ALEN
];
211 * Subset of supported legacy rates.
212 * Intersection of AP and STA supported rates.
214 struct ieee80211_rate legacy_rates
[13];
216 /* number of supported legacy rates */
219 /* Index into station database.Returned by update_sta_db call */
222 /* Non AMPDU sequence number assigned by driver */
226 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
228 static const struct ieee80211_channel mwl8k_channels
[] = {
229 { .center_freq
= 2412, .hw_value
= 1, },
230 { .center_freq
= 2417, .hw_value
= 2, },
231 { .center_freq
= 2422, .hw_value
= 3, },
232 { .center_freq
= 2427, .hw_value
= 4, },
233 { .center_freq
= 2432, .hw_value
= 5, },
234 { .center_freq
= 2437, .hw_value
= 6, },
235 { .center_freq
= 2442, .hw_value
= 7, },
236 { .center_freq
= 2447, .hw_value
= 8, },
237 { .center_freq
= 2452, .hw_value
= 9, },
238 { .center_freq
= 2457, .hw_value
= 10, },
239 { .center_freq
= 2462, .hw_value
= 11, },
242 static const struct ieee80211_rate mwl8k_rates
[] = {
243 { .bitrate
= 10, .hw_value
= 2, },
244 { .bitrate
= 20, .hw_value
= 4, },
245 { .bitrate
= 55, .hw_value
= 11, },
246 { .bitrate
= 110, .hw_value
= 22, },
247 { .bitrate
= 220, .hw_value
= 44, },
248 { .bitrate
= 60, .hw_value
= 12, },
249 { .bitrate
= 90, .hw_value
= 18, },
250 { .bitrate
= 120, .hw_value
= 24, },
251 { .bitrate
= 180, .hw_value
= 36, },
252 { .bitrate
= 240, .hw_value
= 48, },
253 { .bitrate
= 360, .hw_value
= 72, },
254 { .bitrate
= 480, .hw_value
= 96, },
255 { .bitrate
= 540, .hw_value
= 108, },
258 /* Set or get info from Firmware */
259 #define MWL8K_CMD_SET 0x0001
260 #define MWL8K_CMD_GET 0x0000
262 /* Firmware command codes */
263 #define MWL8K_CMD_CODE_DNLD 0x0001
264 #define MWL8K_CMD_GET_HW_SPEC 0x0003
265 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
266 #define MWL8K_CMD_GET_STAT 0x0014
267 #define MWL8K_CMD_RADIO_CONTROL 0x001c
268 #define MWL8K_CMD_RF_TX_POWER 0x001e
269 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
270 #define MWL8K_CMD_SET_POST_SCAN 0x0108
271 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
272 #define MWL8K_CMD_SET_AID 0x010d
273 #define MWL8K_CMD_SET_RATE 0x0110
274 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
275 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
276 #define MWL8K_CMD_SET_SLOT 0x0114
277 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
278 #define MWL8K_CMD_SET_WMM_MODE 0x0123
279 #define MWL8K_CMD_MIMO_CONFIG 0x0125
280 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
281 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
282 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
283 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
284 #define MWL8K_CMD_UPDATE_STADB 0x1123
286 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
288 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
289 snprintf(buf, bufsize, "%s", #x);\
292 switch (cmd
& ~0x8000) {
293 MWL8K_CMDNAME(CODE_DNLD
);
294 MWL8K_CMDNAME(GET_HW_SPEC
);
295 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
296 MWL8K_CMDNAME(GET_STAT
);
297 MWL8K_CMDNAME(RADIO_CONTROL
);
298 MWL8K_CMDNAME(RF_TX_POWER
);
299 MWL8K_CMDNAME(SET_PRE_SCAN
);
300 MWL8K_CMDNAME(SET_POST_SCAN
);
301 MWL8K_CMDNAME(SET_RF_CHANNEL
);
302 MWL8K_CMDNAME(SET_AID
);
303 MWL8K_CMDNAME(SET_RATE
);
304 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
305 MWL8K_CMDNAME(RTS_THRESHOLD
);
306 MWL8K_CMDNAME(SET_SLOT
);
307 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
308 MWL8K_CMDNAME(SET_WMM_MODE
);
309 MWL8K_CMDNAME(MIMO_CONFIG
);
310 MWL8K_CMDNAME(USE_FIXED_RATE
);
311 MWL8K_CMDNAME(ENABLE_SNIFFER
);
312 MWL8K_CMDNAME(SET_MAC_ADDR
);
313 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
314 MWL8K_CMDNAME(UPDATE_STADB
);
316 snprintf(buf
, bufsize
, "0x%x", cmd
);
323 /* Hardware and firmware reset */
324 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
326 iowrite32(MWL8K_H2A_INT_RESET
,
327 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
328 iowrite32(MWL8K_H2A_INT_RESET
,
329 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
333 /* Release fw image */
334 static void mwl8k_release_fw(struct firmware
**fw
)
338 release_firmware(*fw
);
342 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
344 mwl8k_release_fw(&priv
->fw
.ucode
);
345 mwl8k_release_fw(&priv
->fw
.helper
);
348 /* Request fw image */
349 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
350 const char *fname
, struct firmware
**fw
)
352 /* release current image */
354 mwl8k_release_fw(fw
);
356 return request_firmware((const struct firmware
**)fw
,
357 fname
, &priv
->pdev
->dev
);
360 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
)
362 struct mwl8k_device_info
*di
= priv
->device_info
;
365 if (di
->helper_image
!= NULL
) {
366 rc
= mwl8k_request_fw(priv
, di
->helper_image
, &priv
->fw
.helper
);
368 printk(KERN_ERR
"%s: Error requesting helper "
369 "firmware file %s\n", pci_name(priv
->pdev
),
375 rc
= mwl8k_request_fw(priv
, di
->fw_image
, &priv
->fw
.ucode
);
377 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
378 pci_name(priv
->pdev
), di
->fw_image
);
379 mwl8k_release_fw(&priv
->fw
.helper
);
386 struct mwl8k_cmd_pkt
{
392 } __attribute__((packed
));
398 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
400 void __iomem
*regs
= priv
->regs
;
404 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
405 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
408 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
409 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
410 iowrite32(MWL8K_H2A_INT_DOORBELL
,
411 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
412 iowrite32(MWL8K_H2A_INT_DUMMY
,
413 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
419 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
420 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
421 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
429 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
431 return loops
? 0 : -ETIMEDOUT
;
434 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
435 const u8
*data
, size_t length
)
437 struct mwl8k_cmd_pkt
*cmd
;
441 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
445 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
451 int block_size
= length
> 256 ? 256 : length
;
453 memcpy(cmd
->payload
, data
+ done
, block_size
);
454 cmd
->length
= cpu_to_le16(block_size
);
456 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
457 sizeof(*cmd
) + block_size
);
462 length
-= block_size
;
467 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
475 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
476 const u8
*data
, size_t length
)
478 unsigned char *buffer
;
479 int may_continue
, rc
= 0;
480 u32 done
, prev_block_size
;
482 buffer
= kmalloc(1024, GFP_KERNEL
);
489 while (may_continue
> 0) {
492 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
493 if (block_size
& 1) {
497 done
+= prev_block_size
;
498 length
-= prev_block_size
;
501 if (block_size
> 1024 || block_size
> length
) {
511 if (block_size
== 0) {
518 prev_block_size
= block_size
;
519 memcpy(buffer
, data
+ done
, block_size
);
521 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
526 if (!rc
&& length
!= 0)
534 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
536 struct mwl8k_priv
*priv
= hw
->priv
;
537 struct firmware
*fw
= priv
->fw
.ucode
;
538 struct mwl8k_device_info
*di
= priv
->device_info
;
542 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
543 struct firmware
*helper
= priv
->fw
.helper
;
545 if (helper
== NULL
) {
546 printk(KERN_ERR
"%s: helper image needed but none "
547 "given\n", pci_name(priv
->pdev
));
551 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
553 printk(KERN_ERR
"%s: unable to load firmware "
554 "helper image\n", pci_name(priv
->pdev
));
559 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
561 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
565 printk(KERN_ERR
"%s: unable to load firmware image\n",
566 pci_name(priv
->pdev
));
570 if (di
->modes
& BIT(NL80211_IFTYPE_AP
))
571 iowrite32(MWL8K_MODE_AP
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
573 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
580 ready_code
= ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
581 if (ready_code
== MWL8K_FWAP_READY
) {
584 } else if (ready_code
== MWL8K_FWSTA_READY
) {
593 return loops
? 0 : -ETIMEDOUT
;
598 * Defines shared between transmission and reception.
600 /* HT control fields for firmware */
605 } __attribute__((packed
));
607 /* Firmware Station database operations */
608 #define MWL8K_STA_DB_ADD_ENTRY 0
609 #define MWL8K_STA_DB_MODIFY_ENTRY 1
610 #define MWL8K_STA_DB_DEL_ENTRY 2
611 #define MWL8K_STA_DB_FLUSH 3
613 /* Peer Entry flags - used to define the type of the peer node */
614 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
616 #define MWL8K_IEEE_LEGACY_DATA_RATES 13
617 #define MWL8K_MCS_BITMAP_SIZE 16
619 struct peer_capability_info
{
620 /* Peer type - AP vs. STA. */
623 /* Basic 802.11 capabilities from assoc resp. */
626 /* Set if peer supports 802.11n high throughput (HT). */
629 /* Valid if HT is supported. */
631 __u8 extended_ht_caps
;
632 struct ewc_ht_info ewc_info
;
634 /* Legacy rate table. Intersection of our rates and peer rates. */
635 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
637 /* HT rate table. Intersection of our rates and peer rates. */
638 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
641 /* If set, interoperability mode, no proprietary extensions. */
645 __le16 amsdu_enabled
;
646 } __attribute__((packed
));
648 /* Inline functions to manipulate QoS field in data descriptor. */
649 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
651 u16 val_mask
= 1 << 4;
653 /* End of Service Period Bit 4 */
654 return qos
| val_mask
;
657 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
661 u16 qos_mask
= ~(val_mask
<< shift
);
663 /* Ack Policy Bit 5-6 */
664 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
667 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
669 u16 val_mask
= 1 << 7;
671 /* AMSDU present Bit 7 */
672 return qos
| val_mask
;
675 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
679 u16 qos_mask
= ~(val_mask
<< shift
);
681 /* Queue Length Bits 8-15 */
682 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
685 /* DMA header used by firmware and hardware. */
686 struct mwl8k_dma_data
{
688 struct ieee80211_hdr wh
;
689 } __attribute__((packed
));
691 /* Routines to add/remove DMA header from skb. */
692 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
694 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
695 void *dst
, *src
= &tr
->wh
;
696 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
697 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
699 dst
= (void *)tr
+ space
;
701 memmove(dst
, src
, hdrlen
);
702 skb_pull(skb
, space
);
706 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
708 struct ieee80211_hdr
*wh
;
710 struct mwl8k_dma_data
*tr
;
712 wh
= (struct ieee80211_hdr
*)skb
->data
;
713 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
717 * Copy up/down the 802.11 header; the firmware requires
718 * we present a 2-byte payload length followed by a
719 * 4-address header (w/o QoS), followed (optionally) by
720 * any WEP/ExtIV header (but only filled in for CCMP).
722 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
723 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
725 tr
= (struct mwl8k_dma_data
*)skb
->data
;
727 memmove(&tr
->wh
, wh
, hdrlen
);
730 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
733 * Firmware length is the length of the fully formed "802.11
734 * payload". That is, everything except for the 802.11 header.
735 * This includes all crypto material including the MIC.
737 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
744 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
746 struct mwl8k_rx_desc
{
750 __le32 pkt_phys_addr
;
751 __le32 next_rxd_phys_addr
;
761 } __attribute__((packed
));
763 #define MWL8K_RX_DESCS 256
764 #define MWL8K_RX_MAXSZ 3800
766 #define RATE_INFO_SHORTPRE 0x8000
767 #define RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
768 #define RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
769 #define RATE_INFO_40MHZ 0x0004
770 #define RATE_INFO_SHORTGI 0x0002
771 #define RATE_INFO_MCS_FORMAT 0x0001
773 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
775 struct mwl8k_priv
*priv
= hw
->priv
;
776 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
784 size
= MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
);
786 rxq
->rxd
= pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rxd_dma
);
787 if (rxq
->rxd
== NULL
) {
788 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
789 wiphy_name(hw
->wiphy
));
792 memset(rxq
->rxd
, 0, size
);
794 rxq
->skb
= kmalloc(MWL8K_RX_DESCS
* sizeof(*rxq
->skb
), GFP_KERNEL
);
795 if (rxq
->skb
== NULL
) {
796 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
797 wiphy_name(hw
->wiphy
));
798 pci_free_consistent(priv
->pdev
, size
, rxq
->rxd
, rxq
->rxd_dma
);
801 memset(rxq
->skb
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->skb
));
803 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
804 struct mwl8k_rx_desc
*rx_desc
;
807 rx_desc
= rxq
->rxd
+ i
;
808 nexti
= (i
+ 1) % MWL8K_RX_DESCS
;
810 rx_desc
->next_rxd_phys_addr
=
811 cpu_to_le32(rxq
->rxd_dma
+ nexti
* sizeof(*rx_desc
));
812 rx_desc
->rx_ctrl
= MWL8K_RX_CTRL_OWNED_BY_HOST
;
818 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
820 struct mwl8k_priv
*priv
= hw
->priv
;
821 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
825 while (rxq
->rxd_count
< MWL8K_RX_DESCS
&& limit
--) {
829 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
836 rxq
->tail
= (rx
+ 1) % MWL8K_RX_DESCS
;
838 rxq
->rxd
[rx
].pkt_phys_addr
=
839 cpu_to_le32(pci_map_single(priv
->pdev
, skb
->data
,
840 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
));
842 rxq
->rxd
[rx
].pkt_len
= cpu_to_le16(MWL8K_RX_MAXSZ
);
845 rxq
->rxd
[rx
].rx_ctrl
= 0;
853 /* Must be called only when the card's reception is completely halted */
854 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
856 struct mwl8k_priv
*priv
= hw
->priv
;
857 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
860 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
861 if (rxq
->skb
[i
] != NULL
) {
864 addr
= le32_to_cpu(rxq
->rxd
[i
].pkt_phys_addr
);
865 pci_unmap_single(priv
->pdev
, addr
, MWL8K_RX_MAXSZ
,
867 kfree_skb(rxq
->skb
[i
]);
875 pci_free_consistent(priv
->pdev
,
876 MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
),
877 rxq
->rxd
, rxq
->rxd_dma
);
883 * Scan a list of BSSIDs to process for finalize join.
884 * Allows for extension to process multiple BSSIDs.
887 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
889 return priv
->capture_beacon
&&
890 ieee80211_is_beacon(wh
->frame_control
) &&
891 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
894 static inline void mwl8k_save_beacon(struct ieee80211_hw
*hw
,
897 struct mwl8k_priv
*priv
= hw
->priv
;
899 priv
->capture_beacon
= false;
900 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
903 * Use GFP_ATOMIC as rxq_process is called from
904 * the primary interrupt handler, memory allocation call
907 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
908 if (priv
->beacon_skb
!= NULL
)
909 ieee80211_queue_work(hw
, &priv
->finalize_join_worker
);
912 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
914 struct mwl8k_priv
*priv
= hw
->priv
;
915 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
919 while (rxq
->rxd_count
&& limit
--) {
920 struct mwl8k_rx_desc
*rx_desc
;
922 struct ieee80211_rx_status status
;
924 struct ieee80211_hdr
*wh
;
927 rx_desc
= rxq
->rxd
+ rxq
->head
;
928 if (!(rx_desc
->rx_ctrl
& MWL8K_RX_CTRL_OWNED_BY_HOST
))
932 skb
= rxq
->skb
[rxq
->head
];
935 rxq
->skb
[rxq
->head
] = NULL
;
937 rxq
->head
= (rxq
->head
+ 1) % MWL8K_RX_DESCS
;
940 addr
= le32_to_cpu(rx_desc
->pkt_phys_addr
);
941 pci_unmap_single(priv
->pdev
, addr
,
942 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
944 skb_put(skb
, le16_to_cpu(rx_desc
->pkt_len
));
945 mwl8k_remove_dma_header(skb
);
947 wh
= (struct ieee80211_hdr
*)skb
->data
;
950 * Check for a pending join operation. Save a
951 * copy of the beacon and schedule a tasklet to
952 * send a FINALIZE_JOIN command to the firmware.
954 if (mwl8k_capture_bssid(priv
, wh
))
955 mwl8k_save_beacon(hw
, skb
);
957 rate_info
= le16_to_cpu(rx_desc
->rate_info
);
959 memset(&status
, 0, sizeof(status
));
961 status
.signal
= -rx_desc
->rssi
;
962 status
.noise
= -rx_desc
->noise_level
;
963 status
.qual
= rx_desc
->link_quality
;
964 status
.antenna
= RATE_INFO_ANTSELECT(rate_info
);
965 status
.rate_idx
= RATE_INFO_RATEID(rate_info
);
967 if (rate_info
& RATE_INFO_SHORTPRE
)
968 status
.flag
|= RX_FLAG_SHORTPRE
;
969 if (rate_info
& RATE_INFO_40MHZ
)
970 status
.flag
|= RX_FLAG_40MHZ
;
971 if (rate_info
& RATE_INFO_SHORTGI
)
972 status
.flag
|= RX_FLAG_SHORT_GI
;
973 if (rate_info
& RATE_INFO_MCS_FORMAT
)
974 status
.flag
|= RX_FLAG_HT
;
975 status
.band
= IEEE80211_BAND_2GHZ
;
976 status
.freq
= ieee80211_channel_to_frequency(rx_desc
->channel
);
977 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
978 ieee80211_rx_irqsafe(hw
, skb
);
988 * Packet transmission.
991 /* Transmit packet ACK policy */
992 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
993 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
995 #define MWL8K_TXD_STATUS_OK 0x00000001
996 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
997 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
998 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
999 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1001 struct mwl8k_tx_desc
{
1006 __le32 pkt_phys_addr
;
1008 __u8 dest_MAC_addr
[ETH_ALEN
];
1009 __le32 next_txd_phys_addr
;
1014 } __attribute__((packed
));
1016 #define MWL8K_TX_DESCS 128
1018 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1020 struct mwl8k_priv
*priv
= hw
->priv
;
1021 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1025 memset(&txq
->stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1026 txq
->stats
.limit
= MWL8K_TX_DESCS
;
1030 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1032 txq
->txd
= pci_alloc_consistent(priv
->pdev
, size
, &txq
->txd_dma
);
1033 if (txq
->txd
== NULL
) {
1034 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1035 wiphy_name(hw
->wiphy
));
1038 memset(txq
->txd
, 0, size
);
1040 txq
->skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->skb
), GFP_KERNEL
);
1041 if (txq
->skb
== NULL
) {
1042 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1043 wiphy_name(hw
->wiphy
));
1044 pci_free_consistent(priv
->pdev
, size
, txq
->txd
, txq
->txd_dma
);
1047 memset(txq
->skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->skb
));
1049 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1050 struct mwl8k_tx_desc
*tx_desc
;
1053 tx_desc
= txq
->txd
+ i
;
1054 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1056 tx_desc
->status
= 0;
1057 tx_desc
->next_txd_phys_addr
=
1058 cpu_to_le32(txq
->txd_dma
+ nexti
* sizeof(*tx_desc
));
1064 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1066 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1067 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1068 iowrite32(MWL8K_H2A_INT_DUMMY
,
1069 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1070 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1073 struct mwl8k_txq_info
{
1082 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1083 struct mwl8k_txq_info
*txinfo
)
1085 int count
, desc
, status
;
1086 struct mwl8k_tx_queue
*txq
;
1087 struct mwl8k_tx_desc
*tx_desc
;
1090 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1092 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1093 txq
= priv
->txq
+ count
;
1094 txinfo
[count
].len
= txq
->stats
.len
;
1095 txinfo
[count
].head
= txq
->head
;
1096 txinfo
[count
].tail
= txq
->tail
;
1097 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1098 tx_desc
= txq
->txd
+ desc
;
1099 status
= le32_to_cpu(tx_desc
->status
);
1101 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1102 txinfo
[count
].fw_owned
++;
1104 txinfo
[count
].drv_owned
++;
1106 if (tx_desc
->pkt_len
== 0)
1107 txinfo
[count
].unused
++;
1115 * Must be called with priv->fw_mutex held and tx queues stopped.
1117 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1119 struct mwl8k_priv
*priv
= hw
->priv
;
1120 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1122 unsigned long timeout
;
1126 spin_lock_bh(&priv
->tx_lock
);
1127 count
= priv
->pending_tx_pkts
;
1129 priv
->tx_wait
= &tx_wait
;
1130 spin_unlock_bh(&priv
->tx_lock
);
1133 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1137 timeout
= wait_for_completion_timeout(&tx_wait
,
1138 msecs_to_jiffies(5000));
1142 spin_lock_bh(&priv
->tx_lock
);
1143 priv
->tx_wait
= NULL
;
1144 newcount
= priv
->pending_tx_pkts
;
1145 mwl8k_scan_tx_ring(priv
, txinfo
);
1146 spin_unlock_bh(&priv
->tx_lock
);
1148 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1149 __func__
, __LINE__
, count
, newcount
);
1151 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1152 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1158 txinfo
[index
].fw_owned
,
1159 txinfo
[index
].drv_owned
,
1160 txinfo
[index
].unused
);
1168 #define MWL8K_TXD_SUCCESS(status) \
1169 ((status) & (MWL8K_TXD_STATUS_OK | \
1170 MWL8K_TXD_STATUS_OK_RETRY | \
1171 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1173 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1175 struct mwl8k_priv
*priv
= hw
->priv
;
1176 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1179 while (txq
->stats
.len
> 0) {
1181 struct mwl8k_tx_desc
*tx_desc
;
1184 struct sk_buff
*skb
;
1185 struct ieee80211_tx_info
*info
;
1189 tx_desc
= txq
->txd
+ tx
;
1191 status
= le32_to_cpu(tx_desc
->status
);
1193 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1197 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1200 txq
->head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1201 BUG_ON(txq
->stats
.len
== 0);
1203 priv
->pending_tx_pkts
--;
1205 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1206 size
= le16_to_cpu(tx_desc
->pkt_len
);
1208 txq
->skb
[tx
] = NULL
;
1210 BUG_ON(skb
== NULL
);
1211 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1213 mwl8k_remove_dma_header(skb
);
1215 /* Mark descriptor as unused */
1216 tx_desc
->pkt_phys_addr
= 0;
1217 tx_desc
->pkt_len
= 0;
1219 info
= IEEE80211_SKB_CB(skb
);
1220 ieee80211_tx_info_clear_status(info
);
1221 if (MWL8K_TXD_SUCCESS(status
))
1222 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1224 ieee80211_tx_status_irqsafe(hw
, skb
);
1229 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1230 ieee80211_wake_queue(hw
, index
);
1233 /* must be called only when the card's transmit is completely halted */
1234 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1236 struct mwl8k_priv
*priv
= hw
->priv
;
1237 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1239 mwl8k_txq_reclaim(hw
, index
, 1);
1244 pci_free_consistent(priv
->pdev
,
1245 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1246 txq
->txd
, txq
->txd_dma
);
1251 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1253 struct mwl8k_priv
*priv
= hw
->priv
;
1254 struct ieee80211_tx_info
*tx_info
;
1255 struct mwl8k_vif
*mwl8k_vif
;
1256 struct ieee80211_hdr
*wh
;
1257 struct mwl8k_tx_queue
*txq
;
1258 struct mwl8k_tx_desc
*tx
;
1264 wh
= (struct ieee80211_hdr
*)skb
->data
;
1265 if (ieee80211_is_data_qos(wh
->frame_control
))
1266 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1270 mwl8k_add_dma_header(skb
);
1271 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1273 tx_info
= IEEE80211_SKB_CB(skb
);
1274 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1276 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1277 u16 seqno
= mwl8k_vif
->seqno
;
1279 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1280 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1281 mwl8k_vif
->seqno
= seqno
++ % 4096;
1284 /* Setup firmware control bit fields for each frame type. */
1287 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1288 ieee80211_is_ctl(wh
->frame_control
)) {
1290 qos
= mwl8k_qos_setbit_eosp(qos
);
1291 /* Set Queue size to unspecified */
1292 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1293 } else if (ieee80211_is_data(wh
->frame_control
)) {
1295 if (is_multicast_ether_addr(wh
->addr1
))
1296 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1298 /* Send pkt in an aggregate if AMPDU frame. */
1299 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1300 qos
= mwl8k_qos_setbit_ack(qos
,
1301 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1303 qos
= mwl8k_qos_setbit_ack(qos
,
1304 MWL8K_TXD_ACK_POLICY_NORMAL
);
1306 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1307 qos
= mwl8k_qos_setbit_amsdu(qos
);
1310 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1311 skb
->len
, PCI_DMA_TODEVICE
);
1313 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1314 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1315 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1317 return NETDEV_TX_OK
;
1320 spin_lock_bh(&priv
->tx_lock
);
1322 txq
= priv
->txq
+ index
;
1324 BUG_ON(txq
->skb
[txq
->tail
] != NULL
);
1325 txq
->skb
[txq
->tail
] = skb
;
1327 tx
= txq
->txd
+ txq
->tail
;
1328 tx
->data_rate
= txdatarate
;
1329 tx
->tx_priority
= index
;
1330 tx
->qos_control
= cpu_to_le16(qos
);
1331 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1332 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1334 tx
->peer_id
= mwl8k_vif
->peer_id
;
1336 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1340 priv
->pending_tx_pkts
++;
1343 if (txq
->tail
== MWL8K_TX_DESCS
)
1346 if (txq
->head
== txq
->tail
)
1347 ieee80211_stop_queue(hw
, index
);
1349 mwl8k_tx_start(priv
);
1351 spin_unlock_bh(&priv
->tx_lock
);
1353 return NETDEV_TX_OK
;
1360 * We have the following requirements for issuing firmware commands:
1361 * - Some commands require that the packet transmit path is idle when
1362 * the command is issued. (For simplicity, we'll just quiesce the
1363 * transmit path for every command.)
1364 * - There are certain sequences of commands that need to be issued to
1365 * the hardware sequentially, with no other intervening commands.
1367 * This leads to an implementation of a "firmware lock" as a mutex that
1368 * can be taken recursively, and which is taken by both the low-level
1369 * command submission function (mwl8k_post_cmd) as well as any users of
1370 * that function that require issuing of an atomic sequence of commands,
1371 * and quiesces the transmit path whenever it's taken.
1373 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1375 struct mwl8k_priv
*priv
= hw
->priv
;
1377 if (priv
->fw_mutex_owner
!= current
) {
1380 mutex_lock(&priv
->fw_mutex
);
1381 ieee80211_stop_queues(hw
);
1383 rc
= mwl8k_tx_wait_empty(hw
);
1385 ieee80211_wake_queues(hw
);
1386 mutex_unlock(&priv
->fw_mutex
);
1391 priv
->fw_mutex_owner
= current
;
1394 priv
->fw_mutex_depth
++;
1399 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1401 struct mwl8k_priv
*priv
= hw
->priv
;
1403 if (!--priv
->fw_mutex_depth
) {
1404 ieee80211_wake_queues(hw
);
1405 priv
->fw_mutex_owner
= NULL
;
1406 mutex_unlock(&priv
->fw_mutex
);
1412 * Command processing.
1415 /* Timeout firmware commands after 2000ms */
1416 #define MWL8K_CMD_TIMEOUT_MS 2000
1418 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1420 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1421 struct mwl8k_priv
*priv
= hw
->priv
;
1422 void __iomem
*regs
= priv
->regs
;
1423 dma_addr_t dma_addr
;
1424 unsigned int dma_size
;
1426 unsigned long timeout
= 0;
1429 cmd
->result
= 0xffff;
1430 dma_size
= le16_to_cpu(cmd
->length
);
1431 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1432 PCI_DMA_BIDIRECTIONAL
);
1433 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1436 rc
= mwl8k_fw_lock(hw
);
1438 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1439 PCI_DMA_BIDIRECTIONAL
);
1443 priv
->hostcmd_wait
= &cmd_wait
;
1444 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1445 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1446 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1447 iowrite32(MWL8K_H2A_INT_DUMMY
,
1448 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1450 timeout
= wait_for_completion_timeout(&cmd_wait
,
1451 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1453 priv
->hostcmd_wait
= NULL
;
1455 mwl8k_fw_unlock(hw
);
1457 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1458 PCI_DMA_BIDIRECTIONAL
);
1461 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1462 wiphy_name(hw
->wiphy
),
1463 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1464 MWL8K_CMD_TIMEOUT_MS
);
1467 rc
= cmd
->result
? -EINVAL
: 0;
1469 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1470 wiphy_name(hw
->wiphy
),
1471 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1472 le16_to_cpu(cmd
->result
));
1481 struct mwl8k_cmd_get_hw_spec
{
1482 struct mwl8k_cmd_pkt header
;
1484 __u8 host_interface
;
1486 __u8 perm_addr
[ETH_ALEN
];
1491 __u8 mcs_bitmap
[16];
1492 __le32 rx_queue_ptr
;
1493 __le32 num_tx_queues
;
1494 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1496 __le32 num_tx_desc_per_queue
;
1498 } __attribute__((packed
));
1500 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw
*hw
)
1502 struct mwl8k_priv
*priv
= hw
->priv
;
1503 struct mwl8k_cmd_get_hw_spec
*cmd
;
1507 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1511 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1512 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1514 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1515 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1516 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1517 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1518 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1519 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1520 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1521 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1523 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1526 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1527 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1528 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1529 priv
->hw_rev
= cmd
->hw_rev
;
1537 * CMD_MAC_MULTICAST_ADR.
1539 struct mwl8k_cmd_mac_multicast_adr
{
1540 struct mwl8k_cmd_pkt header
;
1543 __u8 addr
[0][ETH_ALEN
];
1546 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1547 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1548 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1549 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1551 static struct mwl8k_cmd_pkt
*
1552 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
, int allmulti
,
1553 int mc_count
, struct dev_addr_list
*mclist
)
1555 struct mwl8k_priv
*priv
= hw
->priv
;
1556 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1559 if (allmulti
|| mc_count
> priv
->num_mcaddrs
) {
1564 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1566 cmd
= kzalloc(size
, GFP_ATOMIC
);
1570 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1571 cmd
->header
.length
= cpu_to_le16(size
);
1572 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1573 MWL8K_ENABLE_RX_BROADCAST
);
1576 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1577 } else if (mc_count
) {
1580 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1581 cmd
->numaddr
= cpu_to_le16(mc_count
);
1582 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1583 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1587 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1588 mclist
= mclist
->next
;
1592 return &cmd
->header
;
1596 * CMD_802_11_GET_STAT.
1598 struct mwl8k_cmd_802_11_get_stat
{
1599 struct mwl8k_cmd_pkt header
;
1601 } __attribute__((packed
));
1603 #define MWL8K_STAT_ACK_FAILURE 9
1604 #define MWL8K_STAT_RTS_FAILURE 12
1605 #define MWL8K_STAT_FCS_ERROR 24
1606 #define MWL8K_STAT_RTS_SUCCESS 11
1608 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1609 struct ieee80211_low_level_stats
*stats
)
1611 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1614 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1618 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1619 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1621 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1623 stats
->dot11ACKFailureCount
=
1624 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1625 stats
->dot11RTSFailureCount
=
1626 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1627 stats
->dot11FCSErrorCount
=
1628 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1629 stats
->dot11RTSSuccessCount
=
1630 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1638 * CMD_802_11_RADIO_CONTROL.
1640 struct mwl8k_cmd_802_11_radio_control
{
1641 struct mwl8k_cmd_pkt header
;
1645 } __attribute__((packed
));
1648 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1650 struct mwl8k_priv
*priv
= hw
->priv
;
1651 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1654 if (enable
== priv
->radio_on
&& !force
)
1657 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1661 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1662 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1663 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1664 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1665 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1667 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1671 priv
->radio_on
= enable
;
1676 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1678 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1681 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1683 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1687 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1689 struct mwl8k_priv
*priv
;
1691 if (hw
== NULL
|| hw
->priv
== NULL
)
1695 priv
->radio_short_preamble
= short_preamble
;
1697 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1701 * CMD_802_11_RF_TX_POWER.
1703 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1705 struct mwl8k_cmd_802_11_rf_tx_power
{
1706 struct mwl8k_cmd_pkt header
;
1708 __le16 support_level
;
1709 __le16 current_level
;
1711 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1712 } __attribute__((packed
));
1714 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1716 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1719 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1723 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1724 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1725 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1726 cmd
->support_level
= cpu_to_le16(dBm
);
1728 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1737 struct mwl8k_cmd_set_pre_scan
{
1738 struct mwl8k_cmd_pkt header
;
1739 } __attribute__((packed
));
1741 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
1743 struct mwl8k_cmd_set_pre_scan
*cmd
;
1746 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1750 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
1751 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1753 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1760 * CMD_SET_POST_SCAN.
1762 struct mwl8k_cmd_set_post_scan
{
1763 struct mwl8k_cmd_pkt header
;
1765 __u8 bssid
[ETH_ALEN
];
1766 } __attribute__((packed
));
1769 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
1771 struct mwl8k_cmd_set_post_scan
*cmd
;
1774 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1778 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
1779 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1781 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
1783 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1790 * CMD_SET_RF_CHANNEL.
1792 struct mwl8k_cmd_set_rf_channel
{
1793 struct mwl8k_cmd_pkt header
;
1795 __u8 current_channel
;
1796 __le32 channel_flags
;
1797 } __attribute__((packed
));
1799 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
1800 struct ieee80211_channel
*channel
)
1802 struct mwl8k_cmd_set_rf_channel
*cmd
;
1805 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1809 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
1810 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1811 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1812 cmd
->current_channel
= channel
->hw_value
;
1813 if (channel
->band
== IEEE80211_BAND_2GHZ
)
1814 cmd
->channel_flags
= cpu_to_le32(0x00000081);
1816 cmd
->channel_flags
= cpu_to_le32(0x00000000);
1818 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1827 struct mwl8k_cmd_set_slot
{
1828 struct mwl8k_cmd_pkt header
;
1831 } __attribute__((packed
));
1833 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
1835 struct mwl8k_cmd_set_slot
*cmd
;
1838 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1842 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
1843 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1844 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1845 cmd
->short_slot
= short_slot_time
;
1847 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1856 struct mwl8k_cmd_mimo_config
{
1857 struct mwl8k_cmd_pkt header
;
1859 __u8 rx_antenna_map
;
1860 __u8 tx_antenna_map
;
1861 } __attribute__((packed
));
1863 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
1865 struct mwl8k_cmd_mimo_config
*cmd
;
1868 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1872 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
1873 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1874 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
1875 cmd
->rx_antenna_map
= rx
;
1876 cmd
->tx_antenna_map
= tx
;
1878 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1885 * CMD_ENABLE_SNIFFER.
1887 struct mwl8k_cmd_enable_sniffer
{
1888 struct mwl8k_cmd_pkt header
;
1890 } __attribute__((packed
));
1892 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
1894 struct mwl8k_cmd_enable_sniffer
*cmd
;
1897 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1901 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
1902 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1903 cmd
->action
= cpu_to_le32(!!enable
);
1905 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1914 struct mwl8k_cmd_set_mac_addr
{
1915 struct mwl8k_cmd_pkt header
;
1916 __u8 mac_addr
[ETH_ALEN
];
1917 } __attribute__((packed
));
1919 static int mwl8k_set_mac_addr(struct ieee80211_hw
*hw
, u8
*mac
)
1921 struct mwl8k_cmd_set_mac_addr
*cmd
;
1924 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1928 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR
);
1929 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1930 memcpy(cmd
->mac_addr
, mac
, ETH_ALEN
);
1932 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1940 * CMD_SET_RATEADAPT_MODE.
1942 struct mwl8k_cmd_set_rate_adapt_mode
{
1943 struct mwl8k_cmd_pkt header
;
1946 } __attribute__((packed
));
1948 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
1950 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
1953 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1957 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
1958 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1959 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1960 cmd
->mode
= cpu_to_le16(mode
);
1962 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1971 struct mwl8k_cmd_set_wmm
{
1972 struct mwl8k_cmd_pkt header
;
1974 } __attribute__((packed
));
1976 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
1978 struct mwl8k_priv
*priv
= hw
->priv
;
1979 struct mwl8k_cmd_set_wmm
*cmd
;
1982 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1986 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
1987 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1988 cmd
->action
= cpu_to_le16(!!enable
);
1990 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1994 priv
->wmm_enabled
= enable
;
2000 * CMD_SET_RTS_THRESHOLD.
2002 struct mwl8k_cmd_rts_threshold
{
2003 struct mwl8k_cmd_pkt header
;
2006 } __attribute__((packed
));
2008 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
2009 u16 action
, u16 threshold
)
2011 struct mwl8k_cmd_rts_threshold
*cmd
;
2014 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2018 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
2019 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2020 cmd
->action
= cpu_to_le16(action
);
2021 cmd
->threshold
= cpu_to_le16(threshold
);
2023 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2030 * CMD_SET_EDCA_PARAMS.
2032 struct mwl8k_cmd_set_edca_params
{
2033 struct mwl8k_cmd_pkt header
;
2035 /* See MWL8K_SET_EDCA_XXX below */
2038 /* TX opportunity in units of 32 us */
2041 /* Log exponent of max contention period: 0...15*/
2044 /* Log exponent of min contention period: 0...15 */
2047 /* Adaptive interframe spacing in units of 32us */
2050 /* TX queue to configure */
2052 } __attribute__((packed
));
2054 #define MWL8K_SET_EDCA_CW 0x01
2055 #define MWL8K_SET_EDCA_TXOP 0x02
2056 #define MWL8K_SET_EDCA_AIFS 0x04
2058 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2059 MWL8K_SET_EDCA_TXOP | \
2060 MWL8K_SET_EDCA_AIFS)
2063 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2064 __u16 cw_min
, __u16 cw_max
,
2065 __u8 aifs
, __u16 txop
)
2067 struct mwl8k_cmd_set_edca_params
*cmd
;
2070 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2075 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2078 qnum
^= !(qnum
>> 1);
2080 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2081 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2082 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2083 cmd
->txop
= cpu_to_le16(txop
);
2084 cmd
->log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2085 cmd
->log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2089 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2096 * CMD_FINALIZE_JOIN.
2099 /* FJ beacon buffer size is compiled into the firmware. */
2100 #define MWL8K_FJ_BEACON_MAXLEN 128
2102 struct mwl8k_cmd_finalize_join
{
2103 struct mwl8k_cmd_pkt header
;
2104 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2105 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2106 } __attribute__((packed
));
2108 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2109 __u16 framelen
, __u16 dtim
)
2111 struct mwl8k_cmd_finalize_join
*cmd
;
2112 struct ieee80211_mgmt
*payload
= frame
;
2120 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2124 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2125 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2126 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2128 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2130 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2132 /* XXX TBD Might just have to abort and return an error */
2133 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2134 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2135 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2136 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2138 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2139 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2141 if (payload
&& payload_len
)
2142 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2144 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2152 struct mwl8k_cmd_update_sta_db
{
2153 struct mwl8k_cmd_pkt header
;
2155 /* See STADB_ACTION_TYPE */
2158 /* Peer MAC address */
2159 __u8 peer_addr
[ETH_ALEN
];
2163 /* Peer info - valid during add/update. */
2164 struct peer_capability_info peer_info
;
2165 } __attribute__((packed
));
2167 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2168 struct ieee80211_vif
*vif
, __u32 action
)
2170 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2171 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2172 struct mwl8k_cmd_update_sta_db
*cmd
;
2173 struct peer_capability_info
*peer_info
;
2174 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2178 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2182 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2183 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2185 cmd
->action
= cpu_to_le32(action
);
2186 peer_info
= &cmd
->peer_info
;
2187 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2190 case MWL8K_STA_DB_ADD_ENTRY
:
2191 case MWL8K_STA_DB_MODIFY_ENTRY
:
2192 /* Build peer_info block */
2193 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2194 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2195 peer_info
->interop
= 1;
2196 peer_info
->amsdu_enabled
= 0;
2198 rates
= peer_info
->legacy_rates
;
2199 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2200 rates
[count
] = bitrates
[count
].hw_value
;
2202 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2204 mv_vif
->peer_id
= peer_info
->station_id
;
2208 case MWL8K_STA_DB_DEL_ENTRY
:
2209 case MWL8K_STA_DB_FLUSH
:
2211 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2213 mv_vif
->peer_id
= 0;
2224 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2226 #define MWL8K_FRAME_PROT_DISABLED 0x00
2227 #define MWL8K_FRAME_PROT_11G 0x07
2228 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2229 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2231 struct mwl8k_cmd_update_set_aid
{
2232 struct mwl8k_cmd_pkt header
;
2235 /* AP's MAC address (BSSID) */
2236 __u8 bssid
[ETH_ALEN
];
2237 __le16 protection_mode
;
2238 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2239 } __attribute__((packed
));
2241 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2242 struct ieee80211_vif
*vif
)
2244 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2245 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2246 struct mwl8k_cmd_update_set_aid
*cmd
;
2247 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2252 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2256 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2257 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2258 cmd
->aid
= cpu_to_le16(info
->aid
);
2260 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2262 if (info
->use_cts_prot
) {
2263 prot_mode
= MWL8K_FRAME_PROT_11G
;
2265 switch (info
->ht_operation_mode
&
2266 IEEE80211_HT_OP_MODE_PROTECTION
) {
2267 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2268 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2270 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2271 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2274 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2278 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2280 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2281 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2283 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2292 struct mwl8k_cmd_update_rateset
{
2293 struct mwl8k_cmd_pkt header
;
2294 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2296 /* Bitmap for supported MCS codes. */
2297 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2298 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2299 } __attribute__((packed
));
2301 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2302 struct ieee80211_vif
*vif
)
2304 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2305 struct mwl8k_cmd_update_rateset
*cmd
;
2306 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2310 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2314 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2315 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2317 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2318 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2320 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2327 * CMD_USE_FIXED_RATE.
2329 #define MWL8K_RATE_TABLE_SIZE 8
2330 #define MWL8K_UCAST_RATE 0
2331 #define MWL8K_USE_AUTO_RATE 0x0002
2333 struct mwl8k_rate_entry
{
2334 /* Set to 1 if HT rate, 0 if legacy. */
2337 /* Set to 1 to use retry_count field. */
2338 __le32 enable_retry
;
2340 /* Specified legacy rate or MCS. */
2343 /* Number of allowed retries. */
2345 } __attribute__((packed
));
2347 struct mwl8k_rate_table
{
2348 /* 1 to allow specified rate and below */
2349 __le32 allow_rate_drop
;
2351 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2352 } __attribute__((packed
));
2354 struct mwl8k_cmd_use_fixed_rate
{
2355 struct mwl8k_cmd_pkt header
;
2357 struct mwl8k_rate_table rate_table
;
2359 /* Unicast, Broadcast or Multicast */
2363 } __attribute__((packed
));
2365 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2366 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2368 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2372 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2376 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2377 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2379 cmd
->action
= cpu_to_le32(action
);
2380 cmd
->rate_type
= cpu_to_le32(rate_type
);
2382 if (rate_table
!= NULL
) {
2384 * Copy over each field manually so that endian
2385 * conversion can be done.
2387 cmd
->rate_table
.allow_rate_drop
=
2388 cpu_to_le32(rate_table
->allow_rate_drop
);
2389 cmd
->rate_table
.num_rates
=
2390 cpu_to_le32(rate_table
->num_rates
);
2392 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2393 struct mwl8k_rate_entry
*dst
=
2394 &cmd
->rate_table
.rate_entry
[count
];
2395 struct mwl8k_rate_entry
*src
=
2396 &rate_table
->rate_entry
[count
];
2398 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2399 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2400 dst
->rate
= cpu_to_le32(src
->rate
);
2401 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2405 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2413 * Interrupt handling.
2415 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2417 struct ieee80211_hw
*hw
= dev_id
;
2418 struct mwl8k_priv
*priv
= hw
->priv
;
2421 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2422 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2427 if (status
& MWL8K_A2H_INT_TX_DONE
)
2428 tasklet_schedule(&priv
->tx_reclaim_task
);
2430 if (status
& MWL8K_A2H_INT_RX_READY
) {
2431 while (rxq_process(hw
, 0, 1))
2432 rxq_refill(hw
, 0, 1);
2435 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2436 if (priv
->hostcmd_wait
!= NULL
)
2437 complete(priv
->hostcmd_wait
);
2440 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2441 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2442 priv
->radio_on
&& priv
->pending_tx_pkts
)
2443 mwl8k_tx_start(priv
);
2451 * Core driver operations.
2453 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2455 struct mwl8k_priv
*priv
= hw
->priv
;
2456 int index
= skb_get_queue_mapping(skb
);
2459 if (priv
->current_channel
== NULL
) {
2460 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2461 "disabled\n", wiphy_name(hw
->wiphy
));
2463 return NETDEV_TX_OK
;
2466 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2471 static int mwl8k_start(struct ieee80211_hw
*hw
)
2473 struct mwl8k_priv
*priv
= hw
->priv
;
2476 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2477 IRQF_SHARED
, MWL8K_NAME
, hw
);
2479 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2480 wiphy_name(hw
->wiphy
));
2484 /* Enable tx reclaim tasklet */
2485 tasklet_enable(&priv
->tx_reclaim_task
);
2487 /* Enable interrupts */
2488 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2490 rc
= mwl8k_fw_lock(hw
);
2492 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2495 rc
= mwl8k_cmd_set_pre_scan(hw
);
2498 rc
= mwl8k_cmd_set_post_scan(hw
,
2499 "\x00\x00\x00\x00\x00\x00");
2502 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2505 rc
= mwl8k_set_wmm(hw
, 0);
2508 rc
= mwl8k_enable_sniffer(hw
, 0);
2510 mwl8k_fw_unlock(hw
);
2514 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2515 free_irq(priv
->pdev
->irq
, hw
);
2516 tasklet_disable(&priv
->tx_reclaim_task
);
2522 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2524 struct mwl8k_priv
*priv
= hw
->priv
;
2527 mwl8k_cmd_802_11_radio_disable(hw
);
2529 ieee80211_stop_queues(hw
);
2531 /* Disable interrupts */
2532 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2533 free_irq(priv
->pdev
->irq
, hw
);
2535 /* Stop finalize join worker */
2536 cancel_work_sync(&priv
->finalize_join_worker
);
2537 if (priv
->beacon_skb
!= NULL
)
2538 dev_kfree_skb(priv
->beacon_skb
);
2540 /* Stop tx reclaim tasklet */
2541 tasklet_disable(&priv
->tx_reclaim_task
);
2543 /* Return all skbs to mac80211 */
2544 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2545 mwl8k_txq_reclaim(hw
, i
, 1);
2548 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2549 struct ieee80211_if_init_conf
*conf
)
2551 struct mwl8k_priv
*priv
= hw
->priv
;
2552 struct mwl8k_vif
*mwl8k_vif
;
2555 * We only support one active interface at a time.
2557 if (priv
->vif
!= NULL
)
2561 * We only support managed interfaces for now.
2563 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2567 * Reject interface creation if sniffer mode is active, as
2568 * STA operation is mutually exclusive with hardware sniffer
2571 if (priv
->sniffer_enabled
) {
2572 printk(KERN_INFO
"%s: unable to create STA "
2573 "interface due to sniffer mode being enabled\n",
2574 wiphy_name(hw
->wiphy
));
2578 /* Clean out driver private area */
2579 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2580 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2582 /* Set and save the mac address */
2583 mwl8k_set_mac_addr(hw
, conf
->mac_addr
);
2584 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2586 /* Back pointer to parent config block */
2587 mwl8k_vif
->priv
= priv
;
2589 /* Setup initial PHY parameters */
2590 memcpy(mwl8k_vif
->legacy_rates
,
2591 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2592 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2594 /* Set Initial sequence number to zero */
2595 mwl8k_vif
->seqno
= 0;
2597 priv
->vif
= conf
->vif
;
2598 priv
->current_channel
= NULL
;
2603 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2604 struct ieee80211_if_init_conf
*conf
)
2606 struct mwl8k_priv
*priv
= hw
->priv
;
2608 if (priv
->vif
== NULL
)
2611 mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
2616 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2618 struct ieee80211_conf
*conf
= &hw
->conf
;
2619 struct mwl8k_priv
*priv
= hw
->priv
;
2622 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2623 mwl8k_cmd_802_11_radio_disable(hw
);
2624 priv
->current_channel
= NULL
;
2628 rc
= mwl8k_fw_lock(hw
);
2632 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2636 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2640 priv
->current_channel
= conf
->channel
;
2642 if (conf
->power_level
> 18)
2643 conf
->power_level
= 18;
2644 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2648 if (mwl8k_cmd_mimo_config(hw
, 0x7, 0x7))
2652 mwl8k_fw_unlock(hw
);
2657 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
2658 struct ieee80211_vif
*vif
,
2659 struct ieee80211_bss_conf
*info
,
2662 struct mwl8k_priv
*priv
= hw
->priv
;
2663 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
2666 if (changed
& BSS_CHANGED_BSSID
)
2667 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
2669 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
2672 priv
->capture_beacon
= false;
2674 rc
= mwl8k_fw_lock(hw
);
2679 memcpy(&mwl8k_vif
->bss_info
, info
,
2680 sizeof(struct ieee80211_bss_conf
));
2683 rc
= mwl8k_update_rateset(hw
, vif
);
2687 /* Turn on rate adaptation */
2688 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
2689 MWL8K_UCAST_RATE
, NULL
);
2693 /* Set radio preamble */
2694 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
2699 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
2703 /* Update peer rate info */
2704 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
2705 MWL8K_STA_DB_MODIFY_ENTRY
);
2710 rc
= mwl8k_cmd_set_aid(hw
, vif
);
2715 * Finalize the join. Tell rx handler to process
2716 * next beacon from our BSSID.
2718 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
2719 priv
->capture_beacon
= true;
2721 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
2722 memset(&mwl8k_vif
->bss_info
, 0,
2723 sizeof(struct ieee80211_bss_conf
));
2724 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
2728 mwl8k_fw_unlock(hw
);
2731 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
2732 int mc_count
, struct dev_addr_list
*mclist
)
2734 struct mwl8k_cmd_pkt
*cmd
;
2737 * Synthesize and return a command packet that programs the
2738 * hardware multicast address filter. At this point we don't
2739 * know whether FIF_ALLMULTI is being requested, but if it is,
2740 * we'll end up throwing this packet away and creating a new
2741 * one in mwl8k_configure_filter().
2743 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 0, mc_count
, mclist
);
2745 return (unsigned long)cmd
;
2749 mwl8k_configure_filter_sniffer(struct ieee80211_hw
*hw
,
2750 unsigned int changed_flags
,
2751 unsigned int *total_flags
)
2753 struct mwl8k_priv
*priv
= hw
->priv
;
2756 * Hardware sniffer mode is mutually exclusive with STA
2757 * operation, so refuse to enable sniffer mode if a STA
2758 * interface is active.
2760 if (priv
->vif
!= NULL
) {
2761 if (net_ratelimit())
2762 printk(KERN_INFO
"%s: not enabling sniffer "
2763 "mode because STA interface is active\n",
2764 wiphy_name(hw
->wiphy
));
2768 if (!priv
->sniffer_enabled
) {
2769 if (mwl8k_enable_sniffer(hw
, 1))
2771 priv
->sniffer_enabled
= true;
2774 *total_flags
&= FIF_PROMISC_IN_BSS
| FIF_ALLMULTI
|
2775 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
|
2781 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
2782 unsigned int changed_flags
,
2783 unsigned int *total_flags
,
2786 struct mwl8k_priv
*priv
= hw
->priv
;
2787 struct mwl8k_cmd_pkt
*cmd
= (void *)(unsigned long)multicast
;
2790 * Enable hardware sniffer mode if FIF_CONTROL or
2791 * FIF_OTHER_BSS is requested.
2793 if (*total_flags
& (FIF_CONTROL
| FIF_OTHER_BSS
) &&
2794 mwl8k_configure_filter_sniffer(hw
, changed_flags
, total_flags
)) {
2799 /* Clear unsupported feature flags */
2800 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
2802 if (mwl8k_fw_lock(hw
))
2805 if (priv
->sniffer_enabled
) {
2806 mwl8k_enable_sniffer(hw
, 0);
2807 priv
->sniffer_enabled
= false;
2810 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2811 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2813 * Disable the BSS filter.
2815 mwl8k_cmd_set_pre_scan(hw
);
2820 * Enable the BSS filter.
2822 * If there is an active STA interface, use that
2823 * interface's BSSID, otherwise use a dummy one
2824 * (where the OUI part needs to be nonzero for
2825 * the BSSID to be accepted by POST_SCAN).
2827 bssid
= "\x01\x00\x00\x00\x00\x00";
2828 if (priv
->vif
!= NULL
)
2829 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
2831 mwl8k_cmd_set_post_scan(hw
, bssid
);
2836 * If FIF_ALLMULTI is being requested, throw away the command
2837 * packet that ->prepare_multicast() built and replace it with
2838 * a command packet that enables reception of all multicast
2841 if (*total_flags
& FIF_ALLMULTI
) {
2843 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 1, 0, NULL
);
2847 mwl8k_post_cmd(hw
, cmd
);
2851 mwl8k_fw_unlock(hw
);
2854 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
2856 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
2859 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2860 const struct ieee80211_tx_queue_params
*params
)
2862 struct mwl8k_priv
*priv
= hw
->priv
;
2865 rc
= mwl8k_fw_lock(hw
);
2867 if (!priv
->wmm_enabled
)
2868 rc
= mwl8k_set_wmm(hw
, 1);
2871 rc
= mwl8k_set_edca_params(hw
, queue
,
2877 mwl8k_fw_unlock(hw
);
2883 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
2884 struct ieee80211_tx_queue_stats
*stats
)
2886 struct mwl8k_priv
*priv
= hw
->priv
;
2887 struct mwl8k_tx_queue
*txq
;
2890 spin_lock_bh(&priv
->tx_lock
);
2891 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
2892 txq
= priv
->txq
+ index
;
2893 memcpy(&stats
[index
], &txq
->stats
,
2894 sizeof(struct ieee80211_tx_queue_stats
));
2896 spin_unlock_bh(&priv
->tx_lock
);
2901 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
2902 struct ieee80211_low_level_stats
*stats
)
2904 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
2907 static const struct ieee80211_ops mwl8k_ops
= {
2909 .start
= mwl8k_start
,
2911 .add_interface
= mwl8k_add_interface
,
2912 .remove_interface
= mwl8k_remove_interface
,
2913 .config
= mwl8k_config
,
2914 .bss_info_changed
= mwl8k_bss_info_changed
,
2915 .prepare_multicast
= mwl8k_prepare_multicast
,
2916 .configure_filter
= mwl8k_configure_filter
,
2917 .set_rts_threshold
= mwl8k_set_rts_threshold
,
2918 .conf_tx
= mwl8k_conf_tx
,
2919 .get_tx_stats
= mwl8k_get_tx_stats
,
2920 .get_stats
= mwl8k_get_stats
,
2923 static void mwl8k_tx_reclaim_handler(unsigned long data
)
2926 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
2927 struct mwl8k_priv
*priv
= hw
->priv
;
2929 spin_lock_bh(&priv
->tx_lock
);
2930 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2931 mwl8k_txq_reclaim(hw
, i
, 0);
2933 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
2934 complete(priv
->tx_wait
);
2935 priv
->tx_wait
= NULL
;
2937 spin_unlock_bh(&priv
->tx_lock
);
2940 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
2942 struct mwl8k_priv
*priv
=
2943 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
2944 struct sk_buff
*skb
= priv
->beacon_skb
;
2945 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
2947 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
2950 priv
->beacon_skb
= NULL
;
2953 static struct mwl8k_device_info di_8687
= {
2954 .part_name
= "88w8687",
2955 .helper_image
= "mwl8k/helper_8687.fw",
2956 .fw_image
= "mwl8k/fmimage_8687.fw",
2959 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table
) = {
2961 PCI_VDEVICE(MARVELL
, 0x2a2b),
2962 .driver_data
= (unsigned long)&di_8687
,
2964 PCI_VDEVICE(MARVELL
, 0x2a30),
2965 .driver_data
= (unsigned long)&di_8687
,
2969 MODULE_DEVICE_TABLE(pci
, mwl8k_pci_id_table
);
2971 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
2972 const struct pci_device_id
*id
)
2974 static int printed_version
= 0;
2975 struct ieee80211_hw
*hw
;
2976 struct mwl8k_priv
*priv
;
2980 if (!printed_version
) {
2981 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
2982 printed_version
= 1;
2985 rc
= pci_enable_device(pdev
);
2987 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
2992 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
2994 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
2999 pci_set_master(pdev
);
3001 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
3003 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
3011 priv
->device_info
= (void *)id
->driver_data
;
3012 priv
->sniffer_enabled
= false;
3013 priv
->wmm_enabled
= false;
3014 priv
->pending_tx_pkts
= 0;
3016 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
3017 pci_set_drvdata(pdev
, hw
);
3019 priv
->sram
= pci_iomap(pdev
, 0, 0x10000);
3020 if (priv
->sram
== NULL
) {
3021 printk(KERN_ERR
"%s: Cannot map device SRAM\n",
3022 wiphy_name(hw
->wiphy
));
3027 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3028 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3030 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
3031 if (priv
->regs
== NULL
) {
3032 priv
->regs
= pci_iomap(pdev
, 2, 0x10000);
3033 if (priv
->regs
== NULL
) {
3034 printk(KERN_ERR
"%s: Cannot map device registers\n",
3035 wiphy_name(hw
->wiphy
));
3040 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
3041 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
3042 priv
->band
.channels
= priv
->channels
;
3043 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
3044 priv
->band
.bitrates
= priv
->rates
;
3045 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
3046 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
3048 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
3049 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
3052 * Extra headroom is the size of the required DMA header
3053 * minus the size of the smallest 802.11 frame (CTS frame).
3055 hw
->extra_tx_headroom
=
3056 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
3058 hw
->channel_change_time
= 10;
3060 hw
->queues
= MWL8K_TX_QUEUES
;
3062 hw
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
3064 /* Set rssi and noise values to dBm */
3065 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
3066 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
3069 /* Set default radio state and preamble */
3071 priv
->radio_short_preamble
= 0;
3073 /* Finalize join worker */
3074 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
3076 /* TX reclaim tasklet */
3077 tasklet_init(&priv
->tx_reclaim_task
,
3078 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
3079 tasklet_disable(&priv
->tx_reclaim_task
);
3081 /* Power management cookie */
3082 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
3083 if (priv
->cookie
== NULL
)
3086 rc
= mwl8k_rxq_init(hw
, 0);
3089 rxq_refill(hw
, 0, INT_MAX
);
3091 mutex_init(&priv
->fw_mutex
);
3092 priv
->fw_mutex_owner
= NULL
;
3093 priv
->fw_mutex_depth
= 0;
3094 priv
->hostcmd_wait
= NULL
;
3096 spin_lock_init(&priv
->tx_lock
);
3098 priv
->tx_wait
= NULL
;
3100 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
3101 rc
= mwl8k_txq_init(hw
, i
);
3103 goto err_free_queues
;
3106 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
3107 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3108 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
3109 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
3111 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
3112 IRQF_SHARED
, MWL8K_NAME
, hw
);
3114 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
3115 wiphy_name(hw
->wiphy
));
3116 goto err_free_queues
;
3119 /* Reset firmware and hardware */
3120 mwl8k_hw_reset(priv
);
3122 /* Ask userland hotplug daemon for the device firmware */
3123 rc
= mwl8k_request_firmware(priv
);
3125 printk(KERN_ERR
"%s: Firmware files not found\n",
3126 wiphy_name(hw
->wiphy
));
3130 /* Load firmware into hardware */
3131 rc
= mwl8k_load_firmware(hw
);
3133 printk(KERN_ERR
"%s: Cannot start firmware\n",
3134 wiphy_name(hw
->wiphy
));
3135 goto err_stop_firmware
;
3138 /* Reclaim memory once firmware is successfully loaded */
3139 mwl8k_release_firmware(priv
);
3142 * Temporarily enable interrupts. Initial firmware host
3143 * commands use interrupts and avoids polling. Disable
3144 * interrupts when done.
3146 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3148 /* Get config data, mac addrs etc */
3149 rc
= mwl8k_cmd_get_hw_spec(hw
);
3151 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
3152 wiphy_name(hw
->wiphy
));
3153 goto err_stop_firmware
;
3156 /* Turn radio off */
3157 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3159 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3160 goto err_stop_firmware
;
3163 /* Clear MAC address */
3164 rc
= mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
3166 printk(KERN_ERR
"%s: Cannot clear MAC address\n",
3167 wiphy_name(hw
->wiphy
));
3168 goto err_stop_firmware
;
3171 /* Disable interrupts */
3172 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3173 free_irq(priv
->pdev
->irq
, hw
);
3175 rc
= ieee80211_register_hw(hw
);
3177 printk(KERN_ERR
"%s: Cannot register device\n",
3178 wiphy_name(hw
->wiphy
));
3179 goto err_stop_firmware
;
3182 printk(KERN_INFO
"%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3183 wiphy_name(hw
->wiphy
), priv
->device_info
->part_name
,
3184 priv
->hw_rev
, hw
->wiphy
->perm_addr
,
3185 priv
->ap_fw
? "AP" : "STA",
3186 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3187 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3192 mwl8k_hw_reset(priv
);
3193 mwl8k_release_firmware(priv
);
3196 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3197 free_irq(priv
->pdev
->irq
, hw
);
3200 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3201 mwl8k_txq_deinit(hw
, i
);
3202 mwl8k_rxq_deinit(hw
, 0);
3205 if (priv
->cookie
!= NULL
)
3206 pci_free_consistent(priv
->pdev
, 4,
3207 priv
->cookie
, priv
->cookie_dma
);
3209 if (priv
->regs
!= NULL
)
3210 pci_iounmap(pdev
, priv
->regs
);
3212 if (priv
->sram
!= NULL
)
3213 pci_iounmap(pdev
, priv
->sram
);
3215 pci_set_drvdata(pdev
, NULL
);
3216 ieee80211_free_hw(hw
);
3219 pci_release_regions(pdev
);
3220 pci_disable_device(pdev
);
3225 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3227 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3230 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3232 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3233 struct mwl8k_priv
*priv
;
3240 ieee80211_stop_queues(hw
);
3242 ieee80211_unregister_hw(hw
);
3244 /* Remove tx reclaim tasklet */
3245 tasklet_kill(&priv
->tx_reclaim_task
);
3248 mwl8k_hw_reset(priv
);
3250 /* Return all skbs to mac80211 */
3251 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3252 mwl8k_txq_reclaim(hw
, i
, 1);
3254 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3255 mwl8k_txq_deinit(hw
, i
);
3257 mwl8k_rxq_deinit(hw
, 0);
3259 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3261 pci_iounmap(pdev
, priv
->regs
);
3262 pci_iounmap(pdev
, priv
->sram
);
3263 pci_set_drvdata(pdev
, NULL
);
3264 ieee80211_free_hw(hw
);
3265 pci_release_regions(pdev
);
3266 pci_disable_device(pdev
);
3269 static struct pci_driver mwl8k_driver
= {
3271 .id_table
= mwl8k_pci_id_table
,
3272 .probe
= mwl8k_probe
,
3273 .remove
= __devexit_p(mwl8k_remove
),
3274 .shutdown
= __devexit_p(mwl8k_shutdown
),
3277 static int __init
mwl8k_init(void)
3279 return pci_register_driver(&mwl8k_driver
);
3282 static void __exit
mwl8k_exit(void)
3284 pci_unregister_driver(&mwl8k_driver
);
3287 module_init(mwl8k_init
);
3288 module_exit(mwl8k_exit
);
3290 MODULE_DESCRIPTION(MWL8K_DESC
);
3291 MODULE_VERSION(MWL8K_VERSION
);
3292 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3293 MODULE_LICENSE("GPL");