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[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
25
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.9.1"
29
30 MODULE_DESCRIPTION(MWL8K_DESC);
31 MODULE_VERSION(MWL8K_VERSION);
32 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
33 MODULE_LICENSE("GPL");
34
35 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
36 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
37 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
38 { }
39 };
40 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41
42 /* Register definitions */
43 #define MWL8K_HIU_GEN_PTR 0x00000c10
44 #define MWL8K_MODE_STA 0x0000005a
45 #define MWL8K_MODE_AP 0x000000a5
46 #define MWL8K_HIU_INT_CODE 0x00000c14
47 #define MWL8K_FWSTA_READY 0xf0f1f2f4
48 #define MWL8K_FWAP_READY 0xf1f2f4a5
49 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
50 #define MWL8K_HIU_SCRATCH 0x00000c40
51
52 /* Host->device communications */
53 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
54 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
55 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
56 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
57 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
58 #define MWL8K_H2A_INT_DUMMY (1 << 20)
59 #define MWL8K_H2A_INT_RESET (1 << 15)
60 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
61 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
62
63 /* Device->host communications */
64 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
65 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
66 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
67 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
68 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
69 #define MWL8K_A2H_INT_DUMMY (1 << 20)
70 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
71 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
72 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
73 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
74 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
75 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
76 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
77 #define MWL8K_A2H_INT_RX_READY (1 << 1)
78 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
79
80 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
81 MWL8K_A2H_INT_CHNL_SWITCHED | \
82 MWL8K_A2H_INT_QUEUE_EMPTY | \
83 MWL8K_A2H_INT_RADAR_DETECT | \
84 MWL8K_A2H_INT_RADIO_ON | \
85 MWL8K_A2H_INT_RADIO_OFF | \
86 MWL8K_A2H_INT_MAC_EVENT | \
87 MWL8K_A2H_INT_OPC_DONE | \
88 MWL8K_A2H_INT_RX_READY | \
89 MWL8K_A2H_INT_TX_DONE)
90
91 /* WME stream classes */
92 #define WME_AC_BE 0 /* best effort */
93 #define WME_AC_BK 1 /* background */
94 #define WME_AC_VI 2 /* video */
95 #define WME_AC_VO 3 /* voice */
96
97 #define MWL8K_RX_QUEUES 1
98 #define MWL8K_TX_QUEUES 4
99
100 struct mwl8k_rx_queue {
101 int rx_desc_count;
102
103 /* hw receives here */
104 int rx_head;
105
106 /* refill descs here */
107 int rx_tail;
108
109 struct mwl8k_rx_desc *rx_desc_area;
110 dma_addr_t rx_desc_dma;
111 struct sk_buff **rx_skb;
112 };
113
114 struct mwl8k_tx_queue {
115 /* hw transmits here */
116 int tx_head;
117
118 /* sw appends here */
119 int tx_tail;
120
121 struct ieee80211_tx_queue_stats tx_stats;
122 struct mwl8k_tx_desc *tx_desc_area;
123 dma_addr_t tx_desc_dma;
124 struct sk_buff **tx_skb;
125 };
126
127 /* Pointers to the firmware data and meta information about it. */
128 struct mwl8k_firmware {
129 /* Microcode */
130 struct firmware *ucode;
131
132 /* Boot helper code */
133 struct firmware *helper;
134 };
135
136 struct mwl8k_priv {
137 void __iomem *regs;
138 struct ieee80211_hw *hw;
139
140 struct pci_dev *pdev;
141 u8 name[16];
142 /* firmware access lock */
143 spinlock_t fw_lock;
144
145 /* firmware files and meta data */
146 struct mwl8k_firmware fw;
147 u32 part_num;
148
149 /* lock held over TX and TX reap */
150 spinlock_t tx_lock;
151
152 struct ieee80211_vif *vif;
153
154 struct ieee80211_channel *current_channel;
155
156 /* power management status cookie from firmware */
157 u32 *cookie;
158 dma_addr_t cookie_dma;
159
160 u16 num_mcaddrs;
161 u8 hw_rev;
162 __le32 fw_rev;
163
164 /*
165 * Running count of TX packets in flight, to avoid
166 * iterating over the transmit rings each time.
167 */
168 int pending_tx_pkts;
169
170 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
171 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
172
173 /* PHY parameters */
174 struct ieee80211_supported_band band;
175 struct ieee80211_channel channels[14];
176 struct ieee80211_rate rates[12];
177
178 bool radio_on;
179 bool radio_short_preamble;
180 bool wmm_enabled;
181
182 /* Set if PHY config is in progress */
183 bool inconfig;
184
185 /* XXX need to convert this to handle multiple interfaces */
186 bool capture_beacon;
187 u8 capture_bssid[ETH_ALEN];
188 struct sk_buff *beacon_skb;
189
190 /*
191 * This FJ worker has to be global as it is scheduled from the
192 * RX handler. At this point we don't know which interface it
193 * belongs to until the list of bssids waiting to complete join
194 * is checked.
195 */
196 struct work_struct finalize_join_worker;
197
198 /* Tasklet to reclaim TX descriptors and buffers after tx */
199 struct tasklet_struct tx_reclaim_task;
200
201 /* Work thread to serialize configuration requests */
202 struct workqueue_struct *config_wq;
203 struct completion *hostcmd_wait;
204 struct completion *tx_wait;
205 };
206
207 /* Per interface specific private data */
208 struct mwl8k_vif {
209 /* backpointer to parent config block */
210 struct mwl8k_priv *priv;
211
212 /* BSS config of AP or IBSS from mac80211*/
213 struct ieee80211_bss_conf bss_info;
214
215 /* BSSID of AP or IBSS */
216 u8 bssid[ETH_ALEN];
217 u8 mac_addr[ETH_ALEN];
218
219 /*
220 * Subset of supported legacy rates.
221 * Intersection of AP and STA supported rates.
222 */
223 struct ieee80211_rate legacy_rates[12];
224
225 /* number of supported legacy rates */
226 u8 legacy_nrates;
227
228 /* Index into station database.Returned by update_sta_db call */
229 u8 peer_id;
230
231 /* Non AMPDU sequence number assigned by driver */
232 u16 seqno;
233 };
234
235 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
236
237 static const struct ieee80211_channel mwl8k_channels[] = {
238 { .center_freq = 2412, .hw_value = 1, },
239 { .center_freq = 2417, .hw_value = 2, },
240 { .center_freq = 2422, .hw_value = 3, },
241 { .center_freq = 2427, .hw_value = 4, },
242 { .center_freq = 2432, .hw_value = 5, },
243 { .center_freq = 2437, .hw_value = 6, },
244 { .center_freq = 2442, .hw_value = 7, },
245 { .center_freq = 2447, .hw_value = 8, },
246 { .center_freq = 2452, .hw_value = 9, },
247 { .center_freq = 2457, .hw_value = 10, },
248 { .center_freq = 2462, .hw_value = 11, },
249 };
250
251 static const struct ieee80211_rate mwl8k_rates[] = {
252 { .bitrate = 10, .hw_value = 2, },
253 { .bitrate = 20, .hw_value = 4, },
254 { .bitrate = 55, .hw_value = 11, },
255 { .bitrate = 60, .hw_value = 12, },
256 { .bitrate = 90, .hw_value = 18, },
257 { .bitrate = 110, .hw_value = 22, },
258 { .bitrate = 120, .hw_value = 24, },
259 { .bitrate = 180, .hw_value = 36, },
260 { .bitrate = 240, .hw_value = 48, },
261 { .bitrate = 360, .hw_value = 72, },
262 { .bitrate = 480, .hw_value = 96, },
263 { .bitrate = 540, .hw_value = 108, },
264 };
265
266 /* Set or get info from Firmware */
267 #define MWL8K_CMD_SET 0x0001
268 #define MWL8K_CMD_GET 0x0000
269
270 /* Firmware command codes */
271 #define MWL8K_CMD_CODE_DNLD 0x0001
272 #define MWL8K_CMD_GET_HW_SPEC 0x0003
273 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
274 #define MWL8K_CMD_GET_STAT 0x0014
275 #define MWL8K_CMD_RADIO_CONTROL 0x001c
276 #define MWL8K_CMD_RF_TX_POWER 0x001e
277 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
278 #define MWL8K_CMD_SET_POST_SCAN 0x0108
279 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
280 #define MWL8K_CMD_SET_AID 0x010d
281 #define MWL8K_CMD_SET_RATE 0x0110
282 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
283 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
284 #define MWL8K_CMD_SET_SLOT 0x0114
285 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
286 #define MWL8K_CMD_SET_WMM_MODE 0x0123
287 #define MWL8K_CMD_MIMO_CONFIG 0x0125
288 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
289 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
290 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
291 #define MWL8K_CMD_UPDATE_STADB 0x1123
292
293 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
294 {
295 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
296 snprintf(buf, bufsize, "%s", #x);\
297 return buf;\
298 } while (0)
299 switch (cmd & ~0x8000) {
300 MWL8K_CMDNAME(CODE_DNLD);
301 MWL8K_CMDNAME(GET_HW_SPEC);
302 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
303 MWL8K_CMDNAME(GET_STAT);
304 MWL8K_CMDNAME(RADIO_CONTROL);
305 MWL8K_CMDNAME(RF_TX_POWER);
306 MWL8K_CMDNAME(SET_PRE_SCAN);
307 MWL8K_CMDNAME(SET_POST_SCAN);
308 MWL8K_CMDNAME(SET_RF_CHANNEL);
309 MWL8K_CMDNAME(SET_AID);
310 MWL8K_CMDNAME(SET_RATE);
311 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
312 MWL8K_CMDNAME(RTS_THRESHOLD);
313 MWL8K_CMDNAME(SET_SLOT);
314 MWL8K_CMDNAME(SET_EDCA_PARAMS);
315 MWL8K_CMDNAME(SET_WMM_MODE);
316 MWL8K_CMDNAME(MIMO_CONFIG);
317 MWL8K_CMDNAME(USE_FIXED_RATE);
318 MWL8K_CMDNAME(ENABLE_SNIFFER);
319 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
320 MWL8K_CMDNAME(UPDATE_STADB);
321 default:
322 snprintf(buf, bufsize, "0x%x", cmd);
323 }
324 #undef MWL8K_CMDNAME
325
326 return buf;
327 }
328
329 /* Hardware and firmware reset */
330 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
331 {
332 iowrite32(MWL8K_H2A_INT_RESET,
333 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
334 iowrite32(MWL8K_H2A_INT_RESET,
335 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
336 msleep(20);
337 }
338
339 /* Release fw image */
340 static void mwl8k_release_fw(struct firmware **fw)
341 {
342 if (*fw == NULL)
343 return;
344 release_firmware(*fw);
345 *fw = NULL;
346 }
347
348 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
349 {
350 mwl8k_release_fw(&priv->fw.ucode);
351 mwl8k_release_fw(&priv->fw.helper);
352 }
353
354 /* Request fw image */
355 static int mwl8k_request_fw(struct mwl8k_priv *priv,
356 const char *fname, struct firmware **fw)
357 {
358 /* release current image */
359 if (*fw != NULL)
360 mwl8k_release_fw(fw);
361
362 return request_firmware((const struct firmware **)fw,
363 fname, &priv->pdev->dev);
364 }
365
366 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
367 {
368 u8 filename[64];
369 int rc;
370
371 priv->part_num = part_num;
372
373 snprintf(filename, sizeof(filename),
374 "mwl8k/helper_%u.fw", priv->part_num);
375
376 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
377 if (rc) {
378 printk(KERN_ERR
379 "%s Error requesting helper firmware file %s\n",
380 pci_name(priv->pdev), filename);
381 return rc;
382 }
383
384 snprintf(filename, sizeof(filename),
385 "mwl8k/fmimage_%u.fw", priv->part_num);
386
387 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
388 if (rc) {
389 printk(KERN_ERR "%s Error requesting firmware file %s\n",
390 pci_name(priv->pdev), filename);
391 mwl8k_release_fw(&priv->fw.helper);
392 return rc;
393 }
394
395 return 0;
396 }
397
398 struct mwl8k_cmd_pkt {
399 __le16 code;
400 __le16 length;
401 __le16 seq_num;
402 __le16 result;
403 char payload[0];
404 } __attribute__((packed));
405
406 /*
407 * Firmware loading.
408 */
409 static int
410 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
411 {
412 void __iomem *regs = priv->regs;
413 dma_addr_t dma_addr;
414 int loops;
415
416 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
417 if (pci_dma_mapping_error(priv->pdev, dma_addr))
418 return -ENOMEM;
419
420 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
421 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
422 iowrite32(MWL8K_H2A_INT_DOORBELL,
423 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
424 iowrite32(MWL8K_H2A_INT_DUMMY,
425 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
426
427 loops = 1000;
428 do {
429 u32 int_code;
430
431 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
432 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
433 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
434 break;
435 }
436
437 udelay(1);
438 } while (--loops);
439
440 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
441
442 return loops ? 0 : -ETIMEDOUT;
443 }
444
445 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
446 const u8 *data, size_t length)
447 {
448 struct mwl8k_cmd_pkt *cmd;
449 int done;
450 int rc = 0;
451
452 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
453 if (cmd == NULL)
454 return -ENOMEM;
455
456 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
457 cmd->seq_num = 0;
458 cmd->result = 0;
459
460 done = 0;
461 while (length) {
462 int block_size = length > 256 ? 256 : length;
463
464 memcpy(cmd->payload, data + done, block_size);
465 cmd->length = cpu_to_le16(block_size);
466
467 rc = mwl8k_send_fw_load_cmd(priv, cmd,
468 sizeof(*cmd) + block_size);
469 if (rc)
470 break;
471
472 done += block_size;
473 length -= block_size;
474 }
475
476 if (!rc) {
477 cmd->length = 0;
478 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
479 }
480
481 kfree(cmd);
482
483 return rc;
484 }
485
486 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
487 const u8 *data, size_t length)
488 {
489 unsigned char *buffer;
490 int may_continue, rc = 0;
491 u32 done, prev_block_size;
492
493 buffer = kmalloc(1024, GFP_KERNEL);
494 if (buffer == NULL)
495 return -ENOMEM;
496
497 done = 0;
498 prev_block_size = 0;
499 may_continue = 1000;
500 while (may_continue > 0) {
501 u32 block_size;
502
503 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
504 if (block_size & 1) {
505 block_size &= ~1;
506 may_continue--;
507 } else {
508 done += prev_block_size;
509 length -= prev_block_size;
510 }
511
512 if (block_size > 1024 || block_size > length) {
513 rc = -EOVERFLOW;
514 break;
515 }
516
517 if (length == 0) {
518 rc = 0;
519 break;
520 }
521
522 if (block_size == 0) {
523 rc = -EPROTO;
524 may_continue--;
525 udelay(1);
526 continue;
527 }
528
529 prev_block_size = block_size;
530 memcpy(buffer, data + done, block_size);
531
532 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
533 if (rc)
534 break;
535 }
536
537 if (!rc && length != 0)
538 rc = -EREMOTEIO;
539
540 kfree(buffer);
541
542 return rc;
543 }
544
545 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
546 {
547 int loops, rc;
548
549 const u8 *ucode = priv->fw.ucode->data;
550 size_t ucode_len = priv->fw.ucode->size;
551 const u8 *helper = priv->fw.helper->data;
552 size_t helper_len = priv->fw.helper->size;
553
554 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
555 rc = mwl8k_load_fw_image(priv, helper, helper_len);
556 if (rc) {
557 printk(KERN_ERR "%s: unable to load firmware "
558 "helper image\n", pci_name(priv->pdev));
559 return rc;
560 }
561 msleep(1);
562
563 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
564 } else {
565 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
566 }
567
568 if (rc) {
569 printk(KERN_ERR "%s: unable to load firmware data\n",
570 pci_name(priv->pdev));
571 return rc;
572 }
573
574 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
575 msleep(1);
576
577 loops = 200000;
578 do {
579 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
580 == MWL8K_FWSTA_READY)
581 break;
582 udelay(1);
583 } while (--loops);
584
585 return loops ? 0 : -ETIMEDOUT;
586 }
587
588
589 /*
590 * Defines shared between transmission and reception.
591 */
592 /* HT control fields for firmware */
593 struct ewc_ht_info {
594 __le16 control1;
595 __le16 control2;
596 __le16 control3;
597 } __attribute__((packed));
598
599 /* Firmware Station database operations */
600 #define MWL8K_STA_DB_ADD_ENTRY 0
601 #define MWL8K_STA_DB_MODIFY_ENTRY 1
602 #define MWL8K_STA_DB_DEL_ENTRY 2
603 #define MWL8K_STA_DB_FLUSH 3
604
605 /* Peer Entry flags - used to define the type of the peer node */
606 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
607
608 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
609 #define MWL8K_MCS_BITMAP_SIZE 16
610
611 struct peer_capability_info {
612 /* Peer type - AP vs. STA. */
613 __u8 peer_type;
614
615 /* Basic 802.11 capabilities from assoc resp. */
616 __le16 basic_caps;
617
618 /* Set if peer supports 802.11n high throughput (HT). */
619 __u8 ht_support;
620
621 /* Valid if HT is supported. */
622 __le16 ht_caps;
623 __u8 extended_ht_caps;
624 struct ewc_ht_info ewc_info;
625
626 /* Legacy rate table. Intersection of our rates and peer rates. */
627 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
628
629 /* HT rate table. Intersection of our rates and peer rates. */
630 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
631 __u8 pad[16];
632
633 /* If set, interoperability mode, no proprietary extensions. */
634 __u8 interop;
635 __u8 pad2;
636 __u8 station_id;
637 __le16 amsdu_enabled;
638 } __attribute__((packed));
639
640 /* Inline functions to manipulate QoS field in data descriptor. */
641 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
642 {
643 u16 val_mask = 1 << 4;
644
645 /* End of Service Period Bit 4 */
646 return qos | val_mask;
647 }
648
649 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
650 {
651 u16 val_mask = 0x3;
652 u8 shift = 5;
653 u16 qos_mask = ~(val_mask << shift);
654
655 /* Ack Policy Bit 5-6 */
656 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
657 }
658
659 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
660 {
661 u16 val_mask = 1 << 7;
662
663 /* AMSDU present Bit 7 */
664 return qos | val_mask;
665 }
666
667 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
668 {
669 u16 val_mask = 0xff;
670 u8 shift = 8;
671 u16 qos_mask = ~(val_mask << shift);
672
673 /* Queue Length Bits 8-15 */
674 return (qos & qos_mask) | ((len & val_mask) << shift);
675 }
676
677 /* DMA header used by firmware and hardware. */
678 struct mwl8k_dma_data {
679 __le16 fwlen;
680 struct ieee80211_hdr wh;
681 } __attribute__((packed));
682
683 /* Routines to add/remove DMA header from skb. */
684 static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
685 {
686 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data;
687 void *dst, *src = &tr->wh;
688 int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
689 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
690
691 dst = (void *)tr + space;
692 if (dst != src) {
693 memmove(dst, src, hdrlen);
694 skb_pull(skb, space);
695 }
696 }
697
698 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
699 {
700 struct ieee80211_hdr *wh;
701 u32 hdrlen, pktlen;
702 struct mwl8k_dma_data *tr;
703
704 wh = (struct ieee80211_hdr *)skb->data;
705 hdrlen = ieee80211_hdrlen(wh->frame_control);
706 pktlen = skb->len;
707
708 /*
709 * Copy up/down the 802.11 header; the firmware requires
710 * we present a 2-byte payload length followed by a
711 * 4-address header (w/o QoS), followed (optionally) by
712 * any WEP/ExtIV header (but only filled in for CCMP).
713 */
714 if (hdrlen != sizeof(struct mwl8k_dma_data))
715 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
716
717 tr = (struct mwl8k_dma_data *)skb->data;
718 if (wh != &tr->wh)
719 memmove(&tr->wh, wh, hdrlen);
720
721 /* Clear addr4 */
722 memset(tr->wh.addr4, 0, ETH_ALEN);
723
724 /*
725 * Firmware length is the length of the fully formed "802.11
726 * payload". That is, everything except for the 802.11 header.
727 * This includes all crypto material including the MIC.
728 */
729 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
730 }
731
732
733 /*
734 * Packet reception.
735 */
736 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
737
738 struct mwl8k_rx_desc {
739 __le16 pkt_len;
740 __u8 link_quality;
741 __u8 noise_level;
742 __le32 pkt_phys_addr;
743 __le32 next_rx_desc_phys_addr;
744 __le16 qos_control;
745 __le16 rate_info;
746 __le32 pad0[4];
747 __u8 rssi;
748 __u8 channel;
749 __le16 pad1;
750 __u8 rx_ctrl;
751 __u8 rx_status;
752 __u8 pad2[2];
753 } __attribute__((packed));
754
755 #define MWL8K_RX_DESCS 256
756 #define MWL8K_RX_MAXSZ 3800
757
758 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
759 {
760 struct mwl8k_priv *priv = hw->priv;
761 struct mwl8k_rx_queue *rxq = priv->rxq + index;
762 int size;
763 int i;
764
765 rxq->rx_desc_count = 0;
766 rxq->rx_head = 0;
767 rxq->rx_tail = 0;
768
769 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
770
771 rxq->rx_desc_area =
772 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
773 if (rxq->rx_desc_area == NULL) {
774 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
775 priv->name);
776 return -ENOMEM;
777 }
778 memset(rxq->rx_desc_area, 0, size);
779
780 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
781 sizeof(*rxq->rx_skb), GFP_KERNEL);
782 if (rxq->rx_skb == NULL) {
783 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
784 priv->name);
785 pci_free_consistent(priv->pdev, size,
786 rxq->rx_desc_area, rxq->rx_desc_dma);
787 return -ENOMEM;
788 }
789 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
790
791 for (i = 0; i < MWL8K_RX_DESCS; i++) {
792 struct mwl8k_rx_desc *rx_desc;
793 int nexti;
794
795 rx_desc = rxq->rx_desc_area + i;
796 nexti = (i + 1) % MWL8K_RX_DESCS;
797
798 rx_desc->next_rx_desc_phys_addr =
799 cpu_to_le32(rxq->rx_desc_dma
800 + nexti * sizeof(*rx_desc));
801 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
802 }
803
804 return 0;
805 }
806
807 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
808 {
809 struct mwl8k_priv *priv = hw->priv;
810 struct mwl8k_rx_queue *rxq = priv->rxq + index;
811 int refilled;
812
813 refilled = 0;
814 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
815 struct sk_buff *skb;
816 int rx;
817
818 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
819 if (skb == NULL)
820 break;
821
822 rxq->rx_desc_count++;
823
824 rx = rxq->rx_tail;
825 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
826
827 rxq->rx_desc_area[rx].pkt_phys_addr =
828 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
829 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
830
831 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
832 rxq->rx_skb[rx] = skb;
833 wmb();
834 rxq->rx_desc_area[rx].rx_ctrl = 0;
835
836 refilled++;
837 }
838
839 return refilled;
840 }
841
842 /* Must be called only when the card's reception is completely halted */
843 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
844 {
845 struct mwl8k_priv *priv = hw->priv;
846 struct mwl8k_rx_queue *rxq = priv->rxq + index;
847 int i;
848
849 for (i = 0; i < MWL8K_RX_DESCS; i++) {
850 if (rxq->rx_skb[i] != NULL) {
851 unsigned long addr;
852
853 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
854 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
855 PCI_DMA_FROMDEVICE);
856 kfree_skb(rxq->rx_skb[i]);
857 rxq->rx_skb[i] = NULL;
858 }
859 }
860
861 kfree(rxq->rx_skb);
862 rxq->rx_skb = NULL;
863
864 pci_free_consistent(priv->pdev,
865 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
866 rxq->rx_desc_area, rxq->rx_desc_dma);
867 rxq->rx_desc_area = NULL;
868 }
869
870
871 /*
872 * Scan a list of BSSIDs to process for finalize join.
873 * Allows for extension to process multiple BSSIDs.
874 */
875 static inline int
876 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
877 {
878 return priv->capture_beacon &&
879 ieee80211_is_beacon(wh->frame_control) &&
880 !compare_ether_addr(wh->addr3, priv->capture_bssid);
881 }
882
883 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
884 struct sk_buff *skb)
885 {
886 priv->capture_beacon = false;
887 memset(priv->capture_bssid, 0, ETH_ALEN);
888
889 /*
890 * Use GFP_ATOMIC as rxq_process is called from
891 * the primary interrupt handler, memory allocation call
892 * must not sleep.
893 */
894 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
895 if (priv->beacon_skb != NULL)
896 queue_work(priv->config_wq,
897 &priv->finalize_join_worker);
898 }
899
900 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
901 {
902 struct mwl8k_priv *priv = hw->priv;
903 struct mwl8k_rx_queue *rxq = priv->rxq + index;
904 int processed;
905
906 processed = 0;
907 while (rxq->rx_desc_count && limit--) {
908 struct mwl8k_rx_desc *rx_desc;
909 struct sk_buff *skb;
910 struct ieee80211_rx_status status;
911 unsigned long addr;
912 struct ieee80211_hdr *wh;
913
914 rx_desc = rxq->rx_desc_area + rxq->rx_head;
915 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
916 break;
917 rmb();
918
919 skb = rxq->rx_skb[rxq->rx_head];
920 if (skb == NULL)
921 break;
922 rxq->rx_skb[rxq->rx_head] = NULL;
923
924 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
925 rxq->rx_desc_count--;
926
927 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
928 pci_unmap_single(priv->pdev, addr,
929 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
930
931 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
932 mwl8k_remove_dma_header(skb);
933
934 wh = (struct ieee80211_hdr *)skb->data;
935
936 /*
937 * Check for pending join operation. save a copy of
938 * the beacon and schedule a tasklet to send finalize
939 * join command to the firmware.
940 */
941 if (mwl8k_capture_bssid(priv, wh))
942 mwl8k_save_beacon(priv, skb);
943
944 memset(&status, 0, sizeof(status));
945 status.mactime = 0;
946 status.signal = -rx_desc->rssi;
947 status.noise = -rx_desc->noise_level;
948 status.qual = rx_desc->link_quality;
949 status.antenna = 1;
950 status.rate_idx = 1;
951 status.flag = 0;
952 status.band = IEEE80211_BAND_2GHZ;
953 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
954 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
955 ieee80211_rx_irqsafe(hw, skb);
956
957 processed++;
958 }
959
960 return processed;
961 }
962
963
964 /*
965 * Packet transmission.
966 */
967
968 /* Transmit queue assignment. */
969 enum {
970 MWL8K_WME_AC_BK = 0, /* background access */
971 MWL8K_WME_AC_BE = 1, /* best effort access */
972 MWL8K_WME_AC_VI = 2, /* video access */
973 MWL8K_WME_AC_VO = 3, /* voice access */
974 };
975
976 /* Transmit packet ACK policy */
977 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
978 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
979
980 #define GET_TXQ(_ac) (\
981 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
982 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
983 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
984 MWL8K_WME_AC_BE)
985
986 #define MWL8K_TXD_STATUS_OK 0x00000001
987 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
988 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
989 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
990 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
991
992 struct mwl8k_tx_desc {
993 __le32 status;
994 __u8 data_rate;
995 __u8 tx_priority;
996 __le16 qos_control;
997 __le32 pkt_phys_addr;
998 __le16 pkt_len;
999 __u8 dest_MAC_addr[ETH_ALEN];
1000 __le32 next_tx_desc_phys_addr;
1001 __le32 reserved;
1002 __le16 rate_info;
1003 __u8 peer_id;
1004 __u8 tx_frag_cnt;
1005 } __attribute__((packed));
1006
1007 #define MWL8K_TX_DESCS 128
1008
1009 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1010 {
1011 struct mwl8k_priv *priv = hw->priv;
1012 struct mwl8k_tx_queue *txq = priv->txq + index;
1013 int size;
1014 int i;
1015
1016 memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1017 txq->tx_stats.limit = MWL8K_TX_DESCS;
1018 txq->tx_head = 0;
1019 txq->tx_tail = 0;
1020
1021 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1022
1023 txq->tx_desc_area =
1024 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1025 if (txq->tx_desc_area == NULL) {
1026 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1027 priv->name);
1028 return -ENOMEM;
1029 }
1030 memset(txq->tx_desc_area, 0, size);
1031
1032 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1033 GFP_KERNEL);
1034 if (txq->tx_skb == NULL) {
1035 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1036 priv->name);
1037 pci_free_consistent(priv->pdev, size,
1038 txq->tx_desc_area, txq->tx_desc_dma);
1039 return -ENOMEM;
1040 }
1041 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1042
1043 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1044 struct mwl8k_tx_desc *tx_desc;
1045 int nexti;
1046
1047 tx_desc = txq->tx_desc_area + i;
1048 nexti = (i + 1) % MWL8K_TX_DESCS;
1049
1050 tx_desc->status = 0;
1051 tx_desc->next_tx_desc_phys_addr =
1052 cpu_to_le32(txq->tx_desc_dma +
1053 nexti * sizeof(*tx_desc));
1054 }
1055
1056 return 0;
1057 }
1058
1059 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1060 {
1061 iowrite32(MWL8K_H2A_INT_PPA_READY,
1062 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1063 iowrite32(MWL8K_H2A_INT_DUMMY,
1064 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1065 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1066 }
1067
1068 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1069 {
1070 return priv->pending_tx_pkts;
1071 }
1072
1073 struct mwl8k_txq_info {
1074 u32 fw_owned;
1075 u32 drv_owned;
1076 u32 unused;
1077 u32 len;
1078 u32 head;
1079 u32 tail;
1080 };
1081
1082 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1083 struct mwl8k_txq_info *txinfo)
1084 {
1085 int count, desc, status;
1086 struct mwl8k_tx_queue *txq;
1087 struct mwl8k_tx_desc *tx_desc;
1088 int ndescs = 0;
1089
1090 memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info));
1091
1092 spin_lock_bh(&priv->tx_lock);
1093 for (count = 0; count < MWL8K_TX_QUEUES; count++) {
1094 txq = priv->txq + count;
1095 txinfo[count].len = txq->tx_stats.len;
1096 txinfo[count].head = txq->tx_head;
1097 txinfo[count].tail = txq->tx_tail;
1098 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1099 tx_desc = txq->tx_desc_area + desc;
1100 status = le32_to_cpu(tx_desc->status);
1101
1102 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1103 txinfo[count].fw_owned++;
1104 else
1105 txinfo[count].drv_owned++;
1106
1107 if (tx_desc->pkt_len == 0)
1108 txinfo[count].unused++;
1109 }
1110 }
1111 spin_unlock_bh(&priv->tx_lock);
1112
1113 return ndescs;
1114 }
1115
1116 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1117 {
1118 struct mwl8k_priv *priv = hw->priv;
1119 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1120 u32 count;
1121 unsigned long timeout;
1122
1123 might_sleep();
1124
1125 if (priv->tx_wait != NULL)
1126 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1127
1128 spin_lock_bh(&priv->tx_lock);
1129 count = mwl8k_txq_busy(priv);
1130 if (count) {
1131 priv->tx_wait = &cmd_wait;
1132 if (priv->radio_on)
1133 mwl8k_tx_start(priv);
1134 }
1135 spin_unlock_bh(&priv->tx_lock);
1136
1137 if (count) {
1138 struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES];
1139 int index;
1140 int newcount;
1141
1142 timeout = wait_for_completion_timeout(&cmd_wait,
1143 msecs_to_jiffies(delay_ms));
1144 if (timeout)
1145 return 0;
1146
1147 spin_lock_bh(&priv->tx_lock);
1148 priv->tx_wait = NULL;
1149 newcount = mwl8k_txq_busy(priv);
1150 spin_unlock_bh(&priv->tx_lock);
1151
1152 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1153 __func__, __LINE__, delay_ms, count, newcount);
1154
1155 mwl8k_scan_tx_ring(priv, txinfo);
1156 for (index = 0; index < MWL8K_TX_QUEUES; index++)
1157 printk(KERN_ERR
1158 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1159 index,
1160 txinfo[index].len,
1161 txinfo[index].head,
1162 txinfo[index].tail,
1163 txinfo[index].fw_owned,
1164 txinfo[index].drv_owned,
1165 txinfo[index].unused);
1166
1167 return -ETIMEDOUT;
1168 }
1169
1170 return 0;
1171 }
1172
1173 #define MWL8K_TXD_SUCCESS(status) \
1174 ((status) & (MWL8K_TXD_STATUS_OK | \
1175 MWL8K_TXD_STATUS_OK_RETRY | \
1176 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1177
1178 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1179 {
1180 struct mwl8k_priv *priv = hw->priv;
1181 struct mwl8k_tx_queue *txq = priv->txq + index;
1182 int wake = 0;
1183
1184 while (txq->tx_stats.len > 0) {
1185 int tx;
1186 struct mwl8k_tx_desc *tx_desc;
1187 unsigned long addr;
1188 int size;
1189 struct sk_buff *skb;
1190 struct ieee80211_tx_info *info;
1191 u32 status;
1192
1193 tx = txq->tx_head;
1194 tx_desc = txq->tx_desc_area + tx;
1195
1196 status = le32_to_cpu(tx_desc->status);
1197
1198 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1199 if (!force)
1200 break;
1201 tx_desc->status &=
1202 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1203 }
1204
1205 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1206 BUG_ON(txq->tx_stats.len == 0);
1207 txq->tx_stats.len--;
1208 priv->pending_tx_pkts--;
1209
1210 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1211 size = le16_to_cpu(tx_desc->pkt_len);
1212 skb = txq->tx_skb[tx];
1213 txq->tx_skb[tx] = NULL;
1214
1215 BUG_ON(skb == NULL);
1216 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1217
1218 mwl8k_remove_dma_header(skb);
1219
1220 /* Mark descriptor as unused */
1221 tx_desc->pkt_phys_addr = 0;
1222 tx_desc->pkt_len = 0;
1223
1224 info = IEEE80211_SKB_CB(skb);
1225 ieee80211_tx_info_clear_status(info);
1226 if (MWL8K_TXD_SUCCESS(status))
1227 info->flags |= IEEE80211_TX_STAT_ACK;
1228
1229 ieee80211_tx_status_irqsafe(hw, skb);
1230
1231 wake = !priv->inconfig && priv->radio_on;
1232 }
1233
1234 if (wake)
1235 ieee80211_wake_queue(hw, index);
1236 }
1237
1238 /* must be called only when the card's transmit is completely halted */
1239 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1240 {
1241 struct mwl8k_priv *priv = hw->priv;
1242 struct mwl8k_tx_queue *txq = priv->txq + index;
1243
1244 mwl8k_txq_reclaim(hw, index, 1);
1245
1246 kfree(txq->tx_skb);
1247 txq->tx_skb = NULL;
1248
1249 pci_free_consistent(priv->pdev,
1250 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1251 txq->tx_desc_area, txq->tx_desc_dma);
1252 txq->tx_desc_area = NULL;
1253 }
1254
1255 static int
1256 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1257 {
1258 struct mwl8k_priv *priv = hw->priv;
1259 struct ieee80211_tx_info *tx_info;
1260 struct mwl8k_vif *mwl8k_vif;
1261 struct ieee80211_hdr *wh;
1262 struct mwl8k_tx_queue *txq;
1263 struct mwl8k_tx_desc *tx;
1264 dma_addr_t dma;
1265 u32 txstatus;
1266 u8 txdatarate;
1267 u16 qos;
1268
1269 wh = (struct ieee80211_hdr *)skb->data;
1270 if (ieee80211_is_data_qos(wh->frame_control))
1271 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1272 else
1273 qos = 0;
1274
1275 mwl8k_add_dma_header(skb);
1276 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1277
1278 tx_info = IEEE80211_SKB_CB(skb);
1279 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1280
1281 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1282 u16 seqno = mwl8k_vif->seqno;
1283
1284 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1285 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1286 mwl8k_vif->seqno = seqno++ % 4096;
1287 }
1288
1289 /* Setup firmware control bit fields for each frame type. */
1290 txstatus = 0;
1291 txdatarate = 0;
1292 if (ieee80211_is_mgmt(wh->frame_control) ||
1293 ieee80211_is_ctl(wh->frame_control)) {
1294 txdatarate = 0;
1295 qos = mwl8k_qos_setbit_eosp(qos);
1296 /* Set Queue size to unspecified */
1297 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1298 } else if (ieee80211_is_data(wh->frame_control)) {
1299 txdatarate = 1;
1300 if (is_multicast_ether_addr(wh->addr1))
1301 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1302
1303 /* Send pkt in an aggregate if AMPDU frame. */
1304 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1305 qos = mwl8k_qos_setbit_ack(qos,
1306 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1307 else
1308 qos = mwl8k_qos_setbit_ack(qos,
1309 MWL8K_TXD_ACK_POLICY_NORMAL);
1310
1311 if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
1312 qos = mwl8k_qos_setbit_amsdu(qos);
1313 }
1314
1315 dma = pci_map_single(priv->pdev, skb->data,
1316 skb->len, PCI_DMA_TODEVICE);
1317
1318 if (pci_dma_mapping_error(priv->pdev, dma)) {
1319 printk(KERN_DEBUG "%s: failed to dma map skb, "
1320 "dropping TX frame.\n", priv->name);
1321 dev_kfree_skb(skb);
1322 return NETDEV_TX_OK;
1323 }
1324
1325 spin_lock_bh(&priv->tx_lock);
1326
1327 txq = priv->txq + index;
1328
1329 BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
1330 txq->tx_skb[txq->tx_tail] = skb;
1331
1332 tx = txq->tx_desc_area + txq->tx_tail;
1333 tx->data_rate = txdatarate;
1334 tx->tx_priority = index;
1335 tx->qos_control = cpu_to_le16(qos);
1336 tx->pkt_phys_addr = cpu_to_le32(dma);
1337 tx->pkt_len = cpu_to_le16(skb->len);
1338 tx->rate_info = 0;
1339 tx->peer_id = mwl8k_vif->peer_id;
1340 wmb();
1341 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1342
1343 txq->tx_stats.count++;
1344 txq->tx_stats.len++;
1345 priv->pending_tx_pkts++;
1346
1347 txq->tx_tail++;
1348 if (txq->tx_tail == MWL8K_TX_DESCS)
1349 txq->tx_tail = 0;
1350
1351 if (txq->tx_head == txq->tx_tail)
1352 ieee80211_stop_queue(hw, index);
1353
1354 mwl8k_tx_start(priv);
1355
1356 spin_unlock_bh(&priv->tx_lock);
1357
1358 return NETDEV_TX_OK;
1359 }
1360
1361
1362 /*
1363 * Command processing.
1364 */
1365
1366 /* Timeout firmware commands after 2000ms */
1367 #define MWL8K_CMD_TIMEOUT_MS 2000
1368
1369 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1370 {
1371 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1372 struct mwl8k_priv *priv = hw->priv;
1373 void __iomem *regs = priv->regs;
1374 dma_addr_t dma_addr;
1375 unsigned int dma_size;
1376 int rc;
1377 unsigned long timeout = 0;
1378 u8 buf[32];
1379
1380 cmd->result = 0xFFFF;
1381 dma_size = le16_to_cpu(cmd->length);
1382 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1383 PCI_DMA_BIDIRECTIONAL);
1384 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1385 return -ENOMEM;
1386
1387 if (priv->hostcmd_wait != NULL)
1388 printk(KERN_ERR "WARNING host command in progress\n");
1389
1390 spin_lock_irq(&priv->fw_lock);
1391 priv->hostcmd_wait = &cmd_wait;
1392 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1393 iowrite32(MWL8K_H2A_INT_DOORBELL,
1394 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1395 iowrite32(MWL8K_H2A_INT_DUMMY,
1396 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1397 spin_unlock_irq(&priv->fw_lock);
1398
1399 timeout = wait_for_completion_timeout(&cmd_wait,
1400 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1401
1402 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1403 PCI_DMA_BIDIRECTIONAL);
1404
1405 if (!timeout) {
1406 spin_lock_irq(&priv->fw_lock);
1407 priv->hostcmd_wait = NULL;
1408 spin_unlock_irq(&priv->fw_lock);
1409 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1410 priv->name,
1411 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1412 MWL8K_CMD_TIMEOUT_MS);
1413 rc = -ETIMEDOUT;
1414 } else {
1415 rc = cmd->result ? -EINVAL : 0;
1416 if (rc)
1417 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1418 priv->name,
1419 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1420 cmd->result);
1421 }
1422
1423 return rc;
1424 }
1425
1426 /*
1427 * GET_HW_SPEC.
1428 */
1429 struct mwl8k_cmd_get_hw_spec {
1430 struct mwl8k_cmd_pkt header;
1431 __u8 hw_rev;
1432 __u8 host_interface;
1433 __le16 num_mcaddrs;
1434 __u8 perm_addr[ETH_ALEN];
1435 __le16 region_code;
1436 __le32 fw_rev;
1437 __le32 ps_cookie;
1438 __le32 caps;
1439 __u8 mcs_bitmap[16];
1440 __le32 rx_queue_ptr;
1441 __le32 num_tx_queues;
1442 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1443 __le32 caps2;
1444 __le32 num_tx_desc_per_queue;
1445 __le32 total_rx_desc;
1446 } __attribute__((packed));
1447
1448 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1449 {
1450 struct mwl8k_priv *priv = hw->priv;
1451 struct mwl8k_cmd_get_hw_spec *cmd;
1452 int rc;
1453 int i;
1454
1455 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1456 if (cmd == NULL)
1457 return -ENOMEM;
1458
1459 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1460 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1461
1462 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1463 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1464 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1465 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1466 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1467 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1468 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1469 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1470
1471 rc = mwl8k_post_cmd(hw, &cmd->header);
1472
1473 if (!rc) {
1474 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1475 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1476 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1477 priv->hw_rev = cmd->hw_rev;
1478 }
1479
1480 kfree(cmd);
1481 return rc;
1482 }
1483
1484 /*
1485 * CMD_MAC_MULTICAST_ADR.
1486 */
1487 struct mwl8k_cmd_mac_multicast_adr {
1488 struct mwl8k_cmd_pkt header;
1489 __le16 action;
1490 __le16 numaddr;
1491 __u8 addr[0][ETH_ALEN];
1492 };
1493
1494 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1495
1496 static struct mwl8k_cmd_pkt *
1497 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1498 int mc_count, struct dev_addr_list *mclist)
1499 {
1500 struct mwl8k_priv *priv = hw->priv;
1501 struct mwl8k_cmd_mac_multicast_adr *cmd;
1502 int size;
1503 int i;
1504
1505 if (mc_count > priv->num_mcaddrs)
1506 mc_count = priv->num_mcaddrs;
1507
1508 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1509
1510 cmd = kzalloc(size, GFP_ATOMIC);
1511 if (cmd == NULL)
1512 return NULL;
1513
1514 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1515 cmd->header.length = cpu_to_le16(size);
1516 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1517 cmd->numaddr = cpu_to_le16(mc_count);
1518
1519 for (i = 0; i < mc_count && mclist; i++) {
1520 if (mclist->da_addrlen != ETH_ALEN) {
1521 kfree(cmd);
1522 return NULL;
1523 }
1524 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1525 mclist = mclist->next;
1526 }
1527
1528 return &cmd->header;
1529 }
1530
1531 /*
1532 * CMD_802_11_GET_STAT.
1533 */
1534 struct mwl8k_cmd_802_11_get_stat {
1535 struct mwl8k_cmd_pkt header;
1536 __le16 action;
1537 __le32 stats[64];
1538 } __attribute__((packed));
1539
1540 #define MWL8K_STAT_ACK_FAILURE 9
1541 #define MWL8K_STAT_RTS_FAILURE 12
1542 #define MWL8K_STAT_FCS_ERROR 24
1543 #define MWL8K_STAT_RTS_SUCCESS 11
1544
1545 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1546 struct ieee80211_low_level_stats *stats)
1547 {
1548 struct mwl8k_cmd_802_11_get_stat *cmd;
1549 int rc;
1550
1551 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1552 if (cmd == NULL)
1553 return -ENOMEM;
1554
1555 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1556 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1557 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1558
1559 rc = mwl8k_post_cmd(hw, &cmd->header);
1560 if (!rc) {
1561 stats->dot11ACKFailureCount =
1562 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1563 stats->dot11RTSFailureCount =
1564 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1565 stats->dot11FCSErrorCount =
1566 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1567 stats->dot11RTSSuccessCount =
1568 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1569 }
1570 kfree(cmd);
1571
1572 return rc;
1573 }
1574
1575 /*
1576 * CMD_802_11_RADIO_CONTROL.
1577 */
1578 struct mwl8k_cmd_802_11_radio_control {
1579 struct mwl8k_cmd_pkt header;
1580 __le16 action;
1581 __le16 control;
1582 __le16 radio_on;
1583 } __attribute__((packed));
1584
1585 static int
1586 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1587 {
1588 struct mwl8k_priv *priv = hw->priv;
1589 struct mwl8k_cmd_802_11_radio_control *cmd;
1590 int rc;
1591
1592 if (enable == priv->radio_on && !force)
1593 return 0;
1594
1595 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1596 if (cmd == NULL)
1597 return -ENOMEM;
1598
1599 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1600 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1601 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1602 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1603 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1604
1605 rc = mwl8k_post_cmd(hw, &cmd->header);
1606 kfree(cmd);
1607
1608 if (!rc)
1609 priv->radio_on = enable;
1610
1611 return rc;
1612 }
1613
1614 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1615 {
1616 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1617 }
1618
1619 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1620 {
1621 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1622 }
1623
1624 static int
1625 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1626 {
1627 struct mwl8k_priv *priv;
1628
1629 if (hw == NULL || hw->priv == NULL)
1630 return -EINVAL;
1631 priv = hw->priv;
1632
1633 priv->radio_short_preamble = short_preamble;
1634
1635 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1636 }
1637
1638 /*
1639 * CMD_802_11_RF_TX_POWER.
1640 */
1641 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1642
1643 struct mwl8k_cmd_802_11_rf_tx_power {
1644 struct mwl8k_cmd_pkt header;
1645 __le16 action;
1646 __le16 support_level;
1647 __le16 current_level;
1648 __le16 reserved;
1649 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1650 } __attribute__((packed));
1651
1652 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1653 {
1654 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1655 int rc;
1656
1657 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1658 if (cmd == NULL)
1659 return -ENOMEM;
1660
1661 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1662 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1663 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1664 cmd->support_level = cpu_to_le16(dBm);
1665
1666 rc = mwl8k_post_cmd(hw, &cmd->header);
1667 kfree(cmd);
1668
1669 return rc;
1670 }
1671
1672 /*
1673 * CMD_SET_PRE_SCAN.
1674 */
1675 struct mwl8k_cmd_set_pre_scan {
1676 struct mwl8k_cmd_pkt header;
1677 } __attribute__((packed));
1678
1679 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1680 {
1681 struct mwl8k_cmd_set_pre_scan *cmd;
1682 int rc;
1683
1684 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1685 if (cmd == NULL)
1686 return -ENOMEM;
1687
1688 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1689 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1690
1691 rc = mwl8k_post_cmd(hw, &cmd->header);
1692 kfree(cmd);
1693
1694 return rc;
1695 }
1696
1697 /*
1698 * CMD_SET_POST_SCAN.
1699 */
1700 struct mwl8k_cmd_set_post_scan {
1701 struct mwl8k_cmd_pkt header;
1702 __le32 isibss;
1703 __u8 bssid[ETH_ALEN];
1704 } __attribute__((packed));
1705
1706 static int
1707 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1708 {
1709 struct mwl8k_cmd_set_post_scan *cmd;
1710 int rc;
1711
1712 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1713 if (cmd == NULL)
1714 return -ENOMEM;
1715
1716 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1717 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1718 cmd->isibss = 0;
1719 memcpy(cmd->bssid, mac, ETH_ALEN);
1720
1721 rc = mwl8k_post_cmd(hw, &cmd->header);
1722 kfree(cmd);
1723
1724 return rc;
1725 }
1726
1727 /*
1728 * CMD_SET_RF_CHANNEL.
1729 */
1730 struct mwl8k_cmd_set_rf_channel {
1731 struct mwl8k_cmd_pkt header;
1732 __le16 action;
1733 __u8 current_channel;
1734 __le32 channel_flags;
1735 } __attribute__((packed));
1736
1737 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1738 struct ieee80211_channel *channel)
1739 {
1740 struct mwl8k_cmd_set_rf_channel *cmd;
1741 int rc;
1742
1743 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1744 if (cmd == NULL)
1745 return -ENOMEM;
1746
1747 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1748 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1749 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1750 cmd->current_channel = channel->hw_value;
1751 if (channel->band == IEEE80211_BAND_2GHZ)
1752 cmd->channel_flags = cpu_to_le32(0x00000081);
1753 else
1754 cmd->channel_flags = cpu_to_le32(0x00000000);
1755
1756 rc = mwl8k_post_cmd(hw, &cmd->header);
1757 kfree(cmd);
1758
1759 return rc;
1760 }
1761
1762 /*
1763 * CMD_SET_SLOT.
1764 */
1765 struct mwl8k_cmd_set_slot {
1766 struct mwl8k_cmd_pkt header;
1767 __le16 action;
1768 __u8 short_slot;
1769 } __attribute__((packed));
1770
1771 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1772 {
1773 struct mwl8k_cmd_set_slot *cmd;
1774 int rc;
1775
1776 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1777 if (cmd == NULL)
1778 return -ENOMEM;
1779
1780 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1781 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1782 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1783 cmd->short_slot = short_slot_time;
1784
1785 rc = mwl8k_post_cmd(hw, &cmd->header);
1786 kfree(cmd);
1787
1788 return rc;
1789 }
1790
1791 /*
1792 * CMD_MIMO_CONFIG.
1793 */
1794 struct mwl8k_cmd_mimo_config {
1795 struct mwl8k_cmd_pkt header;
1796 __le32 action;
1797 __u8 rx_antenna_map;
1798 __u8 tx_antenna_map;
1799 } __attribute__((packed));
1800
1801 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1802 {
1803 struct mwl8k_cmd_mimo_config *cmd;
1804 int rc;
1805
1806 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1807 if (cmd == NULL)
1808 return -ENOMEM;
1809
1810 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1811 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1812 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1813 cmd->rx_antenna_map = rx;
1814 cmd->tx_antenna_map = tx;
1815
1816 rc = mwl8k_post_cmd(hw, &cmd->header);
1817 kfree(cmd);
1818
1819 return rc;
1820 }
1821
1822 /*
1823 * CMD_ENABLE_SNIFFER.
1824 */
1825 struct mwl8k_cmd_enable_sniffer {
1826 struct mwl8k_cmd_pkt header;
1827 __le32 action;
1828 } __attribute__((packed));
1829
1830 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1831 {
1832 struct mwl8k_cmd_enable_sniffer *cmd;
1833 int rc;
1834
1835 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1836 if (cmd == NULL)
1837 return -ENOMEM;
1838
1839 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1840 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1841 cmd->action = cpu_to_le32(!!enable);
1842
1843 rc = mwl8k_post_cmd(hw, &cmd->header);
1844 kfree(cmd);
1845
1846 return rc;
1847 }
1848
1849 /*
1850 * CMD_SET_RATEADAPT_MODE.
1851 */
1852 struct mwl8k_cmd_set_rate_adapt_mode {
1853 struct mwl8k_cmd_pkt header;
1854 __le16 action;
1855 __le16 mode;
1856 } __attribute__((packed));
1857
1858 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
1859 {
1860 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
1861 int rc;
1862
1863 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1864 if (cmd == NULL)
1865 return -ENOMEM;
1866
1867 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
1868 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1869 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1870 cmd->mode = cpu_to_le16(mode);
1871
1872 rc = mwl8k_post_cmd(hw, &cmd->header);
1873 kfree(cmd);
1874
1875 return rc;
1876 }
1877
1878 /*
1879 * CMD_SET_WMM_MODE.
1880 */
1881 struct mwl8k_cmd_set_wmm {
1882 struct mwl8k_cmd_pkt header;
1883 __le16 action;
1884 } __attribute__((packed));
1885
1886 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
1887 {
1888 struct mwl8k_priv *priv = hw->priv;
1889 struct mwl8k_cmd_set_wmm *cmd;
1890 int rc;
1891
1892 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1893 if (cmd == NULL)
1894 return -ENOMEM;
1895
1896 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
1897 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1898 cmd->action = cpu_to_le16(!!enable);
1899
1900 rc = mwl8k_post_cmd(hw, &cmd->header);
1901 kfree(cmd);
1902
1903 if (!rc)
1904 priv->wmm_enabled = enable;
1905
1906 return rc;
1907 }
1908
1909 /*
1910 * CMD_SET_RTS_THRESHOLD.
1911 */
1912 struct mwl8k_cmd_rts_threshold {
1913 struct mwl8k_cmd_pkt header;
1914 __le16 action;
1915 __le16 threshold;
1916 } __attribute__((packed));
1917
1918 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
1919 u16 action, u16 *threshold)
1920 {
1921 struct mwl8k_cmd_rts_threshold *cmd;
1922 int rc;
1923
1924 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1925 if (cmd == NULL)
1926 return -ENOMEM;
1927
1928 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
1929 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1930 cmd->action = cpu_to_le16(action);
1931 cmd->threshold = cpu_to_le16(*threshold);
1932
1933 rc = mwl8k_post_cmd(hw, &cmd->header);
1934 kfree(cmd);
1935
1936 return rc;
1937 }
1938
1939 /*
1940 * CMD_SET_EDCA_PARAMS.
1941 */
1942 struct mwl8k_cmd_set_edca_params {
1943 struct mwl8k_cmd_pkt header;
1944
1945 /* See MWL8K_SET_EDCA_XXX below */
1946 __le16 action;
1947
1948 /* TX opportunity in units of 32 us */
1949 __le16 txop;
1950
1951 /* Log exponent of max contention period: 0...15*/
1952 __u8 log_cw_max;
1953
1954 /* Log exponent of min contention period: 0...15 */
1955 __u8 log_cw_min;
1956
1957 /* Adaptive interframe spacing in units of 32us */
1958 __u8 aifs;
1959
1960 /* TX queue to configure */
1961 __u8 txq;
1962 } __attribute__((packed));
1963
1964 #define MWL8K_SET_EDCA_CW 0x01
1965 #define MWL8K_SET_EDCA_TXOP 0x02
1966 #define MWL8K_SET_EDCA_AIFS 0x04
1967
1968 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
1969 MWL8K_SET_EDCA_TXOP | \
1970 MWL8K_SET_EDCA_AIFS)
1971
1972 static int
1973 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
1974 __u16 cw_min, __u16 cw_max,
1975 __u8 aifs, __u16 txop)
1976 {
1977 struct mwl8k_cmd_set_edca_params *cmd;
1978 int rc;
1979
1980 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1981 if (cmd == NULL)
1982 return -ENOMEM;
1983
1984 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
1985 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1986 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
1987 cmd->txop = cpu_to_le16(txop);
1988 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
1989 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
1990 cmd->aifs = aifs;
1991 cmd->txq = qnum;
1992
1993 rc = mwl8k_post_cmd(hw, &cmd->header);
1994 kfree(cmd);
1995
1996 return rc;
1997 }
1998
1999 /*
2000 * CMD_FINALIZE_JOIN.
2001 */
2002
2003 /* FJ beacon buffer size is compiled into the firmware. */
2004 #define MWL8K_FJ_BEACON_MAXLEN 128
2005
2006 struct mwl8k_cmd_finalize_join {
2007 struct mwl8k_cmd_pkt header;
2008 __le32 sleep_interval; /* Number of beacon periods to sleep */
2009 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2010 } __attribute__((packed));
2011
2012 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2013 __u16 framelen, __u16 dtim)
2014 {
2015 struct mwl8k_cmd_finalize_join *cmd;
2016 struct ieee80211_mgmt *payload = frame;
2017 u16 hdrlen;
2018 u32 payload_len;
2019 int rc;
2020
2021 if (frame == NULL)
2022 return -EINVAL;
2023
2024 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2025 if (cmd == NULL)
2026 return -ENOMEM;
2027
2028 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2029 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2030 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2031
2032 hdrlen = ieee80211_hdrlen(payload->frame_control);
2033
2034 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2035
2036 /* XXX TBD Might just have to abort and return an error */
2037 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2038 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2039 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2040 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2041
2042 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2043 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2044
2045 if (payload && payload_len)
2046 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2047
2048 rc = mwl8k_post_cmd(hw, &cmd->header);
2049 kfree(cmd);
2050 return rc;
2051 }
2052
2053 /*
2054 * CMD_UPDATE_STADB.
2055 */
2056 struct mwl8k_cmd_update_sta_db {
2057 struct mwl8k_cmd_pkt header;
2058
2059 /* See STADB_ACTION_TYPE */
2060 __le32 action;
2061
2062 /* Peer MAC address */
2063 __u8 peer_addr[ETH_ALEN];
2064
2065 __le32 reserved;
2066
2067 /* Peer info - valid during add/update. */
2068 struct peer_capability_info peer_info;
2069 } __attribute__((packed));
2070
2071 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2072 struct ieee80211_vif *vif, __u32 action)
2073 {
2074 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2075 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2076 struct mwl8k_cmd_update_sta_db *cmd;
2077 struct peer_capability_info *peer_info;
2078 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2079 int rc;
2080 __u8 count, *rates;
2081
2082 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2083 if (cmd == NULL)
2084 return -ENOMEM;
2085
2086 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2087 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2088
2089 cmd->action = cpu_to_le32(action);
2090 peer_info = &cmd->peer_info;
2091 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2092
2093 switch (action) {
2094 case MWL8K_STA_DB_ADD_ENTRY:
2095 case MWL8K_STA_DB_MODIFY_ENTRY:
2096 /* Build peer_info block */
2097 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2098 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2099 peer_info->interop = 1;
2100 peer_info->amsdu_enabled = 0;
2101
2102 rates = peer_info->legacy_rates;
2103 for (count = 0; count < mv_vif->legacy_nrates; count++)
2104 rates[count] = bitrates[count].hw_value;
2105
2106 rc = mwl8k_post_cmd(hw, &cmd->header);
2107 if (rc == 0)
2108 mv_vif->peer_id = peer_info->station_id;
2109
2110 break;
2111
2112 case MWL8K_STA_DB_DEL_ENTRY:
2113 case MWL8K_STA_DB_FLUSH:
2114 default:
2115 rc = mwl8k_post_cmd(hw, &cmd->header);
2116 if (rc == 0)
2117 mv_vif->peer_id = 0;
2118 break;
2119 }
2120 kfree(cmd);
2121
2122 return rc;
2123 }
2124
2125 /*
2126 * CMD_SET_AID.
2127 */
2128 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2129
2130 #define MWL8K_FRAME_PROT_DISABLED 0x00
2131 #define MWL8K_FRAME_PROT_11G 0x07
2132 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2133 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2134
2135 struct mwl8k_cmd_update_set_aid {
2136 struct mwl8k_cmd_pkt header;
2137 __le16 aid;
2138
2139 /* AP's MAC address (BSSID) */
2140 __u8 bssid[ETH_ALEN];
2141 __le16 protection_mode;
2142 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2143 } __attribute__((packed));
2144
2145 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2146 struct ieee80211_vif *vif)
2147 {
2148 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2149 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2150 struct mwl8k_cmd_update_set_aid *cmd;
2151 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2152 int count;
2153 u16 prot_mode;
2154 int rc;
2155
2156 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2157 if (cmd == NULL)
2158 return -ENOMEM;
2159
2160 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2161 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2162 cmd->aid = cpu_to_le16(info->aid);
2163
2164 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2165
2166 if (info->use_cts_prot) {
2167 prot_mode = MWL8K_FRAME_PROT_11G;
2168 } else {
2169 switch (info->ht_operation_mode &
2170 IEEE80211_HT_OP_MODE_PROTECTION) {
2171 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2172 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2173 break;
2174 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2175 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2176 break;
2177 default:
2178 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2179 break;
2180 }
2181 }
2182 cmd->protection_mode = cpu_to_le16(prot_mode);
2183
2184 for (count = 0; count < mv_vif->legacy_nrates; count++)
2185 cmd->supp_rates[count] = bitrates[count].hw_value;
2186
2187 rc = mwl8k_post_cmd(hw, &cmd->header);
2188 kfree(cmd);
2189
2190 return rc;
2191 }
2192
2193 /*
2194 * CMD_SET_RATE.
2195 */
2196 struct mwl8k_cmd_update_rateset {
2197 struct mwl8k_cmd_pkt header;
2198 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2199
2200 /* Bitmap for supported MCS codes. */
2201 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2202 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2203 } __attribute__((packed));
2204
2205 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2206 struct ieee80211_vif *vif)
2207 {
2208 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2209 struct mwl8k_cmd_update_rateset *cmd;
2210 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2211 int count;
2212 int rc;
2213
2214 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2215 if (cmd == NULL)
2216 return -ENOMEM;
2217
2218 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2219 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2220
2221 for (count = 0; count < mv_vif->legacy_nrates; count++)
2222 cmd->legacy_rates[count] = bitrates[count].hw_value;
2223
2224 rc = mwl8k_post_cmd(hw, &cmd->header);
2225 kfree(cmd);
2226
2227 return rc;
2228 }
2229
2230 /*
2231 * CMD_USE_FIXED_RATE.
2232 */
2233 #define MWL8K_RATE_TABLE_SIZE 8
2234 #define MWL8K_UCAST_RATE 0
2235 #define MWL8K_USE_AUTO_RATE 0x0002
2236
2237 struct mwl8k_rate_entry {
2238 /* Set to 1 if HT rate, 0 if legacy. */
2239 __le32 is_ht_rate;
2240
2241 /* Set to 1 to use retry_count field. */
2242 __le32 enable_retry;
2243
2244 /* Specified legacy rate or MCS. */
2245 __le32 rate;
2246
2247 /* Number of allowed retries. */
2248 __le32 retry_count;
2249 } __attribute__((packed));
2250
2251 struct mwl8k_rate_table {
2252 /* 1 to allow specified rate and below */
2253 __le32 allow_rate_drop;
2254 __le32 num_rates;
2255 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2256 } __attribute__((packed));
2257
2258 struct mwl8k_cmd_use_fixed_rate {
2259 struct mwl8k_cmd_pkt header;
2260 __le32 action;
2261 struct mwl8k_rate_table rate_table;
2262
2263 /* Unicast, Broadcast or Multicast */
2264 __le32 rate_type;
2265 __le32 reserved1;
2266 __le32 reserved2;
2267 } __attribute__((packed));
2268
2269 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2270 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2271 {
2272 struct mwl8k_cmd_use_fixed_rate *cmd;
2273 int count;
2274 int rc;
2275
2276 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2277 if (cmd == NULL)
2278 return -ENOMEM;
2279
2280 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2281 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2282
2283 cmd->action = cpu_to_le32(action);
2284 cmd->rate_type = cpu_to_le32(rate_type);
2285
2286 if (rate_table != NULL) {
2287 /* Copy over each field manually so
2288 * that bitflipping can be done
2289 */
2290 cmd->rate_table.allow_rate_drop =
2291 cpu_to_le32(rate_table->allow_rate_drop);
2292 cmd->rate_table.num_rates =
2293 cpu_to_le32(rate_table->num_rates);
2294
2295 for (count = 0; count < rate_table->num_rates; count++) {
2296 struct mwl8k_rate_entry *dst =
2297 &cmd->rate_table.rate_entry[count];
2298 struct mwl8k_rate_entry *src =
2299 &rate_table->rate_entry[count];
2300
2301 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2302 dst->enable_retry = cpu_to_le32(src->enable_retry);
2303 dst->rate = cpu_to_le32(src->rate);
2304 dst->retry_count = cpu_to_le32(src->retry_count);
2305 }
2306 }
2307
2308 rc = mwl8k_post_cmd(hw, &cmd->header);
2309 kfree(cmd);
2310
2311 return rc;
2312 }
2313
2314
2315 /*
2316 * Interrupt handling.
2317 */
2318 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2319 {
2320 struct ieee80211_hw *hw = dev_id;
2321 struct mwl8k_priv *priv = hw->priv;
2322 u32 status;
2323
2324 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2325 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2326
2327 if (!status)
2328 return IRQ_NONE;
2329
2330 if (status & MWL8K_A2H_INT_TX_DONE)
2331 tasklet_schedule(&priv->tx_reclaim_task);
2332
2333 if (status & MWL8K_A2H_INT_RX_READY) {
2334 while (rxq_process(hw, 0, 1))
2335 rxq_refill(hw, 0, 1);
2336 }
2337
2338 if (status & MWL8K_A2H_INT_OPC_DONE) {
2339 if (priv->hostcmd_wait != NULL) {
2340 complete(priv->hostcmd_wait);
2341 priv->hostcmd_wait = NULL;
2342 }
2343 }
2344
2345 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2346 if (!priv->inconfig &&
2347 priv->radio_on &&
2348 mwl8k_txq_busy(priv))
2349 mwl8k_tx_start(priv);
2350 }
2351
2352 return IRQ_HANDLED;
2353 }
2354
2355
2356 /*
2357 * Core driver operations.
2358 */
2359 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2360 {
2361 struct mwl8k_priv *priv = hw->priv;
2362 int index = skb_get_queue_mapping(skb);
2363 int rc;
2364
2365 if (priv->current_channel == NULL) {
2366 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2367 "disabled\n", priv->name);
2368 dev_kfree_skb(skb);
2369 return NETDEV_TX_OK;
2370 }
2371
2372 rc = mwl8k_txq_xmit(hw, index, skb);
2373
2374 return rc;
2375 }
2376
2377 struct mwl8k_work_struct {
2378 /* Initialized by mwl8k_queue_work(). */
2379 struct work_struct wt;
2380
2381 /* Required field passed in to mwl8k_queue_work(). */
2382 struct ieee80211_hw *hw;
2383
2384 /* Required field passed in to mwl8k_queue_work(). */
2385 int (*wfunc)(struct work_struct *w);
2386
2387 /* Initialized by mwl8k_queue_work(). */
2388 struct completion *cmd_wait;
2389
2390 /* Result code. */
2391 int rc;
2392
2393 /*
2394 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2395 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2396 */
2397 u32 options;
2398
2399 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2400 unsigned long timeout_ms;
2401
2402 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2403 u32 txwait_attempts;
2404
2405 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2406 u32 tx_timeout_ms;
2407 u32 step;
2408 };
2409
2410 /* Flags controlling behavior of config queue requests */
2411
2412 /* Caller spins while waiting for completion. */
2413 #define MWL8K_WQ_SPIN 0x00000001
2414
2415 /* Wait for TX queues to empty before proceeding with configuration. */
2416 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2417
2418 /* Queue request and return immediately. */
2419 #define MWL8K_WQ_POST_REQUEST 0x00000004
2420
2421 /*
2422 * Caller sleeps and waits for task complete notification.
2423 * Do not use in atomic context.
2424 */
2425 #define MWL8K_WQ_SLEEP 0x00000008
2426
2427 /* Free work struct when task is done. */
2428 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2429
2430 /*
2431 * Config request is queued and returns to caller imediately. Use
2432 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2433 * when this flag is set.
2434 */
2435 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2436 MWL8K_WQ_FREE_WORKSTRUCT)
2437
2438 /* Default work queue behavior is to sleep and wait for tx completion. */
2439 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2440
2441 /*
2442 * Default config request timeout. Add adjustments to make sure the
2443 * config thread waits long enough for both tx wait and cmd wait before
2444 * timing out.
2445 */
2446
2447 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2448 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2449
2450 /* Default number of TX wait attempts. */
2451 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2452
2453 /* Total time to wait for TXQ to drain. */
2454 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2455 MWL8K_WQ_TXWAIT_ATTEMPTS)
2456
2457 /* Scheduling slop. */
2458 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2459
2460 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2461 MWL8K_TXWAIT_MS + \
2462 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2463
2464 static void mwl8k_config_thread(struct work_struct *wt)
2465 {
2466 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2467 struct ieee80211_hw *hw = worker->hw;
2468 struct mwl8k_priv *priv = hw->priv;
2469 int rc = 0;
2470
2471 spin_lock_irq(&priv->tx_lock);
2472 priv->inconfig = true;
2473 spin_unlock_irq(&priv->tx_lock);
2474
2475 ieee80211_stop_queues(hw);
2476
2477 /*
2478 * Wait for host queues to drain before doing PHY
2479 * reconfiguration. This avoids interrupting any in-flight
2480 * DMA transfers to the hardware.
2481 */
2482 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2483 u32 timeout;
2484 u32 time_remaining;
2485 u32 iter;
2486 u32 tx_wait_attempts = worker->txwait_attempts;
2487
2488 time_remaining = worker->tx_timeout_ms;
2489 if (!tx_wait_attempts)
2490 tx_wait_attempts = 1;
2491
2492 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2493 if (!timeout)
2494 timeout = 1;
2495
2496 iter = tx_wait_attempts;
2497 do {
2498 int wait_time;
2499
2500 if (time_remaining > timeout) {
2501 time_remaining -= timeout;
2502 wait_time = timeout;
2503 } else
2504 wait_time = time_remaining;
2505
2506 if (!wait_time)
2507 wait_time = 1;
2508
2509 rc = mwl8k_tx_wait_empty(hw, wait_time);
2510 if (rc)
2511 printk(KERN_ERR "%s() txwait timeout=%ums "
2512 "Retry:%u/%u\n", __func__, timeout,
2513 tx_wait_attempts - iter + 1,
2514 tx_wait_attempts);
2515
2516 } while (rc && --iter);
2517
2518 rc = iter ? 0 : -ETIMEDOUT;
2519 }
2520 if (!rc)
2521 rc = worker->wfunc(wt);
2522
2523 spin_lock_irq(&priv->tx_lock);
2524 priv->inconfig = false;
2525 if (priv->pending_tx_pkts && priv->radio_on)
2526 mwl8k_tx_start(priv);
2527 spin_unlock_irq(&priv->tx_lock);
2528 ieee80211_wake_queues(hw);
2529
2530 worker->rc = rc;
2531 if (worker->options & MWL8K_WQ_SLEEP)
2532 complete(worker->cmd_wait);
2533
2534 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2535 kfree(wt);
2536 }
2537
2538 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2539 struct mwl8k_work_struct *worker,
2540 struct workqueue_struct *wqueue,
2541 int (*wfunc)(struct work_struct *w))
2542 {
2543 unsigned long timeout = 0;
2544 int rc = 0;
2545
2546 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2547
2548 if (!worker->timeout_ms)
2549 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2550
2551 if (!worker->options)
2552 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2553
2554 if (!worker->txwait_attempts)
2555 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2556
2557 if (!worker->tx_timeout_ms)
2558 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2559
2560 worker->hw = hw;
2561 worker->cmd_wait = &cmd_wait;
2562 worker->rc = 1;
2563 worker->wfunc = wfunc;
2564
2565 INIT_WORK(&worker->wt, mwl8k_config_thread);
2566 queue_work(wqueue, &worker->wt);
2567
2568 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2569 rc = 0;
2570 } else {
2571 if (worker->options & MWL8K_WQ_SPIN) {
2572 timeout = worker->timeout_ms;
2573 while (timeout && (worker->rc > 0)) {
2574 mdelay(1);
2575 timeout--;
2576 }
2577 } else if (worker->options & MWL8K_WQ_SLEEP)
2578 timeout = wait_for_completion_timeout(&cmd_wait,
2579 msecs_to_jiffies(worker->timeout_ms));
2580
2581 if (timeout)
2582 rc = worker->rc;
2583 else {
2584 cancel_work_sync(&worker->wt);
2585 rc = -ETIMEDOUT;
2586 }
2587 }
2588
2589 return rc;
2590 }
2591
2592 struct mwl8k_start_worker {
2593 struct mwl8k_work_struct header;
2594 };
2595
2596 static int mwl8k_start_wt(struct work_struct *wt)
2597 {
2598 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2599 struct ieee80211_hw *hw = worker->header.hw;
2600 struct mwl8k_priv *priv = hw->priv;
2601 int rc = 0;
2602
2603 if (priv->vif != NULL) {
2604 rc = -EIO;
2605 goto mwl8k_start_exit;
2606 }
2607
2608 /* Turn on radio */
2609 if (mwl8k_cmd_802_11_radio_enable(hw)) {
2610 rc = -EIO;
2611 goto mwl8k_start_exit;
2612 }
2613
2614 /* Purge TX/RX HW queues */
2615 if (mwl8k_cmd_set_pre_scan(hw)) {
2616 rc = -EIO;
2617 goto mwl8k_start_exit;
2618 }
2619
2620 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2621 rc = -EIO;
2622 goto mwl8k_start_exit;
2623 }
2624
2625 /* Enable firmware rate adaptation */
2626 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2627 rc = -EIO;
2628 goto mwl8k_start_exit;
2629 }
2630
2631 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2632 if (mwl8k_set_wmm(hw, 0)) {
2633 rc = -EIO;
2634 goto mwl8k_start_exit;
2635 }
2636
2637 /* Disable sniffer mode */
2638 if (mwl8k_enable_sniffer(hw, 0))
2639 rc = -EIO;
2640
2641 mwl8k_start_exit:
2642 return rc;
2643 }
2644
2645 static int mwl8k_start(struct ieee80211_hw *hw)
2646 {
2647 struct mwl8k_start_worker *worker;
2648 struct mwl8k_priv *priv = hw->priv;
2649 int rc;
2650
2651 /* Enable tx reclaim tasklet */
2652 tasklet_enable(&priv->tx_reclaim_task);
2653
2654 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2655 IRQF_SHARED, MWL8K_NAME, hw);
2656 if (rc) {
2657 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2658 priv->name);
2659 rc = -EIO;
2660 goto mwl8k_start_disable_tasklet;
2661 }
2662
2663 /* Enable interrupts */
2664 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2665
2666 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2667 if (worker == NULL) {
2668 rc = -ENOMEM;
2669 goto mwl8k_start_disable_irq;
2670 }
2671
2672 rc = mwl8k_queue_work(hw, &worker->header,
2673 priv->config_wq, mwl8k_start_wt);
2674 kfree(worker);
2675 if (!rc)
2676 return rc;
2677
2678 if (rc == -ETIMEDOUT)
2679 printk(KERN_ERR "%s() timed out\n", __func__);
2680
2681 rc = -EIO;
2682
2683 mwl8k_start_disable_irq:
2684 spin_lock_irq(&priv->tx_lock);
2685 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2686 spin_unlock_irq(&priv->tx_lock);
2687 free_irq(priv->pdev->irq, hw);
2688
2689 mwl8k_start_disable_tasklet:
2690 tasklet_disable(&priv->tx_reclaim_task);
2691
2692 return rc;
2693 }
2694
2695 struct mwl8k_stop_worker {
2696 struct mwl8k_work_struct header;
2697 };
2698
2699 static int mwl8k_stop_wt(struct work_struct *wt)
2700 {
2701 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2702 struct ieee80211_hw *hw = worker->header.hw;
2703
2704 return mwl8k_cmd_802_11_radio_disable(hw);
2705 }
2706
2707 static void mwl8k_stop(struct ieee80211_hw *hw)
2708 {
2709 int rc;
2710 struct mwl8k_stop_worker *worker;
2711 struct mwl8k_priv *priv = hw->priv;
2712 int i;
2713
2714 if (priv->vif != NULL)
2715 return;
2716
2717 ieee80211_stop_queues(hw);
2718
2719 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2720 if (worker == NULL)
2721 return;
2722
2723 rc = mwl8k_queue_work(hw, &worker->header,
2724 priv->config_wq, mwl8k_stop_wt);
2725 kfree(worker);
2726 if (rc == -ETIMEDOUT)
2727 printk(KERN_ERR "%s() timed out\n", __func__);
2728
2729 /* Disable interrupts */
2730 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2731 free_irq(priv->pdev->irq, hw);
2732
2733 /* Stop finalize join worker */
2734 cancel_work_sync(&priv->finalize_join_worker);
2735 if (priv->beacon_skb != NULL)
2736 dev_kfree_skb(priv->beacon_skb);
2737
2738 /* Stop tx reclaim tasklet */
2739 tasklet_disable(&priv->tx_reclaim_task);
2740
2741 /* Stop config thread */
2742 flush_workqueue(priv->config_wq);
2743
2744 /* Return all skbs to mac80211 */
2745 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2746 mwl8k_txq_reclaim(hw, i, 1);
2747 }
2748
2749 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2750 struct ieee80211_if_init_conf *conf)
2751 {
2752 struct mwl8k_priv *priv = hw->priv;
2753 struct mwl8k_vif *mwl8k_vif;
2754
2755 /*
2756 * We only support one active interface at a time.
2757 */
2758 if (priv->vif != NULL)
2759 return -EBUSY;
2760
2761 /*
2762 * We only support managed interfaces for now.
2763 */
2764 if (conf->type != NL80211_IFTYPE_STATION)
2765 return -EINVAL;
2766
2767 /* Clean out driver private area */
2768 mwl8k_vif = MWL8K_VIF(conf->vif);
2769 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2770
2771 /* Save the mac address */
2772 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2773
2774 /* Back pointer to parent config block */
2775 mwl8k_vif->priv = priv;
2776
2777 /* Setup initial PHY parameters */
2778 memcpy(mwl8k_vif->legacy_rates,
2779 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2780 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2781
2782 /* Set Initial sequence number to zero */
2783 mwl8k_vif->seqno = 0;
2784
2785 priv->vif = conf->vif;
2786 priv->current_channel = NULL;
2787
2788 return 0;
2789 }
2790
2791 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2792 struct ieee80211_if_init_conf *conf)
2793 {
2794 struct mwl8k_priv *priv = hw->priv;
2795
2796 if (priv->vif == NULL)
2797 return;
2798
2799 priv->vif = NULL;
2800 }
2801
2802 struct mwl8k_config_worker {
2803 struct mwl8k_work_struct header;
2804 u32 changed;
2805 };
2806
2807 static int mwl8k_config_wt(struct work_struct *wt)
2808 {
2809 struct mwl8k_config_worker *worker =
2810 (struct mwl8k_config_worker *)wt;
2811 struct ieee80211_hw *hw = worker->header.hw;
2812 struct ieee80211_conf *conf = &hw->conf;
2813 struct mwl8k_priv *priv = hw->priv;
2814 int rc = 0;
2815
2816 if (conf->flags & IEEE80211_CONF_IDLE) {
2817 mwl8k_cmd_802_11_radio_disable(hw);
2818 priv->current_channel = NULL;
2819 goto mwl8k_config_exit;
2820 }
2821
2822 if (mwl8k_cmd_802_11_radio_enable(hw)) {
2823 rc = -EINVAL;
2824 goto mwl8k_config_exit;
2825 }
2826
2827 priv->current_channel = conf->channel;
2828
2829 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
2830 rc = -EINVAL;
2831 goto mwl8k_config_exit;
2832 }
2833
2834 if (conf->power_level > 18)
2835 conf->power_level = 18;
2836 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
2837 rc = -EINVAL;
2838 goto mwl8k_config_exit;
2839 }
2840
2841 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2842 rc = -EINVAL;
2843
2844 mwl8k_config_exit:
2845 return rc;
2846 }
2847
2848 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2849 {
2850 int rc = 0;
2851 struct mwl8k_config_worker *worker;
2852 struct mwl8k_priv *priv = hw->priv;
2853
2854 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2855 if (worker == NULL)
2856 return -ENOMEM;
2857
2858 worker->changed = changed;
2859 rc = mwl8k_queue_work(hw, &worker->header,
2860 priv->config_wq, mwl8k_config_wt);
2861 if (rc == -ETIMEDOUT) {
2862 printk(KERN_ERR "%s() timed out.\n", __func__);
2863 rc = -EINVAL;
2864 }
2865
2866 kfree(worker);
2867
2868 /*
2869 * mac80211 will crash on anything other than -EINVAL on
2870 * error. Looks like wireless extensions which calls mac80211
2871 * may be the actual culprit...
2872 */
2873 return rc ? -EINVAL : 0;
2874 }
2875
2876 struct mwl8k_bss_info_changed_worker {
2877 struct mwl8k_work_struct header;
2878 struct ieee80211_vif *vif;
2879 struct ieee80211_bss_conf *info;
2880 u32 changed;
2881 };
2882
2883 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
2884 {
2885 struct mwl8k_bss_info_changed_worker *worker =
2886 (struct mwl8k_bss_info_changed_worker *)wt;
2887 struct ieee80211_hw *hw = worker->header.hw;
2888 struct ieee80211_vif *vif = worker->vif;
2889 struct ieee80211_bss_conf *info = worker->info;
2890 u32 changed;
2891 int rc;
2892
2893 struct mwl8k_priv *priv = hw->priv;
2894 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2895
2896 changed = worker->changed;
2897 priv->capture_beacon = false;
2898
2899 if (info->assoc) {
2900 memcpy(&mwl8k_vif->bss_info, info,
2901 sizeof(struct ieee80211_bss_conf));
2902
2903 /* Install rates */
2904 if (mwl8k_update_rateset(hw, vif))
2905 goto mwl8k_bss_info_changed_exit;
2906
2907 /* Turn on rate adaptation */
2908 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2909 MWL8K_UCAST_RATE, NULL))
2910 goto mwl8k_bss_info_changed_exit;
2911
2912 /* Set radio preamble */
2913 if (mwl8k_set_radio_preamble(hw, info->use_short_preamble))
2914 goto mwl8k_bss_info_changed_exit;
2915
2916 /* Set slot time */
2917 if (mwl8k_cmd_set_slot(hw, info->use_short_slot))
2918 goto mwl8k_bss_info_changed_exit;
2919
2920 /* Update peer rate info */
2921 if (mwl8k_cmd_update_sta_db(hw, vif,
2922 MWL8K_STA_DB_MODIFY_ENTRY))
2923 goto mwl8k_bss_info_changed_exit;
2924
2925 /* Set AID */
2926 if (mwl8k_cmd_set_aid(hw, vif))
2927 goto mwl8k_bss_info_changed_exit;
2928
2929 /*
2930 * Finalize the join. Tell rx handler to process
2931 * next beacon from our BSSID.
2932 */
2933 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
2934 priv->capture_beacon = true;
2935 } else {
2936 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2937 memset(&mwl8k_vif->bss_info, 0,
2938 sizeof(struct ieee80211_bss_conf));
2939 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2940 }
2941
2942 mwl8k_bss_info_changed_exit:
2943 rc = 0;
2944 return rc;
2945 }
2946
2947 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2948 struct ieee80211_vif *vif,
2949 struct ieee80211_bss_conf *info,
2950 u32 changed)
2951 {
2952 struct mwl8k_bss_info_changed_worker *worker;
2953 struct mwl8k_priv *priv = hw->priv;
2954 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2955 int rc;
2956
2957 if (changed & BSS_CHANGED_BSSID)
2958 memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
2959
2960 if ((changed & BSS_CHANGED_ASSOC) == 0)
2961 return;
2962
2963 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2964 if (worker == NULL)
2965 return;
2966
2967 worker->vif = vif;
2968 worker->info = info;
2969 worker->changed = changed;
2970 rc = mwl8k_queue_work(hw, &worker->header,
2971 priv->config_wq,
2972 mwl8k_bss_info_changed_wt);
2973 kfree(worker);
2974 if (rc == -ETIMEDOUT)
2975 printk(KERN_ERR "%s() timed out\n", __func__);
2976 }
2977
2978 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
2979 int mc_count, struct dev_addr_list *mclist)
2980 {
2981 struct mwl8k_cmd_pkt *cmd;
2982
2983 cmd = __mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
2984
2985 return (unsigned long)cmd;
2986 }
2987
2988 struct mwl8k_configure_filter_worker {
2989 struct mwl8k_work_struct header;
2990 unsigned int changed_flags;
2991 unsigned int total_flags;
2992 struct mwl8k_cmd_pkt *multicast_adr_cmd;
2993 };
2994
2995 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
2996
2997 static int mwl8k_configure_filter_wt(struct work_struct *wt)
2998 {
2999 struct mwl8k_configure_filter_worker *worker =
3000 (struct mwl8k_configure_filter_worker *)wt;
3001 struct ieee80211_hw *hw = worker->header.hw;
3002 struct mwl8k_priv *priv = hw->priv;
3003 int rc = 0;
3004
3005 if (worker->changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3006 if (worker->total_flags & FIF_BCN_PRBRESP_PROMISC)
3007 rc = mwl8k_cmd_set_pre_scan(hw);
3008 else {
3009 u8 *bssid;
3010
3011 bssid = "\x00\x00\x00\x00\x00\x00";
3012 if (priv->vif != NULL)
3013 bssid = MWL8K_VIF(priv->vif)->bssid;
3014
3015 rc = mwl8k_cmd_set_post_scan(hw, bssid);
3016 }
3017 }
3018
3019 if (!rc && worker->multicast_adr_cmd != NULL)
3020 rc = mwl8k_post_cmd(hw, worker->multicast_adr_cmd);
3021 kfree(worker->multicast_adr_cmd);
3022
3023 return rc;
3024 }
3025
3026 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3027 unsigned int changed_flags,
3028 unsigned int *total_flags,
3029 u64 multicast)
3030 {
3031 struct mwl8k_priv *priv = hw->priv;
3032 struct mwl8k_configure_filter_worker *worker;
3033
3034 /* Clear unsupported feature flags */
3035 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3036
3037 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
3038 return;
3039
3040 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3041 if (worker == NULL)
3042 return;
3043
3044 worker->changed_flags = changed_flags;
3045 worker->total_flags = *total_flags;
3046 worker->multicast_adr_cmd = (void *)(unsigned long)multicast;
3047
3048 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3049 mwl8k_configure_filter_wt);
3050 }
3051
3052 struct mwl8k_set_rts_threshold_worker {
3053 struct mwl8k_work_struct header;
3054 u32 value;
3055 };
3056
3057 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3058 {
3059 struct mwl8k_set_rts_threshold_worker *worker =
3060 (struct mwl8k_set_rts_threshold_worker *)wt;
3061
3062 struct ieee80211_hw *hw = worker->header.hw;
3063 u16 threshold = (u16)(worker->value);
3064 int rc;
3065
3066 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3067
3068 return rc;
3069 }
3070
3071 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3072 {
3073 int rc;
3074 struct mwl8k_set_rts_threshold_worker *worker;
3075 struct mwl8k_priv *priv = hw->priv;
3076
3077 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3078 if (worker == NULL)
3079 return -ENOMEM;
3080
3081 worker->value = value;
3082
3083 rc = mwl8k_queue_work(hw, &worker->header,
3084 priv->config_wq,
3085 mwl8k_set_rts_threshold_wt);
3086 kfree(worker);
3087
3088 if (rc == -ETIMEDOUT) {
3089 printk(KERN_ERR "%s() timed out\n", __func__);
3090 rc = -EINVAL;
3091 }
3092
3093 return rc;
3094 }
3095
3096 struct mwl8k_conf_tx_worker {
3097 struct mwl8k_work_struct header;
3098 u16 queue;
3099 const struct ieee80211_tx_queue_params *params;
3100 };
3101
3102 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3103 {
3104 struct mwl8k_conf_tx_worker *worker =
3105 (struct mwl8k_conf_tx_worker *)wt;
3106
3107 struct ieee80211_hw *hw = worker->header.hw;
3108 u16 queue = worker->queue;
3109 const struct ieee80211_tx_queue_params *params = worker->params;
3110
3111 struct mwl8k_priv *priv = hw->priv;
3112 int rc = 0;
3113
3114 if (!priv->wmm_enabled) {
3115 if (mwl8k_set_wmm(hw, 1)) {
3116 rc = -EINVAL;
3117 goto mwl8k_conf_tx_exit;
3118 }
3119 }
3120
3121 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3122 params->cw_max, params->aifs, params->txop))
3123 rc = -EINVAL;
3124 mwl8k_conf_tx_exit:
3125 return rc;
3126 }
3127
3128 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3129 const struct ieee80211_tx_queue_params *params)
3130 {
3131 int rc;
3132 struct mwl8k_conf_tx_worker *worker;
3133 struct mwl8k_priv *priv = hw->priv;
3134
3135 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3136 if (worker == NULL)
3137 return -ENOMEM;
3138
3139 worker->queue = queue;
3140 worker->params = params;
3141 rc = mwl8k_queue_work(hw, &worker->header,
3142 priv->config_wq, mwl8k_conf_tx_wt);
3143 kfree(worker);
3144 if (rc == -ETIMEDOUT) {
3145 printk(KERN_ERR "%s() timed out\n", __func__);
3146 rc = -EINVAL;
3147 }
3148 return rc;
3149 }
3150
3151 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3152 struct ieee80211_tx_queue_stats *stats)
3153 {
3154 struct mwl8k_priv *priv = hw->priv;
3155 struct mwl8k_tx_queue *txq;
3156 int index;
3157
3158 spin_lock_bh(&priv->tx_lock);
3159 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3160 txq = priv->txq + index;
3161 memcpy(&stats[index], &txq->tx_stats,
3162 sizeof(struct ieee80211_tx_queue_stats));
3163 }
3164 spin_unlock_bh(&priv->tx_lock);
3165 return 0;
3166 }
3167
3168 struct mwl8k_get_stats_worker {
3169 struct mwl8k_work_struct header;
3170 struct ieee80211_low_level_stats *stats;
3171 };
3172
3173 static int mwl8k_get_stats_wt(struct work_struct *wt)
3174 {
3175 struct mwl8k_get_stats_worker *worker =
3176 (struct mwl8k_get_stats_worker *)wt;
3177
3178 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3179 }
3180
3181 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3182 struct ieee80211_low_level_stats *stats)
3183 {
3184 int rc;
3185 struct mwl8k_get_stats_worker *worker;
3186 struct mwl8k_priv *priv = hw->priv;
3187
3188 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3189 if (worker == NULL)
3190 return -ENOMEM;
3191
3192 worker->stats = stats;
3193 rc = mwl8k_queue_work(hw, &worker->header,
3194 priv->config_wq, mwl8k_get_stats_wt);
3195
3196 kfree(worker);
3197 if (rc == -ETIMEDOUT) {
3198 printk(KERN_ERR "%s() timed out\n", __func__);
3199 rc = -EINVAL;
3200 }
3201
3202 return rc;
3203 }
3204
3205 static const struct ieee80211_ops mwl8k_ops = {
3206 .tx = mwl8k_tx,
3207 .start = mwl8k_start,
3208 .stop = mwl8k_stop,
3209 .add_interface = mwl8k_add_interface,
3210 .remove_interface = mwl8k_remove_interface,
3211 .config = mwl8k_config,
3212 .bss_info_changed = mwl8k_bss_info_changed,
3213 .prepare_multicast = mwl8k_prepare_multicast,
3214 .configure_filter = mwl8k_configure_filter,
3215 .set_rts_threshold = mwl8k_set_rts_threshold,
3216 .conf_tx = mwl8k_conf_tx,
3217 .get_tx_stats = mwl8k_get_tx_stats,
3218 .get_stats = mwl8k_get_stats,
3219 };
3220
3221 static void mwl8k_tx_reclaim_handler(unsigned long data)
3222 {
3223 int i;
3224 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3225 struct mwl8k_priv *priv = hw->priv;
3226
3227 spin_lock_bh(&priv->tx_lock);
3228 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3229 mwl8k_txq_reclaim(hw, i, 0);
3230
3231 if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
3232 complete(priv->tx_wait);
3233 priv->tx_wait = NULL;
3234 }
3235 spin_unlock_bh(&priv->tx_lock);
3236 }
3237
3238 static void mwl8k_finalize_join_worker(struct work_struct *work)
3239 {
3240 struct mwl8k_priv *priv =
3241 container_of(work, struct mwl8k_priv, finalize_join_worker);
3242 struct sk_buff *skb = priv->beacon_skb;
3243 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3244
3245 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3246 dev_kfree_skb(skb);
3247
3248 priv->beacon_skb = NULL;
3249 }
3250
3251 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3252 const struct pci_device_id *id)
3253 {
3254 struct ieee80211_hw *hw;
3255 struct mwl8k_priv *priv;
3256 int rc;
3257 int i;
3258 u8 *fw;
3259
3260 rc = pci_enable_device(pdev);
3261 if (rc) {
3262 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3263 MWL8K_NAME);
3264 return rc;
3265 }
3266
3267 rc = pci_request_regions(pdev, MWL8K_NAME);
3268 if (rc) {
3269 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3270 MWL8K_NAME);
3271 return rc;
3272 }
3273
3274 pci_set_master(pdev);
3275
3276 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3277 if (hw == NULL) {
3278 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3279 rc = -ENOMEM;
3280 goto err_free_reg;
3281 }
3282
3283 priv = hw->priv;
3284 priv->hw = hw;
3285 priv->pdev = pdev;
3286 priv->hostcmd_wait = NULL;
3287 priv->tx_wait = NULL;
3288 priv->inconfig = false;
3289 priv->wmm_enabled = false;
3290 priv->pending_tx_pkts = 0;
3291 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3292
3293 spin_lock_init(&priv->fw_lock);
3294
3295 SET_IEEE80211_DEV(hw, &pdev->dev);
3296 pci_set_drvdata(pdev, hw);
3297
3298 priv->regs = pci_iomap(pdev, 1, 0x10000);
3299 if (priv->regs == NULL) {
3300 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3301 goto err_iounmap;
3302 }
3303
3304 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3305 priv->band.band = IEEE80211_BAND_2GHZ;
3306 priv->band.channels = priv->channels;
3307 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3308 priv->band.bitrates = priv->rates;
3309 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3310 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3311
3312 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3313 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3314
3315 /*
3316 * Extra headroom is the size of the required DMA header
3317 * minus the size of the smallest 802.11 frame (CTS frame).
3318 */
3319 hw->extra_tx_headroom =
3320 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3321
3322 hw->channel_change_time = 10;
3323
3324 hw->queues = MWL8K_TX_QUEUES;
3325
3326 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3327
3328 /* Set rssi and noise values to dBm */
3329 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3330 hw->vif_data_size = sizeof(struct mwl8k_vif);
3331 priv->vif = NULL;
3332
3333 /* Set default radio state and preamble */
3334 priv->radio_on = 0;
3335 priv->radio_short_preamble = 0;
3336
3337 /* Finalize join worker */
3338 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3339
3340 /* TX reclaim tasklet */
3341 tasklet_init(&priv->tx_reclaim_task,
3342 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3343 tasklet_disable(&priv->tx_reclaim_task);
3344
3345 /* Config workthread */
3346 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3347 if (priv->config_wq == NULL)
3348 goto err_iounmap;
3349
3350 /* Power management cookie */
3351 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3352 if (priv->cookie == NULL)
3353 goto err_iounmap;
3354
3355 rc = mwl8k_rxq_init(hw, 0);
3356 if (rc)
3357 goto err_iounmap;
3358 rxq_refill(hw, 0, INT_MAX);
3359
3360 spin_lock_init(&priv->tx_lock);
3361
3362 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3363 rc = mwl8k_txq_init(hw, i);
3364 if (rc)
3365 goto err_free_queues;
3366 }
3367
3368 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3369 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3370 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3371 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3372
3373 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3374 IRQF_SHARED, MWL8K_NAME, hw);
3375 if (rc) {
3376 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3377 priv->name);
3378 goto err_free_queues;
3379 }
3380
3381 /* Reset firmware and hardware */
3382 mwl8k_hw_reset(priv);
3383
3384 /* Ask userland hotplug daemon for the device firmware */
3385 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3386 if (rc) {
3387 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3388 goto err_free_irq;
3389 }
3390
3391 /* Load firmware into hardware */
3392 rc = mwl8k_load_firmware(priv);
3393 if (rc) {
3394 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3395 goto err_stop_firmware;
3396 }
3397
3398 /* Reclaim memory once firmware is successfully loaded */
3399 mwl8k_release_firmware(priv);
3400
3401 /*
3402 * Temporarily enable interrupts. Initial firmware host
3403 * commands use interrupts and avoids polling. Disable
3404 * interrupts when done.
3405 */
3406 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3407
3408 /* Get config data, mac addrs etc */
3409 rc = mwl8k_cmd_get_hw_spec(hw);
3410 if (rc) {
3411 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3412 goto err_stop_firmware;
3413 }
3414
3415 /* Turn radio off */
3416 rc = mwl8k_cmd_802_11_radio_disable(hw);
3417 if (rc) {
3418 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3419 goto err_stop_firmware;
3420 }
3421
3422 /* Disable interrupts */
3423 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3424 free_irq(priv->pdev->irq, hw);
3425
3426 rc = ieee80211_register_hw(hw);
3427 if (rc) {
3428 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3429 goto err_stop_firmware;
3430 }
3431
3432 fw = (u8 *)&priv->fw_rev;
3433 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3434 MWL8K_DESC);
3435 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3436 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3437 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3438 hw->wiphy->perm_addr);
3439
3440 return 0;
3441
3442 err_stop_firmware:
3443 mwl8k_hw_reset(priv);
3444 mwl8k_release_firmware(priv);
3445
3446 err_free_irq:
3447 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3448 free_irq(priv->pdev->irq, hw);
3449
3450 err_free_queues:
3451 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3452 mwl8k_txq_deinit(hw, i);
3453 mwl8k_rxq_deinit(hw, 0);
3454
3455 err_iounmap:
3456 if (priv->cookie != NULL)
3457 pci_free_consistent(priv->pdev, 4,
3458 priv->cookie, priv->cookie_dma);
3459
3460 if (priv->regs != NULL)
3461 pci_iounmap(pdev, priv->regs);
3462
3463 if (priv->config_wq != NULL)
3464 destroy_workqueue(priv->config_wq);
3465
3466 pci_set_drvdata(pdev, NULL);
3467 ieee80211_free_hw(hw);
3468
3469 err_free_reg:
3470 pci_release_regions(pdev);
3471 pci_disable_device(pdev);
3472
3473 return rc;
3474 }
3475
3476 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3477 {
3478 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3479 }
3480
3481 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3482 {
3483 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3484 struct mwl8k_priv *priv;
3485 int i;
3486
3487 if (hw == NULL)
3488 return;
3489 priv = hw->priv;
3490
3491 ieee80211_stop_queues(hw);
3492
3493 ieee80211_unregister_hw(hw);
3494
3495 /* Remove tx reclaim tasklet */
3496 tasklet_kill(&priv->tx_reclaim_task);
3497
3498 /* Stop config thread */
3499 destroy_workqueue(priv->config_wq);
3500
3501 /* Stop hardware */
3502 mwl8k_hw_reset(priv);
3503
3504 /* Return all skbs to mac80211 */
3505 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3506 mwl8k_txq_reclaim(hw, i, 1);
3507
3508 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3509 mwl8k_txq_deinit(hw, i);
3510
3511 mwl8k_rxq_deinit(hw, 0);
3512
3513 pci_free_consistent(priv->pdev, 4,
3514 priv->cookie, priv->cookie_dma);
3515
3516 pci_iounmap(pdev, priv->regs);
3517 pci_set_drvdata(pdev, NULL);
3518 ieee80211_free_hw(hw);
3519 pci_release_regions(pdev);
3520 pci_disable_device(pdev);
3521 }
3522
3523 static struct pci_driver mwl8k_driver = {
3524 .name = MWL8K_NAME,
3525 .id_table = mwl8k_table,
3526 .probe = mwl8k_probe,
3527 .remove = __devexit_p(mwl8k_remove),
3528 .shutdown = __devexit_p(mwl8k_shutdown),
3529 };
3530
3531 static int __init mwl8k_init(void)
3532 {
3533 return pci_register_driver(&mwl8k_driver);
3534 }
3535
3536 static void __exit mwl8k_exit(void)
3537 {
3538 pci_unregister_driver(&mwl8k_driver);
3539 }
3540
3541 module_init(mwl8k_init);
3542 module_exit(mwl8k_exit);
Motorola kernel-slsi