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mwl8k: shorten receive/transmit state variable names
[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
26
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
30
31 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
32 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
33 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
34 { }
35 };
36 MODULE_DEVICE_TABLE(pci, mwl8k_table);
37
38 /* Register definitions */
39 #define MWL8K_HIU_GEN_PTR 0x00000c10
40 #define MWL8K_MODE_STA 0x0000005a
41 #define MWL8K_MODE_AP 0x000000a5
42 #define MWL8K_HIU_INT_CODE 0x00000c14
43 #define MWL8K_FWSTA_READY 0xf0f1f2f4
44 #define MWL8K_FWAP_READY 0xf1f2f4a5
45 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
46 #define MWL8K_HIU_SCRATCH 0x00000c40
47
48 /* Host->device communications */
49 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
54 #define MWL8K_H2A_INT_DUMMY (1 << 20)
55 #define MWL8K_H2A_INT_RESET (1 << 15)
56 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
57 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
58
59 /* Device->host communications */
60 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
65 #define MWL8K_A2H_INT_DUMMY (1 << 20)
66 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73 #define MWL8K_A2H_INT_RX_READY (1 << 1)
74 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
75
76 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
86
87 #define MWL8K_RX_QUEUES 1
88 #define MWL8K_TX_QUEUES 4
89
90 struct mwl8k_rx_queue {
91 int rxd_count;
92
93 /* hw receives here */
94 int head;
95
96 /* refill descs here */
97 int tail;
98
99 struct mwl8k_rx_desc *rxd;
100 dma_addr_t rxd_dma;
101 struct sk_buff **skb;
102 };
103
104 struct mwl8k_tx_queue {
105 /* hw transmits here */
106 int head;
107
108 /* sw appends here */
109 int tail;
110
111 struct ieee80211_tx_queue_stats stats;
112 struct mwl8k_tx_desc *txd;
113 dma_addr_t txd_dma;
114 struct sk_buff **skb;
115 };
116
117 /* Pointers to the firmware data and meta information about it. */
118 struct mwl8k_firmware {
119 /* Microcode */
120 struct firmware *ucode;
121
122 /* Boot helper code */
123 struct firmware *helper;
124 };
125
126 struct mwl8k_priv {
127 void __iomem *regs;
128 struct ieee80211_hw *hw;
129
130 struct pci_dev *pdev;
131
132 /* firmware files and meta data */
133 struct mwl8k_firmware fw;
134 u32 part_num;
135
136 /* firmware access */
137 struct mutex fw_mutex;
138 struct task_struct *fw_mutex_owner;
139 int fw_mutex_depth;
140 struct completion *hostcmd_wait;
141
142 /* lock held over TX and TX reap */
143 spinlock_t tx_lock;
144
145 /* TX quiesce completion, protected by fw_mutex and tx_lock */
146 struct completion *tx_wait;
147
148 struct ieee80211_vif *vif;
149
150 struct ieee80211_channel *current_channel;
151
152 /* power management status cookie from firmware */
153 u32 *cookie;
154 dma_addr_t cookie_dma;
155
156 u16 num_mcaddrs;
157 u8 hw_rev;
158 u32 fw_rev;
159
160 /*
161 * Running count of TX packets in flight, to avoid
162 * iterating over the transmit rings each time.
163 */
164 int pending_tx_pkts;
165
166 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
167 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
168
169 /* PHY parameters */
170 struct ieee80211_supported_band band;
171 struct ieee80211_channel channels[14];
172 struct ieee80211_rate rates[13];
173
174 bool radio_on;
175 bool radio_short_preamble;
176 bool sniffer_enabled;
177 bool wmm_enabled;
178
179 /* XXX need to convert this to handle multiple interfaces */
180 bool capture_beacon;
181 u8 capture_bssid[ETH_ALEN];
182 struct sk_buff *beacon_skb;
183
184 /*
185 * This FJ worker has to be global as it is scheduled from the
186 * RX handler. At this point we don't know which interface it
187 * belongs to until the list of bssids waiting to complete join
188 * is checked.
189 */
190 struct work_struct finalize_join_worker;
191
192 /* Tasklet to reclaim TX descriptors and buffers after tx */
193 struct tasklet_struct tx_reclaim_task;
194 };
195
196 /* Per interface specific private data */
197 struct mwl8k_vif {
198 /* backpointer to parent config block */
199 struct mwl8k_priv *priv;
200
201 /* BSS config of AP or IBSS from mac80211*/
202 struct ieee80211_bss_conf bss_info;
203
204 /* BSSID of AP or IBSS */
205 u8 bssid[ETH_ALEN];
206 u8 mac_addr[ETH_ALEN];
207
208 /*
209 * Subset of supported legacy rates.
210 * Intersection of AP and STA supported rates.
211 */
212 struct ieee80211_rate legacy_rates[13];
213
214 /* number of supported legacy rates */
215 u8 legacy_nrates;
216
217 /* Index into station database.Returned by update_sta_db call */
218 u8 peer_id;
219
220 /* Non AMPDU sequence number assigned by driver */
221 u16 seqno;
222 };
223
224 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
225
226 static const struct ieee80211_channel mwl8k_channels[] = {
227 { .center_freq = 2412, .hw_value = 1, },
228 { .center_freq = 2417, .hw_value = 2, },
229 { .center_freq = 2422, .hw_value = 3, },
230 { .center_freq = 2427, .hw_value = 4, },
231 { .center_freq = 2432, .hw_value = 5, },
232 { .center_freq = 2437, .hw_value = 6, },
233 { .center_freq = 2442, .hw_value = 7, },
234 { .center_freq = 2447, .hw_value = 8, },
235 { .center_freq = 2452, .hw_value = 9, },
236 { .center_freq = 2457, .hw_value = 10, },
237 { .center_freq = 2462, .hw_value = 11, },
238 };
239
240 static const struct ieee80211_rate mwl8k_rates[] = {
241 { .bitrate = 10, .hw_value = 2, },
242 { .bitrate = 20, .hw_value = 4, },
243 { .bitrate = 55, .hw_value = 11, },
244 { .bitrate = 110, .hw_value = 22, },
245 { .bitrate = 220, .hw_value = 44, },
246 { .bitrate = 60, .hw_value = 12, },
247 { .bitrate = 90, .hw_value = 18, },
248 { .bitrate = 120, .hw_value = 24, },
249 { .bitrate = 180, .hw_value = 36, },
250 { .bitrate = 240, .hw_value = 48, },
251 { .bitrate = 360, .hw_value = 72, },
252 { .bitrate = 480, .hw_value = 96, },
253 { .bitrate = 540, .hw_value = 108, },
254 };
255
256 /* Set or get info from Firmware */
257 #define MWL8K_CMD_SET 0x0001
258 #define MWL8K_CMD_GET 0x0000
259
260 /* Firmware command codes */
261 #define MWL8K_CMD_CODE_DNLD 0x0001
262 #define MWL8K_CMD_GET_HW_SPEC 0x0003
263 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
264 #define MWL8K_CMD_GET_STAT 0x0014
265 #define MWL8K_CMD_RADIO_CONTROL 0x001c
266 #define MWL8K_CMD_RF_TX_POWER 0x001e
267 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
268 #define MWL8K_CMD_SET_POST_SCAN 0x0108
269 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
270 #define MWL8K_CMD_SET_AID 0x010d
271 #define MWL8K_CMD_SET_RATE 0x0110
272 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
273 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
274 #define MWL8K_CMD_SET_SLOT 0x0114
275 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
276 #define MWL8K_CMD_SET_WMM_MODE 0x0123
277 #define MWL8K_CMD_MIMO_CONFIG 0x0125
278 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
279 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
280 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
281 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
282 #define MWL8K_CMD_UPDATE_STADB 0x1123
283
284 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
285 {
286 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
287 snprintf(buf, bufsize, "%s", #x);\
288 return buf;\
289 } while (0)
290 switch (cmd & ~0x8000) {
291 MWL8K_CMDNAME(CODE_DNLD);
292 MWL8K_CMDNAME(GET_HW_SPEC);
293 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
294 MWL8K_CMDNAME(GET_STAT);
295 MWL8K_CMDNAME(RADIO_CONTROL);
296 MWL8K_CMDNAME(RF_TX_POWER);
297 MWL8K_CMDNAME(SET_PRE_SCAN);
298 MWL8K_CMDNAME(SET_POST_SCAN);
299 MWL8K_CMDNAME(SET_RF_CHANNEL);
300 MWL8K_CMDNAME(SET_AID);
301 MWL8K_CMDNAME(SET_RATE);
302 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
303 MWL8K_CMDNAME(RTS_THRESHOLD);
304 MWL8K_CMDNAME(SET_SLOT);
305 MWL8K_CMDNAME(SET_EDCA_PARAMS);
306 MWL8K_CMDNAME(SET_WMM_MODE);
307 MWL8K_CMDNAME(MIMO_CONFIG);
308 MWL8K_CMDNAME(USE_FIXED_RATE);
309 MWL8K_CMDNAME(ENABLE_SNIFFER);
310 MWL8K_CMDNAME(SET_MAC_ADDR);
311 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
312 MWL8K_CMDNAME(UPDATE_STADB);
313 default:
314 snprintf(buf, bufsize, "0x%x", cmd);
315 }
316 #undef MWL8K_CMDNAME
317
318 return buf;
319 }
320
321 /* Hardware and firmware reset */
322 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
323 {
324 iowrite32(MWL8K_H2A_INT_RESET,
325 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
326 iowrite32(MWL8K_H2A_INT_RESET,
327 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
328 msleep(20);
329 }
330
331 /* Release fw image */
332 static void mwl8k_release_fw(struct firmware **fw)
333 {
334 if (*fw == NULL)
335 return;
336 release_firmware(*fw);
337 *fw = NULL;
338 }
339
340 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
341 {
342 mwl8k_release_fw(&priv->fw.ucode);
343 mwl8k_release_fw(&priv->fw.helper);
344 }
345
346 /* Request fw image */
347 static int mwl8k_request_fw(struct mwl8k_priv *priv,
348 const char *fname, struct firmware **fw)
349 {
350 /* release current image */
351 if (*fw != NULL)
352 mwl8k_release_fw(fw);
353
354 return request_firmware((const struct firmware **)fw,
355 fname, &priv->pdev->dev);
356 }
357
358 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
359 {
360 u8 filename[64];
361 int rc;
362
363 priv->part_num = part_num;
364
365 snprintf(filename, sizeof(filename),
366 "mwl8k/helper_%u.fw", priv->part_num);
367
368 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
369 if (rc) {
370 printk(KERN_ERR "%s: Error requesting helper firmware "
371 "file %s\n", pci_name(priv->pdev), filename);
372 return rc;
373 }
374
375 snprintf(filename, sizeof(filename),
376 "mwl8k/fmimage_%u.fw", priv->part_num);
377
378 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
379 if (rc) {
380 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
381 pci_name(priv->pdev), filename);
382 mwl8k_release_fw(&priv->fw.helper);
383 return rc;
384 }
385
386 return 0;
387 }
388
389 struct mwl8k_cmd_pkt {
390 __le16 code;
391 __le16 length;
392 __le16 seq_num;
393 __le16 result;
394 char payload[0];
395 } __attribute__((packed));
396
397 /*
398 * Firmware loading.
399 */
400 static int
401 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
402 {
403 void __iomem *regs = priv->regs;
404 dma_addr_t dma_addr;
405 int loops;
406
407 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
408 if (pci_dma_mapping_error(priv->pdev, dma_addr))
409 return -ENOMEM;
410
411 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
412 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
413 iowrite32(MWL8K_H2A_INT_DOORBELL,
414 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
415 iowrite32(MWL8K_H2A_INT_DUMMY,
416 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
417
418 loops = 1000;
419 do {
420 u32 int_code;
421
422 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
423 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
424 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
425 break;
426 }
427
428 cond_resched();
429 udelay(1);
430 } while (--loops);
431
432 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
433
434 return loops ? 0 : -ETIMEDOUT;
435 }
436
437 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
438 const u8 *data, size_t length)
439 {
440 struct mwl8k_cmd_pkt *cmd;
441 int done;
442 int rc = 0;
443
444 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
445 if (cmd == NULL)
446 return -ENOMEM;
447
448 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
449 cmd->seq_num = 0;
450 cmd->result = 0;
451
452 done = 0;
453 while (length) {
454 int block_size = length > 256 ? 256 : length;
455
456 memcpy(cmd->payload, data + done, block_size);
457 cmd->length = cpu_to_le16(block_size);
458
459 rc = mwl8k_send_fw_load_cmd(priv, cmd,
460 sizeof(*cmd) + block_size);
461 if (rc)
462 break;
463
464 done += block_size;
465 length -= block_size;
466 }
467
468 if (!rc) {
469 cmd->length = 0;
470 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
471 }
472
473 kfree(cmd);
474
475 return rc;
476 }
477
478 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
479 const u8 *data, size_t length)
480 {
481 unsigned char *buffer;
482 int may_continue, rc = 0;
483 u32 done, prev_block_size;
484
485 buffer = kmalloc(1024, GFP_KERNEL);
486 if (buffer == NULL)
487 return -ENOMEM;
488
489 done = 0;
490 prev_block_size = 0;
491 may_continue = 1000;
492 while (may_continue > 0) {
493 u32 block_size;
494
495 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
496 if (block_size & 1) {
497 block_size &= ~1;
498 may_continue--;
499 } else {
500 done += prev_block_size;
501 length -= prev_block_size;
502 }
503
504 if (block_size > 1024 || block_size > length) {
505 rc = -EOVERFLOW;
506 break;
507 }
508
509 if (length == 0) {
510 rc = 0;
511 break;
512 }
513
514 if (block_size == 0) {
515 rc = -EPROTO;
516 may_continue--;
517 udelay(1);
518 continue;
519 }
520
521 prev_block_size = block_size;
522 memcpy(buffer, data + done, block_size);
523
524 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
525 if (rc)
526 break;
527 }
528
529 if (!rc && length != 0)
530 rc = -EREMOTEIO;
531
532 kfree(buffer);
533
534 return rc;
535 }
536
537 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
538 {
539 struct mwl8k_priv *priv = hw->priv;
540 struct firmware *fw = priv->fw.ucode;
541 int rc;
542 int loops;
543
544 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
545 struct firmware *helper = priv->fw.helper;
546
547 if (helper == NULL) {
548 printk(KERN_ERR "%s: helper image needed but none "
549 "given\n", pci_name(priv->pdev));
550 return -EINVAL;
551 }
552
553 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
554 if (rc) {
555 printk(KERN_ERR "%s: unable to load firmware "
556 "helper image\n", pci_name(priv->pdev));
557 return rc;
558 }
559 msleep(1);
560
561 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
562 } else {
563 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
564 }
565
566 if (rc) {
567 printk(KERN_ERR "%s: unable to load firmware image\n",
568 pci_name(priv->pdev));
569 return rc;
570 }
571
572 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
573 msleep(1);
574
575 loops = 200000;
576 do {
577 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
578 == MWL8K_FWSTA_READY)
579 break;
580 udelay(1);
581 } while (--loops);
582
583 return loops ? 0 : -ETIMEDOUT;
584 }
585
586
587 /*
588 * Defines shared between transmission and reception.
589 */
590 /* HT control fields for firmware */
591 struct ewc_ht_info {
592 __le16 control1;
593 __le16 control2;
594 __le16 control3;
595 } __attribute__((packed));
596
597 /* Firmware Station database operations */
598 #define MWL8K_STA_DB_ADD_ENTRY 0
599 #define MWL8K_STA_DB_MODIFY_ENTRY 1
600 #define MWL8K_STA_DB_DEL_ENTRY 2
601 #define MWL8K_STA_DB_FLUSH 3
602
603 /* Peer Entry flags - used to define the type of the peer node */
604 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
605
606 #define MWL8K_IEEE_LEGACY_DATA_RATES 13
607 #define MWL8K_MCS_BITMAP_SIZE 16
608
609 struct peer_capability_info {
610 /* Peer type - AP vs. STA. */
611 __u8 peer_type;
612
613 /* Basic 802.11 capabilities from assoc resp. */
614 __le16 basic_caps;
615
616 /* Set if peer supports 802.11n high throughput (HT). */
617 __u8 ht_support;
618
619 /* Valid if HT is supported. */
620 __le16 ht_caps;
621 __u8 extended_ht_caps;
622 struct ewc_ht_info ewc_info;
623
624 /* Legacy rate table. Intersection of our rates and peer rates. */
625 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
626
627 /* HT rate table. Intersection of our rates and peer rates. */
628 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
629 __u8 pad[16];
630
631 /* If set, interoperability mode, no proprietary extensions. */
632 __u8 interop;
633 __u8 pad2;
634 __u8 station_id;
635 __le16 amsdu_enabled;
636 } __attribute__((packed));
637
638 /* Inline functions to manipulate QoS field in data descriptor. */
639 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
640 {
641 u16 val_mask = 1 << 4;
642
643 /* End of Service Period Bit 4 */
644 return qos | val_mask;
645 }
646
647 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
648 {
649 u16 val_mask = 0x3;
650 u8 shift = 5;
651 u16 qos_mask = ~(val_mask << shift);
652
653 /* Ack Policy Bit 5-6 */
654 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
655 }
656
657 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
658 {
659 u16 val_mask = 1 << 7;
660
661 /* AMSDU present Bit 7 */
662 return qos | val_mask;
663 }
664
665 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
666 {
667 u16 val_mask = 0xff;
668 u8 shift = 8;
669 u16 qos_mask = ~(val_mask << shift);
670
671 /* Queue Length Bits 8-15 */
672 return (qos & qos_mask) | ((len & val_mask) << shift);
673 }
674
675 /* DMA header used by firmware and hardware. */
676 struct mwl8k_dma_data {
677 __le16 fwlen;
678 struct ieee80211_hdr wh;
679 } __attribute__((packed));
680
681 /* Routines to add/remove DMA header from skb. */
682 static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
683 {
684 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data;
685 void *dst, *src = &tr->wh;
686 int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
687 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
688
689 dst = (void *)tr + space;
690 if (dst != src) {
691 memmove(dst, src, hdrlen);
692 skb_pull(skb, space);
693 }
694 }
695
696 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
697 {
698 struct ieee80211_hdr *wh;
699 u32 hdrlen, pktlen;
700 struct mwl8k_dma_data *tr;
701
702 wh = (struct ieee80211_hdr *)skb->data;
703 hdrlen = ieee80211_hdrlen(wh->frame_control);
704 pktlen = skb->len;
705
706 /*
707 * Copy up/down the 802.11 header; the firmware requires
708 * we present a 2-byte payload length followed by a
709 * 4-address header (w/o QoS), followed (optionally) by
710 * any WEP/ExtIV header (but only filled in for CCMP).
711 */
712 if (hdrlen != sizeof(struct mwl8k_dma_data))
713 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
714
715 tr = (struct mwl8k_dma_data *)skb->data;
716 if (wh != &tr->wh)
717 memmove(&tr->wh, wh, hdrlen);
718
719 /* Clear addr4 */
720 memset(tr->wh.addr4, 0, ETH_ALEN);
721
722 /*
723 * Firmware length is the length of the fully formed "802.11
724 * payload". That is, everything except for the 802.11 header.
725 * This includes all crypto material including the MIC.
726 */
727 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
728 }
729
730
731 /*
732 * Packet reception.
733 */
734 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
735
736 struct mwl8k_rx_desc {
737 __le16 pkt_len;
738 __u8 link_quality;
739 __u8 noise_level;
740 __le32 pkt_phys_addr;
741 __le32 next_rxd_phys_addr;
742 __le16 qos_control;
743 __le16 rate_info;
744 __le32 pad0[4];
745 __u8 rssi;
746 __u8 channel;
747 __le16 pad1;
748 __u8 rx_ctrl;
749 __u8 rx_status;
750 __u8 pad2[2];
751 } __attribute__((packed));
752
753 #define MWL8K_RX_DESCS 256
754 #define MWL8K_RX_MAXSZ 3800
755
756 #define RATE_INFO_SHORTPRE 0x8000
757 #define RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
758 #define RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
759 #define RATE_INFO_40MHZ 0x0004
760 #define RATE_INFO_SHORTGI 0x0002
761 #define RATE_INFO_MCS_FORMAT 0x0001
762
763 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
764 {
765 struct mwl8k_priv *priv = hw->priv;
766 struct mwl8k_rx_queue *rxq = priv->rxq + index;
767 int size;
768 int i;
769
770 rxq->rxd_count = 0;
771 rxq->head = 0;
772 rxq->tail = 0;
773
774 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
775
776 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
777 if (rxq->rxd == NULL) {
778 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
779 wiphy_name(hw->wiphy));
780 return -ENOMEM;
781 }
782 memset(rxq->rxd, 0, size);
783
784 rxq->skb = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->skb), GFP_KERNEL);
785 if (rxq->skb == NULL) {
786 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
787 wiphy_name(hw->wiphy));
788 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
789 return -ENOMEM;
790 }
791 memset(rxq->skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->skb));
792
793 for (i = 0; i < MWL8K_RX_DESCS; i++) {
794 struct mwl8k_rx_desc *rx_desc;
795 int nexti;
796
797 rx_desc = rxq->rxd + i;
798 nexti = (i + 1) % MWL8K_RX_DESCS;
799
800 rx_desc->next_rxd_phys_addr =
801 cpu_to_le32(rxq->rxd_dma + nexti * sizeof(*rx_desc));
802 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
803 }
804
805 return 0;
806 }
807
808 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
809 {
810 struct mwl8k_priv *priv = hw->priv;
811 struct mwl8k_rx_queue *rxq = priv->rxq + index;
812 int refilled;
813
814 refilled = 0;
815 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
816 struct sk_buff *skb;
817 int rx;
818
819 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
820 if (skb == NULL)
821 break;
822
823 rxq->rxd_count++;
824
825 rx = rxq->tail;
826 rxq->tail = (rx + 1) % MWL8K_RX_DESCS;
827
828 rxq->rxd[rx].pkt_phys_addr =
829 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
830 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
831
832 rxq->rxd[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
833 rxq->skb[rx] = skb;
834 wmb();
835 rxq->rxd[rx].rx_ctrl = 0;
836
837 refilled++;
838 }
839
840 return refilled;
841 }
842
843 /* Must be called only when the card's reception is completely halted */
844 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
845 {
846 struct mwl8k_priv *priv = hw->priv;
847 struct mwl8k_rx_queue *rxq = priv->rxq + index;
848 int i;
849
850 for (i = 0; i < MWL8K_RX_DESCS; i++) {
851 if (rxq->skb[i] != NULL) {
852 unsigned long addr;
853
854 addr = le32_to_cpu(rxq->rxd[i].pkt_phys_addr);
855 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
856 PCI_DMA_FROMDEVICE);
857 kfree_skb(rxq->skb[i]);
858 rxq->skb[i] = NULL;
859 }
860 }
861
862 kfree(rxq->skb);
863 rxq->skb = NULL;
864
865 pci_free_consistent(priv->pdev,
866 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
867 rxq->rxd, rxq->rxd_dma);
868 rxq->rxd = NULL;
869 }
870
871
872 /*
873 * Scan a list of BSSIDs to process for finalize join.
874 * Allows for extension to process multiple BSSIDs.
875 */
876 static inline int
877 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
878 {
879 return priv->capture_beacon &&
880 ieee80211_is_beacon(wh->frame_control) &&
881 !compare_ether_addr(wh->addr3, priv->capture_bssid);
882 }
883
884 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
885 struct sk_buff *skb)
886 {
887 struct mwl8k_priv *priv = hw->priv;
888
889 priv->capture_beacon = false;
890 memset(priv->capture_bssid, 0, ETH_ALEN);
891
892 /*
893 * Use GFP_ATOMIC as rxq_process is called from
894 * the primary interrupt handler, memory allocation call
895 * must not sleep.
896 */
897 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
898 if (priv->beacon_skb != NULL)
899 ieee80211_queue_work(hw, &priv->finalize_join_worker);
900 }
901
902 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
903 {
904 struct mwl8k_priv *priv = hw->priv;
905 struct mwl8k_rx_queue *rxq = priv->rxq + index;
906 int processed;
907
908 processed = 0;
909 while (rxq->rxd_count && limit--) {
910 struct mwl8k_rx_desc *rx_desc;
911 struct sk_buff *skb;
912 struct ieee80211_rx_status status;
913 unsigned long addr;
914 struct ieee80211_hdr *wh;
915 u16 rate_info;
916
917 rx_desc = rxq->rxd + rxq->head;
918 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
919 break;
920 rmb();
921
922 skb = rxq->skb[rxq->head];
923 if (skb == NULL)
924 break;
925 rxq->skb[rxq->head] = NULL;
926
927 rxq->head = (rxq->head + 1) % MWL8K_RX_DESCS;
928 rxq->rxd_count--;
929
930 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
931 pci_unmap_single(priv->pdev, addr,
932 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
933
934 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
935 mwl8k_remove_dma_header(skb);
936
937 wh = (struct ieee80211_hdr *)skb->data;
938
939 /*
940 * Check for a pending join operation. Save a
941 * copy of the beacon and schedule a tasklet to
942 * send a FINALIZE_JOIN command to the firmware.
943 */
944 if (mwl8k_capture_bssid(priv, wh))
945 mwl8k_save_beacon(hw, skb);
946
947 rate_info = le16_to_cpu(rx_desc->rate_info);
948
949 memset(&status, 0, sizeof(status));
950 status.mactime = 0;
951 status.signal = -rx_desc->rssi;
952 status.noise = -rx_desc->noise_level;
953 status.qual = rx_desc->link_quality;
954 status.antenna = RATE_INFO_ANTSELECT(rate_info);
955 status.rate_idx = RATE_INFO_RATEID(rate_info);
956 status.flag = 0;
957 if (rate_info & RATE_INFO_SHORTPRE)
958 status.flag |= RX_FLAG_SHORTPRE;
959 if (rate_info & RATE_INFO_40MHZ)
960 status.flag |= RX_FLAG_40MHZ;
961 if (rate_info & RATE_INFO_SHORTGI)
962 status.flag |= RX_FLAG_SHORT_GI;
963 if (rate_info & RATE_INFO_MCS_FORMAT)
964 status.flag |= RX_FLAG_HT;
965 status.band = IEEE80211_BAND_2GHZ;
966 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
967 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
968 ieee80211_rx_irqsafe(hw, skb);
969
970 processed++;
971 }
972
973 return processed;
974 }
975
976
977 /*
978 * Packet transmission.
979 */
980
981 /* Transmit packet ACK policy */
982 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
983 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
984
985 #define MWL8K_TXD_STATUS_OK 0x00000001
986 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
987 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
988 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
989 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
990
991 struct mwl8k_tx_desc {
992 __le32 status;
993 __u8 data_rate;
994 __u8 tx_priority;
995 __le16 qos_control;
996 __le32 pkt_phys_addr;
997 __le16 pkt_len;
998 __u8 dest_MAC_addr[ETH_ALEN];
999 __le32 next_txd_phys_addr;
1000 __le32 reserved;
1001 __le16 rate_info;
1002 __u8 peer_id;
1003 __u8 tx_frag_cnt;
1004 } __attribute__((packed));
1005
1006 #define MWL8K_TX_DESCS 128
1007
1008 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1009 {
1010 struct mwl8k_priv *priv = hw->priv;
1011 struct mwl8k_tx_queue *txq = priv->txq + index;
1012 int size;
1013 int i;
1014
1015 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1016 txq->stats.limit = MWL8K_TX_DESCS;
1017 txq->head = 0;
1018 txq->tail = 0;
1019
1020 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1021
1022 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1023 if (txq->txd == NULL) {
1024 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1025 wiphy_name(hw->wiphy));
1026 return -ENOMEM;
1027 }
1028 memset(txq->txd, 0, size);
1029
1030 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1031 if (txq->skb == NULL) {
1032 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1033 wiphy_name(hw->wiphy));
1034 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1035 return -ENOMEM;
1036 }
1037 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1038
1039 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1040 struct mwl8k_tx_desc *tx_desc;
1041 int nexti;
1042
1043 tx_desc = txq->txd + i;
1044 nexti = (i + 1) % MWL8K_TX_DESCS;
1045
1046 tx_desc->status = 0;
1047 tx_desc->next_txd_phys_addr =
1048 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1049 }
1050
1051 return 0;
1052 }
1053
1054 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1055 {
1056 iowrite32(MWL8K_H2A_INT_PPA_READY,
1057 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1058 iowrite32(MWL8K_H2A_INT_DUMMY,
1059 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1060 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1061 }
1062
1063 struct mwl8k_txq_info {
1064 u32 fw_owned;
1065 u32 drv_owned;
1066 u32 unused;
1067 u32 len;
1068 u32 head;
1069 u32 tail;
1070 };
1071
1072 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1073 struct mwl8k_txq_info *txinfo)
1074 {
1075 int count, desc, status;
1076 struct mwl8k_tx_queue *txq;
1077 struct mwl8k_tx_desc *tx_desc;
1078 int ndescs = 0;
1079
1080 memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info));
1081
1082 for (count = 0; count < MWL8K_TX_QUEUES; count++) {
1083 txq = priv->txq + count;
1084 txinfo[count].len = txq->stats.len;
1085 txinfo[count].head = txq->head;
1086 txinfo[count].tail = txq->tail;
1087 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1088 tx_desc = txq->txd + desc;
1089 status = le32_to_cpu(tx_desc->status);
1090
1091 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1092 txinfo[count].fw_owned++;
1093 else
1094 txinfo[count].drv_owned++;
1095
1096 if (tx_desc->pkt_len == 0)
1097 txinfo[count].unused++;
1098 }
1099 }
1100
1101 return ndescs;
1102 }
1103
1104 /*
1105 * Must be called with priv->fw_mutex held and tx queues stopped.
1106 */
1107 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1108 {
1109 struct mwl8k_priv *priv = hw->priv;
1110 DECLARE_COMPLETION_ONSTACK(tx_wait);
1111 u32 count;
1112 unsigned long timeout;
1113
1114 might_sleep();
1115
1116 spin_lock_bh(&priv->tx_lock);
1117 count = priv->pending_tx_pkts;
1118 if (count)
1119 priv->tx_wait = &tx_wait;
1120 spin_unlock_bh(&priv->tx_lock);
1121
1122 if (count) {
1123 struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES];
1124 int index;
1125 int newcount;
1126
1127 timeout = wait_for_completion_timeout(&tx_wait,
1128 msecs_to_jiffies(5000));
1129 if (timeout)
1130 return 0;
1131
1132 spin_lock_bh(&priv->tx_lock);
1133 priv->tx_wait = NULL;
1134 newcount = priv->pending_tx_pkts;
1135 mwl8k_scan_tx_ring(priv, txinfo);
1136 spin_unlock_bh(&priv->tx_lock);
1137
1138 printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1139 __func__, __LINE__, count, newcount);
1140
1141 for (index = 0; index < MWL8K_TX_QUEUES; index++)
1142 printk(KERN_ERR "TXQ:%u L:%u H:%u T:%u FW:%u "
1143 "DRV:%u U:%u\n",
1144 index,
1145 txinfo[index].len,
1146 txinfo[index].head,
1147 txinfo[index].tail,
1148 txinfo[index].fw_owned,
1149 txinfo[index].drv_owned,
1150 txinfo[index].unused);
1151
1152 return -ETIMEDOUT;
1153 }
1154
1155 return 0;
1156 }
1157
1158 #define MWL8K_TXD_SUCCESS(status) \
1159 ((status) & (MWL8K_TXD_STATUS_OK | \
1160 MWL8K_TXD_STATUS_OK_RETRY | \
1161 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1162
1163 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1164 {
1165 struct mwl8k_priv *priv = hw->priv;
1166 struct mwl8k_tx_queue *txq = priv->txq + index;
1167 int wake = 0;
1168
1169 while (txq->stats.len > 0) {
1170 int tx;
1171 struct mwl8k_tx_desc *tx_desc;
1172 unsigned long addr;
1173 int size;
1174 struct sk_buff *skb;
1175 struct ieee80211_tx_info *info;
1176 u32 status;
1177
1178 tx = txq->head;
1179 tx_desc = txq->txd + tx;
1180
1181 status = le32_to_cpu(tx_desc->status);
1182
1183 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1184 if (!force)
1185 break;
1186 tx_desc->status &=
1187 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1188 }
1189
1190 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1191 BUG_ON(txq->stats.len == 0);
1192 txq->stats.len--;
1193 priv->pending_tx_pkts--;
1194
1195 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1196 size = le16_to_cpu(tx_desc->pkt_len);
1197 skb = txq->skb[tx];
1198 txq->skb[tx] = NULL;
1199
1200 BUG_ON(skb == NULL);
1201 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1202
1203 mwl8k_remove_dma_header(skb);
1204
1205 /* Mark descriptor as unused */
1206 tx_desc->pkt_phys_addr = 0;
1207 tx_desc->pkt_len = 0;
1208
1209 info = IEEE80211_SKB_CB(skb);
1210 ieee80211_tx_info_clear_status(info);
1211 if (MWL8K_TXD_SUCCESS(status))
1212 info->flags |= IEEE80211_TX_STAT_ACK;
1213
1214 ieee80211_tx_status_irqsafe(hw, skb);
1215
1216 wake = 1;
1217 }
1218
1219 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1220 ieee80211_wake_queue(hw, index);
1221 }
1222
1223 /* must be called only when the card's transmit is completely halted */
1224 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1225 {
1226 struct mwl8k_priv *priv = hw->priv;
1227 struct mwl8k_tx_queue *txq = priv->txq + index;
1228
1229 mwl8k_txq_reclaim(hw, index, 1);
1230
1231 kfree(txq->skb);
1232 txq->skb = NULL;
1233
1234 pci_free_consistent(priv->pdev,
1235 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1236 txq->txd, txq->txd_dma);
1237 txq->txd = NULL;
1238 }
1239
1240 static int
1241 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1242 {
1243 struct mwl8k_priv *priv = hw->priv;
1244 struct ieee80211_tx_info *tx_info;
1245 struct mwl8k_vif *mwl8k_vif;
1246 struct ieee80211_hdr *wh;
1247 struct mwl8k_tx_queue *txq;
1248 struct mwl8k_tx_desc *tx;
1249 dma_addr_t dma;
1250 u32 txstatus;
1251 u8 txdatarate;
1252 u16 qos;
1253
1254 wh = (struct ieee80211_hdr *)skb->data;
1255 if (ieee80211_is_data_qos(wh->frame_control))
1256 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1257 else
1258 qos = 0;
1259
1260 mwl8k_add_dma_header(skb);
1261 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1262
1263 tx_info = IEEE80211_SKB_CB(skb);
1264 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1265
1266 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1267 u16 seqno = mwl8k_vif->seqno;
1268
1269 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1270 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1271 mwl8k_vif->seqno = seqno++ % 4096;
1272 }
1273
1274 /* Setup firmware control bit fields for each frame type. */
1275 txstatus = 0;
1276 txdatarate = 0;
1277 if (ieee80211_is_mgmt(wh->frame_control) ||
1278 ieee80211_is_ctl(wh->frame_control)) {
1279 txdatarate = 0;
1280 qos = mwl8k_qos_setbit_eosp(qos);
1281 /* Set Queue size to unspecified */
1282 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1283 } else if (ieee80211_is_data(wh->frame_control)) {
1284 txdatarate = 1;
1285 if (is_multicast_ether_addr(wh->addr1))
1286 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1287
1288 /* Send pkt in an aggregate if AMPDU frame. */
1289 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1290 qos = mwl8k_qos_setbit_ack(qos,
1291 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1292 else
1293 qos = mwl8k_qos_setbit_ack(qos,
1294 MWL8K_TXD_ACK_POLICY_NORMAL);
1295
1296 if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
1297 qos = mwl8k_qos_setbit_amsdu(qos);
1298 }
1299
1300 dma = pci_map_single(priv->pdev, skb->data,
1301 skb->len, PCI_DMA_TODEVICE);
1302
1303 if (pci_dma_mapping_error(priv->pdev, dma)) {
1304 printk(KERN_DEBUG "%s: failed to dma map skb, "
1305 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1306 dev_kfree_skb(skb);
1307 return NETDEV_TX_OK;
1308 }
1309
1310 spin_lock_bh(&priv->tx_lock);
1311
1312 txq = priv->txq + index;
1313
1314 BUG_ON(txq->skb[txq->tail] != NULL);
1315 txq->skb[txq->tail] = skb;
1316
1317 tx = txq->txd + txq->tail;
1318 tx->data_rate = txdatarate;
1319 tx->tx_priority = index;
1320 tx->qos_control = cpu_to_le16(qos);
1321 tx->pkt_phys_addr = cpu_to_le32(dma);
1322 tx->pkt_len = cpu_to_le16(skb->len);
1323 tx->rate_info = 0;
1324 tx->peer_id = mwl8k_vif->peer_id;
1325 wmb();
1326 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1327
1328 txq->stats.count++;
1329 txq->stats.len++;
1330 priv->pending_tx_pkts++;
1331
1332 txq->tail++;
1333 if (txq->tail == MWL8K_TX_DESCS)
1334 txq->tail = 0;
1335
1336 if (txq->head == txq->tail)
1337 ieee80211_stop_queue(hw, index);
1338
1339 mwl8k_tx_start(priv);
1340
1341 spin_unlock_bh(&priv->tx_lock);
1342
1343 return NETDEV_TX_OK;
1344 }
1345
1346
1347 /*
1348 * Firmware access.
1349 *
1350 * We have the following requirements for issuing firmware commands:
1351 * - Some commands require that the packet transmit path is idle when
1352 * the command is issued. (For simplicity, we'll just quiesce the
1353 * transmit path for every command.)
1354 * - There are certain sequences of commands that need to be issued to
1355 * the hardware sequentially, with no other intervening commands.
1356 *
1357 * This leads to an implementation of a "firmware lock" as a mutex that
1358 * can be taken recursively, and which is taken by both the low-level
1359 * command submission function (mwl8k_post_cmd) as well as any users of
1360 * that function that require issuing of an atomic sequence of commands,
1361 * and quiesces the transmit path whenever it's taken.
1362 */
1363 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1364 {
1365 struct mwl8k_priv *priv = hw->priv;
1366
1367 if (priv->fw_mutex_owner != current) {
1368 int rc;
1369
1370 mutex_lock(&priv->fw_mutex);
1371 ieee80211_stop_queues(hw);
1372
1373 rc = mwl8k_tx_wait_empty(hw);
1374 if (rc) {
1375 ieee80211_wake_queues(hw);
1376 mutex_unlock(&priv->fw_mutex);
1377
1378 return rc;
1379 }
1380
1381 priv->fw_mutex_owner = current;
1382 }
1383
1384 priv->fw_mutex_depth++;
1385
1386 return 0;
1387 }
1388
1389 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1390 {
1391 struct mwl8k_priv *priv = hw->priv;
1392
1393 if (!--priv->fw_mutex_depth) {
1394 ieee80211_wake_queues(hw);
1395 priv->fw_mutex_owner = NULL;
1396 mutex_unlock(&priv->fw_mutex);
1397 }
1398 }
1399
1400
1401 /*
1402 * Command processing.
1403 */
1404
1405 /* Timeout firmware commands after 2000ms */
1406 #define MWL8K_CMD_TIMEOUT_MS 2000
1407
1408 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1409 {
1410 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1411 struct mwl8k_priv *priv = hw->priv;
1412 void __iomem *regs = priv->regs;
1413 dma_addr_t dma_addr;
1414 unsigned int dma_size;
1415 int rc;
1416 unsigned long timeout = 0;
1417 u8 buf[32];
1418
1419 cmd->result = 0xffff;
1420 dma_size = le16_to_cpu(cmd->length);
1421 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1422 PCI_DMA_BIDIRECTIONAL);
1423 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1424 return -ENOMEM;
1425
1426 rc = mwl8k_fw_lock(hw);
1427 if (rc) {
1428 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1429 PCI_DMA_BIDIRECTIONAL);
1430 return rc;
1431 }
1432
1433 priv->hostcmd_wait = &cmd_wait;
1434 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1435 iowrite32(MWL8K_H2A_INT_DOORBELL,
1436 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1437 iowrite32(MWL8K_H2A_INT_DUMMY,
1438 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1439
1440 timeout = wait_for_completion_timeout(&cmd_wait,
1441 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1442
1443 priv->hostcmd_wait = NULL;
1444
1445 mwl8k_fw_unlock(hw);
1446
1447 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1448 PCI_DMA_BIDIRECTIONAL);
1449
1450 if (!timeout) {
1451 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1452 wiphy_name(hw->wiphy),
1453 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1454 MWL8K_CMD_TIMEOUT_MS);
1455 rc = -ETIMEDOUT;
1456 } else {
1457 rc = cmd->result ? -EINVAL : 0;
1458 if (rc)
1459 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1460 wiphy_name(hw->wiphy),
1461 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1462 le16_to_cpu(cmd->result));
1463 }
1464
1465 return rc;
1466 }
1467
1468 /*
1469 * GET_HW_SPEC.
1470 */
1471 struct mwl8k_cmd_get_hw_spec {
1472 struct mwl8k_cmd_pkt header;
1473 __u8 hw_rev;
1474 __u8 host_interface;
1475 __le16 num_mcaddrs;
1476 __u8 perm_addr[ETH_ALEN];
1477 __le16 region_code;
1478 __le32 fw_rev;
1479 __le32 ps_cookie;
1480 __le32 caps;
1481 __u8 mcs_bitmap[16];
1482 __le32 rx_queue_ptr;
1483 __le32 num_tx_queues;
1484 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1485 __le32 caps2;
1486 __le32 num_tx_desc_per_queue;
1487 __le32 total_rxd;
1488 } __attribute__((packed));
1489
1490 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1491 {
1492 struct mwl8k_priv *priv = hw->priv;
1493 struct mwl8k_cmd_get_hw_spec *cmd;
1494 int rc;
1495 int i;
1496
1497 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1498 if (cmd == NULL)
1499 return -ENOMEM;
1500
1501 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1502 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1503
1504 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1505 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1506 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1507 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1508 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1509 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1510 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1511 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1512
1513 rc = mwl8k_post_cmd(hw, &cmd->header);
1514
1515 if (!rc) {
1516 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1517 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1518 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1519 priv->hw_rev = cmd->hw_rev;
1520 }
1521
1522 kfree(cmd);
1523 return rc;
1524 }
1525
1526 /*
1527 * CMD_MAC_MULTICAST_ADR.
1528 */
1529 struct mwl8k_cmd_mac_multicast_adr {
1530 struct mwl8k_cmd_pkt header;
1531 __le16 action;
1532 __le16 numaddr;
1533 __u8 addr[0][ETH_ALEN];
1534 };
1535
1536 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1537 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1538 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1539 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1540
1541 static struct mwl8k_cmd_pkt *
1542 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1543 int mc_count, struct dev_addr_list *mclist)
1544 {
1545 struct mwl8k_priv *priv = hw->priv;
1546 struct mwl8k_cmd_mac_multicast_adr *cmd;
1547 int size;
1548
1549 if (allmulti || mc_count > priv->num_mcaddrs) {
1550 allmulti = 1;
1551 mc_count = 0;
1552 }
1553
1554 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1555
1556 cmd = kzalloc(size, GFP_ATOMIC);
1557 if (cmd == NULL)
1558 return NULL;
1559
1560 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1561 cmd->header.length = cpu_to_le16(size);
1562 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1563 MWL8K_ENABLE_RX_BROADCAST);
1564
1565 if (allmulti) {
1566 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1567 } else if (mc_count) {
1568 int i;
1569
1570 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1571 cmd->numaddr = cpu_to_le16(mc_count);
1572 for (i = 0; i < mc_count && mclist; i++) {
1573 if (mclist->da_addrlen != ETH_ALEN) {
1574 kfree(cmd);
1575 return NULL;
1576 }
1577 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1578 mclist = mclist->next;
1579 }
1580 }
1581
1582 return &cmd->header;
1583 }
1584
1585 /*
1586 * CMD_802_11_GET_STAT.
1587 */
1588 struct mwl8k_cmd_802_11_get_stat {
1589 struct mwl8k_cmd_pkt header;
1590 __le32 stats[64];
1591 } __attribute__((packed));
1592
1593 #define MWL8K_STAT_ACK_FAILURE 9
1594 #define MWL8K_STAT_RTS_FAILURE 12
1595 #define MWL8K_STAT_FCS_ERROR 24
1596 #define MWL8K_STAT_RTS_SUCCESS 11
1597
1598 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1599 struct ieee80211_low_level_stats *stats)
1600 {
1601 struct mwl8k_cmd_802_11_get_stat *cmd;
1602 int rc;
1603
1604 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1605 if (cmd == NULL)
1606 return -ENOMEM;
1607
1608 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1609 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1610
1611 rc = mwl8k_post_cmd(hw, &cmd->header);
1612 if (!rc) {
1613 stats->dot11ACKFailureCount =
1614 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1615 stats->dot11RTSFailureCount =
1616 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1617 stats->dot11FCSErrorCount =
1618 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1619 stats->dot11RTSSuccessCount =
1620 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1621 }
1622 kfree(cmd);
1623
1624 return rc;
1625 }
1626
1627 /*
1628 * CMD_802_11_RADIO_CONTROL.
1629 */
1630 struct mwl8k_cmd_802_11_radio_control {
1631 struct mwl8k_cmd_pkt header;
1632 __le16 action;
1633 __le16 control;
1634 __le16 radio_on;
1635 } __attribute__((packed));
1636
1637 static int
1638 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1639 {
1640 struct mwl8k_priv *priv = hw->priv;
1641 struct mwl8k_cmd_802_11_radio_control *cmd;
1642 int rc;
1643
1644 if (enable == priv->radio_on && !force)
1645 return 0;
1646
1647 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1648 if (cmd == NULL)
1649 return -ENOMEM;
1650
1651 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1652 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1653 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1654 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1655 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1656
1657 rc = mwl8k_post_cmd(hw, &cmd->header);
1658 kfree(cmd);
1659
1660 if (!rc)
1661 priv->radio_on = enable;
1662
1663 return rc;
1664 }
1665
1666 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1667 {
1668 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1669 }
1670
1671 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1672 {
1673 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1674 }
1675
1676 static int
1677 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1678 {
1679 struct mwl8k_priv *priv;
1680
1681 if (hw == NULL || hw->priv == NULL)
1682 return -EINVAL;
1683 priv = hw->priv;
1684
1685 priv->radio_short_preamble = short_preamble;
1686
1687 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1688 }
1689
1690 /*
1691 * CMD_802_11_RF_TX_POWER.
1692 */
1693 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1694
1695 struct mwl8k_cmd_802_11_rf_tx_power {
1696 struct mwl8k_cmd_pkt header;
1697 __le16 action;
1698 __le16 support_level;
1699 __le16 current_level;
1700 __le16 reserved;
1701 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1702 } __attribute__((packed));
1703
1704 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1705 {
1706 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1707 int rc;
1708
1709 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1710 if (cmd == NULL)
1711 return -ENOMEM;
1712
1713 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1714 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1715 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1716 cmd->support_level = cpu_to_le16(dBm);
1717
1718 rc = mwl8k_post_cmd(hw, &cmd->header);
1719 kfree(cmd);
1720
1721 return rc;
1722 }
1723
1724 /*
1725 * CMD_SET_PRE_SCAN.
1726 */
1727 struct mwl8k_cmd_set_pre_scan {
1728 struct mwl8k_cmd_pkt header;
1729 } __attribute__((packed));
1730
1731 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1732 {
1733 struct mwl8k_cmd_set_pre_scan *cmd;
1734 int rc;
1735
1736 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1737 if (cmd == NULL)
1738 return -ENOMEM;
1739
1740 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1741 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1742
1743 rc = mwl8k_post_cmd(hw, &cmd->header);
1744 kfree(cmd);
1745
1746 return rc;
1747 }
1748
1749 /*
1750 * CMD_SET_POST_SCAN.
1751 */
1752 struct mwl8k_cmd_set_post_scan {
1753 struct mwl8k_cmd_pkt header;
1754 __le32 isibss;
1755 __u8 bssid[ETH_ALEN];
1756 } __attribute__((packed));
1757
1758 static int
1759 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1760 {
1761 struct mwl8k_cmd_set_post_scan *cmd;
1762 int rc;
1763
1764 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1765 if (cmd == NULL)
1766 return -ENOMEM;
1767
1768 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1769 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1770 cmd->isibss = 0;
1771 memcpy(cmd->bssid, mac, ETH_ALEN);
1772
1773 rc = mwl8k_post_cmd(hw, &cmd->header);
1774 kfree(cmd);
1775
1776 return rc;
1777 }
1778
1779 /*
1780 * CMD_SET_RF_CHANNEL.
1781 */
1782 struct mwl8k_cmd_set_rf_channel {
1783 struct mwl8k_cmd_pkt header;
1784 __le16 action;
1785 __u8 current_channel;
1786 __le32 channel_flags;
1787 } __attribute__((packed));
1788
1789 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1790 struct ieee80211_channel *channel)
1791 {
1792 struct mwl8k_cmd_set_rf_channel *cmd;
1793 int rc;
1794
1795 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1796 if (cmd == NULL)
1797 return -ENOMEM;
1798
1799 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1800 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1801 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1802 cmd->current_channel = channel->hw_value;
1803 if (channel->band == IEEE80211_BAND_2GHZ)
1804 cmd->channel_flags = cpu_to_le32(0x00000081);
1805 else
1806 cmd->channel_flags = cpu_to_le32(0x00000000);
1807
1808 rc = mwl8k_post_cmd(hw, &cmd->header);
1809 kfree(cmd);
1810
1811 return rc;
1812 }
1813
1814 /*
1815 * CMD_SET_SLOT.
1816 */
1817 struct mwl8k_cmd_set_slot {
1818 struct mwl8k_cmd_pkt header;
1819 __le16 action;
1820 __u8 short_slot;
1821 } __attribute__((packed));
1822
1823 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1824 {
1825 struct mwl8k_cmd_set_slot *cmd;
1826 int rc;
1827
1828 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1829 if (cmd == NULL)
1830 return -ENOMEM;
1831
1832 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1833 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1834 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1835 cmd->short_slot = short_slot_time;
1836
1837 rc = mwl8k_post_cmd(hw, &cmd->header);
1838 kfree(cmd);
1839
1840 return rc;
1841 }
1842
1843 /*
1844 * CMD_MIMO_CONFIG.
1845 */
1846 struct mwl8k_cmd_mimo_config {
1847 struct mwl8k_cmd_pkt header;
1848 __le32 action;
1849 __u8 rx_antenna_map;
1850 __u8 tx_antenna_map;
1851 } __attribute__((packed));
1852
1853 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1854 {
1855 struct mwl8k_cmd_mimo_config *cmd;
1856 int rc;
1857
1858 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1859 if (cmd == NULL)
1860 return -ENOMEM;
1861
1862 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1863 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1864 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1865 cmd->rx_antenna_map = rx;
1866 cmd->tx_antenna_map = tx;
1867
1868 rc = mwl8k_post_cmd(hw, &cmd->header);
1869 kfree(cmd);
1870
1871 return rc;
1872 }
1873
1874 /*
1875 * CMD_ENABLE_SNIFFER.
1876 */
1877 struct mwl8k_cmd_enable_sniffer {
1878 struct mwl8k_cmd_pkt header;
1879 __le32 action;
1880 } __attribute__((packed));
1881
1882 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1883 {
1884 struct mwl8k_cmd_enable_sniffer *cmd;
1885 int rc;
1886
1887 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1888 if (cmd == NULL)
1889 return -ENOMEM;
1890
1891 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1892 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1893 cmd->action = cpu_to_le32(!!enable);
1894
1895 rc = mwl8k_post_cmd(hw, &cmd->header);
1896 kfree(cmd);
1897
1898 return rc;
1899 }
1900
1901 /*
1902 * CMD_SET_MAC_ADDR.
1903 */
1904 struct mwl8k_cmd_set_mac_addr {
1905 struct mwl8k_cmd_pkt header;
1906 __u8 mac_addr[ETH_ALEN];
1907 } __attribute__((packed));
1908
1909 static int mwl8k_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
1910 {
1911 struct mwl8k_cmd_set_mac_addr *cmd;
1912 int rc;
1913
1914 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1915 if (cmd == NULL)
1916 return -ENOMEM;
1917
1918 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
1919 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1920 memcpy(cmd->mac_addr, mac, ETH_ALEN);
1921
1922 rc = mwl8k_post_cmd(hw, &cmd->header);
1923 kfree(cmd);
1924
1925 return rc;
1926 }
1927
1928
1929 /*
1930 * CMD_SET_RATEADAPT_MODE.
1931 */
1932 struct mwl8k_cmd_set_rate_adapt_mode {
1933 struct mwl8k_cmd_pkt header;
1934 __le16 action;
1935 __le16 mode;
1936 } __attribute__((packed));
1937
1938 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
1939 {
1940 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
1941 int rc;
1942
1943 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1944 if (cmd == NULL)
1945 return -ENOMEM;
1946
1947 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
1948 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1949 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1950 cmd->mode = cpu_to_le16(mode);
1951
1952 rc = mwl8k_post_cmd(hw, &cmd->header);
1953 kfree(cmd);
1954
1955 return rc;
1956 }
1957
1958 /*
1959 * CMD_SET_WMM_MODE.
1960 */
1961 struct mwl8k_cmd_set_wmm {
1962 struct mwl8k_cmd_pkt header;
1963 __le16 action;
1964 } __attribute__((packed));
1965
1966 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
1967 {
1968 struct mwl8k_priv *priv = hw->priv;
1969 struct mwl8k_cmd_set_wmm *cmd;
1970 int rc;
1971
1972 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1973 if (cmd == NULL)
1974 return -ENOMEM;
1975
1976 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
1977 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1978 cmd->action = cpu_to_le16(!!enable);
1979
1980 rc = mwl8k_post_cmd(hw, &cmd->header);
1981 kfree(cmd);
1982
1983 if (!rc)
1984 priv->wmm_enabled = enable;
1985
1986 return rc;
1987 }
1988
1989 /*
1990 * CMD_SET_RTS_THRESHOLD.
1991 */
1992 struct mwl8k_cmd_rts_threshold {
1993 struct mwl8k_cmd_pkt header;
1994 __le16 action;
1995 __le16 threshold;
1996 } __attribute__((packed));
1997
1998 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
1999 u16 action, u16 threshold)
2000 {
2001 struct mwl8k_cmd_rts_threshold *cmd;
2002 int rc;
2003
2004 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2005 if (cmd == NULL)
2006 return -ENOMEM;
2007
2008 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2009 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2010 cmd->action = cpu_to_le16(action);
2011 cmd->threshold = cpu_to_le16(threshold);
2012
2013 rc = mwl8k_post_cmd(hw, &cmd->header);
2014 kfree(cmd);
2015
2016 return rc;
2017 }
2018
2019 /*
2020 * CMD_SET_EDCA_PARAMS.
2021 */
2022 struct mwl8k_cmd_set_edca_params {
2023 struct mwl8k_cmd_pkt header;
2024
2025 /* See MWL8K_SET_EDCA_XXX below */
2026 __le16 action;
2027
2028 /* TX opportunity in units of 32 us */
2029 __le16 txop;
2030
2031 /* Log exponent of max contention period: 0...15*/
2032 __u8 log_cw_max;
2033
2034 /* Log exponent of min contention period: 0...15 */
2035 __u8 log_cw_min;
2036
2037 /* Adaptive interframe spacing in units of 32us */
2038 __u8 aifs;
2039
2040 /* TX queue to configure */
2041 __u8 txq;
2042 } __attribute__((packed));
2043
2044 #define MWL8K_SET_EDCA_CW 0x01
2045 #define MWL8K_SET_EDCA_TXOP 0x02
2046 #define MWL8K_SET_EDCA_AIFS 0x04
2047
2048 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2049 MWL8K_SET_EDCA_TXOP | \
2050 MWL8K_SET_EDCA_AIFS)
2051
2052 static int
2053 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2054 __u16 cw_min, __u16 cw_max,
2055 __u8 aifs, __u16 txop)
2056 {
2057 struct mwl8k_cmd_set_edca_params *cmd;
2058 int rc;
2059
2060 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2061 if (cmd == NULL)
2062 return -ENOMEM;
2063
2064 /*
2065 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2066 * this call.
2067 */
2068 qnum ^= !(qnum >> 1);
2069
2070 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2071 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2072 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2073 cmd->txop = cpu_to_le16(txop);
2074 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
2075 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2076 cmd->aifs = aifs;
2077 cmd->txq = qnum;
2078
2079 rc = mwl8k_post_cmd(hw, &cmd->header);
2080 kfree(cmd);
2081
2082 return rc;
2083 }
2084
2085 /*
2086 * CMD_FINALIZE_JOIN.
2087 */
2088
2089 /* FJ beacon buffer size is compiled into the firmware. */
2090 #define MWL8K_FJ_BEACON_MAXLEN 128
2091
2092 struct mwl8k_cmd_finalize_join {
2093 struct mwl8k_cmd_pkt header;
2094 __le32 sleep_interval; /* Number of beacon periods to sleep */
2095 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2096 } __attribute__((packed));
2097
2098 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2099 __u16 framelen, __u16 dtim)
2100 {
2101 struct mwl8k_cmd_finalize_join *cmd;
2102 struct ieee80211_mgmt *payload = frame;
2103 u16 hdrlen;
2104 u32 payload_len;
2105 int rc;
2106
2107 if (frame == NULL)
2108 return -EINVAL;
2109
2110 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2111 if (cmd == NULL)
2112 return -ENOMEM;
2113
2114 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2115 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2116 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2117
2118 hdrlen = ieee80211_hdrlen(payload->frame_control);
2119
2120 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2121
2122 /* XXX TBD Might just have to abort and return an error */
2123 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2124 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2125 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2126 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2127
2128 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2129 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2130
2131 if (payload && payload_len)
2132 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2133
2134 rc = mwl8k_post_cmd(hw, &cmd->header);
2135 kfree(cmd);
2136 return rc;
2137 }
2138
2139 /*
2140 * CMD_UPDATE_STADB.
2141 */
2142 struct mwl8k_cmd_update_sta_db {
2143 struct mwl8k_cmd_pkt header;
2144
2145 /* See STADB_ACTION_TYPE */
2146 __le32 action;
2147
2148 /* Peer MAC address */
2149 __u8 peer_addr[ETH_ALEN];
2150
2151 __le32 reserved;
2152
2153 /* Peer info - valid during add/update. */
2154 struct peer_capability_info peer_info;
2155 } __attribute__((packed));
2156
2157 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2158 struct ieee80211_vif *vif, __u32 action)
2159 {
2160 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2161 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2162 struct mwl8k_cmd_update_sta_db *cmd;
2163 struct peer_capability_info *peer_info;
2164 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2165 int rc;
2166 __u8 count, *rates;
2167
2168 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2169 if (cmd == NULL)
2170 return -ENOMEM;
2171
2172 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2173 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2174
2175 cmd->action = cpu_to_le32(action);
2176 peer_info = &cmd->peer_info;
2177 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2178
2179 switch (action) {
2180 case MWL8K_STA_DB_ADD_ENTRY:
2181 case MWL8K_STA_DB_MODIFY_ENTRY:
2182 /* Build peer_info block */
2183 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2184 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2185 peer_info->interop = 1;
2186 peer_info->amsdu_enabled = 0;
2187
2188 rates = peer_info->legacy_rates;
2189 for (count = 0; count < mv_vif->legacy_nrates; count++)
2190 rates[count] = bitrates[count].hw_value;
2191
2192 rc = mwl8k_post_cmd(hw, &cmd->header);
2193 if (rc == 0)
2194 mv_vif->peer_id = peer_info->station_id;
2195
2196 break;
2197
2198 case MWL8K_STA_DB_DEL_ENTRY:
2199 case MWL8K_STA_DB_FLUSH:
2200 default:
2201 rc = mwl8k_post_cmd(hw, &cmd->header);
2202 if (rc == 0)
2203 mv_vif->peer_id = 0;
2204 break;
2205 }
2206 kfree(cmd);
2207
2208 return rc;
2209 }
2210
2211 /*
2212 * CMD_SET_AID.
2213 */
2214 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2215
2216 #define MWL8K_FRAME_PROT_DISABLED 0x00
2217 #define MWL8K_FRAME_PROT_11G 0x07
2218 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2219 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2220
2221 struct mwl8k_cmd_update_set_aid {
2222 struct mwl8k_cmd_pkt header;
2223 __le16 aid;
2224
2225 /* AP's MAC address (BSSID) */
2226 __u8 bssid[ETH_ALEN];
2227 __le16 protection_mode;
2228 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2229 } __attribute__((packed));
2230
2231 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2232 struct ieee80211_vif *vif)
2233 {
2234 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2235 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2236 struct mwl8k_cmd_update_set_aid *cmd;
2237 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2238 int count;
2239 u16 prot_mode;
2240 int rc;
2241
2242 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2243 if (cmd == NULL)
2244 return -ENOMEM;
2245
2246 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2247 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2248 cmd->aid = cpu_to_le16(info->aid);
2249
2250 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2251
2252 if (info->use_cts_prot) {
2253 prot_mode = MWL8K_FRAME_PROT_11G;
2254 } else {
2255 switch (info->ht_operation_mode &
2256 IEEE80211_HT_OP_MODE_PROTECTION) {
2257 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2258 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2259 break;
2260 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2261 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2262 break;
2263 default:
2264 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2265 break;
2266 }
2267 }
2268 cmd->protection_mode = cpu_to_le16(prot_mode);
2269
2270 for (count = 0; count < mv_vif->legacy_nrates; count++)
2271 cmd->supp_rates[count] = bitrates[count].hw_value;
2272
2273 rc = mwl8k_post_cmd(hw, &cmd->header);
2274 kfree(cmd);
2275
2276 return rc;
2277 }
2278
2279 /*
2280 * CMD_SET_RATE.
2281 */
2282 struct mwl8k_cmd_update_rateset {
2283 struct mwl8k_cmd_pkt header;
2284 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2285
2286 /* Bitmap for supported MCS codes. */
2287 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2288 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2289 } __attribute__((packed));
2290
2291 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2292 struct ieee80211_vif *vif)
2293 {
2294 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2295 struct mwl8k_cmd_update_rateset *cmd;
2296 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2297 int count;
2298 int rc;
2299
2300 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2301 if (cmd == NULL)
2302 return -ENOMEM;
2303
2304 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2305 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2306
2307 for (count = 0; count < mv_vif->legacy_nrates; count++)
2308 cmd->legacy_rates[count] = bitrates[count].hw_value;
2309
2310 rc = mwl8k_post_cmd(hw, &cmd->header);
2311 kfree(cmd);
2312
2313 return rc;
2314 }
2315
2316 /*
2317 * CMD_USE_FIXED_RATE.
2318 */
2319 #define MWL8K_RATE_TABLE_SIZE 8
2320 #define MWL8K_UCAST_RATE 0
2321 #define MWL8K_USE_AUTO_RATE 0x0002
2322
2323 struct mwl8k_rate_entry {
2324 /* Set to 1 if HT rate, 0 if legacy. */
2325 __le32 is_ht_rate;
2326
2327 /* Set to 1 to use retry_count field. */
2328 __le32 enable_retry;
2329
2330 /* Specified legacy rate or MCS. */
2331 __le32 rate;
2332
2333 /* Number of allowed retries. */
2334 __le32 retry_count;
2335 } __attribute__((packed));
2336
2337 struct mwl8k_rate_table {
2338 /* 1 to allow specified rate and below */
2339 __le32 allow_rate_drop;
2340 __le32 num_rates;
2341 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2342 } __attribute__((packed));
2343
2344 struct mwl8k_cmd_use_fixed_rate {
2345 struct mwl8k_cmd_pkt header;
2346 __le32 action;
2347 struct mwl8k_rate_table rate_table;
2348
2349 /* Unicast, Broadcast or Multicast */
2350 __le32 rate_type;
2351 __le32 reserved1;
2352 __le32 reserved2;
2353 } __attribute__((packed));
2354
2355 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2356 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2357 {
2358 struct mwl8k_cmd_use_fixed_rate *cmd;
2359 int count;
2360 int rc;
2361
2362 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2363 if (cmd == NULL)
2364 return -ENOMEM;
2365
2366 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2367 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2368
2369 cmd->action = cpu_to_le32(action);
2370 cmd->rate_type = cpu_to_le32(rate_type);
2371
2372 if (rate_table != NULL) {
2373 /*
2374 * Copy over each field manually so that endian
2375 * conversion can be done.
2376 */
2377 cmd->rate_table.allow_rate_drop =
2378 cpu_to_le32(rate_table->allow_rate_drop);
2379 cmd->rate_table.num_rates =
2380 cpu_to_le32(rate_table->num_rates);
2381
2382 for (count = 0; count < rate_table->num_rates; count++) {
2383 struct mwl8k_rate_entry *dst =
2384 &cmd->rate_table.rate_entry[count];
2385 struct mwl8k_rate_entry *src =
2386 &rate_table->rate_entry[count];
2387
2388 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2389 dst->enable_retry = cpu_to_le32(src->enable_retry);
2390 dst->rate = cpu_to_le32(src->rate);
2391 dst->retry_count = cpu_to_le32(src->retry_count);
2392 }
2393 }
2394
2395 rc = mwl8k_post_cmd(hw, &cmd->header);
2396 kfree(cmd);
2397
2398 return rc;
2399 }
2400
2401
2402 /*
2403 * Interrupt handling.
2404 */
2405 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2406 {
2407 struct ieee80211_hw *hw = dev_id;
2408 struct mwl8k_priv *priv = hw->priv;
2409 u32 status;
2410
2411 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2412 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2413
2414 if (!status)
2415 return IRQ_NONE;
2416
2417 if (status & MWL8K_A2H_INT_TX_DONE)
2418 tasklet_schedule(&priv->tx_reclaim_task);
2419
2420 if (status & MWL8K_A2H_INT_RX_READY) {
2421 while (rxq_process(hw, 0, 1))
2422 rxq_refill(hw, 0, 1);
2423 }
2424
2425 if (status & MWL8K_A2H_INT_OPC_DONE) {
2426 if (priv->hostcmd_wait != NULL)
2427 complete(priv->hostcmd_wait);
2428 }
2429
2430 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2431 if (!mutex_is_locked(&priv->fw_mutex) &&
2432 priv->radio_on && priv->pending_tx_pkts)
2433 mwl8k_tx_start(priv);
2434 }
2435
2436 return IRQ_HANDLED;
2437 }
2438
2439
2440 /*
2441 * Core driver operations.
2442 */
2443 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2444 {
2445 struct mwl8k_priv *priv = hw->priv;
2446 int index = skb_get_queue_mapping(skb);
2447 int rc;
2448
2449 if (priv->current_channel == NULL) {
2450 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2451 "disabled\n", wiphy_name(hw->wiphy));
2452 dev_kfree_skb(skb);
2453 return NETDEV_TX_OK;
2454 }
2455
2456 rc = mwl8k_txq_xmit(hw, index, skb);
2457
2458 return rc;
2459 }
2460
2461 static int mwl8k_start(struct ieee80211_hw *hw)
2462 {
2463 struct mwl8k_priv *priv = hw->priv;
2464 int rc;
2465
2466 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2467 IRQF_SHARED, MWL8K_NAME, hw);
2468 if (rc) {
2469 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2470 wiphy_name(hw->wiphy));
2471 return -EIO;
2472 }
2473
2474 /* Enable tx reclaim tasklet */
2475 tasklet_enable(&priv->tx_reclaim_task);
2476
2477 /* Enable interrupts */
2478 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2479
2480 rc = mwl8k_fw_lock(hw);
2481 if (!rc) {
2482 rc = mwl8k_cmd_802_11_radio_enable(hw);
2483
2484 if (!rc)
2485 rc = mwl8k_cmd_set_pre_scan(hw);
2486
2487 if (!rc)
2488 rc = mwl8k_cmd_set_post_scan(hw,
2489 "\x00\x00\x00\x00\x00\x00");
2490
2491 if (!rc)
2492 rc = mwl8k_cmd_setrateadaptmode(hw, 0);
2493
2494 if (!rc)
2495 rc = mwl8k_set_wmm(hw, 0);
2496
2497 if (!rc)
2498 rc = mwl8k_enable_sniffer(hw, 0);
2499
2500 mwl8k_fw_unlock(hw);
2501 }
2502
2503 if (rc) {
2504 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2505 free_irq(priv->pdev->irq, hw);
2506 tasklet_disable(&priv->tx_reclaim_task);
2507 }
2508
2509 return rc;
2510 }
2511
2512 static void mwl8k_stop(struct ieee80211_hw *hw)
2513 {
2514 struct mwl8k_priv *priv = hw->priv;
2515 int i;
2516
2517 mwl8k_cmd_802_11_radio_disable(hw);
2518
2519 ieee80211_stop_queues(hw);
2520
2521 /* Disable interrupts */
2522 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2523 free_irq(priv->pdev->irq, hw);
2524
2525 /* Stop finalize join worker */
2526 cancel_work_sync(&priv->finalize_join_worker);
2527 if (priv->beacon_skb != NULL)
2528 dev_kfree_skb(priv->beacon_skb);
2529
2530 /* Stop tx reclaim tasklet */
2531 tasklet_disable(&priv->tx_reclaim_task);
2532
2533 /* Return all skbs to mac80211 */
2534 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2535 mwl8k_txq_reclaim(hw, i, 1);
2536 }
2537
2538 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2539 struct ieee80211_if_init_conf *conf)
2540 {
2541 struct mwl8k_priv *priv = hw->priv;
2542 struct mwl8k_vif *mwl8k_vif;
2543
2544 /*
2545 * We only support one active interface at a time.
2546 */
2547 if (priv->vif != NULL)
2548 return -EBUSY;
2549
2550 /*
2551 * We only support managed interfaces for now.
2552 */
2553 if (conf->type != NL80211_IFTYPE_STATION)
2554 return -EINVAL;
2555
2556 /*
2557 * Reject interface creation if sniffer mode is active, as
2558 * STA operation is mutually exclusive with hardware sniffer
2559 * mode.
2560 */
2561 if (priv->sniffer_enabled) {
2562 printk(KERN_INFO "%s: unable to create STA "
2563 "interface due to sniffer mode being enabled\n",
2564 wiphy_name(hw->wiphy));
2565 return -EINVAL;
2566 }
2567
2568 /* Clean out driver private area */
2569 mwl8k_vif = MWL8K_VIF(conf->vif);
2570 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2571
2572 /* Set and save the mac address */
2573 mwl8k_set_mac_addr(hw, conf->mac_addr);
2574 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2575
2576 /* Back pointer to parent config block */
2577 mwl8k_vif->priv = priv;
2578
2579 /* Setup initial PHY parameters */
2580 memcpy(mwl8k_vif->legacy_rates,
2581 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2582 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2583
2584 /* Set Initial sequence number to zero */
2585 mwl8k_vif->seqno = 0;
2586
2587 priv->vif = conf->vif;
2588 priv->current_channel = NULL;
2589
2590 return 0;
2591 }
2592
2593 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2594 struct ieee80211_if_init_conf *conf)
2595 {
2596 struct mwl8k_priv *priv = hw->priv;
2597
2598 if (priv->vif == NULL)
2599 return;
2600
2601 mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2602
2603 priv->vif = NULL;
2604 }
2605
2606 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2607 {
2608 struct ieee80211_conf *conf = &hw->conf;
2609 struct mwl8k_priv *priv = hw->priv;
2610 int rc;
2611
2612 if (conf->flags & IEEE80211_CONF_IDLE) {
2613 mwl8k_cmd_802_11_radio_disable(hw);
2614 priv->current_channel = NULL;
2615 return 0;
2616 }
2617
2618 rc = mwl8k_fw_lock(hw);
2619 if (rc)
2620 return rc;
2621
2622 rc = mwl8k_cmd_802_11_radio_enable(hw);
2623 if (rc)
2624 goto out;
2625
2626 rc = mwl8k_cmd_set_rf_channel(hw, conf->channel);
2627 if (rc)
2628 goto out;
2629
2630 priv->current_channel = conf->channel;
2631
2632 if (conf->power_level > 18)
2633 conf->power_level = 18;
2634 rc = mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level);
2635 if (rc)
2636 goto out;
2637
2638 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2639 rc = -EINVAL;
2640
2641 out:
2642 mwl8k_fw_unlock(hw);
2643
2644 return rc;
2645 }
2646
2647 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2648 struct ieee80211_vif *vif,
2649 struct ieee80211_bss_conf *info,
2650 u32 changed)
2651 {
2652 struct mwl8k_priv *priv = hw->priv;
2653 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2654 int rc;
2655
2656 if (changed & BSS_CHANGED_BSSID)
2657 memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN);
2658
2659 if ((changed & BSS_CHANGED_ASSOC) == 0)
2660 return;
2661
2662 priv->capture_beacon = false;
2663
2664 rc = mwl8k_fw_lock(hw);
2665 if (rc)
2666 return;
2667
2668 if (info->assoc) {
2669 memcpy(&mwl8k_vif->bss_info, info,
2670 sizeof(struct ieee80211_bss_conf));
2671
2672 /* Install rates */
2673 rc = mwl8k_update_rateset(hw, vif);
2674 if (rc)
2675 goto out;
2676
2677 /* Turn on rate adaptation */
2678 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2679 MWL8K_UCAST_RATE, NULL);
2680 if (rc)
2681 goto out;
2682
2683 /* Set radio preamble */
2684 rc = mwl8k_set_radio_preamble(hw, info->use_short_preamble);
2685 if (rc)
2686 goto out;
2687
2688 /* Set slot time */
2689 rc = mwl8k_cmd_set_slot(hw, info->use_short_slot);
2690 if (rc)
2691 goto out;
2692
2693 /* Update peer rate info */
2694 rc = mwl8k_cmd_update_sta_db(hw, vif,
2695 MWL8K_STA_DB_MODIFY_ENTRY);
2696 if (rc)
2697 goto out;
2698
2699 /* Set AID */
2700 rc = mwl8k_cmd_set_aid(hw, vif);
2701 if (rc)
2702 goto out;
2703
2704 /*
2705 * Finalize the join. Tell rx handler to process
2706 * next beacon from our BSSID.
2707 */
2708 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
2709 priv->capture_beacon = true;
2710 } else {
2711 rc = mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2712 memset(&mwl8k_vif->bss_info, 0,
2713 sizeof(struct ieee80211_bss_conf));
2714 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2715 }
2716
2717 out:
2718 mwl8k_fw_unlock(hw);
2719 }
2720
2721 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
2722 int mc_count, struct dev_addr_list *mclist)
2723 {
2724 struct mwl8k_cmd_pkt *cmd;
2725
2726 /*
2727 * Synthesize and return a command packet that programs the
2728 * hardware multicast address filter. At this point we don't
2729 * know whether FIF_ALLMULTI is being requested, but if it is,
2730 * we'll end up throwing this packet away and creating a new
2731 * one in mwl8k_configure_filter().
2732 */
2733 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
2734
2735 return (unsigned long)cmd;
2736 }
2737
2738 static int
2739 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
2740 unsigned int changed_flags,
2741 unsigned int *total_flags)
2742 {
2743 struct mwl8k_priv *priv = hw->priv;
2744
2745 /*
2746 * Hardware sniffer mode is mutually exclusive with STA
2747 * operation, so refuse to enable sniffer mode if a STA
2748 * interface is active.
2749 */
2750 if (priv->vif != NULL) {
2751 if (net_ratelimit())
2752 printk(KERN_INFO "%s: not enabling sniffer "
2753 "mode because STA interface is active\n",
2754 wiphy_name(hw->wiphy));
2755 return 0;
2756 }
2757
2758 if (!priv->sniffer_enabled) {
2759 if (mwl8k_enable_sniffer(hw, 1))
2760 return 0;
2761 priv->sniffer_enabled = true;
2762 }
2763
2764 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
2765 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
2766 FIF_OTHER_BSS;
2767
2768 return 1;
2769 }
2770
2771 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
2772 unsigned int changed_flags,
2773 unsigned int *total_flags,
2774 u64 multicast)
2775 {
2776 struct mwl8k_priv *priv = hw->priv;
2777 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
2778
2779 /*
2780 * Enable hardware sniffer mode if FIF_CONTROL or
2781 * FIF_OTHER_BSS is requested.
2782 */
2783 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
2784 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
2785 kfree(cmd);
2786 return;
2787 }
2788
2789 /* Clear unsupported feature flags */
2790 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
2791
2792 if (mwl8k_fw_lock(hw))
2793 return;
2794
2795 if (priv->sniffer_enabled) {
2796 mwl8k_enable_sniffer(hw, 0);
2797 priv->sniffer_enabled = false;
2798 }
2799
2800 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2801 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
2802 /*
2803 * Disable the BSS filter.
2804 */
2805 mwl8k_cmd_set_pre_scan(hw);
2806 } else {
2807 u8 *bssid;
2808
2809 /*
2810 * Enable the BSS filter.
2811 *
2812 * If there is an active STA interface, use that
2813 * interface's BSSID, otherwise use a dummy one
2814 * (where the OUI part needs to be nonzero for
2815 * the BSSID to be accepted by POST_SCAN).
2816 */
2817 bssid = "\x01\x00\x00\x00\x00\x00";
2818 if (priv->vif != NULL)
2819 bssid = MWL8K_VIF(priv->vif)->bssid;
2820
2821 mwl8k_cmd_set_post_scan(hw, bssid);
2822 }
2823 }
2824
2825 /*
2826 * If FIF_ALLMULTI is being requested, throw away the command
2827 * packet that ->prepare_multicast() built and replace it with
2828 * a command packet that enables reception of all multicast
2829 * packets.
2830 */
2831 if (*total_flags & FIF_ALLMULTI) {
2832 kfree(cmd);
2833 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
2834 }
2835
2836 if (cmd != NULL) {
2837 mwl8k_post_cmd(hw, cmd);
2838 kfree(cmd);
2839 }
2840
2841 mwl8k_fw_unlock(hw);
2842 }
2843
2844 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2845 {
2846 return mwl8k_rts_threshold(hw, MWL8K_CMD_SET, value);
2847 }
2848
2849 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2850 const struct ieee80211_tx_queue_params *params)
2851 {
2852 struct mwl8k_priv *priv = hw->priv;
2853 int rc;
2854
2855 rc = mwl8k_fw_lock(hw);
2856 if (!rc) {
2857 if (!priv->wmm_enabled)
2858 rc = mwl8k_set_wmm(hw, 1);
2859
2860 if (!rc)
2861 rc = mwl8k_set_edca_params(hw, queue,
2862 params->cw_min,
2863 params->cw_max,
2864 params->aifs,
2865 params->txop);
2866
2867 mwl8k_fw_unlock(hw);
2868 }
2869
2870 return rc;
2871 }
2872
2873 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
2874 struct ieee80211_tx_queue_stats *stats)
2875 {
2876 struct mwl8k_priv *priv = hw->priv;
2877 struct mwl8k_tx_queue *txq;
2878 int index;
2879
2880 spin_lock_bh(&priv->tx_lock);
2881 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
2882 txq = priv->txq + index;
2883 memcpy(&stats[index], &txq->stats,
2884 sizeof(struct ieee80211_tx_queue_stats));
2885 }
2886 spin_unlock_bh(&priv->tx_lock);
2887
2888 return 0;
2889 }
2890
2891 static int mwl8k_get_stats(struct ieee80211_hw *hw,
2892 struct ieee80211_low_level_stats *stats)
2893 {
2894 return mwl8k_cmd_802_11_get_stat(hw, stats);
2895 }
2896
2897 static const struct ieee80211_ops mwl8k_ops = {
2898 .tx = mwl8k_tx,
2899 .start = mwl8k_start,
2900 .stop = mwl8k_stop,
2901 .add_interface = mwl8k_add_interface,
2902 .remove_interface = mwl8k_remove_interface,
2903 .config = mwl8k_config,
2904 .bss_info_changed = mwl8k_bss_info_changed,
2905 .prepare_multicast = mwl8k_prepare_multicast,
2906 .configure_filter = mwl8k_configure_filter,
2907 .set_rts_threshold = mwl8k_set_rts_threshold,
2908 .conf_tx = mwl8k_conf_tx,
2909 .get_tx_stats = mwl8k_get_tx_stats,
2910 .get_stats = mwl8k_get_stats,
2911 };
2912
2913 static void mwl8k_tx_reclaim_handler(unsigned long data)
2914 {
2915 int i;
2916 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
2917 struct mwl8k_priv *priv = hw->priv;
2918
2919 spin_lock_bh(&priv->tx_lock);
2920 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2921 mwl8k_txq_reclaim(hw, i, 0);
2922
2923 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
2924 complete(priv->tx_wait);
2925 priv->tx_wait = NULL;
2926 }
2927 spin_unlock_bh(&priv->tx_lock);
2928 }
2929
2930 static void mwl8k_finalize_join_worker(struct work_struct *work)
2931 {
2932 struct mwl8k_priv *priv =
2933 container_of(work, struct mwl8k_priv, finalize_join_worker);
2934 struct sk_buff *skb = priv->beacon_skb;
2935 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
2936
2937 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
2938 dev_kfree_skb(skb);
2939
2940 priv->beacon_skb = NULL;
2941 }
2942
2943 static int __devinit mwl8k_probe(struct pci_dev *pdev,
2944 const struct pci_device_id *id)
2945 {
2946 static int printed_version = 0;
2947 struct ieee80211_hw *hw;
2948 struct mwl8k_priv *priv;
2949 int rc;
2950 int i;
2951
2952 if (!printed_version) {
2953 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
2954 printed_version = 1;
2955 }
2956
2957 rc = pci_enable_device(pdev);
2958 if (rc) {
2959 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
2960 MWL8K_NAME);
2961 return rc;
2962 }
2963
2964 rc = pci_request_regions(pdev, MWL8K_NAME);
2965 if (rc) {
2966 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
2967 MWL8K_NAME);
2968 return rc;
2969 }
2970
2971 pci_set_master(pdev);
2972
2973 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
2974 if (hw == NULL) {
2975 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
2976 rc = -ENOMEM;
2977 goto err_free_reg;
2978 }
2979
2980 priv = hw->priv;
2981 priv->hw = hw;
2982 priv->pdev = pdev;
2983 priv->sniffer_enabled = false;
2984 priv->wmm_enabled = false;
2985 priv->pending_tx_pkts = 0;
2986
2987 SET_IEEE80211_DEV(hw, &pdev->dev);
2988 pci_set_drvdata(pdev, hw);
2989
2990 priv->regs = pci_iomap(pdev, 1, 0x10000);
2991 if (priv->regs == NULL) {
2992 printk(KERN_ERR "%s: Cannot map device memory\n",
2993 wiphy_name(hw->wiphy));
2994 goto err_iounmap;
2995 }
2996
2997 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
2998 priv->band.band = IEEE80211_BAND_2GHZ;
2999 priv->band.channels = priv->channels;
3000 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3001 priv->band.bitrates = priv->rates;
3002 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3003 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3004
3005 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3006 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3007
3008 /*
3009 * Extra headroom is the size of the required DMA header
3010 * minus the size of the smallest 802.11 frame (CTS frame).
3011 */
3012 hw->extra_tx_headroom =
3013 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3014
3015 hw->channel_change_time = 10;
3016
3017 hw->queues = MWL8K_TX_QUEUES;
3018
3019 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3020
3021 /* Set rssi and noise values to dBm */
3022 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3023 hw->vif_data_size = sizeof(struct mwl8k_vif);
3024 priv->vif = NULL;
3025
3026 /* Set default radio state and preamble */
3027 priv->radio_on = 0;
3028 priv->radio_short_preamble = 0;
3029
3030 /* Finalize join worker */
3031 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3032
3033 /* TX reclaim tasklet */
3034 tasklet_init(&priv->tx_reclaim_task,
3035 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3036 tasklet_disable(&priv->tx_reclaim_task);
3037
3038 /* Power management cookie */
3039 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3040 if (priv->cookie == NULL)
3041 goto err_iounmap;
3042
3043 rc = mwl8k_rxq_init(hw, 0);
3044 if (rc)
3045 goto err_iounmap;
3046 rxq_refill(hw, 0, INT_MAX);
3047
3048 mutex_init(&priv->fw_mutex);
3049 priv->fw_mutex_owner = NULL;
3050 priv->fw_mutex_depth = 0;
3051 priv->hostcmd_wait = NULL;
3052
3053 spin_lock_init(&priv->tx_lock);
3054
3055 priv->tx_wait = NULL;
3056
3057 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3058 rc = mwl8k_txq_init(hw, i);
3059 if (rc)
3060 goto err_free_queues;
3061 }
3062
3063 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3064 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3065 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3066 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3067
3068 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3069 IRQF_SHARED, MWL8K_NAME, hw);
3070 if (rc) {
3071 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3072 wiphy_name(hw->wiphy));
3073 goto err_free_queues;
3074 }
3075
3076 /* Reset firmware and hardware */
3077 mwl8k_hw_reset(priv);
3078
3079 /* Ask userland hotplug daemon for the device firmware */
3080 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3081 if (rc) {
3082 printk(KERN_ERR "%s: Firmware files not found\n",
3083 wiphy_name(hw->wiphy));
3084 goto err_free_irq;
3085 }
3086
3087 /* Load firmware into hardware */
3088 rc = mwl8k_load_firmware(hw);
3089 if (rc) {
3090 printk(KERN_ERR "%s: Cannot start firmware\n",
3091 wiphy_name(hw->wiphy));
3092 goto err_stop_firmware;
3093 }
3094
3095 /* Reclaim memory once firmware is successfully loaded */
3096 mwl8k_release_firmware(priv);
3097
3098 /*
3099 * Temporarily enable interrupts. Initial firmware host
3100 * commands use interrupts and avoids polling. Disable
3101 * interrupts when done.
3102 */
3103 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3104
3105 /* Get config data, mac addrs etc */
3106 rc = mwl8k_cmd_get_hw_spec(hw);
3107 if (rc) {
3108 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3109 wiphy_name(hw->wiphy));
3110 goto err_stop_firmware;
3111 }
3112
3113 /* Turn radio off */
3114 rc = mwl8k_cmd_802_11_radio_disable(hw);
3115 if (rc) {
3116 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3117 goto err_stop_firmware;
3118 }
3119
3120 /* Clear MAC address */
3121 rc = mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3122 if (rc) {
3123 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3124 wiphy_name(hw->wiphy));
3125 goto err_stop_firmware;
3126 }
3127
3128 /* Disable interrupts */
3129 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3130 free_irq(priv->pdev->irq, hw);
3131
3132 rc = ieee80211_register_hw(hw);
3133 if (rc) {
3134 printk(KERN_ERR "%s: Cannot register device\n",
3135 wiphy_name(hw->wiphy));
3136 goto err_stop_firmware;
3137 }
3138
3139 printk(KERN_INFO "%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
3140 wiphy_name(hw->wiphy), priv->part_num, priv->hw_rev,
3141 hw->wiphy->perm_addr,
3142 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3143 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3144
3145 return 0;
3146
3147 err_stop_firmware:
3148 mwl8k_hw_reset(priv);
3149 mwl8k_release_firmware(priv);
3150
3151 err_free_irq:
3152 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3153 free_irq(priv->pdev->irq, hw);
3154
3155 err_free_queues:
3156 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3157 mwl8k_txq_deinit(hw, i);
3158 mwl8k_rxq_deinit(hw, 0);
3159
3160 err_iounmap:
3161 if (priv->cookie != NULL)
3162 pci_free_consistent(priv->pdev, 4,
3163 priv->cookie, priv->cookie_dma);
3164
3165 if (priv->regs != NULL)
3166 pci_iounmap(pdev, priv->regs);
3167
3168 pci_set_drvdata(pdev, NULL);
3169 ieee80211_free_hw(hw);
3170
3171 err_free_reg:
3172 pci_release_regions(pdev);
3173 pci_disable_device(pdev);
3174
3175 return rc;
3176 }
3177
3178 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3179 {
3180 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3181 }
3182
3183 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3184 {
3185 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3186 struct mwl8k_priv *priv;
3187 int i;
3188
3189 if (hw == NULL)
3190 return;
3191 priv = hw->priv;
3192
3193 ieee80211_stop_queues(hw);
3194
3195 ieee80211_unregister_hw(hw);
3196
3197 /* Remove tx reclaim tasklet */
3198 tasklet_kill(&priv->tx_reclaim_task);
3199
3200 /* Stop hardware */
3201 mwl8k_hw_reset(priv);
3202
3203 /* Return all skbs to mac80211 */
3204 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3205 mwl8k_txq_reclaim(hw, i, 1);
3206
3207 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3208 mwl8k_txq_deinit(hw, i);
3209
3210 mwl8k_rxq_deinit(hw, 0);
3211
3212 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3213
3214 pci_iounmap(pdev, priv->regs);
3215 pci_set_drvdata(pdev, NULL);
3216 ieee80211_free_hw(hw);
3217 pci_release_regions(pdev);
3218 pci_disable_device(pdev);
3219 }
3220
3221 static struct pci_driver mwl8k_driver = {
3222 .name = MWL8K_NAME,
3223 .id_table = mwl8k_table,
3224 .probe = mwl8k_probe,
3225 .remove = __devexit_p(mwl8k_remove),
3226 .shutdown = __devexit_p(mwl8k_shutdown),
3227 };
3228
3229 static int __init mwl8k_init(void)
3230 {
3231 return pci_register_driver(&mwl8k_driver);
3232 }
3233
3234 static void __exit mwl8k_exit(void)
3235 {
3236 pci_unregister_driver(&mwl8k_driver);
3237 }
3238
3239 module_init(mwl8k_init);
3240 module_exit(mwl8k_exit);
3241
3242 MODULE_DESCRIPTION(MWL8K_DESC);
3243 MODULE_VERSION(MWL8K_VERSION);
3244 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3245 MODULE_LICENSE("GPL");
Motorola kernel-slsi