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mwl8k: remove MWL8K_RADIO_* defines
[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
25
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.9.1"
29
30 MODULE_DESCRIPTION(MWL8K_DESC);
31 MODULE_VERSION(MWL8K_VERSION);
32 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
33 MODULE_LICENSE("GPL");
34
35 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
36 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
37 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
38 { }
39 };
40 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41
42 /* Register definitions */
43 #define MWL8K_HIU_GEN_PTR 0x00000c10
44 #define MWL8K_MODE_STA 0x0000005a
45 #define MWL8K_MODE_AP 0x000000a5
46 #define MWL8K_HIU_INT_CODE 0x00000c14
47 #define MWL8K_FWSTA_READY 0xf0f1f2f4
48 #define MWL8K_FWAP_READY 0xf1f2f4a5
49 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
50 #define MWL8K_HIU_SCRATCH 0x00000c40
51
52 /* Host->device communications */
53 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
54 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
55 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
56 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
57 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
58 #define MWL8K_H2A_INT_DUMMY (1 << 20)
59 #define MWL8K_H2A_INT_RESET (1 << 15)
60 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
61 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
62
63 /* Device->host communications */
64 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
65 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
66 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
67 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
68 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
69 #define MWL8K_A2H_INT_DUMMY (1 << 20)
70 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
71 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
72 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
73 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
74 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
75 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
76 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
77 #define MWL8K_A2H_INT_RX_READY (1 << 1)
78 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
79
80 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
81 MWL8K_A2H_INT_CHNL_SWITCHED | \
82 MWL8K_A2H_INT_QUEUE_EMPTY | \
83 MWL8K_A2H_INT_RADAR_DETECT | \
84 MWL8K_A2H_INT_RADIO_ON | \
85 MWL8K_A2H_INT_RADIO_OFF | \
86 MWL8K_A2H_INT_MAC_EVENT | \
87 MWL8K_A2H_INT_OPC_DONE | \
88 MWL8K_A2H_INT_RX_READY | \
89 MWL8K_A2H_INT_TX_DONE)
90
91 /* WME stream classes */
92 #define WME_AC_BE 0 /* best effort */
93 #define WME_AC_BK 1 /* background */
94 #define WME_AC_VI 2 /* video */
95 #define WME_AC_VO 3 /* voice */
96
97 #define MWL8K_RX_QUEUES 1
98 #define MWL8K_TX_QUEUES 4
99
100 struct mwl8k_rx_queue {
101 int rx_desc_count;
102
103 /* hw receives here */
104 int rx_head;
105
106 /* refill descs here */
107 int rx_tail;
108
109 struct mwl8k_rx_desc *rx_desc_area;
110 dma_addr_t rx_desc_dma;
111 struct sk_buff **rx_skb;
112 };
113
114 struct mwl8k_skb {
115 /*
116 * The DMA engine requires a modification to the payload.
117 * If the skbuff is shared/cloned, it needs to be unshared.
118 * This method is used to ensure the stack always gets back
119 * the skbuff it sent for transmission.
120 */
121 struct sk_buff *clone;
122 struct sk_buff *skb;
123 };
124
125 struct mwl8k_tx_queue {
126 /* hw transmits here */
127 int tx_head;
128
129 /* sw appends here */
130 int tx_tail;
131
132 struct ieee80211_tx_queue_stats tx_stats;
133 struct mwl8k_tx_desc *tx_desc_area;
134 dma_addr_t tx_desc_dma;
135 struct mwl8k_skb *tx_skb;
136 };
137
138 /* Pointers to the firmware data and meta information about it. */
139 struct mwl8k_firmware {
140 /* Microcode */
141 struct firmware *ucode;
142
143 /* Boot helper code */
144 struct firmware *helper;
145 };
146
147 struct mwl8k_priv {
148 void __iomem *regs;
149 struct ieee80211_hw *hw;
150
151 struct pci_dev *pdev;
152 u8 name[16];
153 /* firmware access lock */
154 spinlock_t fw_lock;
155
156 /* firmware files and meta data */
157 struct mwl8k_firmware fw;
158 u32 part_num;
159
160 /* lock held over TX and TX reap */
161 spinlock_t tx_lock;
162
163 struct ieee80211_vif *vif;
164
165 struct ieee80211_channel *current_channel;
166
167 /* power management status cookie from firmware */
168 u32 *cookie;
169 dma_addr_t cookie_dma;
170
171 u16 num_mcaddrs;
172 u8 hw_rev;
173 __le32 fw_rev;
174
175 /*
176 * Running count of TX packets in flight, to avoid
177 * iterating over the transmit rings each time.
178 */
179 int pending_tx_pkts;
180
181 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
182 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
183
184 /* PHY parameters */
185 struct ieee80211_supported_band band;
186 struct ieee80211_channel channels[14];
187 struct ieee80211_rate rates[12];
188
189 bool radio_on;
190
191 /* RF preamble: Short, Long or Auto */
192 u8 radio_preamble;
193
194 /* WMM MODE 1 for enabled; 0 for disabled */
195 bool wmm_mode;
196
197 /* Set if PHY config is in progress */
198 bool inconfig;
199
200 /* XXX need to convert this to handle multiple interfaces */
201 bool capture_beacon;
202 u8 capture_bssid[ETH_ALEN];
203 struct sk_buff *beacon_skb;
204
205 /*
206 * This FJ worker has to be global as it is scheduled from the
207 * RX handler. At this point we don't know which interface it
208 * belongs to until the list of bssids waiting to complete join
209 * is checked.
210 */
211 struct work_struct finalize_join_worker;
212
213 /* Tasklet to reclaim TX descriptors and buffers after tx */
214 struct tasklet_struct tx_reclaim_task;
215
216 /* Work thread to serialize configuration requests */
217 struct workqueue_struct *config_wq;
218 struct completion *hostcmd_wait;
219 struct completion *tx_wait;
220 };
221
222 /* Per interface specific private data */
223 struct mwl8k_vif {
224 /* backpointer to parent config block */
225 struct mwl8k_priv *priv;
226
227 /* BSS config of AP or IBSS from mac80211*/
228 struct ieee80211_bss_conf bss_info;
229
230 /* BSSID of AP or IBSS */
231 u8 bssid[ETH_ALEN];
232 u8 mac_addr[ETH_ALEN];
233
234 /*
235 * Subset of supported legacy rates.
236 * Intersection of AP and STA supported rates.
237 */
238 struct ieee80211_rate legacy_rates[12];
239
240 /* number of supported legacy rates */
241 u8 legacy_nrates;
242
243 /* Index into station database.Returned by update_sta_db call */
244 u8 peer_id;
245
246 /* Non AMPDU sequence number assigned by driver */
247 u16 seqno;
248 };
249
250 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
251
252 static const struct ieee80211_channel mwl8k_channels[] = {
253 { .center_freq = 2412, .hw_value = 1, },
254 { .center_freq = 2417, .hw_value = 2, },
255 { .center_freq = 2422, .hw_value = 3, },
256 { .center_freq = 2427, .hw_value = 4, },
257 { .center_freq = 2432, .hw_value = 5, },
258 { .center_freq = 2437, .hw_value = 6, },
259 { .center_freq = 2442, .hw_value = 7, },
260 { .center_freq = 2447, .hw_value = 8, },
261 { .center_freq = 2452, .hw_value = 9, },
262 { .center_freq = 2457, .hw_value = 10, },
263 { .center_freq = 2462, .hw_value = 11, },
264 };
265
266 static const struct ieee80211_rate mwl8k_rates[] = {
267 { .bitrate = 10, .hw_value = 2, },
268 { .bitrate = 20, .hw_value = 4, },
269 { .bitrate = 55, .hw_value = 11, },
270 { .bitrate = 60, .hw_value = 12, },
271 { .bitrate = 90, .hw_value = 18, },
272 { .bitrate = 110, .hw_value = 22, },
273 { .bitrate = 120, .hw_value = 24, },
274 { .bitrate = 180, .hw_value = 36, },
275 { .bitrate = 240, .hw_value = 48, },
276 { .bitrate = 360, .hw_value = 72, },
277 { .bitrate = 480, .hw_value = 96, },
278 { .bitrate = 540, .hw_value = 108, },
279 };
280
281 /* Radio settings */
282 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
283 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
284 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
285
286 /* WMM */
287 #define MWL8K_WMM_ENABLE 1
288 #define MWL8K_WMM_DISABLE 0
289
290 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
291
292 /* Slot time */
293
294 /* Short Slot: 9us slot time */
295 #define MWL8K_SHORT_SLOTTIME 1
296
297 /* Long slot: 20us slot time */
298 #define MWL8K_LONG_SLOTTIME 0
299
300 /* Set or get info from Firmware */
301 #define MWL8K_CMD_SET 0x0001
302 #define MWL8K_CMD_GET 0x0000
303
304 /* Firmware command codes */
305 #define MWL8K_CMD_CODE_DNLD 0x0001
306 #define MWL8K_CMD_GET_HW_SPEC 0x0003
307 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
308 #define MWL8K_CMD_GET_STAT 0x0014
309 #define MWL8K_CMD_RADIO_CONTROL 0x001c
310 #define MWL8K_CMD_RF_TX_POWER 0x001e
311 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
312 #define MWL8K_CMD_SET_POST_SCAN 0x0108
313 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
314 #define MWL8K_CMD_SET_AID 0x010d
315 #define MWL8K_CMD_SET_RATE 0x0110
316 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
317 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
318 #define MWL8K_CMD_SET_SLOT 0x0114
319 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
320 #define MWL8K_CMD_SET_WMM_MODE 0x0123
321 #define MWL8K_CMD_MIMO_CONFIG 0x0125
322 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
323 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
324 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
325 #define MWL8K_CMD_UPDATE_STADB 0x1123
326
327 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
328 {
329 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
330 snprintf(buf, bufsize, "%s", #x);\
331 return buf;\
332 } while (0)
333 switch (cmd & ~0x8000) {
334 MWL8K_CMDNAME(CODE_DNLD);
335 MWL8K_CMDNAME(GET_HW_SPEC);
336 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
337 MWL8K_CMDNAME(GET_STAT);
338 MWL8K_CMDNAME(RADIO_CONTROL);
339 MWL8K_CMDNAME(RF_TX_POWER);
340 MWL8K_CMDNAME(SET_PRE_SCAN);
341 MWL8K_CMDNAME(SET_POST_SCAN);
342 MWL8K_CMDNAME(SET_RF_CHANNEL);
343 MWL8K_CMDNAME(SET_AID);
344 MWL8K_CMDNAME(SET_RATE);
345 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
346 MWL8K_CMDNAME(RTS_THRESHOLD);
347 MWL8K_CMDNAME(SET_SLOT);
348 MWL8K_CMDNAME(SET_EDCA_PARAMS);
349 MWL8K_CMDNAME(SET_WMM_MODE);
350 MWL8K_CMDNAME(MIMO_CONFIG);
351 MWL8K_CMDNAME(USE_FIXED_RATE);
352 MWL8K_CMDNAME(ENABLE_SNIFFER);
353 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
354 MWL8K_CMDNAME(UPDATE_STADB);
355 default:
356 snprintf(buf, bufsize, "0x%x", cmd);
357 }
358 #undef MWL8K_CMDNAME
359
360 return buf;
361 }
362
363 /* Hardware and firmware reset */
364 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
365 {
366 iowrite32(MWL8K_H2A_INT_RESET,
367 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
368 iowrite32(MWL8K_H2A_INT_RESET,
369 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
370 msleep(20);
371 }
372
373 /* Release fw image */
374 static void mwl8k_release_fw(struct firmware **fw)
375 {
376 if (*fw == NULL)
377 return;
378 release_firmware(*fw);
379 *fw = NULL;
380 }
381
382 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
383 {
384 mwl8k_release_fw(&priv->fw.ucode);
385 mwl8k_release_fw(&priv->fw.helper);
386 }
387
388 /* Request fw image */
389 static int mwl8k_request_fw(struct mwl8k_priv *priv,
390 const char *fname, struct firmware **fw)
391 {
392 /* release current image */
393 if (*fw != NULL)
394 mwl8k_release_fw(fw);
395
396 return request_firmware((const struct firmware **)fw,
397 fname, &priv->pdev->dev);
398 }
399
400 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
401 {
402 u8 filename[64];
403 int rc;
404
405 priv->part_num = part_num;
406
407 snprintf(filename, sizeof(filename),
408 "mwl8k/helper_%u.fw", priv->part_num);
409
410 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
411 if (rc) {
412 printk(KERN_ERR
413 "%s Error requesting helper firmware file %s\n",
414 pci_name(priv->pdev), filename);
415 return rc;
416 }
417
418 snprintf(filename, sizeof(filename),
419 "mwl8k/fmimage_%u.fw", priv->part_num);
420
421 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
422 if (rc) {
423 printk(KERN_ERR "%s Error requesting firmware file %s\n",
424 pci_name(priv->pdev), filename);
425 mwl8k_release_fw(&priv->fw.helper);
426 return rc;
427 }
428
429 return 0;
430 }
431
432 struct mwl8k_cmd_pkt {
433 __le16 code;
434 __le16 length;
435 __le16 seq_num;
436 __le16 result;
437 char payload[0];
438 } __attribute__((packed));
439
440 /*
441 * Firmware loading.
442 */
443 static int
444 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
445 {
446 void __iomem *regs = priv->regs;
447 dma_addr_t dma_addr;
448 int rc;
449 int loops;
450
451 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
452 if (pci_dma_mapping_error(priv->pdev, dma_addr))
453 return -ENOMEM;
454
455 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
456 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
457 iowrite32(MWL8K_H2A_INT_DOORBELL,
458 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
459 iowrite32(MWL8K_H2A_INT_DUMMY,
460 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
461
462 rc = -ETIMEDOUT;
463 loops = 1000;
464 do {
465 u32 int_code;
466
467 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
468 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
469 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
470 rc = 0;
471 break;
472 }
473
474 udelay(1);
475 } while (--loops);
476
477 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
478
479 /*
480 * Clear 'command done' interrupt bit.
481 */
482 loops = 1000;
483 do {
484 u32 status;
485
486 status = ioread32(priv->regs +
487 MWL8K_HIU_A2H_INTERRUPT_STATUS);
488 if (status & MWL8K_A2H_INT_OPC_DONE) {
489 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
490 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
491 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
492 break;
493 }
494
495 udelay(1);
496 } while (--loops);
497
498 return rc;
499 }
500
501 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
502 const u8 *data, size_t length)
503 {
504 struct mwl8k_cmd_pkt *cmd;
505 int done;
506 int rc = 0;
507
508 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
509 if (cmd == NULL)
510 return -ENOMEM;
511
512 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
513 cmd->seq_num = 0;
514 cmd->result = 0;
515
516 done = 0;
517 while (length) {
518 int block_size = length > 256 ? 256 : length;
519
520 memcpy(cmd->payload, data + done, block_size);
521 cmd->length = cpu_to_le16(block_size);
522
523 rc = mwl8k_send_fw_load_cmd(priv, cmd,
524 sizeof(*cmd) + block_size);
525 if (rc)
526 break;
527
528 done += block_size;
529 length -= block_size;
530 }
531
532 if (!rc) {
533 cmd->length = 0;
534 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
535 }
536
537 kfree(cmd);
538
539 return rc;
540 }
541
542 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
543 const u8 *data, size_t length)
544 {
545 unsigned char *buffer;
546 int may_continue, rc = 0;
547 u32 done, prev_block_size;
548
549 buffer = kmalloc(1024, GFP_KERNEL);
550 if (buffer == NULL)
551 return -ENOMEM;
552
553 done = 0;
554 prev_block_size = 0;
555 may_continue = 1000;
556 while (may_continue > 0) {
557 u32 block_size;
558
559 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
560 if (block_size & 1) {
561 block_size &= ~1;
562 may_continue--;
563 } else {
564 done += prev_block_size;
565 length -= prev_block_size;
566 }
567
568 if (block_size > 1024 || block_size > length) {
569 rc = -EOVERFLOW;
570 break;
571 }
572
573 if (length == 0) {
574 rc = 0;
575 break;
576 }
577
578 if (block_size == 0) {
579 rc = -EPROTO;
580 may_continue--;
581 udelay(1);
582 continue;
583 }
584
585 prev_block_size = block_size;
586 memcpy(buffer, data + done, block_size);
587
588 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
589 if (rc)
590 break;
591 }
592
593 if (!rc && length != 0)
594 rc = -EREMOTEIO;
595
596 kfree(buffer);
597
598 return rc;
599 }
600
601 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
602 {
603 int loops, rc;
604
605 const u8 *ucode = priv->fw.ucode->data;
606 size_t ucode_len = priv->fw.ucode->size;
607 const u8 *helper = priv->fw.helper->data;
608 size_t helper_len = priv->fw.helper->size;
609
610 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
611 rc = mwl8k_load_fw_image(priv, helper, helper_len);
612 if (rc) {
613 printk(KERN_ERR "%s: unable to load firmware "
614 "helper image\n", pci_name(priv->pdev));
615 return rc;
616 }
617 msleep(1);
618
619 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
620 } else {
621 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
622 }
623
624 if (rc) {
625 printk(KERN_ERR "%s: unable to load firmware data\n",
626 pci_name(priv->pdev));
627 return rc;
628 }
629
630 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
631 msleep(1);
632
633 loops = 200000;
634 do {
635 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
636 == MWL8K_FWSTA_READY)
637 break;
638 udelay(1);
639 } while (--loops);
640
641 return loops ? 0 : -ETIMEDOUT;
642 }
643
644
645 /*
646 * Defines shared between transmission and reception.
647 */
648 /* HT control fields for firmware */
649 struct ewc_ht_info {
650 __le16 control1;
651 __le16 control2;
652 __le16 control3;
653 } __attribute__((packed));
654
655 /* Firmware Station database operations */
656 #define MWL8K_STA_DB_ADD_ENTRY 0
657 #define MWL8K_STA_DB_MODIFY_ENTRY 1
658 #define MWL8K_STA_DB_DEL_ENTRY 2
659 #define MWL8K_STA_DB_FLUSH 3
660
661 /* Peer Entry flags - used to define the type of the peer node */
662 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
663
664 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
665 #define MWL8K_MCS_BITMAP_SIZE 16
666
667 struct peer_capability_info {
668 /* Peer type - AP vs. STA. */
669 __u8 peer_type;
670
671 /* Basic 802.11 capabilities from assoc resp. */
672 __le16 basic_caps;
673
674 /* Set if peer supports 802.11n high throughput (HT). */
675 __u8 ht_support;
676
677 /* Valid if HT is supported. */
678 __le16 ht_caps;
679 __u8 extended_ht_caps;
680 struct ewc_ht_info ewc_info;
681
682 /* Legacy rate table. Intersection of our rates and peer rates. */
683 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
684
685 /* HT rate table. Intersection of our rates and peer rates. */
686 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
687 __u8 pad[16];
688
689 /* If set, interoperability mode, no proprietary extensions. */
690 __u8 interop;
691 __u8 pad2;
692 __u8 station_id;
693 __le16 amsdu_enabled;
694 } __attribute__((packed));
695
696 /* Inline functions to manipulate QoS field in data descriptor. */
697 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
698 {
699 u16 val_mask = 1 << 4;
700
701 /* End of Service Period Bit 4 */
702 return qos | val_mask;
703 }
704
705 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
706 {
707 u16 val_mask = 0x3;
708 u8 shift = 5;
709 u16 qos_mask = ~(val_mask << shift);
710
711 /* Ack Policy Bit 5-6 */
712 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
713 }
714
715 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
716 {
717 u16 val_mask = 1 << 7;
718
719 /* AMSDU present Bit 7 */
720 return qos | val_mask;
721 }
722
723 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
724 {
725 u16 val_mask = 0xff;
726 u8 shift = 8;
727 u16 qos_mask = ~(val_mask << shift);
728
729 /* Queue Length Bits 8-15 */
730 return (qos & qos_mask) | ((len & val_mask) << shift);
731 }
732
733 /* DMA header used by firmware and hardware. */
734 struct mwl8k_dma_data {
735 __le16 fwlen;
736 struct ieee80211_hdr wh;
737 } __attribute__((packed));
738
739 /* Routines to add/remove DMA header from skb. */
740 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
741 {
742 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
743 void *dst, *src = &tr->wh;
744 __le16 fc = tr->wh.frame_control;
745 int hdrlen = ieee80211_hdrlen(fc);
746 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
747
748 dst = (void *)tr + space;
749 if (dst != src) {
750 memmove(dst, src, hdrlen);
751 skb_pull(skb, space);
752 }
753
754 return 0;
755 }
756
757 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
758 {
759 struct ieee80211_hdr *wh;
760 u32 hdrlen, pktlen;
761 struct mwl8k_dma_data *tr;
762
763 wh = (struct ieee80211_hdr *)skb->data;
764 hdrlen = ieee80211_hdrlen(wh->frame_control);
765 pktlen = skb->len;
766
767 /*
768 * Copy up/down the 802.11 header; the firmware requires
769 * we present a 2-byte payload length followed by a
770 * 4-address header (w/o QoS), followed (optionally) by
771 * any WEP/ExtIV header (but only filled in for CCMP).
772 */
773 if (hdrlen != sizeof(struct mwl8k_dma_data))
774 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
775
776 tr = (struct mwl8k_dma_data *)skb->data;
777 if (wh != &tr->wh)
778 memmove(&tr->wh, wh, hdrlen);
779
780 /* Clear addr4 */
781 memset(tr->wh.addr4, 0, ETH_ALEN);
782
783 /*
784 * Firmware length is the length of the fully formed "802.11
785 * payload". That is, everything except for the 802.11 header.
786 * This includes all crypto material including the MIC.
787 */
788 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
789
790 return skb;
791 }
792
793
794 /*
795 * Packet reception.
796 */
797 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
798
799 struct mwl8k_rx_desc {
800 __le16 pkt_len;
801 __u8 link_quality;
802 __u8 noise_level;
803 __le32 pkt_phys_addr;
804 __le32 next_rx_desc_phys_addr;
805 __le16 qos_control;
806 __le16 rate_info;
807 __le32 pad0[4];
808 __u8 rssi;
809 __u8 channel;
810 __le16 pad1;
811 __u8 rx_ctrl;
812 __u8 rx_status;
813 __u8 pad2[2];
814 } __attribute__((packed));
815
816 #define MWL8K_RX_DESCS 256
817 #define MWL8K_RX_MAXSZ 3800
818
819 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
820 {
821 struct mwl8k_priv *priv = hw->priv;
822 struct mwl8k_rx_queue *rxq = priv->rxq + index;
823 int size;
824 int i;
825
826 rxq->rx_desc_count = 0;
827 rxq->rx_head = 0;
828 rxq->rx_tail = 0;
829
830 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
831
832 rxq->rx_desc_area =
833 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
834 if (rxq->rx_desc_area == NULL) {
835 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
836 priv->name);
837 return -ENOMEM;
838 }
839 memset(rxq->rx_desc_area, 0, size);
840
841 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
842 sizeof(*rxq->rx_skb), GFP_KERNEL);
843 if (rxq->rx_skb == NULL) {
844 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
845 priv->name);
846 pci_free_consistent(priv->pdev, size,
847 rxq->rx_desc_area, rxq->rx_desc_dma);
848 return -ENOMEM;
849 }
850 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
851
852 for (i = 0; i < MWL8K_RX_DESCS; i++) {
853 struct mwl8k_rx_desc *rx_desc;
854 int nexti;
855
856 rx_desc = rxq->rx_desc_area + i;
857 nexti = (i + 1) % MWL8K_RX_DESCS;
858
859 rx_desc->next_rx_desc_phys_addr =
860 cpu_to_le32(rxq->rx_desc_dma
861 + nexti * sizeof(*rx_desc));
862 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
863 }
864
865 return 0;
866 }
867
868 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
869 {
870 struct mwl8k_priv *priv = hw->priv;
871 struct mwl8k_rx_queue *rxq = priv->rxq + index;
872 int refilled;
873
874 refilled = 0;
875 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
876 struct sk_buff *skb;
877 int rx;
878
879 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
880 if (skb == NULL)
881 break;
882
883 rxq->rx_desc_count++;
884
885 rx = rxq->rx_tail;
886 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
887
888 rxq->rx_desc_area[rx].pkt_phys_addr =
889 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
890 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
891
892 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
893 rxq->rx_skb[rx] = skb;
894 wmb();
895 rxq->rx_desc_area[rx].rx_ctrl = 0;
896
897 refilled++;
898 }
899
900 return refilled;
901 }
902
903 /* Must be called only when the card's reception is completely halted */
904 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
905 {
906 struct mwl8k_priv *priv = hw->priv;
907 struct mwl8k_rx_queue *rxq = priv->rxq + index;
908 int i;
909
910 for (i = 0; i < MWL8K_RX_DESCS; i++) {
911 if (rxq->rx_skb[i] != NULL) {
912 unsigned long addr;
913
914 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
915 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
916 PCI_DMA_FROMDEVICE);
917 kfree_skb(rxq->rx_skb[i]);
918 rxq->rx_skb[i] = NULL;
919 }
920 }
921
922 kfree(rxq->rx_skb);
923 rxq->rx_skb = NULL;
924
925 pci_free_consistent(priv->pdev,
926 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
927 rxq->rx_desc_area, rxq->rx_desc_dma);
928 rxq->rx_desc_area = NULL;
929 }
930
931
932 /*
933 * Scan a list of BSSIDs to process for finalize join.
934 * Allows for extension to process multiple BSSIDs.
935 */
936 static inline int
937 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
938 {
939 return priv->capture_beacon &&
940 ieee80211_is_beacon(wh->frame_control) &&
941 !compare_ether_addr(wh->addr3, priv->capture_bssid);
942 }
943
944 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
945 struct sk_buff *skb)
946 {
947 priv->capture_beacon = false;
948 memset(priv->capture_bssid, 0, ETH_ALEN);
949
950 /*
951 * Use GFP_ATOMIC as rxq_process is called from
952 * the primary interrupt handler, memory allocation call
953 * must not sleep.
954 */
955 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
956 if (priv->beacon_skb != NULL)
957 queue_work(priv->config_wq,
958 &priv->finalize_join_worker);
959 }
960
961 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
962 {
963 struct mwl8k_priv *priv = hw->priv;
964 struct mwl8k_rx_queue *rxq = priv->rxq + index;
965 int processed;
966
967 processed = 0;
968 while (rxq->rx_desc_count && limit--) {
969 struct mwl8k_rx_desc *rx_desc;
970 struct sk_buff *skb;
971 struct ieee80211_rx_status status;
972 unsigned long addr;
973 struct ieee80211_hdr *wh;
974
975 rx_desc = rxq->rx_desc_area + rxq->rx_head;
976 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
977 break;
978 rmb();
979
980 skb = rxq->rx_skb[rxq->rx_head];
981 if (skb == NULL)
982 break;
983 rxq->rx_skb[rxq->rx_head] = NULL;
984
985 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
986 rxq->rx_desc_count--;
987
988 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
989 pci_unmap_single(priv->pdev, addr,
990 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
991
992 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
993 if (mwl8k_remove_dma_header(skb)) {
994 dev_kfree_skb(skb);
995 continue;
996 }
997
998 wh = (struct ieee80211_hdr *)skb->data;
999
1000 /*
1001 * Check for pending join operation. save a copy of
1002 * the beacon and schedule a tasklet to send finalize
1003 * join command to the firmware.
1004 */
1005 if (mwl8k_capture_bssid(priv, wh))
1006 mwl8k_save_beacon(priv, skb);
1007
1008 memset(&status, 0, sizeof(status));
1009 status.mactime = 0;
1010 status.signal = -rx_desc->rssi;
1011 status.noise = -rx_desc->noise_level;
1012 status.qual = rx_desc->link_quality;
1013 status.antenna = 1;
1014 status.rate_idx = 1;
1015 status.flag = 0;
1016 status.band = IEEE80211_BAND_2GHZ;
1017 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1018 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1019 ieee80211_rx_irqsafe(hw, skb);
1020
1021 processed++;
1022 }
1023
1024 return processed;
1025 }
1026
1027
1028 /*
1029 * Packet transmission.
1030 */
1031
1032 /* Transmit queue assignment. */
1033 enum {
1034 MWL8K_WME_AC_BK = 0, /* background access */
1035 MWL8K_WME_AC_BE = 1, /* best effort access */
1036 MWL8K_WME_AC_VI = 2, /* video access */
1037 MWL8K_WME_AC_VO = 3, /* voice access */
1038 };
1039
1040 /* Transmit packet ACK policy */
1041 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1042 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1043
1044 #define GET_TXQ(_ac) (\
1045 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1046 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1047 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1048 MWL8K_WME_AC_BE)
1049
1050 #define MWL8K_TXD_STATUS_OK 0x00000001
1051 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1052 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1053 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1054 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1055
1056 struct mwl8k_tx_desc {
1057 __le32 status;
1058 __u8 data_rate;
1059 __u8 tx_priority;
1060 __le16 qos_control;
1061 __le32 pkt_phys_addr;
1062 __le16 pkt_len;
1063 __u8 dest_MAC_addr[ETH_ALEN];
1064 __le32 next_tx_desc_phys_addr;
1065 __le32 reserved;
1066 __le16 rate_info;
1067 __u8 peer_id;
1068 __u8 tx_frag_cnt;
1069 } __attribute__((packed));
1070
1071 #define MWL8K_TX_DESCS 128
1072
1073 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1074 {
1075 struct mwl8k_priv *priv = hw->priv;
1076 struct mwl8k_tx_queue *txq = priv->txq + index;
1077 int size;
1078 int i;
1079
1080 memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1081 txq->tx_stats.limit = MWL8K_TX_DESCS;
1082 txq->tx_head = 0;
1083 txq->tx_tail = 0;
1084
1085 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1086
1087 txq->tx_desc_area =
1088 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1089 if (txq->tx_desc_area == NULL) {
1090 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1091 priv->name);
1092 return -ENOMEM;
1093 }
1094 memset(txq->tx_desc_area, 0, size);
1095
1096 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1097 GFP_KERNEL);
1098 if (txq->tx_skb == NULL) {
1099 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1100 priv->name);
1101 pci_free_consistent(priv->pdev, size,
1102 txq->tx_desc_area, txq->tx_desc_dma);
1103 return -ENOMEM;
1104 }
1105 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1106
1107 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1108 struct mwl8k_tx_desc *tx_desc;
1109 int nexti;
1110
1111 tx_desc = txq->tx_desc_area + i;
1112 nexti = (i + 1) % MWL8K_TX_DESCS;
1113
1114 tx_desc->status = 0;
1115 tx_desc->next_tx_desc_phys_addr =
1116 cpu_to_le32(txq->tx_desc_dma +
1117 nexti * sizeof(*tx_desc));
1118 }
1119
1120 return 0;
1121 }
1122
1123 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1124 {
1125 iowrite32(MWL8K_H2A_INT_PPA_READY,
1126 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1127 iowrite32(MWL8K_H2A_INT_DUMMY,
1128 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1129 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1130 }
1131
1132 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1133 {
1134 return priv->pending_tx_pkts;
1135 }
1136
1137 struct mwl8k_txq_info {
1138 u32 fw_owned;
1139 u32 drv_owned;
1140 u32 unused;
1141 u32 len;
1142 u32 head;
1143 u32 tail;
1144 };
1145
1146 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1147 struct mwl8k_txq_info txinfo[],
1148 u32 num_queues)
1149 {
1150 int count, desc, status;
1151 struct mwl8k_tx_queue *txq;
1152 struct mwl8k_tx_desc *tx_desc;
1153 int ndescs = 0;
1154
1155 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1156 spin_lock_bh(&priv->tx_lock);
1157 for (count = 0; count < num_queues; count++) {
1158 txq = priv->txq + count;
1159 txinfo[count].len = txq->tx_stats.len;
1160 txinfo[count].head = txq->tx_head;
1161 txinfo[count].tail = txq->tx_tail;
1162 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1163 tx_desc = txq->tx_desc_area + desc;
1164 status = le32_to_cpu(tx_desc->status);
1165
1166 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1167 txinfo[count].fw_owned++;
1168 else
1169 txinfo[count].drv_owned++;
1170
1171 if (tx_desc->pkt_len == 0)
1172 txinfo[count].unused++;
1173 }
1174 }
1175 spin_unlock_bh(&priv->tx_lock);
1176
1177 return ndescs;
1178 }
1179
1180 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1181 {
1182 struct mwl8k_priv *priv = hw->priv;
1183 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1184 u32 count;
1185 unsigned long timeout;
1186
1187 might_sleep();
1188
1189 if (priv->tx_wait != NULL)
1190 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1191
1192 spin_lock_bh(&priv->tx_lock);
1193 count = mwl8k_txq_busy(priv);
1194 if (count) {
1195 priv->tx_wait = &cmd_wait;
1196 if (priv->radio_on)
1197 mwl8k_tx_start(priv);
1198 }
1199 spin_unlock_bh(&priv->tx_lock);
1200
1201 if (count) {
1202 struct mwl8k_txq_info txinfo[4];
1203 int index;
1204 int newcount;
1205
1206 timeout = wait_for_completion_timeout(&cmd_wait,
1207 msecs_to_jiffies(delay_ms));
1208 if (timeout)
1209 return 0;
1210
1211 spin_lock_bh(&priv->tx_lock);
1212 priv->tx_wait = NULL;
1213 newcount = mwl8k_txq_busy(priv);
1214 spin_unlock_bh(&priv->tx_lock);
1215
1216 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1217 __func__, __LINE__, delay_ms, count, newcount);
1218
1219 mwl8k_scan_tx_ring(priv, txinfo, 4);
1220 for (index = 0; index < 4; index++)
1221 printk(KERN_ERR
1222 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1223 index,
1224 txinfo[index].len,
1225 txinfo[index].head,
1226 txinfo[index].tail,
1227 txinfo[index].fw_owned,
1228 txinfo[index].drv_owned,
1229 txinfo[index].unused);
1230
1231 return -ETIMEDOUT;
1232 }
1233
1234 return 0;
1235 }
1236
1237 #define MWL8K_TXD_SUCCESS(status) \
1238 ((status) & (MWL8K_TXD_STATUS_OK | \
1239 MWL8K_TXD_STATUS_OK_RETRY | \
1240 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1241
1242 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1243 {
1244 struct mwl8k_priv *priv = hw->priv;
1245 struct mwl8k_tx_queue *txq = priv->txq + index;
1246 int wake = 0;
1247
1248 while (txq->tx_stats.len > 0) {
1249 int tx;
1250 int rc;
1251 struct mwl8k_tx_desc *tx_desc;
1252 unsigned long addr;
1253 int size;
1254 struct sk_buff *skb;
1255 struct ieee80211_tx_info *info;
1256 u32 status;
1257
1258 rc = 0;
1259 tx = txq->tx_head;
1260 tx_desc = txq->tx_desc_area + tx;
1261
1262 status = le32_to_cpu(tx_desc->status);
1263
1264 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1265 if (!force)
1266 break;
1267 tx_desc->status &=
1268 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1269 }
1270
1271 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1272 BUG_ON(txq->tx_stats.len == 0);
1273 txq->tx_stats.len--;
1274 priv->pending_tx_pkts--;
1275
1276 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1277 size = le16_to_cpu(tx_desc->pkt_len);
1278 skb = txq->tx_skb[tx].skb;
1279 txq->tx_skb[tx].skb = NULL;
1280
1281 BUG_ON(skb == NULL);
1282 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1283
1284 rc = mwl8k_remove_dma_header(skb);
1285
1286 /* Mark descriptor as unused */
1287 tx_desc->pkt_phys_addr = 0;
1288 tx_desc->pkt_len = 0;
1289
1290 if (txq->tx_skb[tx].clone) {
1291 /* Replace with original skb
1292 * before returning to stack
1293 * as buffer has been cloned
1294 */
1295 dev_kfree_skb(skb);
1296 skb = txq->tx_skb[tx].clone;
1297 txq->tx_skb[tx].clone = NULL;
1298 }
1299
1300 if (rc) {
1301 /* Something has gone wrong here.
1302 * Failed to remove DMA header.
1303 * Print error message and drop packet.
1304 */
1305 printk(KERN_ERR "%s: Error removing DMA header from "
1306 "tx skb 0x%p.\n", priv->name, skb);
1307
1308 dev_kfree_skb(skb);
1309 continue;
1310 }
1311
1312 info = IEEE80211_SKB_CB(skb);
1313 ieee80211_tx_info_clear_status(info);
1314 if (MWL8K_TXD_SUCCESS(status))
1315 info->flags |= IEEE80211_TX_STAT_ACK;
1316
1317 ieee80211_tx_status_irqsafe(hw, skb);
1318
1319 wake = !priv->inconfig && priv->radio_on;
1320 }
1321
1322 if (wake)
1323 ieee80211_wake_queue(hw, index);
1324 }
1325
1326 /* must be called only when the card's transmit is completely halted */
1327 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1328 {
1329 struct mwl8k_priv *priv = hw->priv;
1330 struct mwl8k_tx_queue *txq = priv->txq + index;
1331
1332 mwl8k_txq_reclaim(hw, index, 1);
1333
1334 kfree(txq->tx_skb);
1335 txq->tx_skb = NULL;
1336
1337 pci_free_consistent(priv->pdev,
1338 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1339 txq->tx_desc_area, txq->tx_desc_dma);
1340 txq->tx_desc_area = NULL;
1341 }
1342
1343 static int
1344 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1345 {
1346 struct mwl8k_priv *priv = hw->priv;
1347 struct ieee80211_tx_info *tx_info;
1348 struct ieee80211_hdr *wh;
1349 struct mwl8k_tx_queue *txq;
1350 struct mwl8k_tx_desc *tx;
1351 struct mwl8k_dma_data *tr;
1352 struct mwl8k_vif *mwl8k_vif;
1353 struct sk_buff *org_skb = skb;
1354 dma_addr_t dma;
1355 u16 qos = 0;
1356 bool qosframe = false, ampduframe = false;
1357 bool mcframe = false, eapolframe = false;
1358 bool amsduframe = false;
1359 __le16 fc;
1360
1361 txq = priv->txq + index;
1362 tx = txq->tx_desc_area + txq->tx_tail;
1363
1364 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1365
1366 /*
1367 * Append HW DMA header to start of packet. Drop packet if
1368 * there is not enough space or a failure to unshare/unclone
1369 * the skb.
1370 */
1371 skb = mwl8k_add_dma_header(skb);
1372
1373 if (skb == NULL) {
1374 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1375 "header, dropping TX frame.\n", priv->name);
1376 dev_kfree_skb(org_skb);
1377 return NETDEV_TX_OK;
1378 }
1379
1380 tx_info = IEEE80211_SKB_CB(skb);
1381 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1382 tr = (struct mwl8k_dma_data *)skb->data;
1383 wh = &tr->wh;
1384 fc = wh->frame_control;
1385 qosframe = ieee80211_is_data_qos(fc);
1386 mcframe = is_multicast_ether_addr(wh->addr1);
1387 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1388
1389 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1390 u16 seqno = mwl8k_vif->seqno;
1391 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1392 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1393 mwl8k_vif->seqno = seqno++ % 4096;
1394 }
1395
1396 if (qosframe)
1397 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1398
1399 dma = pci_map_single(priv->pdev, skb->data,
1400 skb->len, PCI_DMA_TODEVICE);
1401
1402 if (pci_dma_mapping_error(priv->pdev, dma)) {
1403 printk(KERN_DEBUG "%s: failed to dma map skb, "
1404 "dropping TX frame.\n", priv->name);
1405
1406 if (org_skb != NULL)
1407 dev_kfree_skb(org_skb);
1408 if (skb != NULL)
1409 dev_kfree_skb(skb);
1410 return NETDEV_TX_OK;
1411 }
1412
1413 /* Set desc header, cpu bit order. */
1414 tx->status = 0;
1415 tx->data_rate = 0;
1416 tx->tx_priority = index;
1417 tx->qos_control = 0;
1418 tx->rate_info = 0;
1419 tx->peer_id = mwl8k_vif->peer_id;
1420
1421 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1422
1423 /* Setup firmware control bit fields for each frame type. */
1424 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1425 tx->data_rate = 0;
1426 qos = mwl8k_qos_setbit_eosp(qos);
1427 /* Set Queue size to unspecified */
1428 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1429 } else if (ieee80211_is_data(fc)) {
1430 tx->data_rate = 1;
1431 if (mcframe)
1432 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1433
1434 /*
1435 * Tell firmware to not send EAPOL pkts in an
1436 * aggregate. Verify against mac80211 tx path. If
1437 * stack turns off AMPDU for an EAPOL frame this
1438 * check will be removed.
1439 */
1440 if (eapolframe) {
1441 qos = mwl8k_qos_setbit_ack(qos,
1442 MWL8K_TXD_ACK_POLICY_NORMAL);
1443 } else {
1444 /* Send pkt in an aggregate if AMPDU frame. */
1445 if (ampduframe)
1446 qos = mwl8k_qos_setbit_ack(qos,
1447 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1448 else
1449 qos = mwl8k_qos_setbit_ack(qos,
1450 MWL8K_TXD_ACK_POLICY_NORMAL);
1451
1452 if (amsduframe)
1453 qos = mwl8k_qos_setbit_amsdu(qos);
1454 }
1455 }
1456
1457 /* Convert to little endian */
1458 tx->qos_control = cpu_to_le16(qos);
1459 tx->status = cpu_to_le32(tx->status);
1460 tx->pkt_phys_addr = cpu_to_le32(dma);
1461 tx->pkt_len = cpu_to_le16(skb->len);
1462
1463 txq->tx_skb[txq->tx_tail].skb = skb;
1464 txq->tx_skb[txq->tx_tail].clone =
1465 skb == org_skb ? NULL : org_skb;
1466
1467 spin_lock_bh(&priv->tx_lock);
1468
1469 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1470 MWL8K_TXD_STATUS_FW_OWNED);
1471 wmb();
1472 txq->tx_stats.len++;
1473 priv->pending_tx_pkts++;
1474 txq->tx_stats.count++;
1475 txq->tx_tail++;
1476
1477 if (txq->tx_tail == MWL8K_TX_DESCS)
1478 txq->tx_tail = 0;
1479 if (txq->tx_head == txq->tx_tail)
1480 ieee80211_stop_queue(hw, index);
1481
1482 if (priv->inconfig) {
1483 /*
1484 * Silently queue packet when we are in the middle of
1485 * a config cycle. Notify firmware only if we are
1486 * waiting for TXQs to empty. If a packet is sent
1487 * before .config() is complete, perhaps it is better
1488 * to drop the packet, as the channel is being changed
1489 * and the packet will end up on the wrong channel.
1490 */
1491 printk(KERN_ERR "%s(): WARNING TX activity while "
1492 "in config\n", __func__);
1493
1494 if (priv->tx_wait != NULL)
1495 mwl8k_tx_start(priv);
1496 } else
1497 mwl8k_tx_start(priv);
1498
1499 spin_unlock_bh(&priv->tx_lock);
1500
1501 return NETDEV_TX_OK;
1502 }
1503
1504
1505 /*
1506 * Command processing.
1507 */
1508
1509 /* Timeout firmware commands after 2000ms */
1510 #define MWL8K_CMD_TIMEOUT_MS 2000
1511
1512 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1513 {
1514 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1515 struct mwl8k_priv *priv = hw->priv;
1516 void __iomem *regs = priv->regs;
1517 dma_addr_t dma_addr;
1518 unsigned int dma_size;
1519 int rc;
1520 unsigned long timeout = 0;
1521 u8 buf[32];
1522
1523 cmd->result = 0xFFFF;
1524 dma_size = le16_to_cpu(cmd->length);
1525 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1526 PCI_DMA_BIDIRECTIONAL);
1527 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1528 return -ENOMEM;
1529
1530 if (priv->hostcmd_wait != NULL)
1531 printk(KERN_ERR "WARNING host command in progress\n");
1532
1533 spin_lock_irq(&priv->fw_lock);
1534 priv->hostcmd_wait = &cmd_wait;
1535 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1536 iowrite32(MWL8K_H2A_INT_DOORBELL,
1537 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1538 iowrite32(MWL8K_H2A_INT_DUMMY,
1539 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1540 spin_unlock_irq(&priv->fw_lock);
1541
1542 timeout = wait_for_completion_timeout(&cmd_wait,
1543 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1544
1545 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1546 PCI_DMA_BIDIRECTIONAL);
1547
1548 if (!timeout) {
1549 spin_lock_irq(&priv->fw_lock);
1550 priv->hostcmd_wait = NULL;
1551 spin_unlock_irq(&priv->fw_lock);
1552 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1553 priv->name,
1554 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1555 MWL8K_CMD_TIMEOUT_MS);
1556 rc = -ETIMEDOUT;
1557 } else {
1558 rc = cmd->result ? -EINVAL : 0;
1559 if (rc)
1560 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1561 priv->name,
1562 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1563 cmd->result);
1564 }
1565
1566 return rc;
1567 }
1568
1569 /*
1570 * GET_HW_SPEC.
1571 */
1572 struct mwl8k_cmd_get_hw_spec {
1573 struct mwl8k_cmd_pkt header;
1574 __u8 hw_rev;
1575 __u8 host_interface;
1576 __le16 num_mcaddrs;
1577 __u8 perm_addr[ETH_ALEN];
1578 __le16 region_code;
1579 __le32 fw_rev;
1580 __le32 ps_cookie;
1581 __le32 caps;
1582 __u8 mcs_bitmap[16];
1583 __le32 rx_queue_ptr;
1584 __le32 num_tx_queues;
1585 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1586 __le32 caps2;
1587 __le32 num_tx_desc_per_queue;
1588 __le32 total_rx_desc;
1589 } __attribute__((packed));
1590
1591 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1592 {
1593 struct mwl8k_priv *priv = hw->priv;
1594 struct mwl8k_cmd_get_hw_spec *cmd;
1595 int rc;
1596 int i;
1597
1598 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1599 if (cmd == NULL)
1600 return -ENOMEM;
1601
1602 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1603 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1604
1605 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1606 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1607 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1608 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1609 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1610 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1611 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1612 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1613
1614 rc = mwl8k_post_cmd(hw, &cmd->header);
1615
1616 if (!rc) {
1617 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1618 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1619 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1620 priv->hw_rev = cmd->hw_rev;
1621 }
1622
1623 kfree(cmd);
1624 return rc;
1625 }
1626
1627 /*
1628 * CMD_MAC_MULTICAST_ADR.
1629 */
1630 struct mwl8k_cmd_mac_multicast_adr {
1631 struct mwl8k_cmd_pkt header;
1632 __le16 action;
1633 __le16 numaddr;
1634 __u8 addr[0][ETH_ALEN];
1635 };
1636
1637 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1638
1639 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1640 int mc_count,
1641 struct dev_addr_list *mclist)
1642 {
1643 struct mwl8k_cmd_mac_multicast_adr *cmd;
1644 int index = 0;
1645 int rc;
1646 int size = sizeof(*cmd) + mc_count * ETH_ALEN;
1647
1648 cmd = kzalloc(size, GFP_KERNEL);
1649 if (cmd == NULL)
1650 return -ENOMEM;
1651
1652 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1653 cmd->header.length = cpu_to_le16(size);
1654 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1655 cmd->numaddr = cpu_to_le16(mc_count);
1656
1657 while (index < mc_count && mclist) {
1658 if (mclist->da_addrlen != ETH_ALEN) {
1659 rc = -EINVAL;
1660 goto mwl8k_cmd_mac_multicast_adr_exit;
1661 }
1662 memcpy(cmd->addr[index++], mclist->da_addr, ETH_ALEN);
1663 mclist = mclist->next;
1664 }
1665
1666 rc = mwl8k_post_cmd(hw, &cmd->header);
1667
1668 mwl8k_cmd_mac_multicast_adr_exit:
1669 kfree(cmd);
1670 return rc;
1671 }
1672
1673 /*
1674 * CMD_802_11_GET_STAT.
1675 */
1676 struct mwl8k_cmd_802_11_get_stat {
1677 struct mwl8k_cmd_pkt header;
1678 __le16 action;
1679 __le32 stats[64];
1680 } __attribute__((packed));
1681
1682 #define MWL8K_STAT_ACK_FAILURE 9
1683 #define MWL8K_STAT_RTS_FAILURE 12
1684 #define MWL8K_STAT_FCS_ERROR 24
1685 #define MWL8K_STAT_RTS_SUCCESS 11
1686
1687 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1688 struct ieee80211_low_level_stats *stats)
1689 {
1690 struct mwl8k_cmd_802_11_get_stat *cmd;
1691 int rc;
1692
1693 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1694 if (cmd == NULL)
1695 return -ENOMEM;
1696
1697 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1698 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1699 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1700
1701 rc = mwl8k_post_cmd(hw, &cmd->header);
1702 if (!rc) {
1703 stats->dot11ACKFailureCount =
1704 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1705 stats->dot11RTSFailureCount =
1706 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1707 stats->dot11FCSErrorCount =
1708 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1709 stats->dot11RTSSuccessCount =
1710 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1711 }
1712 kfree(cmd);
1713
1714 return rc;
1715 }
1716
1717 /*
1718 * CMD_802_11_RADIO_CONTROL.
1719 */
1720 struct mwl8k_cmd_802_11_radio_control {
1721 struct mwl8k_cmd_pkt header;
1722 __le16 action;
1723 __le16 control;
1724 __le16 radio_on;
1725 } __attribute__((packed));
1726
1727 static int
1728 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1729 {
1730 struct mwl8k_priv *priv = hw->priv;
1731 struct mwl8k_cmd_802_11_radio_control *cmd;
1732 int rc;
1733
1734 if (enable == priv->radio_on && !force)
1735 return 0;
1736
1737 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1738 if (cmd == NULL)
1739 return -ENOMEM;
1740
1741 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1742 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1743 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1744 cmd->control = cpu_to_le16(priv->radio_preamble);
1745 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1746
1747 rc = mwl8k_post_cmd(hw, &cmd->header);
1748 kfree(cmd);
1749
1750 if (!rc)
1751 priv->radio_on = enable;
1752
1753 return rc;
1754 }
1755
1756 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1757 {
1758 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1759 }
1760
1761 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1762 {
1763 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1764 }
1765
1766 static int
1767 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1768 {
1769 struct mwl8k_priv *priv;
1770
1771 if (hw == NULL || hw->priv == NULL)
1772 return -EINVAL;
1773 priv = hw->priv;
1774
1775 priv->radio_preamble = (short_preamble ?
1776 MWL8K_RADIO_SHORT_PREAMBLE :
1777 MWL8K_RADIO_LONG_PREAMBLE);
1778
1779 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1780 }
1781
1782 /*
1783 * CMD_802_11_RF_TX_POWER.
1784 */
1785 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1786
1787 struct mwl8k_cmd_802_11_rf_tx_power {
1788 struct mwl8k_cmd_pkt header;
1789 __le16 action;
1790 __le16 support_level;
1791 __le16 current_level;
1792 __le16 reserved;
1793 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1794 } __attribute__((packed));
1795
1796 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1797 {
1798 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1799 int rc;
1800
1801 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1802 if (cmd == NULL)
1803 return -ENOMEM;
1804
1805 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1806 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1807 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1808 cmd->support_level = cpu_to_le16(dBm);
1809
1810 rc = mwl8k_post_cmd(hw, &cmd->header);
1811 kfree(cmd);
1812
1813 return rc;
1814 }
1815
1816 /*
1817 * CMD_SET_PRE_SCAN.
1818 */
1819 struct mwl8k_cmd_set_pre_scan {
1820 struct mwl8k_cmd_pkt header;
1821 } __attribute__((packed));
1822
1823 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1824 {
1825 struct mwl8k_cmd_set_pre_scan *cmd;
1826 int rc;
1827
1828 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1829 if (cmd == NULL)
1830 return -ENOMEM;
1831
1832 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1833 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1834
1835 rc = mwl8k_post_cmd(hw, &cmd->header);
1836 kfree(cmd);
1837
1838 return rc;
1839 }
1840
1841 /*
1842 * CMD_SET_POST_SCAN.
1843 */
1844 struct mwl8k_cmd_set_post_scan {
1845 struct mwl8k_cmd_pkt header;
1846 __le32 isibss;
1847 __u8 bssid[ETH_ALEN];
1848 } __attribute__((packed));
1849
1850 static int
1851 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1852 {
1853 struct mwl8k_cmd_set_post_scan *cmd;
1854 int rc;
1855
1856 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1857 if (cmd == NULL)
1858 return -ENOMEM;
1859
1860 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1861 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1862 cmd->isibss = 0;
1863 memcpy(cmd->bssid, mac, ETH_ALEN);
1864
1865 rc = mwl8k_post_cmd(hw, &cmd->header);
1866 kfree(cmd);
1867
1868 return rc;
1869 }
1870
1871 /*
1872 * CMD_SET_RF_CHANNEL.
1873 */
1874 struct mwl8k_cmd_set_rf_channel {
1875 struct mwl8k_cmd_pkt header;
1876 __le16 action;
1877 __u8 current_channel;
1878 __le32 channel_flags;
1879 } __attribute__((packed));
1880
1881 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1882 struct ieee80211_channel *channel)
1883 {
1884 struct mwl8k_cmd_set_rf_channel *cmd;
1885 int rc;
1886
1887 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1888 if (cmd == NULL)
1889 return -ENOMEM;
1890
1891 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1892 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1893 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1894 cmd->current_channel = channel->hw_value;
1895 if (channel->band == IEEE80211_BAND_2GHZ)
1896 cmd->channel_flags = cpu_to_le32(0x00000081);
1897 else
1898 cmd->channel_flags = cpu_to_le32(0x00000000);
1899
1900 rc = mwl8k_post_cmd(hw, &cmd->header);
1901 kfree(cmd);
1902
1903 return rc;
1904 }
1905
1906 /*
1907 * CMD_SET_SLOT.
1908 */
1909 struct mwl8k_cmd_set_slot {
1910 struct mwl8k_cmd_pkt header;
1911 __le16 action;
1912 __u8 short_slot;
1913 } __attribute__((packed));
1914
1915 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1916 {
1917 struct mwl8k_cmd_set_slot *cmd;
1918 int rc;
1919
1920 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1921 if (cmd == NULL)
1922 return -ENOMEM;
1923
1924 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1925 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1926 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1927 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1928
1929 rc = mwl8k_post_cmd(hw, &cmd->header);
1930 kfree(cmd);
1931
1932 return rc;
1933 }
1934
1935 /*
1936 * CMD_MIMO_CONFIG.
1937 */
1938 struct mwl8k_cmd_mimo_config {
1939 struct mwl8k_cmd_pkt header;
1940 __le32 action;
1941 __u8 rx_antenna_map;
1942 __u8 tx_antenna_map;
1943 } __attribute__((packed));
1944
1945 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1946 {
1947 struct mwl8k_cmd_mimo_config *cmd;
1948 int rc;
1949
1950 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1951 if (cmd == NULL)
1952 return -ENOMEM;
1953
1954 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1955 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1956 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1957 cmd->rx_antenna_map = rx;
1958 cmd->tx_antenna_map = tx;
1959
1960 rc = mwl8k_post_cmd(hw, &cmd->header);
1961 kfree(cmd);
1962
1963 return rc;
1964 }
1965
1966 /*
1967 * CMD_ENABLE_SNIFFER.
1968 */
1969 struct mwl8k_cmd_enable_sniffer {
1970 struct mwl8k_cmd_pkt header;
1971 __le32 action;
1972 } __attribute__((packed));
1973
1974 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1975 {
1976 struct mwl8k_cmd_enable_sniffer *cmd;
1977 int rc;
1978
1979 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1980 if (cmd == NULL)
1981 return -ENOMEM;
1982
1983 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1984 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1985 cmd->action = cpu_to_le32(!!enable);
1986
1987 rc = mwl8k_post_cmd(hw, &cmd->header);
1988 kfree(cmd);
1989
1990 return rc;
1991 }
1992
1993 /*
1994 * CMD_SET_RATEADAPT_MODE.
1995 */
1996 struct mwl8k_cmd_set_rate_adapt_mode {
1997 struct mwl8k_cmd_pkt header;
1998 __le16 action;
1999 __le16 mode;
2000 } __attribute__((packed));
2001
2002 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2003 {
2004 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2005 int rc;
2006
2007 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2008 if (cmd == NULL)
2009 return -ENOMEM;
2010
2011 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2012 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2013 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2014 cmd->mode = cpu_to_le16(mode);
2015
2016 rc = mwl8k_post_cmd(hw, &cmd->header);
2017 kfree(cmd);
2018
2019 return rc;
2020 }
2021
2022 /*
2023 * CMD_SET_WMM_MODE.
2024 */
2025 struct mwl8k_cmd_set_wmm {
2026 struct mwl8k_cmd_pkt header;
2027 __le16 action;
2028 } __attribute__((packed));
2029
2030 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2031 {
2032 struct mwl8k_priv *priv = hw->priv;
2033 struct mwl8k_cmd_set_wmm *cmd;
2034 int rc;
2035
2036 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2037 if (cmd == NULL)
2038 return -ENOMEM;
2039
2040 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2041 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2042 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2043
2044 rc = mwl8k_post_cmd(hw, &cmd->header);
2045 kfree(cmd);
2046
2047 if (!rc)
2048 priv->wmm_mode = enable;
2049
2050 return rc;
2051 }
2052
2053 /*
2054 * CMD_SET_RTS_THRESHOLD.
2055 */
2056 struct mwl8k_cmd_rts_threshold {
2057 struct mwl8k_cmd_pkt header;
2058 __le16 action;
2059 __le16 threshold;
2060 } __attribute__((packed));
2061
2062 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2063 u16 action, u16 *threshold)
2064 {
2065 struct mwl8k_cmd_rts_threshold *cmd;
2066 int rc;
2067
2068 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2069 if (cmd == NULL)
2070 return -ENOMEM;
2071
2072 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2073 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2074 cmd->action = cpu_to_le16(action);
2075 cmd->threshold = cpu_to_le16(*threshold);
2076
2077 rc = mwl8k_post_cmd(hw, &cmd->header);
2078 kfree(cmd);
2079
2080 return rc;
2081 }
2082
2083 /*
2084 * CMD_SET_EDCA_PARAMS.
2085 */
2086 struct mwl8k_cmd_set_edca_params {
2087 struct mwl8k_cmd_pkt header;
2088
2089 /* See MWL8K_SET_EDCA_XXX below */
2090 __le16 action;
2091
2092 /* TX opportunity in units of 32 us */
2093 __le16 txop;
2094
2095 /* Log exponent of max contention period: 0...15*/
2096 __u8 log_cw_max;
2097
2098 /* Log exponent of min contention period: 0...15 */
2099 __u8 log_cw_min;
2100
2101 /* Adaptive interframe spacing in units of 32us */
2102 __u8 aifs;
2103
2104 /* TX queue to configure */
2105 __u8 txq;
2106 } __attribute__((packed));
2107
2108 #define MWL8K_SET_EDCA_CW 0x01
2109 #define MWL8K_SET_EDCA_TXOP 0x02
2110 #define MWL8K_SET_EDCA_AIFS 0x04
2111
2112 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2113 MWL8K_SET_EDCA_TXOP | \
2114 MWL8K_SET_EDCA_AIFS)
2115
2116 static int
2117 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2118 __u16 cw_min, __u16 cw_max,
2119 __u8 aifs, __u16 txop)
2120 {
2121 struct mwl8k_cmd_set_edca_params *cmd;
2122 int rc;
2123
2124 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2125 if (cmd == NULL)
2126 return -ENOMEM;
2127
2128 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2129 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2130 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2131 cmd->txop = cpu_to_le16(txop);
2132 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
2133 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2134 cmd->aifs = aifs;
2135 cmd->txq = qnum;
2136
2137 rc = mwl8k_post_cmd(hw, &cmd->header);
2138 kfree(cmd);
2139
2140 return rc;
2141 }
2142
2143 /*
2144 * CMD_FINALIZE_JOIN.
2145 */
2146
2147 /* FJ beacon buffer size is compiled into the firmware. */
2148 #define MWL8K_FJ_BEACON_MAXLEN 128
2149
2150 struct mwl8k_cmd_finalize_join {
2151 struct mwl8k_cmd_pkt header;
2152 __le32 sleep_interval; /* Number of beacon periods to sleep */
2153 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2154 } __attribute__((packed));
2155
2156 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2157 __u16 framelen, __u16 dtim)
2158 {
2159 struct mwl8k_cmd_finalize_join *cmd;
2160 struct ieee80211_mgmt *payload = frame;
2161 u16 hdrlen;
2162 u32 payload_len;
2163 int rc;
2164
2165 if (frame == NULL)
2166 return -EINVAL;
2167
2168 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2169 if (cmd == NULL)
2170 return -ENOMEM;
2171
2172 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2173 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2174 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2175
2176 hdrlen = ieee80211_hdrlen(payload->frame_control);
2177
2178 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2179
2180 /* XXX TBD Might just have to abort and return an error */
2181 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2182 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2183 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2184 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2185
2186 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2187 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2188
2189 if (payload && payload_len)
2190 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2191
2192 rc = mwl8k_post_cmd(hw, &cmd->header);
2193 kfree(cmd);
2194 return rc;
2195 }
2196
2197 /*
2198 * CMD_UPDATE_STADB.
2199 */
2200 struct mwl8k_cmd_update_sta_db {
2201 struct mwl8k_cmd_pkt header;
2202
2203 /* See STADB_ACTION_TYPE */
2204 __le32 action;
2205
2206 /* Peer MAC address */
2207 __u8 peer_addr[ETH_ALEN];
2208
2209 __le32 reserved;
2210
2211 /* Peer info - valid during add/update. */
2212 struct peer_capability_info peer_info;
2213 } __attribute__((packed));
2214
2215 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2216 struct ieee80211_vif *vif, __u32 action)
2217 {
2218 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2219 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2220 struct mwl8k_cmd_update_sta_db *cmd;
2221 struct peer_capability_info *peer_info;
2222 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2223 int rc;
2224 __u8 count, *rates;
2225
2226 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2227 if (cmd == NULL)
2228 return -ENOMEM;
2229
2230 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2231 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2232
2233 cmd->action = cpu_to_le32(action);
2234 peer_info = &cmd->peer_info;
2235 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2236
2237 switch (action) {
2238 case MWL8K_STA_DB_ADD_ENTRY:
2239 case MWL8K_STA_DB_MODIFY_ENTRY:
2240 /* Build peer_info block */
2241 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2242 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2243 peer_info->interop = 1;
2244 peer_info->amsdu_enabled = 0;
2245
2246 rates = peer_info->legacy_rates;
2247 for (count = 0; count < mv_vif->legacy_nrates; count++)
2248 rates[count] = bitrates[count].hw_value;
2249
2250 rc = mwl8k_post_cmd(hw, &cmd->header);
2251 if (rc == 0)
2252 mv_vif->peer_id = peer_info->station_id;
2253
2254 break;
2255
2256 case MWL8K_STA_DB_DEL_ENTRY:
2257 case MWL8K_STA_DB_FLUSH:
2258 default:
2259 rc = mwl8k_post_cmd(hw, &cmd->header);
2260 if (rc == 0)
2261 mv_vif->peer_id = 0;
2262 break;
2263 }
2264 kfree(cmd);
2265
2266 return rc;
2267 }
2268
2269 /*
2270 * CMD_SET_AID.
2271 */
2272 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2273
2274 #define MWL8K_FRAME_PROT_DISABLED 0x00
2275 #define MWL8K_FRAME_PROT_11G 0x07
2276 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2277 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2278
2279 struct mwl8k_cmd_update_set_aid {
2280 struct mwl8k_cmd_pkt header;
2281 __le16 aid;
2282
2283 /* AP's MAC address (BSSID) */
2284 __u8 bssid[ETH_ALEN];
2285 __le16 protection_mode;
2286 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2287 } __attribute__((packed));
2288
2289 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2290 struct ieee80211_vif *vif)
2291 {
2292 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2293 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2294 struct mwl8k_cmd_update_set_aid *cmd;
2295 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2296 int count;
2297 u16 prot_mode;
2298 int rc;
2299
2300 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2301 if (cmd == NULL)
2302 return -ENOMEM;
2303
2304 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2305 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2306 cmd->aid = cpu_to_le16(info->aid);
2307
2308 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2309
2310 if (info->use_cts_prot) {
2311 prot_mode = MWL8K_FRAME_PROT_11G;
2312 } else {
2313 switch (info->ht_operation_mode &
2314 IEEE80211_HT_OP_MODE_PROTECTION) {
2315 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2316 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2317 break;
2318 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2319 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2320 break;
2321 default:
2322 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2323 break;
2324 }
2325 }
2326 cmd->protection_mode = cpu_to_le16(prot_mode);
2327
2328 for (count = 0; count < mv_vif->legacy_nrates; count++)
2329 cmd->supp_rates[count] = bitrates[count].hw_value;
2330
2331 rc = mwl8k_post_cmd(hw, &cmd->header);
2332 kfree(cmd);
2333
2334 return rc;
2335 }
2336
2337 /*
2338 * CMD_SET_RATE.
2339 */
2340 struct mwl8k_cmd_update_rateset {
2341 struct mwl8k_cmd_pkt header;
2342 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2343
2344 /* Bitmap for supported MCS codes. */
2345 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2346 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2347 } __attribute__((packed));
2348
2349 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2350 struct ieee80211_vif *vif)
2351 {
2352 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2353 struct mwl8k_cmd_update_rateset *cmd;
2354 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2355 int count;
2356 int rc;
2357
2358 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2359 if (cmd == NULL)
2360 return -ENOMEM;
2361
2362 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2363 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2364
2365 for (count = 0; count < mv_vif->legacy_nrates; count++)
2366 cmd->legacy_rates[count] = bitrates[count].hw_value;
2367
2368 rc = mwl8k_post_cmd(hw, &cmd->header);
2369 kfree(cmd);
2370
2371 return rc;
2372 }
2373
2374 /*
2375 * CMD_USE_FIXED_RATE.
2376 */
2377 #define MWL8K_RATE_TABLE_SIZE 8
2378 #define MWL8K_UCAST_RATE 0
2379 #define MWL8K_USE_AUTO_RATE 0x0002
2380
2381 struct mwl8k_rate_entry {
2382 /* Set to 1 if HT rate, 0 if legacy. */
2383 __le32 is_ht_rate;
2384
2385 /* Set to 1 to use retry_count field. */
2386 __le32 enable_retry;
2387
2388 /* Specified legacy rate or MCS. */
2389 __le32 rate;
2390
2391 /* Number of allowed retries. */
2392 __le32 retry_count;
2393 } __attribute__((packed));
2394
2395 struct mwl8k_rate_table {
2396 /* 1 to allow specified rate and below */
2397 __le32 allow_rate_drop;
2398 __le32 num_rates;
2399 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2400 } __attribute__((packed));
2401
2402 struct mwl8k_cmd_use_fixed_rate {
2403 struct mwl8k_cmd_pkt header;
2404 __le32 action;
2405 struct mwl8k_rate_table rate_table;
2406
2407 /* Unicast, Broadcast or Multicast */
2408 __le32 rate_type;
2409 __le32 reserved1;
2410 __le32 reserved2;
2411 } __attribute__((packed));
2412
2413 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2414 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2415 {
2416 struct mwl8k_cmd_use_fixed_rate *cmd;
2417 int count;
2418 int rc;
2419
2420 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2421 if (cmd == NULL)
2422 return -ENOMEM;
2423
2424 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2425 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2426
2427 cmd->action = cpu_to_le32(action);
2428 cmd->rate_type = cpu_to_le32(rate_type);
2429
2430 if (rate_table != NULL) {
2431 /* Copy over each field manually so
2432 * that bitflipping can be done
2433 */
2434 cmd->rate_table.allow_rate_drop =
2435 cpu_to_le32(rate_table->allow_rate_drop);
2436 cmd->rate_table.num_rates =
2437 cpu_to_le32(rate_table->num_rates);
2438
2439 for (count = 0; count < rate_table->num_rates; count++) {
2440 struct mwl8k_rate_entry *dst =
2441 &cmd->rate_table.rate_entry[count];
2442 struct mwl8k_rate_entry *src =
2443 &rate_table->rate_entry[count];
2444
2445 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2446 dst->enable_retry = cpu_to_le32(src->enable_retry);
2447 dst->rate = cpu_to_le32(src->rate);
2448 dst->retry_count = cpu_to_le32(src->retry_count);
2449 }
2450 }
2451
2452 rc = mwl8k_post_cmd(hw, &cmd->header);
2453 kfree(cmd);
2454
2455 return rc;
2456 }
2457
2458
2459 /*
2460 * Interrupt handling.
2461 */
2462 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2463 {
2464 struct ieee80211_hw *hw = dev_id;
2465 struct mwl8k_priv *priv = hw->priv;
2466 u32 status;
2467
2468 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2469 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2470
2471 if (!status)
2472 return IRQ_NONE;
2473
2474 if (status & MWL8K_A2H_INT_TX_DONE)
2475 tasklet_schedule(&priv->tx_reclaim_task);
2476
2477 if (status & MWL8K_A2H_INT_RX_READY) {
2478 while (rxq_process(hw, 0, 1))
2479 rxq_refill(hw, 0, 1);
2480 }
2481
2482 if (status & MWL8K_A2H_INT_OPC_DONE) {
2483 if (priv->hostcmd_wait != NULL) {
2484 complete(priv->hostcmd_wait);
2485 priv->hostcmd_wait = NULL;
2486 }
2487 }
2488
2489 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2490 if (!priv->inconfig &&
2491 priv->radio_on &&
2492 mwl8k_txq_busy(priv))
2493 mwl8k_tx_start(priv);
2494 }
2495
2496 return IRQ_HANDLED;
2497 }
2498
2499
2500 /*
2501 * Core driver operations.
2502 */
2503 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2504 {
2505 struct mwl8k_priv *priv = hw->priv;
2506 int index = skb_get_queue_mapping(skb);
2507 int rc;
2508
2509 if (priv->current_channel == NULL) {
2510 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2511 "disabled\n", priv->name);
2512 dev_kfree_skb(skb);
2513 return NETDEV_TX_OK;
2514 }
2515
2516 rc = mwl8k_txq_xmit(hw, index, skb);
2517
2518 return rc;
2519 }
2520
2521 struct mwl8k_work_struct {
2522 /* Initialized by mwl8k_queue_work(). */
2523 struct work_struct wt;
2524
2525 /* Required field passed in to mwl8k_queue_work(). */
2526 struct ieee80211_hw *hw;
2527
2528 /* Required field passed in to mwl8k_queue_work(). */
2529 int (*wfunc)(struct work_struct *w);
2530
2531 /* Initialized by mwl8k_queue_work(). */
2532 struct completion *cmd_wait;
2533
2534 /* Result code. */
2535 int rc;
2536
2537 /*
2538 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2539 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2540 */
2541 u32 options;
2542
2543 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2544 unsigned long timeout_ms;
2545
2546 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2547 u32 txwait_attempts;
2548
2549 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2550 u32 tx_timeout_ms;
2551 u32 step;
2552 };
2553
2554 /* Flags controlling behavior of config queue requests */
2555
2556 /* Caller spins while waiting for completion. */
2557 #define MWL8K_WQ_SPIN 0x00000001
2558
2559 /* Wait for TX queues to empty before proceeding with configuration. */
2560 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2561
2562 /* Queue request and return immediately. */
2563 #define MWL8K_WQ_POST_REQUEST 0x00000004
2564
2565 /*
2566 * Caller sleeps and waits for task complete notification.
2567 * Do not use in atomic context.
2568 */
2569 #define MWL8K_WQ_SLEEP 0x00000008
2570
2571 /* Free work struct when task is done. */
2572 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2573
2574 /*
2575 * Config request is queued and returns to caller imediately. Use
2576 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2577 * when this flag is set.
2578 */
2579 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2580 MWL8K_WQ_FREE_WORKSTRUCT)
2581
2582 /* Default work queue behavior is to sleep and wait for tx completion. */
2583 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2584
2585 /*
2586 * Default config request timeout. Add adjustments to make sure the
2587 * config thread waits long enough for both tx wait and cmd wait before
2588 * timing out.
2589 */
2590
2591 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2592 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2593
2594 /* Default number of TX wait attempts. */
2595 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2596
2597 /* Total time to wait for TXQ to drain. */
2598 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2599 MWL8K_WQ_TXWAIT_ATTEMPTS)
2600
2601 /* Scheduling slop. */
2602 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2603
2604 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2605 MWL8K_TXWAIT_MS + \
2606 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2607
2608 static void mwl8k_config_thread(struct work_struct *wt)
2609 {
2610 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2611 struct ieee80211_hw *hw = worker->hw;
2612 struct mwl8k_priv *priv = hw->priv;
2613 int rc = 0;
2614
2615 spin_lock_irq(&priv->tx_lock);
2616 priv->inconfig = true;
2617 spin_unlock_irq(&priv->tx_lock);
2618
2619 ieee80211_stop_queues(hw);
2620
2621 /*
2622 * Wait for host queues to drain before doing PHY
2623 * reconfiguration. This avoids interrupting any in-flight
2624 * DMA transfers to the hardware.
2625 */
2626 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2627 u32 timeout;
2628 u32 time_remaining;
2629 u32 iter;
2630 u32 tx_wait_attempts = worker->txwait_attempts;
2631
2632 time_remaining = worker->tx_timeout_ms;
2633 if (!tx_wait_attempts)
2634 tx_wait_attempts = 1;
2635
2636 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2637 if (!timeout)
2638 timeout = 1;
2639
2640 iter = tx_wait_attempts;
2641 do {
2642 int wait_time;
2643
2644 if (time_remaining > timeout) {
2645 time_remaining -= timeout;
2646 wait_time = timeout;
2647 } else
2648 wait_time = time_remaining;
2649
2650 if (!wait_time)
2651 wait_time = 1;
2652
2653 rc = mwl8k_tx_wait_empty(hw, wait_time);
2654 if (rc)
2655 printk(KERN_ERR "%s() txwait timeout=%ums "
2656 "Retry:%u/%u\n", __func__, timeout,
2657 tx_wait_attempts - iter + 1,
2658 tx_wait_attempts);
2659
2660 } while (rc && --iter);
2661
2662 rc = iter ? 0 : -ETIMEDOUT;
2663 }
2664 if (!rc)
2665 rc = worker->wfunc(wt);
2666
2667 spin_lock_irq(&priv->tx_lock);
2668 priv->inconfig = false;
2669 if (priv->pending_tx_pkts && priv->radio_on)
2670 mwl8k_tx_start(priv);
2671 spin_unlock_irq(&priv->tx_lock);
2672 ieee80211_wake_queues(hw);
2673
2674 worker->rc = rc;
2675 if (worker->options & MWL8K_WQ_SLEEP)
2676 complete(worker->cmd_wait);
2677
2678 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2679 kfree(wt);
2680 }
2681
2682 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2683 struct mwl8k_work_struct *worker,
2684 struct workqueue_struct *wqueue,
2685 int (*wfunc)(struct work_struct *w))
2686 {
2687 unsigned long timeout = 0;
2688 int rc = 0;
2689
2690 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2691
2692 if (!worker->timeout_ms)
2693 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2694
2695 if (!worker->options)
2696 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2697
2698 if (!worker->txwait_attempts)
2699 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2700
2701 if (!worker->tx_timeout_ms)
2702 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2703
2704 worker->hw = hw;
2705 worker->cmd_wait = &cmd_wait;
2706 worker->rc = 1;
2707 worker->wfunc = wfunc;
2708
2709 INIT_WORK(&worker->wt, mwl8k_config_thread);
2710 queue_work(wqueue, &worker->wt);
2711
2712 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2713 rc = 0;
2714 } else {
2715 if (worker->options & MWL8K_WQ_SPIN) {
2716 timeout = worker->timeout_ms;
2717 while (timeout && (worker->rc > 0)) {
2718 mdelay(1);
2719 timeout--;
2720 }
2721 } else if (worker->options & MWL8K_WQ_SLEEP)
2722 timeout = wait_for_completion_timeout(&cmd_wait,
2723 msecs_to_jiffies(worker->timeout_ms));
2724
2725 if (timeout)
2726 rc = worker->rc;
2727 else {
2728 cancel_work_sync(&worker->wt);
2729 rc = -ETIMEDOUT;
2730 }
2731 }
2732
2733 return rc;
2734 }
2735
2736 struct mwl8k_start_worker {
2737 struct mwl8k_work_struct header;
2738 };
2739
2740 static int mwl8k_start_wt(struct work_struct *wt)
2741 {
2742 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2743 struct ieee80211_hw *hw = worker->header.hw;
2744 struct mwl8k_priv *priv = hw->priv;
2745 int rc = 0;
2746
2747 if (priv->vif != NULL) {
2748 rc = -EIO;
2749 goto mwl8k_start_exit;
2750 }
2751
2752 /* Turn on radio */
2753 if (mwl8k_cmd_802_11_radio_enable(hw)) {
2754 rc = -EIO;
2755 goto mwl8k_start_exit;
2756 }
2757
2758 /* Purge TX/RX HW queues */
2759 if (mwl8k_cmd_set_pre_scan(hw)) {
2760 rc = -EIO;
2761 goto mwl8k_start_exit;
2762 }
2763
2764 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2765 rc = -EIO;
2766 goto mwl8k_start_exit;
2767 }
2768
2769 /* Enable firmware rate adaptation */
2770 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2771 rc = -EIO;
2772 goto mwl8k_start_exit;
2773 }
2774
2775 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2776 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2777 rc = -EIO;
2778 goto mwl8k_start_exit;
2779 }
2780
2781 /* Disable sniffer mode */
2782 if (mwl8k_enable_sniffer(hw, 0))
2783 rc = -EIO;
2784
2785 mwl8k_start_exit:
2786 return rc;
2787 }
2788
2789 static int mwl8k_start(struct ieee80211_hw *hw)
2790 {
2791 struct mwl8k_start_worker *worker;
2792 struct mwl8k_priv *priv = hw->priv;
2793 int rc;
2794
2795 /* Enable tx reclaim tasklet */
2796 tasklet_enable(&priv->tx_reclaim_task);
2797
2798 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2799 IRQF_SHARED, MWL8K_NAME, hw);
2800 if (rc) {
2801 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2802 priv->name);
2803 rc = -EIO;
2804 goto mwl8k_start_disable_tasklet;
2805 }
2806
2807 /* Enable interrupts */
2808 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2809
2810 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2811 if (worker == NULL) {
2812 rc = -ENOMEM;
2813 goto mwl8k_start_disable_irq;
2814 }
2815
2816 rc = mwl8k_queue_work(hw, &worker->header,
2817 priv->config_wq, mwl8k_start_wt);
2818 kfree(worker);
2819 if (!rc)
2820 return rc;
2821
2822 if (rc == -ETIMEDOUT)
2823 printk(KERN_ERR "%s() timed out\n", __func__);
2824
2825 rc = -EIO;
2826
2827 mwl8k_start_disable_irq:
2828 spin_lock_irq(&priv->tx_lock);
2829 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2830 spin_unlock_irq(&priv->tx_lock);
2831 free_irq(priv->pdev->irq, hw);
2832
2833 mwl8k_start_disable_tasklet:
2834 tasklet_disable(&priv->tx_reclaim_task);
2835
2836 return rc;
2837 }
2838
2839 struct mwl8k_stop_worker {
2840 struct mwl8k_work_struct header;
2841 };
2842
2843 static int mwl8k_stop_wt(struct work_struct *wt)
2844 {
2845 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2846 struct ieee80211_hw *hw = worker->header.hw;
2847
2848 return mwl8k_cmd_802_11_radio_disable(hw);
2849 }
2850
2851 static void mwl8k_stop(struct ieee80211_hw *hw)
2852 {
2853 int rc;
2854 struct mwl8k_stop_worker *worker;
2855 struct mwl8k_priv *priv = hw->priv;
2856 int i;
2857
2858 if (priv->vif != NULL)
2859 return;
2860
2861 ieee80211_stop_queues(hw);
2862
2863 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2864 if (worker == NULL)
2865 return;
2866
2867 rc = mwl8k_queue_work(hw, &worker->header,
2868 priv->config_wq, mwl8k_stop_wt);
2869 kfree(worker);
2870 if (rc == -ETIMEDOUT)
2871 printk(KERN_ERR "%s() timed out\n", __func__);
2872
2873 /* Disable interrupts */
2874 spin_lock_irq(&priv->tx_lock);
2875 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2876 spin_unlock_irq(&priv->tx_lock);
2877 free_irq(priv->pdev->irq, hw);
2878
2879 /* Stop finalize join worker */
2880 cancel_work_sync(&priv->finalize_join_worker);
2881 if (priv->beacon_skb != NULL)
2882 dev_kfree_skb(priv->beacon_skb);
2883
2884 /* Stop tx reclaim tasklet */
2885 tasklet_disable(&priv->tx_reclaim_task);
2886
2887 /* Stop config thread */
2888 flush_workqueue(priv->config_wq);
2889
2890 /* Return all skbs to mac80211 */
2891 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2892 mwl8k_txq_reclaim(hw, i, 1);
2893 }
2894
2895 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2896 struct ieee80211_if_init_conf *conf)
2897 {
2898 struct mwl8k_priv *priv = hw->priv;
2899 struct mwl8k_vif *mwl8k_vif;
2900
2901 /*
2902 * We only support one active interface at a time.
2903 */
2904 if (priv->vif != NULL)
2905 return -EBUSY;
2906
2907 /*
2908 * We only support managed interfaces for now.
2909 */
2910 if (conf->type != NL80211_IFTYPE_STATION &&
2911 conf->type != NL80211_IFTYPE_MONITOR)
2912 return -EINVAL;
2913
2914 /* Clean out driver private area */
2915 mwl8k_vif = MWL8K_VIF(conf->vif);
2916 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2917
2918 /* Save the mac address */
2919 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2920
2921 /* Back pointer to parent config block */
2922 mwl8k_vif->priv = priv;
2923
2924 /* Setup initial PHY parameters */
2925 memcpy(mwl8k_vif->legacy_rates,
2926 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2927 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2928
2929 /* Set Initial sequence number to zero */
2930 mwl8k_vif->seqno = 0;
2931
2932 priv->vif = conf->vif;
2933 priv->current_channel = NULL;
2934
2935 return 0;
2936 }
2937
2938 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2939 struct ieee80211_if_init_conf *conf)
2940 {
2941 struct mwl8k_priv *priv = hw->priv;
2942
2943 if (priv->vif == NULL)
2944 return;
2945
2946 priv->vif = NULL;
2947 }
2948
2949 struct mwl8k_config_worker {
2950 struct mwl8k_work_struct header;
2951 u32 changed;
2952 };
2953
2954 static int mwl8k_config_wt(struct work_struct *wt)
2955 {
2956 struct mwl8k_config_worker *worker =
2957 (struct mwl8k_config_worker *)wt;
2958 struct ieee80211_hw *hw = worker->header.hw;
2959 struct ieee80211_conf *conf = &hw->conf;
2960 struct mwl8k_priv *priv = hw->priv;
2961 int rc = 0;
2962
2963 if (mwl8k_cmd_802_11_radio_enable(hw)) {
2964 rc = -EINVAL;
2965 goto mwl8k_config_exit;
2966 }
2967
2968 priv->current_channel = conf->channel;
2969
2970 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
2971 rc = -EINVAL;
2972 goto mwl8k_config_exit;
2973 }
2974
2975 if (conf->power_level > 18)
2976 conf->power_level = 18;
2977 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
2978 rc = -EINVAL;
2979 goto mwl8k_config_exit;
2980 }
2981
2982 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2983 rc = -EINVAL;
2984
2985 mwl8k_config_exit:
2986 return rc;
2987 }
2988
2989 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2990 {
2991 int rc = 0;
2992 struct mwl8k_config_worker *worker;
2993 struct mwl8k_priv *priv = hw->priv;
2994
2995 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2996 if (worker == NULL)
2997 return -ENOMEM;
2998
2999 worker->changed = changed;
3000 rc = mwl8k_queue_work(hw, &worker->header,
3001 priv->config_wq, mwl8k_config_wt);
3002 if (rc == -ETIMEDOUT) {
3003 printk(KERN_ERR "%s() timed out.\n", __func__);
3004 rc = -EINVAL;
3005 }
3006
3007 kfree(worker);
3008
3009 /*
3010 * mac80211 will crash on anything other than -EINVAL on
3011 * error. Looks like wireless extensions which calls mac80211
3012 * may be the actual culprit...
3013 */
3014 return rc ? -EINVAL : 0;
3015 }
3016
3017 struct mwl8k_bss_info_changed_worker {
3018 struct mwl8k_work_struct header;
3019 struct ieee80211_vif *vif;
3020 struct ieee80211_bss_conf *info;
3021 u32 changed;
3022 };
3023
3024 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3025 {
3026 struct mwl8k_bss_info_changed_worker *worker =
3027 (struct mwl8k_bss_info_changed_worker *)wt;
3028 struct ieee80211_hw *hw = worker->header.hw;
3029 struct ieee80211_vif *vif = worker->vif;
3030 struct ieee80211_bss_conf *info = worker->info;
3031 u32 changed;
3032 int rc;
3033
3034 struct mwl8k_priv *priv = hw->priv;
3035 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3036
3037 changed = worker->changed;
3038 priv->capture_beacon = false;
3039
3040 if (info->assoc) {
3041 memcpy(&mwl8k_vif->bss_info, info,
3042 sizeof(struct ieee80211_bss_conf));
3043
3044 /* Install rates */
3045 if (mwl8k_update_rateset(hw, vif))
3046 goto mwl8k_bss_info_changed_exit;
3047
3048 /* Turn on rate adaptation */
3049 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3050 MWL8K_UCAST_RATE, NULL))
3051 goto mwl8k_bss_info_changed_exit;
3052
3053 /* Set radio preamble */
3054 if (mwl8k_set_radio_preamble(hw,
3055 info->use_short_preamble))
3056 goto mwl8k_bss_info_changed_exit;
3057
3058 /* Set slot time */
3059 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3060 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3061 goto mwl8k_bss_info_changed_exit;
3062
3063 /* Update peer rate info */
3064 if (mwl8k_cmd_update_sta_db(hw, vif,
3065 MWL8K_STA_DB_MODIFY_ENTRY))
3066 goto mwl8k_bss_info_changed_exit;
3067
3068 /* Set AID */
3069 if (mwl8k_cmd_set_aid(hw, vif))
3070 goto mwl8k_bss_info_changed_exit;
3071
3072 /*
3073 * Finalize the join. Tell rx handler to process
3074 * next beacon from our BSSID.
3075 */
3076 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
3077 priv->capture_beacon = true;
3078 } else {
3079 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3080 memset(&mwl8k_vif->bss_info, 0,
3081 sizeof(struct ieee80211_bss_conf));
3082 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
3083 }
3084
3085 mwl8k_bss_info_changed_exit:
3086 rc = 0;
3087 return rc;
3088 }
3089
3090 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3091 struct ieee80211_vif *vif,
3092 struct ieee80211_bss_conf *info,
3093 u32 changed)
3094 {
3095 struct mwl8k_bss_info_changed_worker *worker;
3096 struct mwl8k_priv *priv = hw->priv;
3097 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3098 int rc;
3099
3100 if (changed & BSS_CHANGED_BSSID)
3101 memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
3102
3103 if ((changed & BSS_CHANGED_ASSOC) == 0)
3104 return;
3105
3106 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3107 if (worker == NULL)
3108 return;
3109
3110 worker->vif = vif;
3111 worker->info = info;
3112 worker->changed = changed;
3113 rc = mwl8k_queue_work(hw, &worker->header,
3114 priv->config_wq,
3115 mwl8k_bss_info_changed_wt);
3116 kfree(worker);
3117 if (rc == -ETIMEDOUT)
3118 printk(KERN_ERR "%s() timed out\n", __func__);
3119 }
3120
3121 struct mwl8k_configure_filter_worker {
3122 struct mwl8k_work_struct header;
3123 unsigned int changed_flags;
3124 unsigned int *total_flags;
3125 int mc_count;
3126 struct dev_addr_list *mclist;
3127 };
3128
3129 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3130
3131 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3132 {
3133 struct mwl8k_configure_filter_worker *worker =
3134 (struct mwl8k_configure_filter_worker *)wt;
3135
3136 struct ieee80211_hw *hw = worker->header.hw;
3137 unsigned int changed_flags = worker->changed_flags;
3138 unsigned int *total_flags = worker->total_flags;
3139 int mc_count = worker->mc_count;
3140 struct dev_addr_list *mclist = worker->mclist;
3141
3142 struct mwl8k_priv *priv = hw->priv;
3143 int rc = 0;
3144
3145 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3146 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3147 rc = mwl8k_cmd_set_pre_scan(hw);
3148 else {
3149 u8 *bssid;
3150
3151 bssid = "\x00\x00\x00\x00\x00\x00";
3152 if (priv->vif != NULL)
3153 bssid = MWL8K_VIF(priv->vif)->bssid;
3154
3155 rc = mwl8k_cmd_set_post_scan(hw, bssid);
3156 }
3157 }
3158
3159 if (rc)
3160 goto mwl8k_configure_filter_exit;
3161 if (mc_count) {
3162 if (mc_count > priv->num_mcaddrs)
3163 mc_count = priv->num_mcaddrs;
3164
3165 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3166 if (rc)
3167 printk(KERN_ERR
3168 "%s()Error setting multicast addresses\n",
3169 __func__);
3170 }
3171
3172 mwl8k_configure_filter_exit:
3173 return rc;
3174 }
3175
3176 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3177 int mc_count, struct dev_addr_list *mclist)
3178 {
3179 struct mwl8k_configure_filter_worker *worker;
3180
3181 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3182
3183 if (!worker)
3184 return 0;
3185
3186 /*
3187 * XXX: This is _HORRIBLY_ broken!!
3188 *
3189 * No locking, the mclist pointer might be invalid as soon as this
3190 * function returns, something in the list might be invalidated
3191 * once we get to the worker, etc...
3192 */
3193 worker->mc_count = mc_count;
3194 worker->mclist = mclist;
3195
3196 return (u64)worker;
3197 }
3198
3199 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3200 unsigned int changed_flags,
3201 unsigned int *total_flags,
3202 u64 multicast)
3203 {
3204
3205 struct mwl8k_configure_filter_worker *worker = (void *)multicast;
3206 struct mwl8k_priv *priv = hw->priv;
3207
3208 /* Clear unsupported feature flags */
3209 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3210
3211 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
3212 return;
3213
3214 if (worker == NULL)
3215 return;
3216
3217 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3218 worker->changed_flags = changed_flags;
3219 worker->total_flags = total_flags;
3220
3221 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3222 mwl8k_configure_filter_wt);
3223 }
3224
3225 struct mwl8k_set_rts_threshold_worker {
3226 struct mwl8k_work_struct header;
3227 u32 value;
3228 };
3229
3230 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3231 {
3232 struct mwl8k_set_rts_threshold_worker *worker =
3233 (struct mwl8k_set_rts_threshold_worker *)wt;
3234
3235 struct ieee80211_hw *hw = worker->header.hw;
3236 u16 threshold = (u16)(worker->value);
3237 int rc;
3238
3239 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3240
3241 return rc;
3242 }
3243
3244 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3245 {
3246 int rc;
3247 struct mwl8k_set_rts_threshold_worker *worker;
3248 struct mwl8k_priv *priv = hw->priv;
3249
3250 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3251 if (worker == NULL)
3252 return -ENOMEM;
3253
3254 worker->value = value;
3255
3256 rc = mwl8k_queue_work(hw, &worker->header,
3257 priv->config_wq,
3258 mwl8k_set_rts_threshold_wt);
3259 kfree(worker);
3260
3261 if (rc == -ETIMEDOUT) {
3262 printk(KERN_ERR "%s() timed out\n", __func__);
3263 rc = -EINVAL;
3264 }
3265
3266 return rc;
3267 }
3268
3269 struct mwl8k_conf_tx_worker {
3270 struct mwl8k_work_struct header;
3271 u16 queue;
3272 const struct ieee80211_tx_queue_params *params;
3273 };
3274
3275 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3276 {
3277 struct mwl8k_conf_tx_worker *worker =
3278 (struct mwl8k_conf_tx_worker *)wt;
3279
3280 struct ieee80211_hw *hw = worker->header.hw;
3281 u16 queue = worker->queue;
3282 const struct ieee80211_tx_queue_params *params = worker->params;
3283
3284 struct mwl8k_priv *priv = hw->priv;
3285 int rc = 0;
3286
3287 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3288 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3289 rc = -EINVAL;
3290 goto mwl8k_conf_tx_exit;
3291 }
3292
3293 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3294 params->cw_max, params->aifs, params->txop))
3295 rc = -EINVAL;
3296 mwl8k_conf_tx_exit:
3297 return rc;
3298 }
3299
3300 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3301 const struct ieee80211_tx_queue_params *params)
3302 {
3303 int rc;
3304 struct mwl8k_conf_tx_worker *worker;
3305 struct mwl8k_priv *priv = hw->priv;
3306
3307 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3308 if (worker == NULL)
3309 return -ENOMEM;
3310
3311 worker->queue = queue;
3312 worker->params = params;
3313 rc = mwl8k_queue_work(hw, &worker->header,
3314 priv->config_wq, mwl8k_conf_tx_wt);
3315 kfree(worker);
3316 if (rc == -ETIMEDOUT) {
3317 printk(KERN_ERR "%s() timed out\n", __func__);
3318 rc = -EINVAL;
3319 }
3320 return rc;
3321 }
3322
3323 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3324 struct ieee80211_tx_queue_stats *stats)
3325 {
3326 struct mwl8k_priv *priv = hw->priv;
3327 struct mwl8k_tx_queue *txq;
3328 int index;
3329
3330 spin_lock_bh(&priv->tx_lock);
3331 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3332 txq = priv->txq + index;
3333 memcpy(&stats[index], &txq->tx_stats,
3334 sizeof(struct ieee80211_tx_queue_stats));
3335 }
3336 spin_unlock_bh(&priv->tx_lock);
3337 return 0;
3338 }
3339
3340 struct mwl8k_get_stats_worker {
3341 struct mwl8k_work_struct header;
3342 struct ieee80211_low_level_stats *stats;
3343 };
3344
3345 static int mwl8k_get_stats_wt(struct work_struct *wt)
3346 {
3347 struct mwl8k_get_stats_worker *worker =
3348 (struct mwl8k_get_stats_worker *)wt;
3349
3350 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3351 }
3352
3353 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3354 struct ieee80211_low_level_stats *stats)
3355 {
3356 int rc;
3357 struct mwl8k_get_stats_worker *worker;
3358 struct mwl8k_priv *priv = hw->priv;
3359
3360 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3361 if (worker == NULL)
3362 return -ENOMEM;
3363
3364 worker->stats = stats;
3365 rc = mwl8k_queue_work(hw, &worker->header,
3366 priv->config_wq, mwl8k_get_stats_wt);
3367
3368 kfree(worker);
3369 if (rc == -ETIMEDOUT) {
3370 printk(KERN_ERR "%s() timed out\n", __func__);
3371 rc = -EINVAL;
3372 }
3373
3374 return rc;
3375 }
3376
3377 static const struct ieee80211_ops mwl8k_ops = {
3378 .tx = mwl8k_tx,
3379 .start = mwl8k_start,
3380 .stop = mwl8k_stop,
3381 .add_interface = mwl8k_add_interface,
3382 .remove_interface = mwl8k_remove_interface,
3383 .config = mwl8k_config,
3384 .bss_info_changed = mwl8k_bss_info_changed,
3385 .prepare_multicast = mwl8k_prepare_multicast,
3386 .configure_filter = mwl8k_configure_filter,
3387 .set_rts_threshold = mwl8k_set_rts_threshold,
3388 .conf_tx = mwl8k_conf_tx,
3389 .get_tx_stats = mwl8k_get_tx_stats,
3390 .get_stats = mwl8k_get_stats,
3391 };
3392
3393 static void mwl8k_tx_reclaim_handler(unsigned long data)
3394 {
3395 int i;
3396 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3397 struct mwl8k_priv *priv = hw->priv;
3398
3399 spin_lock_bh(&priv->tx_lock);
3400 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3401 mwl8k_txq_reclaim(hw, i, 0);
3402
3403 if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
3404 complete(priv->tx_wait);
3405 priv->tx_wait = NULL;
3406 }
3407 spin_unlock_bh(&priv->tx_lock);
3408 }
3409
3410 static void mwl8k_finalize_join_worker(struct work_struct *work)
3411 {
3412 struct mwl8k_priv *priv =
3413 container_of(work, struct mwl8k_priv, finalize_join_worker);
3414 struct sk_buff *skb = priv->beacon_skb;
3415 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3416
3417 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3418 dev_kfree_skb(skb);
3419
3420 priv->beacon_skb = NULL;
3421 }
3422
3423 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3424 const struct pci_device_id *id)
3425 {
3426 struct ieee80211_hw *hw;
3427 struct mwl8k_priv *priv;
3428 int rc;
3429 int i;
3430 u8 *fw;
3431
3432 rc = pci_enable_device(pdev);
3433 if (rc) {
3434 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3435 MWL8K_NAME);
3436 return rc;
3437 }
3438
3439 rc = pci_request_regions(pdev, MWL8K_NAME);
3440 if (rc) {
3441 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3442 MWL8K_NAME);
3443 return rc;
3444 }
3445
3446 pci_set_master(pdev);
3447
3448 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3449 if (hw == NULL) {
3450 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3451 rc = -ENOMEM;
3452 goto err_free_reg;
3453 }
3454
3455 priv = hw->priv;
3456 priv->hw = hw;
3457 priv->pdev = pdev;
3458 priv->hostcmd_wait = NULL;
3459 priv->tx_wait = NULL;
3460 priv->inconfig = false;
3461 priv->wmm_mode = false;
3462 priv->pending_tx_pkts = 0;
3463 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3464
3465 spin_lock_init(&priv->fw_lock);
3466
3467 SET_IEEE80211_DEV(hw, &pdev->dev);
3468 pci_set_drvdata(pdev, hw);
3469
3470 priv->regs = pci_iomap(pdev, 1, 0x10000);
3471 if (priv->regs == NULL) {
3472 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3473 goto err_iounmap;
3474 }
3475
3476 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3477 priv->band.band = IEEE80211_BAND_2GHZ;
3478 priv->band.channels = priv->channels;
3479 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3480 priv->band.bitrates = priv->rates;
3481 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3482 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3483
3484 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3485 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3486
3487 /*
3488 * Extra headroom is the size of the required DMA header
3489 * minus the size of the smallest 802.11 frame (CTS frame).
3490 */
3491 hw->extra_tx_headroom =
3492 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3493
3494 hw->channel_change_time = 10;
3495
3496 hw->queues = MWL8K_TX_QUEUES;
3497
3498 hw->wiphy->interface_modes =
3499 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3500
3501 /* Set rssi and noise values to dBm */
3502 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3503 hw->vif_data_size = sizeof(struct mwl8k_vif);
3504 priv->vif = NULL;
3505
3506 /* Set default radio state and preamble */
3507 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3508 priv->radio_on = 0;
3509
3510 /* Finalize join worker */
3511 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3512
3513 /* TX reclaim tasklet */
3514 tasklet_init(&priv->tx_reclaim_task,
3515 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3516 tasklet_disable(&priv->tx_reclaim_task);
3517
3518 /* Config workthread */
3519 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3520 if (priv->config_wq == NULL)
3521 goto err_iounmap;
3522
3523 /* Power management cookie */
3524 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3525 if (priv->cookie == NULL)
3526 goto err_iounmap;
3527
3528 rc = mwl8k_rxq_init(hw, 0);
3529 if (rc)
3530 goto err_iounmap;
3531 rxq_refill(hw, 0, INT_MAX);
3532
3533 spin_lock_init(&priv->tx_lock);
3534
3535 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3536 rc = mwl8k_txq_init(hw, i);
3537 if (rc)
3538 goto err_free_queues;
3539 }
3540
3541 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3542 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3543 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3544 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3545
3546 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3547 IRQF_SHARED, MWL8K_NAME, hw);
3548 if (rc) {
3549 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3550 priv->name);
3551 goto err_free_queues;
3552 }
3553
3554 /* Reset firmware and hardware */
3555 mwl8k_hw_reset(priv);
3556
3557 /* Ask userland hotplug daemon for the device firmware */
3558 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3559 if (rc) {
3560 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3561 goto err_free_irq;
3562 }
3563
3564 /* Load firmware into hardware */
3565 rc = mwl8k_load_firmware(priv);
3566 if (rc) {
3567 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3568 goto err_stop_firmware;
3569 }
3570
3571 /* Reclaim memory once firmware is successfully loaded */
3572 mwl8k_release_firmware(priv);
3573
3574 /*
3575 * Temporarily enable interrupts. Initial firmware host
3576 * commands use interrupts and avoids polling. Disable
3577 * interrupts when done.
3578 */
3579 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3580
3581 /* Get config data, mac addrs etc */
3582 rc = mwl8k_cmd_get_hw_spec(hw);
3583 if (rc) {
3584 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3585 goto err_stop_firmware;
3586 }
3587
3588 /* Turn radio off */
3589 rc = mwl8k_cmd_802_11_radio_disable(hw);
3590 if (rc) {
3591 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3592 goto err_stop_firmware;
3593 }
3594
3595 /* Disable interrupts */
3596 spin_lock_irq(&priv->tx_lock);
3597 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3598 spin_unlock_irq(&priv->tx_lock);
3599 free_irq(priv->pdev->irq, hw);
3600
3601 rc = ieee80211_register_hw(hw);
3602 if (rc) {
3603 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3604 goto err_stop_firmware;
3605 }
3606
3607 fw = (u8 *)&priv->fw_rev;
3608 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3609 MWL8K_DESC);
3610 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3611 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3612 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3613 hw->wiphy->perm_addr);
3614
3615 return 0;
3616
3617 err_stop_firmware:
3618 mwl8k_hw_reset(priv);
3619 mwl8k_release_firmware(priv);
3620
3621 err_free_irq:
3622 spin_lock_irq(&priv->tx_lock);
3623 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3624 spin_unlock_irq(&priv->tx_lock);
3625 free_irq(priv->pdev->irq, hw);
3626
3627 err_free_queues:
3628 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3629 mwl8k_txq_deinit(hw, i);
3630 mwl8k_rxq_deinit(hw, 0);
3631
3632 err_iounmap:
3633 if (priv->cookie != NULL)
3634 pci_free_consistent(priv->pdev, 4,
3635 priv->cookie, priv->cookie_dma);
3636
3637 if (priv->regs != NULL)
3638 pci_iounmap(pdev, priv->regs);
3639
3640 if (priv->config_wq != NULL)
3641 destroy_workqueue(priv->config_wq);
3642
3643 pci_set_drvdata(pdev, NULL);
3644 ieee80211_free_hw(hw);
3645
3646 err_free_reg:
3647 pci_release_regions(pdev);
3648 pci_disable_device(pdev);
3649
3650 return rc;
3651 }
3652
3653 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3654 {
3655 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3656 }
3657
3658 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3659 {
3660 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3661 struct mwl8k_priv *priv;
3662 int i;
3663
3664 if (hw == NULL)
3665 return;
3666 priv = hw->priv;
3667
3668 ieee80211_stop_queues(hw);
3669
3670 ieee80211_unregister_hw(hw);
3671
3672 /* Remove tx reclaim tasklet */
3673 tasklet_kill(&priv->tx_reclaim_task);
3674
3675 /* Stop config thread */
3676 destroy_workqueue(priv->config_wq);
3677
3678 /* Stop hardware */
3679 mwl8k_hw_reset(priv);
3680
3681 /* Return all skbs to mac80211 */
3682 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3683 mwl8k_txq_reclaim(hw, i, 1);
3684
3685 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3686 mwl8k_txq_deinit(hw, i);
3687
3688 mwl8k_rxq_deinit(hw, 0);
3689
3690 pci_free_consistent(priv->pdev, 4,
3691 priv->cookie, priv->cookie_dma);
3692
3693 pci_iounmap(pdev, priv->regs);
3694 pci_set_drvdata(pdev, NULL);
3695 ieee80211_free_hw(hw);
3696 pci_release_regions(pdev);
3697 pci_disable_device(pdev);
3698 }
3699
3700 static struct pci_driver mwl8k_driver = {
3701 .name = MWL8K_NAME,
3702 .id_table = mwl8k_table,
3703 .probe = mwl8k_probe,
3704 .remove = __devexit_p(mwl8k_remove),
3705 .shutdown = __devexit_p(mwl8k_shutdown),
3706 };
3707
3708 static int __init mwl8k_init(void)
3709 {
3710 return pci_register_driver(&mwl8k_driver);
3711 }
3712
3713 static void __exit mwl8k_exit(void)
3714 {
3715 pci_unregister_driver(&mwl8k_driver);
3716 }
3717
3718 module_init(mwl8k_init);
3719 module_exit(mwl8k_exit);
Motorola kernel-slsi