2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table
) = {
32 { PCI_VDEVICE(MARVELL
, 0x2a2b), .driver_data
= 8687, },
33 { PCI_VDEVICE(MARVELL
, 0x2a30), .driver_data
= 8687, },
36 MODULE_DEVICE_TABLE(pci
, mwl8k_table
);
38 /* Register definitions */
39 #define MWL8K_HIU_GEN_PTR 0x00000c10
40 #define MWL8K_MODE_STA 0x0000005a
41 #define MWL8K_MODE_AP 0x000000a5
42 #define MWL8K_HIU_INT_CODE 0x00000c14
43 #define MWL8K_FWSTA_READY 0xf0f1f2f4
44 #define MWL8K_FWAP_READY 0xf1f2f4a5
45 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
46 #define MWL8K_HIU_SCRATCH 0x00000c40
48 /* Host->device communications */
49 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
54 #define MWL8K_H2A_INT_DUMMY (1 << 20)
55 #define MWL8K_H2A_INT_RESET (1 << 15)
56 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
57 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
59 /* Device->host communications */
60 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
65 #define MWL8K_A2H_INT_DUMMY (1 << 20)
66 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73 #define MWL8K_A2H_INT_RX_READY (1 << 1)
74 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
76 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
87 #define MWL8K_RX_QUEUES 1
88 #define MWL8K_TX_QUEUES 4
90 struct mwl8k_rx_queue
{
93 /* hw receives here */
96 /* refill descs here */
99 struct mwl8k_rx_desc
*rx_desc_area
;
100 dma_addr_t rx_desc_dma
;
101 struct sk_buff
**rx_skb
;
104 struct mwl8k_tx_queue
{
105 /* hw transmits here */
108 /* sw appends here */
111 struct ieee80211_tx_queue_stats tx_stats
;
112 struct mwl8k_tx_desc
*tx_desc_area
;
113 dma_addr_t tx_desc_dma
;
114 struct sk_buff
**tx_skb
;
117 /* Pointers to the firmware data and meta information about it. */
118 struct mwl8k_firmware
{
120 struct firmware
*ucode
;
122 /* Boot helper code */
123 struct firmware
*helper
;
128 struct ieee80211_hw
*hw
;
130 struct pci_dev
*pdev
;
132 /* firmware files and meta data */
133 struct mwl8k_firmware fw
;
136 /* firmware access */
137 struct mutex fw_mutex
;
138 struct task_struct
*fw_mutex_owner
;
140 struct completion
*hostcmd_wait
;
142 /* lock held over TX and TX reap */
145 /* TX quiesce completion, protected by fw_mutex and tx_lock */
146 struct completion
*tx_wait
;
148 struct ieee80211_vif
*vif
;
150 struct ieee80211_channel
*current_channel
;
152 /* power management status cookie from firmware */
154 dma_addr_t cookie_dma
;
161 * Running count of TX packets in flight, to avoid
162 * iterating over the transmit rings each time.
166 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
167 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
170 struct ieee80211_supported_band band
;
171 struct ieee80211_channel channels
[14];
172 struct ieee80211_rate rates
[12];
175 bool radio_short_preamble
;
178 /* XXX need to convert this to handle multiple interfaces */
180 u8 capture_bssid
[ETH_ALEN
];
181 struct sk_buff
*beacon_skb
;
184 * This FJ worker has to be global as it is scheduled from the
185 * RX handler. At this point we don't know which interface it
186 * belongs to until the list of bssids waiting to complete join
189 struct work_struct finalize_join_worker
;
191 /* Tasklet to reclaim TX descriptors and buffers after tx */
192 struct tasklet_struct tx_reclaim_task
;
195 /* Per interface specific private data */
197 /* backpointer to parent config block */
198 struct mwl8k_priv
*priv
;
200 /* BSS config of AP or IBSS from mac80211*/
201 struct ieee80211_bss_conf bss_info
;
203 /* BSSID of AP or IBSS */
205 u8 mac_addr
[ETH_ALEN
];
208 * Subset of supported legacy rates.
209 * Intersection of AP and STA supported rates.
211 struct ieee80211_rate legacy_rates
[12];
213 /* number of supported legacy rates */
216 /* Index into station database.Returned by update_sta_db call */
219 /* Non AMPDU sequence number assigned by driver */
223 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
225 static const struct ieee80211_channel mwl8k_channels
[] = {
226 { .center_freq
= 2412, .hw_value
= 1, },
227 { .center_freq
= 2417, .hw_value
= 2, },
228 { .center_freq
= 2422, .hw_value
= 3, },
229 { .center_freq
= 2427, .hw_value
= 4, },
230 { .center_freq
= 2432, .hw_value
= 5, },
231 { .center_freq
= 2437, .hw_value
= 6, },
232 { .center_freq
= 2442, .hw_value
= 7, },
233 { .center_freq
= 2447, .hw_value
= 8, },
234 { .center_freq
= 2452, .hw_value
= 9, },
235 { .center_freq
= 2457, .hw_value
= 10, },
236 { .center_freq
= 2462, .hw_value
= 11, },
239 static const struct ieee80211_rate mwl8k_rates
[] = {
240 { .bitrate
= 10, .hw_value
= 2, },
241 { .bitrate
= 20, .hw_value
= 4, },
242 { .bitrate
= 55, .hw_value
= 11, },
243 { .bitrate
= 60, .hw_value
= 12, },
244 { .bitrate
= 90, .hw_value
= 18, },
245 { .bitrate
= 110, .hw_value
= 22, },
246 { .bitrate
= 120, .hw_value
= 24, },
247 { .bitrate
= 180, .hw_value
= 36, },
248 { .bitrate
= 240, .hw_value
= 48, },
249 { .bitrate
= 360, .hw_value
= 72, },
250 { .bitrate
= 480, .hw_value
= 96, },
251 { .bitrate
= 540, .hw_value
= 108, },
254 /* Set or get info from Firmware */
255 #define MWL8K_CMD_SET 0x0001
256 #define MWL8K_CMD_GET 0x0000
258 /* Firmware command codes */
259 #define MWL8K_CMD_CODE_DNLD 0x0001
260 #define MWL8K_CMD_GET_HW_SPEC 0x0003
261 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
262 #define MWL8K_CMD_GET_STAT 0x0014
263 #define MWL8K_CMD_RADIO_CONTROL 0x001c
264 #define MWL8K_CMD_RF_TX_POWER 0x001e
265 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
266 #define MWL8K_CMD_SET_POST_SCAN 0x0108
267 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
268 #define MWL8K_CMD_SET_AID 0x010d
269 #define MWL8K_CMD_SET_RATE 0x0110
270 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
271 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
272 #define MWL8K_CMD_SET_SLOT 0x0114
273 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
274 #define MWL8K_CMD_SET_WMM_MODE 0x0123
275 #define MWL8K_CMD_MIMO_CONFIG 0x0125
276 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
277 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
278 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
279 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
280 #define MWL8K_CMD_UPDATE_STADB 0x1123
282 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
284 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
285 snprintf(buf, bufsize, "%s", #x);\
288 switch (cmd
& ~0x8000) {
289 MWL8K_CMDNAME(CODE_DNLD
);
290 MWL8K_CMDNAME(GET_HW_SPEC
);
291 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
292 MWL8K_CMDNAME(GET_STAT
);
293 MWL8K_CMDNAME(RADIO_CONTROL
);
294 MWL8K_CMDNAME(RF_TX_POWER
);
295 MWL8K_CMDNAME(SET_PRE_SCAN
);
296 MWL8K_CMDNAME(SET_POST_SCAN
);
297 MWL8K_CMDNAME(SET_RF_CHANNEL
);
298 MWL8K_CMDNAME(SET_AID
);
299 MWL8K_CMDNAME(SET_RATE
);
300 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
301 MWL8K_CMDNAME(RTS_THRESHOLD
);
302 MWL8K_CMDNAME(SET_SLOT
);
303 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
304 MWL8K_CMDNAME(SET_WMM_MODE
);
305 MWL8K_CMDNAME(MIMO_CONFIG
);
306 MWL8K_CMDNAME(USE_FIXED_RATE
);
307 MWL8K_CMDNAME(ENABLE_SNIFFER
);
308 MWL8K_CMDNAME(SET_MAC_ADDR
);
309 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
310 MWL8K_CMDNAME(UPDATE_STADB
);
312 snprintf(buf
, bufsize
, "0x%x", cmd
);
319 /* Hardware and firmware reset */
320 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
322 iowrite32(MWL8K_H2A_INT_RESET
,
323 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
324 iowrite32(MWL8K_H2A_INT_RESET
,
325 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
329 /* Release fw image */
330 static void mwl8k_release_fw(struct firmware
**fw
)
334 release_firmware(*fw
);
338 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
340 mwl8k_release_fw(&priv
->fw
.ucode
);
341 mwl8k_release_fw(&priv
->fw
.helper
);
344 /* Request fw image */
345 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
346 const char *fname
, struct firmware
**fw
)
348 /* release current image */
350 mwl8k_release_fw(fw
);
352 return request_firmware((const struct firmware
**)fw
,
353 fname
, &priv
->pdev
->dev
);
356 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
, u32 part_num
)
361 priv
->part_num
= part_num
;
363 snprintf(filename
, sizeof(filename
),
364 "mwl8k/helper_%u.fw", priv
->part_num
);
366 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.helper
);
368 printk(KERN_ERR
"%s: Error requesting helper firmware "
369 "file %s\n", pci_name(priv
->pdev
), filename
);
373 snprintf(filename
, sizeof(filename
),
374 "mwl8k/fmimage_%u.fw", priv
->part_num
);
376 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.ucode
);
378 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
379 pci_name(priv
->pdev
), filename
);
380 mwl8k_release_fw(&priv
->fw
.helper
);
387 struct mwl8k_cmd_pkt
{
393 } __attribute__((packed
));
399 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
401 void __iomem
*regs
= priv
->regs
;
405 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
406 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
409 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
410 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
411 iowrite32(MWL8K_H2A_INT_DOORBELL
,
412 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
413 iowrite32(MWL8K_H2A_INT_DUMMY
,
414 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
420 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
421 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
422 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
430 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
432 return loops
? 0 : -ETIMEDOUT
;
435 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
436 const u8
*data
, size_t length
)
438 struct mwl8k_cmd_pkt
*cmd
;
442 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
446 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
452 int block_size
= length
> 256 ? 256 : length
;
454 memcpy(cmd
->payload
, data
+ done
, block_size
);
455 cmd
->length
= cpu_to_le16(block_size
);
457 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
458 sizeof(*cmd
) + block_size
);
463 length
-= block_size
;
468 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
476 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
477 const u8
*data
, size_t length
)
479 unsigned char *buffer
;
480 int may_continue
, rc
= 0;
481 u32 done
, prev_block_size
;
483 buffer
= kmalloc(1024, GFP_KERNEL
);
490 while (may_continue
> 0) {
493 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
494 if (block_size
& 1) {
498 done
+= prev_block_size
;
499 length
-= prev_block_size
;
502 if (block_size
> 1024 || block_size
> length
) {
512 if (block_size
== 0) {
519 prev_block_size
= block_size
;
520 memcpy(buffer
, data
+ done
, block_size
);
522 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
527 if (!rc
&& length
!= 0)
535 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
537 struct mwl8k_priv
*priv
= hw
->priv
;
538 struct firmware
*fw
= priv
->fw
.ucode
;
542 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
543 struct firmware
*helper
= priv
->fw
.helper
;
545 if (helper
== NULL
) {
546 printk(KERN_ERR
"%s: helper image needed but none "
547 "given\n", pci_name(priv
->pdev
));
551 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
553 printk(KERN_ERR
"%s: unable to load firmware "
554 "helper image\n", pci_name(priv
->pdev
));
559 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
561 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
565 printk(KERN_ERR
"%s: unable to load firmware image\n",
566 pci_name(priv
->pdev
));
570 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
575 if (ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
)
576 == MWL8K_FWSTA_READY
)
581 return loops
? 0 : -ETIMEDOUT
;
586 * Defines shared between transmission and reception.
588 /* HT control fields for firmware */
593 } __attribute__((packed
));
595 /* Firmware Station database operations */
596 #define MWL8K_STA_DB_ADD_ENTRY 0
597 #define MWL8K_STA_DB_MODIFY_ENTRY 1
598 #define MWL8K_STA_DB_DEL_ENTRY 2
599 #define MWL8K_STA_DB_FLUSH 3
601 /* Peer Entry flags - used to define the type of the peer node */
602 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
604 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
605 #define MWL8K_MCS_BITMAP_SIZE 16
607 struct peer_capability_info
{
608 /* Peer type - AP vs. STA. */
611 /* Basic 802.11 capabilities from assoc resp. */
614 /* Set if peer supports 802.11n high throughput (HT). */
617 /* Valid if HT is supported. */
619 __u8 extended_ht_caps
;
620 struct ewc_ht_info ewc_info
;
622 /* Legacy rate table. Intersection of our rates and peer rates. */
623 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
625 /* HT rate table. Intersection of our rates and peer rates. */
626 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
629 /* If set, interoperability mode, no proprietary extensions. */
633 __le16 amsdu_enabled
;
634 } __attribute__((packed
));
636 /* Inline functions to manipulate QoS field in data descriptor. */
637 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
639 u16 val_mask
= 1 << 4;
641 /* End of Service Period Bit 4 */
642 return qos
| val_mask
;
645 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
649 u16 qos_mask
= ~(val_mask
<< shift
);
651 /* Ack Policy Bit 5-6 */
652 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
655 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
657 u16 val_mask
= 1 << 7;
659 /* AMSDU present Bit 7 */
660 return qos
| val_mask
;
663 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
667 u16 qos_mask
= ~(val_mask
<< shift
);
669 /* Queue Length Bits 8-15 */
670 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
673 /* DMA header used by firmware and hardware. */
674 struct mwl8k_dma_data
{
676 struct ieee80211_hdr wh
;
677 } __attribute__((packed
));
679 /* Routines to add/remove DMA header from skb. */
680 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
682 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
683 void *dst
, *src
= &tr
->wh
;
684 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
685 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
687 dst
= (void *)tr
+ space
;
689 memmove(dst
, src
, hdrlen
);
690 skb_pull(skb
, space
);
694 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
696 struct ieee80211_hdr
*wh
;
698 struct mwl8k_dma_data
*tr
;
700 wh
= (struct ieee80211_hdr
*)skb
->data
;
701 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
705 * Copy up/down the 802.11 header; the firmware requires
706 * we present a 2-byte payload length followed by a
707 * 4-address header (w/o QoS), followed (optionally) by
708 * any WEP/ExtIV header (but only filled in for CCMP).
710 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
711 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
713 tr
= (struct mwl8k_dma_data
*)skb
->data
;
715 memmove(&tr
->wh
, wh
, hdrlen
);
718 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
721 * Firmware length is the length of the fully formed "802.11
722 * payload". That is, everything except for the 802.11 header.
723 * This includes all crypto material including the MIC.
725 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
732 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
734 struct mwl8k_rx_desc
{
738 __le32 pkt_phys_addr
;
739 __le32 next_rx_desc_phys_addr
;
749 } __attribute__((packed
));
751 #define MWL8K_RX_DESCS 256
752 #define MWL8K_RX_MAXSZ 3800
754 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
756 struct mwl8k_priv
*priv
= hw
->priv
;
757 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
761 rxq
->rx_desc_count
= 0;
765 size
= MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
);
768 pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rx_desc_dma
);
769 if (rxq
->rx_desc_area
== NULL
) {
770 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
771 wiphy_name(hw
->wiphy
));
774 memset(rxq
->rx_desc_area
, 0, size
);
776 rxq
->rx_skb
= kmalloc(MWL8K_RX_DESCS
*
777 sizeof(*rxq
->rx_skb
), GFP_KERNEL
);
778 if (rxq
->rx_skb
== NULL
) {
779 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
780 wiphy_name(hw
->wiphy
));
781 pci_free_consistent(priv
->pdev
, size
,
782 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
785 memset(rxq
->rx_skb
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->rx_skb
));
787 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
788 struct mwl8k_rx_desc
*rx_desc
;
791 rx_desc
= rxq
->rx_desc_area
+ i
;
792 nexti
= (i
+ 1) % MWL8K_RX_DESCS
;
794 rx_desc
->next_rx_desc_phys_addr
=
795 cpu_to_le32(rxq
->rx_desc_dma
796 + nexti
* sizeof(*rx_desc
));
797 rx_desc
->rx_ctrl
= MWL8K_RX_CTRL_OWNED_BY_HOST
;
803 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
805 struct mwl8k_priv
*priv
= hw
->priv
;
806 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
810 while (rxq
->rx_desc_count
< MWL8K_RX_DESCS
&& limit
--) {
814 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
818 rxq
->rx_desc_count
++;
821 rxq
->rx_tail
= (rx
+ 1) % MWL8K_RX_DESCS
;
823 rxq
->rx_desc_area
[rx
].pkt_phys_addr
=
824 cpu_to_le32(pci_map_single(priv
->pdev
, skb
->data
,
825 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
));
827 rxq
->rx_desc_area
[rx
].pkt_len
= cpu_to_le16(MWL8K_RX_MAXSZ
);
828 rxq
->rx_skb
[rx
] = skb
;
830 rxq
->rx_desc_area
[rx
].rx_ctrl
= 0;
838 /* Must be called only when the card's reception is completely halted */
839 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
841 struct mwl8k_priv
*priv
= hw
->priv
;
842 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
845 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
846 if (rxq
->rx_skb
[i
] != NULL
) {
849 addr
= le32_to_cpu(rxq
->rx_desc_area
[i
].pkt_phys_addr
);
850 pci_unmap_single(priv
->pdev
, addr
, MWL8K_RX_MAXSZ
,
852 kfree_skb(rxq
->rx_skb
[i
]);
853 rxq
->rx_skb
[i
] = NULL
;
860 pci_free_consistent(priv
->pdev
,
861 MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
),
862 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
863 rxq
->rx_desc_area
= NULL
;
868 * Scan a list of BSSIDs to process for finalize join.
869 * Allows for extension to process multiple BSSIDs.
872 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
874 return priv
->capture_beacon
&&
875 ieee80211_is_beacon(wh
->frame_control
) &&
876 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
879 static inline void mwl8k_save_beacon(struct ieee80211_hw
*hw
,
882 struct mwl8k_priv
*priv
= hw
->priv
;
884 priv
->capture_beacon
= false;
885 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
888 * Use GFP_ATOMIC as rxq_process is called from
889 * the primary interrupt handler, memory allocation call
892 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
893 if (priv
->beacon_skb
!= NULL
)
894 ieee80211_queue_work(hw
, &priv
->finalize_join_worker
);
897 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
899 struct mwl8k_priv
*priv
= hw
->priv
;
900 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
904 while (rxq
->rx_desc_count
&& limit
--) {
905 struct mwl8k_rx_desc
*rx_desc
;
907 struct ieee80211_rx_status status
;
909 struct ieee80211_hdr
*wh
;
911 rx_desc
= rxq
->rx_desc_area
+ rxq
->rx_head
;
912 if (!(rx_desc
->rx_ctrl
& MWL8K_RX_CTRL_OWNED_BY_HOST
))
916 skb
= rxq
->rx_skb
[rxq
->rx_head
];
919 rxq
->rx_skb
[rxq
->rx_head
] = NULL
;
921 rxq
->rx_head
= (rxq
->rx_head
+ 1) % MWL8K_RX_DESCS
;
922 rxq
->rx_desc_count
--;
924 addr
= le32_to_cpu(rx_desc
->pkt_phys_addr
);
925 pci_unmap_single(priv
->pdev
, addr
,
926 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
928 skb_put(skb
, le16_to_cpu(rx_desc
->pkt_len
));
929 mwl8k_remove_dma_header(skb
);
931 wh
= (struct ieee80211_hdr
*)skb
->data
;
934 * Check for a pending join operation. Save a
935 * copy of the beacon and schedule a tasklet to
936 * send a FINALIZE_JOIN command to the firmware.
938 if (mwl8k_capture_bssid(priv
, wh
))
939 mwl8k_save_beacon(hw
, skb
);
941 memset(&status
, 0, sizeof(status
));
943 status
.signal
= -rx_desc
->rssi
;
944 status
.noise
= -rx_desc
->noise_level
;
945 status
.qual
= rx_desc
->link_quality
;
949 status
.band
= IEEE80211_BAND_2GHZ
;
950 status
.freq
= ieee80211_channel_to_frequency(rx_desc
->channel
);
951 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
952 ieee80211_rx_irqsafe(hw
, skb
);
962 * Packet transmission.
965 /* Transmit packet ACK policy */
966 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
967 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
969 #define MWL8K_TXD_STATUS_OK 0x00000001
970 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
971 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
972 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
973 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
975 struct mwl8k_tx_desc
{
980 __le32 pkt_phys_addr
;
982 __u8 dest_MAC_addr
[ETH_ALEN
];
983 __le32 next_tx_desc_phys_addr
;
988 } __attribute__((packed
));
990 #define MWL8K_TX_DESCS 128
992 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
994 struct mwl8k_priv
*priv
= hw
->priv
;
995 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
999 memset(&txq
->tx_stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1000 txq
->tx_stats
.limit
= MWL8K_TX_DESCS
;
1004 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1007 pci_alloc_consistent(priv
->pdev
, size
, &txq
->tx_desc_dma
);
1008 if (txq
->tx_desc_area
== NULL
) {
1009 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1010 wiphy_name(hw
->wiphy
));
1013 memset(txq
->tx_desc_area
, 0, size
);
1015 txq
->tx_skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
),
1017 if (txq
->tx_skb
== NULL
) {
1018 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1019 wiphy_name(hw
->wiphy
));
1020 pci_free_consistent(priv
->pdev
, size
,
1021 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1024 memset(txq
->tx_skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
));
1026 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1027 struct mwl8k_tx_desc
*tx_desc
;
1030 tx_desc
= txq
->tx_desc_area
+ i
;
1031 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1033 tx_desc
->status
= 0;
1034 tx_desc
->next_tx_desc_phys_addr
=
1035 cpu_to_le32(txq
->tx_desc_dma
+
1036 nexti
* sizeof(*tx_desc
));
1042 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1044 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1045 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1046 iowrite32(MWL8K_H2A_INT_DUMMY
,
1047 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1048 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1051 struct mwl8k_txq_info
{
1060 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1061 struct mwl8k_txq_info
*txinfo
)
1063 int count
, desc
, status
;
1064 struct mwl8k_tx_queue
*txq
;
1065 struct mwl8k_tx_desc
*tx_desc
;
1068 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1070 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1071 txq
= priv
->txq
+ count
;
1072 txinfo
[count
].len
= txq
->tx_stats
.len
;
1073 txinfo
[count
].head
= txq
->tx_head
;
1074 txinfo
[count
].tail
= txq
->tx_tail
;
1075 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1076 tx_desc
= txq
->tx_desc_area
+ desc
;
1077 status
= le32_to_cpu(tx_desc
->status
);
1079 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1080 txinfo
[count
].fw_owned
++;
1082 txinfo
[count
].drv_owned
++;
1084 if (tx_desc
->pkt_len
== 0)
1085 txinfo
[count
].unused
++;
1093 * Must be called with priv->fw_mutex held and tx queues stopped.
1095 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1097 struct mwl8k_priv
*priv
= hw
->priv
;
1098 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1100 unsigned long timeout
;
1104 spin_lock_bh(&priv
->tx_lock
);
1105 count
= priv
->pending_tx_pkts
;
1107 priv
->tx_wait
= &tx_wait
;
1108 spin_unlock_bh(&priv
->tx_lock
);
1111 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1115 timeout
= wait_for_completion_timeout(&tx_wait
,
1116 msecs_to_jiffies(5000));
1120 spin_lock_bh(&priv
->tx_lock
);
1121 priv
->tx_wait
= NULL
;
1122 newcount
= priv
->pending_tx_pkts
;
1123 mwl8k_scan_tx_ring(priv
, txinfo
);
1124 spin_unlock_bh(&priv
->tx_lock
);
1126 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1127 __func__
, __LINE__
, count
, newcount
);
1129 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1130 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1136 txinfo
[index
].fw_owned
,
1137 txinfo
[index
].drv_owned
,
1138 txinfo
[index
].unused
);
1146 #define MWL8K_TXD_SUCCESS(status) \
1147 ((status) & (MWL8K_TXD_STATUS_OK | \
1148 MWL8K_TXD_STATUS_OK_RETRY | \
1149 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1151 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1153 struct mwl8k_priv
*priv
= hw
->priv
;
1154 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1157 while (txq
->tx_stats
.len
> 0) {
1159 struct mwl8k_tx_desc
*tx_desc
;
1162 struct sk_buff
*skb
;
1163 struct ieee80211_tx_info
*info
;
1167 tx_desc
= txq
->tx_desc_area
+ tx
;
1169 status
= le32_to_cpu(tx_desc
->status
);
1171 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1175 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1178 txq
->tx_head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1179 BUG_ON(txq
->tx_stats
.len
== 0);
1180 txq
->tx_stats
.len
--;
1181 priv
->pending_tx_pkts
--;
1183 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1184 size
= le16_to_cpu(tx_desc
->pkt_len
);
1185 skb
= txq
->tx_skb
[tx
];
1186 txq
->tx_skb
[tx
] = NULL
;
1188 BUG_ON(skb
== NULL
);
1189 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1191 mwl8k_remove_dma_header(skb
);
1193 /* Mark descriptor as unused */
1194 tx_desc
->pkt_phys_addr
= 0;
1195 tx_desc
->pkt_len
= 0;
1197 info
= IEEE80211_SKB_CB(skb
);
1198 ieee80211_tx_info_clear_status(info
);
1199 if (MWL8K_TXD_SUCCESS(status
))
1200 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1202 ieee80211_tx_status_irqsafe(hw
, skb
);
1207 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1208 ieee80211_wake_queue(hw
, index
);
1211 /* must be called only when the card's transmit is completely halted */
1212 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1214 struct mwl8k_priv
*priv
= hw
->priv
;
1215 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1217 mwl8k_txq_reclaim(hw
, index
, 1);
1222 pci_free_consistent(priv
->pdev
,
1223 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1224 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1225 txq
->tx_desc_area
= NULL
;
1229 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1231 struct mwl8k_priv
*priv
= hw
->priv
;
1232 struct ieee80211_tx_info
*tx_info
;
1233 struct mwl8k_vif
*mwl8k_vif
;
1234 struct ieee80211_hdr
*wh
;
1235 struct mwl8k_tx_queue
*txq
;
1236 struct mwl8k_tx_desc
*tx
;
1242 wh
= (struct ieee80211_hdr
*)skb
->data
;
1243 if (ieee80211_is_data_qos(wh
->frame_control
))
1244 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1248 mwl8k_add_dma_header(skb
);
1249 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1251 tx_info
= IEEE80211_SKB_CB(skb
);
1252 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1254 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1255 u16 seqno
= mwl8k_vif
->seqno
;
1257 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1258 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1259 mwl8k_vif
->seqno
= seqno
++ % 4096;
1262 /* Setup firmware control bit fields for each frame type. */
1265 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1266 ieee80211_is_ctl(wh
->frame_control
)) {
1268 qos
= mwl8k_qos_setbit_eosp(qos
);
1269 /* Set Queue size to unspecified */
1270 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1271 } else if (ieee80211_is_data(wh
->frame_control
)) {
1273 if (is_multicast_ether_addr(wh
->addr1
))
1274 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1276 /* Send pkt in an aggregate if AMPDU frame. */
1277 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1278 qos
= mwl8k_qos_setbit_ack(qos
,
1279 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1281 qos
= mwl8k_qos_setbit_ack(qos
,
1282 MWL8K_TXD_ACK_POLICY_NORMAL
);
1284 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1285 qos
= mwl8k_qos_setbit_amsdu(qos
);
1288 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1289 skb
->len
, PCI_DMA_TODEVICE
);
1291 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1292 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1293 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1295 return NETDEV_TX_OK
;
1298 spin_lock_bh(&priv
->tx_lock
);
1300 txq
= priv
->txq
+ index
;
1302 BUG_ON(txq
->tx_skb
[txq
->tx_tail
] != NULL
);
1303 txq
->tx_skb
[txq
->tx_tail
] = skb
;
1305 tx
= txq
->tx_desc_area
+ txq
->tx_tail
;
1306 tx
->data_rate
= txdatarate
;
1307 tx
->tx_priority
= index
;
1308 tx
->qos_control
= cpu_to_le16(qos
);
1309 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1310 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1312 tx
->peer_id
= mwl8k_vif
->peer_id
;
1314 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1316 txq
->tx_stats
.count
++;
1317 txq
->tx_stats
.len
++;
1318 priv
->pending_tx_pkts
++;
1321 if (txq
->tx_tail
== MWL8K_TX_DESCS
)
1324 if (txq
->tx_head
== txq
->tx_tail
)
1325 ieee80211_stop_queue(hw
, index
);
1327 mwl8k_tx_start(priv
);
1329 spin_unlock_bh(&priv
->tx_lock
);
1331 return NETDEV_TX_OK
;
1338 * We have the following requirements for issuing firmware commands:
1339 * - Some commands require that the packet transmit path is idle when
1340 * the command is issued. (For simplicity, we'll just quiesce the
1341 * transmit path for every command.)
1342 * - There are certain sequences of commands that need to be issued to
1343 * the hardware sequentially, with no other intervening commands.
1345 * This leads to an implementation of a "firmware lock" as a mutex that
1346 * can be taken recursively, and which is taken by both the low-level
1347 * command submission function (mwl8k_post_cmd) as well as any users of
1348 * that function that require issuing of an atomic sequence of commands,
1349 * and quiesces the transmit path whenever it's taken.
1351 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1353 struct mwl8k_priv
*priv
= hw
->priv
;
1355 if (priv
->fw_mutex_owner
!= current
) {
1358 mutex_lock(&priv
->fw_mutex
);
1359 ieee80211_stop_queues(hw
);
1361 rc
= mwl8k_tx_wait_empty(hw
);
1363 ieee80211_wake_queues(hw
);
1364 mutex_unlock(&priv
->fw_mutex
);
1369 priv
->fw_mutex_owner
= current
;
1372 priv
->fw_mutex_depth
++;
1377 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1379 struct mwl8k_priv
*priv
= hw
->priv
;
1381 if (!--priv
->fw_mutex_depth
) {
1382 ieee80211_wake_queues(hw
);
1383 priv
->fw_mutex_owner
= NULL
;
1384 mutex_unlock(&priv
->fw_mutex
);
1390 * Command processing.
1393 /* Timeout firmware commands after 2000ms */
1394 #define MWL8K_CMD_TIMEOUT_MS 2000
1396 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1398 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1399 struct mwl8k_priv
*priv
= hw
->priv
;
1400 void __iomem
*regs
= priv
->regs
;
1401 dma_addr_t dma_addr
;
1402 unsigned int dma_size
;
1404 unsigned long timeout
= 0;
1407 cmd
->result
= 0xffff;
1408 dma_size
= le16_to_cpu(cmd
->length
);
1409 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1410 PCI_DMA_BIDIRECTIONAL
);
1411 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1414 rc
= mwl8k_fw_lock(hw
);
1416 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1417 PCI_DMA_BIDIRECTIONAL
);
1421 priv
->hostcmd_wait
= &cmd_wait
;
1422 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1423 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1424 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1425 iowrite32(MWL8K_H2A_INT_DUMMY
,
1426 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1428 timeout
= wait_for_completion_timeout(&cmd_wait
,
1429 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1431 priv
->hostcmd_wait
= NULL
;
1433 mwl8k_fw_unlock(hw
);
1435 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1436 PCI_DMA_BIDIRECTIONAL
);
1439 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1440 wiphy_name(hw
->wiphy
),
1441 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1442 MWL8K_CMD_TIMEOUT_MS
);
1445 rc
= cmd
->result
? -EINVAL
: 0;
1447 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1448 wiphy_name(hw
->wiphy
),
1449 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1450 le16_to_cpu(cmd
->result
));
1459 struct mwl8k_cmd_get_hw_spec
{
1460 struct mwl8k_cmd_pkt header
;
1462 __u8 host_interface
;
1464 __u8 perm_addr
[ETH_ALEN
];
1469 __u8 mcs_bitmap
[16];
1470 __le32 rx_queue_ptr
;
1471 __le32 num_tx_queues
;
1472 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1474 __le32 num_tx_desc_per_queue
;
1475 __le32 total_rx_desc
;
1476 } __attribute__((packed
));
1478 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw
*hw
)
1480 struct mwl8k_priv
*priv
= hw
->priv
;
1481 struct mwl8k_cmd_get_hw_spec
*cmd
;
1485 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1489 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1490 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1492 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1493 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1494 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rx_desc_dma
);
1495 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1496 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1497 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].tx_desc_dma
);
1498 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1499 cmd
->total_rx_desc
= cpu_to_le32(MWL8K_RX_DESCS
);
1501 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1504 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1505 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1506 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1507 priv
->hw_rev
= cmd
->hw_rev
;
1515 * CMD_MAC_MULTICAST_ADR.
1517 struct mwl8k_cmd_mac_multicast_adr
{
1518 struct mwl8k_cmd_pkt header
;
1521 __u8 addr
[0][ETH_ALEN
];
1524 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1525 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1526 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1527 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1529 static struct mwl8k_cmd_pkt
*
1530 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
, int allmulti
,
1531 int mc_count
, struct dev_addr_list
*mclist
)
1533 struct mwl8k_priv
*priv
= hw
->priv
;
1534 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1537 if (allmulti
|| mc_count
> priv
->num_mcaddrs
) {
1542 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1544 cmd
= kzalloc(size
, GFP_ATOMIC
);
1548 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1549 cmd
->header
.length
= cpu_to_le16(size
);
1550 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1551 MWL8K_ENABLE_RX_BROADCAST
);
1554 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1555 } else if (mc_count
) {
1558 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1559 cmd
->numaddr
= cpu_to_le16(mc_count
);
1560 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1561 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1565 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1566 mclist
= mclist
->next
;
1570 return &cmd
->header
;
1574 * CMD_802_11_GET_STAT.
1576 struct mwl8k_cmd_802_11_get_stat
{
1577 struct mwl8k_cmd_pkt header
;
1579 } __attribute__((packed
));
1581 #define MWL8K_STAT_ACK_FAILURE 9
1582 #define MWL8K_STAT_RTS_FAILURE 12
1583 #define MWL8K_STAT_FCS_ERROR 24
1584 #define MWL8K_STAT_RTS_SUCCESS 11
1586 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1587 struct ieee80211_low_level_stats
*stats
)
1589 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1592 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1596 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1597 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1599 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1601 stats
->dot11ACKFailureCount
=
1602 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1603 stats
->dot11RTSFailureCount
=
1604 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1605 stats
->dot11FCSErrorCount
=
1606 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1607 stats
->dot11RTSSuccessCount
=
1608 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1616 * CMD_802_11_RADIO_CONTROL.
1618 struct mwl8k_cmd_802_11_radio_control
{
1619 struct mwl8k_cmd_pkt header
;
1623 } __attribute__((packed
));
1626 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1628 struct mwl8k_priv
*priv
= hw
->priv
;
1629 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1632 if (enable
== priv
->radio_on
&& !force
)
1635 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1639 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1640 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1641 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1642 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1643 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1645 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1649 priv
->radio_on
= enable
;
1654 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1656 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1659 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1661 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1665 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1667 struct mwl8k_priv
*priv
;
1669 if (hw
== NULL
|| hw
->priv
== NULL
)
1673 priv
->radio_short_preamble
= short_preamble
;
1675 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1679 * CMD_802_11_RF_TX_POWER.
1681 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1683 struct mwl8k_cmd_802_11_rf_tx_power
{
1684 struct mwl8k_cmd_pkt header
;
1686 __le16 support_level
;
1687 __le16 current_level
;
1689 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1690 } __attribute__((packed
));
1692 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1694 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1697 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1701 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1702 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1703 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1704 cmd
->support_level
= cpu_to_le16(dBm
);
1706 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1715 struct mwl8k_cmd_set_pre_scan
{
1716 struct mwl8k_cmd_pkt header
;
1717 } __attribute__((packed
));
1719 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
1721 struct mwl8k_cmd_set_pre_scan
*cmd
;
1724 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1728 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
1729 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1731 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1738 * CMD_SET_POST_SCAN.
1740 struct mwl8k_cmd_set_post_scan
{
1741 struct mwl8k_cmd_pkt header
;
1743 __u8 bssid
[ETH_ALEN
];
1744 } __attribute__((packed
));
1747 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
1749 struct mwl8k_cmd_set_post_scan
*cmd
;
1752 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1756 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
1757 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1759 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
1761 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1768 * CMD_SET_RF_CHANNEL.
1770 struct mwl8k_cmd_set_rf_channel
{
1771 struct mwl8k_cmd_pkt header
;
1773 __u8 current_channel
;
1774 __le32 channel_flags
;
1775 } __attribute__((packed
));
1777 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
1778 struct ieee80211_channel
*channel
)
1780 struct mwl8k_cmd_set_rf_channel
*cmd
;
1783 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1787 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
1788 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1789 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1790 cmd
->current_channel
= channel
->hw_value
;
1791 if (channel
->band
== IEEE80211_BAND_2GHZ
)
1792 cmd
->channel_flags
= cpu_to_le32(0x00000081);
1794 cmd
->channel_flags
= cpu_to_le32(0x00000000);
1796 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1805 struct mwl8k_cmd_set_slot
{
1806 struct mwl8k_cmd_pkt header
;
1809 } __attribute__((packed
));
1811 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
1813 struct mwl8k_cmd_set_slot
*cmd
;
1816 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1820 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
1821 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1822 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1823 cmd
->short_slot
= short_slot_time
;
1825 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1834 struct mwl8k_cmd_mimo_config
{
1835 struct mwl8k_cmd_pkt header
;
1837 __u8 rx_antenna_map
;
1838 __u8 tx_antenna_map
;
1839 } __attribute__((packed
));
1841 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
1843 struct mwl8k_cmd_mimo_config
*cmd
;
1846 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1850 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
1851 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1852 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
1853 cmd
->rx_antenna_map
= rx
;
1854 cmd
->tx_antenna_map
= tx
;
1856 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1863 * CMD_ENABLE_SNIFFER.
1865 struct mwl8k_cmd_enable_sniffer
{
1866 struct mwl8k_cmd_pkt header
;
1868 } __attribute__((packed
));
1870 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
1872 struct mwl8k_cmd_enable_sniffer
*cmd
;
1875 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1879 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
1880 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1881 cmd
->action
= cpu_to_le32(!!enable
);
1883 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1892 struct mwl8k_cmd_set_mac_addr
{
1893 struct mwl8k_cmd_pkt header
;
1894 __u8 mac_addr
[ETH_ALEN
];
1895 } __attribute__((packed
));
1897 static int mwl8k_set_mac_addr(struct ieee80211_hw
*hw
, u8
*mac
)
1899 struct mwl8k_cmd_set_mac_addr
*cmd
;
1902 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1906 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR
);
1907 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1908 memcpy(cmd
->mac_addr
, mac
, ETH_ALEN
);
1910 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1918 * CMD_SET_RATEADAPT_MODE.
1920 struct mwl8k_cmd_set_rate_adapt_mode
{
1921 struct mwl8k_cmd_pkt header
;
1924 } __attribute__((packed
));
1926 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
1928 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
1931 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1935 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
1936 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1937 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1938 cmd
->mode
= cpu_to_le16(mode
);
1940 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1949 struct mwl8k_cmd_set_wmm
{
1950 struct mwl8k_cmd_pkt header
;
1952 } __attribute__((packed
));
1954 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
1956 struct mwl8k_priv
*priv
= hw
->priv
;
1957 struct mwl8k_cmd_set_wmm
*cmd
;
1960 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1964 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
1965 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1966 cmd
->action
= cpu_to_le16(!!enable
);
1968 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1972 priv
->wmm_enabled
= enable
;
1978 * CMD_SET_RTS_THRESHOLD.
1980 struct mwl8k_cmd_rts_threshold
{
1981 struct mwl8k_cmd_pkt header
;
1984 } __attribute__((packed
));
1986 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
1987 u16 action
, u16 threshold
)
1989 struct mwl8k_cmd_rts_threshold
*cmd
;
1992 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1996 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
1997 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1998 cmd
->action
= cpu_to_le16(action
);
1999 cmd
->threshold
= cpu_to_le16(threshold
);
2001 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2008 * CMD_SET_EDCA_PARAMS.
2010 struct mwl8k_cmd_set_edca_params
{
2011 struct mwl8k_cmd_pkt header
;
2013 /* See MWL8K_SET_EDCA_XXX below */
2016 /* TX opportunity in units of 32 us */
2019 /* Log exponent of max contention period: 0...15*/
2022 /* Log exponent of min contention period: 0...15 */
2025 /* Adaptive interframe spacing in units of 32us */
2028 /* TX queue to configure */
2030 } __attribute__((packed
));
2032 #define MWL8K_SET_EDCA_CW 0x01
2033 #define MWL8K_SET_EDCA_TXOP 0x02
2034 #define MWL8K_SET_EDCA_AIFS 0x04
2036 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2037 MWL8K_SET_EDCA_TXOP | \
2038 MWL8K_SET_EDCA_AIFS)
2041 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2042 __u16 cw_min
, __u16 cw_max
,
2043 __u8 aifs
, __u16 txop
)
2045 struct mwl8k_cmd_set_edca_params
*cmd
;
2048 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2053 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2056 qnum
^= !(qnum
>> 1);
2058 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2059 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2060 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2061 cmd
->txop
= cpu_to_le16(txop
);
2062 cmd
->log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2063 cmd
->log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2067 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2074 * CMD_FINALIZE_JOIN.
2077 /* FJ beacon buffer size is compiled into the firmware. */
2078 #define MWL8K_FJ_BEACON_MAXLEN 128
2080 struct mwl8k_cmd_finalize_join
{
2081 struct mwl8k_cmd_pkt header
;
2082 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2083 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2084 } __attribute__((packed
));
2086 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2087 __u16 framelen
, __u16 dtim
)
2089 struct mwl8k_cmd_finalize_join
*cmd
;
2090 struct ieee80211_mgmt
*payload
= frame
;
2098 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2102 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2103 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2104 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2106 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2108 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2110 /* XXX TBD Might just have to abort and return an error */
2111 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2112 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2113 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2114 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2116 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2117 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2119 if (payload
&& payload_len
)
2120 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2122 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2130 struct mwl8k_cmd_update_sta_db
{
2131 struct mwl8k_cmd_pkt header
;
2133 /* See STADB_ACTION_TYPE */
2136 /* Peer MAC address */
2137 __u8 peer_addr
[ETH_ALEN
];
2141 /* Peer info - valid during add/update. */
2142 struct peer_capability_info peer_info
;
2143 } __attribute__((packed
));
2145 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2146 struct ieee80211_vif
*vif
, __u32 action
)
2148 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2149 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2150 struct mwl8k_cmd_update_sta_db
*cmd
;
2151 struct peer_capability_info
*peer_info
;
2152 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2156 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2160 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2161 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2163 cmd
->action
= cpu_to_le32(action
);
2164 peer_info
= &cmd
->peer_info
;
2165 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2168 case MWL8K_STA_DB_ADD_ENTRY
:
2169 case MWL8K_STA_DB_MODIFY_ENTRY
:
2170 /* Build peer_info block */
2171 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2172 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2173 peer_info
->interop
= 1;
2174 peer_info
->amsdu_enabled
= 0;
2176 rates
= peer_info
->legacy_rates
;
2177 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2178 rates
[count
] = bitrates
[count
].hw_value
;
2180 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2182 mv_vif
->peer_id
= peer_info
->station_id
;
2186 case MWL8K_STA_DB_DEL_ENTRY
:
2187 case MWL8K_STA_DB_FLUSH
:
2189 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2191 mv_vif
->peer_id
= 0;
2202 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2204 #define MWL8K_FRAME_PROT_DISABLED 0x00
2205 #define MWL8K_FRAME_PROT_11G 0x07
2206 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2207 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2209 struct mwl8k_cmd_update_set_aid
{
2210 struct mwl8k_cmd_pkt header
;
2213 /* AP's MAC address (BSSID) */
2214 __u8 bssid
[ETH_ALEN
];
2215 __le16 protection_mode
;
2216 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2217 } __attribute__((packed
));
2219 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2220 struct ieee80211_vif
*vif
)
2222 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2223 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2224 struct mwl8k_cmd_update_set_aid
*cmd
;
2225 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2230 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2234 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2235 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2236 cmd
->aid
= cpu_to_le16(info
->aid
);
2238 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2240 if (info
->use_cts_prot
) {
2241 prot_mode
= MWL8K_FRAME_PROT_11G
;
2243 switch (info
->ht_operation_mode
&
2244 IEEE80211_HT_OP_MODE_PROTECTION
) {
2245 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2246 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2248 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2249 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2252 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2256 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2258 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2259 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2261 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2270 struct mwl8k_cmd_update_rateset
{
2271 struct mwl8k_cmd_pkt header
;
2272 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2274 /* Bitmap for supported MCS codes. */
2275 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2276 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2277 } __attribute__((packed
));
2279 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2280 struct ieee80211_vif
*vif
)
2282 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2283 struct mwl8k_cmd_update_rateset
*cmd
;
2284 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2288 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2292 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2293 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2295 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2296 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2298 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2305 * CMD_USE_FIXED_RATE.
2307 #define MWL8K_RATE_TABLE_SIZE 8
2308 #define MWL8K_UCAST_RATE 0
2309 #define MWL8K_USE_AUTO_RATE 0x0002
2311 struct mwl8k_rate_entry
{
2312 /* Set to 1 if HT rate, 0 if legacy. */
2315 /* Set to 1 to use retry_count field. */
2316 __le32 enable_retry
;
2318 /* Specified legacy rate or MCS. */
2321 /* Number of allowed retries. */
2323 } __attribute__((packed
));
2325 struct mwl8k_rate_table
{
2326 /* 1 to allow specified rate and below */
2327 __le32 allow_rate_drop
;
2329 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2330 } __attribute__((packed
));
2332 struct mwl8k_cmd_use_fixed_rate
{
2333 struct mwl8k_cmd_pkt header
;
2335 struct mwl8k_rate_table rate_table
;
2337 /* Unicast, Broadcast or Multicast */
2341 } __attribute__((packed
));
2343 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2344 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2346 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2350 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2354 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2355 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2357 cmd
->action
= cpu_to_le32(action
);
2358 cmd
->rate_type
= cpu_to_le32(rate_type
);
2360 if (rate_table
!= NULL
) {
2362 * Copy over each field manually so that endian
2363 * conversion can be done.
2365 cmd
->rate_table
.allow_rate_drop
=
2366 cpu_to_le32(rate_table
->allow_rate_drop
);
2367 cmd
->rate_table
.num_rates
=
2368 cpu_to_le32(rate_table
->num_rates
);
2370 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2371 struct mwl8k_rate_entry
*dst
=
2372 &cmd
->rate_table
.rate_entry
[count
];
2373 struct mwl8k_rate_entry
*src
=
2374 &rate_table
->rate_entry
[count
];
2376 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2377 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2378 dst
->rate
= cpu_to_le32(src
->rate
);
2379 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2383 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2391 * Interrupt handling.
2393 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2395 struct ieee80211_hw
*hw
= dev_id
;
2396 struct mwl8k_priv
*priv
= hw
->priv
;
2399 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2400 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2405 if (status
& MWL8K_A2H_INT_TX_DONE
)
2406 tasklet_schedule(&priv
->tx_reclaim_task
);
2408 if (status
& MWL8K_A2H_INT_RX_READY
) {
2409 while (rxq_process(hw
, 0, 1))
2410 rxq_refill(hw
, 0, 1);
2413 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2414 if (priv
->hostcmd_wait
!= NULL
)
2415 complete(priv
->hostcmd_wait
);
2418 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2419 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2420 priv
->radio_on
&& priv
->pending_tx_pkts
)
2421 mwl8k_tx_start(priv
);
2429 * Core driver operations.
2431 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2433 struct mwl8k_priv
*priv
= hw
->priv
;
2434 int index
= skb_get_queue_mapping(skb
);
2437 if (priv
->current_channel
== NULL
) {
2438 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2439 "disabled\n", wiphy_name(hw
->wiphy
));
2441 return NETDEV_TX_OK
;
2444 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2449 static int mwl8k_start(struct ieee80211_hw
*hw
)
2451 struct mwl8k_priv
*priv
= hw
->priv
;
2454 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2455 IRQF_SHARED
, MWL8K_NAME
, hw
);
2457 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2458 wiphy_name(hw
->wiphy
));
2462 /* Enable tx reclaim tasklet */
2463 tasklet_enable(&priv
->tx_reclaim_task
);
2465 /* Enable interrupts */
2466 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2468 rc
= mwl8k_fw_lock(hw
);
2470 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2473 rc
= mwl8k_cmd_set_pre_scan(hw
);
2476 rc
= mwl8k_cmd_set_post_scan(hw
,
2477 "\x00\x00\x00\x00\x00\x00");
2480 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2483 rc
= mwl8k_set_wmm(hw
, 0);
2486 rc
= mwl8k_enable_sniffer(hw
, 0);
2488 mwl8k_fw_unlock(hw
);
2492 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2493 free_irq(priv
->pdev
->irq
, hw
);
2494 tasklet_disable(&priv
->tx_reclaim_task
);
2500 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2502 struct mwl8k_priv
*priv
= hw
->priv
;
2505 mwl8k_cmd_802_11_radio_disable(hw
);
2507 ieee80211_stop_queues(hw
);
2509 /* Disable interrupts */
2510 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2511 free_irq(priv
->pdev
->irq
, hw
);
2513 /* Stop finalize join worker */
2514 cancel_work_sync(&priv
->finalize_join_worker
);
2515 if (priv
->beacon_skb
!= NULL
)
2516 dev_kfree_skb(priv
->beacon_skb
);
2518 /* Stop tx reclaim tasklet */
2519 tasklet_disable(&priv
->tx_reclaim_task
);
2521 /* Return all skbs to mac80211 */
2522 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2523 mwl8k_txq_reclaim(hw
, i
, 1);
2526 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2527 struct ieee80211_if_init_conf
*conf
)
2529 struct mwl8k_priv
*priv
= hw
->priv
;
2530 struct mwl8k_vif
*mwl8k_vif
;
2533 * We only support one active interface at a time.
2535 if (priv
->vif
!= NULL
)
2539 * We only support managed interfaces for now.
2541 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2544 /* Clean out driver private area */
2545 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2546 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2548 /* Set and save the mac address */
2549 mwl8k_set_mac_addr(hw
, conf
->mac_addr
);
2550 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2552 /* Back pointer to parent config block */
2553 mwl8k_vif
->priv
= priv
;
2555 /* Setup initial PHY parameters */
2556 memcpy(mwl8k_vif
->legacy_rates
,
2557 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2558 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2560 /* Set Initial sequence number to zero */
2561 mwl8k_vif
->seqno
= 0;
2563 priv
->vif
= conf
->vif
;
2564 priv
->current_channel
= NULL
;
2569 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2570 struct ieee80211_if_init_conf
*conf
)
2572 struct mwl8k_priv
*priv
= hw
->priv
;
2574 if (priv
->vif
== NULL
)
2577 mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
2582 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2584 struct ieee80211_conf
*conf
= &hw
->conf
;
2585 struct mwl8k_priv
*priv
= hw
->priv
;
2588 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2589 mwl8k_cmd_802_11_radio_disable(hw
);
2590 priv
->current_channel
= NULL
;
2594 rc
= mwl8k_fw_lock(hw
);
2598 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2602 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2606 priv
->current_channel
= conf
->channel
;
2608 if (conf
->power_level
> 18)
2609 conf
->power_level
= 18;
2610 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2614 if (mwl8k_cmd_mimo_config(hw
, 0x7, 0x7))
2618 mwl8k_fw_unlock(hw
);
2623 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
2624 struct ieee80211_vif
*vif
,
2625 struct ieee80211_bss_conf
*info
,
2628 struct mwl8k_priv
*priv
= hw
->priv
;
2629 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
2632 if (changed
& BSS_CHANGED_BSSID
)
2633 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
2635 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
2638 priv
->capture_beacon
= false;
2640 rc
= mwl8k_fw_lock(hw
);
2645 memcpy(&mwl8k_vif
->bss_info
, info
,
2646 sizeof(struct ieee80211_bss_conf
));
2649 rc
= mwl8k_update_rateset(hw
, vif
);
2653 /* Turn on rate adaptation */
2654 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
2655 MWL8K_UCAST_RATE
, NULL
);
2659 /* Set radio preamble */
2660 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
2665 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
2669 /* Update peer rate info */
2670 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
2671 MWL8K_STA_DB_MODIFY_ENTRY
);
2676 rc
= mwl8k_cmd_set_aid(hw
, vif
);
2681 * Finalize the join. Tell rx handler to process
2682 * next beacon from our BSSID.
2684 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
2685 priv
->capture_beacon
= true;
2687 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
2688 memset(&mwl8k_vif
->bss_info
, 0,
2689 sizeof(struct ieee80211_bss_conf
));
2690 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
2694 mwl8k_fw_unlock(hw
);
2697 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
2698 int mc_count
, struct dev_addr_list
*mclist
)
2700 struct mwl8k_cmd_pkt
*cmd
;
2703 * Synthesize and return a command packet that programs the
2704 * hardware multicast address filter. At this point we don't
2705 * know whether FIF_ALLMULTI is being requested, but if it is,
2706 * we'll end up throwing this packet away and creating a new
2707 * one in mwl8k_configure_filter().
2709 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 0, mc_count
, mclist
);
2711 return (unsigned long)cmd
;
2714 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
2715 unsigned int changed_flags
,
2716 unsigned int *total_flags
,
2719 struct mwl8k_priv
*priv
= hw
->priv
;
2720 struct mwl8k_cmd_pkt
*cmd
;
2722 /* Clear unsupported feature flags */
2723 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
2725 if (mwl8k_fw_lock(hw
))
2728 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2729 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2731 * Disable the BSS filter.
2733 mwl8k_cmd_set_pre_scan(hw
);
2738 * Enable the BSS filter.
2740 * If there is an active STA interface, use that
2741 * interface's BSSID, otherwise use a dummy one
2742 * (where the OUI part needs to be nonzero for
2743 * the BSSID to be accepted by POST_SCAN).
2745 bssid
= "\x01\x00\x00\x00\x00\x00";
2746 if (priv
->vif
!= NULL
)
2747 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
2749 mwl8k_cmd_set_post_scan(hw
, bssid
);
2753 cmd
= (void *)(unsigned long)multicast
;
2756 * If FIF_ALLMULTI is being requested, throw away the command
2757 * packet that ->prepare_multicast() built and replace it with
2758 * a command packet that enables reception of all multicast
2761 if (*total_flags
& FIF_ALLMULTI
) {
2763 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 1, 0, NULL
);
2767 mwl8k_post_cmd(hw
, cmd
);
2771 mwl8k_fw_unlock(hw
);
2774 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
2776 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
2779 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2780 const struct ieee80211_tx_queue_params
*params
)
2782 struct mwl8k_priv
*priv
= hw
->priv
;
2785 rc
= mwl8k_fw_lock(hw
);
2787 if (!priv
->wmm_enabled
)
2788 rc
= mwl8k_set_wmm(hw
, 1);
2791 rc
= mwl8k_set_edca_params(hw
, queue
,
2797 mwl8k_fw_unlock(hw
);
2803 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
2804 struct ieee80211_tx_queue_stats
*stats
)
2806 struct mwl8k_priv
*priv
= hw
->priv
;
2807 struct mwl8k_tx_queue
*txq
;
2810 spin_lock_bh(&priv
->tx_lock
);
2811 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
2812 txq
= priv
->txq
+ index
;
2813 memcpy(&stats
[index
], &txq
->tx_stats
,
2814 sizeof(struct ieee80211_tx_queue_stats
));
2816 spin_unlock_bh(&priv
->tx_lock
);
2821 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
2822 struct ieee80211_low_level_stats
*stats
)
2824 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
2827 static const struct ieee80211_ops mwl8k_ops
= {
2829 .start
= mwl8k_start
,
2831 .add_interface
= mwl8k_add_interface
,
2832 .remove_interface
= mwl8k_remove_interface
,
2833 .config
= mwl8k_config
,
2834 .bss_info_changed
= mwl8k_bss_info_changed
,
2835 .prepare_multicast
= mwl8k_prepare_multicast
,
2836 .configure_filter
= mwl8k_configure_filter
,
2837 .set_rts_threshold
= mwl8k_set_rts_threshold
,
2838 .conf_tx
= mwl8k_conf_tx
,
2839 .get_tx_stats
= mwl8k_get_tx_stats
,
2840 .get_stats
= mwl8k_get_stats
,
2843 static void mwl8k_tx_reclaim_handler(unsigned long data
)
2846 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
2847 struct mwl8k_priv
*priv
= hw
->priv
;
2849 spin_lock_bh(&priv
->tx_lock
);
2850 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2851 mwl8k_txq_reclaim(hw
, i
, 0);
2853 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
2854 complete(priv
->tx_wait
);
2855 priv
->tx_wait
= NULL
;
2857 spin_unlock_bh(&priv
->tx_lock
);
2860 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
2862 struct mwl8k_priv
*priv
=
2863 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
2864 struct sk_buff
*skb
= priv
->beacon_skb
;
2865 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
2867 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
2870 priv
->beacon_skb
= NULL
;
2873 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
2874 const struct pci_device_id
*id
)
2876 static int printed_version
= 0;
2877 struct ieee80211_hw
*hw
;
2878 struct mwl8k_priv
*priv
;
2882 if (!printed_version
) {
2883 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
2884 printed_version
= 1;
2887 rc
= pci_enable_device(pdev
);
2889 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
2894 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
2896 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
2901 pci_set_master(pdev
);
2903 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
2905 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
2913 priv
->wmm_enabled
= false;
2914 priv
->pending_tx_pkts
= 0;
2916 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
2917 pci_set_drvdata(pdev
, hw
);
2919 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
2920 if (priv
->regs
== NULL
) {
2921 printk(KERN_ERR
"%s: Cannot map device memory\n",
2922 wiphy_name(hw
->wiphy
));
2926 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
2927 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
2928 priv
->band
.channels
= priv
->channels
;
2929 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
2930 priv
->band
.bitrates
= priv
->rates
;
2931 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
2932 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
2934 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
2935 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
2938 * Extra headroom is the size of the required DMA header
2939 * minus the size of the smallest 802.11 frame (CTS frame).
2941 hw
->extra_tx_headroom
=
2942 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
2944 hw
->channel_change_time
= 10;
2946 hw
->queues
= MWL8K_TX_QUEUES
;
2948 hw
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
2950 /* Set rssi and noise values to dBm */
2951 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
2952 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
2955 /* Set default radio state and preamble */
2957 priv
->radio_short_preamble
= 0;
2959 /* Finalize join worker */
2960 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
2962 /* TX reclaim tasklet */
2963 tasklet_init(&priv
->tx_reclaim_task
,
2964 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
2965 tasklet_disable(&priv
->tx_reclaim_task
);
2967 /* Power management cookie */
2968 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
2969 if (priv
->cookie
== NULL
)
2972 rc
= mwl8k_rxq_init(hw
, 0);
2975 rxq_refill(hw
, 0, INT_MAX
);
2977 mutex_init(&priv
->fw_mutex
);
2978 priv
->fw_mutex_owner
= NULL
;
2979 priv
->fw_mutex_depth
= 0;
2980 priv
->hostcmd_wait
= NULL
;
2982 spin_lock_init(&priv
->tx_lock
);
2984 priv
->tx_wait
= NULL
;
2986 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
2987 rc
= mwl8k_txq_init(hw
, i
);
2989 goto err_free_queues
;
2992 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2993 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2994 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
2995 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
2997 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2998 IRQF_SHARED
, MWL8K_NAME
, hw
);
3000 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
3001 wiphy_name(hw
->wiphy
));
3002 goto err_free_queues
;
3005 /* Reset firmware and hardware */
3006 mwl8k_hw_reset(priv
);
3008 /* Ask userland hotplug daemon for the device firmware */
3009 rc
= mwl8k_request_firmware(priv
, (u32
)id
->driver_data
);
3011 printk(KERN_ERR
"%s: Firmware files not found\n",
3012 wiphy_name(hw
->wiphy
));
3016 /* Load firmware into hardware */
3017 rc
= mwl8k_load_firmware(hw
);
3019 printk(KERN_ERR
"%s: Cannot start firmware\n",
3020 wiphy_name(hw
->wiphy
));
3021 goto err_stop_firmware
;
3024 /* Reclaim memory once firmware is successfully loaded */
3025 mwl8k_release_firmware(priv
);
3028 * Temporarily enable interrupts. Initial firmware host
3029 * commands use interrupts and avoids polling. Disable
3030 * interrupts when done.
3032 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3034 /* Get config data, mac addrs etc */
3035 rc
= mwl8k_cmd_get_hw_spec(hw
);
3037 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
3038 wiphy_name(hw
->wiphy
));
3039 goto err_stop_firmware
;
3042 /* Turn radio off */
3043 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3045 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3046 goto err_stop_firmware
;
3049 /* Clear MAC address */
3050 rc
= mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
3052 printk(KERN_ERR
"%s: Cannot clear MAC address\n",
3053 wiphy_name(hw
->wiphy
));
3054 goto err_stop_firmware
;
3057 /* Disable interrupts */
3058 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3059 free_irq(priv
->pdev
->irq
, hw
);
3061 rc
= ieee80211_register_hw(hw
);
3063 printk(KERN_ERR
"%s: Cannot register device\n",
3064 wiphy_name(hw
->wiphy
));
3065 goto err_stop_firmware
;
3068 printk(KERN_INFO
"%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
3069 wiphy_name(hw
->wiphy
), priv
->part_num
, priv
->hw_rev
,
3070 hw
->wiphy
->perm_addr
,
3071 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3072 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3077 mwl8k_hw_reset(priv
);
3078 mwl8k_release_firmware(priv
);
3081 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3082 free_irq(priv
->pdev
->irq
, hw
);
3085 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3086 mwl8k_txq_deinit(hw
, i
);
3087 mwl8k_rxq_deinit(hw
, 0);
3090 if (priv
->cookie
!= NULL
)
3091 pci_free_consistent(priv
->pdev
, 4,
3092 priv
->cookie
, priv
->cookie_dma
);
3094 if (priv
->regs
!= NULL
)
3095 pci_iounmap(pdev
, priv
->regs
);
3097 pci_set_drvdata(pdev
, NULL
);
3098 ieee80211_free_hw(hw
);
3101 pci_release_regions(pdev
);
3102 pci_disable_device(pdev
);
3107 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3109 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3112 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3114 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3115 struct mwl8k_priv
*priv
;
3122 ieee80211_stop_queues(hw
);
3124 ieee80211_unregister_hw(hw
);
3126 /* Remove tx reclaim tasklet */
3127 tasklet_kill(&priv
->tx_reclaim_task
);
3130 mwl8k_hw_reset(priv
);
3132 /* Return all skbs to mac80211 */
3133 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3134 mwl8k_txq_reclaim(hw
, i
, 1);
3136 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3137 mwl8k_txq_deinit(hw
, i
);
3139 mwl8k_rxq_deinit(hw
, 0);
3141 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3143 pci_iounmap(pdev
, priv
->regs
);
3144 pci_set_drvdata(pdev
, NULL
);
3145 ieee80211_free_hw(hw
);
3146 pci_release_regions(pdev
);
3147 pci_disable_device(pdev
);
3150 static struct pci_driver mwl8k_driver
= {
3152 .id_table
= mwl8k_table
,
3153 .probe
= mwl8k_probe
,
3154 .remove
= __devexit_p(mwl8k_remove
),
3155 .shutdown
= __devexit_p(mwl8k_shutdown
),
3158 static int __init
mwl8k_init(void)
3160 return pci_register_driver(&mwl8k_driver
);
3163 static void __exit
mwl8k_exit(void)
3165 pci_unregister_driver(&mwl8k_driver
);
3168 module_init(mwl8k_init
);
3169 module_exit(mwl8k_exit
);
3171 MODULE_DESCRIPTION(MWL8K_DESC
);
3172 MODULE_VERSION(MWL8K_VERSION
);
3173 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3174 MODULE_LICENSE("GPL");