2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.10"
30 MODULE_DESCRIPTION(MWL8K_DESC
);
31 MODULE_VERSION(MWL8K_VERSION
);
32 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
33 MODULE_LICENSE("GPL");
35 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table
) = {
36 { PCI_VDEVICE(MARVELL
, 0x2a2b), .driver_data
= 8687, },
37 { PCI_VDEVICE(MARVELL
, 0x2a30), .driver_data
= 8687, },
40 MODULE_DEVICE_TABLE(pci
, mwl8k_table
);
42 /* Register definitions */
43 #define MWL8K_HIU_GEN_PTR 0x00000c10
44 #define MWL8K_MODE_STA 0x0000005a
45 #define MWL8K_MODE_AP 0x000000a5
46 #define MWL8K_HIU_INT_CODE 0x00000c14
47 #define MWL8K_FWSTA_READY 0xf0f1f2f4
48 #define MWL8K_FWAP_READY 0xf1f2f4a5
49 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
50 #define MWL8K_HIU_SCRATCH 0x00000c40
52 /* Host->device communications */
53 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
54 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
55 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
56 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
57 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
58 #define MWL8K_H2A_INT_DUMMY (1 << 20)
59 #define MWL8K_H2A_INT_RESET (1 << 15)
60 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
61 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
63 /* Device->host communications */
64 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
65 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
66 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
67 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
68 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
69 #define MWL8K_A2H_INT_DUMMY (1 << 20)
70 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
71 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
72 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
73 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
74 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
75 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
76 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
77 #define MWL8K_A2H_INT_RX_READY (1 << 1)
78 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
80 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
81 MWL8K_A2H_INT_CHNL_SWITCHED | \
82 MWL8K_A2H_INT_QUEUE_EMPTY | \
83 MWL8K_A2H_INT_RADAR_DETECT | \
84 MWL8K_A2H_INT_RADIO_ON | \
85 MWL8K_A2H_INT_RADIO_OFF | \
86 MWL8K_A2H_INT_MAC_EVENT | \
87 MWL8K_A2H_INT_OPC_DONE | \
88 MWL8K_A2H_INT_RX_READY | \
89 MWL8K_A2H_INT_TX_DONE)
91 /* WME stream classes */
92 #define WME_AC_BE 0 /* best effort */
93 #define WME_AC_BK 1 /* background */
94 #define WME_AC_VI 2 /* video */
95 #define WME_AC_VO 3 /* voice */
97 #define MWL8K_RX_QUEUES 1
98 #define MWL8K_TX_QUEUES 4
100 struct mwl8k_rx_queue
{
103 /* hw receives here */
106 /* refill descs here */
109 struct mwl8k_rx_desc
*rx_desc_area
;
110 dma_addr_t rx_desc_dma
;
111 struct sk_buff
**rx_skb
;
114 struct mwl8k_tx_queue
{
115 /* hw transmits here */
118 /* sw appends here */
121 struct ieee80211_tx_queue_stats tx_stats
;
122 struct mwl8k_tx_desc
*tx_desc_area
;
123 dma_addr_t tx_desc_dma
;
124 struct sk_buff
**tx_skb
;
127 /* Pointers to the firmware data and meta information about it. */
128 struct mwl8k_firmware
{
130 struct firmware
*ucode
;
132 /* Boot helper code */
133 struct firmware
*helper
;
138 struct ieee80211_hw
*hw
;
140 struct pci_dev
*pdev
;
143 /* firmware files and meta data */
144 struct mwl8k_firmware fw
;
147 /* firmware access */
148 struct mutex fw_mutex
;
149 struct task_struct
*fw_mutex_owner
;
151 struct completion
*tx_wait
;
152 struct completion
*hostcmd_wait
;
154 /* lock held over TX and TX reap */
157 struct ieee80211_vif
*vif
;
159 struct ieee80211_channel
*current_channel
;
161 /* power management status cookie from firmware */
163 dma_addr_t cookie_dma
;
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
175 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
176 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
179 struct ieee80211_supported_band band
;
180 struct ieee80211_channel channels
[14];
181 struct ieee80211_rate rates
[12];
184 bool radio_short_preamble
;
187 /* XXX need to convert this to handle multiple interfaces */
189 u8 capture_bssid
[ETH_ALEN
];
190 struct sk_buff
*beacon_skb
;
193 * This FJ worker has to be global as it is scheduled from the
194 * RX handler. At this point we don't know which interface it
195 * belongs to until the list of bssids waiting to complete join
198 struct work_struct finalize_join_worker
;
200 /* Tasklet to reclaim TX descriptors and buffers after tx */
201 struct tasklet_struct tx_reclaim_task
;
203 /* Work thread to serialize configuration requests */
204 struct workqueue_struct
*config_wq
;
207 /* Per interface specific private data */
209 /* backpointer to parent config block */
210 struct mwl8k_priv
*priv
;
212 /* BSS config of AP or IBSS from mac80211*/
213 struct ieee80211_bss_conf bss_info
;
215 /* BSSID of AP or IBSS */
217 u8 mac_addr
[ETH_ALEN
];
220 * Subset of supported legacy rates.
221 * Intersection of AP and STA supported rates.
223 struct ieee80211_rate legacy_rates
[12];
225 /* number of supported legacy rates */
228 /* Index into station database.Returned by update_sta_db call */
231 /* Non AMPDU sequence number assigned by driver */
235 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
237 static const struct ieee80211_channel mwl8k_channels
[] = {
238 { .center_freq
= 2412, .hw_value
= 1, },
239 { .center_freq
= 2417, .hw_value
= 2, },
240 { .center_freq
= 2422, .hw_value
= 3, },
241 { .center_freq
= 2427, .hw_value
= 4, },
242 { .center_freq
= 2432, .hw_value
= 5, },
243 { .center_freq
= 2437, .hw_value
= 6, },
244 { .center_freq
= 2442, .hw_value
= 7, },
245 { .center_freq
= 2447, .hw_value
= 8, },
246 { .center_freq
= 2452, .hw_value
= 9, },
247 { .center_freq
= 2457, .hw_value
= 10, },
248 { .center_freq
= 2462, .hw_value
= 11, },
251 static const struct ieee80211_rate mwl8k_rates
[] = {
252 { .bitrate
= 10, .hw_value
= 2, },
253 { .bitrate
= 20, .hw_value
= 4, },
254 { .bitrate
= 55, .hw_value
= 11, },
255 { .bitrate
= 60, .hw_value
= 12, },
256 { .bitrate
= 90, .hw_value
= 18, },
257 { .bitrate
= 110, .hw_value
= 22, },
258 { .bitrate
= 120, .hw_value
= 24, },
259 { .bitrate
= 180, .hw_value
= 36, },
260 { .bitrate
= 240, .hw_value
= 48, },
261 { .bitrate
= 360, .hw_value
= 72, },
262 { .bitrate
= 480, .hw_value
= 96, },
263 { .bitrate
= 540, .hw_value
= 108, },
266 /* Set or get info from Firmware */
267 #define MWL8K_CMD_SET 0x0001
268 #define MWL8K_CMD_GET 0x0000
270 /* Firmware command codes */
271 #define MWL8K_CMD_CODE_DNLD 0x0001
272 #define MWL8K_CMD_GET_HW_SPEC 0x0003
273 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
274 #define MWL8K_CMD_GET_STAT 0x0014
275 #define MWL8K_CMD_RADIO_CONTROL 0x001c
276 #define MWL8K_CMD_RF_TX_POWER 0x001e
277 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
278 #define MWL8K_CMD_SET_POST_SCAN 0x0108
279 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
280 #define MWL8K_CMD_SET_AID 0x010d
281 #define MWL8K_CMD_SET_RATE 0x0110
282 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
283 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
284 #define MWL8K_CMD_SET_SLOT 0x0114
285 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
286 #define MWL8K_CMD_SET_WMM_MODE 0x0123
287 #define MWL8K_CMD_MIMO_CONFIG 0x0125
288 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
289 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
290 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
291 #define MWL8K_CMD_UPDATE_STADB 0x1123
293 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
295 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
296 snprintf(buf, bufsize, "%s", #x);\
299 switch (cmd
& ~0x8000) {
300 MWL8K_CMDNAME(CODE_DNLD
);
301 MWL8K_CMDNAME(GET_HW_SPEC
);
302 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
303 MWL8K_CMDNAME(GET_STAT
);
304 MWL8K_CMDNAME(RADIO_CONTROL
);
305 MWL8K_CMDNAME(RF_TX_POWER
);
306 MWL8K_CMDNAME(SET_PRE_SCAN
);
307 MWL8K_CMDNAME(SET_POST_SCAN
);
308 MWL8K_CMDNAME(SET_RF_CHANNEL
);
309 MWL8K_CMDNAME(SET_AID
);
310 MWL8K_CMDNAME(SET_RATE
);
311 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
312 MWL8K_CMDNAME(RTS_THRESHOLD
);
313 MWL8K_CMDNAME(SET_SLOT
);
314 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
315 MWL8K_CMDNAME(SET_WMM_MODE
);
316 MWL8K_CMDNAME(MIMO_CONFIG
);
317 MWL8K_CMDNAME(USE_FIXED_RATE
);
318 MWL8K_CMDNAME(ENABLE_SNIFFER
);
319 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
320 MWL8K_CMDNAME(UPDATE_STADB
);
322 snprintf(buf
, bufsize
, "0x%x", cmd
);
329 /* Hardware and firmware reset */
330 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
332 iowrite32(MWL8K_H2A_INT_RESET
,
333 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
334 iowrite32(MWL8K_H2A_INT_RESET
,
335 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
339 /* Release fw image */
340 static void mwl8k_release_fw(struct firmware
**fw
)
344 release_firmware(*fw
);
348 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
350 mwl8k_release_fw(&priv
->fw
.ucode
);
351 mwl8k_release_fw(&priv
->fw
.helper
);
354 /* Request fw image */
355 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
356 const char *fname
, struct firmware
**fw
)
358 /* release current image */
360 mwl8k_release_fw(fw
);
362 return request_firmware((const struct firmware
**)fw
,
363 fname
, &priv
->pdev
->dev
);
366 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
, u32 part_num
)
371 priv
->part_num
= part_num
;
373 snprintf(filename
, sizeof(filename
),
374 "mwl8k/helper_%u.fw", priv
->part_num
);
376 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.helper
);
379 "%s Error requesting helper firmware file %s\n",
380 pci_name(priv
->pdev
), filename
);
384 snprintf(filename
, sizeof(filename
),
385 "mwl8k/fmimage_%u.fw", priv
->part_num
);
387 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.ucode
);
389 printk(KERN_ERR
"%s Error requesting firmware file %s\n",
390 pci_name(priv
->pdev
), filename
);
391 mwl8k_release_fw(&priv
->fw
.helper
);
398 struct mwl8k_cmd_pkt
{
404 } __attribute__((packed
));
410 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
412 void __iomem
*regs
= priv
->regs
;
416 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
417 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
420 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
421 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
422 iowrite32(MWL8K_H2A_INT_DOORBELL
,
423 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
424 iowrite32(MWL8K_H2A_INT_DUMMY
,
425 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
431 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
432 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
433 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
440 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
442 return loops
? 0 : -ETIMEDOUT
;
445 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
446 const u8
*data
, size_t length
)
448 struct mwl8k_cmd_pkt
*cmd
;
452 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
456 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
462 int block_size
= length
> 256 ? 256 : length
;
464 memcpy(cmd
->payload
, data
+ done
, block_size
);
465 cmd
->length
= cpu_to_le16(block_size
);
467 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
468 sizeof(*cmd
) + block_size
);
473 length
-= block_size
;
478 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
486 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
487 const u8
*data
, size_t length
)
489 unsigned char *buffer
;
490 int may_continue
, rc
= 0;
491 u32 done
, prev_block_size
;
493 buffer
= kmalloc(1024, GFP_KERNEL
);
500 while (may_continue
> 0) {
503 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
504 if (block_size
& 1) {
508 done
+= prev_block_size
;
509 length
-= prev_block_size
;
512 if (block_size
> 1024 || block_size
> length
) {
522 if (block_size
== 0) {
529 prev_block_size
= block_size
;
530 memcpy(buffer
, data
+ done
, block_size
);
532 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
537 if (!rc
&& length
!= 0)
545 static int mwl8k_load_firmware(struct mwl8k_priv
*priv
)
549 const u8
*ucode
= priv
->fw
.ucode
->data
;
550 size_t ucode_len
= priv
->fw
.ucode
->size
;
551 const u8
*helper
= priv
->fw
.helper
->data
;
552 size_t helper_len
= priv
->fw
.helper
->size
;
554 if (!memcmp(ucode
, "\x01\x00\x00\x00", 4)) {
555 rc
= mwl8k_load_fw_image(priv
, helper
, helper_len
);
557 printk(KERN_ERR
"%s: unable to load firmware "
558 "helper image\n", pci_name(priv
->pdev
));
563 rc
= mwl8k_feed_fw_image(priv
, ucode
, ucode_len
);
565 rc
= mwl8k_load_fw_image(priv
, ucode
, ucode_len
);
569 printk(KERN_ERR
"%s: unable to load firmware data\n",
570 pci_name(priv
->pdev
));
574 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
579 if (ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
)
580 == MWL8K_FWSTA_READY
)
585 return loops
? 0 : -ETIMEDOUT
;
590 * Defines shared between transmission and reception.
592 /* HT control fields for firmware */
597 } __attribute__((packed
));
599 /* Firmware Station database operations */
600 #define MWL8K_STA_DB_ADD_ENTRY 0
601 #define MWL8K_STA_DB_MODIFY_ENTRY 1
602 #define MWL8K_STA_DB_DEL_ENTRY 2
603 #define MWL8K_STA_DB_FLUSH 3
605 /* Peer Entry flags - used to define the type of the peer node */
606 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
608 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
609 #define MWL8K_MCS_BITMAP_SIZE 16
611 struct peer_capability_info
{
612 /* Peer type - AP vs. STA. */
615 /* Basic 802.11 capabilities from assoc resp. */
618 /* Set if peer supports 802.11n high throughput (HT). */
621 /* Valid if HT is supported. */
623 __u8 extended_ht_caps
;
624 struct ewc_ht_info ewc_info
;
626 /* Legacy rate table. Intersection of our rates and peer rates. */
627 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
629 /* HT rate table. Intersection of our rates and peer rates. */
630 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
633 /* If set, interoperability mode, no proprietary extensions. */
637 __le16 amsdu_enabled
;
638 } __attribute__((packed
));
640 /* Inline functions to manipulate QoS field in data descriptor. */
641 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
643 u16 val_mask
= 1 << 4;
645 /* End of Service Period Bit 4 */
646 return qos
| val_mask
;
649 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
653 u16 qos_mask
= ~(val_mask
<< shift
);
655 /* Ack Policy Bit 5-6 */
656 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
659 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
661 u16 val_mask
= 1 << 7;
663 /* AMSDU present Bit 7 */
664 return qos
| val_mask
;
667 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
671 u16 qos_mask
= ~(val_mask
<< shift
);
673 /* Queue Length Bits 8-15 */
674 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
677 /* DMA header used by firmware and hardware. */
678 struct mwl8k_dma_data
{
680 struct ieee80211_hdr wh
;
681 } __attribute__((packed
));
683 /* Routines to add/remove DMA header from skb. */
684 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
686 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
687 void *dst
, *src
= &tr
->wh
;
688 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
689 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
691 dst
= (void *)tr
+ space
;
693 memmove(dst
, src
, hdrlen
);
694 skb_pull(skb
, space
);
698 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
700 struct ieee80211_hdr
*wh
;
702 struct mwl8k_dma_data
*tr
;
704 wh
= (struct ieee80211_hdr
*)skb
->data
;
705 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
709 * Copy up/down the 802.11 header; the firmware requires
710 * we present a 2-byte payload length followed by a
711 * 4-address header (w/o QoS), followed (optionally) by
712 * any WEP/ExtIV header (but only filled in for CCMP).
714 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
715 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
717 tr
= (struct mwl8k_dma_data
*)skb
->data
;
719 memmove(&tr
->wh
, wh
, hdrlen
);
722 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
725 * Firmware length is the length of the fully formed "802.11
726 * payload". That is, everything except for the 802.11 header.
727 * This includes all crypto material including the MIC.
729 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
736 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
738 struct mwl8k_rx_desc
{
742 __le32 pkt_phys_addr
;
743 __le32 next_rx_desc_phys_addr
;
753 } __attribute__((packed
));
755 #define MWL8K_RX_DESCS 256
756 #define MWL8K_RX_MAXSZ 3800
758 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
760 struct mwl8k_priv
*priv
= hw
->priv
;
761 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
765 rxq
->rx_desc_count
= 0;
769 size
= MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
);
772 pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rx_desc_dma
);
773 if (rxq
->rx_desc_area
== NULL
) {
774 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
778 memset(rxq
->rx_desc_area
, 0, size
);
780 rxq
->rx_skb
= kmalloc(MWL8K_RX_DESCS
*
781 sizeof(*rxq
->rx_skb
), GFP_KERNEL
);
782 if (rxq
->rx_skb
== NULL
) {
783 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
785 pci_free_consistent(priv
->pdev
, size
,
786 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
789 memset(rxq
->rx_skb
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->rx_skb
));
791 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
792 struct mwl8k_rx_desc
*rx_desc
;
795 rx_desc
= rxq
->rx_desc_area
+ i
;
796 nexti
= (i
+ 1) % MWL8K_RX_DESCS
;
798 rx_desc
->next_rx_desc_phys_addr
=
799 cpu_to_le32(rxq
->rx_desc_dma
800 + nexti
* sizeof(*rx_desc
));
801 rx_desc
->rx_ctrl
= MWL8K_RX_CTRL_OWNED_BY_HOST
;
807 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
809 struct mwl8k_priv
*priv
= hw
->priv
;
810 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
814 while (rxq
->rx_desc_count
< MWL8K_RX_DESCS
&& limit
--) {
818 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
822 rxq
->rx_desc_count
++;
825 rxq
->rx_tail
= (rx
+ 1) % MWL8K_RX_DESCS
;
827 rxq
->rx_desc_area
[rx
].pkt_phys_addr
=
828 cpu_to_le32(pci_map_single(priv
->pdev
, skb
->data
,
829 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
));
831 rxq
->rx_desc_area
[rx
].pkt_len
= cpu_to_le16(MWL8K_RX_MAXSZ
);
832 rxq
->rx_skb
[rx
] = skb
;
834 rxq
->rx_desc_area
[rx
].rx_ctrl
= 0;
842 /* Must be called only when the card's reception is completely halted */
843 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
845 struct mwl8k_priv
*priv
= hw
->priv
;
846 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
849 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
850 if (rxq
->rx_skb
[i
] != NULL
) {
853 addr
= le32_to_cpu(rxq
->rx_desc_area
[i
].pkt_phys_addr
);
854 pci_unmap_single(priv
->pdev
, addr
, MWL8K_RX_MAXSZ
,
856 kfree_skb(rxq
->rx_skb
[i
]);
857 rxq
->rx_skb
[i
] = NULL
;
864 pci_free_consistent(priv
->pdev
,
865 MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
),
866 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
867 rxq
->rx_desc_area
= NULL
;
872 * Scan a list of BSSIDs to process for finalize join.
873 * Allows for extension to process multiple BSSIDs.
876 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
878 return priv
->capture_beacon
&&
879 ieee80211_is_beacon(wh
->frame_control
) &&
880 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
883 static inline void mwl8k_save_beacon(struct mwl8k_priv
*priv
,
886 priv
->capture_beacon
= false;
887 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
890 * Use GFP_ATOMIC as rxq_process is called from
891 * the primary interrupt handler, memory allocation call
894 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
895 if (priv
->beacon_skb
!= NULL
)
896 queue_work(priv
->config_wq
,
897 &priv
->finalize_join_worker
);
900 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
902 struct mwl8k_priv
*priv
= hw
->priv
;
903 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
907 while (rxq
->rx_desc_count
&& limit
--) {
908 struct mwl8k_rx_desc
*rx_desc
;
910 struct ieee80211_rx_status status
;
912 struct ieee80211_hdr
*wh
;
914 rx_desc
= rxq
->rx_desc_area
+ rxq
->rx_head
;
915 if (!(rx_desc
->rx_ctrl
& MWL8K_RX_CTRL_OWNED_BY_HOST
))
919 skb
= rxq
->rx_skb
[rxq
->rx_head
];
922 rxq
->rx_skb
[rxq
->rx_head
] = NULL
;
924 rxq
->rx_head
= (rxq
->rx_head
+ 1) % MWL8K_RX_DESCS
;
925 rxq
->rx_desc_count
--;
927 addr
= le32_to_cpu(rx_desc
->pkt_phys_addr
);
928 pci_unmap_single(priv
->pdev
, addr
,
929 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
931 skb_put(skb
, le16_to_cpu(rx_desc
->pkt_len
));
932 mwl8k_remove_dma_header(skb
);
934 wh
= (struct ieee80211_hdr
*)skb
->data
;
937 * Check for pending join operation. save a copy of
938 * the beacon and schedule a tasklet to send finalize
939 * join command to the firmware.
941 if (mwl8k_capture_bssid(priv
, wh
))
942 mwl8k_save_beacon(priv
, skb
);
944 memset(&status
, 0, sizeof(status
));
946 status
.signal
= -rx_desc
->rssi
;
947 status
.noise
= -rx_desc
->noise_level
;
948 status
.qual
= rx_desc
->link_quality
;
952 status
.band
= IEEE80211_BAND_2GHZ
;
953 status
.freq
= ieee80211_channel_to_frequency(rx_desc
->channel
);
954 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
955 ieee80211_rx_irqsafe(hw
, skb
);
965 * Packet transmission.
968 /* Transmit queue assignment. */
970 MWL8K_WME_AC_BK
= 0, /* background access */
971 MWL8K_WME_AC_BE
= 1, /* best effort access */
972 MWL8K_WME_AC_VI
= 2, /* video access */
973 MWL8K_WME_AC_VO
= 3, /* voice access */
976 /* Transmit packet ACK policy */
977 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
978 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
980 #define GET_TXQ(_ac) (\
981 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
982 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
983 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
986 #define MWL8K_TXD_STATUS_OK 0x00000001
987 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
988 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
989 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
990 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
992 struct mwl8k_tx_desc
{
997 __le32 pkt_phys_addr
;
999 __u8 dest_MAC_addr
[ETH_ALEN
];
1000 __le32 next_tx_desc_phys_addr
;
1005 } __attribute__((packed
));
1007 #define MWL8K_TX_DESCS 128
1009 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1011 struct mwl8k_priv
*priv
= hw
->priv
;
1012 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1016 memset(&txq
->tx_stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1017 txq
->tx_stats
.limit
= MWL8K_TX_DESCS
;
1021 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1024 pci_alloc_consistent(priv
->pdev
, size
, &txq
->tx_desc_dma
);
1025 if (txq
->tx_desc_area
== NULL
) {
1026 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1030 memset(txq
->tx_desc_area
, 0, size
);
1032 txq
->tx_skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
),
1034 if (txq
->tx_skb
== NULL
) {
1035 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1037 pci_free_consistent(priv
->pdev
, size
,
1038 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1041 memset(txq
->tx_skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
));
1043 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1044 struct mwl8k_tx_desc
*tx_desc
;
1047 tx_desc
= txq
->tx_desc_area
+ i
;
1048 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1050 tx_desc
->status
= 0;
1051 tx_desc
->next_tx_desc_phys_addr
=
1052 cpu_to_le32(txq
->tx_desc_dma
+
1053 nexti
* sizeof(*tx_desc
));
1059 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1061 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1062 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1063 iowrite32(MWL8K_H2A_INT_DUMMY
,
1064 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1065 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1068 static inline int mwl8k_txq_busy(struct mwl8k_priv
*priv
)
1070 return priv
->pending_tx_pkts
;
1073 struct mwl8k_txq_info
{
1082 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1083 struct mwl8k_txq_info
*txinfo
)
1085 int count
, desc
, status
;
1086 struct mwl8k_tx_queue
*txq
;
1087 struct mwl8k_tx_desc
*tx_desc
;
1090 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1092 spin_lock_bh(&priv
->tx_lock
);
1093 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1094 txq
= priv
->txq
+ count
;
1095 txinfo
[count
].len
= txq
->tx_stats
.len
;
1096 txinfo
[count
].head
= txq
->tx_head
;
1097 txinfo
[count
].tail
= txq
->tx_tail
;
1098 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1099 tx_desc
= txq
->tx_desc_area
+ desc
;
1100 status
= le32_to_cpu(tx_desc
->status
);
1102 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1103 txinfo
[count
].fw_owned
++;
1105 txinfo
[count
].drv_owned
++;
1107 if (tx_desc
->pkt_len
== 0)
1108 txinfo
[count
].unused
++;
1111 spin_unlock_bh(&priv
->tx_lock
);
1117 * Must be called with hw->fw_mutex held and tx queues stopped.
1119 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1121 struct mwl8k_priv
*priv
= hw
->priv
;
1122 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1124 unsigned long timeout
;
1128 spin_lock_bh(&priv
->tx_lock
);
1129 count
= mwl8k_txq_busy(priv
);
1131 priv
->tx_wait
= &cmd_wait
;
1133 mwl8k_tx_start(priv
);
1135 spin_unlock_bh(&priv
->tx_lock
);
1138 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1142 timeout
= wait_for_completion_timeout(&cmd_wait
,
1143 msecs_to_jiffies(5000));
1147 spin_lock_bh(&priv
->tx_lock
);
1148 priv
->tx_wait
= NULL
;
1149 newcount
= mwl8k_txq_busy(priv
);
1150 spin_unlock_bh(&priv
->tx_lock
);
1152 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1153 __func__
, __LINE__
, count
, newcount
);
1155 mwl8k_scan_tx_ring(priv
, txinfo
);
1156 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1158 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1163 txinfo
[index
].fw_owned
,
1164 txinfo
[index
].drv_owned
,
1165 txinfo
[index
].unused
);
1173 #define MWL8K_TXD_SUCCESS(status) \
1174 ((status) & (MWL8K_TXD_STATUS_OK | \
1175 MWL8K_TXD_STATUS_OK_RETRY | \
1176 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1178 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1180 struct mwl8k_priv
*priv
= hw
->priv
;
1181 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1184 while (txq
->tx_stats
.len
> 0) {
1186 struct mwl8k_tx_desc
*tx_desc
;
1189 struct sk_buff
*skb
;
1190 struct ieee80211_tx_info
*info
;
1194 tx_desc
= txq
->tx_desc_area
+ tx
;
1196 status
= le32_to_cpu(tx_desc
->status
);
1198 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1202 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1205 txq
->tx_head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1206 BUG_ON(txq
->tx_stats
.len
== 0);
1207 txq
->tx_stats
.len
--;
1208 priv
->pending_tx_pkts
--;
1210 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1211 size
= le16_to_cpu(tx_desc
->pkt_len
);
1212 skb
= txq
->tx_skb
[tx
];
1213 txq
->tx_skb
[tx
] = NULL
;
1215 BUG_ON(skb
== NULL
);
1216 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1218 mwl8k_remove_dma_header(skb
);
1220 /* Mark descriptor as unused */
1221 tx_desc
->pkt_phys_addr
= 0;
1222 tx_desc
->pkt_len
= 0;
1224 info
= IEEE80211_SKB_CB(skb
);
1225 ieee80211_tx_info_clear_status(info
);
1226 if (MWL8K_TXD_SUCCESS(status
))
1227 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1229 ieee80211_tx_status_irqsafe(hw
, skb
);
1234 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1235 ieee80211_wake_queue(hw
, index
);
1238 /* must be called only when the card's transmit is completely halted */
1239 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1241 struct mwl8k_priv
*priv
= hw
->priv
;
1242 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1244 mwl8k_txq_reclaim(hw
, index
, 1);
1249 pci_free_consistent(priv
->pdev
,
1250 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1251 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1252 txq
->tx_desc_area
= NULL
;
1256 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1258 struct mwl8k_priv
*priv
= hw
->priv
;
1259 struct ieee80211_tx_info
*tx_info
;
1260 struct mwl8k_vif
*mwl8k_vif
;
1261 struct ieee80211_hdr
*wh
;
1262 struct mwl8k_tx_queue
*txq
;
1263 struct mwl8k_tx_desc
*tx
;
1269 wh
= (struct ieee80211_hdr
*)skb
->data
;
1270 if (ieee80211_is_data_qos(wh
->frame_control
))
1271 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1275 mwl8k_add_dma_header(skb
);
1276 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1278 tx_info
= IEEE80211_SKB_CB(skb
);
1279 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1281 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1282 u16 seqno
= mwl8k_vif
->seqno
;
1284 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1285 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1286 mwl8k_vif
->seqno
= seqno
++ % 4096;
1289 /* Setup firmware control bit fields for each frame type. */
1292 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1293 ieee80211_is_ctl(wh
->frame_control
)) {
1295 qos
= mwl8k_qos_setbit_eosp(qos
);
1296 /* Set Queue size to unspecified */
1297 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1298 } else if (ieee80211_is_data(wh
->frame_control
)) {
1300 if (is_multicast_ether_addr(wh
->addr1
))
1301 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1303 /* Send pkt in an aggregate if AMPDU frame. */
1304 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1305 qos
= mwl8k_qos_setbit_ack(qos
,
1306 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1308 qos
= mwl8k_qos_setbit_ack(qos
,
1309 MWL8K_TXD_ACK_POLICY_NORMAL
);
1311 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1312 qos
= mwl8k_qos_setbit_amsdu(qos
);
1315 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1316 skb
->len
, PCI_DMA_TODEVICE
);
1318 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1319 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1320 "dropping TX frame.\n", priv
->name
);
1322 return NETDEV_TX_OK
;
1325 spin_lock_bh(&priv
->tx_lock
);
1327 txq
= priv
->txq
+ index
;
1329 BUG_ON(txq
->tx_skb
[txq
->tx_tail
] != NULL
);
1330 txq
->tx_skb
[txq
->tx_tail
] = skb
;
1332 tx
= txq
->tx_desc_area
+ txq
->tx_tail
;
1333 tx
->data_rate
= txdatarate
;
1334 tx
->tx_priority
= index
;
1335 tx
->qos_control
= cpu_to_le16(qos
);
1336 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1337 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1339 tx
->peer_id
= mwl8k_vif
->peer_id
;
1341 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1343 txq
->tx_stats
.count
++;
1344 txq
->tx_stats
.len
++;
1345 priv
->pending_tx_pkts
++;
1348 if (txq
->tx_tail
== MWL8K_TX_DESCS
)
1351 if (txq
->tx_head
== txq
->tx_tail
)
1352 ieee80211_stop_queue(hw
, index
);
1354 mwl8k_tx_start(priv
);
1356 spin_unlock_bh(&priv
->tx_lock
);
1358 return NETDEV_TX_OK
;
1365 * We have the following requirements for issuing firmware commands:
1366 * - Some commands require that the packet transmit path is idle when
1367 * the command is issued. (For simplicity, we'll just quiesce the
1368 * transmit path for every command.)
1369 * - There are certain sequences of commands that need to be issued to
1370 * the hardware sequentially, with no other intervening commands.
1372 * This leads to an implementation of a "firmware lock" as a mutex that
1373 * can be taken recursively, and which is taken by both the low-level
1374 * command submission function (mwl8k_post_cmd) as well as any users of
1375 * that function that require issuing of an atomic sequence of commands,
1376 * and quiesces the transmit path whenever it's taken.
1378 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1380 struct mwl8k_priv
*priv
= hw
->priv
;
1382 if (priv
->fw_mutex_owner
!= current
) {
1385 mutex_lock(&priv
->fw_mutex
);
1386 ieee80211_stop_queues(hw
);
1388 rc
= mwl8k_tx_wait_empty(hw
);
1390 ieee80211_wake_queues(hw
);
1391 mutex_unlock(&priv
->fw_mutex
);
1396 priv
->fw_mutex_owner
= current
;
1399 priv
->fw_mutex_depth
++;
1404 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1406 struct mwl8k_priv
*priv
= hw
->priv
;
1408 if (!--priv
->fw_mutex_depth
) {
1409 ieee80211_wake_queues(hw
);
1410 priv
->fw_mutex_owner
= NULL
;
1411 mutex_unlock(&priv
->fw_mutex
);
1417 * Command processing.
1420 /* Timeout firmware commands after 2000ms */
1421 #define MWL8K_CMD_TIMEOUT_MS 2000
1423 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1425 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1426 struct mwl8k_priv
*priv
= hw
->priv
;
1427 void __iomem
*regs
= priv
->regs
;
1428 dma_addr_t dma_addr
;
1429 unsigned int dma_size
;
1431 unsigned long timeout
= 0;
1434 cmd
->result
= 0xFFFF;
1435 dma_size
= le16_to_cpu(cmd
->length
);
1436 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1437 PCI_DMA_BIDIRECTIONAL
);
1438 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1441 rc
= mwl8k_fw_lock(hw
);
1443 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1444 PCI_DMA_BIDIRECTIONAL
);
1448 priv
->hostcmd_wait
= &cmd_wait
;
1449 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1450 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1451 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1452 iowrite32(MWL8K_H2A_INT_DUMMY
,
1453 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1455 timeout
= wait_for_completion_timeout(&cmd_wait
,
1456 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1458 priv
->hostcmd_wait
= NULL
;
1460 mwl8k_fw_unlock(hw
);
1462 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1463 PCI_DMA_BIDIRECTIONAL
);
1466 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1468 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1469 MWL8K_CMD_TIMEOUT_MS
);
1472 rc
= cmd
->result
? -EINVAL
: 0;
1474 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1476 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1477 le16_to_cpu(cmd
->result
));
1486 struct mwl8k_cmd_get_hw_spec
{
1487 struct mwl8k_cmd_pkt header
;
1489 __u8 host_interface
;
1491 __u8 perm_addr
[ETH_ALEN
];
1496 __u8 mcs_bitmap
[16];
1497 __le32 rx_queue_ptr
;
1498 __le32 num_tx_queues
;
1499 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1501 __le32 num_tx_desc_per_queue
;
1502 __le32 total_rx_desc
;
1503 } __attribute__((packed
));
1505 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw
*hw
)
1507 struct mwl8k_priv
*priv
= hw
->priv
;
1508 struct mwl8k_cmd_get_hw_spec
*cmd
;
1512 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1516 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1517 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1519 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1520 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1521 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rx_desc_dma
);
1522 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1523 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1524 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].tx_desc_dma
);
1525 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1526 cmd
->total_rx_desc
= cpu_to_le32(MWL8K_RX_DESCS
);
1528 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1531 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1532 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1533 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1534 priv
->hw_rev
= cmd
->hw_rev
;
1542 * CMD_MAC_MULTICAST_ADR.
1544 struct mwl8k_cmd_mac_multicast_adr
{
1545 struct mwl8k_cmd_pkt header
;
1548 __u8 addr
[0][ETH_ALEN
];
1551 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1553 static struct mwl8k_cmd_pkt
*
1554 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
,
1555 int mc_count
, struct dev_addr_list
*mclist
)
1557 struct mwl8k_priv
*priv
= hw
->priv
;
1558 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1562 if (mc_count
> priv
->num_mcaddrs
)
1563 mc_count
= priv
->num_mcaddrs
;
1565 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1567 cmd
= kzalloc(size
, GFP_ATOMIC
);
1571 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1572 cmd
->header
.length
= cpu_to_le16(size
);
1573 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1574 cmd
->numaddr
= cpu_to_le16(mc_count
);
1576 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1577 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1581 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1582 mclist
= mclist
->next
;
1585 return &cmd
->header
;
1589 * CMD_802_11_GET_STAT.
1591 struct mwl8k_cmd_802_11_get_stat
{
1592 struct mwl8k_cmd_pkt header
;
1594 } __attribute__((packed
));
1596 #define MWL8K_STAT_ACK_FAILURE 9
1597 #define MWL8K_STAT_RTS_FAILURE 12
1598 #define MWL8K_STAT_FCS_ERROR 24
1599 #define MWL8K_STAT_RTS_SUCCESS 11
1601 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1602 struct ieee80211_low_level_stats
*stats
)
1604 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1607 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1611 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1612 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1614 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1616 stats
->dot11ACKFailureCount
=
1617 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1618 stats
->dot11RTSFailureCount
=
1619 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1620 stats
->dot11FCSErrorCount
=
1621 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1622 stats
->dot11RTSSuccessCount
=
1623 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1631 * CMD_802_11_RADIO_CONTROL.
1633 struct mwl8k_cmd_802_11_radio_control
{
1634 struct mwl8k_cmd_pkt header
;
1638 } __attribute__((packed
));
1641 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1643 struct mwl8k_priv
*priv
= hw
->priv
;
1644 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1647 if (enable
== priv
->radio_on
&& !force
)
1650 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1654 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1655 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1656 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1657 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1658 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1660 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1664 priv
->radio_on
= enable
;
1669 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1671 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1674 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1676 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1680 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1682 struct mwl8k_priv
*priv
;
1684 if (hw
== NULL
|| hw
->priv
== NULL
)
1688 priv
->radio_short_preamble
= short_preamble
;
1690 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1694 * CMD_802_11_RF_TX_POWER.
1696 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1698 struct mwl8k_cmd_802_11_rf_tx_power
{
1699 struct mwl8k_cmd_pkt header
;
1701 __le16 support_level
;
1702 __le16 current_level
;
1704 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1705 } __attribute__((packed
));
1707 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1709 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1712 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1716 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1717 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1718 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1719 cmd
->support_level
= cpu_to_le16(dBm
);
1721 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1730 struct mwl8k_cmd_set_pre_scan
{
1731 struct mwl8k_cmd_pkt header
;
1732 } __attribute__((packed
));
1734 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
1736 struct mwl8k_cmd_set_pre_scan
*cmd
;
1739 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1743 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
1744 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1746 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1753 * CMD_SET_POST_SCAN.
1755 struct mwl8k_cmd_set_post_scan
{
1756 struct mwl8k_cmd_pkt header
;
1758 __u8 bssid
[ETH_ALEN
];
1759 } __attribute__((packed
));
1762 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
1764 struct mwl8k_cmd_set_post_scan
*cmd
;
1767 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1771 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
1772 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1774 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
1776 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1783 * CMD_SET_RF_CHANNEL.
1785 struct mwl8k_cmd_set_rf_channel
{
1786 struct mwl8k_cmd_pkt header
;
1788 __u8 current_channel
;
1789 __le32 channel_flags
;
1790 } __attribute__((packed
));
1792 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
1793 struct ieee80211_channel
*channel
)
1795 struct mwl8k_cmd_set_rf_channel
*cmd
;
1798 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1802 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
1803 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1804 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1805 cmd
->current_channel
= channel
->hw_value
;
1806 if (channel
->band
== IEEE80211_BAND_2GHZ
)
1807 cmd
->channel_flags
= cpu_to_le32(0x00000081);
1809 cmd
->channel_flags
= cpu_to_le32(0x00000000);
1811 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1820 struct mwl8k_cmd_set_slot
{
1821 struct mwl8k_cmd_pkt header
;
1824 } __attribute__((packed
));
1826 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
1828 struct mwl8k_cmd_set_slot
*cmd
;
1831 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1835 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
1836 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1837 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1838 cmd
->short_slot
= short_slot_time
;
1840 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1849 struct mwl8k_cmd_mimo_config
{
1850 struct mwl8k_cmd_pkt header
;
1852 __u8 rx_antenna_map
;
1853 __u8 tx_antenna_map
;
1854 } __attribute__((packed
));
1856 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
1858 struct mwl8k_cmd_mimo_config
*cmd
;
1861 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1865 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
1866 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1867 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
1868 cmd
->rx_antenna_map
= rx
;
1869 cmd
->tx_antenna_map
= tx
;
1871 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1878 * CMD_ENABLE_SNIFFER.
1880 struct mwl8k_cmd_enable_sniffer
{
1881 struct mwl8k_cmd_pkt header
;
1883 } __attribute__((packed
));
1885 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
1887 struct mwl8k_cmd_enable_sniffer
*cmd
;
1890 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1894 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
1895 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1896 cmd
->action
= cpu_to_le32(!!enable
);
1898 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1905 * CMD_SET_RATEADAPT_MODE.
1907 struct mwl8k_cmd_set_rate_adapt_mode
{
1908 struct mwl8k_cmd_pkt header
;
1911 } __attribute__((packed
));
1913 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
1915 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
1918 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1922 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
1923 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1924 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1925 cmd
->mode
= cpu_to_le16(mode
);
1927 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1936 struct mwl8k_cmd_set_wmm
{
1937 struct mwl8k_cmd_pkt header
;
1939 } __attribute__((packed
));
1941 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
1943 struct mwl8k_priv
*priv
= hw
->priv
;
1944 struct mwl8k_cmd_set_wmm
*cmd
;
1947 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1951 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
1952 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1953 cmd
->action
= cpu_to_le16(!!enable
);
1955 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1959 priv
->wmm_enabled
= enable
;
1965 * CMD_SET_RTS_THRESHOLD.
1967 struct mwl8k_cmd_rts_threshold
{
1968 struct mwl8k_cmd_pkt header
;
1971 } __attribute__((packed
));
1973 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
1974 u16 action
, u16 threshold
)
1976 struct mwl8k_cmd_rts_threshold
*cmd
;
1979 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1983 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
1984 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1985 cmd
->action
= cpu_to_le16(action
);
1986 cmd
->threshold
= cpu_to_le16(threshold
);
1988 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1995 * CMD_SET_EDCA_PARAMS.
1997 struct mwl8k_cmd_set_edca_params
{
1998 struct mwl8k_cmd_pkt header
;
2000 /* See MWL8K_SET_EDCA_XXX below */
2003 /* TX opportunity in units of 32 us */
2006 /* Log exponent of max contention period: 0...15*/
2009 /* Log exponent of min contention period: 0...15 */
2012 /* Adaptive interframe spacing in units of 32us */
2015 /* TX queue to configure */
2017 } __attribute__((packed
));
2019 #define MWL8K_SET_EDCA_CW 0x01
2020 #define MWL8K_SET_EDCA_TXOP 0x02
2021 #define MWL8K_SET_EDCA_AIFS 0x04
2023 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2024 MWL8K_SET_EDCA_TXOP | \
2025 MWL8K_SET_EDCA_AIFS)
2028 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2029 __u16 cw_min
, __u16 cw_max
,
2030 __u8 aifs
, __u16 txop
)
2032 struct mwl8k_cmd_set_edca_params
*cmd
;
2035 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2039 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2040 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2041 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2042 cmd
->txop
= cpu_to_le16(txop
);
2043 cmd
->log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2044 cmd
->log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2048 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2055 * CMD_FINALIZE_JOIN.
2058 /* FJ beacon buffer size is compiled into the firmware. */
2059 #define MWL8K_FJ_BEACON_MAXLEN 128
2061 struct mwl8k_cmd_finalize_join
{
2062 struct mwl8k_cmd_pkt header
;
2063 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2064 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2065 } __attribute__((packed
));
2067 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2068 __u16 framelen
, __u16 dtim
)
2070 struct mwl8k_cmd_finalize_join
*cmd
;
2071 struct ieee80211_mgmt
*payload
= frame
;
2079 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2083 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2084 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2085 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2087 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2089 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2091 /* XXX TBD Might just have to abort and return an error */
2092 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2093 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2094 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2095 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2097 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2098 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2100 if (payload
&& payload_len
)
2101 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2103 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2111 struct mwl8k_cmd_update_sta_db
{
2112 struct mwl8k_cmd_pkt header
;
2114 /* See STADB_ACTION_TYPE */
2117 /* Peer MAC address */
2118 __u8 peer_addr
[ETH_ALEN
];
2122 /* Peer info - valid during add/update. */
2123 struct peer_capability_info peer_info
;
2124 } __attribute__((packed
));
2126 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2127 struct ieee80211_vif
*vif
, __u32 action
)
2129 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2130 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2131 struct mwl8k_cmd_update_sta_db
*cmd
;
2132 struct peer_capability_info
*peer_info
;
2133 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2137 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2141 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2142 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2144 cmd
->action
= cpu_to_le32(action
);
2145 peer_info
= &cmd
->peer_info
;
2146 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2149 case MWL8K_STA_DB_ADD_ENTRY
:
2150 case MWL8K_STA_DB_MODIFY_ENTRY
:
2151 /* Build peer_info block */
2152 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2153 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2154 peer_info
->interop
= 1;
2155 peer_info
->amsdu_enabled
= 0;
2157 rates
= peer_info
->legacy_rates
;
2158 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2159 rates
[count
] = bitrates
[count
].hw_value
;
2161 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2163 mv_vif
->peer_id
= peer_info
->station_id
;
2167 case MWL8K_STA_DB_DEL_ENTRY
:
2168 case MWL8K_STA_DB_FLUSH
:
2170 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2172 mv_vif
->peer_id
= 0;
2183 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2185 #define MWL8K_FRAME_PROT_DISABLED 0x00
2186 #define MWL8K_FRAME_PROT_11G 0x07
2187 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2188 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2190 struct mwl8k_cmd_update_set_aid
{
2191 struct mwl8k_cmd_pkt header
;
2194 /* AP's MAC address (BSSID) */
2195 __u8 bssid
[ETH_ALEN
];
2196 __le16 protection_mode
;
2197 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2198 } __attribute__((packed
));
2200 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2201 struct ieee80211_vif
*vif
)
2203 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2204 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2205 struct mwl8k_cmd_update_set_aid
*cmd
;
2206 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2211 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2215 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2216 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2217 cmd
->aid
= cpu_to_le16(info
->aid
);
2219 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2221 if (info
->use_cts_prot
) {
2222 prot_mode
= MWL8K_FRAME_PROT_11G
;
2224 switch (info
->ht_operation_mode
&
2225 IEEE80211_HT_OP_MODE_PROTECTION
) {
2226 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2227 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2229 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2230 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2233 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2237 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2239 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2240 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2242 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2251 struct mwl8k_cmd_update_rateset
{
2252 struct mwl8k_cmd_pkt header
;
2253 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2255 /* Bitmap for supported MCS codes. */
2256 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2257 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2258 } __attribute__((packed
));
2260 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2261 struct ieee80211_vif
*vif
)
2263 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2264 struct mwl8k_cmd_update_rateset
*cmd
;
2265 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2269 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2273 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2274 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2276 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2277 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2279 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2286 * CMD_USE_FIXED_RATE.
2288 #define MWL8K_RATE_TABLE_SIZE 8
2289 #define MWL8K_UCAST_RATE 0
2290 #define MWL8K_USE_AUTO_RATE 0x0002
2292 struct mwl8k_rate_entry
{
2293 /* Set to 1 if HT rate, 0 if legacy. */
2296 /* Set to 1 to use retry_count field. */
2297 __le32 enable_retry
;
2299 /* Specified legacy rate or MCS. */
2302 /* Number of allowed retries. */
2304 } __attribute__((packed
));
2306 struct mwl8k_rate_table
{
2307 /* 1 to allow specified rate and below */
2308 __le32 allow_rate_drop
;
2310 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2311 } __attribute__((packed
));
2313 struct mwl8k_cmd_use_fixed_rate
{
2314 struct mwl8k_cmd_pkt header
;
2316 struct mwl8k_rate_table rate_table
;
2318 /* Unicast, Broadcast or Multicast */
2322 } __attribute__((packed
));
2324 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2325 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2327 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2331 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2335 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2336 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2338 cmd
->action
= cpu_to_le32(action
);
2339 cmd
->rate_type
= cpu_to_le32(rate_type
);
2341 if (rate_table
!= NULL
) {
2342 /* Copy over each field manually so
2343 * that bitflipping can be done
2345 cmd
->rate_table
.allow_rate_drop
=
2346 cpu_to_le32(rate_table
->allow_rate_drop
);
2347 cmd
->rate_table
.num_rates
=
2348 cpu_to_le32(rate_table
->num_rates
);
2350 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2351 struct mwl8k_rate_entry
*dst
=
2352 &cmd
->rate_table
.rate_entry
[count
];
2353 struct mwl8k_rate_entry
*src
=
2354 &rate_table
->rate_entry
[count
];
2356 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2357 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2358 dst
->rate
= cpu_to_le32(src
->rate
);
2359 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2363 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2371 * Interrupt handling.
2373 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2375 struct ieee80211_hw
*hw
= dev_id
;
2376 struct mwl8k_priv
*priv
= hw
->priv
;
2379 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2380 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2385 if (status
& MWL8K_A2H_INT_TX_DONE
)
2386 tasklet_schedule(&priv
->tx_reclaim_task
);
2388 if (status
& MWL8K_A2H_INT_RX_READY
) {
2389 while (rxq_process(hw
, 0, 1))
2390 rxq_refill(hw
, 0, 1);
2393 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2394 if (priv
->hostcmd_wait
!= NULL
)
2395 complete(priv
->hostcmd_wait
);
2398 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2399 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2400 priv
->radio_on
&& mwl8k_txq_busy(priv
))
2401 mwl8k_tx_start(priv
);
2409 * Core driver operations.
2411 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2413 struct mwl8k_priv
*priv
= hw
->priv
;
2414 int index
= skb_get_queue_mapping(skb
);
2417 if (priv
->current_channel
== NULL
) {
2418 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2419 "disabled\n", priv
->name
);
2421 return NETDEV_TX_OK
;
2424 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2429 static int mwl8k_start(struct ieee80211_hw
*hw
)
2431 struct mwl8k_priv
*priv
= hw
->priv
;
2434 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2435 IRQF_SHARED
, MWL8K_NAME
, hw
);
2437 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2442 /* Enable tx reclaim tasklet */
2443 tasklet_enable(&priv
->tx_reclaim_task
);
2445 /* Enable interrupts */
2446 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2448 rc
= mwl8k_fw_lock(hw
);
2450 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2453 rc
= mwl8k_cmd_set_pre_scan(hw
);
2456 rc
= mwl8k_cmd_set_post_scan(hw
,
2457 "\x00\x00\x00\x00\x00\x00");
2460 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2463 rc
= mwl8k_set_wmm(hw
, 0);
2466 rc
= mwl8k_enable_sniffer(hw
, 0);
2468 mwl8k_fw_unlock(hw
);
2472 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2473 free_irq(priv
->pdev
->irq
, hw
);
2474 tasklet_disable(&priv
->tx_reclaim_task
);
2480 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2482 struct mwl8k_priv
*priv
= hw
->priv
;
2485 mwl8k_cmd_802_11_radio_disable(hw
);
2487 ieee80211_stop_queues(hw
);
2489 /* Disable interrupts */
2490 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2491 free_irq(priv
->pdev
->irq
, hw
);
2493 /* Stop finalize join worker */
2494 cancel_work_sync(&priv
->finalize_join_worker
);
2495 if (priv
->beacon_skb
!= NULL
)
2496 dev_kfree_skb(priv
->beacon_skb
);
2498 /* Stop tx reclaim tasklet */
2499 tasklet_disable(&priv
->tx_reclaim_task
);
2501 /* Stop config thread */
2502 flush_workqueue(priv
->config_wq
);
2504 /* Return all skbs to mac80211 */
2505 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2506 mwl8k_txq_reclaim(hw
, i
, 1);
2509 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2510 struct ieee80211_if_init_conf
*conf
)
2512 struct mwl8k_priv
*priv
= hw
->priv
;
2513 struct mwl8k_vif
*mwl8k_vif
;
2516 * We only support one active interface at a time.
2518 if (priv
->vif
!= NULL
)
2522 * We only support managed interfaces for now.
2524 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2527 /* Clean out driver private area */
2528 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2529 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2531 /* Save the mac address */
2532 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2534 /* Back pointer to parent config block */
2535 mwl8k_vif
->priv
= priv
;
2537 /* Setup initial PHY parameters */
2538 memcpy(mwl8k_vif
->legacy_rates
,
2539 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2540 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2542 /* Set Initial sequence number to zero */
2543 mwl8k_vif
->seqno
= 0;
2545 priv
->vif
= conf
->vif
;
2546 priv
->current_channel
= NULL
;
2551 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2552 struct ieee80211_if_init_conf
*conf
)
2554 struct mwl8k_priv
*priv
= hw
->priv
;
2556 if (priv
->vif
== NULL
)
2562 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2564 struct ieee80211_conf
*conf
= &hw
->conf
;
2565 struct mwl8k_priv
*priv
= hw
->priv
;
2568 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2569 mwl8k_cmd_802_11_radio_disable(hw
);
2570 priv
->current_channel
= NULL
;
2574 rc
= mwl8k_fw_lock(hw
);
2578 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2582 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2586 priv
->current_channel
= conf
->channel
;
2588 if (conf
->power_level
> 18)
2589 conf
->power_level
= 18;
2590 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2594 if (mwl8k_cmd_mimo_config(hw
, 0x7, 0x7))
2598 mwl8k_fw_unlock(hw
);
2603 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
2604 struct ieee80211_vif
*vif
,
2605 struct ieee80211_bss_conf
*info
,
2608 struct mwl8k_priv
*priv
= hw
->priv
;
2609 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
2612 if (changed
& BSS_CHANGED_BSSID
)
2613 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
2615 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
2618 priv
->capture_beacon
= false;
2620 rc
= mwl8k_fw_lock(hw
);
2625 memcpy(&mwl8k_vif
->bss_info
, info
,
2626 sizeof(struct ieee80211_bss_conf
));
2629 rc
= mwl8k_update_rateset(hw
, vif
);
2633 /* Turn on rate adaptation */
2634 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
2635 MWL8K_UCAST_RATE
, NULL
);
2639 /* Set radio preamble */
2640 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
2645 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
2649 /* Update peer rate info */
2650 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
2651 MWL8K_STA_DB_MODIFY_ENTRY
);
2656 rc
= mwl8k_cmd_set_aid(hw
, vif
);
2661 * Finalize the join. Tell rx handler to process
2662 * next beacon from our BSSID.
2664 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
2665 priv
->capture_beacon
= true;
2667 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
2668 memset(&mwl8k_vif
->bss_info
, 0,
2669 sizeof(struct ieee80211_bss_conf
));
2670 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
2674 mwl8k_fw_unlock(hw
);
2677 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
2678 int mc_count
, struct dev_addr_list
*mclist
)
2680 struct mwl8k_cmd_pkt
*cmd
;
2682 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, mc_count
, mclist
);
2684 return (unsigned long)cmd
;
2687 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
2688 unsigned int changed_flags
,
2689 unsigned int *total_flags
,
2692 struct mwl8k_priv
*priv
= hw
->priv
;
2693 struct mwl8k_cmd_pkt
*multicast_adr_cmd
;
2695 /* Clear unsupported feature flags */
2696 *total_flags
&= FIF_BCN_PRBRESP_PROMISC
;
2698 if (mwl8k_fw_lock(hw
))
2701 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2702 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
)
2703 mwl8k_cmd_set_pre_scan(hw
);
2707 bssid
= "\x00\x00\x00\x00\x00\x00";
2708 if (priv
->vif
!= NULL
)
2709 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
2711 mwl8k_cmd_set_post_scan(hw
, bssid
);
2715 multicast_adr_cmd
= (void *)(unsigned long)multicast
;
2716 if (multicast_adr_cmd
!= NULL
) {
2717 mwl8k_post_cmd(hw
, multicast_adr_cmd
);
2718 kfree(multicast_adr_cmd
);
2721 mwl8k_fw_unlock(hw
);
2724 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
2726 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
2729 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2730 const struct ieee80211_tx_queue_params
*params
)
2732 struct mwl8k_priv
*priv
= hw
->priv
;
2735 rc
= mwl8k_fw_lock(hw
);
2737 if (!priv
->wmm_enabled
)
2738 rc
= mwl8k_set_wmm(hw
, 1);
2741 rc
= mwl8k_set_edca_params(hw
, queue
,
2747 mwl8k_fw_unlock(hw
);
2753 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
2754 struct ieee80211_tx_queue_stats
*stats
)
2756 struct mwl8k_priv
*priv
= hw
->priv
;
2757 struct mwl8k_tx_queue
*txq
;
2760 spin_lock_bh(&priv
->tx_lock
);
2761 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
2762 txq
= priv
->txq
+ index
;
2763 memcpy(&stats
[index
], &txq
->tx_stats
,
2764 sizeof(struct ieee80211_tx_queue_stats
));
2766 spin_unlock_bh(&priv
->tx_lock
);
2771 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
2772 struct ieee80211_low_level_stats
*stats
)
2774 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
2777 static const struct ieee80211_ops mwl8k_ops
= {
2779 .start
= mwl8k_start
,
2781 .add_interface
= mwl8k_add_interface
,
2782 .remove_interface
= mwl8k_remove_interface
,
2783 .config
= mwl8k_config
,
2784 .bss_info_changed
= mwl8k_bss_info_changed
,
2785 .prepare_multicast
= mwl8k_prepare_multicast
,
2786 .configure_filter
= mwl8k_configure_filter
,
2787 .set_rts_threshold
= mwl8k_set_rts_threshold
,
2788 .conf_tx
= mwl8k_conf_tx
,
2789 .get_tx_stats
= mwl8k_get_tx_stats
,
2790 .get_stats
= mwl8k_get_stats
,
2793 static void mwl8k_tx_reclaim_handler(unsigned long data
)
2796 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
2797 struct mwl8k_priv
*priv
= hw
->priv
;
2799 spin_lock_bh(&priv
->tx_lock
);
2800 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2801 mwl8k_txq_reclaim(hw
, i
, 0);
2803 if (priv
->tx_wait
!= NULL
&& mwl8k_txq_busy(priv
) == 0) {
2804 complete(priv
->tx_wait
);
2805 priv
->tx_wait
= NULL
;
2807 spin_unlock_bh(&priv
->tx_lock
);
2810 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
2812 struct mwl8k_priv
*priv
=
2813 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
2814 struct sk_buff
*skb
= priv
->beacon_skb
;
2815 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
2817 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
2820 priv
->beacon_skb
= NULL
;
2823 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
2824 const struct pci_device_id
*id
)
2826 static int printed_version
= 0;
2827 struct ieee80211_hw
*hw
;
2828 struct mwl8k_priv
*priv
;
2832 if (!printed_version
) {
2833 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
2834 printed_version
= 1;
2837 rc
= pci_enable_device(pdev
);
2839 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
2844 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
2846 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
2851 pci_set_master(pdev
);
2853 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
2855 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
2863 priv
->wmm_enabled
= false;
2864 priv
->pending_tx_pkts
= 0;
2865 strncpy(priv
->name
, MWL8K_NAME
, sizeof(priv
->name
));
2867 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
2868 pci_set_drvdata(pdev
, hw
);
2870 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
2871 if (priv
->regs
== NULL
) {
2872 printk(KERN_ERR
"%s: Cannot map device memory\n", priv
->name
);
2876 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
2877 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
2878 priv
->band
.channels
= priv
->channels
;
2879 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
2880 priv
->band
.bitrates
= priv
->rates
;
2881 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
2882 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
2884 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
2885 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
2888 * Extra headroom is the size of the required DMA header
2889 * minus the size of the smallest 802.11 frame (CTS frame).
2891 hw
->extra_tx_headroom
=
2892 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
2894 hw
->channel_change_time
= 10;
2896 hw
->queues
= MWL8K_TX_QUEUES
;
2898 hw
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
2900 /* Set rssi and noise values to dBm */
2901 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
2902 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
2905 /* Set default radio state and preamble */
2907 priv
->radio_short_preamble
= 0;
2909 /* Finalize join worker */
2910 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
2912 /* TX reclaim tasklet */
2913 tasklet_init(&priv
->tx_reclaim_task
,
2914 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
2915 tasklet_disable(&priv
->tx_reclaim_task
);
2917 /* Config workthread */
2918 priv
->config_wq
= create_singlethread_workqueue("mwl8k_config");
2919 if (priv
->config_wq
== NULL
)
2922 /* Power management cookie */
2923 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
2924 if (priv
->cookie
== NULL
)
2927 rc
= mwl8k_rxq_init(hw
, 0);
2930 rxq_refill(hw
, 0, INT_MAX
);
2932 mutex_init(&priv
->fw_mutex
);
2933 priv
->fw_mutex_owner
= NULL
;
2934 priv
->fw_mutex_depth
= 0;
2935 priv
->tx_wait
= NULL
;
2936 priv
->hostcmd_wait
= NULL
;
2938 spin_lock_init(&priv
->tx_lock
);
2940 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
2941 rc
= mwl8k_txq_init(hw
, i
);
2943 goto err_free_queues
;
2946 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2947 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2948 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
2949 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
2951 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2952 IRQF_SHARED
, MWL8K_NAME
, hw
);
2954 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2956 goto err_free_queues
;
2959 /* Reset firmware and hardware */
2960 mwl8k_hw_reset(priv
);
2962 /* Ask userland hotplug daemon for the device firmware */
2963 rc
= mwl8k_request_firmware(priv
, (u32
)id
->driver_data
);
2965 printk(KERN_ERR
"%s: Firmware files not found\n", priv
->name
);
2969 /* Load firmware into hardware */
2970 rc
= mwl8k_load_firmware(priv
);
2972 printk(KERN_ERR
"%s: Cannot start firmware\n", priv
->name
);
2973 goto err_stop_firmware
;
2976 /* Reclaim memory once firmware is successfully loaded */
2977 mwl8k_release_firmware(priv
);
2980 * Temporarily enable interrupts. Initial firmware host
2981 * commands use interrupts and avoids polling. Disable
2982 * interrupts when done.
2984 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2986 /* Get config data, mac addrs etc */
2987 rc
= mwl8k_cmd_get_hw_spec(hw
);
2989 printk(KERN_ERR
"%s: Cannot initialise firmware\n", priv
->name
);
2990 goto err_stop_firmware
;
2993 /* Turn radio off */
2994 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
2996 printk(KERN_ERR
"%s: Cannot disable\n", priv
->name
);
2997 goto err_stop_firmware
;
3000 /* Disable interrupts */
3001 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3002 free_irq(priv
->pdev
->irq
, hw
);
3004 rc
= ieee80211_register_hw(hw
);
3006 printk(KERN_ERR
"%s: Cannot register device\n", priv
->name
);
3007 goto err_stop_firmware
;
3010 printk(KERN_INFO
"%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
3011 wiphy_name(hw
->wiphy
), priv
->part_num
, priv
->hw_rev
,
3012 hw
->wiphy
->perm_addr
,
3013 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3014 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3019 mwl8k_hw_reset(priv
);
3020 mwl8k_release_firmware(priv
);
3023 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3024 free_irq(priv
->pdev
->irq
, hw
);
3027 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3028 mwl8k_txq_deinit(hw
, i
);
3029 mwl8k_rxq_deinit(hw
, 0);
3032 if (priv
->cookie
!= NULL
)
3033 pci_free_consistent(priv
->pdev
, 4,
3034 priv
->cookie
, priv
->cookie_dma
);
3036 if (priv
->regs
!= NULL
)
3037 pci_iounmap(pdev
, priv
->regs
);
3039 if (priv
->config_wq
!= NULL
)
3040 destroy_workqueue(priv
->config_wq
);
3042 pci_set_drvdata(pdev
, NULL
);
3043 ieee80211_free_hw(hw
);
3046 pci_release_regions(pdev
);
3047 pci_disable_device(pdev
);
3052 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3054 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3057 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3059 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3060 struct mwl8k_priv
*priv
;
3067 ieee80211_stop_queues(hw
);
3069 ieee80211_unregister_hw(hw
);
3071 /* Remove tx reclaim tasklet */
3072 tasklet_kill(&priv
->tx_reclaim_task
);
3074 /* Stop config thread */
3075 destroy_workqueue(priv
->config_wq
);
3078 mwl8k_hw_reset(priv
);
3080 /* Return all skbs to mac80211 */
3081 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3082 mwl8k_txq_reclaim(hw
, i
, 1);
3084 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3085 mwl8k_txq_deinit(hw
, i
);
3087 mwl8k_rxq_deinit(hw
, 0);
3089 pci_free_consistent(priv
->pdev
, 4,
3090 priv
->cookie
, priv
->cookie_dma
);
3092 pci_iounmap(pdev
, priv
->regs
);
3093 pci_set_drvdata(pdev
, NULL
);
3094 ieee80211_free_hw(hw
);
3095 pci_release_regions(pdev
);
3096 pci_disable_device(pdev
);
3099 static struct pci_driver mwl8k_driver
= {
3101 .id_table
= mwl8k_table
,
3102 .probe
= mwl8k_probe
,
3103 .remove
= __devexit_p(mwl8k_remove
),
3104 .shutdown
= __devexit_p(mwl8k_shutdown
),
3107 static int __init
mwl8k_init(void)
3109 return pci_register_driver(&mwl8k_driver
);
3112 static void __exit
mwl8k_exit(void)
3114 pci_unregister_driver(&mwl8k_driver
);
3117 module_init(mwl8k_init
);
3118 module_exit(mwl8k_exit
);