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[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
33
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-rfkill.h"
40 #include "iwl-power.h"
41 #include "iwl-sta.h"
42
43
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
48
49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
62 /*
63 * Parameter order:
64 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
65 *
66 * If there isn't a valid next or previous rate then INV is used which
67 * maps to IWL_RATE_INVALID
68 *
69 */
70 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
71 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
72 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
73 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
74 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
75 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
76 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
77 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
78 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
79 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
80 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
81 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
82 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
83 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
84 /* FIXME:RS: ^^ should be INV (legacy) */
85 };
86 EXPORT_SYMBOL(iwl_rates);
87
88 /**
89 * translate ucode response to mac80211 tx status control values
90 */
91 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
92 struct ieee80211_tx_info *info)
93 {
94 int rate_index;
95 struct ieee80211_tx_rate *r = &info->control.rates[0];
96
97 info->antenna_sel_tx =
98 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
99 if (rate_n_flags & RATE_MCS_HT_MSK)
100 r->flags |= IEEE80211_TX_RC_MCS;
101 if (rate_n_flags & RATE_MCS_GF_MSK)
102 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
103 if (rate_n_flags & RATE_MCS_FAT_MSK)
104 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
105 if (rate_n_flags & RATE_MCS_DUP_MSK)
106 r->flags |= IEEE80211_TX_RC_DUP_DATA;
107 if (rate_n_flags & RATE_MCS_SGI_MSK)
108 r->flags |= IEEE80211_TX_RC_SHORT_GI;
109 rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
110 if (info->band == IEEE80211_BAND_5GHZ)
111 rate_index -= IWL_FIRST_OFDM_RATE;
112 r->idx = rate_index;
113 }
114 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
115
116 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
117 {
118 int idx = 0;
119
120 /* HT rate format */
121 if (rate_n_flags & RATE_MCS_HT_MSK) {
122 idx = (rate_n_flags & 0xff);
123
124 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
125 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
126 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
127 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
128
129 idx += IWL_FIRST_OFDM_RATE;
130 /* skip 9M not supported in ht*/
131 if (idx >= IWL_RATE_9M_INDEX)
132 idx += 1;
133 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
134 return idx;
135
136 /* legacy rate format, search for match in table */
137 } else {
138 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
139 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
140 return idx;
141 }
142
143 return -1;
144 }
145 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
146
147 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
148 {
149 int i;
150 u8 ind = ant;
151 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
152 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
153 if (priv->hw_params.valid_tx_ant & BIT(ind))
154 return ind;
155 }
156 return ant;
157 }
158
159 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
160 EXPORT_SYMBOL(iwl_bcast_addr);
161
162
163 /* This function both allocates and initializes hw and priv. */
164 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
165 struct ieee80211_ops *hw_ops)
166 {
167 struct iwl_priv *priv;
168
169 /* mac80211 allocates memory for this device instance, including
170 * space for this driver's private structure */
171 struct ieee80211_hw *hw =
172 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
173 if (hw == NULL) {
174 printk(KERN_ERR "%s: Can not allocate network device\n",
175 cfg->name);
176 goto out;
177 }
178
179 priv = hw->priv;
180 priv->hw = hw;
181
182 out:
183 return hw;
184 }
185 EXPORT_SYMBOL(iwl_alloc_all);
186
187 void iwl_hw_detect(struct iwl_priv *priv)
188 {
189 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
190 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
191 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
192 }
193 EXPORT_SYMBOL(iwl_hw_detect);
194
195 int iwl_hw_nic_init(struct iwl_priv *priv)
196 {
197 unsigned long flags;
198 struct iwl_rx_queue *rxq = &priv->rxq;
199 int ret;
200
201 /* nic_init */
202 spin_lock_irqsave(&priv->lock, flags);
203 priv->cfg->ops->lib->apm_ops.init(priv);
204 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
205 spin_unlock_irqrestore(&priv->lock, flags);
206
207 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
208
209 priv->cfg->ops->lib->apm_ops.config(priv);
210
211 /* Allocate the RX queue, or reset if it is already allocated */
212 if (!rxq->bd) {
213 ret = iwl_rx_queue_alloc(priv);
214 if (ret) {
215 IWL_ERR(priv, "Unable to initialize Rx queue\n");
216 return -ENOMEM;
217 }
218 } else
219 iwl_rx_queue_reset(priv, rxq);
220
221 iwl_rx_replenish(priv);
222
223 iwl_rx_init(priv, rxq);
224
225 spin_lock_irqsave(&priv->lock, flags);
226
227 rxq->need_update = 1;
228 iwl_rx_queue_update_write_ptr(priv, rxq);
229
230 spin_unlock_irqrestore(&priv->lock, flags);
231
232 /* Allocate and init all Tx and Command queues */
233 ret = iwl_txq_ctx_reset(priv);
234 if (ret)
235 return ret;
236
237 set_bit(STATUS_INIT, &priv->status);
238
239 return 0;
240 }
241 EXPORT_SYMBOL(iwl_hw_nic_init);
242
243 /*
244 * QoS support
245 */
246 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
247 {
248 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
249 return;
250
251 priv->qos_data.def_qos_parm.qos_flags = 0;
252
253 if (priv->qos_data.qos_cap.q_AP.queue_request &&
254 !priv->qos_data.qos_cap.q_AP.txop_request)
255 priv->qos_data.def_qos_parm.qos_flags |=
256 QOS_PARAM_FLG_TXOP_TYPE_MSK;
257 if (priv->qos_data.qos_active)
258 priv->qos_data.def_qos_parm.qos_flags |=
259 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
260
261 if (priv->current_ht_config.is_ht)
262 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
263
264 if (force || iwl_is_associated(priv)) {
265 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
266 priv->qos_data.qos_active,
267 priv->qos_data.def_qos_parm.qos_flags);
268
269 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
270 sizeof(struct iwl_qosparam_cmd),
271 &priv->qos_data.def_qos_parm, NULL);
272 }
273 }
274 EXPORT_SYMBOL(iwl_activate_qos);
275
276 void iwl_reset_qos(struct iwl_priv *priv)
277 {
278 u16 cw_min = 15;
279 u16 cw_max = 1023;
280 u8 aifs = 2;
281 bool is_legacy = false;
282 unsigned long flags;
283 int i;
284
285 spin_lock_irqsave(&priv->lock, flags);
286 /* QoS always active in AP and ADHOC mode
287 * In STA mode wait for association
288 */
289 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
290 priv->iw_mode == NL80211_IFTYPE_AP)
291 priv->qos_data.qos_active = 1;
292 else
293 priv->qos_data.qos_active = 0;
294
295 /* check for legacy mode */
296 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
297 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
298 (priv->iw_mode == NL80211_IFTYPE_STATION &&
299 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
300 cw_min = 31;
301 is_legacy = 1;
302 }
303
304 if (priv->qos_data.qos_active)
305 aifs = 3;
306
307 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
308 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
309 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
310 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
311 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
312
313 if (priv->qos_data.qos_active) {
314 i = 1;
315 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
316 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
317 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
318 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
319 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
320
321 i = 2;
322 priv->qos_data.def_qos_parm.ac[i].cw_min =
323 cpu_to_le16((cw_min + 1) / 2 - 1);
324 priv->qos_data.def_qos_parm.ac[i].cw_max =
325 cpu_to_le16(cw_max);
326 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
327 if (is_legacy)
328 priv->qos_data.def_qos_parm.ac[i].edca_txop =
329 cpu_to_le16(6016);
330 else
331 priv->qos_data.def_qos_parm.ac[i].edca_txop =
332 cpu_to_le16(3008);
333 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
334
335 i = 3;
336 priv->qos_data.def_qos_parm.ac[i].cw_min =
337 cpu_to_le16((cw_min + 1) / 4 - 1);
338 priv->qos_data.def_qos_parm.ac[i].cw_max =
339 cpu_to_le16((cw_max + 1) / 2 - 1);
340 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
341 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
342 if (is_legacy)
343 priv->qos_data.def_qos_parm.ac[i].edca_txop =
344 cpu_to_le16(3264);
345 else
346 priv->qos_data.def_qos_parm.ac[i].edca_txop =
347 cpu_to_le16(1504);
348 } else {
349 for (i = 1; i < 4; i++) {
350 priv->qos_data.def_qos_parm.ac[i].cw_min =
351 cpu_to_le16(cw_min);
352 priv->qos_data.def_qos_parm.ac[i].cw_max =
353 cpu_to_le16(cw_max);
354 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
355 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
356 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
357 }
358 }
359 IWL_DEBUG_QOS(priv, "set QoS to default \n");
360
361 spin_unlock_irqrestore(&priv->lock, flags);
362 }
363 EXPORT_SYMBOL(iwl_reset_qos);
364
365 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
366 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
367 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
368 struct ieee80211_sta_ht_cap *ht_info,
369 enum ieee80211_band band)
370 {
371 u16 max_bit_rate = 0;
372 u8 rx_chains_num = priv->hw_params.rx_chains_num;
373 u8 tx_chains_num = priv->hw_params.tx_chains_num;
374
375 ht_info->cap = 0;
376 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
377
378 ht_info->ht_supported = true;
379
380 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
381 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
382 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
383 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
384
385 max_bit_rate = MAX_BIT_RATE_20_MHZ;
386 if (priv->hw_params.fat_channel & BIT(band)) {
387 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
388 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
389 ht_info->mcs.rx_mask[4] = 0x01;
390 max_bit_rate = MAX_BIT_RATE_40_MHZ;
391 }
392
393 if (priv->cfg->mod_params->amsdu_size_8K)
394 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
395
396 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
397 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
398
399 ht_info->mcs.rx_mask[0] = 0xFF;
400 if (rx_chains_num >= 2)
401 ht_info->mcs.rx_mask[1] = 0xFF;
402 if (rx_chains_num >= 3)
403 ht_info->mcs.rx_mask[2] = 0xFF;
404
405 /* Highest supported Rx data rate */
406 max_bit_rate *= rx_chains_num;
407 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
408 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
409
410 /* Tx MCS capabilities */
411 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
412 if (tx_chains_num != rx_chains_num) {
413 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
414 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
415 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
416 }
417 }
418
419 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
420 struct ieee80211_rate *rates)
421 {
422 int i;
423
424 for (i = 0; i < IWL_RATE_COUNT; i++) {
425 rates[i].bitrate = iwl_rates[i].ieee * 5;
426 rates[i].hw_value = i; /* Rate scaling will work on indexes */
427 rates[i].hw_value_short = i;
428 rates[i].flags = 0;
429 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
430 /*
431 * If CCK != 1M then set short preamble rate flag.
432 */
433 rates[i].flags |=
434 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
435 0 : IEEE80211_RATE_SHORT_PREAMBLE;
436 }
437 }
438 }
439
440
441 /**
442 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
443 */
444 int iwlcore_init_geos(struct iwl_priv *priv)
445 {
446 struct iwl_channel_info *ch;
447 struct ieee80211_supported_band *sband;
448 struct ieee80211_channel *channels;
449 struct ieee80211_channel *geo_ch;
450 struct ieee80211_rate *rates;
451 int i = 0;
452
453 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
454 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
455 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
456 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
457 return 0;
458 }
459
460 channels = kzalloc(sizeof(struct ieee80211_channel) *
461 priv->channel_count, GFP_KERNEL);
462 if (!channels)
463 return -ENOMEM;
464
465 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
466 GFP_KERNEL);
467 if (!rates) {
468 kfree(channels);
469 return -ENOMEM;
470 }
471
472 /* 5.2GHz channels start after the 2.4GHz channels */
473 sband = &priv->bands[IEEE80211_BAND_5GHZ];
474 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
475 /* just OFDM */
476 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
477 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
478
479 if (priv->cfg->sku & IWL_SKU_N)
480 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
481 IEEE80211_BAND_5GHZ);
482
483 sband = &priv->bands[IEEE80211_BAND_2GHZ];
484 sband->channels = channels;
485 /* OFDM & CCK */
486 sband->bitrates = rates;
487 sband->n_bitrates = IWL_RATE_COUNT;
488
489 if (priv->cfg->sku & IWL_SKU_N)
490 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
491 IEEE80211_BAND_2GHZ);
492
493 priv->ieee_channels = channels;
494 priv->ieee_rates = rates;
495
496 for (i = 0; i < priv->channel_count; i++) {
497 ch = &priv->channel_info[i];
498
499 /* FIXME: might be removed if scan is OK */
500 if (!is_channel_valid(ch))
501 continue;
502
503 if (is_channel_a_band(ch))
504 sband = &priv->bands[IEEE80211_BAND_5GHZ];
505 else
506 sband = &priv->bands[IEEE80211_BAND_2GHZ];
507
508 geo_ch = &sband->channels[sband->n_channels++];
509
510 geo_ch->center_freq =
511 ieee80211_channel_to_frequency(ch->channel);
512 geo_ch->max_power = ch->max_power_avg;
513 geo_ch->max_antenna_gain = 0xff;
514 geo_ch->hw_value = ch->channel;
515
516 if (is_channel_valid(ch)) {
517 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
518 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
519
520 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
521 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
522
523 if (ch->flags & EEPROM_CHANNEL_RADAR)
524 geo_ch->flags |= IEEE80211_CHAN_RADAR;
525
526 geo_ch->flags |= ch->fat_extension_channel;
527
528 if (ch->max_power_avg > priv->tx_power_channel_lmt)
529 priv->tx_power_channel_lmt = ch->max_power_avg;
530 } else {
531 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
532 }
533
534 /* Save flags for reg domain usage */
535 geo_ch->orig_flags = geo_ch->flags;
536
537 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
538 ch->channel, geo_ch->center_freq,
539 is_channel_a_band(ch) ? "5.2" : "2.4",
540 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
541 "restricted" : "valid",
542 geo_ch->flags);
543 }
544
545 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
546 priv->cfg->sku & IWL_SKU_A) {
547 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
548 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
549 priv->pci_dev->device,
550 priv->pci_dev->subsystem_device);
551 priv->cfg->sku &= ~IWL_SKU_A;
552 }
553
554 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
555 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
556 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
557
558 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
559
560 return 0;
561 }
562 EXPORT_SYMBOL(iwlcore_init_geos);
563
564 /*
565 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
566 */
567 void iwlcore_free_geos(struct iwl_priv *priv)
568 {
569 kfree(priv->ieee_channels);
570 kfree(priv->ieee_rates);
571 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
572 }
573 EXPORT_SYMBOL(iwlcore_free_geos);
574
575 static bool is_single_rx_stream(struct iwl_priv *priv)
576 {
577 return !priv->current_ht_config.is_ht ||
578 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
579 (priv->current_ht_config.mcs.rx_mask[2] == 0));
580 }
581
582 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
583 enum ieee80211_band band,
584 u16 channel, u8 extension_chan_offset)
585 {
586 const struct iwl_channel_info *ch_info;
587
588 ch_info = iwl_get_channel_info(priv, band, channel);
589 if (!is_channel_valid(ch_info))
590 return 0;
591
592 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
593 return !(ch_info->fat_extension_channel &
594 IEEE80211_CHAN_NO_FAT_ABOVE);
595 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
596 return !(ch_info->fat_extension_channel &
597 IEEE80211_CHAN_NO_FAT_BELOW);
598
599 return 0;
600 }
601
602 u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
603 struct ieee80211_sta_ht_cap *sta_ht_inf)
604 {
605 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
606
607 if ((!iwl_ht_conf->is_ht) ||
608 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
609 (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE))
610 return 0;
611
612 if (sta_ht_inf) {
613 if ((!sta_ht_inf->ht_supported) ||
614 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)))
615 return 0;
616 }
617
618 return iwl_is_channel_extension(priv, priv->band,
619 le16_to_cpu(priv->staging_rxon.channel),
620 iwl_ht_conf->extension_chan_offset);
621 }
622 EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
623
624 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
625 {
626 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
627
628 if (hw_decrypt)
629 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
630 else
631 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
632
633 }
634 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
635
636 /**
637 * iwl_check_rxon_cmd - validate RXON structure is valid
638 *
639 * NOTE: This is really only useful during development and can eventually
640 * be #ifdef'd out once the driver is stable and folks aren't actively
641 * making changes
642 */
643 int iwl_check_rxon_cmd(struct iwl_priv *priv)
644 {
645 int error = 0;
646 int counter = 1;
647 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
648
649 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
650 error |= le32_to_cpu(rxon->flags &
651 (RXON_FLG_TGJ_NARROW_BAND_MSK |
652 RXON_FLG_RADAR_DETECT_MSK));
653 if (error)
654 IWL_WARN(priv, "check 24G fields %d | %d\n",
655 counter++, error);
656 } else {
657 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
658 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
659 if (error)
660 IWL_WARN(priv, "check 52 fields %d | %d\n",
661 counter++, error);
662 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
663 if (error)
664 IWL_WARN(priv, "check 52 CCK %d | %d\n",
665 counter++, error);
666 }
667 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
668 if (error)
669 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
670
671 /* make sure basic rates 6Mbps and 1Mbps are supported */
672 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
673 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
674 if (error)
675 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
676
677 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
678 if (error)
679 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
680
681 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
682 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
683 if (error)
684 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
685 counter++, error);
686
687 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
688 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
689 if (error)
690 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
691 counter++, error);
692
693 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
694 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
695 if (error)
696 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
697 counter++, error);
698
699 if (error)
700 IWL_WARN(priv, "Tuning to channel %d\n",
701 le16_to_cpu(rxon->channel));
702
703 if (error) {
704 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
705 return -1;
706 }
707 return 0;
708 }
709 EXPORT_SYMBOL(iwl_check_rxon_cmd);
710
711 /**
712 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
713 * @priv: staging_rxon is compared to active_rxon
714 *
715 * If the RXON structure is changing enough to require a new tune,
716 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
717 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
718 */
719 int iwl_full_rxon_required(struct iwl_priv *priv)
720 {
721
722 /* These items are only settable from the full RXON command */
723 if (!(iwl_is_associated(priv)) ||
724 compare_ether_addr(priv->staging_rxon.bssid_addr,
725 priv->active_rxon.bssid_addr) ||
726 compare_ether_addr(priv->staging_rxon.node_addr,
727 priv->active_rxon.node_addr) ||
728 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
729 priv->active_rxon.wlap_bssid_addr) ||
730 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
731 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
732 (priv->staging_rxon.air_propagation !=
733 priv->active_rxon.air_propagation) ||
734 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
735 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
736 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
737 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
738 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
739 return 1;
740
741 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
742 * be updated with the RXON_ASSOC command -- however only some
743 * flag transitions are allowed using RXON_ASSOC */
744
745 /* Check if we are not switching bands */
746 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
747 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
748 return 1;
749
750 /* Check if we are switching association toggle */
751 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
752 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
753 return 1;
754
755 return 0;
756 }
757 EXPORT_SYMBOL(iwl_full_rxon_required);
758
759 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
760 {
761 int i;
762 int rate_mask;
763
764 /* Set rate mask*/
765 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
766 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
767 else
768 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
769
770 /* Find lowest valid rate */
771 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
772 i = iwl_rates[i].next_ieee) {
773 if (rate_mask & (1 << i))
774 return iwl_rates[i].plcp;
775 }
776
777 /* No valid rate was found. Assign the lowest one */
778 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
779 return IWL_RATE_1M_PLCP;
780 else
781 return IWL_RATE_6M_PLCP;
782 }
783 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
784
785 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
786 {
787 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
788 u32 val;
789
790 if (!ht_info->is_ht) {
791 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
792 RXON_FLG_CHANNEL_MODE_PURE_40_MSK |
793 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
794 RXON_FLG_FAT_PROT_MSK |
795 RXON_FLG_HT_PROT_MSK);
796 return;
797 }
798
799 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
800 if (iwl_is_fat_tx_allowed(priv, NULL))
801 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
802 else
803 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
804 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
805
806 /* Note: control channel is opposite of extension channel */
807 switch (ht_info->extension_chan_offset) {
808 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
809 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
810 break;
811 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
812 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
813 break;
814 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
815 default:
816 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
817 break;
818 }
819
820 val = ht_info->ht_protection;
821
822 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
823
824 iwl_set_rxon_chain(priv);
825
826 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
827 "rxon flags 0x%X operation mode :0x%X "
828 "extension channel offset 0x%x\n",
829 ht_info->mcs.rx_mask[0],
830 ht_info->mcs.rx_mask[1],
831 ht_info->mcs.rx_mask[2],
832 le32_to_cpu(rxon->flags), ht_info->ht_protection,
833 ht_info->extension_chan_offset);
834 return;
835 }
836 EXPORT_SYMBOL(iwl_set_rxon_ht);
837
838 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
839 #define IWL_NUM_RX_CHAINS_SINGLE 2
840 #define IWL_NUM_IDLE_CHAINS_DUAL 2
841 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
842
843 /* Determine how many receiver/antenna chains to use.
844 * More provides better reception via diversity. Fewer saves power.
845 * MIMO (dual stream) requires at least 2, but works better with 3.
846 * This does not determine *which* chains to use, just how many.
847 */
848 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
849 {
850 bool is_single = is_single_rx_stream(priv);
851 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
852
853 /* # of Rx chains to use when expecting MIMO. */
854 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
855 WLAN_HT_CAP_SM_PS_STATIC)))
856 return IWL_NUM_RX_CHAINS_SINGLE;
857 else
858 return IWL_NUM_RX_CHAINS_MULTIPLE;
859 }
860
861 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
862 {
863 int idle_cnt;
864 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
865 /* # Rx chains when idling and maybe trying to save power */
866 switch (priv->current_ht_config.sm_ps) {
867 case WLAN_HT_CAP_SM_PS_STATIC:
868 case WLAN_HT_CAP_SM_PS_DYNAMIC:
869 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
870 IWL_NUM_IDLE_CHAINS_SINGLE;
871 break;
872 case WLAN_HT_CAP_SM_PS_DISABLED:
873 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
874 break;
875 case WLAN_HT_CAP_SM_PS_INVALID:
876 default:
877 IWL_ERR(priv, "invalid mimo ps mode %d\n",
878 priv->current_ht_config.sm_ps);
879 WARN_ON(1);
880 idle_cnt = -1;
881 break;
882 }
883 return idle_cnt;
884 }
885
886 /* up to 4 chains */
887 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
888 {
889 u8 res;
890 res = (chain_bitmap & BIT(0)) >> 0;
891 res += (chain_bitmap & BIT(1)) >> 1;
892 res += (chain_bitmap & BIT(2)) >> 2;
893 res += (chain_bitmap & BIT(4)) >> 4;
894 return res;
895 }
896
897 /**
898 * iwl_is_monitor_mode - Determine if interface in monitor mode
899 *
900 * priv->iw_mode is set in add_interface, but add_interface is
901 * never called for monitor mode. The only way mac80211 informs us about
902 * monitor mode is through configuring filters (call to configure_filter).
903 */
904 static bool iwl_is_monitor_mode(struct iwl_priv *priv)
905 {
906 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
907 }
908
909 /**
910 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
911 *
912 * Selects how many and which Rx receivers/antennas/chains to use.
913 * This should not be used for scan command ... it puts data in wrong place.
914 */
915 void iwl_set_rxon_chain(struct iwl_priv *priv)
916 {
917 bool is_single = is_single_rx_stream(priv);
918 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
919 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
920 u32 active_chains;
921 u16 rx_chain;
922
923 /* Tell uCode which antennas are actually connected.
924 * Before first association, we assume all antennas are connected.
925 * Just after first association, iwl_chain_noise_calibration()
926 * checks which antennas actually *are* connected. */
927 if (priv->chain_noise_data.active_chains)
928 active_chains = priv->chain_noise_data.active_chains;
929 else
930 active_chains = priv->hw_params.valid_rx_ant;
931
932 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
933
934 /* How many receivers should we use? */
935 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
936 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
937
938
939 /* correct rx chain count according hw settings
940 * and chain noise calibration
941 */
942 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
943 if (valid_rx_cnt < active_rx_cnt)
944 active_rx_cnt = valid_rx_cnt;
945
946 if (valid_rx_cnt < idle_rx_cnt)
947 idle_rx_cnt = valid_rx_cnt;
948
949 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
950 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
951
952 /* copied from 'iwl_bg_request_scan()' */
953 /* Force use of chains B and C (0x6) for Rx for 4965
954 * Avoid A (0x1) because of its off-channel reception on A-band.
955 * MIMO is not used here, but value is required */
956 if (iwl_is_monitor_mode(priv) &&
957 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
958 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
959 rx_chain = 0x07 << RXON_RX_CHAIN_VALID_POS;
960 rx_chain |= 0x06 << RXON_RX_CHAIN_FORCE_SEL_POS;
961 rx_chain |= 0x07 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
962 rx_chain |= 0x01 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
963 }
964
965 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
966
967 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
968 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
969 else
970 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
971
972 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
973 priv->staging_rxon.rx_chain,
974 active_rx_cnt, idle_rx_cnt);
975
976 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
977 active_rx_cnt < idle_rx_cnt);
978 }
979 EXPORT_SYMBOL(iwl_set_rxon_chain);
980
981 /**
982 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
983 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
984 * @channel: Any channel valid for the requested phymode
985
986 * In addition to setting the staging RXON, priv->phymode is also set.
987 *
988 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
989 * in the staging RXON flag structure based on the phymode
990 */
991 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
992 {
993 enum ieee80211_band band = ch->band;
994 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
995
996 if (!iwl_get_channel_info(priv, band, channel)) {
997 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
998 channel, band);
999 return -EINVAL;
1000 }
1001
1002 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1003 (priv->band == band))
1004 return 0;
1005
1006 priv->staging_rxon.channel = cpu_to_le16(channel);
1007 if (band == IEEE80211_BAND_5GHZ)
1008 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1009 else
1010 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1011
1012 priv->band = band;
1013
1014 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1015
1016 return 0;
1017 }
1018 EXPORT_SYMBOL(iwl_set_rxon_channel);
1019
1020 void iwl_set_flags_for_band(struct iwl_priv *priv,
1021 enum ieee80211_band band)
1022 {
1023 if (band == IEEE80211_BAND_5GHZ) {
1024 priv->staging_rxon.flags &=
1025 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1026 | RXON_FLG_CCK_MSK);
1027 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1028 } else {
1029 /* Copied from iwl_post_associate() */
1030 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1031 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1032 else
1033 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1034
1035 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1036 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1037
1038 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1039 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1040 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1041 }
1042 }
1043 EXPORT_SYMBOL(iwl_set_flags_for_band);
1044
1045 /*
1046 * initialize rxon structure with default values from eeprom
1047 */
1048 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1049 {
1050 const struct iwl_channel_info *ch_info;
1051
1052 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1053
1054 switch (mode) {
1055 case NL80211_IFTYPE_AP:
1056 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1057 break;
1058
1059 case NL80211_IFTYPE_STATION:
1060 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1061 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1062 break;
1063
1064 case NL80211_IFTYPE_ADHOC:
1065 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1066 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1067 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1068 RXON_FILTER_ACCEPT_GRP_MSK;
1069 break;
1070
1071 case NL80211_IFTYPE_MONITOR:
1072 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1073 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1074 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1075 break;
1076 default:
1077 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1078 break;
1079 }
1080
1081 #if 0
1082 /* TODO: Figure out when short_preamble would be set and cache from
1083 * that */
1084 if (!hw_to_local(priv->hw)->short_preamble)
1085 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1086 else
1087 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1088 #endif
1089
1090 ch_info = iwl_get_channel_info(priv, priv->band,
1091 le16_to_cpu(priv->active_rxon.channel));
1092
1093 if (!ch_info)
1094 ch_info = &priv->channel_info[0];
1095
1096 /*
1097 * in some case A channels are all non IBSS
1098 * in this case force B/G channel
1099 */
1100 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1101 !(is_channel_ibss(ch_info)))
1102 ch_info = &priv->channel_info[0];
1103
1104 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1105 priv->band = ch_info->band;
1106
1107 iwl_set_flags_for_band(priv, priv->band);
1108
1109 priv->staging_rxon.ofdm_basic_rates =
1110 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1111 priv->staging_rxon.cck_basic_rates =
1112 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1113
1114 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1115 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1116 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1117 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1118 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1119 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1120 }
1121 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1122
1123 void iwl_set_rate(struct iwl_priv *priv)
1124 {
1125 const struct ieee80211_supported_band *hw = NULL;
1126 struct ieee80211_rate *rate;
1127 int i;
1128
1129 hw = iwl_get_hw_mode(priv, priv->band);
1130 if (!hw) {
1131 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1132 return;
1133 }
1134
1135 priv->active_rate = 0;
1136 priv->active_rate_basic = 0;
1137
1138 for (i = 0; i < hw->n_bitrates; i++) {
1139 rate = &(hw->bitrates[i]);
1140 if (rate->hw_value < IWL_RATE_COUNT)
1141 priv->active_rate |= (1 << rate->hw_value);
1142 }
1143
1144 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1145 priv->active_rate, priv->active_rate_basic);
1146
1147 /*
1148 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1149 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1150 * OFDM
1151 */
1152 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1153 priv->staging_rxon.cck_basic_rates =
1154 ((priv->active_rate_basic &
1155 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1156 else
1157 priv->staging_rxon.cck_basic_rates =
1158 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1159
1160 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1161 priv->staging_rxon.ofdm_basic_rates =
1162 ((priv->active_rate_basic &
1163 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1164 IWL_FIRST_OFDM_RATE) & 0xFF;
1165 else
1166 priv->staging_rxon.ofdm_basic_rates =
1167 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1168 }
1169 EXPORT_SYMBOL(iwl_set_rate);
1170
1171 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1172 {
1173 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1174 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1175 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1176 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
1177 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1178 rxon->channel = csa->channel;
1179 priv->staging_rxon.channel = csa->channel;
1180 }
1181 EXPORT_SYMBOL(iwl_rx_csa);
1182
1183 #ifdef CONFIG_IWLWIFI_DEBUG
1184 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1185 {
1186 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1187
1188 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1189 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1190 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1191 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1192 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1193 le32_to_cpu(rxon->filter_flags));
1194 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1195 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1196 rxon->ofdm_basic_rates);
1197 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1198 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1199 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1200 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1201 }
1202 #endif
1203
1204 /**
1205 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1206 */
1207 void iwl_irq_handle_error(struct iwl_priv *priv)
1208 {
1209 /* Set the FW error flag -- cleared on iwl_down */
1210 set_bit(STATUS_FW_ERROR, &priv->status);
1211
1212 /* Cancel currently queued command. */
1213 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1214
1215 #ifdef CONFIG_IWLWIFI_DEBUG
1216 if (priv->debug_level & IWL_DL_FW_ERRORS) {
1217 iwl_dump_nic_error_log(priv);
1218 iwl_dump_nic_event_log(priv);
1219 iwl_print_rx_config_cmd(priv);
1220 }
1221 #endif
1222
1223 wake_up_interruptible(&priv->wait_command_queue);
1224
1225 /* Keep the restart process from trying to send host
1226 * commands by clearing the INIT status bit */
1227 clear_bit(STATUS_READY, &priv->status);
1228
1229 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1230 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1231 "Restarting adapter due to uCode error.\n");
1232
1233 if (iwl_is_associated(priv)) {
1234 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1235 sizeof(priv->recovery_rxon));
1236 priv->error_recovering = 1;
1237 }
1238 if (priv->cfg->mod_params->restart_fw)
1239 queue_work(priv->workqueue, &priv->restart);
1240 }
1241 }
1242 EXPORT_SYMBOL(iwl_irq_handle_error);
1243
1244 void iwl_configure_filter(struct ieee80211_hw *hw,
1245 unsigned int changed_flags,
1246 unsigned int *total_flags,
1247 int mc_count, struct dev_addr_list *mc_list)
1248 {
1249 struct iwl_priv *priv = hw->priv;
1250 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1251
1252 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1253 changed_flags, *total_flags);
1254
1255 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1256 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1257 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1258 else
1259 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1260 }
1261 if (changed_flags & FIF_ALLMULTI) {
1262 if (*total_flags & FIF_ALLMULTI)
1263 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1264 else
1265 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1266 }
1267 if (changed_flags & FIF_CONTROL) {
1268 if (*total_flags & FIF_CONTROL)
1269 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1270 else
1271 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1272 }
1273 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1274 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1275 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1276 else
1277 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1278 }
1279
1280 /* We avoid iwl_commit_rxon here to commit the new filter flags
1281 * since mac80211 will call ieee80211_hw_config immediately.
1282 * (mc_list is not supported at this time). Otherwise, we need to
1283 * queue a background iwl_commit_rxon work.
1284 */
1285
1286 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1287 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1288 }
1289 EXPORT_SYMBOL(iwl_configure_filter);
1290
1291 int iwl_setup_mac(struct iwl_priv *priv)
1292 {
1293 int ret;
1294 struct ieee80211_hw *hw = priv->hw;
1295 hw->rate_control_algorithm = "iwl-agn-rs";
1296
1297 /* Tell mac80211 our characteristics */
1298 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1299 IEEE80211_HW_NOISE_DBM |
1300 IEEE80211_HW_AMPDU_AGGREGATION |
1301 IEEE80211_HW_SPECTRUM_MGMT |
1302 IEEE80211_HW_SUPPORTS_PS;
1303 hw->wiphy->interface_modes =
1304 BIT(NL80211_IFTYPE_STATION) |
1305 BIT(NL80211_IFTYPE_ADHOC);
1306
1307 hw->wiphy->custom_regulatory = true;
1308 hw->wiphy->max_scan_ssids = 1;
1309
1310 /* Default value; 4 EDCA QOS priorities */
1311 hw->queues = 4;
1312
1313 hw->conf.beacon_int = 100;
1314 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1315
1316 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1317 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1318 &priv->bands[IEEE80211_BAND_2GHZ];
1319 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1320 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1321 &priv->bands[IEEE80211_BAND_5GHZ];
1322
1323 ret = ieee80211_register_hw(priv->hw);
1324 if (ret) {
1325 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1326 return ret;
1327 }
1328 priv->mac80211_registered = 1;
1329
1330 return 0;
1331 }
1332 EXPORT_SYMBOL(iwl_setup_mac);
1333
1334 int iwl_set_hw_params(struct iwl_priv *priv)
1335 {
1336 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
1337 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1338 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1339 if (priv->cfg->mod_params->amsdu_size_8K)
1340 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1341 else
1342 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1343 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1344
1345 if (priv->cfg->mod_params->disable_11n)
1346 priv->cfg->sku &= ~IWL_SKU_N;
1347
1348 /* Device-specific setup */
1349 return priv->cfg->ops->lib->set_hw_params(priv);
1350 }
1351 EXPORT_SYMBOL(iwl_set_hw_params);
1352
1353 int iwl_init_drv(struct iwl_priv *priv)
1354 {
1355 int ret;
1356
1357 priv->ibss_beacon = NULL;
1358
1359 spin_lock_init(&priv->lock);
1360 spin_lock_init(&priv->power_data.lock);
1361 spin_lock_init(&priv->sta_lock);
1362 spin_lock_init(&priv->hcmd_lock);
1363
1364 INIT_LIST_HEAD(&priv->free_frames);
1365
1366 mutex_init(&priv->mutex);
1367
1368 /* Clear the driver's (not device's) station table */
1369 iwl_clear_stations_table(priv);
1370
1371 priv->data_retry_limit = -1;
1372 priv->ieee_channels = NULL;
1373 priv->ieee_rates = NULL;
1374 priv->band = IEEE80211_BAND_2GHZ;
1375
1376 priv->iw_mode = NL80211_IFTYPE_STATION;
1377
1378 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1379
1380 /* Choose which receivers/antennas to use */
1381 iwl_set_rxon_chain(priv);
1382 iwl_init_scan_params(priv);
1383
1384 iwl_reset_qos(priv);
1385
1386 priv->qos_data.qos_active = 0;
1387 priv->qos_data.qos_cap.val = 0;
1388
1389 priv->rates_mask = IWL_RATES_MASK;
1390 /* If power management is turned on, default to CAM mode */
1391 priv->power_mode = IWL_POWER_MODE_CAM;
1392 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
1393
1394 ret = iwl_init_channel_map(priv);
1395 if (ret) {
1396 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1397 goto err;
1398 }
1399
1400 ret = iwlcore_init_geos(priv);
1401 if (ret) {
1402 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1403 goto err_free_channel_map;
1404 }
1405 iwlcore_init_hw_rates(priv, priv->ieee_rates);
1406
1407 return 0;
1408
1409 err_free_channel_map:
1410 iwl_free_channel_map(priv);
1411 err:
1412 return ret;
1413 }
1414 EXPORT_SYMBOL(iwl_init_drv);
1415
1416 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1417 {
1418 int ret = 0;
1419 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1420 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1421 tx_power,
1422 IWL_TX_POWER_TARGET_POWER_MIN);
1423 return -EINVAL;
1424 }
1425
1426 if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
1427 IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
1428 tx_power,
1429 IWL_TX_POWER_TARGET_POWER_MAX);
1430 return -EINVAL;
1431 }
1432
1433 if (priv->tx_power_user_lmt != tx_power)
1434 force = true;
1435
1436 priv->tx_power_user_lmt = tx_power;
1437
1438 /* if nic is not up don't send command */
1439 if (!iwl_is_ready_rf(priv))
1440 return ret;
1441
1442 if (force && priv->cfg->ops->lib->send_tx_power)
1443 ret = priv->cfg->ops->lib->send_tx_power(priv);
1444
1445 return ret;
1446 }
1447 EXPORT_SYMBOL(iwl_set_tx_power);
1448
1449 void iwl_uninit_drv(struct iwl_priv *priv)
1450 {
1451 iwl_calib_free_results(priv);
1452 iwlcore_free_geos(priv);
1453 iwl_free_channel_map(priv);
1454 kfree(priv->scan);
1455 }
1456 EXPORT_SYMBOL(iwl_uninit_drv);
1457
1458
1459 void iwl_disable_interrupts(struct iwl_priv *priv)
1460 {
1461 clear_bit(STATUS_INT_ENABLED, &priv->status);
1462
1463 /* disable interrupts from uCode/NIC to host */
1464 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1465
1466 /* acknowledge/clear/reset any interrupts still pending
1467 * from uCode or flow handler (Rx/Tx DMA) */
1468 iwl_write32(priv, CSR_INT, 0xffffffff);
1469 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
1470 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
1471 }
1472 EXPORT_SYMBOL(iwl_disable_interrupts);
1473
1474 void iwl_enable_interrupts(struct iwl_priv *priv)
1475 {
1476 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
1477 set_bit(STATUS_INT_ENABLED, &priv->status);
1478 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
1479 }
1480 EXPORT_SYMBOL(iwl_enable_interrupts);
1481
1482 irqreturn_t iwl_isr(int irq, void *data)
1483 {
1484 struct iwl_priv *priv = data;
1485 u32 inta, inta_mask;
1486 u32 inta_fh;
1487 if (!priv)
1488 return IRQ_NONE;
1489
1490 spin_lock(&priv->lock);
1491
1492 /* Disable (but don't clear!) interrupts here to avoid
1493 * back-to-back ISRs and sporadic interrupts from our NIC.
1494 * If we have something to service, the tasklet will re-enable ints.
1495 * If we *don't* have something, we'll re-enable before leaving here. */
1496 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1497 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1498
1499 /* Discover which interrupts are active/pending */
1500 inta = iwl_read32(priv, CSR_INT);
1501 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1502
1503 /* Ignore interrupt if there's nothing in NIC to service.
1504 * This may be due to IRQ shared with another device,
1505 * or due to sporadic interrupts thrown from our NIC. */
1506 if (!inta && !inta_fh) {
1507 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1508 goto none;
1509 }
1510
1511 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1512 /* Hardware disappeared. It might have already raised
1513 * an interrupt */
1514 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1515 goto unplugged;
1516 }
1517
1518 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1519 inta, inta_mask, inta_fh);
1520
1521 inta &= ~CSR_INT_BIT_SCD;
1522
1523 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1524 if (likely(inta || inta_fh))
1525 tasklet_schedule(&priv->irq_tasklet);
1526
1527 unplugged:
1528 spin_unlock(&priv->lock);
1529 return IRQ_HANDLED;
1530
1531 none:
1532 /* re-enable interrupts here since we don't have anything to service. */
1533 /* only Re-enable if diabled by irq */
1534 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1535 iwl_enable_interrupts(priv);
1536 spin_unlock(&priv->lock);
1537 return IRQ_NONE;
1538 }
1539 EXPORT_SYMBOL(iwl_isr);
1540
1541 int iwl_send_bt_config(struct iwl_priv *priv)
1542 {
1543 struct iwl_bt_cmd bt_cmd = {
1544 .flags = 3,
1545 .lead_time = 0xAA,
1546 .max_kill = 1,
1547 .kill_ack_mask = 0,
1548 .kill_cts_mask = 0,
1549 };
1550
1551 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1552 sizeof(struct iwl_bt_cmd), &bt_cmd);
1553 }
1554 EXPORT_SYMBOL(iwl_send_bt_config);
1555
1556 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1557 {
1558 u32 stat_flags = 0;
1559 struct iwl_host_cmd cmd = {
1560 .id = REPLY_STATISTICS_CMD,
1561 .meta.flags = flags,
1562 .len = sizeof(stat_flags),
1563 .data = (u8 *) &stat_flags,
1564 };
1565 return iwl_send_cmd(priv, &cmd);
1566 }
1567 EXPORT_SYMBOL(iwl_send_statistics_request);
1568
1569 /**
1570 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1571 * using sample data 100 bytes apart. If these sample points are good,
1572 * it's a pretty good bet that everything between them is good, too.
1573 */
1574 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1575 {
1576 u32 val;
1577 int ret = 0;
1578 u32 errcnt = 0;
1579 u32 i;
1580
1581 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1582
1583 ret = iwl_grab_nic_access(priv);
1584 if (ret)
1585 return ret;
1586
1587 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1588 /* read data comes through single port, auto-incr addr */
1589 /* NOTE: Use the debugless read so we don't flood kernel log
1590 * if IWL_DL_IO is set */
1591 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1592 i + IWL49_RTC_INST_LOWER_BOUND);
1593 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1594 if (val != le32_to_cpu(*image)) {
1595 ret = -EIO;
1596 errcnt++;
1597 if (errcnt >= 3)
1598 break;
1599 }
1600 }
1601
1602 iwl_release_nic_access(priv);
1603
1604 return ret;
1605 }
1606
1607 /**
1608 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1609 * looking at all data.
1610 */
1611 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1612 u32 len)
1613 {
1614 u32 val;
1615 u32 save_len = len;
1616 int ret = 0;
1617 u32 errcnt;
1618
1619 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1620
1621 ret = iwl_grab_nic_access(priv);
1622 if (ret)
1623 return ret;
1624
1625 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1626 IWL49_RTC_INST_LOWER_BOUND);
1627
1628 errcnt = 0;
1629 for (; len > 0; len -= sizeof(u32), image++) {
1630 /* read data comes through single port, auto-incr addr */
1631 /* NOTE: Use the debugless read so we don't flood kernel log
1632 * if IWL_DL_IO is set */
1633 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1634 if (val != le32_to_cpu(*image)) {
1635 IWL_ERR(priv, "uCode INST section is invalid at "
1636 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1637 save_len - len, val, le32_to_cpu(*image));
1638 ret = -EIO;
1639 errcnt++;
1640 if (errcnt >= 20)
1641 break;
1642 }
1643 }
1644
1645 iwl_release_nic_access(priv);
1646
1647 if (!errcnt)
1648 IWL_DEBUG_INFO(priv,
1649 "ucode image in INSTRUCTION memory is good\n");
1650
1651 return ret;
1652 }
1653
1654 /**
1655 * iwl_verify_ucode - determine which instruction image is in SRAM,
1656 * and verify its contents
1657 */
1658 int iwl_verify_ucode(struct iwl_priv *priv)
1659 {
1660 __le32 *image;
1661 u32 len;
1662 int ret;
1663
1664 /* Try bootstrap */
1665 image = (__le32 *)priv->ucode_boot.v_addr;
1666 len = priv->ucode_boot.len;
1667 ret = iwlcore_verify_inst_sparse(priv, image, len);
1668 if (!ret) {
1669 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
1670 return 0;
1671 }
1672
1673 /* Try initialize */
1674 image = (__le32 *)priv->ucode_init.v_addr;
1675 len = priv->ucode_init.len;
1676 ret = iwlcore_verify_inst_sparse(priv, image, len);
1677 if (!ret) {
1678 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
1679 return 0;
1680 }
1681
1682 /* Try runtime/protocol */
1683 image = (__le32 *)priv->ucode_code.v_addr;
1684 len = priv->ucode_code.len;
1685 ret = iwlcore_verify_inst_sparse(priv, image, len);
1686 if (!ret) {
1687 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
1688 return 0;
1689 }
1690
1691 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1692
1693 /* Since nothing seems to match, show first several data entries in
1694 * instruction SRAM, so maybe visual inspection will give a clue.
1695 * Selection of bootstrap image (vs. other images) is arbitrary. */
1696 image = (__le32 *)priv->ucode_boot.v_addr;
1697 len = priv->ucode_boot.len;
1698 ret = iwl_verify_inst_full(priv, image, len);
1699
1700 return ret;
1701 }
1702 EXPORT_SYMBOL(iwl_verify_ucode);
1703
1704
1705 static const char *desc_lookup_text[] = {
1706 "OK",
1707 "FAIL",
1708 "BAD_PARAM",
1709 "BAD_CHECKSUM",
1710 "NMI_INTERRUPT_WDG",
1711 "SYSASSERT",
1712 "FATAL_ERROR",
1713 "BAD_COMMAND",
1714 "HW_ERROR_TUNE_LOCK",
1715 "HW_ERROR_TEMPERATURE",
1716 "ILLEGAL_CHAN_FREQ",
1717 "VCC_NOT_STABLE",
1718 "FH_ERROR",
1719 "NMI_INTERRUPT_HOST",
1720 "NMI_INTERRUPT_ACTION_PT",
1721 "NMI_INTERRUPT_UNKNOWN",
1722 "UCODE_VERSION_MISMATCH",
1723 "HW_ERROR_ABS_LOCK",
1724 "HW_ERROR_CAL_LOCK_FAIL",
1725 "NMI_INTERRUPT_INST_ACTION_PT",
1726 "NMI_INTERRUPT_DATA_ACTION_PT",
1727 "NMI_TRM_HW_ER",
1728 "NMI_INTERRUPT_TRM",
1729 "NMI_INTERRUPT_BREAK_POINT"
1730 "DEBUG_0",
1731 "DEBUG_1",
1732 "DEBUG_2",
1733 "DEBUG_3",
1734 "UNKNOWN"
1735 };
1736
1737 static const char *desc_lookup(int i)
1738 {
1739 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1740
1741 if (i < 0 || i > max)
1742 i = max;
1743
1744 return desc_lookup_text[i];
1745 }
1746
1747 #define ERROR_START_OFFSET (1 * sizeof(u32))
1748 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1749
1750 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1751 {
1752 u32 data2, line;
1753 u32 desc, time, count, base, data1;
1754 u32 blink1, blink2, ilink1, ilink2;
1755 int ret;
1756
1757 if (priv->ucode_type == UCODE_INIT)
1758 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1759 else
1760 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1761
1762 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1763 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1764 return;
1765 }
1766
1767 ret = iwl_grab_nic_access(priv);
1768 if (ret) {
1769 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1770 return;
1771 }
1772
1773 count = iwl_read_targ_mem(priv, base);
1774
1775 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1776 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1777 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1778 priv->status, count);
1779 }
1780
1781 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1782 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1783 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1784 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1785 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1786 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1787 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1788 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1789 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1790
1791 IWL_ERR(priv, "Desc Time "
1792 "data1 data2 line\n");
1793 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1794 desc_lookup(desc), desc, time, data1, data2, line);
1795 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1796 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1797 ilink1, ilink2);
1798
1799 iwl_release_nic_access(priv);
1800 }
1801 EXPORT_SYMBOL(iwl_dump_nic_error_log);
1802
1803 #define EVENT_START_OFFSET (4 * sizeof(u32))
1804
1805 /**
1806 * iwl_print_event_log - Dump error event log to syslog
1807 *
1808 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
1809 */
1810 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1811 u32 num_events, u32 mode)
1812 {
1813 u32 i;
1814 u32 base; /* SRAM byte address of event log header */
1815 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1816 u32 ptr; /* SRAM byte address of log data */
1817 u32 ev, time, data; /* event log data */
1818
1819 if (num_events == 0)
1820 return;
1821 if (priv->ucode_type == UCODE_INIT)
1822 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1823 else
1824 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1825
1826 if (mode == 0)
1827 event_size = 2 * sizeof(u32);
1828 else
1829 event_size = 3 * sizeof(u32);
1830
1831 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1832
1833 /* "time" is actually "data" for mode 0 (no timestamp).
1834 * place event id # at far right for easier visual parsing. */
1835 for (i = 0; i < num_events; i++) {
1836 ev = iwl_read_targ_mem(priv, ptr);
1837 ptr += sizeof(u32);
1838 time = iwl_read_targ_mem(priv, ptr);
1839 ptr += sizeof(u32);
1840 if (mode == 0) {
1841 /* data, ev */
1842 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1843 } else {
1844 data = iwl_read_targ_mem(priv, ptr);
1845 ptr += sizeof(u32);
1846 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1847 time, data, ev);
1848 }
1849 }
1850 }
1851
1852 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1853 {
1854 int ret;
1855 u32 base; /* SRAM byte address of event log header */
1856 u32 capacity; /* event log capacity in # entries */
1857 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1858 u32 num_wraps; /* # times uCode wrapped to top of log */
1859 u32 next_entry; /* index of next entry to be written by uCode */
1860 u32 size; /* # entries that we'll print */
1861
1862 if (priv->ucode_type == UCODE_INIT)
1863 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1864 else
1865 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1866
1867 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1868 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1869 return;
1870 }
1871
1872 ret = iwl_grab_nic_access(priv);
1873 if (ret) {
1874 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1875 return;
1876 }
1877
1878 /* event log header */
1879 capacity = iwl_read_targ_mem(priv, base);
1880 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1881 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1882 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1883
1884 size = num_wraps ? capacity : next_entry;
1885
1886 /* bail out if nothing in log */
1887 if (size == 0) {
1888 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1889 iwl_release_nic_access(priv);
1890 return;
1891 }
1892
1893 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1894 size, num_wraps);
1895
1896 /* if uCode has wrapped back to top of log, start at the oldest entry,
1897 * i.e the next one that uCode would fill. */
1898 if (num_wraps)
1899 iwl_print_event_log(priv, next_entry,
1900 capacity - next_entry, mode);
1901 /* (then/else) start at top of log */
1902 iwl_print_event_log(priv, 0, next_entry, mode);
1903
1904 iwl_release_nic_access(priv);
1905 }
1906 EXPORT_SYMBOL(iwl_dump_nic_event_log);
1907
1908 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1909 {
1910 struct iwl_ct_kill_config cmd;
1911 unsigned long flags;
1912 int ret = 0;
1913
1914 spin_lock_irqsave(&priv->lock, flags);
1915 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1916 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1917 spin_unlock_irqrestore(&priv->lock, flags);
1918
1919 cmd.critical_temperature_R =
1920 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1921
1922 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1923 sizeof(cmd), &cmd);
1924 if (ret)
1925 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1926 else
1927 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
1928 "critical temperature is %d\n",
1929 cmd.critical_temperature_R);
1930 }
1931 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
1932
1933
1934 /*
1935 * CARD_STATE_CMD
1936 *
1937 * Use: Sets the device's internal card state to enable, disable, or halt
1938 *
1939 * When in the 'enable' state the card operates as normal.
1940 * When in the 'disable' state, the card enters into a low power mode.
1941 * When in the 'halt' state, the card is shut down and must be fully
1942 * restarted to come back on.
1943 */
1944 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1945 {
1946 struct iwl_host_cmd cmd = {
1947 .id = REPLY_CARD_STATE_CMD,
1948 .len = sizeof(u32),
1949 .data = &flags,
1950 .meta.flags = meta_flag,
1951 };
1952
1953 return iwl_send_cmd(priv, &cmd);
1954 }
1955 EXPORT_SYMBOL(iwl_send_card_state);
1956
1957 void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv)
1958 {
1959 unsigned long flags;
1960
1961 if (test_bit(STATUS_RF_KILL_SW, &priv->status))
1962 return;
1963
1964 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO OFF\n");
1965
1966 iwl_scan_cancel(priv);
1967 /* FIXME: This is a workaround for AP */
1968 if (priv->iw_mode != NL80211_IFTYPE_AP) {
1969 spin_lock_irqsave(&priv->lock, flags);
1970 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
1971 CSR_UCODE_SW_BIT_RFKILL);
1972 spin_unlock_irqrestore(&priv->lock, flags);
1973 /* call the host command only if no hw rf-kill set */
1974 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
1975 iwl_is_ready(priv))
1976 iwl_send_card_state(priv,
1977 CARD_STATE_CMD_DISABLE, 0);
1978 set_bit(STATUS_RF_KILL_SW, &priv->status);
1979 /* make sure mac80211 stop sending Tx frame */
1980 if (priv->mac80211_registered)
1981 ieee80211_stop_queues(priv->hw);
1982 }
1983 }
1984 EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio);
1985
1986 int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv)
1987 {
1988 unsigned long flags;
1989
1990 if (!test_bit(STATUS_RF_KILL_SW, &priv->status))
1991 return 0;
1992
1993 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO ON\n");
1994
1995 spin_lock_irqsave(&priv->lock, flags);
1996 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1997
1998 /* If the driver is up it will receive CARD_STATE_NOTIFICATION
1999 * notification where it will clear SW rfkill status.
2000 * Setting it here would break the handler. Only if the
2001 * interface is down we can set here since we don't
2002 * receive any further notification.
2003 */
2004 if (!priv->is_open)
2005 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2006 spin_unlock_irqrestore(&priv->lock, flags);
2007
2008 /* wake up ucode */
2009 msleep(10);
2010
2011 spin_lock_irqsave(&priv->lock, flags);
2012 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2013 if (!iwl_grab_nic_access(priv))
2014 iwl_release_nic_access(priv);
2015 spin_unlock_irqrestore(&priv->lock, flags);
2016
2017 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2018 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
2019 "disabled by HW switch\n");
2020 return 0;
2021 }
2022
2023 /* when driver is up while rfkill is on, it wont receive
2024 * any CARD_STATE_NOTIFICATION notifications so we have to
2025 * restart it in here
2026 */
2027 if (priv->is_open && !test_bit(STATUS_ALIVE, &priv->status)) {
2028 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2029 if (!iwl_is_rfkill(priv))
2030 queue_work(priv->workqueue, &priv->up);
2031 }
2032
2033 /* If the driver is already loaded, it will receive
2034 * CARD_STATE_NOTIFICATION notifications and the handler will
2035 * call restart to reload the driver.
2036 */
2037 return 1;
2038 }
2039 EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio);
2040
2041 void iwl_bg_rf_kill(struct work_struct *work)
2042 {
2043 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
2044
2045 wake_up_interruptible(&priv->wait_command_queue);
2046
2047 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2048 return;
2049
2050 mutex_lock(&priv->mutex);
2051
2052 if (!iwl_is_rfkill(priv)) {
2053 IWL_DEBUG_RF_KILL(priv,
2054 "HW and/or SW RF Kill no longer active, restarting "
2055 "device\n");
2056 if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
2057 test_bit(STATUS_ALIVE, &priv->status))
2058 queue_work(priv->workqueue, &priv->restart);
2059 } else {
2060 /* make sure mac80211 stop sending Tx frame */
2061 if (priv->mac80211_registered)
2062 ieee80211_stop_queues(priv->hw);
2063
2064 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2065 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
2066 "disabled by SW switch\n");
2067 else
2068 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
2069 "Kill switch must be turned off for "
2070 "wireless networking to work.\n");
2071 }
2072 mutex_unlock(&priv->mutex);
2073 iwl_rfkill_set_hw_state(priv);
2074 }
2075 EXPORT_SYMBOL(iwl_bg_rf_kill);
2076
2077 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2078 struct iwl_rx_mem_buffer *rxb)
2079 {
2080 #ifdef CONFIG_IWLWIFI_DEBUG
2081 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2082 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2083 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2084 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2085 #endif
2086 }
2087 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2088
2089 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2090 struct iwl_rx_mem_buffer *rxb)
2091 {
2092 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2093 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2094 "notification for %s:\n",
2095 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2096 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
2097 }
2098 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2099
2100 void iwl_rx_reply_error(struct iwl_priv *priv,
2101 struct iwl_rx_mem_buffer *rxb)
2102 {
2103 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2104
2105 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2106 "seq 0x%04X ser 0x%08X\n",
2107 le32_to_cpu(pkt->u.err_resp.error_type),
2108 get_cmd_string(pkt->u.err_resp.cmd_id),
2109 pkt->u.err_resp.cmd_id,
2110 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2111 le32_to_cpu(pkt->u.err_resp.error_info));
2112 }
2113 EXPORT_SYMBOL(iwl_rx_reply_error);
2114
2115 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2116 const struct ieee80211_tx_queue_params *params)
2117 {
2118 struct iwl_priv *priv = hw->priv;
2119 unsigned long flags;
2120 int q;
2121
2122 IWL_DEBUG_MAC80211(priv, "enter\n");
2123
2124 if (!iwl_is_ready_rf(priv)) {
2125 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2126 return -EIO;
2127 }
2128
2129 if (queue >= AC_NUM) {
2130 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2131 return 0;
2132 }
2133
2134 q = AC_NUM - 1 - queue;
2135
2136 spin_lock_irqsave(&priv->lock, flags);
2137
2138 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2139 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2140 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2141 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2142 cpu_to_le16((params->txop * 32));
2143
2144 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2145 priv->qos_data.qos_active = 1;
2146
2147 if (priv->iw_mode == NL80211_IFTYPE_AP)
2148 iwl_activate_qos(priv, 1);
2149 else if (priv->assoc_id && iwl_is_associated(priv))
2150 iwl_activate_qos(priv, 0);
2151
2152 spin_unlock_irqrestore(&priv->lock, flags);
2153
2154 IWL_DEBUG_MAC80211(priv, "leave\n");
2155 return 0;
2156 }
2157 EXPORT_SYMBOL(iwl_mac_conf_tx);
2158 #ifdef CONFIG_PM
2159
2160 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2161 {
2162 struct iwl_priv *priv = pci_get_drvdata(pdev);
2163
2164 /*
2165 * This function is called when system goes into suspend state
2166 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2167 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2168 * it will not call apm_ops.stop() to stop the DMA operation.
2169 * Calling apm_ops.stop here to make sure we stop the DMA.
2170 */
2171 priv->cfg->ops->lib->apm_ops.stop(priv);
2172
2173 pci_save_state(pdev);
2174 pci_disable_device(pdev);
2175 pci_set_power_state(pdev, PCI_D3hot);
2176
2177 return 0;
2178 }
2179 EXPORT_SYMBOL(iwl_pci_suspend);
2180
2181 int iwl_pci_resume(struct pci_dev *pdev)
2182 {
2183 struct iwl_priv *priv = pci_get_drvdata(pdev);
2184 int ret;
2185
2186 pci_set_power_state(pdev, PCI_D0);
2187 ret = pci_enable_device(pdev);
2188 if (ret)
2189 return ret;
2190 pci_restore_state(pdev);
2191 iwl_enable_interrupts(priv);
2192
2193 return 0;
2194 }
2195 EXPORT_SYMBOL(iwl_pci_resume);
2196
2197 #endif /* CONFIG_PM */
kernel source for telekom puls (alcatel/mediatek)