iwlwifi: clean up iwl-commands.h
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlwifi / iwl-commands.h
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63 /*
64 * Please use this file (iwl-commands.h) only for uCode API definitions.
65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
66 * Please use iwl-dev.h for driver implementation definitions.
67 */
68
69 #ifndef __iwl_commands_h__
70 #define __iwl_commands_h__
71
72 #include <linux/ieee80211.h>
73 #include <linux/types.h>
74
75
76 enum {
77 REPLY_ALIVE = 0x1,
78 REPLY_ERROR = 0x2,
79 REPLY_ECHO = 0x3, /* test command */
80
81 /* RXON and QOS commands */
82 REPLY_RXON = 0x10,
83 REPLY_RXON_ASSOC = 0x11,
84 REPLY_QOS_PARAM = 0x13,
85 REPLY_RXON_TIMING = 0x14,
86
87 /* Multi-Station support */
88 REPLY_ADD_STA = 0x18,
89 REPLY_REMOVE_STA = 0x19,
90 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
91 REPLY_TXFIFO_FLUSH = 0x1e,
92
93 /* Security */
94 REPLY_WEPKEY = 0x20,
95
96 /* RX, TX, LEDs */
97 REPLY_TX = 0x1c,
98 REPLY_LEDS_CMD = 0x48,
99 REPLY_TX_LINK_QUALITY_CMD = 0x4e,
100
101 /* WiMAX coexistence */
102 COEX_PRIORITY_TABLE_CMD = 0x5a,
103 COEX_MEDIUM_NOTIFICATION = 0x5b,
104 COEX_EVENT_CMD = 0x5c,
105
106 /* Calibration */
107 TEMPERATURE_NOTIFICATION = 0x62,
108 CALIBRATION_CFG_CMD = 0x65,
109 CALIBRATION_RES_NOTIFICATION = 0x66,
110 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
111
112 /* 802.11h related */
113 REPLY_QUIET_CMD = 0x71, /* not used */
114 REPLY_CHANNEL_SWITCH = 0x72,
115 CHANNEL_SWITCH_NOTIFICATION = 0x73,
116 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
117 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
118
119 /* Power Management */
120 POWER_TABLE_CMD = 0x77,
121 PM_SLEEP_NOTIFICATION = 0x7A,
122 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
123
124 /* Scan commands and notifications */
125 REPLY_SCAN_CMD = 0x80,
126 REPLY_SCAN_ABORT_CMD = 0x81,
127 SCAN_START_NOTIFICATION = 0x82,
128 SCAN_RESULTS_NOTIFICATION = 0x83,
129 SCAN_COMPLETE_NOTIFICATION = 0x84,
130
131 /* IBSS/AP commands */
132 BEACON_NOTIFICATION = 0x90,
133 REPLY_TX_BEACON = 0x91,
134 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
135
136 /* Miscellaneous commands */
137 REPLY_TX_POWER_DBM_CMD = 0x95,
138 QUIET_NOTIFICATION = 0x96, /* not used */
139 REPLY_TX_PWR_TABLE_CMD = 0x97,
140 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
141 TX_ANT_CONFIGURATION_CMD = 0x98,
142 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
143
144 /* Bluetooth device coexistence config command */
145 REPLY_BT_CONFIG = 0x9b,
146
147 /* Statistics */
148 REPLY_STATISTICS_CMD = 0x9c,
149 STATISTICS_NOTIFICATION = 0x9d,
150
151 /* RF-KILL commands and notifications */
152 REPLY_CARD_STATE_CMD = 0xa0,
153 CARD_STATE_NOTIFICATION = 0xa1,
154
155 /* Missed beacons notification */
156 MISSED_BEACONS_NOTIFICATION = 0xa2,
157
158 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
159 SENSITIVITY_CMD = 0xa8,
160 REPLY_PHY_CALIBRATION_CMD = 0xb0,
161 REPLY_RX_PHY_CMD = 0xc0,
162 REPLY_RX_MPDU_CMD = 0xc1,
163 REPLY_RX = 0xc3,
164 REPLY_COMPRESSED_BA = 0xc5,
165
166 /* BT Coex */
167 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
168 REPLY_BT_COEX_PROT_ENV = 0xcd,
169 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
170
171 /* PAN commands */
172 REPLY_WIPAN_PARAMS = 0xb2,
173 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
174 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
175 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
176 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
177 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
178 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
179 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
180 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
181
182 REPLY_WOWLAN_PATTERNS = 0xe0,
183 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
184 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
185 REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
186 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
187 REPLY_WOWLAN_GET_STATUS = 0xe5,
188 REPLY_D3_CONFIG = 0xd3,
189
190 REPLY_MAX = 0xff
191 };
192
193 /******************************************************************************
194 * (0)
195 * Commonly used structures and definitions:
196 * Command header, rate_n_flags, txpower
197 *
198 *****************************************************************************/
199
200 /* iwl_cmd_header flags value */
201 #define IWL_CMD_FAILED_MSK 0x40
202
203 /**
204 * iwlagn rate_n_flags bit fields
205 *
206 * rate_n_flags format is used in following iwlagn commands:
207 * REPLY_RX (response only)
208 * REPLY_RX_MPDU (response only)
209 * REPLY_TX (both command and response)
210 * REPLY_TX_LINK_QUALITY_CMD
211 *
212 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
213 * 2-0: 0) 6 Mbps
214 * 1) 12 Mbps
215 * 2) 18 Mbps
216 * 3) 24 Mbps
217 * 4) 36 Mbps
218 * 5) 48 Mbps
219 * 6) 54 Mbps
220 * 7) 60 Mbps
221 *
222 * 4-3: 0) Single stream (SISO)
223 * 1) Dual stream (MIMO)
224 * 2) Triple stream (MIMO)
225 *
226 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
227 *
228 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
229 * 3-0: 0xD) 6 Mbps
230 * 0xF) 9 Mbps
231 * 0x5) 12 Mbps
232 * 0x7) 18 Mbps
233 * 0x9) 24 Mbps
234 * 0xB) 36 Mbps
235 * 0x1) 48 Mbps
236 * 0x3) 54 Mbps
237 *
238 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
239 * 6-0: 10) 1 Mbps
240 * 20) 2 Mbps
241 * 55) 5.5 Mbps
242 * 110) 11 Mbps
243 */
244 #define RATE_MCS_CODE_MSK 0x7
245 #define RATE_MCS_SPATIAL_POS 3
246 #define RATE_MCS_SPATIAL_MSK 0x18
247 #define RATE_MCS_HT_DUP_POS 5
248 #define RATE_MCS_HT_DUP_MSK 0x20
249 /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
250 #define RATE_MCS_RATE_MSK 0xff
251
252 /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
253 #define RATE_MCS_FLAGS_POS 8
254 #define RATE_MCS_HT_POS 8
255 #define RATE_MCS_HT_MSK 0x100
256
257 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
258 #define RATE_MCS_CCK_POS 9
259 #define RATE_MCS_CCK_MSK 0x200
260
261 /* Bit 10: (1) Use Green Field preamble */
262 #define RATE_MCS_GF_POS 10
263 #define RATE_MCS_GF_MSK 0x400
264
265 /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
266 #define RATE_MCS_HT40_POS 11
267 #define RATE_MCS_HT40_MSK 0x800
268
269 /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
270 #define RATE_MCS_DUP_POS 12
271 #define RATE_MCS_DUP_MSK 0x1000
272
273 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
274 #define RATE_MCS_SGI_POS 13
275 #define RATE_MCS_SGI_MSK 0x2000
276
277 /**
278 * rate_n_flags Tx antenna masks
279 * 4965 has 2 transmitters
280 * 5100 has 1 transmitter B
281 * 5150 has 1 transmitter A
282 * 5300 has 3 transmitters
283 * 5350 has 3 transmitters
284 * bit14:16
285 */
286 #define RATE_MCS_ANT_POS 14
287 #define RATE_MCS_ANT_A_MSK 0x04000
288 #define RATE_MCS_ANT_B_MSK 0x08000
289 #define RATE_MCS_ANT_C_MSK 0x10000
290 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
291 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
292 #define RATE_ANT_NUM 3
293
294 #define POWER_TABLE_NUM_ENTRIES 33
295 #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
296 #define POWER_TABLE_CCK_ENTRY 32
297
298 #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
299 #define IWL_PWR_CCK_ENTRIES 2
300
301 /**
302 * struct tx_power_dual_stream
303 *
304 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
305 *
306 * Same format as iwl_tx_power_dual_stream, but __le32
307 */
308 struct tx_power_dual_stream {
309 __le32 dw;
310 } __packed;
311
312 /**
313 * Command REPLY_TX_POWER_DBM_CMD = 0x98
314 * struct iwlagn_tx_power_dbm_cmd
315 */
316 #define IWLAGN_TX_POWER_AUTO 0x7f
317 #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
318
319 struct iwlagn_tx_power_dbm_cmd {
320 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
321 u8 flags;
322 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
323 u8 reserved;
324 } __packed;
325
326 /**
327 * Command TX_ANT_CONFIGURATION_CMD = 0x98
328 * This command is used to configure valid Tx antenna.
329 * By default uCode concludes the valid antenna according to the radio flavor.
330 * This command enables the driver to override/modify this conclusion.
331 */
332 struct iwl_tx_ant_config_cmd {
333 __le32 valid;
334 } __packed;
335
336 /******************************************************************************
337 * (0a)
338 * Alive and Error Commands & Responses:
339 *
340 *****************************************************************************/
341
342 #define UCODE_VALID_OK cpu_to_le32(0x1)
343
344 /**
345 * REPLY_ALIVE = 0x1 (response only, not a command)
346 *
347 * uCode issues this "alive" notification once the runtime image is ready
348 * to receive commands from the driver. This is the *second* "alive"
349 * notification that the driver will receive after rebooting uCode;
350 * this "alive" is indicated by subtype field != 9.
351 *
352 * See comments documenting "BSM" (bootstrap state machine).
353 *
354 * This response includes two pointers to structures within the device's
355 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
356 *
357 * 1) log_event_table_ptr indicates base of the event log. This traces
358 * a 256-entry history of uCode execution within a circular buffer.
359 * Its header format is:
360 *
361 * __le32 log_size; log capacity (in number of entries)
362 * __le32 type; (1) timestamp with each entry, (0) no timestamp
363 * __le32 wraps; # times uCode has wrapped to top of circular buffer
364 * __le32 write_index; next circular buffer entry that uCode would fill
365 *
366 * The header is followed by the circular buffer of log entries. Entries
367 * with timestamps have the following format:
368 *
369 * __le32 event_id; range 0 - 1500
370 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
371 * __le32 data; event_id-specific data value
372 *
373 * Entries without timestamps contain only event_id and data.
374 *
375 *
376 * 2) error_event_table_ptr indicates base of the error log. This contains
377 * information about any uCode error that occurs. For agn, the format
378 * of the error log is defined by struct iwl_error_event_table.
379 *
380 * The Linux driver can print both logs to the system log when a uCode error
381 * occurs.
382 */
383
384 /*
385 * Note: This structure is read from the device with IO accesses,
386 * and the reading already does the endian conversion. As it is
387 * read with u32-sized accesses, any members with a different size
388 * need to be ordered correctly though!
389 */
390 struct iwl_error_event_table {
391 u32 valid; /* (nonzero) valid, (0) log is empty */
392 u32 error_id; /* type of error */
393 u32 pc; /* program counter */
394 u32 blink1; /* branch link */
395 u32 blink2; /* branch link */
396 u32 ilink1; /* interrupt link */
397 u32 ilink2; /* interrupt link */
398 u32 data1; /* error-specific data */
399 u32 data2; /* error-specific data */
400 u32 line; /* source code line of error */
401 u32 bcon_time; /* beacon timer */
402 u32 tsf_low; /* network timestamp function timer */
403 u32 tsf_hi; /* network timestamp function timer */
404 u32 gp1; /* GP1 timer register */
405 u32 gp2; /* GP2 timer register */
406 u32 gp3; /* GP3 timer register */
407 u32 ucode_ver; /* uCode version */
408 u32 hw_ver; /* HW Silicon version */
409 u32 brd_ver; /* HW board version */
410 u32 log_pc; /* log program counter */
411 u32 frame_ptr; /* frame pointer */
412 u32 stack_ptr; /* stack pointer */
413 u32 hcmd; /* last host command header */
414 u32 isr0; /* isr status register LMPM_NIC_ISR0:
415 * rxtx_flag */
416 u32 isr1; /* isr status register LMPM_NIC_ISR1:
417 * host_flag */
418 u32 isr2; /* isr status register LMPM_NIC_ISR2:
419 * enc_flag */
420 u32 isr3; /* isr status register LMPM_NIC_ISR3:
421 * time_flag */
422 u32 isr4; /* isr status register LMPM_NIC_ISR4:
423 * wico interrupt */
424 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
425 u32 wait_event; /* wait event() caller address */
426 u32 l2p_control; /* L2pControlField */
427 u32 l2p_duration; /* L2pDurationField */
428 u32 l2p_mhvalid; /* L2pMhValidBits */
429 u32 l2p_addr_match; /* L2pAddrMatchStat */
430 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
431 * (LMPM_PMG_SEL) */
432 u32 u_timestamp; /* indicate when the date and time of the
433 * compilation */
434 u32 flow_handler; /* FH read/write pointers, RX credit */
435 } __packed;
436
437 struct iwl_alive_resp {
438 u8 ucode_minor;
439 u8 ucode_major;
440 __le16 reserved1;
441 u8 sw_rev[8];
442 u8 ver_type;
443 u8 ver_subtype; /* not "9" for runtime alive */
444 __le16 reserved2;
445 __le32 log_event_table_ptr; /* SRAM address for event log */
446 __le32 error_event_table_ptr; /* SRAM address for error log */
447 __le32 timestamp;
448 __le32 is_valid;
449 } __packed;
450
451 /*
452 * REPLY_ERROR = 0x2 (response only, not a command)
453 */
454 struct iwl_error_resp {
455 __le32 error_type;
456 u8 cmd_id;
457 u8 reserved1;
458 __le16 bad_cmd_seq_num;
459 __le32 error_info;
460 __le64 timestamp;
461 } __packed;
462
463 /******************************************************************************
464 * (1)
465 * RXON Commands & Responses:
466 *
467 *****************************************************************************/
468
469 /*
470 * Rx config defines & structure
471 */
472 /* rx_config device types */
473 enum {
474 RXON_DEV_TYPE_AP = 1,
475 RXON_DEV_TYPE_ESS = 3,
476 RXON_DEV_TYPE_IBSS = 4,
477 RXON_DEV_TYPE_SNIFFER = 6,
478 RXON_DEV_TYPE_CP = 7,
479 RXON_DEV_TYPE_2STA = 8,
480 RXON_DEV_TYPE_P2P = 9,
481 };
482
483
484 #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
485 #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
486 #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
487 #define RXON_RX_CHAIN_VALID_POS (1)
488 #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
489 #define RXON_RX_CHAIN_FORCE_SEL_POS (4)
490 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
491 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
492 #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
493 #define RXON_RX_CHAIN_CNT_POS (10)
494 #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
495 #define RXON_RX_CHAIN_MIMO_CNT_POS (12)
496 #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
497 #define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
498
499 /* rx_config flags */
500 /* band & modulation selection */
501 #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
502 #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
503 /* auto detection enable */
504 #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
505 /* TGg protection when tx */
506 #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
507 /* cck short slot & preamble */
508 #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
509 #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
510 /* antenna selection */
511 #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
512 #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
513 #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
514 #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
515 /* radar detection enable */
516 #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
517 #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
518 /* rx response to host with 8-byte TSF
519 * (according to ON_AIR deassertion) */
520 #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
521
522
523 /* HT flags */
524 #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
525 #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
526
527 #define RXON_FLG_HT_OPERATING_MODE_POS (23)
528
529 #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
530 #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
531
532 #define RXON_FLG_CHANNEL_MODE_POS (25)
533 #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
534
535 /* channel mode */
536 enum {
537 CHANNEL_MODE_LEGACY = 0,
538 CHANNEL_MODE_PURE_40 = 1,
539 CHANNEL_MODE_MIXED = 2,
540 CHANNEL_MODE_RESERVED = 3,
541 };
542 #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
543 #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
544 #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
545
546 /* CTS to self (if spec allows) flag */
547 #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
548
549 /* rx_config filter flags */
550 /* accept all data frames */
551 #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
552 /* pass control & management to host */
553 #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
554 /* accept multi-cast */
555 #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
556 /* don't decrypt uni-cast frames */
557 #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
558 /* don't decrypt multi-cast frames */
559 #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
560 /* STA is associated */
561 #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
562 /* transfer to host non bssid beacons in associated state */
563 #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
564
565 /**
566 * REPLY_RXON = 0x10 (command, has simple generic response)
567 *
568 * RXON tunes the radio tuner to a service channel, and sets up a number
569 * of parameters that are used primarily for Rx, but also for Tx operations.
570 *
571 * NOTE: When tuning to a new channel, driver must set the
572 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
573 * info within the device, including the station tables, tx retry
574 * rate tables, and txpower tables. Driver must build a new station
575 * table and txpower table before transmitting anything on the RXON
576 * channel.
577 *
578 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
579 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
580 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
581 */
582
583 struct iwl_rxon_cmd {
584 u8 node_addr[6];
585 __le16 reserved1;
586 u8 bssid_addr[6];
587 __le16 reserved2;
588 u8 wlap_bssid_addr[6];
589 __le16 reserved3;
590 u8 dev_type;
591 u8 air_propagation;
592 __le16 rx_chain;
593 u8 ofdm_basic_rates;
594 u8 cck_basic_rates;
595 __le16 assoc_id;
596 __le32 flags;
597 __le32 filter_flags;
598 __le16 channel;
599 u8 ofdm_ht_single_stream_basic_rates;
600 u8 ofdm_ht_dual_stream_basic_rates;
601 u8 ofdm_ht_triple_stream_basic_rates;
602 u8 reserved5;
603 __le16 acquisition_data;
604 __le16 reserved6;
605 } __packed;
606
607 /*
608 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
609 */
610 struct iwl_rxon_assoc_cmd {
611 __le32 flags;
612 __le32 filter_flags;
613 u8 ofdm_basic_rates;
614 u8 cck_basic_rates;
615 __le16 reserved1;
616 u8 ofdm_ht_single_stream_basic_rates;
617 u8 ofdm_ht_dual_stream_basic_rates;
618 u8 ofdm_ht_triple_stream_basic_rates;
619 u8 reserved2;
620 __le16 rx_chain_select_flags;
621 __le16 acquisition_data;
622 __le32 reserved3;
623 } __packed;
624
625 #define IWL_CONN_MAX_LISTEN_INTERVAL 10
626 #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
627
628 /*
629 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
630 */
631 struct iwl_rxon_time_cmd {
632 __le64 timestamp;
633 __le16 beacon_interval;
634 __le16 atim_window;
635 __le32 beacon_init_val;
636 __le16 listen_interval;
637 u8 dtim_period;
638 u8 delta_cp_bss_tbtts;
639 } __packed;
640
641 /*
642 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
643 */
644 /**
645 * struct iwl5000_channel_switch_cmd
646 * @band: 0- 5.2GHz, 1- 2.4GHz
647 * @expect_beacon: 0- resume transmits after channel switch
648 * 1- wait for beacon to resume transmits
649 * @channel: new channel number
650 * @rxon_flags: Rx on flags
651 * @rxon_filter_flags: filtering parameters
652 * @switch_time: switch time in extended beacon format
653 * @reserved: reserved bytes
654 */
655 struct iwl5000_channel_switch_cmd {
656 u8 band;
657 u8 expect_beacon;
658 __le16 channel;
659 __le32 rxon_flags;
660 __le32 rxon_filter_flags;
661 __le32 switch_time;
662 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
663 } __packed;
664
665 /**
666 * struct iwl6000_channel_switch_cmd
667 * @band: 0- 5.2GHz, 1- 2.4GHz
668 * @expect_beacon: 0- resume transmits after channel switch
669 * 1- wait for beacon to resume transmits
670 * @channel: new channel number
671 * @rxon_flags: Rx on flags
672 * @rxon_filter_flags: filtering parameters
673 * @switch_time: switch time in extended beacon format
674 * @reserved: reserved bytes
675 */
676 struct iwl6000_channel_switch_cmd {
677 u8 band;
678 u8 expect_beacon;
679 __le16 channel;
680 __le32 rxon_flags;
681 __le32 rxon_filter_flags;
682 __le32 switch_time;
683 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
684 } __packed;
685
686 /*
687 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
688 */
689 struct iwl_csa_notification {
690 __le16 band;
691 __le16 channel;
692 __le32 status; /* 0 - OK, 1 - fail */
693 } __packed;
694
695 /******************************************************************************
696 * (2)
697 * Quality-of-Service (QOS) Commands & Responses:
698 *
699 *****************************************************************************/
700
701 /**
702 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
703 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
704 *
705 * @cw_min: Contention window, start value in numbers of slots.
706 * Should be a power-of-2, minus 1. Device's default is 0x0f.
707 * @cw_max: Contention window, max value in numbers of slots.
708 * Should be a power-of-2, minus 1. Device's default is 0x3f.
709 * @aifsn: Number of slots in Arbitration Interframe Space (before
710 * performing random backoff timing prior to Tx). Device default 1.
711 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
712 *
713 * Device will automatically increase contention window by (2*CW) + 1 for each
714 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
715 * value, to cap the CW value.
716 */
717 struct iwl_ac_qos {
718 __le16 cw_min;
719 __le16 cw_max;
720 u8 aifsn;
721 u8 reserved1;
722 __le16 edca_txop;
723 } __packed;
724
725 /* QoS flags defines */
726 #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
727 #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
728 #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
729
730 /* Number of Access Categories (AC) (EDCA), queues 0..3 */
731 #define AC_NUM 4
732
733 /*
734 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
735 *
736 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
737 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
738 */
739 struct iwl_qosparam_cmd {
740 __le32 qos_flags;
741 struct iwl_ac_qos ac[AC_NUM];
742 } __packed;
743
744 /******************************************************************************
745 * (3)
746 * Add/Modify Stations Commands & Responses:
747 *
748 *****************************************************************************/
749 /*
750 * Multi station support
751 */
752
753 /* Special, dedicated locations within device's station table */
754 #define IWL_AP_ID 0
755 #define IWL_AP_ID_PAN 1
756 #define IWL_STA_ID 2
757 #define IWLAGN_PAN_BCAST_ID 14
758 #define IWLAGN_BROADCAST_ID 15
759 #define IWLAGN_STATION_COUNT 16
760
761 #define IWL_INVALID_STATION 255
762 #define IWL_MAX_TID_COUNT 8
763 #define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
764
765 #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
766 #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
767 #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
768 #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
769 #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
770 #define STA_FLG_MAX_AGG_SIZE_POS (19)
771 #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
772 #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
773 #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
774 #define STA_FLG_AGG_MPDU_DENSITY_POS (23)
775 #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
776
777 /* Use in mode field. 1: modify existing entry, 0: add new station entry */
778 #define STA_CONTROL_MODIFY_MSK 0x01
779
780 /* key flags __le16*/
781 #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
782 #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
783 #define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
784 #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
785 #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
786
787 #define STA_KEY_FLG_KEYID_POS 8
788 #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
789 /* wep key is either from global key (0) or from station info array (1) */
790 #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
791
792 /* wep key in STA: 5-bytes (0) or 13-bytes (1) */
793 #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
794 #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
795 #define STA_KEY_MAX_NUM 8
796 #define STA_KEY_MAX_NUM_PAN 16
797 /* must not match WEP_INVALID_OFFSET */
798 #define IWLAGN_HW_KEY_DEFAULT 0xfe
799
800 /* Flags indicate whether to modify vs. don't change various station params */
801 #define STA_MODIFY_KEY_MASK 0x01
802 #define STA_MODIFY_TID_DISABLE_TX 0x02
803 #define STA_MODIFY_TX_RATE_MSK 0x04
804 #define STA_MODIFY_ADDBA_TID_MSK 0x08
805 #define STA_MODIFY_DELBA_TID_MSK 0x10
806 #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
807
808 /* Receiver address (actually, Rx station's index into station table),
809 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
810 #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
811
812 /* agn */
813 struct iwl_keyinfo {
814 __le16 key_flags;
815 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
816 u8 reserved1;
817 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
818 u8 key_offset;
819 u8 reserved2;
820 u8 key[16]; /* 16-byte unicast decryption key */
821 __le64 tx_secur_seq_cnt;
822 __le64 hw_tkip_mic_rx_key;
823 __le64 hw_tkip_mic_tx_key;
824 } __packed;
825
826 /**
827 * struct sta_id_modify
828 * @addr[ETH_ALEN]: station's MAC address
829 * @sta_id: index of station in uCode's station table
830 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
831 *
832 * Driver selects unused table index when adding new station,
833 * or the index to a pre-existing station entry when modifying that station.
834 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
835 *
836 * modify_mask flags select which parameters to modify vs. leave alone.
837 */
838 struct sta_id_modify {
839 u8 addr[ETH_ALEN];
840 __le16 reserved1;
841 u8 sta_id;
842 u8 modify_mask;
843 __le16 reserved2;
844 } __packed;
845
846 /*
847 * REPLY_ADD_STA = 0x18 (command)
848 *
849 * The device contains an internal table of per-station information,
850 * with info on security keys, aggregation parameters, and Tx rates for
851 * initial Tx attempt and any retries (agn devices uses
852 * REPLY_TX_LINK_QUALITY_CMD,
853 *
854 * REPLY_ADD_STA sets up the table entry for one station, either creating
855 * a new entry, or modifying a pre-existing one.
856 *
857 * NOTE: RXON command (without "associated" bit set) wipes the station table
858 * clean. Moving into RF_KILL state does this also. Driver must set up
859 * new station table before transmitting anything on the RXON channel
860 * (except active scans or active measurements; those commands carry
861 * their own txpower/rate setup data).
862 *
863 * When getting started on a new channel, driver must set up the
864 * IWL_BROADCAST_ID entry (last entry in the table). For a client
865 * station in a BSS, once an AP is selected, driver sets up the AP STA
866 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
867 * are all that are needed for a BSS client station. If the device is
868 * used as AP, or in an IBSS network, driver must set up station table
869 * entries for all STAs in network, starting with index IWL_STA_ID.
870 */
871
872 struct iwl_addsta_cmd {
873 u8 mode; /* 1: modify existing, 0: add new station */
874 u8 reserved[3];
875 struct sta_id_modify sta;
876 struct iwl_keyinfo key;
877 __le32 station_flags; /* STA_FLG_* */
878 __le32 station_flags_msk; /* STA_FLG_* */
879
880 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
881 * corresponding to bit (e.g. bit 5 controls TID 5).
882 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
883 __le16 tid_disable_tx;
884 __le16 legacy_reserved;
885
886 /* TID for which to add block-ack support.
887 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
888 u8 add_immediate_ba_tid;
889
890 /* TID for which to remove block-ack support.
891 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
892 u8 remove_immediate_ba_tid;
893
894 /* Starting Sequence Number for added block-ack support.
895 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
896 __le16 add_immediate_ba_ssn;
897
898 /*
899 * Number of packets OK to transmit to station even though
900 * it is asleep -- used to synchronise PS-poll and u-APSD
901 * responses while ucode keeps track of STA sleep state.
902 */
903 __le16 sleep_tx_count;
904
905 __le16 reserved2;
906 } __packed;
907
908
909 #define ADD_STA_SUCCESS_MSK 0x1
910 #define ADD_STA_NO_ROOM_IN_TABLE 0x2
911 #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
912 #define ADD_STA_MODIFY_NON_EXIST_STA 0x8
913 /*
914 * REPLY_ADD_STA = 0x18 (response)
915 */
916 struct iwl_add_sta_resp {
917 u8 status; /* ADD_STA_* */
918 } __packed;
919
920 #define REM_STA_SUCCESS_MSK 0x1
921 /*
922 * REPLY_REM_STA = 0x19 (response)
923 */
924 struct iwl_rem_sta_resp {
925 u8 status;
926 } __packed;
927
928 /*
929 * REPLY_REM_STA = 0x19 (command)
930 */
931 struct iwl_rem_sta_cmd {
932 u8 num_sta; /* number of removed stations */
933 u8 reserved[3];
934 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
935 u8 reserved2[2];
936 } __packed;
937
938
939 /* WiFi queues mask */
940 #define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
941 #define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
942 #define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
943 #define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
944 #define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
945
946 /* PAN queues mask */
947 #define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
948 #define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
949 #define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
950 #define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
951 #define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
952 #define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
953
954 #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
955
956 #define IWL_DROP_SINGLE 0
957 #define IWL_DROP_ALL (BIT(IWL_RXON_CTX_BSS) | BIT(IWL_RXON_CTX_PAN))
958
959 /*
960 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
961 *
962 * When using full FIFO flush this command checks the scheduler HW block WR/RD
963 * pointers to check if all the frames were transferred by DMA into the
964 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
965 * empty the command can finish.
966 * This command is used to flush the TXFIFO from transmit commands, it may
967 * operate on single or multiple queues, the command queue can't be flushed by
968 * this command. The command response is returned when all the queue flush
969 * operations are done. Each TX command flushed return response with the FLUSH
970 * status set in the TX response status. When FIFO flush operation is used,
971 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
972 * are set.
973 *
974 * @fifo_control: bit mask for which queues to flush
975 * @flush_control: flush controls
976 * 0: Dump single MSDU
977 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
978 * 2: Dump all FIFO
979 */
980 struct iwl_txfifo_flush_cmd {
981 __le32 fifo_control;
982 __le16 flush_control;
983 __le16 reserved;
984 } __packed;
985
986 /*
987 * REPLY_WEP_KEY = 0x20
988 */
989 struct iwl_wep_key {
990 u8 key_index;
991 u8 key_offset;
992 u8 reserved1[2];
993 u8 key_size;
994 u8 reserved2[3];
995 u8 key[16];
996 } __packed;
997
998 struct iwl_wep_cmd {
999 u8 num_keys;
1000 u8 global_key_type;
1001 u8 flags;
1002 u8 reserved;
1003 struct iwl_wep_key key[0];
1004 } __packed;
1005
1006 #define WEP_KEY_WEP_TYPE 1
1007 #define WEP_KEYS_MAX 4
1008 #define WEP_INVALID_OFFSET 0xff
1009 #define WEP_KEY_LEN_64 5
1010 #define WEP_KEY_LEN_128 13
1011
1012 /******************************************************************************
1013 * (4)
1014 * Rx Responses:
1015 *
1016 *****************************************************************************/
1017
1018 #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1019 #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
1020
1021 #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1022 #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1023 #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1024 #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
1025 #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0
1026 #define RX_RES_PHY_FLAGS_ANTENNA_POS 4
1027
1028 #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1029 #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1030 #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1031 #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1032 #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
1033 #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1034
1035 #define RX_RES_STATUS_STATION_FOUND (1<<6)
1036 #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
1037
1038 #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1039 #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1040 #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1041 #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1042 #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
1043
1044 #define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1045 #define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1046 #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1047 #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1048
1049
1050 #define IWLAGN_RX_RES_PHY_CNT 8
1051 #define IWLAGN_RX_RES_AGC_IDX 1
1052 #define IWLAGN_RX_RES_RSSI_AB_IDX 2
1053 #define IWLAGN_RX_RES_RSSI_C_IDX 3
1054 #define IWLAGN_OFDM_AGC_MSK 0xfe00
1055 #define IWLAGN_OFDM_AGC_BIT_POS 9
1056 #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1057 #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1058 #define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1059 #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1060 #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1061 #define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1062 #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1063 #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1064 #define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1065
1066 struct iwlagn_non_cfg_phy {
1067 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
1068 } __packed;
1069
1070
1071 /*
1072 * REPLY_RX = 0xc3 (response only, not a command)
1073 * Used only for legacy (non 11n) frames.
1074 */
1075 struct iwl_rx_phy_res {
1076 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1077 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1078 u8 stat_id; /* configurable DSP phy data set ID */
1079 u8 reserved1;
1080 __le64 timestamp; /* TSF at on air rise */
1081 __le32 beacon_time_stamp; /* beacon at on-air rise */
1082 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1083 __le16 channel; /* channel number */
1084 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1085 __le32 rate_n_flags; /* RATE_MCS_* */
1086 __le16 byte_count; /* frame's byte-count */
1087 __le16 frame_time; /* frame's time on the air */
1088 } __packed;
1089
1090 struct iwl_rx_mpdu_res_start {
1091 __le16 byte_count;
1092 __le16 reserved;
1093 } __packed;
1094
1095
1096 /******************************************************************************
1097 * (5)
1098 * Tx Commands & Responses:
1099 *
1100 * Driver must place each REPLY_TX command into one of the prioritized Tx
1101 * queues in host DRAM, shared between driver and device (see comments for
1102 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1103 * are preparing to transmit, the device pulls the Tx command over the PCI
1104 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1105 * from which data will be transmitted.
1106 *
1107 * uCode handles all timing and protocol related to control frames
1108 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1109 * handle reception of block-acks; uCode updates the host driver via
1110 * REPLY_COMPRESSED_BA.
1111 *
1112 * uCode handles retrying Tx when an ACK is expected but not received.
1113 * This includes trying lower data rates than the one requested in the Tx
1114 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1115 *
1116 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1117 * This command must be executed after every RXON command, before Tx can occur.
1118 *****************************************************************************/
1119
1120 /* REPLY_TX Tx flags field */
1121
1122 /*
1123 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1124 * before this frame. if CTS-to-self required check
1125 * RXON_FLG_SELF_CTS_EN status.
1126 */
1127 #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1128
1129 /* 1: Expect ACK from receiving station
1130 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1131 * Set this for unicast frames, but not broadcast/multicast. */
1132 #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1133
1134 /* For agn devices:
1135 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1136 * Tx command's initial_rate_index indicates first rate to try;
1137 * uCode walks through table for additional Tx attempts.
1138 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1139 * This rate will be used for all Tx attempts; it will not be scaled. */
1140 #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1141
1142 /* 1: Expect immediate block-ack.
1143 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
1144 #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
1145
1146 /* Tx antenna selection field; reserved (0) for agn devices. */
1147 #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1148
1149 /* 1: Ignore Bluetooth priority for this frame.
1150 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1151 #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1152
1153 /* 1: uCode overrides sequence control field in MAC header.
1154 * 0: Driver provides sequence control field in MAC header.
1155 * Set this for management frames, non-QOS data frames, non-unicast frames,
1156 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1157 #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1158
1159 /* 1: This frame is non-last MPDU; more fragments are coming.
1160 * 0: Last fragment, or not using fragmentation. */
1161 #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1162
1163 /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1164 * 0: No TSF required in outgoing frame.
1165 * Set this for transmitting beacons and probe responses. */
1166 #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1167
1168 /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1169 * alignment of frame's payload data field.
1170 * 0: No pad
1171 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1172 * field (but not both). Driver must align frame data (i.e. data following
1173 * MAC header) to DWORD boundary. */
1174 #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1175
1176 /* accelerate aggregation support
1177 * 0 - no CCMP encryption; 1 - CCMP encryption */
1178 #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1179
1180 /* HCCA-AP - disable duration overwriting. */
1181 #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1182
1183
1184 /*
1185 * TX command security control
1186 */
1187 #define TX_CMD_SEC_WEP 0x01
1188 #define TX_CMD_SEC_CCM 0x02
1189 #define TX_CMD_SEC_TKIP 0x03
1190 #define TX_CMD_SEC_MSK 0x03
1191 #define TX_CMD_SEC_SHIFT 6
1192 #define TX_CMD_SEC_KEY128 0x08
1193
1194 /*
1195 * security overhead sizes
1196 */
1197 #define WEP_IV_LEN 4
1198 #define WEP_ICV_LEN 4
1199 #define CCMP_MIC_LEN 8
1200 #define TKIP_ICV_LEN 4
1201
1202 /*
1203 * REPLY_TX = 0x1c (command)
1204 */
1205
1206 /*
1207 * 4965 uCode updates these Tx attempt count values in host DRAM.
1208 * Used for managing Tx retries when expecting block-acks.
1209 * Driver should set these fields to 0.
1210 */
1211 struct iwl_dram_scratch {
1212 u8 try_cnt; /* Tx attempts */
1213 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
1214 __le16 reserved;
1215 } __packed;
1216
1217 struct iwl_tx_cmd {
1218 /*
1219 * MPDU byte count:
1220 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1221 * + 8 byte IV for CCM or TKIP (not used for WEP)
1222 * + Data payload
1223 * + 8-byte MIC (not used for CCM/WEP)
1224 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1225 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1226 * Range: 14-2342 bytes.
1227 */
1228 __le16 len;
1229
1230 /*
1231 * MPDU or MSDU byte count for next frame.
1232 * Used for fragmentation and bursting, but not 11n aggregation.
1233 * Same as "len", but for next frame. Set to 0 if not applicable.
1234 */
1235 __le16 next_frame_len;
1236
1237 __le32 tx_flags; /* TX_CMD_FLG_* */
1238
1239 /* uCode may modify this field of the Tx command (in host DRAM!).
1240 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1241 struct iwl_dram_scratch scratch;
1242
1243 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1244 __le32 rate_n_flags; /* RATE_MCS_* */
1245
1246 /* Index of destination station in uCode's station table */
1247 u8 sta_id;
1248
1249 /* Type of security encryption: CCM or TKIP */
1250 u8 sec_ctl; /* TX_CMD_SEC_* */
1251
1252 /*
1253 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1254 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1255 * data frames, this field may be used to selectively reduce initial
1256 * rate (via non-0 value) for special frames (e.g. management), while
1257 * still supporting rate scaling for all frames.
1258 */
1259 u8 initial_rate_index;
1260 u8 reserved;
1261 u8 key[16];
1262 __le16 next_frame_flags;
1263 __le16 reserved2;
1264 union {
1265 __le32 life_time;
1266 __le32 attempt;
1267 } stop_time;
1268
1269 /* Host DRAM physical address pointer to "scratch" in this command.
1270 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
1271 __le32 dram_lsb_ptr;
1272 u8 dram_msb_ptr;
1273
1274 u8 rts_retry_limit; /*byte 50 */
1275 u8 data_retry_limit; /*byte 51 */
1276 u8 tid_tspec;
1277 union {
1278 __le16 pm_frame_timeout;
1279 __le16 attempt_duration;
1280 } timeout;
1281
1282 /*
1283 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1284 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1285 */
1286 __le16 driver_txop;
1287
1288 /*
1289 * MAC header goes here, followed by 2 bytes padding if MAC header
1290 * length is 26 or 30 bytes, followed by payload data
1291 */
1292 u8 payload[0];
1293 struct ieee80211_hdr hdr[0];
1294 } __packed;
1295
1296 /*
1297 * TX command response is sent after *agn* transmission attempts.
1298 *
1299 * both postpone and abort status are expected behavior from uCode. there is
1300 * no special operation required from driver; except for RFKILL_FLUSH,
1301 * which required tx flush host command to flush all the tx frames in queues
1302 */
1303 enum {
1304 TX_STATUS_SUCCESS = 0x01,
1305 TX_STATUS_DIRECT_DONE = 0x02,
1306 /* postpone TX */
1307 TX_STATUS_POSTPONE_DELAY = 0x40,
1308 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1309 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1310 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1311 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1312 /* abort TX */
1313 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1314 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1315 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1316 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1317 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1318 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1319 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1320 TX_STATUS_FAIL_DEST_PS = 0x88,
1321 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1322 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1323 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1324 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1325 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1326 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1327 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1328 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1329 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1330 };
1331
1332 #define TX_PACKET_MODE_REGULAR 0x0000
1333 #define TX_PACKET_MODE_BURST_SEQ 0x0100
1334 #define TX_PACKET_MODE_BURST_FIRST 0x0200
1335
1336 enum {
1337 TX_POWER_PA_NOT_ACTIVE = 0x0,
1338 };
1339
1340 enum {
1341 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
1342 TX_STATUS_DELAY_MSK = 0x00000040,
1343 TX_STATUS_ABORT_MSK = 0x00000080,
1344 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1345 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
1346 TX_RESERVED = 0x00780000, /* bits 19:22 */
1347 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1348 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1349 };
1350
1351 /* *******************************
1352 * TX aggregation status
1353 ******************************* */
1354
1355 enum {
1356 AGG_TX_STATE_TRANSMITTED = 0x00,
1357 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1358 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1359 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1360 AGG_TX_STATE_ABORT_MSK = 0x08,
1361 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1362 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1363 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1364 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1365 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1366 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1367 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1368 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1369 };
1370
1371 #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1372 #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1373
1374 #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1375 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1376 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1377
1378 /* # tx attempts for first frame in aggregation */
1379 #define AGG_TX_STATE_TRY_CNT_POS 12
1380 #define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1381
1382 /* Command ID and sequence number of Tx command for this frame */
1383 #define AGG_TX_STATE_SEQ_NUM_POS 16
1384 #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1385
1386 /*
1387 * REPLY_TX = 0x1c (response)
1388 *
1389 * This response may be in one of two slightly different formats, indicated
1390 * by the frame_count field:
1391 *
1392 * 1) No aggregation (frame_count == 1). This reports Tx results for
1393 * a single frame. Multiple attempts, at various bit rates, may have
1394 * been made for this frame.
1395 *
1396 * 2) Aggregation (frame_count > 1). This reports Tx results for
1397 * 2 or more frames that used block-acknowledge. All frames were
1398 * transmitted at same rate. Rate scaling may have been used if first
1399 * frame in this new agg block failed in previous agg block(s).
1400 *
1401 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
1402 * block-ack has not been received by the time the agn device records
1403 * this status.
1404 * This status relates to reasons the tx might have been blocked or aborted
1405 * within the sending station (this agn device), rather than whether it was
1406 * received successfully by the destination station.
1407 */
1408 struct agg_tx_status {
1409 __le16 status;
1410 __le16 sequence;
1411 } __packed;
1412
1413 /*
1414 * definitions for initial rate index field
1415 * bits [3:0] initial rate index
1416 * bits [6:4] rate table color, used for the initial rate
1417 * bit-7 invalid rate indication
1418 * i.e. rate was not chosen from rate table
1419 * or rate table color was changed during frame retries
1420 * refer tlc rate info
1421 */
1422
1423 #define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1424 #define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1425 #define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1426 #define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1427 #define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1428
1429 /* refer to ra_tid */
1430 #define IWLAGN_TX_RES_TID_POS 0
1431 #define IWLAGN_TX_RES_TID_MSK 0x0f
1432 #define IWLAGN_TX_RES_RA_POS 4
1433 #define IWLAGN_TX_RES_RA_MSK 0xf0
1434
1435 struct iwlagn_tx_resp {
1436 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1437 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1438 u8 failure_rts; /* # failures due to unsuccessful RTS */
1439 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1440
1441 /* For non-agg: Rate at which frame was successful.
1442 * For agg: Rate at which all frames were transmitted. */
1443 __le32 rate_n_flags; /* RATE_MCS_* */
1444
1445 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1446 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1447 __le16 wireless_media_time; /* uSecs */
1448
1449 u8 pa_status; /* RF power amplifier measurement (not used) */
1450 u8 pa_integ_res_a[3];
1451 u8 pa_integ_res_b[3];
1452 u8 pa_integ_res_C[3];
1453
1454 __le32 tfd_info;
1455 __le16 seq_ctl;
1456 __le16 byte_cnt;
1457 u8 tlc_info;
1458 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1459 __le16 frame_ctrl;
1460 /*
1461 * For non-agg: frame status TX_STATUS_*
1462 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1463 * fields follow this one, up to frame_count.
1464 * Bit fields:
1465 * 11- 0: AGG_TX_STATE_* status code
1466 * 15-12: Retry count for 1st frame in aggregation (retries
1467 * occur if tx failed for this frame when it was a
1468 * member of a previous aggregation block). If rate
1469 * scaling is used, retry count indicates the rate
1470 * table entry used for all frames in the new agg.
1471 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1472 */
1473 struct agg_tx_status status; /* TX status (in aggregation -
1474 * status of 1st frame) */
1475 } __packed;
1476 /*
1477 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1478 *
1479 * Reports Block-Acknowledge from recipient station
1480 */
1481 struct iwl_compressed_ba_resp {
1482 __le32 sta_addr_lo32;
1483 __le16 sta_addr_hi16;
1484 __le16 reserved;
1485
1486 /* Index of recipient (BA-sending) station in uCode's station table */
1487 u8 sta_id;
1488 u8 tid;
1489 __le16 seq_ctl;
1490 __le64 bitmap;
1491 __le16 scd_flow;
1492 __le16 scd_ssn;
1493 u8 txed; /* number of frames sent */
1494 u8 txed_2_done; /* number of frames acked */
1495 } __packed;
1496
1497 /*
1498 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1499 *
1500 */
1501
1502 /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1503 #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
1504
1505 /* # of EDCA prioritized tx fifos */
1506 #define LINK_QUAL_AC_NUM AC_NUM
1507
1508 /* # entries in rate scale table to support Tx retries */
1509 #define LINK_QUAL_MAX_RETRY_NUM 16
1510
1511 /* Tx antenna selection values */
1512 #define LINK_QUAL_ANT_A_MSK (1 << 0)
1513 #define LINK_QUAL_ANT_B_MSK (1 << 1)
1514 #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1515
1516
1517 /**
1518 * struct iwl_link_qual_general_params
1519 *
1520 * Used in REPLY_TX_LINK_QUALITY_CMD
1521 */
1522 struct iwl_link_qual_general_params {
1523 u8 flags;
1524
1525 /* No entries at or above this (driver chosen) index contain MIMO */
1526 u8 mimo_delimiter;
1527
1528 /* Best single antenna to use for single stream (legacy, SISO). */
1529 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1530
1531 /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1532 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1533
1534 /*
1535 * If driver needs to use different initial rates for different
1536 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1537 * this table will set that up, by indicating the indexes in the
1538 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1539 * Otherwise, driver should set all entries to 0.
1540 *
1541 * Entry usage:
1542 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1543 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1544 */
1545 u8 start_rate_index[LINK_QUAL_AC_NUM];
1546 } __packed;
1547
1548 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
1549 #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1550 #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
1551
1552 #define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1553 #define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1554 #define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1555
1556 #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
1557 #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
1558 #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1559
1560 /**
1561 * struct iwl_link_qual_agg_params
1562 *
1563 * Used in REPLY_TX_LINK_QUALITY_CMD
1564 */
1565 struct iwl_link_qual_agg_params {
1566
1567 /*
1568 *Maximum number of uSec in aggregation.
1569 * default set to 4000 (4 milliseconds) if not configured in .cfg
1570 */
1571 __le16 agg_time_limit;
1572
1573 /*
1574 * Number of Tx retries allowed for a frame, before that frame will
1575 * no longer be considered for the start of an aggregation sequence
1576 * (scheduler will then try to tx it as single frame).
1577 * Driver should set this to 3.
1578 */
1579 u8 agg_dis_start_th;
1580
1581 /*
1582 * Maximum number of frames in aggregation.
1583 * 0 = no limit (default). 1 = no aggregation.
1584 * Other values = max # frames in aggregation.
1585 */
1586 u8 agg_frame_cnt_limit;
1587
1588 __le32 reserved;
1589 } __packed;
1590
1591 /*
1592 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1593 *
1594 * For agn devices
1595 *
1596 * Each station in the agn device's internal station table has its own table
1597 * of 16
1598 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1599 * an ACK is not received. This command replaces the entire table for
1600 * one station.
1601 *
1602 * NOTE: Station must already be in agn device's station table.
1603 * Use REPLY_ADD_STA.
1604 *
1605 * The rate scaling procedures described below work well. Of course, other
1606 * procedures are possible, and may work better for particular environments.
1607 *
1608 *
1609 * FILLING THE RATE TABLE
1610 *
1611 * Given a particular initial rate and mode, as determined by the rate
1612 * scaling algorithm described below, the Linux driver uses the following
1613 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1614 * Link Quality command:
1615 *
1616 *
1617 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1618 * a) Use this same initial rate for first 3 entries.
1619 * b) Find next lower available rate using same mode (SISO or MIMO),
1620 * use for next 3 entries. If no lower rate available, switch to
1621 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
1622 * c) If using MIMO, set command's mimo_delimiter to number of entries
1623 * using MIMO (3 or 6).
1624 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1625 * no MIMO, no short guard interval), at the next lower bit rate
1626 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1627 * legacy procedure for remaining table entries.
1628 *
1629 * 2) If using legacy initial rate:
1630 * a) Use the initial rate for only one entry.
1631 * b) For each following entry, reduce the rate to next lower available
1632 * rate, until reaching the lowest available rate.
1633 * c) When reducing rate, also switch antenna selection.
1634 * d) Once lowest available rate is reached, repeat this rate until
1635 * rate table is filled (16 entries), switching antenna each entry.
1636 *
1637 *
1638 * ACCUMULATING HISTORY
1639 *
1640 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1641 * uses two sets of frame Tx success history: One for the current/active
1642 * modulation mode, and one for a speculative/search mode that is being
1643 * attempted. If the speculative mode turns out to be more effective (i.e.
1644 * actual transfer rate is better), then the driver continues to use the
1645 * speculative mode as the new current active mode.
1646 *
1647 * Each history set contains, separately for each possible rate, data for a
1648 * sliding window of the 62 most recent tx attempts at that rate. The data
1649 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1650 * and attempted frames, from which the driver can additionally calculate a
1651 * success ratio (success / attempted) and number of failures
1652 * (attempted - success), and control the size of the window (attempted).
1653 * The driver uses the bit map to remove successes from the success sum, as
1654 * the oldest tx attempts fall out of the window.
1655 *
1656 * When the agn device makes multiple tx attempts for a given frame, each
1657 * attempt might be at a different rate, and have different modulation
1658 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1659 * up in the rate scaling table in the Link Quality command. The driver must
1660 * determine which rate table entry was used for each tx attempt, to determine
1661 * which rate-specific history to update, and record only those attempts that
1662 * match the modulation characteristics of the history set.
1663 *
1664 * When using block-ack (aggregation), all frames are transmitted at the same
1665 * rate, since there is no per-attempt acknowledgment from the destination
1666 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1667 * rate_n_flags field. After receiving a block-ack, the driver can update
1668 * history for the entire block all at once.
1669 *
1670 *
1671 * FINDING BEST STARTING RATE:
1672 *
1673 * When working with a selected initial modulation mode (see below), the
1674 * driver attempts to find a best initial rate. The initial rate is the
1675 * first entry in the Link Quality command's rate table.
1676 *
1677 * 1) Calculate actual throughput (success ratio * expected throughput, see
1678 * table below) for current initial rate. Do this only if enough frames
1679 * have been attempted to make the value meaningful: at least 6 failed
1680 * tx attempts, or at least 8 successes. If not enough, don't try rate
1681 * scaling yet.
1682 *
1683 * 2) Find available rates adjacent to current initial rate. Available means:
1684 * a) supported by hardware &&
1685 * b) supported by association &&
1686 * c) within any constraints selected by user
1687 *
1688 * 3) Gather measured throughputs for adjacent rates. These might not have
1689 * enough history to calculate a throughput. That's okay, we might try
1690 * using one of them anyway!
1691 *
1692 * 4) Try decreasing rate if, for current rate:
1693 * a) success ratio is < 15% ||
1694 * b) lower adjacent rate has better measured throughput ||
1695 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1696 *
1697 * As a sanity check, if decrease was determined above, leave rate
1698 * unchanged if:
1699 * a) lower rate unavailable
1700 * b) success ratio at current rate > 85% (very good)
1701 * c) current measured throughput is better than expected throughput
1702 * of lower rate (under perfect 100% tx conditions, see table below)
1703 *
1704 * 5) Try increasing rate if, for current rate:
1705 * a) success ratio is < 15% ||
1706 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1707 * b) higher adjacent rate has better measured throughput ||
1708 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1709 *
1710 * As a sanity check, if increase was determined above, leave rate
1711 * unchanged if:
1712 * a) success ratio at current rate < 70%. This is not particularly
1713 * good performance; higher rate is sure to have poorer success.
1714 *
1715 * 6) Re-evaluate the rate after each tx frame. If working with block-
1716 * acknowledge, history and statistics may be calculated for the entire
1717 * block (including prior history that fits within the history windows),
1718 * before re-evaluation.
1719 *
1720 * FINDING BEST STARTING MODULATION MODE:
1721 *
1722 * After working with a modulation mode for a "while" (and doing rate scaling),
1723 * the driver searches for a new initial mode in an attempt to improve
1724 * throughput. The "while" is measured by numbers of attempted frames:
1725 *
1726 * For legacy mode, search for new mode after:
1727 * 480 successful frames, or 160 failed frames
1728 * For high-throughput modes (SISO or MIMO), search for new mode after:
1729 * 4500 successful frames, or 400 failed frames
1730 *
1731 * Mode switch possibilities are (3 for each mode):
1732 *
1733 * For legacy:
1734 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1735 * For SISO:
1736 * Change antenna, try MIMO, try shortened guard interval (SGI)
1737 * For MIMO:
1738 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1739 *
1740 * When trying a new mode, use the same bit rate as the old/current mode when
1741 * trying antenna switches and shortened guard interval. When switching to
1742 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1743 * for which the expected throughput (under perfect conditions) is about the
1744 * same or slightly better than the actual measured throughput delivered by
1745 * the old/current mode.
1746 *
1747 * Actual throughput can be estimated by multiplying the expected throughput
1748 * by the success ratio (successful / attempted tx frames). Frame size is
1749 * not considered in this calculation; it assumes that frame size will average
1750 * out to be fairly consistent over several samples. The following are
1751 * metric values for expected throughput assuming 100% success ratio.
1752 * Only G band has support for CCK rates:
1753 *
1754 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1755 *
1756 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1757 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1758 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1759 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1760 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1761 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1762 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1763 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1764 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1765 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1766 *
1767 * After the new mode has been tried for a short while (minimum of 6 failed
1768 * frames or 8 successful frames), compare success ratio and actual throughput
1769 * estimate of the new mode with the old. If either is better with the new
1770 * mode, continue to use the new mode.
1771 *
1772 * Continue comparing modes until all 3 possibilities have been tried.
1773 * If moving from legacy to HT, try all 3 possibilities from the new HT
1774 * mode. After trying all 3, a best mode is found. Continue to use this mode
1775 * for the longer "while" described above (e.g. 480 successful frames for
1776 * legacy), and then repeat the search process.
1777 *
1778 */
1779 struct iwl_link_quality_cmd {
1780
1781 /* Index of destination/recipient station in uCode's station table */
1782 u8 sta_id;
1783 u8 reserved1;
1784 __le16 control; /* not used */
1785 struct iwl_link_qual_general_params general_params;
1786 struct iwl_link_qual_agg_params agg_params;
1787
1788 /*
1789 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1790 * specifies 1st Tx rate attempted, via index into this table.
1791 * agn devices works its way through table when retrying Tx.
1792 */
1793 struct {
1794 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
1795 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1796 __le32 reserved2;
1797 } __packed;
1798
1799 /*
1800 * BT configuration enable flags:
1801 * bit 0 - 1: BT channel announcement enabled
1802 * 0: disable
1803 * bit 1 - 1: priority of BT device enabled
1804 * 0: disable
1805 * bit 2 - 1: BT 2 wire support enabled
1806 * 0: disable
1807 */
1808 #define BT_COEX_DISABLE (0x0)
1809 #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1810 #define BT_ENABLE_PRIORITY BIT(1)
1811 #define BT_ENABLE_2_WIRE BIT(2)
1812
1813 #define BT_COEX_DISABLE (0x0)
1814 #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1815
1816 #define BT_LEAD_TIME_MIN (0x0)
1817 #define BT_LEAD_TIME_DEF (0x1E)
1818 #define BT_LEAD_TIME_MAX (0xFF)
1819
1820 #define BT_MAX_KILL_MIN (0x1)
1821 #define BT_MAX_KILL_DEF (0x5)
1822 #define BT_MAX_KILL_MAX (0xFF)
1823
1824 #define BT_DURATION_LIMIT_DEF 625
1825 #define BT_DURATION_LIMIT_MAX 1250
1826 #define BT_DURATION_LIMIT_MIN 625
1827
1828 #define BT_ON_THRESHOLD_DEF 4
1829 #define BT_ON_THRESHOLD_MAX 1000
1830 #define BT_ON_THRESHOLD_MIN 1
1831
1832 #define BT_FRAG_THRESHOLD_DEF 0
1833 #define BT_FRAG_THRESHOLD_MAX 0
1834 #define BT_FRAG_THRESHOLD_MIN 0
1835
1836 #define BT_AGG_THRESHOLD_DEF 1200
1837 #define BT_AGG_THRESHOLD_MAX 8000
1838 #define BT_AGG_THRESHOLD_MIN 400
1839
1840 /*
1841 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1842 *
1843 * agn devices support hardware handshake with Bluetooth device on
1844 * same platform. Bluetooth device alerts wireless device when it will Tx;
1845 * wireless device can delay or kill its own Tx to accommodate.
1846 */
1847 struct iwl_bt_cmd {
1848 u8 flags;
1849 u8 lead_time;
1850 u8 max_kill;
1851 u8 reserved;
1852 __le32 kill_ack_mask;
1853 __le32 kill_cts_mask;
1854 } __packed;
1855
1856 #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
1857
1858 #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1859 #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1860 #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1861 #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1862 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1863 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3
1864
1865 #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1866 /* Disable Sync PSPoll on SCO/eSCO */
1867 #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
1868
1869 #define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1870 #define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1871
1872 #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1873 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1874 #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
1875
1876 #define IWLAGN_BT_MAX_KILL_DEFAULT 5
1877
1878 #define IWLAGN_BT3_T7_DEFAULT 1
1879
1880 #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1881 #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1882 #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1883
1884 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
1885
1886 #define IWLAGN_BT3_T2_DEFAULT 0xc
1887
1888 #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1889 #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1890 #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1891 #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1892 #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1893 #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1894 #define IWLAGN_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6))
1895 #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
1896
1897 #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1898 IWLAGN_BT_VALID_BOOST | \
1899 IWLAGN_BT_VALID_MAX_KILL | \
1900 IWLAGN_BT_VALID_3W_TIMERS | \
1901 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1902 IWLAGN_BT_VALID_KILL_CTS_MASK | \
1903 IWLAGN_BT_VALID_BT4_TIMES | \
1904 IWLAGN_BT_VALID_3W_LUT)
1905
1906 struct iwl_basic_bt_cmd {
1907 u8 flags;
1908 u8 ledtime; /* unused */
1909 u8 max_kill;
1910 u8 bt3_timer_t7_value;
1911 __le32 kill_ack_mask;
1912 __le32 kill_cts_mask;
1913 u8 bt3_prio_sample_time;
1914 u8 bt3_timer_t2_value;
1915 __le16 bt4_reaction_time; /* unused */
1916 __le32 bt3_lookup_table[12];
1917 __le16 bt4_decision_time; /* unused */
1918 __le16 valid;
1919 };
1920
1921 struct iwl6000_bt_cmd {
1922 struct iwl_basic_bt_cmd basic;
1923 u8 prio_boost;
1924 /*
1925 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1926 * if configure the following patterns
1927 */
1928 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1929 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1930 };
1931
1932 struct iwl2000_bt_cmd {
1933 struct iwl_basic_bt_cmd basic;
1934 __le32 prio_boost;
1935 /*
1936 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1937 * if configure the following patterns
1938 */
1939 u8 reserved;
1940 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1941 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1942 };
1943
1944 #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
1945
1946 struct iwlagn_bt_sco_cmd {
1947 __le32 flags;
1948 };
1949
1950 /******************************************************************************
1951 * (6)
1952 * Spectrum Management (802.11h) Commands, Responses, Notifications:
1953 *
1954 *****************************************************************************/
1955
1956 /*
1957 * Spectrum Management
1958 */
1959 #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
1960 RXON_FILTER_CTL2HOST_MSK | \
1961 RXON_FILTER_ACCEPT_GRP_MSK | \
1962 RXON_FILTER_DIS_DECRYPT_MSK | \
1963 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
1964 RXON_FILTER_ASSOC_MSK | \
1965 RXON_FILTER_BCON_AWARE_MSK)
1966
1967 struct iwl_measure_channel {
1968 __le32 duration; /* measurement duration in extended beacon
1969 * format */
1970 u8 channel; /* channel to measure */
1971 u8 type; /* see enum iwl_measure_type */
1972 __le16 reserved;
1973 } __packed;
1974
1975 /*
1976 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
1977 */
1978 struct iwl_spectrum_cmd {
1979 __le16 len; /* number of bytes starting from token */
1980 u8 token; /* token id */
1981 u8 id; /* measurement id -- 0 or 1 */
1982 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
1983 u8 periodic; /* 1 = periodic */
1984 __le16 path_loss_timeout;
1985 __le32 start_time; /* start time in extended beacon format */
1986 __le32 reserved2;
1987 __le32 flags; /* rxon flags */
1988 __le32 filter_flags; /* rxon filter flags */
1989 __le16 channel_count; /* minimum 1, maximum 10 */
1990 __le16 reserved3;
1991 struct iwl_measure_channel channels[10];
1992 } __packed;
1993
1994 /*
1995 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
1996 */
1997 struct iwl_spectrum_resp {
1998 u8 token;
1999 u8 id; /* id of the prior command replaced, or 0xff */
2000 __le16 status; /* 0 - command will be handled
2001 * 1 - cannot handle (conflicts with another
2002 * measurement) */
2003 } __packed;
2004
2005 enum iwl_measurement_state {
2006 IWL_MEASUREMENT_START = 0,
2007 IWL_MEASUREMENT_STOP = 1,
2008 };
2009
2010 enum iwl_measurement_status {
2011 IWL_MEASUREMENT_OK = 0,
2012 IWL_MEASUREMENT_CONCURRENT = 1,
2013 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2014 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2015 /* 4-5 reserved */
2016 IWL_MEASUREMENT_STOPPED = 6,
2017 IWL_MEASUREMENT_TIMEOUT = 7,
2018 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2019 };
2020
2021 #define NUM_ELEMENTS_IN_HISTOGRAM 8
2022
2023 struct iwl_measurement_histogram {
2024 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2025 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
2026 } __packed;
2027
2028 /* clear channel availability counters */
2029 struct iwl_measurement_cca_counters {
2030 __le32 ofdm;
2031 __le32 cck;
2032 } __packed;
2033
2034 enum iwl_measure_type {
2035 IWL_MEASURE_BASIC = (1 << 0),
2036 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2037 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2038 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2039 IWL_MEASURE_FRAME = (1 << 4),
2040 /* bits 5:6 are reserved */
2041 IWL_MEASURE_IDLE = (1 << 7),
2042 };
2043
2044 /*
2045 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2046 */
2047 struct iwl_spectrum_notification {
2048 u8 id; /* measurement id -- 0 or 1 */
2049 u8 token;
2050 u8 channel_index; /* index in measurement channel list */
2051 u8 state; /* 0 - start, 1 - stop */
2052 __le32 start_time; /* lower 32-bits of TSF */
2053 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2054 u8 channel;
2055 u8 type; /* see enum iwl_measurement_type */
2056 u8 reserved1;
2057 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2058 * valid if applicable for measurement type requested. */
2059 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2060 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2061 __le32 cca_time; /* channel load time in usecs */
2062 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2063 * unidentified */
2064 u8 reserved2[3];
2065 struct iwl_measurement_histogram histogram;
2066 __le32 stop_time; /* lower 32-bits of TSF */
2067 __le32 status; /* see iwl_measurement_status */
2068 } __packed;
2069
2070 /******************************************************************************
2071 * (7)
2072 * Power Management Commands, Responses, Notifications:
2073 *
2074 *****************************************************************************/
2075
2076 /**
2077 * struct iwl_powertable_cmd - Power Table Command
2078 * @flags: See below:
2079 *
2080 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2081 *
2082 * PM allow:
2083 * bit 0 - '0' Driver not allow power management
2084 * '1' Driver allow PM (use rest of parameters)
2085 *
2086 * uCode send sleep notifications:
2087 * bit 1 - '0' Don't send sleep notification
2088 * '1' send sleep notification (SEND_PM_NOTIFICATION)
2089 *
2090 * Sleep over DTIM
2091 * bit 2 - '0' PM have to walk up every DTIM
2092 * '1' PM could sleep over DTIM till listen Interval.
2093 *
2094 * PCI power managed
2095 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2096 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
2097 *
2098 * Fast PD
2099 * bit 4 - '1' Put radio to sleep when receiving frame for others
2100 *
2101 * Force sleep Modes
2102 * bit 31/30- '00' use both mac/xtal sleeps
2103 * '01' force Mac sleep
2104 * '10' force xtal sleep
2105 * '11' Illegal set
2106 *
2107 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2108 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2109 * for every DTIM.
2110 */
2111 #define IWL_POWER_VEC_SIZE 5
2112
2113 #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
2114 #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2115 #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
2116 #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2117 #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2118 #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
2119 #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2120 #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2121 #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2122 #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
2123 #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
2124
2125 struct iwl_powertable_cmd {
2126 __le16 flags;
2127 u8 keep_alive_seconds;
2128 u8 debug_flags;
2129 __le32 rx_data_timeout;
2130 __le32 tx_data_timeout;
2131 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2132 __le32 keep_alive_beacons;
2133 } __packed;
2134
2135 /*
2136 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2137 * all devices identical.
2138 */
2139 struct iwl_sleep_notification {
2140 u8 pm_sleep_mode;
2141 u8 pm_wakeup_src;
2142 __le16 reserved;
2143 __le32 sleep_time;
2144 __le32 tsf_low;
2145 __le32 bcon_timer;
2146 } __packed;
2147
2148 /* Sleep states. all devices identical. */
2149 enum {
2150 IWL_PM_NO_SLEEP = 0,
2151 IWL_PM_SLP_MAC = 1,
2152 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2153 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2154 IWL_PM_SLP_PHY = 4,
2155 IWL_PM_SLP_REPENT = 5,
2156 IWL_PM_WAKEUP_BY_TIMER = 6,
2157 IWL_PM_WAKEUP_BY_DRIVER = 7,
2158 IWL_PM_WAKEUP_BY_RFKILL = 8,
2159 /* 3 reserved */
2160 IWL_PM_NUM_OF_MODES = 12,
2161 };
2162
2163 /*
2164 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2165 */
2166 #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2167 #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2168 #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2169 struct iwl_card_state_cmd {
2170 __le32 status; /* CARD_STATE_CMD_* request new power state */
2171 } __packed;
2172
2173 /*
2174 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2175 */
2176 struct iwl_card_state_notif {
2177 __le32 flags;
2178 } __packed;
2179
2180 #define HW_CARD_DISABLED 0x01
2181 #define SW_CARD_DISABLED 0x02
2182 #define CT_CARD_DISABLED 0x04
2183 #define RXON_CARD_DISABLED 0x10
2184
2185 struct iwl_ct_kill_config {
2186 __le32 reserved;
2187 __le32 critical_temperature_M;
2188 __le32 critical_temperature_R;
2189 } __packed;
2190
2191 /* 1000, and 6x00 */
2192 struct iwl_ct_kill_throttling_config {
2193 __le32 critical_temperature_exit;
2194 __le32 reserved;
2195 __le32 critical_temperature_enter;
2196 } __packed;
2197
2198 /******************************************************************************
2199 * (8)
2200 * Scan Commands, Responses, Notifications:
2201 *
2202 *****************************************************************************/
2203
2204 #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2205 #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
2206
2207 /**
2208 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2209 *
2210 * One for each channel in the scan list.
2211 * Each channel can independently select:
2212 * 1) SSID for directed active scans
2213 * 2) Txpower setting (for rate specified within Tx command)
2214 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2215 * quiet_plcp_th, good_CRC_th)
2216 *
2217 * To avoid uCode errors, make sure the following are true (see comments
2218 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2219 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2220 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2221 * 2) quiet_time <= active_dwell
2222 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2223 * passive_dwell < max_out_time
2224 * active_dwell < max_out_time
2225 */
2226
2227 struct iwl_scan_channel {
2228 /*
2229 * type is defined as:
2230 * 0:0 1 = active, 0 = passive
2231 * 1:20 SSID direct bit map; if a bit is set, then corresponding
2232 * SSID IE is transmitted in probe request.
2233 * 21:31 reserved
2234 */
2235 __le32 type;
2236 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2237 u8 tx_gain; /* gain for analog radio */
2238 u8 dsp_atten; /* gain for DSP */
2239 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2240 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
2241 } __packed;
2242
2243 /* set number of direct probes __le32 type */
2244 #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2245
2246 /**
2247 * struct iwl_ssid_ie - directed scan network information element
2248 *
2249 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2250 * selected by "type" bit field in struct iwl_scan_channel;
2251 * each channel may select different ssids from among the 20 entries.
2252 * SSID IEs get transmitted in reverse order of entry.
2253 */
2254 struct iwl_ssid_ie {
2255 u8 id;
2256 u8 len;
2257 u8 ssid[32];
2258 } __packed;
2259
2260 #define PROBE_OPTION_MAX 20
2261 #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2262 #define IWL_GOOD_CRC_TH_DISABLED 0
2263 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2264 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
2265 #define IWL_MAX_SCAN_SIZE 1024
2266 #define IWL_MAX_CMD_SIZE 4096
2267
2268 /*
2269 * REPLY_SCAN_CMD = 0x80 (command)
2270 *
2271 * The hardware scan command is very powerful; the driver can set it up to
2272 * maintain (relatively) normal network traffic while doing a scan in the
2273 * background. The max_out_time and suspend_time control the ratio of how
2274 * long the device stays on an associated network channel ("service channel")
2275 * vs. how long it's away from the service channel, i.e. tuned to other channels
2276 * for scanning.
2277 *
2278 * max_out_time is the max time off-channel (in usec), and suspend_time
2279 * is how long (in "extended beacon" format) that the scan is "suspended"
2280 * after returning to the service channel. That is, suspend_time is the
2281 * time that we stay on the service channel, doing normal work, between
2282 * scan segments. The driver may set these parameters differently to support
2283 * scanning when associated vs. not associated, and light vs. heavy traffic
2284 * loads when associated.
2285 *
2286 * After receiving this command, the device's scan engine does the following;
2287 *
2288 * 1) Sends SCAN_START notification to driver
2289 * 2) Checks to see if it has time to do scan for one channel
2290 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2291 * to tell AP that we're going off-channel
2292 * 4) Tunes to first channel in scan list, does active or passive scan
2293 * 5) Sends SCAN_RESULT notification to driver
2294 * 6) Checks to see if it has time to do scan on *next* channel in list
2295 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2296 * before max_out_time expires
2297 * 8) Returns to service channel
2298 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2299 * 10) Stays on service channel until suspend_time expires
2300 * 11) Repeats entire process 2-10 until list is complete
2301 * 12) Sends SCAN_COMPLETE notification
2302 *
2303 * For fast, efficient scans, the scan command also has support for staying on
2304 * a channel for just a short time, if doing active scanning and getting no
2305 * responses to the transmitted probe request. This time is controlled by
2306 * quiet_time, and the number of received packets below which a channel is
2307 * considered "quiet" is controlled by quiet_plcp_threshold.
2308 *
2309 * For active scanning on channels that have regulatory restrictions against
2310 * blindly transmitting, the scan can listen before transmitting, to make sure
2311 * that there is already legitimate activity on the channel. If enough
2312 * packets are cleanly received on the channel (controlled by good_CRC_th,
2313 * typical value 1), the scan engine starts transmitting probe requests.
2314 *
2315 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2316 *
2317 * To avoid uCode errors, see timing restrictions described under
2318 * struct iwl_scan_channel.
2319 */
2320
2321 enum iwl_scan_flags {
2322 /* BIT(0) currently unused */
2323 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2324 /* bits 2-7 reserved */
2325 };
2326
2327 struct iwl_scan_cmd {
2328 __le16 len;
2329 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
2330 u8 channel_count; /* # channels in channel list */
2331 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2332 * (only for active scan) */
2333 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2334 __le16 good_CRC_th; /* passive -> active promotion threshold */
2335 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2336 __le32 max_out_time; /* max usec to be away from associated (service)
2337 * channel */
2338 __le32 suspend_time; /* pause scan this long (in "extended beacon
2339 * format") when returning to service chnl:
2340 */
2341 __le32 flags; /* RXON_FLG_* */
2342 __le32 filter_flags; /* RXON_FILTER_* */
2343
2344 /* For active scans (set to all-0s for passive scans).
2345 * Does not include payload. Must specify Tx rate; no rate scaling. */
2346 struct iwl_tx_cmd tx_cmd;
2347
2348 /* For directed active scans (set to all-0s otherwise) */
2349 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2350
2351 /*
2352 * Probe request frame, followed by channel list.
2353 *
2354 * Size of probe request frame is specified by byte count in tx_cmd.
2355 * Channel list follows immediately after probe request frame.
2356 * Number of channels in list is specified by channel_count.
2357 * Each channel in list is of type:
2358 *
2359 * struct iwl_scan_channel channels[0];
2360 *
2361 * NOTE: Only one band of channels can be scanned per pass. You
2362 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2363 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2364 * before requesting another scan.
2365 */
2366 u8 data[0];
2367 } __packed;
2368
2369 /* Can abort will notify by complete notification with abort status. */
2370 #define CAN_ABORT_STATUS cpu_to_le32(0x1)
2371 /* complete notification statuses */
2372 #define ABORT_STATUS 0x2
2373
2374 /*
2375 * REPLY_SCAN_CMD = 0x80 (response)
2376 */
2377 struct iwl_scanreq_notification {
2378 __le32 status; /* 1: okay, 2: cannot fulfill request */
2379 } __packed;
2380
2381 /*
2382 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2383 */
2384 struct iwl_scanstart_notification {
2385 __le32 tsf_low;
2386 __le32 tsf_high;
2387 __le32 beacon_timer;
2388 u8 channel;
2389 u8 band;
2390 u8 reserved[2];
2391 __le32 status;
2392 } __packed;
2393
2394 #define SCAN_OWNER_STATUS 0x1
2395 #define MEASURE_OWNER_STATUS 0x2
2396
2397 #define IWL_PROBE_STATUS_OK 0
2398 #define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2399 /* error statuses combined with TX_FAILED */
2400 #define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2401 #define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2402
2403 #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2404 /*
2405 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2406 */
2407 struct iwl_scanresults_notification {
2408 u8 channel;
2409 u8 band;
2410 u8 probe_status;
2411 u8 num_probe_not_sent; /* not enough time to send */
2412 __le32 tsf_low;
2413 __le32 tsf_high;
2414 __le32 statistics[NUMBER_OF_STATISTICS];
2415 } __packed;
2416
2417 /*
2418 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2419 */
2420 struct iwl_scancomplete_notification {
2421 u8 scanned_channels;
2422 u8 status;
2423 u8 bt_status; /* BT On/Off status */
2424 u8 last_channel;
2425 __le32 tsf_low;
2426 __le32 tsf_high;
2427 } __packed;
2428
2429
2430 /******************************************************************************
2431 * (9)
2432 * IBSS/AP Commands and Notifications:
2433 *
2434 *****************************************************************************/
2435
2436 enum iwl_ibss_manager {
2437 IWL_NOT_IBSS_MANAGER = 0,
2438 IWL_IBSS_MANAGER = 1,
2439 };
2440
2441 /*
2442 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2443 */
2444
2445 struct iwlagn_beacon_notif {
2446 struct iwlagn_tx_resp beacon_notify_hdr;
2447 __le32 low_tsf;
2448 __le32 high_tsf;
2449 __le32 ibss_mgr_status;
2450 } __packed;
2451
2452 /*
2453 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2454 */
2455
2456 struct iwl_tx_beacon_cmd {
2457 struct iwl_tx_cmd tx;
2458 __le16 tim_idx;
2459 u8 tim_size;
2460 u8 reserved1;
2461 struct ieee80211_hdr frame[0]; /* beacon frame */
2462 } __packed;
2463
2464 /******************************************************************************
2465 * (10)
2466 * Statistics Commands and Notifications:
2467 *
2468 *****************************************************************************/
2469
2470 #define IWL_TEMP_CONVERT 260
2471
2472 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2473 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2474 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2475
2476 /* Used for passing to driver number of successes and failures per rate */
2477 struct rate_histogram {
2478 union {
2479 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2480 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2481 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2482 } success;
2483 union {
2484 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2485 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2486 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2487 } failed;
2488 } __packed;
2489
2490 /* statistics command response */
2491
2492 struct statistics_dbg {
2493 __le32 burst_check;
2494 __le32 burst_count;
2495 __le32 wait_for_silence_timeout_cnt;
2496 __le32 reserved[3];
2497 } __packed;
2498
2499 struct statistics_rx_phy {
2500 __le32 ina_cnt;
2501 __le32 fina_cnt;
2502 __le32 plcp_err;
2503 __le32 crc32_err;
2504 __le32 overrun_err;
2505 __le32 early_overrun_err;
2506 __le32 crc32_good;
2507 __le32 false_alarm_cnt;
2508 __le32 fina_sync_err_cnt;
2509 __le32 sfd_timeout;
2510 __le32 fina_timeout;
2511 __le32 unresponded_rts;
2512 __le32 rxe_frame_limit_overrun;
2513 __le32 sent_ack_cnt;
2514 __le32 sent_cts_cnt;
2515 __le32 sent_ba_rsp_cnt;
2516 __le32 dsp_self_kill;
2517 __le32 mh_format_err;
2518 __le32 re_acq_main_rssi_sum;
2519 __le32 reserved3;
2520 } __packed;
2521
2522 struct statistics_rx_ht_phy {
2523 __le32 plcp_err;
2524 __le32 overrun_err;
2525 __le32 early_overrun_err;
2526 __le32 crc32_good;
2527 __le32 crc32_err;
2528 __le32 mh_format_err;
2529 __le32 agg_crc32_good;
2530 __le32 agg_mpdu_cnt;
2531 __le32 agg_cnt;
2532 __le32 unsupport_mcs;
2533 } __packed;
2534
2535 #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
2536
2537 struct statistics_rx_non_phy {
2538 __le32 bogus_cts; /* CTS received when not expecting CTS */
2539 __le32 bogus_ack; /* ACK received when not expecting ACK */
2540 __le32 non_bssid_frames; /* number of frames with BSSID that
2541 * doesn't belong to the STA BSSID */
2542 __le32 filtered_frames; /* count frames that were dumped in the
2543 * filtering process */
2544 __le32 non_channel_beacons; /* beacons with our bss id but not on
2545 * our serving channel */
2546 __le32 channel_beacons; /* beacons with our bss id and in our
2547 * serving channel */
2548 __le32 num_missed_bcon; /* number of missed beacons */
2549 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2550 * ADC was in saturation */
2551 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2552 * for INA */
2553 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2554 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2555 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2556 __le32 interference_data_flag; /* flag for interference data
2557 * availability. 1 when data is
2558 * available. */
2559 __le32 channel_load; /* counts RX Enable time in uSec */
2560 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2561 * and CCK) counter */
2562 __le32 beacon_rssi_a;
2563 __le32 beacon_rssi_b;
2564 __le32 beacon_rssi_c;
2565 __le32 beacon_energy_a;
2566 __le32 beacon_energy_b;
2567 __le32 beacon_energy_c;
2568 } __packed;
2569
2570 struct statistics_rx_non_phy_bt {
2571 struct statistics_rx_non_phy common;
2572 /* additional stats for bt */
2573 __le32 num_bt_kills;
2574 __le32 reserved[2];
2575 } __packed;
2576
2577 struct statistics_rx {
2578 struct statistics_rx_phy ofdm;
2579 struct statistics_rx_phy cck;
2580 struct statistics_rx_non_phy general;
2581 struct statistics_rx_ht_phy ofdm_ht;
2582 } __packed;
2583
2584 struct statistics_rx_bt {
2585 struct statistics_rx_phy ofdm;
2586 struct statistics_rx_phy cck;
2587 struct statistics_rx_non_phy_bt general;
2588 struct statistics_rx_ht_phy ofdm_ht;
2589 } __packed;
2590
2591 /**
2592 * struct statistics_tx_power - current tx power
2593 *
2594 * @ant_a: current tx power on chain a in 1/2 dB step
2595 * @ant_b: current tx power on chain b in 1/2 dB step
2596 * @ant_c: current tx power on chain c in 1/2 dB step
2597 */
2598 struct statistics_tx_power {
2599 u8 ant_a;
2600 u8 ant_b;
2601 u8 ant_c;
2602 u8 reserved;
2603 } __packed;
2604
2605 struct statistics_tx_non_phy_agg {
2606 __le32 ba_timeout;
2607 __le32 ba_reschedule_frames;
2608 __le32 scd_query_agg_frame_cnt;
2609 __le32 scd_query_no_agg;
2610 __le32 scd_query_agg;
2611 __le32 scd_query_mismatch;
2612 __le32 frame_not_ready;
2613 __le32 underrun;
2614 __le32 bt_prio_kill;
2615 __le32 rx_ba_rsp_cnt;
2616 } __packed;
2617
2618 struct statistics_tx {
2619 __le32 preamble_cnt;
2620 __le32 rx_detected_cnt;
2621 __le32 bt_prio_defer_cnt;
2622 __le32 bt_prio_kill_cnt;
2623 __le32 few_bytes_cnt;
2624 __le32 cts_timeout;
2625 __le32 ack_timeout;
2626 __le32 expected_ack_cnt;
2627 __le32 actual_ack_cnt;
2628 __le32 dump_msdu_cnt;
2629 __le32 burst_abort_next_frame_mismatch_cnt;
2630 __le32 burst_abort_missing_next_frame_cnt;
2631 __le32 cts_timeout_collision;
2632 __le32 ack_or_ba_timeout_collision;
2633 struct statistics_tx_non_phy_agg agg;
2634 /*
2635 * "tx_power" are optional parameters provided by uCode,
2636 * 6000 series is the only device provide the information,
2637 * Those are reserved fields for all the other devices
2638 */
2639 struct statistics_tx_power tx_power;
2640 __le32 reserved1;
2641 } __packed;
2642
2643
2644 struct statistics_div {
2645 __le32 tx_on_a;
2646 __le32 tx_on_b;
2647 __le32 exec_time;
2648 __le32 probe_time;
2649 __le32 reserved1;
2650 __le32 reserved2;
2651 } __packed;
2652
2653 struct statistics_general_common {
2654 __le32 temperature; /* radio temperature */
2655 __le32 temperature_m; /* radio voltage */
2656 struct statistics_dbg dbg;
2657 __le32 sleep_time;
2658 __le32 slots_out;
2659 __le32 slots_idle;
2660 __le32 ttl_timestamp;
2661 struct statistics_div div;
2662 __le32 rx_enable_counter;
2663 /*
2664 * num_of_sos_states:
2665 * count the number of times we have to re-tune
2666 * in order to get out of bad PHY status
2667 */
2668 __le32 num_of_sos_states;
2669 } __packed;
2670
2671 struct statistics_bt_activity {
2672 /* Tx statistics */
2673 __le32 hi_priority_tx_req_cnt;
2674 __le32 hi_priority_tx_denied_cnt;
2675 __le32 lo_priority_tx_req_cnt;
2676 __le32 lo_priority_tx_denied_cnt;
2677 /* Rx statistics */
2678 __le32 hi_priority_rx_req_cnt;
2679 __le32 hi_priority_rx_denied_cnt;
2680 __le32 lo_priority_rx_req_cnt;
2681 __le32 lo_priority_rx_denied_cnt;
2682 } __packed;
2683
2684 struct statistics_general {
2685 struct statistics_general_common common;
2686 __le32 reserved2;
2687 __le32 reserved3;
2688 } __packed;
2689
2690 struct statistics_general_bt {
2691 struct statistics_general_common common;
2692 struct statistics_bt_activity activity;
2693 __le32 reserved2;
2694 __le32 reserved3;
2695 } __packed;
2696
2697 #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2698 #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2699 #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2700
2701 /*
2702 * REPLY_STATISTICS_CMD = 0x9c,
2703 * all devices identical.
2704 *
2705 * This command triggers an immediate response containing uCode statistics.
2706 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2707 *
2708 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2709 * internal copy of the statistics (counters) after issuing the response.
2710 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2711 *
2712 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2713 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2714 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2715 */
2716 #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2717 #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2718 struct iwl_statistics_cmd {
2719 __le32 configuration_flags; /* IWL_STATS_CONF_* */
2720 } __packed;
2721
2722 /*
2723 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2724 *
2725 * By default, uCode issues this notification after receiving a beacon
2726 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2727 * REPLY_STATISTICS_CMD 0x9c, above.
2728 *
2729 * Statistics counters continue to increment beacon after beacon, but are
2730 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2731 * 0x9c with CLEAR_STATS bit set (see above).
2732 *
2733 * uCode also issues this notification during scans. uCode clears statistics
2734 * appropriately so that each notification contains statistics for only the
2735 * one channel that has just been scanned.
2736 */
2737 #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
2738 #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
2739
2740 struct iwl_notif_statistics {
2741 __le32 flag;
2742 struct statistics_rx rx;
2743 struct statistics_tx tx;
2744 struct statistics_general general;
2745 } __packed;
2746
2747 struct iwl_bt_notif_statistics {
2748 __le32 flag;
2749 struct statistics_rx_bt rx;
2750 struct statistics_tx tx;
2751 struct statistics_general_bt general;
2752 } __packed;
2753
2754 /*
2755 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2756 *
2757 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2758 * in regardless of how many missed beacons, which mean when driver receive the
2759 * notification, inside the command, it can find all the beacons information
2760 * which include number of total missed beacons, number of consecutive missed
2761 * beacons, number of beacons received and number of beacons expected to
2762 * receive.
2763 *
2764 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2765 * in order to bring the radio/PHY back to working state; which has no relation
2766 * to when driver will perform sensitivity calibration.
2767 *
2768 * Driver should set it own missed_beacon_threshold to decide when to perform
2769 * sensitivity calibration based on number of consecutive missed beacons in
2770 * order to improve overall performance, especially in noisy environment.
2771 *
2772 */
2773
2774 #define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2775 #define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2776 #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2777
2778 struct iwl_missed_beacon_notif {
2779 __le32 consecutive_missed_beacons;
2780 __le32 total_missed_becons;
2781 __le32 num_expected_beacons;
2782 __le32 num_recvd_beacons;
2783 } __packed;
2784
2785
2786 /******************************************************************************
2787 * (11)
2788 * Rx Calibration Commands:
2789 *
2790 * With the uCode used for open source drivers, most Tx calibration (except
2791 * for Tx Power) and most Rx calibration is done by uCode during the
2792 * "initialize" phase of uCode boot. Driver must calibrate only:
2793 *
2794 * 1) Tx power (depends on temperature), described elsewhere
2795 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2796 * 3) Receiver sensitivity (to optimize signal detection)
2797 *
2798 *****************************************************************************/
2799
2800 /**
2801 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2802 *
2803 * This command sets up the Rx signal detector for a sensitivity level that
2804 * is high enough to lock onto all signals within the associated network,
2805 * but low enough to ignore signals that are below a certain threshold, so as
2806 * not to have too many "false alarms". False alarms are signals that the
2807 * Rx DSP tries to lock onto, but then discards after determining that they
2808 * are noise.
2809 *
2810 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2811 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2812 * time listening, not transmitting). Driver must adjust sensitivity so that
2813 * the ratio of actual false alarms to actual Rx time falls within this range.
2814 *
2815 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2816 * received beacon. These provide information to the driver to analyze the
2817 * sensitivity. Don't analyze statistics that come in from scanning, or any
2818 * other non-associated-network source. Pertinent statistics include:
2819 *
2820 * From "general" statistics (struct statistics_rx_non_phy):
2821 *
2822 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2823 * Measure of energy of desired signal. Used for establishing a level
2824 * below which the device does not detect signals.
2825 *
2826 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2827 * Measure of background noise in silent period after beacon.
2828 *
2829 * channel_load
2830 * uSecs of actual Rx time during beacon period (varies according to
2831 * how much time was spent transmitting).
2832 *
2833 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2834 *
2835 * false_alarm_cnt
2836 * Signal locks abandoned early (before phy-level header).
2837 *
2838 * plcp_err
2839 * Signal locks abandoned late (during phy-level header).
2840 *
2841 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2842 * beacon to beacon, i.e. each value is an accumulation of all errors
2843 * before and including the latest beacon. Values will wrap around to 0
2844 * after counting up to 2^32 - 1. Driver must differentiate vs.
2845 * previous beacon's values to determine # false alarms in the current
2846 * beacon period.
2847 *
2848 * Total number of false alarms = false_alarms + plcp_errs
2849 *
2850 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2851 * (notice that the start points for OFDM are at or close to settings for
2852 * maximum sensitivity):
2853 *
2854 * START / MIN / MAX
2855 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2856 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2857 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2858 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2859 *
2860 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2861 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2862 * by *adding* 1 to all 4 of the table entries above, up to the max for
2863 * each entry. Conversely, if false alarm rate is too low (less than 5
2864 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2865 * increase sensitivity.
2866 *
2867 * For CCK sensitivity, keep track of the following:
2868 *
2869 * 1). 20-beacon history of maximum background noise, indicated by
2870 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2871 * 3 receivers. For any given beacon, the "silence reference" is
2872 * the maximum of last 60 samples (20 beacons * 3 receivers).
2873 *
2874 * 2). 10-beacon history of strongest signal level, as indicated
2875 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2876 * i.e. the strength of the signal through the best receiver at the
2877 * moment. These measurements are "upside down", with lower values
2878 * for stronger signals, so max energy will be *minimum* value.
2879 *
2880 * Then for any given beacon, the driver must determine the *weakest*
2881 * of the strongest signals; this is the minimum level that needs to be
2882 * successfully detected, when using the best receiver at the moment.
2883 * "Max cck energy" is the maximum (higher value means lower energy!)
2884 * of the last 10 minima. Once this is determined, driver must add
2885 * a little margin by adding "6" to it.
2886 *
2887 * 3). Number of consecutive beacon periods with too few false alarms.
2888 * Reset this to 0 at the first beacon period that falls within the
2889 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2890 *
2891 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2892 * (notice that the start points for CCK are at maximum sensitivity):
2893 *
2894 * START / MIN / MAX
2895 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2896 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2897 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2898 *
2899 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2900 * (greater than 50 for each 204.8 msecs listening), method for reducing
2901 * sensitivity is:
2902 *
2903 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2904 * up to max 400.
2905 *
2906 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2907 * sensitivity has been reduced a significant amount; bring it up to
2908 * a moderate 161. Otherwise, *add* 3, up to max 200.
2909 *
2910 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2911 * sensitivity has been reduced only a moderate or small amount;
2912 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2913 * down to min 0. Otherwise (if gain has been significantly reduced),
2914 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2915 *
2916 * b) Save a snapshot of the "silence reference".
2917 *
2918 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2919 * (less than 5 for each 204.8 msecs listening), method for increasing
2920 * sensitivity is used only if:
2921 *
2922 * 1a) Previous beacon did not have too many false alarms
2923 * 1b) AND difference between previous "silence reference" and current
2924 * "silence reference" (prev - current) is 2 or more,
2925 * OR 2) 100 or more consecutive beacon periods have had rate of
2926 * less than 5 false alarms per 204.8 milliseconds rx time.
2927 *
2928 * Method for increasing sensitivity:
2929 *
2930 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2931 * down to min 125.
2932 *
2933 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2934 * down to min 200.
2935 *
2936 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2937 *
2938 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
2939 * (between 5 and 50 for each 204.8 msecs listening):
2940 *
2941 * 1) Save a snapshot of the silence reference.
2942 *
2943 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
2944 * give some extra margin to energy threshold by *subtracting* 8
2945 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
2946 *
2947 * For all cases (too few, too many, good range), make sure that the CCK
2948 * detection threshold (energy) is below the energy level for robust
2949 * detection over the past 10 beacon periods, the "Max cck energy".
2950 * Lower values mean higher energy; this means making sure that the value
2951 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
2952 *
2953 */
2954
2955 /*
2956 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
2957 */
2958 #define HD_TABLE_SIZE (11) /* number of entries */
2959 #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
2960 #define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
2961 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
2962 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
2963 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
2964 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
2965 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
2966 #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
2967 #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
2968 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
2969 #define HD_OFDM_ENERGY_TH_IN_INDEX (10)
2970
2971 /*
2972 * Additional table entries in enhance SENSITIVITY_CMD
2973 */
2974 #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
2975 #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
2976 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
2977 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
2978 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
2979 #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
2980 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
2981 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
2982 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
2983 #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
2984 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
2985 #define HD_RESERVED (22)
2986
2987 /* number of entries for enhanced tbl */
2988 #define ENHANCE_HD_TABLE_SIZE (23)
2989
2990 /* number of additional entries for enhanced tbl */
2991 #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
2992
2993 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0)
2994 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0)
2995 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0)
2996 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668)
2997 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
2998 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486)
2999 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37)
3000 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853)
3001 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3002 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476)
3003 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99)
3004
3005 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1)
3006 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1)
3007 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1)
3008 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600)
3009 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40)
3010 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486)
3011 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45)
3012 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853)
3013 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60)
3014 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476)
3015 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99)
3016
3017
3018 /* Control field in struct iwl_sensitivity_cmd */
3019 #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3020 #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
3021
3022 /**
3023 * struct iwl_sensitivity_cmd
3024 * @control: (1) updates working table, (0) updates default table
3025 * @table: energy threshold values, use HD_* as index into table
3026 *
3027 * Always use "1" in "control" to update uCode's working table and DSP.
3028 */
3029 struct iwl_sensitivity_cmd {
3030 __le16 control; /* always use "1" */
3031 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
3032 } __packed;
3033
3034 /*
3035 *
3036 */
3037 struct iwl_enhance_sensitivity_cmd {
3038 __le16 control; /* always use "1" */
3039 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
3040 } __packed;
3041
3042
3043 /**
3044 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3045 *
3046 * This command sets the relative gains of agn device's 3 radio receiver chains.
3047 *
3048 * After the first association, driver should accumulate signal and noise
3049 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3050 * beacons from the associated network (don't collect statistics that come
3051 * in from scanning, or any other non-network source).
3052 *
3053 * DISCONNECTED ANTENNA:
3054 *
3055 * Driver should determine which antennas are actually connected, by comparing
3056 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3057 * following values over 20 beacons, one accumulator for each of the chains
3058 * a/b/c, from struct statistics_rx_non_phy:
3059 *
3060 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3061 *
3062 * Find the strongest signal from among a/b/c. Compare the other two to the
3063 * strongest. If any signal is more than 15 dB (times 20, unless you
3064 * divide the accumulated values by 20) below the strongest, the driver
3065 * considers that antenna to be disconnected, and should not try to use that
3066 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3067 * driver should declare the stronger one as connected, and attempt to use it
3068 * (A and B are the only 2 Tx chains!).
3069 *
3070 *
3071 * RX BALANCE:
3072 *
3073 * Driver should balance the 3 receivers (but just the ones that are connected
3074 * to antennas, see above) for gain, by comparing the average signal levels
3075 * detected during the silence after each beacon (background noise).
3076 * Accumulate (add) the following values over 20 beacons, one accumulator for
3077 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3078 *
3079 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3080 *
3081 * Find the weakest background noise level from among a/b/c. This Rx chain
3082 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3083 * finding noise difference:
3084 *
3085 * (accum_noise[i] - accum_noise[reference]) / 30
3086 *
3087 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3088 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3089 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3090 * and set bit 2 to indicate "reduce gain". The value for the reference
3091 * (weakest) chain should be "0".
3092 *
3093 * diff_gain_[abc] bit fields:
3094 * 2: (1) reduce gain, (0) increase gain
3095 * 1-0: amount of gain, units of 1.5 dB
3096 */
3097
3098 /* Phy calibration command for series */
3099 enum {
3100 IWL_PHY_CALIBRATE_DC_CMD = 8,
3101 IWL_PHY_CALIBRATE_LO_CMD = 9,
3102 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
3103 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3104 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3105 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
3106 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
3107 };
3108
3109 /* This enum defines the bitmap of various calibrations to enable in both
3110 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3111 */
3112 enum iwl_ucode_calib_cfg {
3113 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3114 IWL_CALIB_CFG_DC_IDX = BIT(1),
3115 IWL_CALIB_CFG_LO_IDX = BIT(2),
3116 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3117 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3118 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3119 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3120 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3121 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3122 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3123 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
3124 };
3125
3126 #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3127 IWL_CALIB_CFG_DC_IDX | \
3128 IWL_CALIB_CFG_LO_IDX | \
3129 IWL_CALIB_CFG_TX_IQ_IDX | \
3130 IWL_CALIB_CFG_RX_IQ_IDX | \
3131 IWL_CALIB_CFG_CRYSTAL_IDX)
3132
3133 #define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3134 IWL_CALIB_CFG_DC_IDX | \
3135 IWL_CALIB_CFG_LO_IDX | \
3136 IWL_CALIB_CFG_TX_IQ_IDX | \
3137 IWL_CALIB_CFG_RX_IQ_IDX | \
3138 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3139 IWL_CALIB_CFG_PAPD_IDX | \
3140 IWL_CALIB_CFG_TX_PWR_IDX | \
3141 IWL_CALIB_CFG_CRYSTAL_IDX)
3142
3143 #define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
3144
3145 struct iwl_calib_cfg_elmnt_s {
3146 __le32 is_enable;
3147 __le32 start;
3148 __le32 send_res;
3149 __le32 apply_res;
3150 __le32 reserved;
3151 } __packed;
3152
3153 struct iwl_calib_cfg_status_s {
3154 struct iwl_calib_cfg_elmnt_s once;
3155 struct iwl_calib_cfg_elmnt_s perd;
3156 __le32 flags;
3157 } __packed;
3158
3159 struct iwl_calib_cfg_cmd {
3160 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3161 struct iwl_calib_cfg_status_s drv_calib_cfg;
3162 __le32 reserved1;
3163 } __packed;
3164
3165 struct iwl_calib_hdr {
3166 u8 op_code;
3167 u8 first_group;
3168 u8 groups_num;
3169 u8 data_valid;
3170 } __packed;
3171
3172 struct iwl_calib_cmd {
3173 struct iwl_calib_hdr hdr;
3174 u8 data[0];
3175 } __packed;
3176
3177 struct iwl_calib_xtal_freq_cmd {
3178 struct iwl_calib_hdr hdr;
3179 u8 cap_pin1;
3180 u8 cap_pin2;
3181 u8 pad[2];
3182 } __packed;
3183
3184 #define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
3185 struct iwl_calib_temperature_offset_cmd {
3186 struct iwl_calib_hdr hdr;
3187 __le16 radio_sensor_offset;
3188 __le16 reserved;
3189 } __packed;
3190
3191 struct iwl_calib_temperature_offset_v2_cmd {
3192 struct iwl_calib_hdr hdr;
3193 __le16 radio_sensor_offset_high;
3194 __le16 radio_sensor_offset_low;
3195 __le16 burntVoltageRef;
3196 __le16 reserved;
3197 } __packed;
3198
3199 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3200 struct iwl_calib_chain_noise_reset_cmd {
3201 struct iwl_calib_hdr hdr;
3202 u8 data[0];
3203 };
3204
3205 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3206 struct iwl_calib_chain_noise_gain_cmd {
3207 struct iwl_calib_hdr hdr;
3208 u8 delta_gain_1;
3209 u8 delta_gain_2;
3210 u8 pad[2];
3211 } __packed;
3212
3213 /******************************************************************************
3214 * (12)
3215 * Miscellaneous Commands:
3216 *
3217 *****************************************************************************/
3218
3219 /*
3220 * LEDs Command & Response
3221 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3222 *
3223 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3224 * this command turns it on or off, or sets up a periodic blinking cycle.
3225 */
3226 struct iwl_led_cmd {
3227 __le32 interval; /* "interval" in uSec */
3228 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3229 u8 off; /* # intervals off while blinking;
3230 * "0", with >0 "on" value, turns LED on */
3231 u8 on; /* # intervals on while blinking;
3232 * "0", regardless of "off", turns LED off */
3233 u8 reserved;
3234 } __packed;
3235
3236 /*
3237 * station priority table entries
3238 * also used as potential "events" value for both
3239 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3240 */
3241
3242 /*
3243 * COEX events entry flag masks
3244 * RP - Requested Priority
3245 * WP - Win Medium Priority: priority assigned when the contention has been won
3246 */
3247 #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3248 #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3249 #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3250
3251 #define COEX_CU_UNASSOC_IDLE_RP 4
3252 #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3253 #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3254 #define COEX_CU_CALIBRATION_RP 4
3255 #define COEX_CU_PERIODIC_CALIBRATION_RP 4
3256 #define COEX_CU_CONNECTION_ESTAB_RP 4
3257 #define COEX_CU_ASSOCIATED_IDLE_RP 4
3258 #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3259 #define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3260 #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3261 #define COEX_CU_RF_ON_RP 6
3262 #define COEX_CU_RF_OFF_RP 4
3263 #define COEX_CU_STAND_ALONE_DEBUG_RP 6
3264 #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3265 #define COEX_CU_RSRVD1_RP 4
3266 #define COEX_CU_RSRVD2_RP 4
3267
3268 #define COEX_CU_UNASSOC_IDLE_WP 3
3269 #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3270 #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3271 #define COEX_CU_CALIBRATION_WP 3
3272 #define COEX_CU_PERIODIC_CALIBRATION_WP 3
3273 #define COEX_CU_CONNECTION_ESTAB_WP 3
3274 #define COEX_CU_ASSOCIATED_IDLE_WP 3
3275 #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3276 #define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3277 #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3278 #define COEX_CU_RF_ON_WP 3
3279 #define COEX_CU_RF_OFF_WP 3
3280 #define COEX_CU_STAND_ALONE_DEBUG_WP 6
3281 #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3282 #define COEX_CU_RSRVD1_WP 3
3283 #define COEX_CU_RSRVD2_WP 3
3284
3285 #define COEX_UNASSOC_IDLE_FLAGS 0
3286 #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3287 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3288 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3289 #define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3290 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3291 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3292 #define COEX_CALIBRATION_FLAGS \
3293 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3294 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3295 #define COEX_PERIODIC_CALIBRATION_FLAGS 0
3296 /*
3297 * COEX_CONNECTION_ESTAB:
3298 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3299 */
3300 #define COEX_CONNECTION_ESTAB_FLAGS \
3301 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3302 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3303 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3304 #define COEX_ASSOCIATED_IDLE_FLAGS 0
3305 #define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3306 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3307 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3308 #define COEX_ASSOC_AUTO_SCAN_FLAGS \
3309 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3310 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3311 #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3312 #define COEX_RF_ON_FLAGS 0
3313 #define COEX_RF_OFF_FLAGS 0
3314 #define COEX_STAND_ALONE_DEBUG_FLAGS \
3315 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3316 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3317 #define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3318 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3319 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3320 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3321 #define COEX_RSRVD1_FLAGS 0
3322 #define COEX_RSRVD2_FLAGS 0
3323 /*
3324 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3325 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3326 */
3327 #define COEX_CU_RF_ON_FLAGS \
3328 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3329 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3330 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3331
3332
3333 enum {
3334 /* un-association part */
3335 COEX_UNASSOC_IDLE = 0,
3336 COEX_UNASSOC_MANUAL_SCAN = 1,
3337 COEX_UNASSOC_AUTO_SCAN = 2,
3338 /* calibration */
3339 COEX_CALIBRATION = 3,
3340 COEX_PERIODIC_CALIBRATION = 4,
3341 /* connection */
3342 COEX_CONNECTION_ESTAB = 5,
3343 /* association part */
3344 COEX_ASSOCIATED_IDLE = 6,
3345 COEX_ASSOC_MANUAL_SCAN = 7,
3346 COEX_ASSOC_AUTO_SCAN = 8,
3347 COEX_ASSOC_ACTIVE_LEVEL = 9,
3348 /* RF ON/OFF */
3349 COEX_RF_ON = 10,
3350 COEX_RF_OFF = 11,
3351 COEX_STAND_ALONE_DEBUG = 12,
3352 /* IPAN */
3353 COEX_IPAN_ASSOC_LEVEL = 13,
3354 /* reserved */
3355 COEX_RSRVD1 = 14,
3356 COEX_RSRVD2 = 15,
3357 COEX_NUM_OF_EVENTS = 16
3358 };
3359
3360 /*
3361 * Coexistence WIFI/WIMAX Command
3362 * COEX_PRIORITY_TABLE_CMD = 0x5a
3363 *
3364 */
3365 struct iwl_wimax_coex_event_entry {
3366 u8 request_prio;
3367 u8 win_medium_prio;
3368 u8 reserved;
3369 u8 flags;
3370 } __packed;
3371
3372 /* COEX flag masks */
3373
3374 /* Station table is valid */
3375 #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
3376 /* UnMask wake up src at unassociated sleep */
3377 #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
3378 /* UnMask wake up src at associated sleep */
3379 #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3380 /* Enable CoEx feature. */
3381 #define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3382
3383 struct iwl_wimax_coex_cmd {
3384 u8 flags;
3385 u8 reserved[3];
3386 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3387 } __packed;
3388
3389 /*
3390 * Coexistence MEDIUM NOTIFICATION
3391 * COEX_MEDIUM_NOTIFICATION = 0x5b
3392 *
3393 * notification from uCode to host to indicate medium changes
3394 *
3395 */
3396 /*
3397 * status field
3398 * bit 0 - 2: medium status
3399 * bit 3: medium change indication
3400 * bit 4 - 31: reserved
3401 */
3402 /* status option values, (0 - 2 bits) */
3403 #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3404 #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3405 #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3406 #define COEX_MEDIUM_MSK (0x7)
3407
3408 /* send notification status (1 bit) */
3409 #define COEX_MEDIUM_CHANGED (0x8)
3410 #define COEX_MEDIUM_CHANGED_MSK (0x8)
3411 #define COEX_MEDIUM_SHIFT (3)
3412
3413 struct iwl_coex_medium_notification {
3414 __le32 status;
3415 __le32 events;
3416 } __packed;
3417
3418 /*
3419 * Coexistence EVENT Command
3420 * COEX_EVENT_CMD = 0x5c
3421 *
3422 * send from host to uCode for coex event request.
3423 */
3424 /* flags options */
3425 #define COEX_EVENT_REQUEST_MSK (0x1)
3426
3427 struct iwl_coex_event_cmd {
3428 u8 flags;
3429 u8 event;
3430 __le16 reserved;
3431 } __packed;
3432
3433 struct iwl_coex_event_resp {
3434 __le32 status;
3435 } __packed;
3436
3437
3438 /******************************************************************************
3439 * Bluetooth Coexistence commands
3440 *
3441 *****************************************************************************/
3442
3443 /*
3444 * BT Status notification
3445 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3446 */
3447 enum iwl_bt_coex_profile_traffic_load {
3448 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3449 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3450 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3451 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3452 /*
3453 * There are no more even though below is a u8, the
3454 * indication from the BT device only has two bits.
3455 */
3456 };
3457
3458 #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3459 #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3460
3461 /* BT UART message - Share Part (BT -> WiFi) */
3462 #define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3463 #define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3464 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3465 #define BT_UART_MSG_FRAME1SSN_POS (3)
3466 #define BT_UART_MSG_FRAME1SSN_MSK \
3467 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3468 #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3469 #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3470 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3471 #define BT_UART_MSG_FRAME1RESERVED_POS (6)
3472 #define BT_UART_MSG_FRAME1RESERVED_MSK \
3473 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3474
3475 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3476 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3477 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3478 #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3479 #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3480 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3481 #define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3482 #define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3483 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3484 #define BT_UART_MSG_FRAME2INBAND_POS (5)
3485 #define BT_UART_MSG_FRAME2INBAND_MSK \
3486 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3487 #define BT_UART_MSG_FRAME2RESERVED_POS (6)
3488 #define BT_UART_MSG_FRAME2RESERVED_MSK \
3489 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3490
3491 #define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3492 #define BT_UART_MSG_FRAME3SCOESCO_MSK \
3493 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3494 #define BT_UART_MSG_FRAME3SNIFF_POS (1)
3495 #define BT_UART_MSG_FRAME3SNIFF_MSK \
3496 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3497 #define BT_UART_MSG_FRAME3A2DP_POS (2)
3498 #define BT_UART_MSG_FRAME3A2DP_MSK \
3499 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3500 #define BT_UART_MSG_FRAME3ACL_POS (3)
3501 #define BT_UART_MSG_FRAME3ACL_MSK \
3502 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3503 #define BT_UART_MSG_FRAME3MASTER_POS (4)
3504 #define BT_UART_MSG_FRAME3MASTER_MSK \
3505 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3506 #define BT_UART_MSG_FRAME3OBEX_POS (5)
3507 #define BT_UART_MSG_FRAME3OBEX_MSK \
3508 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3509 #define BT_UART_MSG_FRAME3RESERVED_POS (6)
3510 #define BT_UART_MSG_FRAME3RESERVED_MSK \
3511 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3512
3513 #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3514 #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3515 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3516 #define BT_UART_MSG_FRAME4RESERVED_POS (6)
3517 #define BT_UART_MSG_FRAME4RESERVED_MSK \
3518 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3519
3520 #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3521 #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3522 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3523 #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3524 #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3525 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3526 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3527 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3528 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3529 #define BT_UART_MSG_FRAME5RESERVED_POS (6)
3530 #define BT_UART_MSG_FRAME5RESERVED_MSK \
3531 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3532
3533 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3534 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3535 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3536 #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3537 #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3538 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3539 #define BT_UART_MSG_FRAME6RESERVED_POS (6)
3540 #define BT_UART_MSG_FRAME6RESERVED_MSK \
3541 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3542
3543 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3544 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3545 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3546 #define BT_UART_MSG_FRAME7PAGE_POS (3)
3547 #define BT_UART_MSG_FRAME7PAGE_MSK \
3548 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3549 #define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3550 #define BT_UART_MSG_FRAME7INQUIRY_MSK \
3551 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3552 #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3553 #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3554 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3555 #define BT_UART_MSG_FRAME7RESERVED_POS (6)
3556 #define BT_UART_MSG_FRAME7RESERVED_MSK \
3557 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3558
3559 /* BT Session Activity 2 UART message (BT -> WiFi) */
3560 #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3561 #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3562 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3563 #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3564 #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3565 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3566
3567 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3568 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3569 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3570 #define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3571 #define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3572 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3573
3574 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3575 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3576 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3577 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3578 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3579 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3580 #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3581 #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3582 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3583 #define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3584 #define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3585 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3586
3587 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3588 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3589 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3590 #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3591 #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3592 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3593 #define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3594 #define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3595 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3596
3597 #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3598 #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3599 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3600 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3601 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3602 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3603 #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3604 #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3605 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3606 #define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3607 #define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3608 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3609
3610 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3611 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3612 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3613 #define BT_UART_MSG_2_FRAME6RFU_POS (5)
3614 #define BT_UART_MSG_2_FRAME6RFU_MSK \
3615 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3616 #define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3617 #define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3618 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3619
3620 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3621 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3622 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3623 #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3624 #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3625 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3626 #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3627 #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3628 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3629 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3630 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3631 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3632 #define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3633 #define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3634 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3635
3636
3637 struct iwl_bt_uart_msg {
3638 u8 header;
3639 u8 frame1;
3640 u8 frame2;
3641 u8 frame3;
3642 u8 frame4;
3643 u8 frame5;
3644 u8 frame6;
3645 u8 frame7;
3646 } __attribute__((packed));
3647
3648 struct iwl_bt_coex_profile_notif {
3649 struct iwl_bt_uart_msg last_bt_uart_msg;
3650 u8 bt_status; /* 0 - off, 1 - on */
3651 u8 bt_traffic_load; /* 0 .. 3? */
3652 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3653 u8 reserved;
3654 } __attribute__((packed));
3655
3656 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3657 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3658 #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3659 #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3660 #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3661 #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3662 #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
3663
3664 /*
3665 * BT Coexistence Priority table
3666 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3667 */
3668 enum bt_coex_prio_table_events {
3669 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3670 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3671 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3672 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3673 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3674 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3675 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3676 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3677 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3678 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3679 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3680 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3681 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3682 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3683 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3684 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3685 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3686 BT_COEX_PRIO_TBL_EVT_MAX,
3687 };
3688
3689 enum bt_coex_prio_table_priorities {
3690 BT_COEX_PRIO_TBL_DISABLED = 0,
3691 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3692 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3693 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3694 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3695 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3696 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3697 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3698 BT_COEX_PRIO_TBL_MAX,
3699 };
3700
3701 struct iwl_bt_coex_prio_table_cmd {
3702 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3703 } __attribute__((packed));
3704
3705 #define IWL_BT_COEX_ENV_CLOSE 0
3706 #define IWL_BT_COEX_ENV_OPEN 1
3707 /*
3708 * BT Protection Envelope
3709 * REPLY_BT_COEX_PROT_ENV = 0xcd
3710 */
3711 struct iwl_bt_coex_prot_env_cmd {
3712 u8 action; /* 0 = closed, 1 = open */
3713 u8 type; /* 0 .. 15 */
3714 u8 reserved[2];
3715 } __attribute__((packed));
3716
3717 /*
3718 * REPLY_D3_CONFIG
3719 */
3720 enum iwlagn_d3_wakeup_filters {
3721 IWLAGN_D3_WAKEUP_RFKILL = BIT(0),
3722 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1),
3723 };
3724
3725 struct iwlagn_d3_config_cmd {
3726 __le32 min_sleep_time;
3727 __le32 wakeup_flags;
3728 } __packed;
3729
3730 /*
3731 * REPLY_WOWLAN_PATTERNS
3732 */
3733 #define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16
3734 #define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128
3735
3736 struct iwlagn_wowlan_pattern {
3737 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3738 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3739 u8 mask_size;
3740 u8 pattern_size;
3741 __le16 reserved;
3742 } __packed;
3743
3744 #define IWLAGN_WOWLAN_MAX_PATTERNS 20
3745
3746 struct iwlagn_wowlan_patterns_cmd {
3747 __le32 n_patterns;
3748 struct iwlagn_wowlan_pattern patterns[];
3749 } __packed;
3750
3751 /*
3752 * REPLY_WOWLAN_WAKEUP_FILTER
3753 */
3754 enum iwlagn_wowlan_wakeup_filters {
3755 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0),
3756 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1),
3757 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2),
3758 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3),
3759 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4),
3760 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5),
3761 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6),
3762 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7),
3763 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8),
3764 };
3765
3766 struct iwlagn_wowlan_wakeup_filter_cmd {
3767 __le32 enabled;
3768 __le16 non_qos_seq;
3769 __le16 reserved;
3770 __le16 qos_seq[8];
3771 };
3772
3773 /*
3774 * REPLY_WOWLAN_TSC_RSC_PARAMS
3775 */
3776 #define IWLAGN_NUM_RSC 16
3777
3778 struct tkip_sc {
3779 __le16 iv16;
3780 __le16 pad;
3781 __le32 iv32;
3782 } __packed;
3783
3784 struct iwlagn_tkip_rsc_tsc {
3785 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3786 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3787 struct tkip_sc tsc;
3788 } __packed;
3789
3790 struct aes_sc {
3791 __le64 pn;
3792 } __packed;
3793
3794 struct iwlagn_aes_rsc_tsc {
3795 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3796 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3797 struct aes_sc tsc;
3798 } __packed;
3799
3800 union iwlagn_all_tsc_rsc {
3801 struct iwlagn_tkip_rsc_tsc tkip;
3802 struct iwlagn_aes_rsc_tsc aes;
3803 };
3804
3805 struct iwlagn_wowlan_rsc_tsc_params_cmd {
3806 union iwlagn_all_tsc_rsc all_tsc_rsc;
3807 } __packed;
3808
3809 /*
3810 * REPLY_WOWLAN_TKIP_PARAMS
3811 */
3812 #define IWLAGN_MIC_KEY_SIZE 8
3813 #define IWLAGN_P1K_SIZE 5
3814 struct iwlagn_mic_keys {
3815 u8 tx[IWLAGN_MIC_KEY_SIZE];
3816 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3817 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3818 } __packed;
3819
3820 struct iwlagn_p1k_cache {
3821 __le16 p1k[IWLAGN_P1K_SIZE];
3822 } __packed;
3823
3824 #define IWLAGN_NUM_RX_P1K_CACHE 2
3825
3826 struct iwlagn_wowlan_tkip_params_cmd {
3827 struct iwlagn_mic_keys mic_keys;
3828 struct iwlagn_p1k_cache tx;
3829 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3830 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3831 } __packed;
3832
3833 /*
3834 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3835 */
3836
3837 #define IWLAGN_KCK_MAX_SIZE 32
3838 #define IWLAGN_KEK_MAX_SIZE 32
3839
3840 struct iwlagn_wowlan_kek_kck_material_cmd {
3841 u8 kck[IWLAGN_KCK_MAX_SIZE];
3842 u8 kek[IWLAGN_KEK_MAX_SIZE];
3843 __le16 kck_len;
3844 __le16 kek_len;
3845 __le64 replay_ctr;
3846 } __packed;
3847
3848 /*
3849 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3850 */
3851
3852 /*
3853 * Minimum slot time in TU
3854 */
3855 #define IWL_MIN_SLOT_TIME 20
3856
3857 /**
3858 * struct iwl_wipan_slot
3859 * @width: Time in TU
3860 * @type:
3861 * 0 - BSS
3862 * 1 - PAN
3863 */
3864 struct iwl_wipan_slot {
3865 __le16 width;
3866 u8 type;
3867 u8 reserved;
3868 } __packed;
3869
3870 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3871 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3872 #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3873 #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3874 #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3875
3876 /**
3877 * struct iwl_wipan_params_cmd
3878 * @flags:
3879 * bit0: reserved
3880 * bit1: CP leave channel with CTS
3881 * bit2: CP leave channel qith Quiet
3882 * bit3: slotted mode
3883 * 1 - work in slotted mode
3884 * 0 - work in non slotted mode
3885 * bit4: filter beacon notification
3886 * bit5: full tx slotted mode. if this flag is set,
3887 * uCode will perform leaving channel methods in context switch
3888 * also when working in same channel mode
3889 * @num_slots: 1 - 10
3890 */
3891 struct iwl_wipan_params_cmd {
3892 __le16 flags;
3893 u8 reserved;
3894 u8 num_slots;
3895 struct iwl_wipan_slot slots[10];
3896 } __packed;
3897
3898 /*
3899 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3900 *
3901 * TODO: Figure out what this is used for,
3902 * it can only switch between 2.4 GHz
3903 * channels!!
3904 */
3905
3906 struct iwl_wipan_p2p_channel_switch_cmd {
3907 __le16 channel;
3908 __le16 reserved;
3909 };
3910
3911 /*
3912 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3913 *
3914 * This is used by the device to notify us of the
3915 * NoA schedule it determined so we can forward it
3916 * to userspace for inclusion in probe responses.
3917 *
3918 * In beacons, the NoA schedule is simply appended
3919 * to the frame we give the device.
3920 */
3921
3922 struct iwl_wipan_noa_descriptor {
3923 u8 count;
3924 __le32 duration;
3925 __le32 interval;
3926 __le32 starttime;
3927 } __packed;
3928
3929 struct iwl_wipan_noa_attribute {
3930 u8 id;
3931 __le16 length;
3932 u8 index;
3933 u8 ct_window;
3934 struct iwl_wipan_noa_descriptor descr0, descr1;
3935 u8 reserved;
3936 } __packed;
3937
3938 struct iwl_wipan_noa_notification {
3939 u32 noa_active;
3940 struct iwl_wipan_noa_attribute noa_attribute;
3941 } __packed;
3942
3943 #endif /* __iwl_commands_h__ */