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[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlegacy / 4965.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/sched.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39
40 #include "common.h"
41 #include "4965.h"
42
43 /**
44 * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
45 * using sample data 100 bytes apart. If these sample points are good,
46 * it's a pretty good bet that everything between them is good, too.
47 */
48 static int
49 il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
50 {
51 u32 val;
52 int ret = 0;
53 u32 errcnt = 0;
54 u32 i;
55
56 D_INFO("ucode inst image size is %u\n", len);
57
58 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
59 /* read data comes through single port, auto-incr addr */
60 /* NOTE: Use the debugless read so we don't flood kernel log
61 * if IL_DL_IO is set */
62 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND);
63 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
64 if (val != le32_to_cpu(*image)) {
65 ret = -EIO;
66 errcnt++;
67 if (errcnt >= 3)
68 break;
69 }
70 }
71
72 return ret;
73 }
74
75 /**
76 * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
77 * looking at all data.
78 */
79 static int
80 il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
81 {
82 u32 val;
83 u32 save_len = len;
84 int ret = 0;
85 u32 errcnt;
86
87 D_INFO("ucode inst image size is %u\n", len);
88
89 il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND);
90
91 errcnt = 0;
92 for (; len > 0; len -= sizeof(u32), image++) {
93 /* read data comes through single port, auto-incr addr */
94 /* NOTE: Use the debugless read so we don't flood kernel log
95 * if IL_DL_IO is set */
96 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
97 if (val != le32_to_cpu(*image)) {
98 IL_ERR("uCode INST section is invalid at "
99 "offset 0x%x, is 0x%x, s/b 0x%x\n",
100 save_len - len, val, le32_to_cpu(*image));
101 ret = -EIO;
102 errcnt++;
103 if (errcnt >= 20)
104 break;
105 }
106 }
107
108 if (!errcnt)
109 D_INFO("ucode image in INSTRUCTION memory is good\n");
110
111 return ret;
112 }
113
114 /**
115 * il4965_verify_ucode - determine which instruction image is in SRAM,
116 * and verify its contents
117 */
118 int
119 il4965_verify_ucode(struct il_priv *il)
120 {
121 __le32 *image;
122 u32 len;
123 int ret;
124
125 /* Try bootstrap */
126 image = (__le32 *) il->ucode_boot.v_addr;
127 len = il->ucode_boot.len;
128 ret = il4965_verify_inst_sparse(il, image, len);
129 if (!ret) {
130 D_INFO("Bootstrap uCode is good in inst SRAM\n");
131 return 0;
132 }
133
134 /* Try initialize */
135 image = (__le32 *) il->ucode_init.v_addr;
136 len = il->ucode_init.len;
137 ret = il4965_verify_inst_sparse(il, image, len);
138 if (!ret) {
139 D_INFO("Initialize uCode is good in inst SRAM\n");
140 return 0;
141 }
142
143 /* Try runtime/protocol */
144 image = (__le32 *) il->ucode_code.v_addr;
145 len = il->ucode_code.len;
146 ret = il4965_verify_inst_sparse(il, image, len);
147 if (!ret) {
148 D_INFO("Runtime uCode is good in inst SRAM\n");
149 return 0;
150 }
151
152 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
153
154 /* Since nothing seems to match, show first several data entries in
155 * instruction SRAM, so maybe visual inspection will give a clue.
156 * Selection of bootstrap image (vs. other images) is arbitrary. */
157 image = (__le32 *) il->ucode_boot.v_addr;
158 len = il->ucode_boot.len;
159 ret = il4965_verify_inst_full(il, image, len);
160
161 return ret;
162 }
163
164 /******************************************************************************
165 *
166 * EEPROM related functions
167 *
168 ******************************************************************************/
169
170 /*
171 * The device's EEPROM semaphore prevents conflicts between driver and uCode
172 * when accessing the EEPROM; each access is a series of pulses to/from the
173 * EEPROM chip, not a single event, so even reads could conflict if they
174 * weren't arbitrated by the semaphore.
175 */
176 int
177 il4965_eeprom_acquire_semaphore(struct il_priv *il)
178 {
179 u16 count;
180 int ret;
181
182 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
183 /* Request semaphore */
184 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
185 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
186
187 /* See if we got it */
188 ret =
189 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
190 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
191 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
192 EEPROM_SEM_TIMEOUT);
193 if (ret >= 0)
194 return ret;
195 }
196
197 return ret;
198 }
199
200 void
201 il4965_eeprom_release_semaphore(struct il_priv *il)
202 {
203 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
204 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
205
206 }
207
208 int
209 il4965_eeprom_check_version(struct il_priv *il)
210 {
211 u16 eeprom_ver;
212 u16 calib_ver;
213
214 eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
215 calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET);
216
217 if (eeprom_ver < il->cfg->eeprom_ver ||
218 calib_ver < il->cfg->eeprom_calib_ver)
219 goto err;
220
221 IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n", eeprom_ver, calib_ver);
222
223 return 0;
224 err:
225 IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x "
226 "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver,
227 calib_ver, il->cfg->eeprom_calib_ver);
228 return -EINVAL;
229
230 }
231
232 void
233 il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac)
234 {
235 const u8 *addr = il_eeprom_query_addr(il,
236 EEPROM_MAC_ADDRESS);
237 memcpy(mac, addr, ETH_ALEN);
238 }
239
240 /* Send led command */
241 static int
242 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
243 {
244 struct il_host_cmd cmd = {
245 .id = C_LEDS,
246 .len = sizeof(struct il_led_cmd),
247 .data = led_cmd,
248 .flags = CMD_ASYNC,
249 .callback = NULL,
250 };
251 u32 reg;
252
253 reg = _il_rd(il, CSR_LED_REG);
254 if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
255 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
256
257 return il_send_cmd(il, &cmd);
258 }
259
260 /* Set led register off */
261 void
262 il4965_led_enable(struct il_priv *il)
263 {
264 _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
265 }
266
267 const struct il_led_ops il4965_led_ops = {
268 .cmd = il4965_send_led_cmd,
269 };
270
271 static int il4965_send_tx_power(struct il_priv *il);
272 static int il4965_hw_get_temperature(struct il_priv *il);
273
274 /* Highest firmware API version supported */
275 #define IL4965_UCODE_API_MAX 2
276
277 /* Lowest firmware API version supported */
278 #define IL4965_UCODE_API_MIN 2
279
280 #define IL4965_FW_PRE "iwlwifi-4965-"
281 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
282 #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
283
284 /* check contents of special bootstrap uCode SRAM */
285 static int
286 il4965_verify_bsm(struct il_priv *il)
287 {
288 __le32 *image = il->ucode_boot.v_addr;
289 u32 len = il->ucode_boot.len;
290 u32 reg;
291 u32 val;
292
293 D_INFO("Begin verify bsm\n");
294
295 /* verify BSM SRAM contents */
296 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
297 for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len;
298 reg += sizeof(u32), image++) {
299 val = il_rd_prph(il, reg);
300 if (val != le32_to_cpu(*image)) {
301 IL_ERR("BSM uCode verification failed at "
302 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
303 BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND,
304 len, val, le32_to_cpu(*image));
305 return -EIO;
306 }
307 }
308
309 D_INFO("BSM bootstrap uCode image OK\n");
310
311 return 0;
312 }
313
314 /**
315 * il4965_load_bsm - Load bootstrap instructions
316 *
317 * BSM operation:
318 *
319 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
320 * in special SRAM that does not power down during RFKILL. When powering back
321 * up after power-saving sleeps (or during initial uCode load), the BSM loads
322 * the bootstrap program into the on-board processor, and starts it.
323 *
324 * The bootstrap program loads (via DMA) instructions and data for a new
325 * program from host DRAM locations indicated by the host driver in the
326 * BSM_DRAM_* registers. Once the new program is loaded, it starts
327 * automatically.
328 *
329 * When initializing the NIC, the host driver points the BSM to the
330 * "initialize" uCode image. This uCode sets up some internal data, then
331 * notifies host via "initialize alive" that it is complete.
332 *
333 * The host then replaces the BSM_DRAM_* pointer values to point to the
334 * normal runtime uCode instructions and a backup uCode data cache buffer
335 * (filled initially with starting data values for the on-board processor),
336 * then triggers the "initialize" uCode to load and launch the runtime uCode,
337 * which begins normal operation.
338 *
339 * When doing a power-save shutdown, runtime uCode saves data SRAM into
340 * the backup data cache in DRAM before SRAM is powered down.
341 *
342 * When powering back up, the BSM loads the bootstrap program. This reloads
343 * the runtime uCode instructions and the backup data cache into SRAM,
344 * and re-launches the runtime uCode from where it left off.
345 */
346 static int
347 il4965_load_bsm(struct il_priv *il)
348 {
349 __le32 *image = il->ucode_boot.v_addr;
350 u32 len = il->ucode_boot.len;
351 dma_addr_t pinst;
352 dma_addr_t pdata;
353 u32 inst_len;
354 u32 data_len;
355 int i;
356 u32 done;
357 u32 reg_offset;
358 int ret;
359
360 D_INFO("Begin load bsm\n");
361
362 il->ucode_type = UCODE_RT;
363
364 /* make sure bootstrap program is no larger than BSM's SRAM size */
365 if (len > IL49_MAX_BSM_SIZE)
366 return -EINVAL;
367
368 /* Tell bootstrap uCode where to find the "Initialize" uCode
369 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
370 * NOTE: il_init_alive_start() will replace these values,
371 * after the "initialize" uCode has run, to point to
372 * runtime/protocol instructions and backup data cache.
373 */
374 pinst = il->ucode_init.p_addr >> 4;
375 pdata = il->ucode_init_data.p_addr >> 4;
376 inst_len = il->ucode_init.len;
377 data_len = il->ucode_init_data.len;
378
379 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
380 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
381 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
382 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
383
384 /* Fill BSM memory with bootstrap instructions */
385 for (reg_offset = BSM_SRAM_LOWER_BOUND;
386 reg_offset < BSM_SRAM_LOWER_BOUND + len;
387 reg_offset += sizeof(u32), image++)
388 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
389
390 ret = il4965_verify_bsm(il);
391 if (ret)
392 return ret;
393
394 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
395 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
396 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
397 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
398
399 /* Load bootstrap code into instruction SRAM now,
400 * to prepare to load "initialize" uCode */
401 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
402
403 /* Wait for load of bootstrap uCode to finish */
404 for (i = 0; i < 100; i++) {
405 done = il_rd_prph(il, BSM_WR_CTRL_REG);
406 if (!(done & BSM_WR_CTRL_REG_BIT_START))
407 break;
408 udelay(10);
409 }
410 if (i < 100)
411 D_INFO("BSM write complete, poll %d iterations\n", i);
412 else {
413 IL_ERR("BSM write did not complete!\n");
414 return -EIO;
415 }
416
417 /* Enable future boot loads whenever power management unit triggers it
418 * (e.g. when powering back up after power-save shutdown) */
419 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
420
421 return 0;
422 }
423
424 /**
425 * il4965_set_ucode_ptrs - Set uCode address location
426 *
427 * Tell initialization uCode where to find runtime uCode.
428 *
429 * BSM registers initially contain pointers to initialization uCode.
430 * We need to replace them to load runtime uCode inst and data,
431 * and to save runtime data when powering down.
432 */
433 static int
434 il4965_set_ucode_ptrs(struct il_priv *il)
435 {
436 dma_addr_t pinst;
437 dma_addr_t pdata;
438 int ret = 0;
439
440 /* bits 35:4 for 4965 */
441 pinst = il->ucode_code.p_addr >> 4;
442 pdata = il->ucode_data_backup.p_addr >> 4;
443
444 /* Tell bootstrap uCode where to find image to load */
445 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
446 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
447 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
448
449 /* Inst byte count must be last to set up, bit 31 signals uCode
450 * that all new ptr/size info is in place */
451 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
452 il->ucode_code.len | BSM_DRAM_INST_LOAD);
453 D_INFO("Runtime uCode pointers are set.\n");
454
455 return ret;
456 }
457
458 /**
459 * il4965_init_alive_start - Called after N_ALIVE notification received
460 *
461 * Called after N_ALIVE notification received from "initialize" uCode.
462 *
463 * The 4965 "initialize" ALIVE reply contains calibration data for:
464 * Voltage, temperature, and MIMO tx gain correction, now stored in il
465 * (3945 does not contain this data).
466 *
467 * Tell "initialize" uCode to go ahead and load the runtime uCode.
468 */
469 static void
470 il4965_init_alive_start(struct il_priv *il)
471 {
472 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
473 * This is a paranoid check, because we would not have gotten the
474 * "initialize" alive if code weren't properly loaded. */
475 if (il4965_verify_ucode(il)) {
476 /* Runtime instruction load was bad;
477 * take it all the way back down so we can try again */
478 D_INFO("Bad \"initialize\" uCode load.\n");
479 goto restart;
480 }
481
482 /* Calculate temperature */
483 il->temperature = il4965_hw_get_temperature(il);
484
485 /* Send pointers to protocol/runtime uCode image ... init code will
486 * load and launch runtime uCode, which will send us another "Alive"
487 * notification. */
488 D_INFO("Initialization Alive received.\n");
489 if (il4965_set_ucode_ptrs(il)) {
490 /* Runtime instruction load won't happen;
491 * take it all the way back down so we can try again */
492 D_INFO("Couldn't set up uCode pointers.\n");
493 goto restart;
494 }
495 return;
496
497 restart:
498 queue_work(il->workqueue, &il->restart);
499 }
500
501 static bool
502 iw4965_is_ht40_channel(__le32 rxon_flags)
503 {
504 int chan_mod =
505 le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) >>
506 RXON_FLG_CHANNEL_MODE_POS;
507 return (chan_mod == CHANNEL_MODE_PURE_40 ||
508 chan_mod == CHANNEL_MODE_MIXED);
509 }
510
511 static void
512 il4965_nic_config(struct il_priv *il)
513 {
514 unsigned long flags;
515 u16 radio_cfg;
516
517 spin_lock_irqsave(&il->lock, flags);
518
519 radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
520
521 /* write radio config values to register */
522 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
523 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
524 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
525 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
526 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
527
528 /* set CSR_HW_CONFIG_REG for uCode use */
529 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
530 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
531 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
532
533 il->calib_info =
534 (struct il_eeprom_calib_info *)
535 il_eeprom_query_addr(il, EEPROM_4965_CALIB_TXPOWER_OFFSET);
536
537 spin_unlock_irqrestore(&il->lock, flags);
538 }
539
540 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
541 * Called after every association, but this runs only once!
542 * ... once chain noise is calibrated the first time, it's good forever. */
543 static void
544 il4965_chain_noise_reset(struct il_priv *il)
545 {
546 struct il_chain_noise_data *data = &(il->chain_noise_data);
547
548 if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) {
549 struct il_calib_diff_gain_cmd cmd;
550
551 /* clear data for chain noise calibration algorithm */
552 data->chain_noise_a = 0;
553 data->chain_noise_b = 0;
554 data->chain_noise_c = 0;
555 data->chain_signal_a = 0;
556 data->chain_signal_b = 0;
557 data->chain_signal_c = 0;
558 data->beacon_count = 0;
559
560 memset(&cmd, 0, sizeof(cmd));
561 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
562 cmd.diff_gain_a = 0;
563 cmd.diff_gain_b = 0;
564 cmd.diff_gain_c = 0;
565 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd))
566 IL_ERR("Could not send C_PHY_CALIBRATION\n");
567 data->state = IL_CHAIN_NOISE_ACCUMULATE;
568 D_CALIB("Run chain_noise_calibrate\n");
569 }
570 }
571
572 static struct il_sensitivity_ranges il4965_sensitivity = {
573 .min_nrg_cck = 97,
574 .max_nrg_cck = 0, /* not used, set to 0 */
575
576 .auto_corr_min_ofdm = 85,
577 .auto_corr_min_ofdm_mrc = 170,
578 .auto_corr_min_ofdm_x1 = 105,
579 .auto_corr_min_ofdm_mrc_x1 = 220,
580
581 .auto_corr_max_ofdm = 120,
582 .auto_corr_max_ofdm_mrc = 210,
583 .auto_corr_max_ofdm_x1 = 140,
584 .auto_corr_max_ofdm_mrc_x1 = 270,
585
586 .auto_corr_min_cck = 125,
587 .auto_corr_max_cck = 200,
588 .auto_corr_min_cck_mrc = 200,
589 .auto_corr_max_cck_mrc = 400,
590
591 .nrg_th_cck = 100,
592 .nrg_th_ofdm = 100,
593
594 .barker_corr_th_min = 190,
595 .barker_corr_th_min_mrc = 390,
596 .nrg_th_cca = 62,
597 };
598
599 static void
600 il4965_set_ct_threshold(struct il_priv *il)
601 {
602 /* want Kelvin */
603 il->hw_params.ct_kill_threshold =
604 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
605 }
606
607 /**
608 * il4965_hw_set_hw_params
609 *
610 * Called when initializing driver
611 */
612 static int
613 il4965_hw_set_hw_params(struct il_priv *il)
614 {
615 if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
616 il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
617 il->cfg->num_of_queues =
618 il->cfg->mod_params->num_of_queues;
619
620 il->hw_params.max_txq_num = il->cfg->num_of_queues;
621 il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
622 il->hw_params.scd_bc_tbls_size =
623 il->cfg->num_of_queues *
624 sizeof(struct il4965_scd_bc_tbl);
625 il->hw_params.tfd_size = sizeof(struct il_tfd);
626 il->hw_params.max_stations = IL4965_STATION_COUNT;
627 il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
628 il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
629 il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
630 il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
631
632 il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR;
633
634 il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
635 il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
636 il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
637 il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
638
639 il4965_set_ct_threshold(il);
640
641 il->hw_params.sens = &il4965_sensitivity;
642 il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
643
644 return 0;
645 }
646
647 static s32
648 il4965_math_div_round(s32 num, s32 denom, s32 * res)
649 {
650 s32 sign = 1;
651
652 if (num < 0) {
653 sign = -sign;
654 num = -num;
655 }
656 if (denom < 0) {
657 sign = -sign;
658 denom = -denom;
659 }
660 *res = 1;
661 *res = ((num * 2 + denom) / (denom * 2)) * sign;
662
663 return 1;
664 }
665
666 /**
667 * il4965_get_voltage_compensation - Power supply voltage comp for txpower
668 *
669 * Determines power supply voltage compensation for txpower calculations.
670 * Returns number of 1/2-dB steps to subtract from gain table idx,
671 * to compensate for difference between power supply voltage during
672 * factory measurements, vs. current power supply voltage.
673 *
674 * Voltage indication is higher for lower voltage.
675 * Lower voltage requires more gain (lower gain table idx).
676 */
677 static s32
678 il4965_get_voltage_compensation(s32 eeprom_voltage, s32 current_voltage)
679 {
680 s32 comp = 0;
681
682 if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
683 TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
684 return 0;
685
686 il4965_math_div_round(current_voltage - eeprom_voltage,
687 TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
688
689 if (current_voltage > eeprom_voltage)
690 comp *= 2;
691 if ((comp < -2) || (comp > 2))
692 comp = 0;
693
694 return comp;
695 }
696
697 static s32
698 il4965_get_tx_atten_grp(u16 channel)
699 {
700 if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
701 channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
702 return CALIB_CH_GROUP_5;
703
704 if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
705 channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
706 return CALIB_CH_GROUP_1;
707
708 if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
709 channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
710 return CALIB_CH_GROUP_2;
711
712 if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
713 channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
714 return CALIB_CH_GROUP_3;
715
716 if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
717 channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
718 return CALIB_CH_GROUP_4;
719
720 return -EINVAL;
721 }
722
723 static u32
724 il4965_get_sub_band(const struct il_priv *il, u32 channel)
725 {
726 s32 b = -1;
727
728 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
729 if (il->calib_info->band_info[b].ch_from == 0)
730 continue;
731
732 if (channel >= il->calib_info->band_info[b].ch_from &&
733 channel <= il->calib_info->band_info[b].ch_to)
734 break;
735 }
736
737 return b;
738 }
739
740 static s32
741 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
742 {
743 s32 val;
744
745 if (x2 == x1)
746 return y1;
747 else {
748 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
749 return val + y2;
750 }
751 }
752
753 /**
754 * il4965_interpolate_chan - Interpolate factory measurements for one channel
755 *
756 * Interpolates factory measurements from the two sample channels within a
757 * sub-band, to apply to channel of interest. Interpolation is proportional to
758 * differences in channel frequencies, which is proportional to differences
759 * in channel number.
760 */
761 static int
762 il4965_interpolate_chan(struct il_priv *il, u32 channel,
763 struct il_eeprom_calib_ch_info *chan_info)
764 {
765 s32 s = -1;
766 u32 c;
767 u32 m;
768 const struct il_eeprom_calib_measure *m1;
769 const struct il_eeprom_calib_measure *m2;
770 struct il_eeprom_calib_measure *omeas;
771 u32 ch_i1;
772 u32 ch_i2;
773
774 s = il4965_get_sub_band(il, channel);
775 if (s >= EEPROM_TX_POWER_BANDS) {
776 IL_ERR("Tx Power can not find channel %d\n", channel);
777 return -1;
778 }
779
780 ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
781 ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
782 chan_info->ch_num = (u8) channel;
783
784 D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", channel, s,
785 ch_i1, ch_i2);
786
787 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
788 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
789 m1 = &(il->calib_info->band_info[s].ch1.
790 measurements[c][m]);
791 m2 = &(il->calib_info->band_info[s].ch2.
792 measurements[c][m]);
793 omeas = &(chan_info->measurements[c][m]);
794
795 omeas->actual_pow =
796 (u8) il4965_interpolate_value(channel, ch_i1,
797 m1->actual_pow, ch_i2,
798 m2->actual_pow);
799 omeas->gain_idx =
800 (u8) il4965_interpolate_value(channel, ch_i1,
801 m1->gain_idx, ch_i2,
802 m2->gain_idx);
803 omeas->temperature =
804 (u8) il4965_interpolate_value(channel, ch_i1,
805 m1->temperature,
806 ch_i2,
807 m2->temperature);
808 omeas->pa_det =
809 (s8) il4965_interpolate_value(channel, ch_i1,
810 m1->pa_det, ch_i2,
811 m2->pa_det);
812
813 D_TXPOWER("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c,
814 m, m1->actual_pow, m2->actual_pow,
815 omeas->actual_pow);
816 D_TXPOWER("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c,
817 m, m1->gain_idx, m2->gain_idx,
818 omeas->gain_idx);
819 D_TXPOWER("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c,
820 m, m1->pa_det, m2->pa_det, omeas->pa_det);
821 D_TXPOWER("chain %d meas %d T1=%d T2=%d T=%d\n", c,
822 m, m1->temperature, m2->temperature,
823 omeas->temperature);
824 }
825 }
826
827 return 0;
828 }
829
830 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
831 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
832 static s32 back_off_table[] = {
833 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
834 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
835 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
836 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
837 10 /* CCK */
838 };
839
840 /* Thermal compensation values for txpower for various frequency ranges ...
841 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
842 static struct il4965_txpower_comp_entry {
843 s32 degrees_per_05db_a;
844 s32 degrees_per_05db_a_denom;
845 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
846 {
847 9, 2}, /* group 0 5.2, ch 34-43 */
848 {
849 4, 1}, /* group 1 5.2, ch 44-70 */
850 {
851 4, 1}, /* group 2 5.2, ch 71-124 */
852 {
853 4, 1}, /* group 3 5.2, ch 125-200 */
854 {
855 3, 1} /* group 4 2.4, ch all */
856 };
857
858 static s32
859 get_min_power_idx(s32 rate_power_idx, u32 band)
860 {
861 if (!band) {
862 if ((rate_power_idx & 7) <= 4)
863 return MIN_TX_GAIN_IDX_52GHZ_EXT;
864 }
865 return MIN_TX_GAIN_IDX;
866 }
867
868 struct gain_entry {
869 u8 dsp;
870 u8 radio;
871 };
872
873 static const struct gain_entry gain_table[2][108] = {
874 /* 5.2GHz power gain idx table */
875 {
876 {123, 0x3F}, /* highest txpower */
877 {117, 0x3F},
878 {110, 0x3F},
879 {104, 0x3F},
880 {98, 0x3F},
881 {110, 0x3E},
882 {104, 0x3E},
883 {98, 0x3E},
884 {110, 0x3D},
885 {104, 0x3D},
886 {98, 0x3D},
887 {110, 0x3C},
888 {104, 0x3C},
889 {98, 0x3C},
890 {110, 0x3B},
891 {104, 0x3B},
892 {98, 0x3B},
893 {110, 0x3A},
894 {104, 0x3A},
895 {98, 0x3A},
896 {110, 0x39},
897 {104, 0x39},
898 {98, 0x39},
899 {110, 0x38},
900 {104, 0x38},
901 {98, 0x38},
902 {110, 0x37},
903 {104, 0x37},
904 {98, 0x37},
905 {110, 0x36},
906 {104, 0x36},
907 {98, 0x36},
908 {110, 0x35},
909 {104, 0x35},
910 {98, 0x35},
911 {110, 0x34},
912 {104, 0x34},
913 {98, 0x34},
914 {110, 0x33},
915 {104, 0x33},
916 {98, 0x33},
917 {110, 0x32},
918 {104, 0x32},
919 {98, 0x32},
920 {110, 0x31},
921 {104, 0x31},
922 {98, 0x31},
923 {110, 0x30},
924 {104, 0x30},
925 {98, 0x30},
926 {110, 0x25},
927 {104, 0x25},
928 {98, 0x25},
929 {110, 0x24},
930 {104, 0x24},
931 {98, 0x24},
932 {110, 0x23},
933 {104, 0x23},
934 {98, 0x23},
935 {110, 0x22},
936 {104, 0x18},
937 {98, 0x18},
938 {110, 0x17},
939 {104, 0x17},
940 {98, 0x17},
941 {110, 0x16},
942 {104, 0x16},
943 {98, 0x16},
944 {110, 0x15},
945 {104, 0x15},
946 {98, 0x15},
947 {110, 0x14},
948 {104, 0x14},
949 {98, 0x14},
950 {110, 0x13},
951 {104, 0x13},
952 {98, 0x13},
953 {110, 0x12},
954 {104, 0x08},
955 {98, 0x08},
956 {110, 0x07},
957 {104, 0x07},
958 {98, 0x07},
959 {110, 0x06},
960 {104, 0x06},
961 {98, 0x06},
962 {110, 0x05},
963 {104, 0x05},
964 {98, 0x05},
965 {110, 0x04},
966 {104, 0x04},
967 {98, 0x04},
968 {110, 0x03},
969 {104, 0x03},
970 {98, 0x03},
971 {110, 0x02},
972 {104, 0x02},
973 {98, 0x02},
974 {110, 0x01},
975 {104, 0x01},
976 {98, 0x01},
977 {110, 0x00},
978 {104, 0x00},
979 {98, 0x00},
980 {93, 0x00},
981 {88, 0x00},
982 {83, 0x00},
983 {78, 0x00},
984 },
985 /* 2.4GHz power gain idx table */
986 {
987 {110, 0x3f}, /* highest txpower */
988 {104, 0x3f},
989 {98, 0x3f},
990 {110, 0x3e},
991 {104, 0x3e},
992 {98, 0x3e},
993 {110, 0x3d},
994 {104, 0x3d},
995 {98, 0x3d},
996 {110, 0x3c},
997 {104, 0x3c},
998 {98, 0x3c},
999 {110, 0x3b},
1000 {104, 0x3b},
1001 {98, 0x3b},
1002 {110, 0x3a},
1003 {104, 0x3a},
1004 {98, 0x3a},
1005 {110, 0x39},
1006 {104, 0x39},
1007 {98, 0x39},
1008 {110, 0x38},
1009 {104, 0x38},
1010 {98, 0x38},
1011 {110, 0x37},
1012 {104, 0x37},
1013 {98, 0x37},
1014 {110, 0x36},
1015 {104, 0x36},
1016 {98, 0x36},
1017 {110, 0x35},
1018 {104, 0x35},
1019 {98, 0x35},
1020 {110, 0x34},
1021 {104, 0x34},
1022 {98, 0x34},
1023 {110, 0x33},
1024 {104, 0x33},
1025 {98, 0x33},
1026 {110, 0x32},
1027 {104, 0x32},
1028 {98, 0x32},
1029 {110, 0x31},
1030 {104, 0x31},
1031 {98, 0x31},
1032 {110, 0x30},
1033 {104, 0x30},
1034 {98, 0x30},
1035 {110, 0x6},
1036 {104, 0x6},
1037 {98, 0x6},
1038 {110, 0x5},
1039 {104, 0x5},
1040 {98, 0x5},
1041 {110, 0x4},
1042 {104, 0x4},
1043 {98, 0x4},
1044 {110, 0x3},
1045 {104, 0x3},
1046 {98, 0x3},
1047 {110, 0x2},
1048 {104, 0x2},
1049 {98, 0x2},
1050 {110, 0x1},
1051 {104, 0x1},
1052 {98, 0x1},
1053 {110, 0x0},
1054 {104, 0x0},
1055 {98, 0x0},
1056 {97, 0},
1057 {96, 0},
1058 {95, 0},
1059 {94, 0},
1060 {93, 0},
1061 {92, 0},
1062 {91, 0},
1063 {90, 0},
1064 {89, 0},
1065 {88, 0},
1066 {87, 0},
1067 {86, 0},
1068 {85, 0},
1069 {84, 0},
1070 {83, 0},
1071 {82, 0},
1072 {81, 0},
1073 {80, 0},
1074 {79, 0},
1075 {78, 0},
1076 {77, 0},
1077 {76, 0},
1078 {75, 0},
1079 {74, 0},
1080 {73, 0},
1081 {72, 0},
1082 {71, 0},
1083 {70, 0},
1084 {69, 0},
1085 {68, 0},
1086 {67, 0},
1087 {66, 0},
1088 {65, 0},
1089 {64, 0},
1090 {63, 0},
1091 {62, 0},
1092 {61, 0},
1093 {60, 0},
1094 {59, 0},
1095 }
1096 };
1097
1098 static int
1099 il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40,
1100 u8 ctrl_chan_high,
1101 struct il4965_tx_power_db *tx_power_tbl)
1102 {
1103 u8 saturation_power;
1104 s32 target_power;
1105 s32 user_target_power;
1106 s32 power_limit;
1107 s32 current_temp;
1108 s32 reg_limit;
1109 s32 current_regulatory;
1110 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1111 int i;
1112 int c;
1113 const struct il_channel_info *ch_info = NULL;
1114 struct il_eeprom_calib_ch_info ch_eeprom_info;
1115 const struct il_eeprom_calib_measure *measurement;
1116 s16 voltage;
1117 s32 init_voltage;
1118 s32 voltage_compensation;
1119 s32 degrees_per_05db_num;
1120 s32 degrees_per_05db_denom;
1121 s32 factory_temp;
1122 s32 temperature_comp[2];
1123 s32 factory_gain_idx[2];
1124 s32 factory_actual_pwr[2];
1125 s32 power_idx;
1126
1127 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1128 * are used for idxing into txpower table) */
1129 user_target_power = 2 * il->tx_power_user_lmt;
1130
1131 /* Get current (RXON) channel, band, width */
1132 D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, is_ht40);
1133
1134 ch_info = il_get_channel_info(il, il->band, channel);
1135
1136 if (!il_is_channel_valid(ch_info))
1137 return -EINVAL;
1138
1139 /* get txatten group, used to select 1) thermal txpower adjustment
1140 * and 2) mimo txpower balance between Tx chains. */
1141 txatten_grp = il4965_get_tx_atten_grp(channel);
1142 if (txatten_grp < 0) {
1143 IL_ERR("Can't find txatten group for channel %d.\n", channel);
1144 return txatten_grp;
1145 }
1146
1147 D_TXPOWER("channel %d belongs to txatten group %d\n", channel,
1148 txatten_grp);
1149
1150 if (is_ht40) {
1151 if (ctrl_chan_high)
1152 channel -= 2;
1153 else
1154 channel += 2;
1155 }
1156
1157 /* hardware txpower limits ...
1158 * saturation (clipping distortion) txpowers are in half-dBm */
1159 if (band)
1160 saturation_power = il->calib_info->saturation_power24;
1161 else
1162 saturation_power = il->calib_info->saturation_power52;
1163
1164 if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
1165 saturation_power > IL_TX_POWER_SATURATION_MAX) {
1166 if (band)
1167 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
1168 else
1169 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
1170 }
1171
1172 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1173 * max_power_avg values are in dBm, convert * 2 */
1174 if (is_ht40)
1175 reg_limit = ch_info->ht40_max_power_avg * 2;
1176 else
1177 reg_limit = ch_info->max_power_avg * 2;
1178
1179 if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
1180 (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
1181 if (band)
1182 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
1183 else
1184 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
1185 }
1186
1187 /* Interpolate txpower calibration values for this channel,
1188 * based on factory calibration tests on spaced channels. */
1189 il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1190
1191 /* calculate tx gain adjustment based on power supply voltage */
1192 voltage = le16_to_cpu(il->calib_info->voltage);
1193 init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage);
1194 voltage_compensation =
1195 il4965_get_voltage_compensation(voltage, init_voltage);
1196
1197 D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", init_voltage,
1198 voltage, voltage_compensation);
1199
1200 /* get current temperature (Celsius) */
1201 current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1202 current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1203 current_temp = KELVIN_TO_CELSIUS(current_temp);
1204
1205 /* select thermal txpower adjustment params, based on channel group
1206 * (same frequency group used for mimo txatten adjustment) */
1207 degrees_per_05db_num =
1208 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1209 degrees_per_05db_denom =
1210 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1211
1212 /* get per-chain txpower values from factory measurements */
1213 for (c = 0; c < 2; c++) {
1214 measurement = &ch_eeprom_info.measurements[c][1];
1215
1216 /* txgain adjustment (in half-dB steps) based on difference
1217 * between factory and current temperature */
1218 factory_temp = measurement->temperature;
1219 il4965_math_div_round((current_temp -
1220 factory_temp) * degrees_per_05db_denom,
1221 degrees_per_05db_num,
1222 &temperature_comp[c]);
1223
1224 factory_gain_idx[c] = measurement->gain_idx;
1225 factory_actual_pwr[c] = measurement->actual_pow;
1226
1227 D_TXPOWER("chain = %d\n", c);
1228 D_TXPOWER("fctry tmp %d, " "curr tmp %d, comp %d steps\n",
1229 factory_temp, current_temp, temperature_comp[c]);
1230
1231 D_TXPOWER("fctry idx %d, fctry pwr %d\n", factory_gain_idx[c],
1232 factory_actual_pwr[c]);
1233 }
1234
1235 /* for each of 33 bit-rates (including 1 for CCK) */
1236 for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
1237 u8 is_mimo_rate;
1238 union il4965_tx_power_dual_stream tx_power;
1239
1240 /* for mimo, reduce each chain's txpower by half
1241 * (3dB, 6 steps), so total output power is regulatory
1242 * compliant. */
1243 if (i & 0x8) {
1244 current_regulatory =
1245 reg_limit -
1246 IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1247 is_mimo_rate = 1;
1248 } else {
1249 current_regulatory = reg_limit;
1250 is_mimo_rate = 0;
1251 }
1252
1253 /* find txpower limit, either hardware or regulatory */
1254 power_limit = saturation_power - back_off_table[i];
1255 if (power_limit > current_regulatory)
1256 power_limit = current_regulatory;
1257
1258 /* reduce user's txpower request if necessary
1259 * for this rate on this channel */
1260 target_power = user_target_power;
1261 if (target_power > power_limit)
1262 target_power = power_limit;
1263
1264 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", i,
1265 saturation_power - back_off_table[i],
1266 current_regulatory, user_target_power, target_power);
1267
1268 /* for each of 2 Tx chains (radio transmitters) */
1269 for (c = 0; c < 2; c++) {
1270 s32 atten_value;
1271
1272 if (is_mimo_rate)
1273 atten_value =
1274 (s32) le32_to_cpu(il->card_alive_init.
1275 tx_atten[txatten_grp][c]);
1276 else
1277 atten_value = 0;
1278
1279 /* calculate idx; higher idx means lower txpower */
1280 power_idx =
1281 (u8) (factory_gain_idx[c] -
1282 (target_power - factory_actual_pwr[c]) -
1283 temperature_comp[c] - voltage_compensation +
1284 atten_value);
1285
1286 /* D_TXPOWER("calculated txpower idx %d\n",
1287 power_idx); */
1288
1289 if (power_idx < get_min_power_idx(i, band))
1290 power_idx = get_min_power_idx(i, band);
1291
1292 /* adjust 5 GHz idx to support negative idxes */
1293 if (!band)
1294 power_idx += 9;
1295
1296 /* CCK, rate 32, reduce txpower for CCK */
1297 if (i == POWER_TBL_CCK_ENTRY)
1298 power_idx +=
1299 IL_TX_POWER_CCK_COMPENSATION_C_STEP;
1300
1301 /* stay within the table! */
1302 if (power_idx > 107) {
1303 IL_WARN("txpower idx %d > 107\n", power_idx);
1304 power_idx = 107;
1305 }
1306 if (power_idx < 0) {
1307 IL_WARN("txpower idx %d < 0\n", power_idx);
1308 power_idx = 0;
1309 }
1310
1311 /* fill txpower command for this rate/chain */
1312 tx_power.s.radio_tx_gain[c] =
1313 gain_table[band][power_idx].radio;
1314 tx_power.s.dsp_predis_atten[c] =
1315 gain_table[band][power_idx].dsp;
1316
1317 D_TXPOWER("chain %d mimo %d idx %d "
1318 "gain 0x%02x dsp %d\n", c, atten_value,
1319 power_idx, tx_power.s.radio_tx_gain[c],
1320 tx_power.s.dsp_predis_atten[c]);
1321 } /* for each chain */
1322
1323 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1324
1325 } /* for each rate */
1326
1327 return 0;
1328 }
1329
1330 /**
1331 * il4965_send_tx_power - Configure the TXPOWER level user limit
1332 *
1333 * Uses the active RXON for channel, band, and characteristics (ht40, high)
1334 * The power limit is taken from il->tx_power_user_lmt.
1335 */
1336 static int
1337 il4965_send_tx_power(struct il_priv *il)
1338 {
1339 struct il4965_txpowertable_cmd cmd = { 0 };
1340 int ret;
1341 u8 band = 0;
1342 bool is_ht40 = false;
1343 u8 ctrl_chan_high = 0;
1344
1345 if (WARN_ONCE
1346 (test_bit(S_SCAN_HW, &il->status),
1347 "TX Power requested while scanning!\n"))
1348 return -EAGAIN;
1349
1350 band = il->band == IEEE80211_BAND_2GHZ;
1351
1352 is_ht40 = iw4965_is_ht40_channel(il->active.flags);
1353
1354 if (is_ht40 && (il->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1355 ctrl_chan_high = 1;
1356
1357 cmd.band = band;
1358 cmd.channel = il->active.channel;
1359
1360 ret =
1361 il4965_fill_txpower_tbl(il, band, le16_to_cpu(il->active.channel),
1362 is_ht40, ctrl_chan_high, &cmd.tx_power);
1363 if (ret)
1364 goto out;
1365
1366 ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd);
1367
1368 out:
1369 return ret;
1370 }
1371
1372 static int
1373 il4965_send_rxon_assoc(struct il_priv *il)
1374 {
1375 int ret = 0;
1376 struct il4965_rxon_assoc_cmd rxon_assoc;
1377 const struct il_rxon_cmd *rxon1 = &il->staging;
1378 const struct il_rxon_cmd *rxon2 = &il->active;
1379
1380 if (rxon1->flags == rxon2->flags &&
1381 rxon1->filter_flags == rxon2->filter_flags &&
1382 rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1383 rxon1->ofdm_ht_single_stream_basic_rates ==
1384 rxon2->ofdm_ht_single_stream_basic_rates &&
1385 rxon1->ofdm_ht_dual_stream_basic_rates ==
1386 rxon2->ofdm_ht_dual_stream_basic_rates &&
1387 rxon1->rx_chain == rxon2->rx_chain &&
1388 rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1389 D_INFO("Using current RXON_ASSOC. Not resending.\n");
1390 return 0;
1391 }
1392
1393 rxon_assoc.flags = il->staging.flags;
1394 rxon_assoc.filter_flags = il->staging.filter_flags;
1395 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates;
1396 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates;
1397 rxon_assoc.reserved = 0;
1398 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1399 il->staging.ofdm_ht_single_stream_basic_rates;
1400 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1401 il->staging.ofdm_ht_dual_stream_basic_rates;
1402 rxon_assoc.rx_chain_select_flags = il->staging.rx_chain;
1403
1404 ret =
1405 il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc),
1406 &rxon_assoc, NULL);
1407
1408 return ret;
1409 }
1410
1411 static int
1412 il4965_commit_rxon(struct il_priv *il)
1413 {
1414 /* cast away the const for active_rxon in this function */
1415 struct il_rxon_cmd *active_rxon = (void *)&il->active;
1416 int ret;
1417 bool new_assoc = !!(il->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1418
1419 if (!il_is_alive(il))
1420 return -EBUSY;
1421
1422 /* always get timestamp with Rx frame */
1423 il->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1424
1425 ret = il_check_rxon_cmd(il);
1426 if (ret) {
1427 IL_ERR("Invalid RXON configuration. Not committing.\n");
1428 return -EINVAL;
1429 }
1430
1431 /*
1432 * receive commit_rxon request
1433 * abort any previous channel switch if still in process
1434 */
1435 if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1436 il->switch_channel != il->staging.channel) {
1437 D_11H("abort channel switch on %d\n",
1438 le16_to_cpu(il->switch_channel));
1439 il_chswitch_done(il, false);
1440 }
1441
1442 /* If we don't need to send a full RXON, we can use
1443 * il_rxon_assoc_cmd which is used to reconfigure filter
1444 * and other flags for the current radio configuration. */
1445 if (!il_full_rxon_required(il)) {
1446 ret = il_send_rxon_assoc(il);
1447 if (ret) {
1448 IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
1449 return ret;
1450 }
1451
1452 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1453 il_print_rx_config_cmd(il);
1454 /*
1455 * We do not commit tx power settings while channel changing,
1456 * do it now if tx power changed.
1457 */
1458 il_set_tx_power(il, il->tx_power_next, false);
1459 return 0;
1460 }
1461
1462 /* If we are currently associated and the new config requires
1463 * an RXON_ASSOC and the new config wants the associated mask enabled,
1464 * we must clear the associated from the active configuration
1465 * before we apply the new config */
1466 if (il_is_associated(il) && new_assoc) {
1467 D_INFO("Toggling associated bit on current RXON\n");
1468 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1469
1470 ret =
1471 il_send_cmd_pdu(il, C_RXON,
1472 sizeof(struct il_rxon_cmd), active_rxon);
1473
1474 /* If the mask clearing failed then we set
1475 * active_rxon back to what it was previously */
1476 if (ret) {
1477 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1478 IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
1479 return ret;
1480 }
1481 il_clear_ucode_stations(il);
1482 il_restore_stations(il);
1483 ret = il4965_restore_default_wep_keys(il);
1484 if (ret) {
1485 IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1486 return ret;
1487 }
1488 }
1489
1490 D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n"
1491 "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"),
1492 le16_to_cpu(il->staging.channel), il->staging.bssid_addr);
1493
1494 il_set_rxon_hwcrypto(il, !il->cfg->mod_params->sw_crypto);
1495
1496 /* Apply the new configuration
1497 * RXON unassoc clears the station table in uCode so restoration of
1498 * stations is needed after it (the RXON command) completes
1499 */
1500 if (!new_assoc) {
1501 ret =
1502 il_send_cmd_pdu(il, C_RXON,
1503 sizeof(struct il_rxon_cmd), &il->staging);
1504 if (ret) {
1505 IL_ERR("Error setting new RXON (%d)\n", ret);
1506 return ret;
1507 }
1508 D_INFO("Return from !new_assoc RXON.\n");
1509 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1510 il_clear_ucode_stations(il);
1511 il_restore_stations(il);
1512 ret = il4965_restore_default_wep_keys(il);
1513 if (ret) {
1514 IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1515 return ret;
1516 }
1517 }
1518 if (new_assoc) {
1519 il->start_calib = 0;
1520 /* Apply the new configuration
1521 * RXON assoc doesn't clear the station table in uCode,
1522 */
1523 ret =
1524 il_send_cmd_pdu(il, C_RXON,
1525 sizeof(struct il_rxon_cmd), &il->staging);
1526 if (ret) {
1527 IL_ERR("Error setting new RXON (%d)\n", ret);
1528 return ret;
1529 }
1530 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1531 }
1532 il_print_rx_config_cmd(il);
1533
1534 il4965_init_sensitivity(il);
1535
1536 /* If we issue a new RXON command which required a tune then we must
1537 * send a new TXPOWER command or we won't be able to Tx any frames */
1538 ret = il_set_tx_power(il, il->tx_power_next, true);
1539 if (ret) {
1540 IL_ERR("Error sending TX power (%d)\n", ret);
1541 return ret;
1542 }
1543
1544 return 0;
1545 }
1546
1547 static int
1548 il4965_hw_channel_switch(struct il_priv *il,
1549 struct ieee80211_channel_switch *ch_switch)
1550 {
1551 int rc;
1552 u8 band = 0;
1553 bool is_ht40 = false;
1554 u8 ctrl_chan_high = 0;
1555 struct il4965_channel_switch_cmd cmd;
1556 const struct il_channel_info *ch_info;
1557 u32 switch_time_in_usec, ucode_switch_time;
1558 u16 ch;
1559 u32 tsf_low;
1560 u8 switch_count;
1561 u16 beacon_interval = le16_to_cpu(il->timing.beacon_interval);
1562 struct ieee80211_vif *vif = il->vif;
1563 band = (il->band == IEEE80211_BAND_2GHZ);
1564
1565 if (WARN_ON_ONCE(vif == NULL))
1566 return -EIO;
1567
1568 is_ht40 = iw4965_is_ht40_channel(il->staging.flags);
1569
1570 if (is_ht40 && (il->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1571 ctrl_chan_high = 1;
1572
1573 cmd.band = band;
1574 cmd.expect_beacon = 0;
1575 ch = ch_switch->channel->hw_value;
1576 cmd.channel = cpu_to_le16(ch);
1577 cmd.rxon_flags = il->staging.flags;
1578 cmd.rxon_filter_flags = il->staging.filter_flags;
1579 switch_count = ch_switch->count;
1580 tsf_low = ch_switch->timestamp & 0x0ffffffff;
1581 /*
1582 * calculate the ucode channel switch time
1583 * adding TSF as one of the factor for when to switch
1584 */
1585 if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1586 if (switch_count >
1587 ((il->ucode_beacon_time - tsf_low) / beacon_interval)) {
1588 switch_count -=
1589 (il->ucode_beacon_time - tsf_low) / beacon_interval;
1590 } else
1591 switch_count = 0;
1592 }
1593 if (switch_count <= 1)
1594 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1595 else {
1596 switch_time_in_usec =
1597 vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1598 ucode_switch_time =
1599 il_usecs_to_beacons(il, switch_time_in_usec,
1600 beacon_interval);
1601 cmd.switch_time =
1602 il_add_beacon_time(il, il->ucode_beacon_time,
1603 ucode_switch_time, beacon_interval);
1604 }
1605 D_11H("uCode time for the switch is 0x%x\n", cmd.switch_time);
1606 ch_info = il_get_channel_info(il, il->band, ch);
1607 if (ch_info)
1608 cmd.expect_beacon = il_is_channel_radar(ch_info);
1609 else {
1610 IL_ERR("invalid channel switch from %u to %u\n",
1611 il->active.channel, ch);
1612 return -EFAULT;
1613 }
1614
1615 rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high,
1616 &cmd.tx_power);
1617 if (rc) {
1618 D_11H("error:%d fill txpower_tbl\n", rc);
1619 return rc;
1620 }
1621
1622 return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1623 }
1624
1625 /**
1626 * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1627 */
1628 static void
1629 il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq,
1630 u16 byte_cnt)
1631 {
1632 struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1633 int txq_id = txq->q.id;
1634 int write_ptr = txq->q.write_ptr;
1635 int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
1636 __le16 bc_ent;
1637
1638 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1639
1640 bc_ent = cpu_to_le16(len & 0xFFF);
1641 /* Set up byte count within first 256 entries */
1642 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1643
1644 /* If within first 64 entries, duplicate at end */
1645 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1646 scd_bc_tbl[txq_id].tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] =
1647 bc_ent;
1648 }
1649
1650 /**
1651 * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1652 * @stats: Provides the temperature reading from the uCode
1653 *
1654 * A return of <0 indicates bogus data in the stats
1655 */
1656 static int
1657 il4965_hw_get_temperature(struct il_priv *il)
1658 {
1659 s32 temperature;
1660 s32 vt;
1661 s32 R1, R2, R3;
1662 u32 R4;
1663
1664 if (test_bit(S_TEMPERATURE, &il->status) &&
1665 (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) {
1666 D_TEMP("Running HT40 temperature calibration\n");
1667 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]);
1668 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]);
1669 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]);
1670 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1671 } else {
1672 D_TEMP("Running temperature calibration\n");
1673 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]);
1674 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]);
1675 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]);
1676 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1677 }
1678
1679 /*
1680 * Temperature is only 23 bits, so sign extend out to 32.
1681 *
1682 * NOTE If we haven't received a stats notification yet
1683 * with an updated temperature, use R4 provided to us in the
1684 * "initialize" ALIVE response.
1685 */
1686 if (!test_bit(S_TEMPERATURE, &il->status))
1687 vt = sign_extend32(R4, 23);
1688 else
1689 vt = sign_extend32(le32_to_cpu
1690 (il->_4965.stats.general.common.temperature),
1691 23);
1692
1693 D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1694
1695 if (R3 == R1) {
1696 IL_ERR("Calibration conflict R1 == R3\n");
1697 return -1;
1698 }
1699
1700 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1701 * Add offset to center the adjustment around 0 degrees Centigrade. */
1702 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1703 temperature /= (R3 - R1);
1704 temperature =
1705 (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1706
1707 D_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
1708 KELVIN_TO_CELSIUS(temperature));
1709
1710 return temperature;
1711 }
1712
1713 /* Adjust Txpower only if temperature variance is greater than threshold. */
1714 #define IL_TEMPERATURE_THRESHOLD 3
1715
1716 /**
1717 * il4965_is_temp_calib_needed - determines if new calibration is needed
1718 *
1719 * If the temperature changed has changed sufficiently, then a recalibration
1720 * is needed.
1721 *
1722 * Assumes caller will replace il->last_temperature once calibration
1723 * executed.
1724 */
1725 static int
1726 il4965_is_temp_calib_needed(struct il_priv *il)
1727 {
1728 int temp_diff;
1729
1730 if (!test_bit(S_STATS, &il->status)) {
1731 D_TEMP("Temperature not updated -- no stats.\n");
1732 return 0;
1733 }
1734
1735 temp_diff = il->temperature - il->last_temperature;
1736
1737 /* get absolute value */
1738 if (temp_diff < 0) {
1739 D_POWER("Getting cooler, delta %d\n", temp_diff);
1740 temp_diff = -temp_diff;
1741 } else if (temp_diff == 0)
1742 D_POWER("Temperature unchanged\n");
1743 else
1744 D_POWER("Getting warmer, delta %d\n", temp_diff);
1745
1746 if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
1747 D_POWER(" => thermal txpower calib not needed\n");
1748 return 0;
1749 }
1750
1751 D_POWER(" => thermal txpower calib needed\n");
1752
1753 return 1;
1754 }
1755
1756 static void
1757 il4965_temperature_calib(struct il_priv *il)
1758 {
1759 s32 temp;
1760
1761 temp = il4965_hw_get_temperature(il);
1762 if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
1763 return;
1764
1765 if (il->temperature != temp) {
1766 if (il->temperature)
1767 D_TEMP("Temperature changed " "from %dC to %dC\n",
1768 KELVIN_TO_CELSIUS(il->temperature),
1769 KELVIN_TO_CELSIUS(temp));
1770 else
1771 D_TEMP("Temperature " "initialized to %dC\n",
1772 KELVIN_TO_CELSIUS(temp));
1773 }
1774
1775 il->temperature = temp;
1776 set_bit(S_TEMPERATURE, &il->status);
1777
1778 if (!il->disable_tx_power_cal &&
1779 unlikely(!test_bit(S_SCANNING, &il->status)) &&
1780 il4965_is_temp_calib_needed(il))
1781 queue_work(il->workqueue, &il->txpower_work);
1782 }
1783
1784 static u16
1785 il4965_get_hcmd_size(u8 cmd_id, u16 len)
1786 {
1787 switch (cmd_id) {
1788 case C_RXON:
1789 return (u16) sizeof(struct il4965_rxon_cmd);
1790 default:
1791 return len;
1792 }
1793 }
1794
1795 static u16
1796 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data)
1797 {
1798 struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
1799 addsta->mode = cmd->mode;
1800 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1801 memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
1802 addsta->station_flags = cmd->station_flags;
1803 addsta->station_flags_msk = cmd->station_flags_msk;
1804 addsta->tid_disable_tx = cmd->tid_disable_tx;
1805 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1806 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1807 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1808 addsta->sleep_tx_count = cmd->sleep_tx_count;
1809 addsta->reserved1 = cpu_to_le16(0);
1810 addsta->reserved2 = cpu_to_le16(0);
1811
1812 return (u16) sizeof(struct il4965_addsta_cmd);
1813 }
1814
1815 static inline u32
1816 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
1817 {
1818 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1819 }
1820
1821 static inline u32
1822 il4965_tx_status_to_mac80211(u32 status)
1823 {
1824 status &= TX_STATUS_MSK;
1825
1826 switch (status) {
1827 case TX_STATUS_SUCCESS:
1828 case TX_STATUS_DIRECT_DONE:
1829 return IEEE80211_TX_STAT_ACK;
1830 case TX_STATUS_FAIL_DEST_PS:
1831 return IEEE80211_TX_STAT_TX_FILTERED;
1832 default:
1833 return 0;
1834 }
1835 }
1836
1837 static inline bool
1838 il4965_is_tx_success(u32 status)
1839 {
1840 status &= TX_STATUS_MSK;
1841 return (status == TX_STATUS_SUCCESS || status == TX_STATUS_DIRECT_DONE);
1842 }
1843
1844 /**
1845 * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1846 */
1847 static int
1848 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg,
1849 struct il4965_tx_resp *tx_resp, int txq_id,
1850 u16 start_idx)
1851 {
1852 u16 status;
1853 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1854 struct ieee80211_tx_info *info = NULL;
1855 struct ieee80211_hdr *hdr = NULL;
1856 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1857 int i, sh, idx;
1858 u16 seq;
1859 if (agg->wait_for_ba)
1860 D_TX_REPLY("got tx response w/o block-ack\n");
1861
1862 agg->frame_count = tx_resp->frame_count;
1863 agg->start_idx = start_idx;
1864 agg->rate_n_flags = rate_n_flags;
1865 agg->bitmap = 0;
1866
1867 /* num frames attempted by Tx command */
1868 if (agg->frame_count == 1) {
1869 /* Only one frame was attempted; no block-ack will arrive */
1870 status = le16_to_cpu(frame_status[0].status);
1871 idx = start_idx;
1872
1873 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
1874 agg->frame_count, agg->start_idx, idx);
1875
1876 info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb);
1877 info->status.rates[0].count = tx_resp->failure_frame + 1;
1878 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1879 info->flags |= il4965_tx_status_to_mac80211(status);
1880 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
1881
1882 D_TX_REPLY("1 Frame 0x%x failure :%d\n", status & 0xff,
1883 tx_resp->failure_frame);
1884 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
1885
1886 agg->wait_for_ba = 0;
1887 } else {
1888 /* Two or more frames were attempted; expect block-ack */
1889 u64 bitmap = 0;
1890 int start = agg->start_idx;
1891
1892 /* Construct bit-map of pending frames within Tx win */
1893 for (i = 0; i < agg->frame_count; i++) {
1894 u16 sc;
1895 status = le16_to_cpu(frame_status[i].status);
1896 seq = le16_to_cpu(frame_status[i].sequence);
1897 idx = SEQ_TO_IDX(seq);
1898 txq_id = SEQ_TO_QUEUE(seq);
1899
1900 if (status &
1901 (AGG_TX_STATE_FEW_BYTES_MSK |
1902 AGG_TX_STATE_ABORT_MSK))
1903 continue;
1904
1905 D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
1906 agg->frame_count, txq_id, idx);
1907
1908 hdr = il_tx_queue_get_hdr(il, txq_id, idx);
1909 if (!hdr) {
1910 IL_ERR("BUG_ON idx doesn't point to valid skb"
1911 " idx=%d, txq_id=%d\n", idx, txq_id);
1912 return -1;
1913 }
1914
1915 sc = le16_to_cpu(hdr->seq_ctrl);
1916 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1917 IL_ERR("BUG_ON idx doesn't match seq control"
1918 " idx=%d, seq_idx=%d, seq=%d\n", idx,
1919 SEQ_TO_SN(sc), hdr->seq_ctrl);
1920 return -1;
1921 }
1922
1923 D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i, idx,
1924 SEQ_TO_SN(sc));
1925
1926 sh = idx - start;
1927 if (sh > 64) {
1928 sh = (start - idx) + 0xff;
1929 bitmap = bitmap << sh;
1930 sh = 0;
1931 start = idx;
1932 } else if (sh < -64)
1933 sh = 0xff - (start - idx);
1934 else if (sh < 0) {
1935 sh = start - idx;
1936 start = idx;
1937 bitmap = bitmap << sh;
1938 sh = 0;
1939 }
1940 bitmap |= 1ULL << sh;
1941 D_TX_REPLY("start=%d bitmap=0x%llx\n", start,
1942 (unsigned long long)bitmap);
1943 }
1944
1945 agg->bitmap = bitmap;
1946 agg->start_idx = start;
1947 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
1948 agg->frame_count, agg->start_idx,
1949 (unsigned long long)agg->bitmap);
1950
1951 if (bitmap)
1952 agg->wait_for_ba = 1;
1953 }
1954 return 0;
1955 }
1956
1957 static u8
1958 il4965_find_station(struct il_priv *il, const u8 * addr)
1959 {
1960 int i;
1961 int start = 0;
1962 int ret = IL_INVALID_STATION;
1963 unsigned long flags;
1964
1965 if ((il->iw_mode == NL80211_IFTYPE_ADHOC))
1966 start = IL_STA_ID;
1967
1968 if (is_broadcast_ether_addr(addr))
1969 return il->hw_params.bcast_id;
1970
1971 spin_lock_irqsave(&il->sta_lock, flags);
1972 for (i = start; i < il->hw_params.max_stations; i++)
1973 if (il->stations[i].used &&
1974 (!compare_ether_addr(il->stations[i].sta.sta.addr, addr))) {
1975 ret = i;
1976 goto out;
1977 }
1978
1979 D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations);
1980
1981 out:
1982 /*
1983 * It may be possible that more commands interacting with stations
1984 * arrive before we completed processing the adding of
1985 * station
1986 */
1987 if (ret != IL_INVALID_STATION &&
1988 (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
1989 ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
1990 (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
1991 IL_ERR("Requested station info for sta %d before ready.\n",
1992 ret);
1993 ret = IL_INVALID_STATION;
1994 }
1995 spin_unlock_irqrestore(&il->sta_lock, flags);
1996 return ret;
1997 }
1998
1999 static int
2000 il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2001 {
2002 if (il->iw_mode == NL80211_IFTYPE_STATION) {
2003 return IL_AP_ID;
2004 } else {
2005 u8 *da = ieee80211_get_DA(hdr);
2006 return il4965_find_station(il, da);
2007 }
2008 }
2009
2010 /**
2011 * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2012 */
2013 static void
2014 il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
2015 {
2016 struct il_rx_pkt *pkt = rxb_addr(rxb);
2017 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2018 int txq_id = SEQ_TO_QUEUE(sequence);
2019 int idx = SEQ_TO_IDX(sequence);
2020 struct il_tx_queue *txq = &il->txq[txq_id];
2021 struct ieee80211_hdr *hdr;
2022 struct ieee80211_tx_info *info;
2023 struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2024 u32 status = le32_to_cpu(tx_resp->u.status);
2025 int uninitialized_var(tid);
2026 int sta_id;
2027 int freed;
2028 u8 *qc = NULL;
2029 unsigned long flags;
2030
2031 if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2032 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2033 "is out of range [0-%d] %d %d\n", txq_id, idx,
2034 txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr);
2035 return;
2036 }
2037
2038 txq->time_stamp = jiffies;
2039 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
2040 memset(&info->status, 0, sizeof(info->status));
2041
2042 hdr = il_tx_queue_get_hdr(il, txq_id, idx);
2043 if (ieee80211_is_data_qos(hdr->frame_control)) {
2044 qc = ieee80211_get_qos_ctl(hdr);
2045 tid = qc[0] & 0xf;
2046 }
2047
2048 sta_id = il4965_get_ra_sta_id(il, hdr);
2049 if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2050 IL_ERR("Station not known\n");
2051 return;
2052 }
2053
2054 spin_lock_irqsave(&il->sta_lock, flags);
2055 if (txq->sched_retry) {
2056 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2057 struct il_ht_agg *agg = NULL;
2058 WARN_ON(!qc);
2059
2060 agg = &il->stations[sta_id].tid[tid].agg;
2061
2062 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2063
2064 /* check if BAR is needed */
2065 if ((tx_resp->frame_count == 1) &&
2066 !il4965_is_tx_success(status))
2067 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2068
2069 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2070 idx = il_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2071 D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2072 "%d idx %d\n", scd_ssn, idx);
2073 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2074 if (qc)
2075 il4965_free_tfds_in_queue(il, sta_id, tid,
2076 freed);
2077
2078 if (il->mac80211_registered &&
2079 il_queue_space(&txq->q) > txq->q.low_mark &&
2080 agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2081 il_wake_queue(il, txq);
2082 }
2083 } else {
2084 info->status.rates[0].count = tx_resp->failure_frame + 1;
2085 info->flags |= il4965_tx_status_to_mac80211(status);
2086 il4965_hwrate_to_tx_control(il,
2087 le32_to_cpu(tx_resp->rate_n_flags),
2088 info);
2089
2090 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2091 "rate_n_flags 0x%x retries %d\n", txq_id,
2092 il4965_get_tx_fail_reason(status), status,
2093 le32_to_cpu(tx_resp->rate_n_flags),
2094 tx_resp->failure_frame);
2095
2096 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2097 if (qc && likely(sta_id != IL_INVALID_STATION))
2098 il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2099 else if (sta_id == IL_INVALID_STATION)
2100 D_TX_REPLY("Station not known\n");
2101
2102 if (il->mac80211_registered &&
2103 il_queue_space(&txq->q) > txq->q.low_mark)
2104 il_wake_queue(il, txq);
2105 }
2106 if (qc && likely(sta_id != IL_INVALID_STATION))
2107 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2108
2109 il4965_check_abort_status(il, tx_resp->frame_count, status);
2110
2111 spin_unlock_irqrestore(&il->sta_lock, flags);
2112 }
2113
2114 /* Set up 4965-specific Rx frame reply handlers */
2115 static void
2116 il4965_handler_setup(struct il_priv *il)
2117 {
2118 /* Legacy Rx frames */
2119 il->handlers[N_RX] = il4965_hdl_rx;
2120 /* Tx response */
2121 il->handlers[C_TX] = il4965_hdl_tx;
2122 }
2123
2124 static struct il_hcmd_ops il4965_hcmd = {
2125 .rxon_assoc = il4965_send_rxon_assoc,
2126 .commit_rxon = il4965_commit_rxon,
2127 .set_rxon_chain = il4965_set_rxon_chain,
2128 };
2129
2130 static void
2131 il4965_post_scan(struct il_priv *il)
2132 {
2133 /*
2134 * Since setting the RXON may have been deferred while
2135 * performing the scan, fire one off if needed
2136 */
2137 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
2138 il_commit_rxon(il);
2139 }
2140
2141 static void
2142 il4965_post_associate(struct il_priv *il)
2143 {
2144 struct ieee80211_vif *vif = il->vif;
2145 struct ieee80211_conf *conf = NULL;
2146 int ret = 0;
2147
2148 if (!vif || !il->is_open)
2149 return;
2150
2151 if (test_bit(S_EXIT_PENDING, &il->status))
2152 return;
2153
2154 il_scan_cancel_timeout(il, 200);
2155
2156 conf = &il->hw->conf;
2157
2158 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2159 il_commit_rxon(il);
2160
2161 ret = il_send_rxon_timing(il);
2162 if (ret)
2163 IL_WARN("RXON timing - " "Attempting to continue.\n");
2164
2165 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2166
2167 il_set_rxon_ht(il, &il->current_ht_config);
2168
2169 if (il->ops->hcmd->set_rxon_chain)
2170 il->ops->hcmd->set_rxon_chain(il);
2171
2172 il->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2173
2174 D_ASSOC("assoc id %d beacon interval %d\n", vif->bss_conf.aid,
2175 vif->bss_conf.beacon_int);
2176
2177 if (vif->bss_conf.use_short_preamble)
2178 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2179 else
2180 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2181
2182 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2183 if (vif->bss_conf.use_short_slot)
2184 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2185 else
2186 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2187 }
2188
2189 il_commit_rxon(il);
2190
2191 D_ASSOC("Associated as %d to: %pM\n", vif->bss_conf.aid,
2192 il->active.bssid_addr);
2193
2194 switch (vif->type) {
2195 case NL80211_IFTYPE_STATION:
2196 break;
2197 case NL80211_IFTYPE_ADHOC:
2198 il4965_send_beacon_cmd(il);
2199 break;
2200 default:
2201 IL_ERR("%s Should not be called in %d mode\n", __func__,
2202 vif->type);
2203 break;
2204 }
2205
2206 /* the chain noise calibration will enabled PM upon completion
2207 * If chain noise has already been run, then we need to enable
2208 * power management here */
2209 if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
2210 il_power_update_mode(il, false);
2211
2212 /* Enable Rx differential gain and sensitivity calibrations */
2213 il4965_chain_noise_reset(il);
2214 il->start_calib = 1;
2215 }
2216
2217 static void
2218 il4965_config_ap(struct il_priv *il)
2219 {
2220 struct ieee80211_vif *vif = il->vif;
2221 int ret = 0;
2222
2223 lockdep_assert_held(&il->mutex);
2224
2225 if (test_bit(S_EXIT_PENDING, &il->status))
2226 return;
2227
2228 /* The following should be done only at AP bring up */
2229 if (!il_is_associated(il)) {
2230
2231 /* RXON - unassoc (to set timing command) */
2232 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2233 il_commit_rxon(il);
2234
2235 /* RXON Timing */
2236 ret = il_send_rxon_timing(il);
2237 if (ret)
2238 IL_WARN("RXON timing failed - "
2239 "Attempting to continue.\n");
2240
2241 /* AP has all antennas */
2242 il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant;
2243 il_set_rxon_ht(il, &il->current_ht_config);
2244 if (il->ops->hcmd->set_rxon_chain)
2245 il->ops->hcmd->set_rxon_chain(il);
2246
2247 il->staging.assoc_id = 0;
2248
2249 if (vif->bss_conf.use_short_preamble)
2250 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2251 else
2252 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2253
2254 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2255 if (vif->bss_conf.use_short_slot)
2256 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2257 else
2258 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2259 }
2260 /* need to send beacon cmd before committing assoc RXON! */
2261 il4965_send_beacon_cmd(il);
2262 /* restore RXON assoc */
2263 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2264 il_commit_rxon(il);
2265 }
2266 il4965_send_beacon_cmd(il);
2267 }
2268
2269 static struct il_hcmd_utils_ops il4965_hcmd_utils = {
2270 .get_hcmd_size = il4965_get_hcmd_size,
2271 .build_addsta_hcmd = il4965_build_addsta_hcmd,
2272 .request_scan = il4965_request_scan,
2273 .post_scan = il4965_post_scan,
2274 };
2275
2276 static struct il_lib_ops il4965_lib = {
2277 .set_hw_params = il4965_hw_set_hw_params,
2278 .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
2279 .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
2280 .txq_free_tfd = il4965_hw_txq_free_tfd,
2281 .txq_init = il4965_hw_tx_queue_init,
2282 .handler_setup = il4965_handler_setup,
2283 .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
2284 .init_alive_start = il4965_init_alive_start,
2285 .load_ucode = il4965_load_bsm,
2286 .dump_nic_error_log = il4965_dump_nic_error_log,
2287 .dump_fh = il4965_dump_fh,
2288 .set_channel_switch = il4965_hw_channel_switch,
2289 .apm_ops = {
2290 .init = il_apm_init,
2291 .config = il4965_nic_config,
2292 },
2293 .eeprom_ops = {
2294 .regulatory_bands = {
2295 EEPROM_REGULATORY_BAND_1_CHANNELS,
2296 EEPROM_REGULATORY_BAND_2_CHANNELS,
2297 EEPROM_REGULATORY_BAND_3_CHANNELS,
2298 EEPROM_REGULATORY_BAND_4_CHANNELS,
2299 EEPROM_REGULATORY_BAND_5_CHANNELS,
2300 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2301 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS},
2302 .acquire_semaphore = il4965_eeprom_acquire_semaphore,
2303 .release_semaphore = il4965_eeprom_release_semaphore,
2304 },
2305 .send_tx_power = il4965_send_tx_power,
2306 .update_chain_flags = il4965_update_chain_flags,
2307 .temp_ops = {
2308 .temperature = il4965_temperature_calib,
2309 },
2310 #ifdef CONFIG_IWLEGACY_DEBUGFS
2311 .debugfs_ops = {
2312 .rx_stats_read = il4965_ucode_rx_stats_read,
2313 .tx_stats_read = il4965_ucode_tx_stats_read,
2314 .general_stats_read = il4965_ucode_general_stats_read,
2315 },
2316 #endif
2317 };
2318
2319 static const struct il_legacy_ops il4965_legacy_ops = {
2320 .post_associate = il4965_post_associate,
2321 .config_ap = il4965_config_ap,
2322 .manage_ibss_station = il4965_manage_ibss_station,
2323 .update_bcast_stations = il4965_update_bcast_stations,
2324 };
2325
2326 const struct il_ops il4965_ops = {
2327 .lib = &il4965_lib,
2328 .hcmd = &il4965_hcmd,
2329 .utils = &il4965_hcmd_utils,
2330 .led = &il4965_led_ops,
2331 .legacy = &il4965_legacy_ops,
2332 };
2333
2334 struct il_cfg il4965_cfg = {
2335 .name = "Intel(R) Wireless WiFi Link 4965AGN",
2336 .fw_name_pre = IL4965_FW_PRE,
2337 .ucode_api_max = IL4965_UCODE_API_MAX,
2338 .ucode_api_min = IL4965_UCODE_API_MIN,
2339 .sku = IL_SKU_A | IL_SKU_G | IL_SKU_N,
2340 .valid_tx_ant = ANT_AB,
2341 .valid_rx_ant = ANT_ABC,
2342 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2343 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2344 .mod_params = &il4965_mod_params,
2345 .led_mode = IL_LED_BLINK,
2346 /*
2347 * Force use of chains B and C for scan RX on 5 GHz band
2348 * because the device has off-channel reception on chain A.
2349 */
2350 .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
2351
2352 .eeprom_size = IL4965_EEPROM_IMG_SIZE,
2353 .num_of_queues = IL49_NUM_QUEUES,
2354 .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
2355 .pll_cfg_val = 0,
2356 .set_l0s = true,
2357 .use_bsm = true,
2358 .led_compensation = 61,
2359 .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
2360 .wd_timeout = IL_DEF_WD_TIMEOUT,
2361 .temperature_kelvin = true,
2362 .ucode_tracing = true,
2363 .sensitivity_calib_by_driver = true,
2364 .chain_noise_calib_by_driver = true,
2365 };
2366
2367 /* Module firmware */
2368 MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));
kernel source for telekom puls (alcatel/mediatek)