1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
47 #include <net/mac80211.h>
49 #include <asm/div64.h>
51 #define DRV_NAME "iwl4965"
56 /******************************************************************************
60 ******************************************************************************/
63 * module name, copyright, version, etc.
65 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi 4965 driver for Linux"
67 #ifdef CONFIG_IWLEGACY_DEBUG
73 #define DRV_VERSION IWLWIFI_VERSION VD
75 MODULE_DESCRIPTION(DRV_DESCRIPTION
);
76 MODULE_VERSION(DRV_VERSION
);
77 MODULE_AUTHOR(DRV_COPYRIGHT
" " DRV_AUTHOR
);
78 MODULE_LICENSE("GPL");
79 MODULE_ALIAS("iwl4965");
82 il4965_check_abort_status(struct il_priv
*il
, u8 frame_count
, u32 status
)
84 if (frame_count
== 1 && status
== TX_STATUS_FAIL_RFKILL_FLUSH
) {
85 IL_ERR("Tx flush command to flush out all frames\n");
86 if (!test_bit(S_EXIT_PENDING
, &il
->status
))
87 queue_work(il
->workqueue
, &il
->tx_flush
);
94 struct il_mod_params il4965_mod_params
= {
97 /* the rest are 0 by default */
101 il4965_rx_queue_reset(struct il_priv
*il
, struct il_rx_queue
*rxq
)
105 spin_lock_irqsave(&rxq
->lock
, flags
);
106 INIT_LIST_HEAD(&rxq
->rx_free
);
107 INIT_LIST_HEAD(&rxq
->rx_used
);
108 /* Fill the rx_used queue with _all_ of the Rx buffers */
109 for (i
= 0; i
< RX_FREE_BUFFERS
+ RX_QUEUE_SIZE
; i
++) {
110 /* In the reset function, these buffers may have been allocated
111 * to an SKB, so we need to unmap and free potential storage */
112 if (rxq
->pool
[i
].page
!= NULL
) {
113 pci_unmap_page(il
->pci_dev
, rxq
->pool
[i
].page_dma
,
114 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
116 __il_free_pages(il
, rxq
->pool
[i
].page
);
117 rxq
->pool
[i
].page
= NULL
;
119 list_add_tail(&rxq
->pool
[i
].list
, &rxq
->rx_used
);
122 for (i
= 0; i
< RX_QUEUE_SIZE
; i
++)
123 rxq
->queue
[i
] = NULL
;
125 /* Set us so that we have processed and used all buffers, but have
126 * not restocked the Rx queue with fresh buffers */
127 rxq
->read
= rxq
->write
= 0;
128 rxq
->write_actual
= 0;
130 spin_unlock_irqrestore(&rxq
->lock
, flags
);
134 il4965_rx_init(struct il_priv
*il
, struct il_rx_queue
*rxq
)
137 const u32 rfdnlog
= RX_QUEUE_SIZE_LOG
; /* 256 RBDs */
140 if (il
->cfg
->mod_params
->amsdu_size_8K
)
141 rb_size
= FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K
;
143 rb_size
= FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K
;
146 il_wr(il
, FH49_MEM_RCSR_CHNL0_CONFIG_REG
, 0);
148 /* Reset driver's Rx queue write idx */
149 il_wr(il
, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG
, 0);
151 /* Tell device where to find RBD circular buffer in DRAM */
152 il_wr(il
, FH49_RSCSR_CHNL0_RBDCB_BASE_REG
, (u32
) (rxq
->bd_dma
>> 8));
154 /* Tell device where in DRAM to update its Rx status */
155 il_wr(il
, FH49_RSCSR_CHNL0_STTS_WPTR_REG
, rxq
->rb_stts_dma
>> 4);
158 * Direct rx interrupts to hosts
159 * Rx buffer size 4 or 8k
163 il_wr(il
, FH49_MEM_RCSR_CHNL0_CONFIG_REG
,
164 FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL
|
165 FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL
|
166 FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK
|
168 (rb_timeout
<< FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS
) |
169 (rfdnlog
<< FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS
));
171 /* Set interrupt coalescing timer to default (2048 usecs) */
172 il_write8(il
, CSR_INT_COALESCING
, IL_HOST_INT_TIMEOUT_DEF
);
178 il4965_set_pwr_vmain(struct il_priv
*il
)
181 * (for documentation purposes)
182 * to set power to V_AUX, do:
184 if (pci_pme_capable(il->pci_dev, PCI_D3cold))
185 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
186 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
187 ~APMG_PS_CTRL_MSK_PWR_SRC);
190 il_set_bits_mask_prph(il
, APMG_PS_CTRL_REG
,
191 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN
,
192 ~APMG_PS_CTRL_MSK_PWR_SRC
);
196 il4965_hw_nic_init(struct il_priv
*il
)
199 struct il_rx_queue
*rxq
= &il
->rxq
;
202 spin_lock_irqsave(&il
->lock
, flags
);
204 /* Set interrupt coalescing calibration timer to default (512 usecs) */
205 il_write8(il
, CSR_INT_COALESCING
, IL_HOST_INT_CALIB_TIMEOUT_DEF
);
206 spin_unlock_irqrestore(&il
->lock
, flags
);
208 il4965_set_pwr_vmain(il
);
209 il4965_nic_config(il
);
211 /* Allocate the RX queue, or reset if it is already allocated */
213 ret
= il_rx_queue_alloc(il
);
215 IL_ERR("Unable to initialize Rx queue\n");
219 il4965_rx_queue_reset(il
, rxq
);
221 il4965_rx_replenish(il
);
223 il4965_rx_init(il
, rxq
);
225 spin_lock_irqsave(&il
->lock
, flags
);
227 rxq
->need_update
= 1;
228 il_rx_queue_update_write_ptr(il
, rxq
);
230 spin_unlock_irqrestore(&il
->lock
, flags
);
232 /* Allocate or reset and init all Tx and Command queues */
234 ret
= il4965_txq_ctx_alloc(il
);
238 il4965_txq_ctx_reset(il
);
240 set_bit(S_INIT
, &il
->status
);
246 * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
249 il4965_dma_addr2rbd_ptr(struct il_priv
*il
, dma_addr_t dma_addr
)
251 return cpu_to_le32((u32
) (dma_addr
>> 8));
255 * il4965_rx_queue_restock - refill RX queue from pre-allocated pool
257 * If there are slots in the RX queue that need to be restocked,
258 * and we have free pre-allocated buffers, fill the ranks as much
259 * as we can, pulling from rx_free.
261 * This moves the 'write' idx forward to catch up with 'processed', and
262 * also updates the memory address in the firmware to reference the new
266 il4965_rx_queue_restock(struct il_priv
*il
)
268 struct il_rx_queue
*rxq
= &il
->rxq
;
269 struct list_head
*element
;
270 struct il_rx_buf
*rxb
;
273 spin_lock_irqsave(&rxq
->lock
, flags
);
274 while (il_rx_queue_space(rxq
) > 0 && rxq
->free_count
) {
275 /* The overwritten rxb must be a used one */
276 rxb
= rxq
->queue
[rxq
->write
];
277 BUG_ON(rxb
&& rxb
->page
);
279 /* Get next free Rx buffer, remove from free list */
280 element
= rxq
->rx_free
.next
;
281 rxb
= list_entry(element
, struct il_rx_buf
, list
);
284 /* Point to Rx buffer via next RBD in circular buffer */
285 rxq
->bd
[rxq
->write
] =
286 il4965_dma_addr2rbd_ptr(il
, rxb
->page_dma
);
287 rxq
->queue
[rxq
->write
] = rxb
;
288 rxq
->write
= (rxq
->write
+ 1) & RX_QUEUE_MASK
;
291 spin_unlock_irqrestore(&rxq
->lock
, flags
);
292 /* If the pre-allocated buffer pool is dropping low, schedule to
294 if (rxq
->free_count
<= RX_LOW_WATERMARK
)
295 queue_work(il
->workqueue
, &il
->rx_replenish
);
297 /* If we've added more space for the firmware to place data, tell it.
298 * Increment device's write pointer in multiples of 8. */
299 if (rxq
->write_actual
!= (rxq
->write
& ~0x7)) {
300 spin_lock_irqsave(&rxq
->lock
, flags
);
301 rxq
->need_update
= 1;
302 spin_unlock_irqrestore(&rxq
->lock
, flags
);
303 il_rx_queue_update_write_ptr(il
, rxq
);
308 * il4965_rx_replenish - Move all used packet from rx_used to rx_free
310 * When moving to rx_free an SKB is allocated for the slot.
312 * Also restock the Rx queue via il_rx_queue_restock.
313 * This is called as a scheduled work item (except for during initialization)
316 il4965_rx_allocate(struct il_priv
*il
, gfp_t priority
)
318 struct il_rx_queue
*rxq
= &il
->rxq
;
319 struct list_head
*element
;
320 struct il_rx_buf
*rxb
;
323 gfp_t gfp_mask
= priority
;
326 spin_lock_irqsave(&rxq
->lock
, flags
);
327 if (list_empty(&rxq
->rx_used
)) {
328 spin_unlock_irqrestore(&rxq
->lock
, flags
);
331 spin_unlock_irqrestore(&rxq
->lock
, flags
);
333 if (rxq
->free_count
> RX_LOW_WATERMARK
)
334 gfp_mask
|= __GFP_NOWARN
;
336 if (il
->hw_params
.rx_page_order
> 0)
337 gfp_mask
|= __GFP_COMP
;
339 /* Alloc a new receive buffer */
340 page
= alloc_pages(gfp_mask
, il
->hw_params
.rx_page_order
);
343 D_INFO("alloc_pages failed, " "order: %d\n",
344 il
->hw_params
.rx_page_order
);
346 if (rxq
->free_count
<= RX_LOW_WATERMARK
&&
348 IL_ERR("Failed to alloc_pages with %s. "
349 "Only %u free buffers remaining.\n",
351 GFP_ATOMIC
? "GFP_ATOMIC" : "GFP_KERNEL",
353 /* We don't reschedule replenish work here -- we will
354 * call the restock method and if it still needs
355 * more buffers it will schedule replenish */
359 spin_lock_irqsave(&rxq
->lock
, flags
);
361 if (list_empty(&rxq
->rx_used
)) {
362 spin_unlock_irqrestore(&rxq
->lock
, flags
);
363 __free_pages(page
, il
->hw_params
.rx_page_order
);
366 element
= rxq
->rx_used
.next
;
367 rxb
= list_entry(element
, struct il_rx_buf
, list
);
370 spin_unlock_irqrestore(&rxq
->lock
, flags
);
374 /* Get physical address of the RB */
376 pci_map_page(il
->pci_dev
, page
, 0,
377 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
379 /* dma address must be no more than 36 bits */
380 BUG_ON(rxb
->page_dma
& ~DMA_BIT_MASK(36));
381 /* and also 256 byte aligned! */
382 BUG_ON(rxb
->page_dma
& DMA_BIT_MASK(8));
384 spin_lock_irqsave(&rxq
->lock
, flags
);
386 list_add_tail(&rxb
->list
, &rxq
->rx_free
);
388 il
->alloc_rxb_page
++;
390 spin_unlock_irqrestore(&rxq
->lock
, flags
);
395 il4965_rx_replenish(struct il_priv
*il
)
399 il4965_rx_allocate(il
, GFP_KERNEL
);
401 spin_lock_irqsave(&il
->lock
, flags
);
402 il4965_rx_queue_restock(il
);
403 spin_unlock_irqrestore(&il
->lock
, flags
);
407 il4965_rx_replenish_now(struct il_priv
*il
)
409 il4965_rx_allocate(il
, GFP_ATOMIC
);
411 il4965_rx_queue_restock(il
);
414 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
415 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
416 * This free routine walks the list of POOL entries and if SKB is set to
417 * non NULL it is unmapped and freed
420 il4965_rx_queue_free(struct il_priv
*il
, struct il_rx_queue
*rxq
)
423 for (i
= 0; i
< RX_QUEUE_SIZE
+ RX_FREE_BUFFERS
; i
++) {
424 if (rxq
->pool
[i
].page
!= NULL
) {
425 pci_unmap_page(il
->pci_dev
, rxq
->pool
[i
].page_dma
,
426 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
428 __il_free_pages(il
, rxq
->pool
[i
].page
);
429 rxq
->pool
[i
].page
= NULL
;
433 dma_free_coherent(&il
->pci_dev
->dev
, 4 * RX_QUEUE_SIZE
, rxq
->bd
,
435 dma_free_coherent(&il
->pci_dev
->dev
, sizeof(struct il_rb_status
),
436 rxq
->rb_stts
, rxq
->rb_stts_dma
);
442 il4965_rxq_stop(struct il_priv
*il
)
446 _il_wr(il
, FH49_MEM_RCSR_CHNL0_CONFIG_REG
, 0);
447 ret
= _il_poll_bit(il
, FH49_MEM_RSSR_RX_STATUS_REG
,
448 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
,
449 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
,
452 IL_ERR("Can't stop Rx DMA.\n");
458 il4965_hwrate_to_mac80211_idx(u32 rate_n_flags
, enum ieee80211_band band
)
463 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
464 if (rate_n_flags
& RATE_MCS_HT_MSK
) {
465 idx
= (rate_n_flags
& 0xff);
467 /* Legacy rate format, search for match in table */
469 if (band
== IEEE80211_BAND_5GHZ
)
470 band_offset
= IL_FIRST_OFDM_RATE
;
471 for (idx
= band_offset
; idx
< RATE_COUNT_LEGACY
; idx
++)
472 if (il_rates
[idx
].plcp
== (rate_n_flags
& 0xFF))
473 return idx
- band_offset
;
480 il4965_calc_rssi(struct il_priv
*il
, struct il_rx_phy_res
*rx_resp
)
482 /* data from PHY/DSP regarding signal strength, etc.,
483 * contents are always there, not configurable by host. */
484 struct il4965_rx_non_cfg_phy
*ncphy
=
485 (struct il4965_rx_non_cfg_phy
*)rx_resp
->non_cfg_phy_buf
;
487 (le16_to_cpu(ncphy
->agc_info
) & IL49_AGC_DB_MASK
) >>
491 (le16_to_cpu(rx_resp
->phy_flags
) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK
)
492 >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET
;
496 /* Find max rssi among 3 possible receivers.
497 * These values are measured by the digital signal processor (DSP).
498 * They should stay fairly constant even as the signal strength varies,
499 * if the radio's automatic gain control (AGC) is working right.
500 * AGC value (see below) will provide the "interesting" info. */
501 for (i
= 0; i
< 3; i
++)
502 if (valid_antennae
& (1 << i
))
503 max_rssi
= max(ncphy
->rssi_info
[i
<< 1], max_rssi
);
505 D_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
506 ncphy
->rssi_info
[0], ncphy
->rssi_info
[2], ncphy
->rssi_info
[4],
509 /* dBm = max_rssi dB - agc dB - constant.
510 * Higher AGC (higher radio gain) means lower signal. */
511 return max_rssi
- agc
- IL4965_RSSI_OFFSET
;
515 il4965_translate_rx_status(struct il_priv
*il
, u32 decrypt_in
)
519 if ((decrypt_in
& RX_RES_STATUS_STATION_FOUND
) ==
520 RX_RES_STATUS_STATION_FOUND
)
522 (RX_RES_STATUS_STATION_FOUND
|
523 RX_RES_STATUS_NO_STATION_INFO_MISMATCH
);
525 decrypt_out
|= (decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
);
527 /* packet was not encrypted */
528 if ((decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) ==
529 RX_RES_STATUS_SEC_TYPE_NONE
)
532 /* packet was encrypted with unknown alg */
533 if ((decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) ==
534 RX_RES_STATUS_SEC_TYPE_ERR
)
537 /* decryption was not done in HW */
538 if ((decrypt_in
& RX_MPDU_RES_STATUS_DEC_DONE_MSK
) !=
539 RX_MPDU_RES_STATUS_DEC_DONE_MSK
)
542 switch (decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) {
544 case RX_RES_STATUS_SEC_TYPE_CCMP
:
545 /* alg is CCM: check MIC only */
546 if (!(decrypt_in
& RX_MPDU_RES_STATUS_MIC_OK
))
548 decrypt_out
|= RX_RES_STATUS_BAD_ICV_MIC
;
550 decrypt_out
|= RX_RES_STATUS_DECRYPT_OK
;
554 case RX_RES_STATUS_SEC_TYPE_TKIP
:
555 if (!(decrypt_in
& RX_MPDU_RES_STATUS_TTAK_OK
)) {
557 decrypt_out
|= RX_RES_STATUS_BAD_KEY_TTAK
;
560 /* fall through if TTAK OK */
562 if (!(decrypt_in
& RX_MPDU_RES_STATUS_ICV_OK
))
563 decrypt_out
|= RX_RES_STATUS_BAD_ICV_MIC
;
565 decrypt_out
|= RX_RES_STATUS_DECRYPT_OK
;
569 D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", decrypt_in
, decrypt_out
);
575 il4965_pass_packet_to_mac80211(struct il_priv
*il
, struct ieee80211_hdr
*hdr
,
576 u16 len
, u32 ampdu_status
, struct il_rx_buf
*rxb
,
577 struct ieee80211_rx_status
*stats
)
580 __le16 fc
= hdr
->frame_control
;
582 /* We only process data packets if the interface is open */
583 if (unlikely(!il
->is_open
)) {
584 D_DROP("Dropping packet while interface is not open.\n");
588 /* In case of HW accelerated crypto and bad decryption, drop */
589 if (!il
->cfg
->mod_params
->sw_crypto
&&
590 il_set_decrypted_flag(il
, hdr
, ampdu_status
, stats
))
593 skb
= dev_alloc_skb(128);
595 IL_ERR("dev_alloc_skb failed\n");
599 skb_add_rx_frag(skb
, 0, rxb
->page
, (void *)hdr
- rxb_addr(rxb
), len
,
602 il_update_stats(il
, false, fc
, len
);
603 memcpy(IEEE80211_SKB_RXCB(skb
), stats
, sizeof(*stats
));
605 ieee80211_rx(il
->hw
, skb
);
606 il
->alloc_rxb_page
--;
610 /* Called for N_RX (legacy ABG frames), or
611 * N_RX_MPDU (HT high-throughput N frames). */
613 il4965_hdl_rx(struct il_priv
*il
, struct il_rx_buf
*rxb
)
615 struct ieee80211_hdr
*header
;
616 struct ieee80211_rx_status rx_status
;
617 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
618 struct il_rx_phy_res
*phy_res
;
619 __le32 rx_pkt_status
;
620 struct il_rx_mpdu_res_start
*amsdu
;
626 * N_RX and N_RX_MPDU are handled differently.
627 * N_RX: physical layer info is in this buffer
628 * N_RX_MPDU: physical layer info was sent in separate
629 * command and cached in il->last_phy_res
631 * Here we set up local variables depending on which command is
634 if (pkt
->hdr
.cmd
== N_RX
) {
635 phy_res
= (struct il_rx_phy_res
*)pkt
->u
.raw
;
637 (struct ieee80211_hdr
*)(pkt
->u
.raw
+ sizeof(*phy_res
) +
638 phy_res
->cfg_phy_cnt
);
640 len
= le16_to_cpu(phy_res
->byte_count
);
642 *(__le32
*) (pkt
->u
.raw
+ sizeof(*phy_res
) +
643 phy_res
->cfg_phy_cnt
+ len
);
644 ampdu_status
= le32_to_cpu(rx_pkt_status
);
646 if (!il
->_4965
.last_phy_res_valid
) {
647 IL_ERR("MPDU frame without cached PHY data\n");
650 phy_res
= &il
->_4965
.last_phy_res
;
651 amsdu
= (struct il_rx_mpdu_res_start
*)pkt
->u
.raw
;
652 header
= (struct ieee80211_hdr
*)(pkt
->u
.raw
+ sizeof(*amsdu
));
653 len
= le16_to_cpu(amsdu
->byte_count
);
654 rx_pkt_status
= *(__le32
*) (pkt
->u
.raw
+ sizeof(*amsdu
) + len
);
656 il4965_translate_rx_status(il
, le32_to_cpu(rx_pkt_status
));
659 if ((unlikely(phy_res
->cfg_phy_cnt
> 20))) {
660 D_DROP("dsp size out of range [0,20]: %d/n",
661 phy_res
->cfg_phy_cnt
);
665 if (!(rx_pkt_status
& RX_RES_STATUS_NO_CRC32_ERROR
) ||
666 !(rx_pkt_status
& RX_RES_STATUS_NO_RXE_OVERFLOW
)) {
667 D_RX("Bad CRC or FIFO: 0x%08X.\n", le32_to_cpu(rx_pkt_status
));
671 /* This will be used in several places later */
672 rate_n_flags
= le32_to_cpu(phy_res
->rate_n_flags
);
674 /* rx_status carries information about the packet to mac80211 */
675 rx_status
.mactime
= le64_to_cpu(phy_res
->timestamp
);
678 phy_flags
& RX_RES_PHY_FLAGS_BAND_24_MSK
) ? IEEE80211_BAND_2GHZ
:
681 ieee80211_channel_to_frequency(le16_to_cpu(phy_res
->channel
),
684 il4965_hwrate_to_mac80211_idx(rate_n_flags
, rx_status
.band
);
687 /* TSF isn't reliable. In order to allow smooth user experience,
688 * this W/A doesn't propagate it to the mac80211 */
689 /*rx_status.flag |= RX_FLAG_MACTIME_MPDU; */
691 il
->ucode_beacon_time
= le32_to_cpu(phy_res
->beacon_time_stamp
);
693 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
694 rx_status
.signal
= il4965_calc_rssi(il
, phy_res
);
696 D_STATS("Rssi %d, TSF %llu\n", rx_status
.signal
,
697 (unsigned long long)rx_status
.mactime
);
702 * It seems that the antenna field in the phy flags value
703 * is actually a bit field. This is undefined by radiotap,
704 * it wants an actual antenna number but I always get "7"
705 * for most legacy frames I receive indicating that the
706 * same frame was received on all three RX chains.
708 * I think this field should be removed in favor of a
709 * new 802.11n radiotap field "RX chains" that is defined
713 (le16_to_cpu(phy_res
->phy_flags
) & RX_RES_PHY_FLAGS_ANTENNA_MSK
) >>
714 RX_RES_PHY_FLAGS_ANTENNA_POS
;
716 /* set the preamble flag if appropriate */
717 if (phy_res
->phy_flags
& RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK
)
718 rx_status
.flag
|= RX_FLAG_SHORTPRE
;
720 /* Set up the HT phy flags */
721 if (rate_n_flags
& RATE_MCS_HT_MSK
)
722 rx_status
.flag
|= RX_FLAG_HT
;
723 if (rate_n_flags
& RATE_MCS_HT40_MSK
)
724 rx_status
.flag
|= RX_FLAG_40MHZ
;
725 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
726 rx_status
.flag
|= RX_FLAG_SHORT_GI
;
728 il4965_pass_packet_to_mac80211(il
, header
, len
, ampdu_status
, rxb
,
732 /* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY).
733 * This will be used later in il_hdl_rx() for N_RX_MPDU. */
735 il4965_hdl_rx_phy(struct il_priv
*il
, struct il_rx_buf
*rxb
)
737 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
738 il
->_4965
.last_phy_res_valid
= true;
739 memcpy(&il
->_4965
.last_phy_res
, pkt
->u
.raw
,
740 sizeof(struct il_rx_phy_res
));
744 il4965_get_channels_for_scan(struct il_priv
*il
, struct ieee80211_vif
*vif
,
745 enum ieee80211_band band
, u8 is_active
,
746 u8 n_probes
, struct il_scan_channel
*scan_ch
)
748 struct ieee80211_channel
*chan
;
749 const struct ieee80211_supported_band
*sband
;
750 const struct il_channel_info
*ch_info
;
751 u16 passive_dwell
= 0;
752 u16 active_dwell
= 0;
756 sband
= il_get_hw_mode(il
, band
);
760 active_dwell
= il_get_active_dwell_time(il
, band
, n_probes
);
761 passive_dwell
= il_get_passive_dwell_time(il
, band
, vif
);
763 if (passive_dwell
<= active_dwell
)
764 passive_dwell
= active_dwell
+ 1;
766 for (i
= 0, added
= 0; i
< il
->scan_request
->n_channels
; i
++) {
767 chan
= il
->scan_request
->channels
[i
];
769 if (chan
->band
!= band
)
772 channel
= chan
->hw_value
;
773 scan_ch
->channel
= cpu_to_le16(channel
);
775 ch_info
= il_get_channel_info(il
, band
, channel
);
776 if (!il_is_channel_valid(ch_info
)) {
777 D_SCAN("Channel %d is INVALID for this band.\n",
782 if (!is_active
|| il_is_channel_passive(ch_info
) ||
783 (chan
->flags
& IEEE80211_CHAN_PASSIVE_SCAN
))
784 scan_ch
->type
= SCAN_CHANNEL_TYPE_PASSIVE
;
786 scan_ch
->type
= SCAN_CHANNEL_TYPE_ACTIVE
;
789 scan_ch
->type
|= IL_SCAN_PROBE_MASK(n_probes
);
791 scan_ch
->active_dwell
= cpu_to_le16(active_dwell
);
792 scan_ch
->passive_dwell
= cpu_to_le16(passive_dwell
);
794 /* Set txpower levels to defaults */
795 scan_ch
->dsp_atten
= 110;
797 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
799 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
801 if (band
== IEEE80211_BAND_5GHZ
)
802 scan_ch
->tx_gain
= ((1 << 5) | (3 << 3)) | 3;
804 scan_ch
->tx_gain
= ((1 << 5) | (5 << 3));
806 D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", channel
,
807 le32_to_cpu(scan_ch
->type
),
809 type
& SCAN_CHANNEL_TYPE_ACTIVE
) ? "ACTIVE" : "PASSIVE",
811 type
& SCAN_CHANNEL_TYPE_ACTIVE
) ? active_dwell
:
818 D_SCAN("total channels to scan %d\n", added
);
823 il4965_toggle_tx_ant(struct il_priv
*il
, u8
*ant
, u8 valid
)
828 for (i
= 0; i
< RATE_ANT_NUM
- 1; i
++) {
829 ind
= (ind
+ 1) < RATE_ANT_NUM
? ind
+ 1 : 0;
830 if (valid
& BIT(ind
)) {
838 il4965_request_scan(struct il_priv
*il
, struct ieee80211_vif
*vif
)
840 struct il_host_cmd cmd
= {
842 .len
= sizeof(struct il_scan_cmd
),
843 .flags
= CMD_SIZE_HUGE
,
845 struct il_scan_cmd
*scan
;
849 enum ieee80211_band band
;
851 u8 rx_ant
= il
->hw_params
.valid_rx_ant
;
853 bool is_active
= false;
856 u8 scan_tx_antennas
= il
->hw_params
.valid_tx_ant
;
859 lockdep_assert_held(&il
->mutex
);
863 kmalloc(sizeof(struct il_scan_cmd
) + IL_MAX_SCAN_SIZE
,
866 D_SCAN("fail to allocate memory for scan\n");
871 memset(scan
, 0, sizeof(struct il_scan_cmd
) + IL_MAX_SCAN_SIZE
);
873 scan
->quiet_plcp_th
= IL_PLCP_QUIET_THRESH
;
874 scan
->quiet_time
= IL_ACTIVE_QUIET_TIME
;
876 if (il_is_any_associated(il
)) {
879 u32 suspend_time
= 100;
880 u32 scan_suspend_time
= 100;
882 D_INFO("Scanning while associated...\n");
883 interval
= vif
->bss_conf
.beacon_int
;
885 scan
->suspend_time
= 0;
886 scan
->max_out_time
= cpu_to_le32(200 * 1024);
888 interval
= suspend_time
;
890 extra
= (suspend_time
/ interval
) << 22;
892 (extra
| ((suspend_time
% interval
) * 1024));
893 scan
->suspend_time
= cpu_to_le32(scan_suspend_time
);
894 D_SCAN("suspend_time 0x%X beacon interval %d\n",
895 scan_suspend_time
, interval
);
898 if (il
->scan_request
->n_ssids
) {
900 D_SCAN("Kicking off active scan\n");
901 for (i
= 0; i
< il
->scan_request
->n_ssids
; i
++) {
902 /* always does wildcard anyway */
903 if (!il
->scan_request
->ssids
[i
].ssid_len
)
905 scan
->direct_scan
[p
].id
= WLAN_EID_SSID
;
906 scan
->direct_scan
[p
].len
=
907 il
->scan_request
->ssids
[i
].ssid_len
;
908 memcpy(scan
->direct_scan
[p
].ssid
,
909 il
->scan_request
->ssids
[i
].ssid
,
910 il
->scan_request
->ssids
[i
].ssid_len
);
916 D_SCAN("Start passive scan.\n");
918 scan
->tx_cmd
.tx_flags
= TX_CMD_FLG_SEQ_CTL_MSK
;
919 scan
->tx_cmd
.sta_id
= il
->hw_params
.bcast_id
;
920 scan
->tx_cmd
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
922 switch (il
->scan_band
) {
923 case IEEE80211_BAND_2GHZ
:
924 scan
->flags
= RXON_FLG_BAND_24G_MSK
| RXON_FLG_AUTO_DETECT_MSK
;
926 le32_to_cpu(il
->active
.flags
& RXON_FLG_CHANNEL_MODE_MSK
) >>
927 RXON_FLG_CHANNEL_MODE_POS
;
928 if (chan_mod
== CHANNEL_MODE_PURE_40
) {
932 rate_flags
= RATE_MCS_CCK_MSK
;
935 case IEEE80211_BAND_5GHZ
:
939 IL_WARN("Invalid scan band\n");
944 * If active scanning is requested but a certain channel is
945 * marked passive, we can do active scanning if we detect
948 * There is an issue with some firmware versions that triggers
949 * a sysassert on a "good CRC threshold" of zero (== disabled),
950 * on a radar channel even though this means that we should NOT
953 * The "good CRC threshold" is the number of frames that we
954 * need to receive during our dwell time on a channel before
955 * sending out probes -- setting this to a huge value will
956 * mean we never reach it, but at the same time work around
957 * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER
958 * here instead of IL_GOOD_CRC_TH_DISABLED.
961 is_active
? IL_GOOD_CRC_TH_DEFAULT
: IL_GOOD_CRC_TH_NEVER
;
963 band
= il
->scan_band
;
965 if (il
->cfg
->scan_rx_antennas
[band
])
966 rx_ant
= il
->cfg
->scan_rx_antennas
[band
];
968 il4965_toggle_tx_ant(il
, &il
->scan_tx_ant
[band
], scan_tx_antennas
);
969 rate_flags
|= BIT(il
->scan_tx_ant
[band
]) << RATE_MCS_ANT_POS
;
970 scan
->tx_cmd
.rate_n_flags
= cpu_to_le32(rate
| rate_flags
);
972 /* In power save mode use one chain, otherwise use all chains */
973 if (test_bit(S_POWER_PMI
, &il
->status
)) {
974 /* rx_ant has been set to all valid chains previously */
976 rx_ant
& ((u8
) (il
->chain_noise_data
.active_chains
));
978 active_chains
= rx_ant
;
980 D_SCAN("chain_noise_data.active_chains: %u\n",
981 il
->chain_noise_data
.active_chains
);
983 rx_ant
= il4965_first_antenna(active_chains
);
986 /* MIMO is not used here, but value is required */
987 rx_chain
|= il
->hw_params
.valid_rx_ant
<< RXON_RX_CHAIN_VALID_POS
;
988 rx_chain
|= rx_ant
<< RXON_RX_CHAIN_FORCE_MIMO_SEL_POS
;
989 rx_chain
|= rx_ant
<< RXON_RX_CHAIN_FORCE_SEL_POS
;
990 rx_chain
|= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS
;
991 scan
->rx_chain
= cpu_to_le16(rx_chain
);
994 il_fill_probe_req(il
, (struct ieee80211_mgmt
*)scan
->data
,
995 vif
->addr
, il
->scan_request
->ie
,
996 il
->scan_request
->ie_len
,
997 IL_MAX_SCAN_SIZE
- sizeof(*scan
));
998 scan
->tx_cmd
.len
= cpu_to_le16(cmd_len
);
1000 scan
->filter_flags
|=
1001 (RXON_FILTER_ACCEPT_GRP_MSK
| RXON_FILTER_BCON_AWARE_MSK
);
1003 scan
->channel_count
=
1004 il4965_get_channels_for_scan(il
, vif
, band
, is_active
, n_probes
,
1005 (void *)&scan
->data
[cmd_len
]);
1006 if (scan
->channel_count
== 0) {
1007 D_SCAN("channel count %d\n", scan
->channel_count
);
1012 le16_to_cpu(scan
->tx_cmd
.len
) +
1013 scan
->channel_count
* sizeof(struct il_scan_channel
);
1015 scan
->len
= cpu_to_le16(cmd
.len
);
1017 set_bit(S_SCAN_HW
, &il
->status
);
1019 ret
= il_send_cmd_sync(il
, &cmd
);
1021 clear_bit(S_SCAN_HW
, &il
->status
);
1027 il4965_manage_ibss_station(struct il_priv
*il
, struct ieee80211_vif
*vif
,
1030 struct il_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
1033 return il4965_add_bssid_station(il
, vif
->bss_conf
.bssid
,
1034 &vif_priv
->ibss_bssid_sta_id
);
1035 return il_remove_station(il
, vif_priv
->ibss_bssid_sta_id
,
1036 vif
->bss_conf
.bssid
);
1040 il4965_free_tfds_in_queue(struct il_priv
*il
, int sta_id
, int tid
, int freed
)
1042 lockdep_assert_held(&il
->sta_lock
);
1044 if (il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
>= freed
)
1045 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
1047 D_TX("free more than tfds_in_queue (%u:%d)\n",
1048 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
, freed
);
1049 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
= 0;
1053 #define IL_TX_QUEUE_MSK 0xfffff
1056 il4965_is_single_rx_stream(struct il_priv
*il
)
1058 return il
->current_ht_config
.smps
== IEEE80211_SMPS_STATIC
||
1059 il
->current_ht_config
.single_chain_sufficient
;
1062 #define IL_NUM_RX_CHAINS_MULTIPLE 3
1063 #define IL_NUM_RX_CHAINS_SINGLE 2
1064 #define IL_NUM_IDLE_CHAINS_DUAL 2
1065 #define IL_NUM_IDLE_CHAINS_SINGLE 1
1068 * Determine how many receiver/antenna chains to use.
1070 * More provides better reception via diversity. Fewer saves power
1071 * at the expense of throughput, but only when not in powersave to
1074 * MIMO (dual stream) requires at least 2, but works better with 3.
1075 * This does not determine *which* chains to use, just how many.
1078 il4965_get_active_rx_chain_count(struct il_priv
*il
)
1080 /* # of Rx chains to use when expecting MIMO. */
1081 if (il4965_is_single_rx_stream(il
))
1082 return IL_NUM_RX_CHAINS_SINGLE
;
1084 return IL_NUM_RX_CHAINS_MULTIPLE
;
1088 * When we are in power saving mode, unless device support spatial
1089 * multiplexing power save, use the active count for rx chain count.
1092 il4965_get_idle_rx_chain_count(struct il_priv
*il
, int active_cnt
)
1094 /* # Rx chains when idling, depending on SMPS mode */
1095 switch (il
->current_ht_config
.smps
) {
1096 case IEEE80211_SMPS_STATIC
:
1097 case IEEE80211_SMPS_DYNAMIC
:
1098 return IL_NUM_IDLE_CHAINS_SINGLE
;
1099 case IEEE80211_SMPS_OFF
:
1102 WARN(1, "invalid SMPS mode %d", il
->current_ht_config
.smps
);
1107 /* up to 4 chains */
1109 il4965_count_chain_bitmap(u32 chain_bitmap
)
1112 res
= (chain_bitmap
& BIT(0)) >> 0;
1113 res
+= (chain_bitmap
& BIT(1)) >> 1;
1114 res
+= (chain_bitmap
& BIT(2)) >> 2;
1115 res
+= (chain_bitmap
& BIT(3)) >> 3;
1120 * il4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1122 * Selects how many and which Rx receivers/antennas/chains to use.
1123 * This should not be used for scan command ... it puts data in wrong place.
1126 il4965_set_rxon_chain(struct il_priv
*il
)
1128 bool is_single
= il4965_is_single_rx_stream(il
);
1129 bool is_cam
= !test_bit(S_POWER_PMI
, &il
->status
);
1130 u8 idle_rx_cnt
, active_rx_cnt
, valid_rx_cnt
;
1134 /* Tell uCode which antennas are actually connected.
1135 * Before first association, we assume all antennas are connected.
1136 * Just after first association, il4965_chain_noise_calibration()
1137 * checks which antennas actually *are* connected. */
1138 if (il
->chain_noise_data
.active_chains
)
1139 active_chains
= il
->chain_noise_data
.active_chains
;
1141 active_chains
= il
->hw_params
.valid_rx_ant
;
1143 rx_chain
= active_chains
<< RXON_RX_CHAIN_VALID_POS
;
1145 /* How many receivers should we use? */
1146 active_rx_cnt
= il4965_get_active_rx_chain_count(il
);
1147 idle_rx_cnt
= il4965_get_idle_rx_chain_count(il
, active_rx_cnt
);
1149 /* correct rx chain count according hw settings
1150 * and chain noise calibration
1152 valid_rx_cnt
= il4965_count_chain_bitmap(active_chains
);
1153 if (valid_rx_cnt
< active_rx_cnt
)
1154 active_rx_cnt
= valid_rx_cnt
;
1156 if (valid_rx_cnt
< idle_rx_cnt
)
1157 idle_rx_cnt
= valid_rx_cnt
;
1159 rx_chain
|= active_rx_cnt
<< RXON_RX_CHAIN_MIMO_CNT_POS
;
1160 rx_chain
|= idle_rx_cnt
<< RXON_RX_CHAIN_CNT_POS
;
1162 il
->staging
.rx_chain
= cpu_to_le16(rx_chain
);
1164 if (!is_single
&& active_rx_cnt
>= IL_NUM_RX_CHAINS_SINGLE
&& is_cam
)
1165 il
->staging
.rx_chain
|= RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1167 il
->staging
.rx_chain
&= ~RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1169 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", il
->staging
.rx_chain
,
1170 active_rx_cnt
, idle_rx_cnt
);
1172 WARN_ON(active_rx_cnt
== 0 || idle_rx_cnt
== 0 ||
1173 active_rx_cnt
< idle_rx_cnt
);
1177 il4965_get_fh_string(int cmd
)
1180 IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG
);
1181 IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG
);
1182 IL_CMD(FH49_RSCSR_CHNL0_WPTR
);
1183 IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG
);
1184 IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG
);
1185 IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG
);
1186 IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV
);
1187 IL_CMD(FH49_TSSR_TX_STATUS_REG
);
1188 IL_CMD(FH49_TSSR_TX_ERROR_REG
);
1195 il4965_dump_fh(struct il_priv
*il
, char **buf
, bool display
)
1198 #ifdef CONFIG_IWLEGACY_DEBUG
1202 static const u32 fh_tbl
[] = {
1203 FH49_RSCSR_CHNL0_STTS_WPTR_REG
,
1204 FH49_RSCSR_CHNL0_RBDCB_BASE_REG
,
1205 FH49_RSCSR_CHNL0_WPTR
,
1206 FH49_MEM_RCSR_CHNL0_CONFIG_REG
,
1207 FH49_MEM_RSSR_SHARED_CTRL_REG
,
1208 FH49_MEM_RSSR_RX_STATUS_REG
,
1209 FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV
,
1210 FH49_TSSR_TX_STATUS_REG
,
1211 FH49_TSSR_TX_ERROR_REG
1213 #ifdef CONFIG_IWLEGACY_DEBUG
1215 bufsz
= ARRAY_SIZE(fh_tbl
) * 48 + 40;
1216 *buf
= kmalloc(bufsz
, GFP_KERNEL
);
1220 scnprintf(*buf
+ pos
, bufsz
- pos
, "FH register values:\n");
1221 for (i
= 0; i
< ARRAY_SIZE(fh_tbl
); i
++) {
1223 scnprintf(*buf
+ pos
, bufsz
- pos
,
1225 il4965_get_fh_string(fh_tbl
[i
]),
1226 il_rd(il
, fh_tbl
[i
]));
1231 IL_ERR("FH register values:\n");
1232 for (i
= 0; i
< ARRAY_SIZE(fh_tbl
); i
++) {
1233 IL_ERR(" %34s: 0X%08x\n", il4965_get_fh_string(fh_tbl
[i
]),
1234 il_rd(il
, fh_tbl
[i
]));
1240 il4965_hdl_missed_beacon(struct il_priv
*il
, struct il_rx_buf
*rxb
)
1242 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
1243 struct il_missed_beacon_notif
*missed_beacon
;
1245 missed_beacon
= &pkt
->u
.missed_beacon
;
1246 if (le32_to_cpu(missed_beacon
->consecutive_missed_beacons
) >
1247 il
->missed_beacon_threshold
) {
1248 D_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
1249 le32_to_cpu(missed_beacon
->consecutive_missed_beacons
),
1250 le32_to_cpu(missed_beacon
->total_missed_becons
),
1251 le32_to_cpu(missed_beacon
->num_recvd_beacons
),
1252 le32_to_cpu(missed_beacon
->num_expected_beacons
));
1253 if (!test_bit(S_SCANNING
, &il
->status
))
1254 il4965_init_sensitivity(il
);
1258 /* Calculate noise level, based on measurements during network silence just
1259 * before arriving beacon. This measurement can be done only if we know
1260 * exactly when to expect beacons, therefore only when we're associated. */
1262 il4965_rx_calc_noise(struct il_priv
*il
)
1264 struct stats_rx_non_phy
*rx_info
;
1265 int num_active_rx
= 0;
1266 int total_silence
= 0;
1267 int bcn_silence_a
, bcn_silence_b
, bcn_silence_c
;
1270 rx_info
= &(il
->_4965
.stats
.rx
.general
);
1272 le32_to_cpu(rx_info
->beacon_silence_rssi_a
) & IN_BAND_FILTER
;
1274 le32_to_cpu(rx_info
->beacon_silence_rssi_b
) & IN_BAND_FILTER
;
1276 le32_to_cpu(rx_info
->beacon_silence_rssi_c
) & IN_BAND_FILTER
;
1278 if (bcn_silence_a
) {
1279 total_silence
+= bcn_silence_a
;
1282 if (bcn_silence_b
) {
1283 total_silence
+= bcn_silence_b
;
1286 if (bcn_silence_c
) {
1287 total_silence
+= bcn_silence_c
;
1291 /* Average among active antennas */
1293 last_rx_noise
= (total_silence
/ num_active_rx
) - 107;
1295 last_rx_noise
= IL_NOISE_MEAS_NOT_AVAILABLE
;
1297 D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", bcn_silence_a
,
1298 bcn_silence_b
, bcn_silence_c
, last_rx_noise
);
1301 #ifdef CONFIG_IWLEGACY_DEBUGFS
1303 * based on the assumption of all stats counter are in DWORD
1304 * FIXME: This function is for debugging, do not deal with
1305 * the case of counters roll-over.
1308 il4965_accumulative_stats(struct il_priv
*il
, __le32
* stats
)
1313 u32
*delta
, *max_delta
;
1314 struct stats_general_common
*general
, *accum_general
;
1315 struct stats_tx
*tx
, *accum_tx
;
1317 prev_stats
= (__le32
*) &il
->_4965
.stats
;
1318 accum_stats
= (u32
*) &il
->_4965
.accum_stats
;
1319 size
= sizeof(struct il_notif_stats
);
1320 general
= &il
->_4965
.stats
.general
.common
;
1321 accum_general
= &il
->_4965
.accum_stats
.general
.common
;
1322 tx
= &il
->_4965
.stats
.tx
;
1323 accum_tx
= &il
->_4965
.accum_stats
.tx
;
1324 delta
= (u32
*) &il
->_4965
.delta_stats
;
1325 max_delta
= (u32
*) &il
->_4965
.max_delta
;
1327 for (i
= sizeof(__le32
); i
< size
;
1329 sizeof(__le32
), stats
++, prev_stats
++, delta
++, max_delta
++,
1331 if (le32_to_cpu(*stats
) > le32_to_cpu(*prev_stats
)) {
1333 (le32_to_cpu(*stats
) - le32_to_cpu(*prev_stats
));
1334 *accum_stats
+= *delta
;
1335 if (*delta
> *max_delta
)
1336 *max_delta
= *delta
;
1340 /* reset accumulative stats for "no-counter" type stats */
1341 accum_general
->temperature
= general
->temperature
;
1342 accum_general
->ttl_timestamp
= general
->ttl_timestamp
;
1347 il4965_hdl_stats(struct il_priv
*il
, struct il_rx_buf
*rxb
)
1349 const int recalib_seconds
= 60;
1351 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
1353 D_RX("Statistics notification received (%d vs %d).\n",
1354 (int)sizeof(struct il_notif_stats
),
1355 le32_to_cpu(pkt
->len_n_flags
) & IL_RX_FRAME_SIZE_MSK
);
1358 ((il
->_4965
.stats
.general
.common
.temperature
!=
1359 pkt
->u
.stats
.general
.common
.temperature
) ||
1360 ((il
->_4965
.stats
.flag
& STATS_REPLY_FLG_HT40_MODE_MSK
) !=
1361 (pkt
->u
.stats
.flag
& STATS_REPLY_FLG_HT40_MODE_MSK
)));
1362 #ifdef CONFIG_IWLEGACY_DEBUGFS
1363 il4965_accumulative_stats(il
, (__le32
*) &pkt
->u
.stats
);
1366 /* TODO: reading some of stats is unneeded */
1367 memcpy(&il
->_4965
.stats
, &pkt
->u
.stats
, sizeof(il
->_4965
.stats
));
1369 set_bit(S_STATS
, &il
->status
);
1372 * Reschedule the stats timer to occur in recalib_seconds to ensure
1373 * we get a thermal update even if the uCode doesn't give us one
1375 mod_timer(&il
->stats_periodic
,
1376 jiffies
+ msecs_to_jiffies(recalib_seconds
* 1000));
1378 if (unlikely(!test_bit(S_SCANNING
, &il
->status
)) &&
1379 (pkt
->hdr
.cmd
== N_STATS
)) {
1380 il4965_rx_calc_noise(il
);
1381 queue_work(il
->workqueue
, &il
->run_time_calib_work
);
1385 il4965_temperature_calib(il
);
1389 il4965_hdl_c_stats(struct il_priv
*il
, struct il_rx_buf
*rxb
)
1391 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
1393 if (le32_to_cpu(pkt
->u
.stats
.flag
) & UCODE_STATS_CLEAR_MSK
) {
1394 #ifdef CONFIG_IWLEGACY_DEBUGFS
1395 memset(&il
->_4965
.accum_stats
, 0,
1396 sizeof(struct il_notif_stats
));
1397 memset(&il
->_4965
.delta_stats
, 0,
1398 sizeof(struct il_notif_stats
));
1399 memset(&il
->_4965
.max_delta
, 0, sizeof(struct il_notif_stats
));
1401 D_RX("Statistics have been cleared\n");
1403 il4965_hdl_stats(il
, rxb
);
1408 * mac80211 queues, ACs, hardware queues, FIFOs.
1410 * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
1412 * Mac80211 uses the following numbers, which we get as from it
1413 * by way of skb_get_queue_mapping(skb):
1421 * Regular (not A-MPDU) frames are put into hardware queues corresponding
1422 * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
1423 * own queue per aggregation session (RA/TID combination), such queues are
1424 * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
1425 * order to map frames to the right queue, we also need an AC->hw queue
1426 * mapping. This is implemented here.
1428 * Due to the way hw queues are set up (by the hw specific modules like
1429 * 4965.c), the AC->hw queue mapping is the identity
1433 static const u8 tid_to_ac
[] = {
1445 il4965_get_ac_from_tid(u16 tid
)
1447 if (likely(tid
< ARRAY_SIZE(tid_to_ac
)))
1448 return tid_to_ac
[tid
];
1450 /* no support for TIDs 8-15 yet */
1455 il4965_get_fifo_from_tid(u16 tid
)
1457 const u8 ac_to_fifo
[] = {
1464 if (likely(tid
< ARRAY_SIZE(tid_to_ac
)))
1465 return ac_to_fifo
[tid_to_ac
[tid
]];
1467 /* no support for TIDs 8-15 yet */
1472 * handle build C_TX command notification.
1475 il4965_tx_cmd_build_basic(struct il_priv
*il
, struct sk_buff
*skb
,
1476 struct il_tx_cmd
*tx_cmd
,
1477 struct ieee80211_tx_info
*info
,
1478 struct ieee80211_hdr
*hdr
, u8 std_id
)
1480 __le16 fc
= hdr
->frame_control
;
1481 __le32 tx_flags
= tx_cmd
->tx_flags
;
1483 tx_cmd
->stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
1484 if (!(info
->flags
& IEEE80211_TX_CTL_NO_ACK
)) {
1485 tx_flags
|= TX_CMD_FLG_ACK_MSK
;
1486 if (ieee80211_is_mgmt(fc
))
1487 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
1488 if (ieee80211_is_probe_resp(fc
) &&
1489 !(le16_to_cpu(hdr
->seq_ctrl
) & 0xf))
1490 tx_flags
|= TX_CMD_FLG_TSF_MSK
;
1492 tx_flags
&= (~TX_CMD_FLG_ACK_MSK
);
1493 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
1496 if (ieee80211_is_back_req(fc
))
1497 tx_flags
|= TX_CMD_FLG_ACK_MSK
| TX_CMD_FLG_IMM_BA_RSP_MASK
;
1499 tx_cmd
->sta_id
= std_id
;
1500 if (ieee80211_has_morefrags(fc
))
1501 tx_flags
|= TX_CMD_FLG_MORE_FRAG_MSK
;
1503 if (ieee80211_is_data_qos(fc
)) {
1504 u8
*qc
= ieee80211_get_qos_ctl(hdr
);
1505 tx_cmd
->tid_tspec
= qc
[0] & 0xf;
1506 tx_flags
&= ~TX_CMD_FLG_SEQ_CTL_MSK
;
1508 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
1511 il_tx_cmd_protection(il
, info
, fc
, &tx_flags
);
1513 tx_flags
&= ~(TX_CMD_FLG_ANT_SEL_MSK
);
1514 if (ieee80211_is_mgmt(fc
)) {
1515 if (ieee80211_is_assoc_req(fc
) || ieee80211_is_reassoc_req(fc
))
1516 tx_cmd
->timeout
.pm_frame_timeout
= cpu_to_le16(3);
1518 tx_cmd
->timeout
.pm_frame_timeout
= cpu_to_le16(2);
1520 tx_cmd
->timeout
.pm_frame_timeout
= 0;
1523 tx_cmd
->driver_txop
= 0;
1524 tx_cmd
->tx_flags
= tx_flags
;
1525 tx_cmd
->next_frame_len
= 0;
1529 il4965_tx_cmd_build_rate(struct il_priv
*il
, struct il_tx_cmd
*tx_cmd
,
1530 struct ieee80211_tx_info
*info
, __le16 fc
)
1532 const u8 rts_retry_limit
= 60;
1535 u8 data_retry_limit
;
1538 /* Set retry limit on DATA packets and Probe Responses */
1539 if (ieee80211_is_probe_resp(fc
))
1540 data_retry_limit
= 3;
1542 data_retry_limit
= IL4965_DEFAULT_TX_RETRY
;
1543 tx_cmd
->data_retry_limit
= data_retry_limit
;
1544 /* Set retry limit on RTS packets */
1545 tx_cmd
->rts_retry_limit
= min(data_retry_limit
, rts_retry_limit
);
1547 /* DATA packets will use the uCode station table for rate/antenna
1549 if (ieee80211_is_data(fc
)) {
1550 tx_cmd
->initial_rate_idx
= 0;
1551 tx_cmd
->tx_flags
|= TX_CMD_FLG_STA_RATE_MSK
;
1556 * If the current TX rate stored in mac80211 has the MCS bit set, it's
1557 * not really a TX rate. Thus, we use the lowest supported rate for
1558 * this band. Also use the lowest supported rate if the stored rate
1561 rate_idx
= info
->control
.rates
[0].idx
;
1562 if ((info
->control
.rates
[0].flags
& IEEE80211_TX_RC_MCS
) || rate_idx
< 0
1563 || rate_idx
> RATE_COUNT_LEGACY
)
1565 rate_lowest_index(&il
->bands
[info
->band
],
1567 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
1568 if (info
->band
== IEEE80211_BAND_5GHZ
)
1569 rate_idx
+= IL_FIRST_OFDM_RATE
;
1570 /* Get PLCP rate for tx_cmd->rate_n_flags */
1571 rate_plcp
= il_rates
[rate_idx
].plcp
;
1572 /* Zero out flags for this packet */
1575 /* Set CCK flag as needed */
1576 if (rate_idx
>= IL_FIRST_CCK_RATE
&& rate_idx
<= IL_LAST_CCK_RATE
)
1577 rate_flags
|= RATE_MCS_CCK_MSK
;
1579 /* Set up antennas */
1580 il4965_toggle_tx_ant(il
, &il
->mgmt_tx_ant
, il
->hw_params
.valid_tx_ant
);
1581 rate_flags
|= BIT(il
->mgmt_tx_ant
) << RATE_MCS_ANT_POS
;
1583 /* Set the rate in the TX cmd */
1584 tx_cmd
->rate_n_flags
= cpu_to_le32(rate_plcp
| rate_flags
);
1588 il4965_tx_cmd_build_hwcrypto(struct il_priv
*il
, struct ieee80211_tx_info
*info
,
1589 struct il_tx_cmd
*tx_cmd
, struct sk_buff
*skb_frag
,
1592 struct ieee80211_key_conf
*keyconf
= info
->control
.hw_key
;
1594 switch (keyconf
->cipher
) {
1595 case WLAN_CIPHER_SUITE_CCMP
:
1596 tx_cmd
->sec_ctl
= TX_CMD_SEC_CCM
;
1597 memcpy(tx_cmd
->key
, keyconf
->key
, keyconf
->keylen
);
1598 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1599 tx_cmd
->tx_flags
|= TX_CMD_FLG_AGG_CCMP_MSK
;
1600 D_TX("tx_cmd with AES hwcrypto\n");
1603 case WLAN_CIPHER_SUITE_TKIP
:
1604 tx_cmd
->sec_ctl
= TX_CMD_SEC_TKIP
;
1605 ieee80211_get_tkip_p2k(keyconf
, skb_frag
, tx_cmd
->key
);
1606 D_TX("tx_cmd with tkip hwcrypto\n");
1609 case WLAN_CIPHER_SUITE_WEP104
:
1610 tx_cmd
->sec_ctl
|= TX_CMD_SEC_KEY128
;
1612 case WLAN_CIPHER_SUITE_WEP40
:
1614 (TX_CMD_SEC_WEP
| (keyconf
->keyidx
& TX_CMD_SEC_MSK
) <<
1617 memcpy(&tx_cmd
->key
[3], keyconf
->key
, keyconf
->keylen
);
1619 D_TX("Configuring packet for WEP encryption " "with key %d\n",
1624 IL_ERR("Unknown encode cipher %x\n", keyconf
->cipher
);
1630 * start C_TX command process
1633 il4965_tx_skb(struct il_priv
*il
, struct sk_buff
*skb
)
1635 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
1636 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
1637 struct ieee80211_sta
*sta
= info
->control
.sta
;
1638 struct il_station_priv
*sta_priv
= NULL
;
1639 struct il_tx_queue
*txq
;
1641 struct il_device_cmd
*out_cmd
;
1642 struct il_cmd_meta
*out_meta
;
1643 struct il_tx_cmd
*tx_cmd
;
1645 dma_addr_t phys_addr
;
1646 dma_addr_t txcmd_phys
;
1647 dma_addr_t scratch_phys
;
1648 u16 len
, firstlen
, secondlen
;
1653 u8 wait_write_ptr
= 0;
1656 unsigned long flags
;
1657 bool is_agg
= false;
1659 spin_lock_irqsave(&il
->lock
, flags
);
1660 if (il_is_rfkill(il
)) {
1661 D_DROP("Dropping - RF KILL\n");
1665 fc
= hdr
->frame_control
;
1667 #ifdef CONFIG_IWLEGACY_DEBUG
1668 if (ieee80211_is_auth(fc
))
1669 D_TX("Sending AUTH frame\n");
1670 else if (ieee80211_is_assoc_req(fc
))
1671 D_TX("Sending ASSOC frame\n");
1672 else if (ieee80211_is_reassoc_req(fc
))
1673 D_TX("Sending REASSOC frame\n");
1676 hdr_len
= ieee80211_hdrlen(fc
);
1678 /* For management frames use broadcast id to do not break aggregation */
1679 if (!ieee80211_is_data(fc
))
1680 sta_id
= il
->hw_params
.bcast_id
;
1682 /* Find idx into station table for destination station */
1683 sta_id
= il_sta_id_or_broadcast(il
, info
->control
.sta
);
1685 if (sta_id
== IL_INVALID_STATION
) {
1686 D_DROP("Dropping - INVALID STATION: %pM\n", hdr
->addr1
);
1691 D_TX("station Id %d\n", sta_id
);
1694 sta_priv
= (void *)sta
->drv_priv
;
1696 if (sta_priv
&& sta_priv
->asleep
&&
1697 (info
->flags
& IEEE80211_TX_CTL_NO_PS_BUFFER
)) {
1699 * This sends an asynchronous command to the device,
1700 * but we can rely on it being processed before the
1701 * next frame is processed -- and the next frame to
1702 * this station is the one that will consume this
1704 * For now set the counter to just 1 since we do not
1705 * support uAPSD yet.
1707 il4965_sta_modify_sleep_tx_count(il
, sta_id
, 1);
1710 /* FIXME: remove me ? */
1711 WARN_ON_ONCE(info
->flags
& IEEE80211_TX_CTL_SEND_AFTER_DTIM
);
1713 /* Access category (AC) is also the queue number */
1714 txq_id
= skb_get_queue_mapping(skb
);
1716 /* irqs already disabled/saved above when locking il->lock */
1717 spin_lock(&il
->sta_lock
);
1719 if (ieee80211_is_data_qos(fc
)) {
1720 qc
= ieee80211_get_qos_ctl(hdr
);
1721 tid
= qc
[0] & IEEE80211_QOS_CTL_TID_MASK
;
1722 if (WARN_ON_ONCE(tid
>= MAX_TID_COUNT
)) {
1723 spin_unlock(&il
->sta_lock
);
1726 seq_number
= il
->stations
[sta_id
].tid
[tid
].seq_number
;
1727 seq_number
&= IEEE80211_SCTL_SEQ
;
1729 hdr
->seq_ctrl
& cpu_to_le16(IEEE80211_SCTL_FRAG
);
1730 hdr
->seq_ctrl
|= cpu_to_le16(seq_number
);
1732 /* aggregation is on for this <sta,tid> */
1733 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
&&
1734 il
->stations
[sta_id
].tid
[tid
].agg
.state
== IL_AGG_ON
) {
1735 txq_id
= il
->stations
[sta_id
].tid
[tid
].agg
.txq_id
;
1740 txq
= &il
->txq
[txq_id
];
1743 if (unlikely(il_queue_space(q
) < q
->high_mark
)) {
1744 spin_unlock(&il
->sta_lock
);
1748 if (ieee80211_is_data_qos(fc
)) {
1749 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
++;
1750 if (!ieee80211_has_morefrags(fc
))
1751 il
->stations
[sta_id
].tid
[tid
].seq_number
= seq_number
;
1754 spin_unlock(&il
->sta_lock
);
1756 txq
->skbs
[q
->write_ptr
] = skb
;
1758 /* Set up first empty entry in queue's array of Tx/cmd buffers */
1759 out_cmd
= txq
->cmd
[q
->write_ptr
];
1760 out_meta
= &txq
->meta
[q
->write_ptr
];
1761 tx_cmd
= &out_cmd
->cmd
.tx
;
1762 memset(&out_cmd
->hdr
, 0, sizeof(out_cmd
->hdr
));
1763 memset(tx_cmd
, 0, sizeof(struct il_tx_cmd
));
1766 * Set up the Tx-command (not MAC!) header.
1767 * Store the chosen Tx queue and TFD idx within the sequence field;
1768 * after Tx, uCode's Tx response will return this value so driver can
1769 * locate the frame within the tx queue and do post-tx processing.
1771 out_cmd
->hdr
.cmd
= C_TX
;
1772 out_cmd
->hdr
.sequence
=
1774 (QUEUE_TO_SEQ(txq_id
) | IDX_TO_SEQ(q
->write_ptr
)));
1776 /* Copy MAC header from skb into command buffer */
1777 memcpy(tx_cmd
->hdr
, hdr
, hdr_len
);
1779 /* Total # bytes to be transmitted */
1780 len
= (u16
) skb
->len
;
1781 tx_cmd
->len
= cpu_to_le16(len
);
1783 if (info
->control
.hw_key
)
1784 il4965_tx_cmd_build_hwcrypto(il
, info
, tx_cmd
, skb
, sta_id
);
1786 /* TODO need this for burst mode later on */
1787 il4965_tx_cmd_build_basic(il
, skb
, tx_cmd
, info
, hdr
, sta_id
);
1789 il4965_tx_cmd_build_rate(il
, tx_cmd
, info
, fc
);
1791 il_update_stats(il
, true, fc
, len
);
1793 * Use the first empty entry in this queue's command buffer array
1794 * to contain the Tx command and MAC header concatenated together
1795 * (payload data will be in another buffer).
1796 * Size of this varies, due to varying MAC header length.
1797 * If end is not dword aligned, we'll have 2 extra bytes at the end
1798 * of the MAC header (device reads on dword boundaries).
1799 * We'll tell device about this padding later.
1801 len
= sizeof(struct il_tx_cmd
) + sizeof(struct il_cmd_header
) + hdr_len
;
1802 firstlen
= (len
+ 3) & ~3;
1804 /* Tell NIC about any 2-byte padding after MAC header */
1805 if (firstlen
!= len
)
1806 tx_cmd
->tx_flags
|= TX_CMD_FLG_MH_PAD_MSK
;
1808 /* Physical address of this Tx command's header (not MAC header!),
1809 * within command buffer array. */
1811 pci_map_single(il
->pci_dev
, &out_cmd
->hdr
, firstlen
,
1812 PCI_DMA_BIDIRECTIONAL
);
1813 dma_unmap_addr_set(out_meta
, mapping
, txcmd_phys
);
1814 dma_unmap_len_set(out_meta
, len
, firstlen
);
1815 /* Add buffer containing Tx command and MAC(!) header to TFD's
1817 il
->ops
->txq_attach_buf_to_tfd(il
, txq
, txcmd_phys
, firstlen
, 1, 0);
1819 if (!ieee80211_has_morefrags(hdr
->frame_control
)) {
1820 txq
->need_update
= 1;
1823 txq
->need_update
= 0;
1826 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1827 * if any (802.11 null frames have no payload). */
1828 secondlen
= skb
->len
- hdr_len
;
1829 if (secondlen
> 0) {
1831 pci_map_single(il
->pci_dev
, skb
->data
+ hdr_len
, secondlen
,
1833 il
->ops
->txq_attach_buf_to_tfd(il
, txq
, phys_addr
, secondlen
,
1838 txcmd_phys
+ sizeof(struct il_cmd_header
) +
1839 offsetof(struct il_tx_cmd
, scratch
);
1841 /* take back ownership of DMA buffer to enable update */
1842 pci_dma_sync_single_for_cpu(il
->pci_dev
, txcmd_phys
, firstlen
,
1843 PCI_DMA_BIDIRECTIONAL
);
1844 tx_cmd
->dram_lsb_ptr
= cpu_to_le32(scratch_phys
);
1845 tx_cmd
->dram_msb_ptr
= il_get_dma_hi_addr(scratch_phys
);
1847 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd
->hdr
.sequence
));
1848 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd
->tx_flags
));
1849 il_print_hex_dump(il
, IL_DL_TX
, (u8
*) tx_cmd
, sizeof(*tx_cmd
));
1850 il_print_hex_dump(il
, IL_DL_TX
, (u8
*) tx_cmd
->hdr
, hdr_len
);
1852 /* Set up entry for this TFD in Tx byte-count array */
1853 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1854 il
->ops
->txq_update_byte_cnt_tbl(il
, txq
, le16_to_cpu(tx_cmd
->len
));
1856 pci_dma_sync_single_for_device(il
->pci_dev
, txcmd_phys
, firstlen
,
1857 PCI_DMA_BIDIRECTIONAL
);
1859 /* Tell device the write idx *just past* this latest filled TFD */
1860 q
->write_ptr
= il_queue_inc_wrap(q
->write_ptr
, q
->n_bd
);
1861 il_txq_update_write_ptr(il
, txq
);
1862 spin_unlock_irqrestore(&il
->lock
, flags
);
1865 * At this point the frame is "transmitted" successfully
1866 * and we will get a TX status notification eventually,
1867 * regardless of the value of ret. "ret" only indicates
1868 * whether or not we should update the write pointer.
1872 * Avoid atomic ops if it isn't an associated client.
1873 * Also, if this is a packet for aggregation, don't
1874 * increase the counter because the ucode will stop
1875 * aggregation queues when their respective station
1878 if (sta_priv
&& sta_priv
->client
&& !is_agg
)
1879 atomic_inc(&sta_priv
->pending_frames
);
1881 if (il_queue_space(q
) < q
->high_mark
&& il
->mac80211_registered
) {
1882 if (wait_write_ptr
) {
1883 spin_lock_irqsave(&il
->lock
, flags
);
1884 txq
->need_update
= 1;
1885 il_txq_update_write_ptr(il
, txq
);
1886 spin_unlock_irqrestore(&il
->lock
, flags
);
1888 il_stop_queue(il
, txq
);
1895 spin_unlock_irqrestore(&il
->lock
, flags
);
1900 il4965_alloc_dma_ptr(struct il_priv
*il
, struct il_dma_ptr
*ptr
, size_t size
)
1903 dma_alloc_coherent(&il
->pci_dev
->dev
, size
, &ptr
->dma
, GFP_KERNEL
);
1911 il4965_free_dma_ptr(struct il_priv
*il
, struct il_dma_ptr
*ptr
)
1913 if (unlikely(!ptr
->addr
))
1916 dma_free_coherent(&il
->pci_dev
->dev
, ptr
->size
, ptr
->addr
, ptr
->dma
);
1917 memset(ptr
, 0, sizeof(*ptr
));
1921 * il4965_hw_txq_ctx_free - Free TXQ Context
1923 * Destroy all TX DMA queues and structures
1926 il4965_hw_txq_ctx_free(struct il_priv
*il
)
1932 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
1933 if (txq_id
== il
->cmd_queue
)
1934 il_cmd_queue_free(il
);
1936 il_tx_queue_free(il
, txq_id
);
1938 il4965_free_dma_ptr(il
, &il
->kw
);
1940 il4965_free_dma_ptr(il
, &il
->scd_bc_tbls
);
1942 /* free tx queue structure */
1943 il_free_txq_mem(il
);
1947 * il4965_txq_ctx_alloc - allocate TX queue context
1948 * Allocate all Tx DMA structures and initialize them
1951 * @return error code
1954 il4965_txq_ctx_alloc(struct il_priv
*il
)
1957 unsigned long flags
;
1959 /* Free all tx/cmd queues and keep-warm buffer */
1960 il4965_hw_txq_ctx_free(il
);
1963 il4965_alloc_dma_ptr(il
, &il
->scd_bc_tbls
,
1964 il
->hw_params
.scd_bc_tbls_size
);
1966 IL_ERR("Scheduler BC Table allocation failed\n");
1969 /* Alloc keep-warm buffer */
1970 ret
= il4965_alloc_dma_ptr(il
, &il
->kw
, IL_KW_SIZE
);
1972 IL_ERR("Keep Warm allocation failed\n");
1976 /* allocate tx queue structure */
1977 ret
= il_alloc_txq_mem(il
);
1981 spin_lock_irqsave(&il
->lock
, flags
);
1983 /* Turn off all Tx DMA fifos */
1984 il4965_txq_set_sched(il
, 0);
1986 /* Tell NIC where to find the "keep warm" buffer */
1987 il_wr(il
, FH49_KW_MEM_ADDR_REG
, il
->kw
.dma
>> 4);
1989 spin_unlock_irqrestore(&il
->lock
, flags
);
1991 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
1992 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++) {
1993 ret
= il_tx_queue_init(il
, txq_id
);
1995 IL_ERR("Tx %d queue init failed\n", txq_id
);
2003 il4965_hw_txq_ctx_free(il
);
2004 il4965_free_dma_ptr(il
, &il
->kw
);
2006 il4965_free_dma_ptr(il
, &il
->scd_bc_tbls
);
2012 il4965_txq_ctx_reset(struct il_priv
*il
)
2015 unsigned long flags
;
2017 spin_lock_irqsave(&il
->lock
, flags
);
2019 /* Turn off all Tx DMA fifos */
2020 il4965_txq_set_sched(il
, 0);
2021 /* Tell NIC where to find the "keep warm" buffer */
2022 il_wr(il
, FH49_KW_MEM_ADDR_REG
, il
->kw
.dma
>> 4);
2024 spin_unlock_irqrestore(&il
->lock
, flags
);
2026 /* Alloc and init all Tx queues, including the command queue (#4) */
2027 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
2028 il_tx_queue_reset(il
, txq_id
);
2032 il4965_txq_ctx_unmap(struct il_priv
*il
)
2039 /* Unmap DMA from host system and free skb's */
2040 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
2041 if (txq_id
== il
->cmd_queue
)
2042 il_cmd_queue_unmap(il
);
2044 il_tx_queue_unmap(il
, txq_id
);
2048 * il4965_txq_ctx_stop - Stop all Tx DMA channels
2051 il4965_txq_ctx_stop(struct il_priv
*il
)
2055 _il_wr_prph(il
, IL49_SCD_TXFACT
, 0);
2057 /* Stop each Tx DMA channel, and wait for it to be idle */
2058 for (ch
= 0; ch
< il
->hw_params
.dma_chnl_num
; ch
++) {
2059 _il_wr(il
, FH49_TCSR_CHNL_TX_CONFIG_REG(ch
), 0x0);
2061 _il_poll_bit(il
, FH49_TSSR_TX_STATUS_REG
,
2062 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch
),
2063 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch
),
2066 IL_ERR("Timeout stopping DMA channel %d [0x%08x]",
2067 ch
, _il_rd(il
, FH49_TSSR_TX_STATUS_REG
));
2072 * Find first available (lowest unused) Tx Queue, mark it "active".
2073 * Called only when finding queue for aggregation.
2074 * Should never return anything < 7, because they should already
2075 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
2078 il4965_txq_ctx_activate_free(struct il_priv
*il
)
2082 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
2083 if (!test_and_set_bit(txq_id
, &il
->txq_ctx_active_msk
))
2089 * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2092 il4965_tx_queue_stop_scheduler(struct il_priv
*il
, u16 txq_id
)
2094 /* Simply stop the queue, but don't change any configuration;
2095 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2096 il_wr_prph(il
, IL49_SCD_QUEUE_STATUS_BITS(txq_id
),
2097 (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
2098 (1 << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));
2102 * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2105 il4965_tx_queue_set_q2ratid(struct il_priv
*il
, u16 ra_tid
, u16 txq_id
)
2111 scd_q2ratid
= ra_tid
& IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK
;
2114 il
->scd_base_addr
+ IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id
);
2116 tbl_dw
= il_read_targ_mem(il
, tbl_dw_addr
);
2119 tbl_dw
= (scd_q2ratid
<< 16) | (tbl_dw
& 0x0000FFFF);
2121 tbl_dw
= scd_q2ratid
| (tbl_dw
& 0xFFFF0000);
2123 il_write_targ_mem(il
, tbl_dw_addr
, tbl_dw
);
2129 * il4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2131 * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE,
2132 * i.e. it must be one of the higher queues used for aggregation
2135 il4965_txq_agg_enable(struct il_priv
*il
, int txq_id
, int tx_fifo
, int sta_id
,
2136 int tid
, u16 ssn_idx
)
2138 unsigned long flags
;
2142 if ((IL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
2143 (IL49_FIRST_AMPDU_QUEUE
+
2144 il
->cfg
->num_of_ampdu_queues
<= txq_id
)) {
2145 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2146 txq_id
, IL49_FIRST_AMPDU_QUEUE
,
2147 IL49_FIRST_AMPDU_QUEUE
+
2148 il
->cfg
->num_of_ampdu_queues
- 1);
2152 ra_tid
= BUILD_RAxTID(sta_id
, tid
);
2154 /* Modify device's station table to Tx this TID */
2155 ret
= il4965_sta_tx_modify_enable_tid(il
, sta_id
, tid
);
2159 spin_lock_irqsave(&il
->lock
, flags
);
2161 /* Stop this Tx queue before configuring it */
2162 il4965_tx_queue_stop_scheduler(il
, txq_id
);
2164 /* Map receiver-address / traffic-ID to this queue */
2165 il4965_tx_queue_set_q2ratid(il
, ra_tid
, txq_id
);
2167 /* Set this queue as a chain-building queue */
2168 il_set_bits_prph(il
, IL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
2170 /* Place first TFD at idx corresponding to start sequence number.
2171 * Assumes that ssn_idx is valid (!= 0xFFF) */
2172 il
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
2173 il
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
2174 il4965_set_wr_ptrs(il
, txq_id
, ssn_idx
);
2176 /* Set up Tx win size and frame limit for this queue */
2177 il_write_targ_mem(il
,
2179 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
),
2180 (SCD_WIN_SIZE
<< IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
)
2181 & IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
2183 il_write_targ_mem(il
,
2185 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
) + sizeof(u32
),
2187 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
2188 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
2190 il_set_bits_prph(il
, IL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
2192 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2193 il4965_tx_queue_set_status(il
, &il
->txq
[txq_id
], tx_fifo
, 1);
2195 spin_unlock_irqrestore(&il
->lock
, flags
);
2201 il4965_tx_agg_start(struct il_priv
*il
, struct ieee80211_vif
*vif
,
2202 struct ieee80211_sta
*sta
, u16 tid
, u16
* ssn
)
2208 unsigned long flags
;
2209 struct il_tid_data
*tid_data
;
2211 /* FIXME: warning if tx fifo not found ? */
2212 tx_fifo
= il4965_get_fifo_from_tid(tid
);
2213 if (unlikely(tx_fifo
< 0))
2216 D_HT("%s on ra = %pM tid = %d\n", __func__
, sta
->addr
, tid
);
2218 sta_id
= il_sta_id(sta
);
2219 if (sta_id
== IL_INVALID_STATION
) {
2220 IL_ERR("Start AGG on invalid station\n");
2223 if (unlikely(tid
>= MAX_TID_COUNT
))
2226 if (il
->stations
[sta_id
].tid
[tid
].agg
.state
!= IL_AGG_OFF
) {
2227 IL_ERR("Start AGG when state is not IL_AGG_OFF !\n");
2231 txq_id
= il4965_txq_ctx_activate_free(il
);
2233 IL_ERR("No free aggregation queue available\n");
2237 spin_lock_irqsave(&il
->sta_lock
, flags
);
2238 tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2239 *ssn
= SEQ_TO_SN(tid_data
->seq_number
);
2240 tid_data
->agg
.txq_id
= txq_id
;
2241 il_set_swq_id(&il
->txq
[txq_id
], il4965_get_ac_from_tid(tid
), txq_id
);
2242 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2244 ret
= il4965_txq_agg_enable(il
, txq_id
, tx_fifo
, sta_id
, tid
, *ssn
);
2248 spin_lock_irqsave(&il
->sta_lock
, flags
);
2249 tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2250 if (tid_data
->tfds_in_queue
== 0) {
2251 D_HT("HW queue is empty\n");
2252 tid_data
->agg
.state
= IL_AGG_ON
;
2253 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2255 D_HT("HW queue is NOT empty: %d packets in HW queue\n",
2256 tid_data
->tfds_in_queue
);
2257 tid_data
->agg
.state
= IL_EMPTYING_HW_QUEUE_ADDBA
;
2259 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2264 * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE
2265 * il->lock must be held by the caller
2268 il4965_txq_agg_disable(struct il_priv
*il
, u16 txq_id
, u16 ssn_idx
, u8 tx_fifo
)
2270 if ((IL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
2271 (IL49_FIRST_AMPDU_QUEUE
+
2272 il
->cfg
->num_of_ampdu_queues
<= txq_id
)) {
2273 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2274 txq_id
, IL49_FIRST_AMPDU_QUEUE
,
2275 IL49_FIRST_AMPDU_QUEUE
+
2276 il
->cfg
->num_of_ampdu_queues
- 1);
2280 il4965_tx_queue_stop_scheduler(il
, txq_id
);
2282 il_clear_bits_prph(il
, IL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
2284 il
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
2285 il
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
2286 /* supposes that ssn_idx is valid (!= 0xFFF) */
2287 il4965_set_wr_ptrs(il
, txq_id
, ssn_idx
);
2289 il_clear_bits_prph(il
, IL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
2290 il_txq_ctx_deactivate(il
, txq_id
);
2291 il4965_tx_queue_set_status(il
, &il
->txq
[txq_id
], tx_fifo
, 0);
2297 il4965_tx_agg_stop(struct il_priv
*il
, struct ieee80211_vif
*vif
,
2298 struct ieee80211_sta
*sta
, u16 tid
)
2300 int tx_fifo_id
, txq_id
, sta_id
, ssn
;
2301 struct il_tid_data
*tid_data
;
2302 int write_ptr
, read_ptr
;
2303 unsigned long flags
;
2305 /* FIXME: warning if tx_fifo_id not found ? */
2306 tx_fifo_id
= il4965_get_fifo_from_tid(tid
);
2307 if (unlikely(tx_fifo_id
< 0))
2310 sta_id
= il_sta_id(sta
);
2312 if (sta_id
== IL_INVALID_STATION
) {
2313 IL_ERR("Invalid station for AGG tid %d\n", tid
);
2317 spin_lock_irqsave(&il
->sta_lock
, flags
);
2319 tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2320 ssn
= (tid_data
->seq_number
& IEEE80211_SCTL_SEQ
) >> 4;
2321 txq_id
= tid_data
->agg
.txq_id
;
2323 switch (il
->stations
[sta_id
].tid
[tid
].agg
.state
) {
2324 case IL_EMPTYING_HW_QUEUE_ADDBA
:
2326 * This can happen if the peer stops aggregation
2327 * again before we've had a chance to drain the
2328 * queue we selected previously, i.e. before the
2329 * session was really started completely.
2331 D_HT("AGG stop before setup done\n");
2336 IL_WARN("Stopping AGG while state not ON or starting\n");
2339 write_ptr
= il
->txq
[txq_id
].q
.write_ptr
;
2340 read_ptr
= il
->txq
[txq_id
].q
.read_ptr
;
2342 /* The queue is not empty */
2343 if (write_ptr
!= read_ptr
) {
2344 D_HT("Stopping a non empty AGG HW QUEUE\n");
2345 il
->stations
[sta_id
].tid
[tid
].agg
.state
=
2346 IL_EMPTYING_HW_QUEUE_DELBA
;
2347 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2351 D_HT("HW queue is empty\n");
2353 il
->stations
[sta_id
].tid
[tid
].agg
.state
= IL_AGG_OFF
;
2355 /* do not restore/save irqs */
2356 spin_unlock(&il
->sta_lock
);
2357 spin_lock(&il
->lock
);
2360 * the only reason this call can fail is queue number out of range,
2361 * which can happen if uCode is reloaded and all the station
2362 * information are lost. if it is outside the range, there is no need
2363 * to deactivate the uCode queue, just return "success" to allow
2364 * mac80211 to clean up it own data.
2366 il4965_txq_agg_disable(il
, txq_id
, ssn
, tx_fifo_id
);
2367 spin_unlock_irqrestore(&il
->lock
, flags
);
2369 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2375 il4965_txq_check_empty(struct il_priv
*il
, int sta_id
, u8 tid
, int txq_id
)
2377 struct il_queue
*q
= &il
->txq
[txq_id
].q
;
2378 u8
*addr
= il
->stations
[sta_id
].sta
.sta
.addr
;
2379 struct il_tid_data
*tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2381 lockdep_assert_held(&il
->sta_lock
);
2383 switch (il
->stations
[sta_id
].tid
[tid
].agg
.state
) {
2384 case IL_EMPTYING_HW_QUEUE_DELBA
:
2385 /* We are reclaiming the last packet of the */
2386 /* aggregated HW queue */
2387 if (txq_id
== tid_data
->agg
.txq_id
&&
2388 q
->read_ptr
== q
->write_ptr
) {
2389 u16 ssn
= SEQ_TO_SN(tid_data
->seq_number
);
2390 int tx_fifo
= il4965_get_fifo_from_tid(tid
);
2391 D_HT("HW queue empty: continue DELBA flow\n");
2392 il4965_txq_agg_disable(il
, txq_id
, ssn
, tx_fifo
);
2393 tid_data
->agg
.state
= IL_AGG_OFF
;
2394 ieee80211_stop_tx_ba_cb_irqsafe(il
->vif
, addr
, tid
);
2397 case IL_EMPTYING_HW_QUEUE_ADDBA
:
2398 /* We are reclaiming the last packet of the queue */
2399 if (tid_data
->tfds_in_queue
== 0) {
2400 D_HT("HW queue empty: continue ADDBA flow\n");
2401 tid_data
->agg
.state
= IL_AGG_ON
;
2402 ieee80211_start_tx_ba_cb_irqsafe(il
->vif
, addr
, tid
);
2411 il4965_non_agg_tx_status(struct il_priv
*il
, const u8
*addr1
)
2413 struct ieee80211_sta
*sta
;
2414 struct il_station_priv
*sta_priv
;
2417 sta
= ieee80211_find_sta(il
->vif
, addr1
);
2419 sta_priv
= (void *)sta
->drv_priv
;
2420 /* avoid atomic ops if this isn't a client */
2421 if (sta_priv
->client
&&
2422 atomic_dec_return(&sta_priv
->pending_frames
) == 0)
2423 ieee80211_sta_block_awake(il
->hw
, sta
, false);
2429 il4965_tx_status(struct il_priv
*il
, struct sk_buff
*skb
, bool is_agg
)
2431 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
2434 il4965_non_agg_tx_status(il
, hdr
->addr1
);
2436 ieee80211_tx_status_irqsafe(il
->hw
, skb
);
2440 il4965_tx_queue_reclaim(struct il_priv
*il
, int txq_id
, int idx
)
2442 struct il_tx_queue
*txq
= &il
->txq
[txq_id
];
2443 struct il_queue
*q
= &txq
->q
;
2445 struct ieee80211_hdr
*hdr
;
2446 struct sk_buff
*skb
;
2448 if (idx
>= q
->n_bd
|| il_queue_used(q
, idx
) == 0) {
2449 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
2450 "is out of range [0-%d] %d %d.\n", txq_id
, idx
, q
->n_bd
,
2451 q
->write_ptr
, q
->read_ptr
);
2455 for (idx
= il_queue_inc_wrap(idx
, q
->n_bd
); q
->read_ptr
!= idx
;
2456 q
->read_ptr
= il_queue_inc_wrap(q
->read_ptr
, q
->n_bd
)) {
2458 skb
= txq
->skbs
[txq
->q
.read_ptr
];
2460 if (WARN_ON_ONCE(skb
== NULL
))
2463 hdr
= (struct ieee80211_hdr
*) skb
->data
;
2464 if (ieee80211_is_data_qos(hdr
->frame_control
))
2467 il4965_tx_status(il
, skb
, txq_id
>= IL4965_FIRST_AMPDU_QUEUE
);
2469 txq
->skbs
[txq
->q
.read_ptr
] = NULL
;
2470 il
->ops
->txq_free_tfd(il
, txq
);
2476 * il4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2478 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2479 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2482 il4965_tx_status_reply_compressed_ba(struct il_priv
*il
, struct il_ht_agg
*agg
,
2483 struct il_compressed_ba_resp
*ba_resp
)
2486 u16 seq_ctl
= le16_to_cpu(ba_resp
->seq_ctl
);
2487 u16 scd_flow
= le16_to_cpu(ba_resp
->scd_flow
);
2489 struct ieee80211_tx_info
*info
;
2490 u64 bitmap
, sent_bitmap
;
2492 if (unlikely(!agg
->wait_for_ba
)) {
2493 if (unlikely(ba_resp
->bitmap
))
2494 IL_ERR("Received BA when not expected\n");
2498 /* Mark that the expected block-ack response arrived */
2499 agg
->wait_for_ba
= 0;
2500 D_TX_REPLY("BA %d %d\n", agg
->start_idx
, ba_resp
->seq_ctl
);
2502 /* Calculate shift to align block-ack bits with our Tx win bits */
2503 sh
= agg
->start_idx
- SEQ_TO_IDX(seq_ctl
>> 4);
2504 if (sh
< 0) /* tbw something is wrong with indices */
2507 if (agg
->frame_count
> (64 - sh
)) {
2508 D_TX_REPLY("more frames than bitmap size");
2512 /* don't use 64-bit values for now */
2513 bitmap
= le64_to_cpu(ba_resp
->bitmap
) >> sh
;
2515 /* check for success or failure according to the
2516 * transmitted bitmap and block-ack bitmap */
2517 sent_bitmap
= bitmap
& agg
->bitmap
;
2519 /* For each frame attempted in aggregation,
2520 * update driver's record of tx frame's status. */
2522 while (sent_bitmap
) {
2523 ack
= sent_bitmap
& 1ULL;
2525 D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", ack
? "ACK" : "NACK",
2526 i
, (agg
->start_idx
+ i
) & 0xff, agg
->start_idx
+ i
);
2531 D_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap
);
2533 info
= IEEE80211_SKB_CB(il
->txq
[scd_flow
].skbs
[agg
->start_idx
]);
2534 memset(&info
->status
, 0, sizeof(info
->status
));
2535 info
->flags
|= IEEE80211_TX_STAT_ACK
;
2536 info
->flags
|= IEEE80211_TX_STAT_AMPDU
;
2537 info
->status
.ampdu_ack_len
= successes
;
2538 info
->status
.ampdu_len
= agg
->frame_count
;
2539 il4965_hwrate_to_tx_control(il
, agg
->rate_n_flags
, info
);
2545 il4965_is_tx_success(u32 status
)
2547 status
&= TX_STATUS_MSK
;
2548 return (status
== TX_STATUS_SUCCESS
|| status
== TX_STATUS_DIRECT_DONE
);
2552 il4965_find_station(struct il_priv
*il
, const u8
*addr
)
2556 int ret
= IL_INVALID_STATION
;
2557 unsigned long flags
;
2559 if (il
->iw_mode
== NL80211_IFTYPE_ADHOC
)
2562 if (is_broadcast_ether_addr(addr
))
2563 return il
->hw_params
.bcast_id
;
2565 spin_lock_irqsave(&il
->sta_lock
, flags
);
2566 for (i
= start
; i
< il
->hw_params
.max_stations
; i
++)
2567 if (il
->stations
[i
].used
&&
2568 ether_addr_equal(il
->stations
[i
].sta
.sta
.addr
, addr
)) {
2573 D_ASSOC("can not find STA %pM total %d\n", addr
, il
->num_stations
);
2577 * It may be possible that more commands interacting with stations
2578 * arrive before we completed processing the adding of
2581 if (ret
!= IL_INVALID_STATION
&&
2582 (!(il
->stations
[ret
].used
& IL_STA_UCODE_ACTIVE
) ||
2583 ((il
->stations
[ret
].used
& IL_STA_UCODE_ACTIVE
) &&
2584 (il
->stations
[ret
].used
& IL_STA_UCODE_INPROGRESS
)))) {
2585 IL_ERR("Requested station info for sta %d before ready.\n",
2587 ret
= IL_INVALID_STATION
;
2589 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2594 il4965_get_ra_sta_id(struct il_priv
*il
, struct ieee80211_hdr
*hdr
)
2596 if (il
->iw_mode
== NL80211_IFTYPE_STATION
)
2599 u8
*da
= ieee80211_get_DA(hdr
);
2601 return il4965_find_station(il
, da
);
2606 il4965_get_scd_ssn(struct il4965_tx_resp
*tx_resp
)
2608 return le32_to_cpup(&tx_resp
->u
.status
+ tx_resp
->frame_count
) & MAX_SN
;
2612 il4965_tx_status_to_mac80211(u32 status
)
2614 status
&= TX_STATUS_MSK
;
2617 case TX_STATUS_SUCCESS
:
2618 case TX_STATUS_DIRECT_DONE
:
2619 return IEEE80211_TX_STAT_ACK
;
2620 case TX_STATUS_FAIL_DEST_PS
:
2621 return IEEE80211_TX_STAT_TX_FILTERED
;
2628 * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2631 il4965_tx_status_reply_tx(struct il_priv
*il
, struct il_ht_agg
*agg
,
2632 struct il4965_tx_resp
*tx_resp
, int txq_id
,
2636 struct agg_tx_status
*frame_status
= tx_resp
->u
.agg_status
;
2637 struct ieee80211_tx_info
*info
= NULL
;
2638 struct ieee80211_hdr
*hdr
= NULL
;
2639 u32 rate_n_flags
= le32_to_cpu(tx_resp
->rate_n_flags
);
2642 if (agg
->wait_for_ba
)
2643 D_TX_REPLY("got tx response w/o block-ack\n");
2645 agg
->frame_count
= tx_resp
->frame_count
;
2646 agg
->start_idx
= start_idx
;
2647 agg
->rate_n_flags
= rate_n_flags
;
2650 /* num frames attempted by Tx command */
2651 if (agg
->frame_count
== 1) {
2652 /* Only one frame was attempted; no block-ack will arrive */
2653 status
= le16_to_cpu(frame_status
[0].status
);
2656 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2657 agg
->frame_count
, agg
->start_idx
, idx
);
2659 info
= IEEE80211_SKB_CB(il
->txq
[txq_id
].skbs
[idx
]);
2660 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
2661 info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
2662 info
->flags
|= il4965_tx_status_to_mac80211(status
);
2663 il4965_hwrate_to_tx_control(il
, rate_n_flags
, info
);
2665 D_TX_REPLY("1 Frame 0x%x failure :%d\n", status
& 0xff,
2666 tx_resp
->failure_frame
);
2667 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags
);
2669 agg
->wait_for_ba
= 0;
2671 /* Two or more frames were attempted; expect block-ack */
2673 int start
= agg
->start_idx
;
2674 struct sk_buff
*skb
;
2676 /* Construct bit-map of pending frames within Tx win */
2677 for (i
= 0; i
< agg
->frame_count
; i
++) {
2679 status
= le16_to_cpu(frame_status
[i
].status
);
2680 seq
= le16_to_cpu(frame_status
[i
].sequence
);
2681 idx
= SEQ_TO_IDX(seq
);
2682 txq_id
= SEQ_TO_QUEUE(seq
);
2685 (AGG_TX_STATE_FEW_BYTES_MSK
|
2686 AGG_TX_STATE_ABORT_MSK
))
2689 D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2690 agg
->frame_count
, txq_id
, idx
);
2692 skb
= il
->txq
[txq_id
].skbs
[idx
];
2693 if (WARN_ON_ONCE(skb
== NULL
))
2695 hdr
= (struct ieee80211_hdr
*) skb
->data
;
2697 sc
= le16_to_cpu(hdr
->seq_ctrl
);
2698 if (idx
!= (SEQ_TO_SN(sc
) & 0xff)) {
2699 IL_ERR("BUG_ON idx doesn't match seq control"
2700 " idx=%d, seq_idx=%d, seq=%d\n", idx
,
2701 SEQ_TO_SN(sc
), hdr
->seq_ctrl
);
2705 D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i
, idx
,
2710 sh
= (start
- idx
) + 0xff;
2711 bitmap
= bitmap
<< sh
;
2714 } else if (sh
< -64)
2715 sh
= 0xff - (start
- idx
);
2719 bitmap
= bitmap
<< sh
;
2722 bitmap
|= 1ULL << sh
;
2723 D_TX_REPLY("start=%d bitmap=0x%llx\n", start
,
2724 (unsigned long long)bitmap
);
2727 agg
->bitmap
= bitmap
;
2728 agg
->start_idx
= start
;
2729 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2730 agg
->frame_count
, agg
->start_idx
,
2731 (unsigned long long)agg
->bitmap
);
2734 agg
->wait_for_ba
= 1;
2740 * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2743 il4965_hdl_tx(struct il_priv
*il
, struct il_rx_buf
*rxb
)
2745 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
2746 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
2747 int txq_id
= SEQ_TO_QUEUE(sequence
);
2748 int idx
= SEQ_TO_IDX(sequence
);
2749 struct il_tx_queue
*txq
= &il
->txq
[txq_id
];
2750 struct sk_buff
*skb
;
2751 struct ieee80211_hdr
*hdr
;
2752 struct ieee80211_tx_info
*info
;
2753 struct il4965_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
2754 u32 status
= le32_to_cpu(tx_resp
->u
.status
);
2755 int uninitialized_var(tid
);
2759 unsigned long flags
;
2761 if (idx
>= txq
->q
.n_bd
|| il_queue_used(&txq
->q
, idx
) == 0) {
2762 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2763 "is out of range [0-%d] %d %d\n", txq_id
, idx
,
2764 txq
->q
.n_bd
, txq
->q
.write_ptr
, txq
->q
.read_ptr
);
2768 txq
->time_stamp
= jiffies
;
2770 skb
= txq
->skbs
[txq
->q
.read_ptr
];
2771 info
= IEEE80211_SKB_CB(skb
);
2772 memset(&info
->status
, 0, sizeof(info
->status
));
2774 hdr
= (struct ieee80211_hdr
*) skb
->data
;
2775 if (ieee80211_is_data_qos(hdr
->frame_control
)) {
2776 qc
= ieee80211_get_qos_ctl(hdr
);
2780 sta_id
= il4965_get_ra_sta_id(il
, hdr
);
2781 if (txq
->sched_retry
&& unlikely(sta_id
== IL_INVALID_STATION
)) {
2782 IL_ERR("Station not known\n");
2786 spin_lock_irqsave(&il
->sta_lock
, flags
);
2787 if (txq
->sched_retry
) {
2788 const u32 scd_ssn
= il4965_get_scd_ssn(tx_resp
);
2789 struct il_ht_agg
*agg
= NULL
;
2792 agg
= &il
->stations
[sta_id
].tid
[tid
].agg
;
2794 il4965_tx_status_reply_tx(il
, agg
, tx_resp
, txq_id
, idx
);
2796 /* check if BAR is needed */
2797 if (tx_resp
->frame_count
== 1 &&
2798 !il4965_is_tx_success(status
))
2799 info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
2801 if (txq
->q
.read_ptr
!= (scd_ssn
& 0xff)) {
2802 idx
= il_queue_dec_wrap(scd_ssn
& 0xff, txq
->q
.n_bd
);
2803 D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2804 "%d idx %d\n", scd_ssn
, idx
);
2805 freed
= il4965_tx_queue_reclaim(il
, txq_id
, idx
);
2807 il4965_free_tfds_in_queue(il
, sta_id
, tid
,
2810 if (il
->mac80211_registered
&&
2811 il_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2812 agg
->state
!= IL_EMPTYING_HW_QUEUE_DELBA
)
2813 il_wake_queue(il
, txq
);
2816 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
2817 info
->flags
|= il4965_tx_status_to_mac80211(status
);
2818 il4965_hwrate_to_tx_control(il
,
2819 le32_to_cpu(tx_resp
->rate_n_flags
),
2822 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2823 "rate_n_flags 0x%x retries %d\n", txq_id
,
2824 il4965_get_tx_fail_reason(status
), status
,
2825 le32_to_cpu(tx_resp
->rate_n_flags
),
2826 tx_resp
->failure_frame
);
2828 freed
= il4965_tx_queue_reclaim(il
, txq_id
, idx
);
2829 if (qc
&& likely(sta_id
!= IL_INVALID_STATION
))
2830 il4965_free_tfds_in_queue(il
, sta_id
, tid
, freed
);
2831 else if (sta_id
== IL_INVALID_STATION
)
2832 D_TX_REPLY("Station not known\n");
2834 if (il
->mac80211_registered
&&
2835 il_queue_space(&txq
->q
) > txq
->q
.low_mark
)
2836 il_wake_queue(il
, txq
);
2838 if (qc
&& likely(sta_id
!= IL_INVALID_STATION
))
2839 il4965_txq_check_empty(il
, sta_id
, tid
, txq_id
);
2841 il4965_check_abort_status(il
, tx_resp
->frame_count
, status
);
2843 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2847 * translate ucode response to mac80211 tx status control values
2850 il4965_hwrate_to_tx_control(struct il_priv
*il
, u32 rate_n_flags
,
2851 struct ieee80211_tx_info
*info
)
2853 struct ieee80211_tx_rate
*r
= &info
->status
.rates
[0];
2855 info
->status
.antenna
=
2856 ((rate_n_flags
& RATE_MCS_ANT_ABC_MSK
) >> RATE_MCS_ANT_POS
);
2857 if (rate_n_flags
& RATE_MCS_HT_MSK
)
2858 r
->flags
|= IEEE80211_TX_RC_MCS
;
2859 if (rate_n_flags
& RATE_MCS_GF_MSK
)
2860 r
->flags
|= IEEE80211_TX_RC_GREEN_FIELD
;
2861 if (rate_n_flags
& RATE_MCS_HT40_MSK
)
2862 r
->flags
|= IEEE80211_TX_RC_40_MHZ_WIDTH
;
2863 if (rate_n_flags
& RATE_MCS_DUP_MSK
)
2864 r
->flags
|= IEEE80211_TX_RC_DUP_DATA
;
2865 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
2866 r
->flags
|= IEEE80211_TX_RC_SHORT_GI
;
2867 r
->idx
= il4965_hwrate_to_mac80211_idx(rate_n_flags
, info
->band
);
2871 * il4965_hdl_compressed_ba - Handler for N_COMPRESSED_BA
2873 * Handles block-acknowledge notification from device, which reports success
2874 * of frames sent via aggregation.
2877 il4965_hdl_compressed_ba(struct il_priv
*il
, struct il_rx_buf
*rxb
)
2879 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
2880 struct il_compressed_ba_resp
*ba_resp
= &pkt
->u
.compressed_ba
;
2881 struct il_tx_queue
*txq
= NULL
;
2882 struct il_ht_agg
*agg
;
2886 unsigned long flags
;
2888 /* "flow" corresponds to Tx queue */
2889 u16 scd_flow
= le16_to_cpu(ba_resp
->scd_flow
);
2891 /* "ssn" is start of block-ack Tx win, corresponds to idx
2892 * (in Tx queue's circular buffer) of first TFD/frame in win */
2893 u16 ba_resp_scd_ssn
= le16_to_cpu(ba_resp
->scd_ssn
);
2895 if (scd_flow
>= il
->hw_params
.max_txq_num
) {
2896 IL_ERR("BUG_ON scd_flow is bigger than number of queues\n");
2900 txq
= &il
->txq
[scd_flow
];
2901 sta_id
= ba_resp
->sta_id
;
2903 agg
= &il
->stations
[sta_id
].tid
[tid
].agg
;
2904 if (unlikely(agg
->txq_id
!= scd_flow
)) {
2906 * FIXME: this is a uCode bug which need to be addressed,
2907 * log the information and return for now!
2908 * since it is possible happen very often and in order
2909 * not to fill the syslog, don't enable the logging by default
2911 D_TX_REPLY("BA scd_flow %d does not match txq_id %d\n",
2912 scd_flow
, agg
->txq_id
);
2916 /* Find idx just before block-ack win */
2917 idx
= il_queue_dec_wrap(ba_resp_scd_ssn
& 0xff, txq
->q
.n_bd
);
2919 spin_lock_irqsave(&il
->sta_lock
, flags
);
2921 D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " "sta_id = %d\n",
2922 agg
->wait_for_ba
, (u8
*) &ba_resp
->sta_addr_lo32
,
2924 D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," "scd_flow = "
2925 "%d, scd_ssn = %d\n", ba_resp
->tid
, ba_resp
->seq_ctl
,
2926 (unsigned long long)le64_to_cpu(ba_resp
->bitmap
),
2927 ba_resp
->scd_flow
, ba_resp
->scd_ssn
);
2928 D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg
->start_idx
,
2929 (unsigned long long)agg
->bitmap
);
2931 /* Update driver's record of ACK vs. not for each frame in win */
2932 il4965_tx_status_reply_compressed_ba(il
, agg
, ba_resp
);
2934 /* Release all TFDs before the SSN, i.e. all TFDs in front of
2935 * block-ack win (we assume that they've been successfully
2936 * transmitted ... if not, it's too late anyway). */
2937 if (txq
->q
.read_ptr
!= (ba_resp_scd_ssn
& 0xff)) {
2938 /* calculate mac80211 ampdu sw queue to wake */
2939 int freed
= il4965_tx_queue_reclaim(il
, scd_flow
, idx
);
2940 il4965_free_tfds_in_queue(il
, sta_id
, tid
, freed
);
2942 if (il_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2943 il
->mac80211_registered
&&
2944 agg
->state
!= IL_EMPTYING_HW_QUEUE_DELBA
)
2945 il_wake_queue(il
, txq
);
2947 il4965_txq_check_empty(il
, sta_id
, tid
, scd_flow
);
2950 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2953 #ifdef CONFIG_IWLEGACY_DEBUG
2955 il4965_get_tx_fail_reason(u32 status
)
2957 #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
2958 #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
2960 switch (status
& TX_STATUS_MSK
) {
2961 case TX_STATUS_SUCCESS
:
2963 TX_STATUS_POSTPONE(DELAY
);
2964 TX_STATUS_POSTPONE(FEW_BYTES
);
2965 TX_STATUS_POSTPONE(QUIET_PERIOD
);
2966 TX_STATUS_POSTPONE(CALC_TTAK
);
2967 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY
);
2968 TX_STATUS_FAIL(SHORT_LIMIT
);
2969 TX_STATUS_FAIL(LONG_LIMIT
);
2970 TX_STATUS_FAIL(FIFO_UNDERRUN
);
2971 TX_STATUS_FAIL(DRAIN_FLOW
);
2972 TX_STATUS_FAIL(RFKILL_FLUSH
);
2973 TX_STATUS_FAIL(LIFE_EXPIRE
);
2974 TX_STATUS_FAIL(DEST_PS
);
2975 TX_STATUS_FAIL(HOST_ABORTED
);
2976 TX_STATUS_FAIL(BT_RETRY
);
2977 TX_STATUS_FAIL(STA_INVALID
);
2978 TX_STATUS_FAIL(FRAG_DROPPED
);
2979 TX_STATUS_FAIL(TID_DISABLE
);
2980 TX_STATUS_FAIL(FIFO_FLUSHED
);
2981 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL
);
2982 TX_STATUS_FAIL(PASSIVE_NO_RX
);
2983 TX_STATUS_FAIL(NO_BEACON_ON_RADAR
);
2988 #undef TX_STATUS_FAIL
2989 #undef TX_STATUS_POSTPONE
2991 #endif /* CONFIG_IWLEGACY_DEBUG */
2993 static struct il_link_quality_cmd
*
2994 il4965_sta_alloc_lq(struct il_priv
*il
, u8 sta_id
)
2997 struct il_link_quality_cmd
*link_cmd
;
2999 __le32 rate_n_flags
;
3001 link_cmd
= kzalloc(sizeof(struct il_link_quality_cmd
), GFP_KERNEL
);
3003 IL_ERR("Unable to allocate memory for LQ cmd.\n");
3006 /* Set up the rate scaling to start at selected rate, fall back
3007 * all the way down to 1M in IEEE order, and then spin on 1M */
3008 if (il
->band
== IEEE80211_BAND_5GHZ
)
3013 if (r
>= IL_FIRST_CCK_RATE
&& r
<= IL_LAST_CCK_RATE
)
3014 rate_flags
|= RATE_MCS_CCK_MSK
;
3017 il4965_first_antenna(il
->hw_params
.
3018 valid_tx_ant
) << RATE_MCS_ANT_POS
;
3019 rate_n_flags
= cpu_to_le32(il_rates
[r
].plcp
| rate_flags
);
3020 for (i
= 0; i
< LINK_QUAL_MAX_RETRY_NUM
; i
++)
3021 link_cmd
->rs_table
[i
].rate_n_flags
= rate_n_flags
;
3023 link_cmd
->general_params
.single_stream_ant_msk
=
3024 il4965_first_antenna(il
->hw_params
.valid_tx_ant
);
3026 link_cmd
->general_params
.dual_stream_ant_msk
=
3027 il
->hw_params
.valid_tx_ant
& ~il4965_first_antenna(il
->hw_params
.
3029 if (!link_cmd
->general_params
.dual_stream_ant_msk
) {
3030 link_cmd
->general_params
.dual_stream_ant_msk
= ANT_AB
;
3031 } else if (il4965_num_of_ant(il
->hw_params
.valid_tx_ant
) == 2) {
3032 link_cmd
->general_params
.dual_stream_ant_msk
=
3033 il
->hw_params
.valid_tx_ant
;
3036 link_cmd
->agg_params
.agg_dis_start_th
= LINK_QUAL_AGG_DISABLE_START_DEF
;
3037 link_cmd
->agg_params
.agg_time_limit
=
3038 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF
);
3040 link_cmd
->sta_id
= sta_id
;
3046 * il4965_add_bssid_station - Add the special IBSS BSSID station
3051 il4965_add_bssid_station(struct il_priv
*il
, const u8
*addr
, u8
*sta_id_r
)
3055 struct il_link_quality_cmd
*link_cmd
;
3056 unsigned long flags
;
3059 *sta_id_r
= IL_INVALID_STATION
;
3061 ret
= il_add_station_common(il
, addr
, 0, NULL
, &sta_id
);
3063 IL_ERR("Unable to add station %pM\n", addr
);
3070 spin_lock_irqsave(&il
->sta_lock
, flags
);
3071 il
->stations
[sta_id
].used
|= IL_STA_LOCAL
;
3072 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3074 /* Set up default rate scaling table in device's station table */
3075 link_cmd
= il4965_sta_alloc_lq(il
, sta_id
);
3077 IL_ERR("Unable to initialize rate scaling for station %pM.\n",
3082 ret
= il_send_lq_cmd(il
, link_cmd
, CMD_SYNC
, true);
3084 IL_ERR("Link quality command failed (%d)\n", ret
);
3086 spin_lock_irqsave(&il
->sta_lock
, flags
);
3087 il
->stations
[sta_id
].lq
= link_cmd
;
3088 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3094 il4965_static_wepkey_cmd(struct il_priv
*il
, bool send_if_empty
)
3097 u8 buff
[sizeof(struct il_wep_cmd
) +
3098 sizeof(struct il_wep_key
) * WEP_KEYS_MAX
];
3099 struct il_wep_cmd
*wep_cmd
= (struct il_wep_cmd
*)buff
;
3100 size_t cmd_size
= sizeof(struct il_wep_cmd
);
3101 struct il_host_cmd cmd
= {
3106 bool not_empty
= false;
3111 cmd_size
+ (sizeof(struct il_wep_key
) * WEP_KEYS_MAX
));
3113 for (i
= 0; i
< WEP_KEYS_MAX
; i
++) {
3114 u8 key_size
= il
->_4965
.wep_keys
[i
].key_size
;
3116 wep_cmd
->key
[i
].key_idx
= i
;
3118 wep_cmd
->key
[i
].key_offset
= i
;
3121 wep_cmd
->key
[i
].key_offset
= WEP_INVALID_OFFSET
;
3123 wep_cmd
->key
[i
].key_size
= key_size
;
3124 memcpy(&wep_cmd
->key
[i
].key
[3], il
->_4965
.wep_keys
[i
].key
, key_size
);
3127 wep_cmd
->global_key_type
= WEP_KEY_WEP_TYPE
;
3128 wep_cmd
->num_keys
= WEP_KEYS_MAX
;
3130 cmd_size
+= sizeof(struct il_wep_key
) * WEP_KEYS_MAX
;
3133 if (not_empty
|| send_if_empty
)
3134 return il_send_cmd(il
, &cmd
);
3140 il4965_restore_default_wep_keys(struct il_priv
*il
)
3142 lockdep_assert_held(&il
->mutex
);
3144 return il4965_static_wepkey_cmd(il
, false);
3148 il4965_remove_default_wep_key(struct il_priv
*il
,
3149 struct ieee80211_key_conf
*keyconf
)
3152 int idx
= keyconf
->keyidx
;
3154 lockdep_assert_held(&il
->mutex
);
3156 D_WEP("Removing default WEP key: idx=%d\n", idx
);
3158 memset(&il
->_4965
.wep_keys
[idx
], 0, sizeof(struct il_wep_key
));
3159 if (il_is_rfkill(il
)) {
3160 D_WEP("Not sending C_WEPKEY command due to RFKILL.\n");
3161 /* but keys in device are clear anyway so return success */
3164 ret
= il4965_static_wepkey_cmd(il
, 1);
3165 D_WEP("Remove default WEP key: idx=%d ret=%d\n", idx
, ret
);
3171 il4965_set_default_wep_key(struct il_priv
*il
,
3172 struct ieee80211_key_conf
*keyconf
)
3175 int len
= keyconf
->keylen
;
3176 int idx
= keyconf
->keyidx
;
3178 lockdep_assert_held(&il
->mutex
);
3180 if (len
!= WEP_KEY_LEN_128
&& len
!= WEP_KEY_LEN_64
) {
3181 D_WEP("Bad WEP key length %d\n", keyconf
->keylen
);
3185 keyconf
->flags
&= ~IEEE80211_KEY_FLAG_GENERATE_IV
;
3186 keyconf
->hw_key_idx
= HW_KEY_DEFAULT
;
3187 il
->stations
[IL_AP_ID
].keyinfo
.cipher
= keyconf
->cipher
;
3189 il
->_4965
.wep_keys
[idx
].key_size
= len
;
3190 memcpy(&il
->_4965
.wep_keys
[idx
].key
, &keyconf
->key
, len
);
3192 ret
= il4965_static_wepkey_cmd(il
, false);
3194 D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", len
, idx
, ret
);
3199 il4965_set_wep_dynamic_key_info(struct il_priv
*il
,
3200 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3202 unsigned long flags
;
3203 __le16 key_flags
= 0;
3204 struct il_addsta_cmd sta_cmd
;
3206 lockdep_assert_held(&il
->mutex
);
3208 keyconf
->flags
&= ~IEEE80211_KEY_FLAG_GENERATE_IV
;
3210 key_flags
|= (STA_KEY_FLG_WEP
| STA_KEY_FLG_MAP_KEY_MSK
);
3211 key_flags
|= cpu_to_le16(keyconf
->keyidx
<< STA_KEY_FLG_KEYID_POS
);
3212 key_flags
&= ~STA_KEY_FLG_INVALID
;
3214 if (keyconf
->keylen
== WEP_KEY_LEN_128
)
3215 key_flags
|= STA_KEY_FLG_KEY_SIZE_MSK
;
3217 if (sta_id
== il
->hw_params
.bcast_id
)
3218 key_flags
|= STA_KEY_MULTICAST_MSK
;
3220 spin_lock_irqsave(&il
->sta_lock
, flags
);
3222 il
->stations
[sta_id
].keyinfo
.cipher
= keyconf
->cipher
;
3223 il
->stations
[sta_id
].keyinfo
.keylen
= keyconf
->keylen
;
3224 il
->stations
[sta_id
].keyinfo
.keyidx
= keyconf
->keyidx
;
3226 memcpy(il
->stations
[sta_id
].keyinfo
.key
, keyconf
->key
, keyconf
->keylen
);
3228 memcpy(&il
->stations
[sta_id
].sta
.key
.key
[3], keyconf
->key
,
3231 if ((il
->stations
[sta_id
].sta
.key
.
3232 key_flags
& STA_KEY_FLG_ENCRYPT_MSK
) == STA_KEY_FLG_NO_ENC
)
3233 il
->stations
[sta_id
].sta
.key
.key_offset
=
3234 il_get_free_ucode_key_idx(il
);
3235 /* else, we are overriding an existing key => no need to allocated room
3238 WARN(il
->stations
[sta_id
].sta
.key
.key_offset
== WEP_INVALID_OFFSET
,
3239 "no space for a new key");
3241 il
->stations
[sta_id
].sta
.key
.key_flags
= key_flags
;
3242 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3243 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3245 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3246 sizeof(struct il_addsta_cmd
));
3247 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3249 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3253 il4965_set_ccmp_dynamic_key_info(struct il_priv
*il
,
3254 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3256 unsigned long flags
;
3257 __le16 key_flags
= 0;
3258 struct il_addsta_cmd sta_cmd
;
3260 lockdep_assert_held(&il
->mutex
);
3262 key_flags
|= (STA_KEY_FLG_CCMP
| STA_KEY_FLG_MAP_KEY_MSK
);
3263 key_flags
|= cpu_to_le16(keyconf
->keyidx
<< STA_KEY_FLG_KEYID_POS
);
3264 key_flags
&= ~STA_KEY_FLG_INVALID
;
3266 if (sta_id
== il
->hw_params
.bcast_id
)
3267 key_flags
|= STA_KEY_MULTICAST_MSK
;
3269 keyconf
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
3271 spin_lock_irqsave(&il
->sta_lock
, flags
);
3272 il
->stations
[sta_id
].keyinfo
.cipher
= keyconf
->cipher
;
3273 il
->stations
[sta_id
].keyinfo
.keylen
= keyconf
->keylen
;
3275 memcpy(il
->stations
[sta_id
].keyinfo
.key
, keyconf
->key
, keyconf
->keylen
);
3277 memcpy(il
->stations
[sta_id
].sta
.key
.key
, keyconf
->key
, keyconf
->keylen
);
3279 if ((il
->stations
[sta_id
].sta
.key
.
3280 key_flags
& STA_KEY_FLG_ENCRYPT_MSK
) == STA_KEY_FLG_NO_ENC
)
3281 il
->stations
[sta_id
].sta
.key
.key_offset
=
3282 il_get_free_ucode_key_idx(il
);
3283 /* else, we are overriding an existing key => no need to allocated room
3286 WARN(il
->stations
[sta_id
].sta
.key
.key_offset
== WEP_INVALID_OFFSET
,
3287 "no space for a new key");
3289 il
->stations
[sta_id
].sta
.key
.key_flags
= key_flags
;
3290 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3291 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3293 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3294 sizeof(struct il_addsta_cmd
));
3295 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3297 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3301 il4965_set_tkip_dynamic_key_info(struct il_priv
*il
,
3302 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3304 unsigned long flags
;
3306 __le16 key_flags
= 0;
3308 key_flags
|= (STA_KEY_FLG_TKIP
| STA_KEY_FLG_MAP_KEY_MSK
);
3309 key_flags
|= cpu_to_le16(keyconf
->keyidx
<< STA_KEY_FLG_KEYID_POS
);
3310 key_flags
&= ~STA_KEY_FLG_INVALID
;
3312 if (sta_id
== il
->hw_params
.bcast_id
)
3313 key_flags
|= STA_KEY_MULTICAST_MSK
;
3315 keyconf
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
3316 keyconf
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
3318 spin_lock_irqsave(&il
->sta_lock
, flags
);
3320 il
->stations
[sta_id
].keyinfo
.cipher
= keyconf
->cipher
;
3321 il
->stations
[sta_id
].keyinfo
.keylen
= 16;
3323 if ((il
->stations
[sta_id
].sta
.key
.
3324 key_flags
& STA_KEY_FLG_ENCRYPT_MSK
) == STA_KEY_FLG_NO_ENC
)
3325 il
->stations
[sta_id
].sta
.key
.key_offset
=
3326 il_get_free_ucode_key_idx(il
);
3327 /* else, we are overriding an existing key => no need to allocated room
3330 WARN(il
->stations
[sta_id
].sta
.key
.key_offset
== WEP_INVALID_OFFSET
,
3331 "no space for a new key");
3333 il
->stations
[sta_id
].sta
.key
.key_flags
= key_flags
;
3335 /* This copy is acutally not needed: we get the key with each TX */
3336 memcpy(il
->stations
[sta_id
].keyinfo
.key
, keyconf
->key
, 16);
3338 memcpy(il
->stations
[sta_id
].sta
.key
.key
, keyconf
->key
, 16);
3340 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3346 il4965_update_tkip_key(struct il_priv
*il
, struct ieee80211_key_conf
*keyconf
,
3347 struct ieee80211_sta
*sta
, u32 iv32
, u16
*phase1key
)
3350 unsigned long flags
;
3353 if (il_scan_cancel(il
)) {
3354 /* cancel scan failed, just live w/ bad key and rely
3355 briefly on SW decryption */
3359 sta_id
= il_sta_id_or_broadcast(il
, sta
);
3360 if (sta_id
== IL_INVALID_STATION
)
3363 spin_lock_irqsave(&il
->sta_lock
, flags
);
3365 il
->stations
[sta_id
].sta
.key
.tkip_rx_tsc_byte2
= (u8
) iv32
;
3367 for (i
= 0; i
< 5; i
++)
3368 il
->stations
[sta_id
].sta
.key
.tkip_rx_ttak
[i
] =
3369 cpu_to_le16(phase1key
[i
]);
3371 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3372 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3374 il_send_add_sta(il
, &il
->stations
[sta_id
].sta
, CMD_ASYNC
);
3376 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3380 il4965_remove_dynamic_key(struct il_priv
*il
,
3381 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3383 unsigned long flags
;
3386 struct il_addsta_cmd sta_cmd
;
3388 lockdep_assert_held(&il
->mutex
);
3390 il
->_4965
.key_mapping_keys
--;
3392 spin_lock_irqsave(&il
->sta_lock
, flags
);
3393 key_flags
= le16_to_cpu(il
->stations
[sta_id
].sta
.key
.key_flags
);
3394 keyidx
= (key_flags
>> STA_KEY_FLG_KEYID_POS
) & 0x3;
3396 D_WEP("Remove dynamic key: idx=%d sta=%d\n", keyconf
->keyidx
, sta_id
);
3398 if (keyconf
->keyidx
!= keyidx
) {
3399 /* We need to remove a key with idx different that the one
3400 * in the uCode. This means that the key we need to remove has
3401 * been replaced by another one with different idx.
3402 * Don't do anything and return ok
3404 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3408 if (il
->stations
[sta_id
].sta
.key
.key_offset
== WEP_INVALID_OFFSET
) {
3409 IL_WARN("Removing wrong key %d 0x%x\n", keyconf
->keyidx
,
3411 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3415 if (!test_and_clear_bit
3416 (il
->stations
[sta_id
].sta
.key
.key_offset
, &il
->ucode_key_table
))
3417 IL_ERR("idx %d not used in uCode key table.\n",
3418 il
->stations
[sta_id
].sta
.key
.key_offset
);
3419 memset(&il
->stations
[sta_id
].keyinfo
, 0, sizeof(struct il_hw_key
));
3420 memset(&il
->stations
[sta_id
].sta
.key
, 0, sizeof(struct il4965_keyinfo
));
3421 il
->stations
[sta_id
].sta
.key
.key_flags
=
3422 STA_KEY_FLG_NO_ENC
| STA_KEY_FLG_INVALID
;
3423 il
->stations
[sta_id
].sta
.key
.key_offset
= WEP_INVALID_OFFSET
;
3424 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3425 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3427 if (il_is_rfkill(il
)) {
3429 ("Not sending C_ADD_STA command because RFKILL enabled.\n");
3430 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3433 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3434 sizeof(struct il_addsta_cmd
));
3435 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3437 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3441 il4965_set_dynamic_key(struct il_priv
*il
, struct ieee80211_key_conf
*keyconf
,
3446 lockdep_assert_held(&il
->mutex
);
3448 il
->_4965
.key_mapping_keys
++;
3449 keyconf
->hw_key_idx
= HW_KEY_DYNAMIC
;
3451 switch (keyconf
->cipher
) {
3452 case WLAN_CIPHER_SUITE_CCMP
:
3454 il4965_set_ccmp_dynamic_key_info(il
, keyconf
, sta_id
);
3456 case WLAN_CIPHER_SUITE_TKIP
:
3458 il4965_set_tkip_dynamic_key_info(il
, keyconf
, sta_id
);
3460 case WLAN_CIPHER_SUITE_WEP40
:
3461 case WLAN_CIPHER_SUITE_WEP104
:
3462 ret
= il4965_set_wep_dynamic_key_info(il
, keyconf
, sta_id
);
3465 IL_ERR("Unknown alg: %s cipher = %x\n", __func__
,
3470 D_WEP("Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n",
3471 keyconf
->cipher
, keyconf
->keylen
, keyconf
->keyidx
, sta_id
, ret
);
3477 * il4965_alloc_bcast_station - add broadcast station into driver's station table.
3479 * This adds the broadcast station into the driver's station table
3480 * and marks it driver active, so that it will be restored to the
3481 * device at the next best time.
3484 il4965_alloc_bcast_station(struct il_priv
*il
)
3486 struct il_link_quality_cmd
*link_cmd
;
3487 unsigned long flags
;
3490 spin_lock_irqsave(&il
->sta_lock
, flags
);
3491 sta_id
= il_prep_station(il
, il_bcast_addr
, false, NULL
);
3492 if (sta_id
== IL_INVALID_STATION
) {
3493 IL_ERR("Unable to prepare broadcast station\n");
3494 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3499 il
->stations
[sta_id
].used
|= IL_STA_DRIVER_ACTIVE
;
3500 il
->stations
[sta_id
].used
|= IL_STA_BCAST
;
3501 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3503 link_cmd
= il4965_sta_alloc_lq(il
, sta_id
);
3506 ("Unable to initialize rate scaling for bcast station.\n");
3510 spin_lock_irqsave(&il
->sta_lock
, flags
);
3511 il
->stations
[sta_id
].lq
= link_cmd
;
3512 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3518 * il4965_update_bcast_station - update broadcast station's LQ command
3520 * Only used by iwl4965. Placed here to have all bcast station management
3524 il4965_update_bcast_station(struct il_priv
*il
)
3526 unsigned long flags
;
3527 struct il_link_quality_cmd
*link_cmd
;
3528 u8 sta_id
= il
->hw_params
.bcast_id
;
3530 link_cmd
= il4965_sta_alloc_lq(il
, sta_id
);
3532 IL_ERR("Unable to initialize rate scaling for bcast sta.\n");
3536 spin_lock_irqsave(&il
->sta_lock
, flags
);
3537 if (il
->stations
[sta_id
].lq
)
3538 kfree(il
->stations
[sta_id
].lq
);
3540 D_INFO("Bcast sta rate scaling has not been initialized.\n");
3541 il
->stations
[sta_id
].lq
= link_cmd
;
3542 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3548 il4965_update_bcast_stations(struct il_priv
*il
)
3550 return il4965_update_bcast_station(il
);
3554 * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table
3557 il4965_sta_tx_modify_enable_tid(struct il_priv
*il
, int sta_id
, int tid
)
3559 unsigned long flags
;
3560 struct il_addsta_cmd sta_cmd
;
3562 lockdep_assert_held(&il
->mutex
);
3564 /* Remove "disable" flag, to enable Tx for this TID */
3565 spin_lock_irqsave(&il
->sta_lock
, flags
);
3566 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_TID_DISABLE_TX
;
3567 il
->stations
[sta_id
].sta
.tid_disable_tx
&= cpu_to_le16(~(1 << tid
));
3568 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3569 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3570 sizeof(struct il_addsta_cmd
));
3571 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3573 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3577 il4965_sta_rx_agg_start(struct il_priv
*il
, struct ieee80211_sta
*sta
, int tid
,
3580 unsigned long flags
;
3582 struct il_addsta_cmd sta_cmd
;
3584 lockdep_assert_held(&il
->mutex
);
3586 sta_id
= il_sta_id(sta
);
3587 if (sta_id
== IL_INVALID_STATION
)
3590 spin_lock_irqsave(&il
->sta_lock
, flags
);
3591 il
->stations
[sta_id
].sta
.station_flags_msk
= 0;
3592 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_ADDBA_TID_MSK
;
3593 il
->stations
[sta_id
].sta
.add_immediate_ba_tid
= (u8
) tid
;
3594 il
->stations
[sta_id
].sta
.add_immediate_ba_ssn
= cpu_to_le16(ssn
);
3595 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3596 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3597 sizeof(struct il_addsta_cmd
));
3598 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3600 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3604 il4965_sta_rx_agg_stop(struct il_priv
*il
, struct ieee80211_sta
*sta
, int tid
)
3606 unsigned long flags
;
3608 struct il_addsta_cmd sta_cmd
;
3610 lockdep_assert_held(&il
->mutex
);
3612 sta_id
= il_sta_id(sta
);
3613 if (sta_id
== IL_INVALID_STATION
) {
3614 IL_ERR("Invalid station for AGG tid %d\n", tid
);
3618 spin_lock_irqsave(&il
->sta_lock
, flags
);
3619 il
->stations
[sta_id
].sta
.station_flags_msk
= 0;
3620 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_DELBA_TID_MSK
;
3621 il
->stations
[sta_id
].sta
.remove_immediate_ba_tid
= (u8
) tid
;
3622 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3623 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3624 sizeof(struct il_addsta_cmd
));
3625 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3627 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3631 il4965_sta_modify_sleep_tx_count(struct il_priv
*il
, int sta_id
, int cnt
)
3633 unsigned long flags
;
3635 spin_lock_irqsave(&il
->sta_lock
, flags
);
3636 il
->stations
[sta_id
].sta
.station_flags
|= STA_FLG_PWR_SAVE_MSK
;
3637 il
->stations
[sta_id
].sta
.station_flags_msk
= STA_FLG_PWR_SAVE_MSK
;
3638 il
->stations
[sta_id
].sta
.sta
.modify_mask
=
3639 STA_MODIFY_SLEEP_TX_COUNT_MSK
;
3640 il
->stations
[sta_id
].sta
.sleep_tx_count
= cpu_to_le16(cnt
);
3641 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3642 il_send_add_sta(il
, &il
->stations
[sta_id
].sta
, CMD_ASYNC
);
3643 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3648 il4965_update_chain_flags(struct il_priv
*il
)
3650 if (il
->ops
->set_rxon_chain
) {
3651 il
->ops
->set_rxon_chain(il
);
3652 if (il
->active
.rx_chain
!= il
->staging
.rx_chain
)
3658 il4965_clear_free_frames(struct il_priv
*il
)
3660 struct list_head
*element
;
3662 D_INFO("%d frames on pre-allocated heap on clear.\n", il
->frames_count
);
3664 while (!list_empty(&il
->free_frames
)) {
3665 element
= il
->free_frames
.next
;
3667 kfree(list_entry(element
, struct il_frame
, list
));
3671 if (il
->frames_count
) {
3672 IL_WARN("%d frames still in use. Did we lose one?\n",
3674 il
->frames_count
= 0;
3678 static struct il_frame
*
3679 il4965_get_free_frame(struct il_priv
*il
)
3681 struct il_frame
*frame
;
3682 struct list_head
*element
;
3683 if (list_empty(&il
->free_frames
)) {
3684 frame
= kzalloc(sizeof(*frame
), GFP_KERNEL
);
3686 IL_ERR("Could not allocate frame!\n");
3694 element
= il
->free_frames
.next
;
3696 return list_entry(element
, struct il_frame
, list
);
3700 il4965_free_frame(struct il_priv
*il
, struct il_frame
*frame
)
3702 memset(frame
, 0, sizeof(*frame
));
3703 list_add(&frame
->list
, &il
->free_frames
);
3707 il4965_fill_beacon_frame(struct il_priv
*il
, struct ieee80211_hdr
*hdr
,
3710 lockdep_assert_held(&il
->mutex
);
3712 if (!il
->beacon_skb
)
3715 if (il
->beacon_skb
->len
> left
)
3718 memcpy(hdr
, il
->beacon_skb
->data
, il
->beacon_skb
->len
);
3720 return il
->beacon_skb
->len
;
3723 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
3725 il4965_set_beacon_tim(struct il_priv
*il
,
3726 struct il_tx_beacon_cmd
*tx_beacon_cmd
, u8
* beacon
,
3730 struct ieee80211_mgmt
*mgmt
= (struct ieee80211_mgmt
*)beacon
;
3733 * The idx is relative to frame start but we start looking at the
3734 * variable-length part of the beacon.
3736 tim_idx
= mgmt
->u
.beacon
.variable
- beacon
;
3738 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
3739 while ((tim_idx
< (frame_size
- 2)) &&
3740 (beacon
[tim_idx
] != WLAN_EID_TIM
))
3741 tim_idx
+= beacon
[tim_idx
+ 1] + 2;
3743 /* If TIM field was found, set variables */
3744 if ((tim_idx
< (frame_size
- 1)) && (beacon
[tim_idx
] == WLAN_EID_TIM
)) {
3745 tx_beacon_cmd
->tim_idx
= cpu_to_le16(tim_idx
);
3746 tx_beacon_cmd
->tim_size
= beacon
[tim_idx
+ 1];
3748 IL_WARN("Unable to find TIM Element in beacon\n");
3752 il4965_hw_get_beacon_cmd(struct il_priv
*il
, struct il_frame
*frame
)
3754 struct il_tx_beacon_cmd
*tx_beacon_cmd
;
3759 * We have to set up the TX command, the TX Beacon command, and the
3763 lockdep_assert_held(&il
->mutex
);
3765 if (!il
->beacon_enabled
) {
3766 IL_ERR("Trying to build beacon without beaconing enabled\n");
3770 /* Initialize memory */
3771 tx_beacon_cmd
= &frame
->u
.beacon
;
3772 memset(tx_beacon_cmd
, 0, sizeof(*tx_beacon_cmd
));
3774 /* Set up TX beacon contents */
3776 il4965_fill_beacon_frame(il
, tx_beacon_cmd
->frame
,
3777 sizeof(frame
->u
) - sizeof(*tx_beacon_cmd
));
3778 if (WARN_ON_ONCE(frame_size
> MAX_MPDU_SIZE
))
3783 /* Set up TX command fields */
3784 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
) frame_size
);
3785 tx_beacon_cmd
->tx
.sta_id
= il
->hw_params
.bcast_id
;
3786 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
3787 tx_beacon_cmd
->tx
.tx_flags
=
3788 TX_CMD_FLG_SEQ_CTL_MSK
| TX_CMD_FLG_TSF_MSK
|
3789 TX_CMD_FLG_STA_RATE_MSK
;
3791 /* Set up TX beacon command fields */
3792 il4965_set_beacon_tim(il
, tx_beacon_cmd
, (u8
*) tx_beacon_cmd
->frame
,
3795 /* Set up packet rate and flags */
3796 rate
= il_get_lowest_plcp(il
);
3797 il4965_toggle_tx_ant(il
, &il
->mgmt_tx_ant
, il
->hw_params
.valid_tx_ant
);
3798 rate_flags
= BIT(il
->mgmt_tx_ant
) << RATE_MCS_ANT_POS
;
3799 if ((rate
>= IL_FIRST_CCK_RATE
) && (rate
<= IL_LAST_CCK_RATE
))
3800 rate_flags
|= RATE_MCS_CCK_MSK
;
3801 tx_beacon_cmd
->tx
.rate_n_flags
= cpu_to_le32(rate
| rate_flags
);
3803 return sizeof(*tx_beacon_cmd
) + frame_size
;
3807 il4965_send_beacon_cmd(struct il_priv
*il
)
3809 struct il_frame
*frame
;
3810 unsigned int frame_size
;
3813 frame
= il4965_get_free_frame(il
);
3815 IL_ERR("Could not obtain free frame buffer for beacon "
3820 frame_size
= il4965_hw_get_beacon_cmd(il
, frame
);
3822 IL_ERR("Error configuring the beacon command\n");
3823 il4965_free_frame(il
, frame
);
3827 rc
= il_send_cmd_pdu(il
, C_TX_BEACON
, frame_size
, &frame
->u
.cmd
[0]);
3829 il4965_free_frame(il
, frame
);
3834 static inline dma_addr_t
3835 il4965_tfd_tb_get_addr(struct il_tfd
*tfd
, u8 idx
)
3837 struct il_tfd_tb
*tb
= &tfd
->tbs
[idx
];
3839 dma_addr_t addr
= get_unaligned_le32(&tb
->lo
);
3840 if (sizeof(dma_addr_t
) > sizeof(u32
))
3842 ((dma_addr_t
) (le16_to_cpu(tb
->hi_n_len
) & 0xF) << 16) <<
3849 il4965_tfd_tb_get_len(struct il_tfd
*tfd
, u8 idx
)
3851 struct il_tfd_tb
*tb
= &tfd
->tbs
[idx
];
3853 return le16_to_cpu(tb
->hi_n_len
) >> 4;
3857 il4965_tfd_set_tb(struct il_tfd
*tfd
, u8 idx
, dma_addr_t addr
, u16 len
)
3859 struct il_tfd_tb
*tb
= &tfd
->tbs
[idx
];
3860 u16 hi_n_len
= len
<< 4;
3862 put_unaligned_le32(addr
, &tb
->lo
);
3863 if (sizeof(dma_addr_t
) > sizeof(u32
))
3864 hi_n_len
|= ((addr
>> 16) >> 16) & 0xF;
3866 tb
->hi_n_len
= cpu_to_le16(hi_n_len
);
3868 tfd
->num_tbs
= idx
+ 1;
3872 il4965_tfd_get_num_tbs(struct il_tfd
*tfd
)
3874 return tfd
->num_tbs
& 0x1f;
3878 * il4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
3879 * @il - driver ilate data
3882 * Does NOT advance any TFD circular buffer read/write idxes
3883 * Does NOT free the TFD itself (which is within circular buffer)
3886 il4965_hw_txq_free_tfd(struct il_priv
*il
, struct il_tx_queue
*txq
)
3888 struct il_tfd
*tfd_tmp
= (struct il_tfd
*)txq
->tfds
;
3890 struct pci_dev
*dev
= il
->pci_dev
;
3891 int idx
= txq
->q
.read_ptr
;
3895 tfd
= &tfd_tmp
[idx
];
3897 /* Sanity check on number of chunks */
3898 num_tbs
= il4965_tfd_get_num_tbs(tfd
);
3900 if (num_tbs
>= IL_NUM_OF_TBS
) {
3901 IL_ERR("Too many chunks: %i\n", num_tbs
);
3902 /* @todo issue fatal error, it is quite serious situation */
3908 pci_unmap_single(dev
, dma_unmap_addr(&txq
->meta
[idx
], mapping
),
3909 dma_unmap_len(&txq
->meta
[idx
], len
),
3910 PCI_DMA_BIDIRECTIONAL
);
3912 /* Unmap chunks, if any. */
3913 for (i
= 1; i
< num_tbs
; i
++)
3914 pci_unmap_single(dev
, il4965_tfd_tb_get_addr(tfd
, i
),
3915 il4965_tfd_tb_get_len(tfd
, i
),
3920 struct sk_buff
*skb
= txq
->skbs
[txq
->q
.read_ptr
];
3922 /* can be called from irqs-disabled context */
3924 dev_kfree_skb_any(skb
);
3925 txq
->skbs
[txq
->q
.read_ptr
] = NULL
;
3931 il4965_hw_txq_attach_buf_to_tfd(struct il_priv
*il
, struct il_tx_queue
*txq
,
3932 dma_addr_t addr
, u16 len
, u8 reset
, u8 pad
)
3935 struct il_tfd
*tfd
, *tfd_tmp
;
3939 tfd_tmp
= (struct il_tfd
*)txq
->tfds
;
3940 tfd
= &tfd_tmp
[q
->write_ptr
];
3943 memset(tfd
, 0, sizeof(*tfd
));
3945 num_tbs
= il4965_tfd_get_num_tbs(tfd
);
3947 /* Each TFD can point to a maximum 20 Tx buffers */
3948 if (num_tbs
>= IL_NUM_OF_TBS
) {
3949 IL_ERR("Error can not send more than %d chunks\n",
3954 BUG_ON(addr
& ~DMA_BIT_MASK(36));
3955 if (unlikely(addr
& ~IL_TX_DMA_MASK
))
3956 IL_ERR("Unaligned address = %llx\n", (unsigned long long)addr
);
3958 il4965_tfd_set_tb(tfd
, num_tbs
, addr
, len
);
3964 * Tell nic where to find circular buffer of Tx Frame Descriptors for
3965 * given Tx queue, and enable the DMA channel used for that queue.
3967 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
3968 * channels supported in hardware.
3971 il4965_hw_tx_queue_init(struct il_priv
*il
, struct il_tx_queue
*txq
)
3973 int txq_id
= txq
->q
.id
;
3975 /* Circular buffer (TFD queue in DRAM) physical base address */
3976 il_wr(il
, FH49_MEM_CBBC_QUEUE(txq_id
), txq
->q
.dma_addr
>> 8);
3981 /******************************************************************************
3983 * Generic RX handler implementations
3985 ******************************************************************************/
3987 il4965_hdl_alive(struct il_priv
*il
, struct il_rx_buf
*rxb
)
3989 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
3990 struct il_alive_resp
*palive
;
3991 struct delayed_work
*pwork
;
3993 palive
= &pkt
->u
.alive_frame
;
3995 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
3996 palive
->is_valid
, palive
->ver_type
, palive
->ver_subtype
);
3998 if (palive
->ver_subtype
== INITIALIZE_SUBTYPE
) {
3999 D_INFO("Initialization Alive received.\n");
4000 memcpy(&il
->card_alive_init
, &pkt
->u
.alive_frame
,
4001 sizeof(struct il_init_alive_resp
));
4002 pwork
= &il
->init_alive_start
;
4004 D_INFO("Runtime Alive received.\n");
4005 memcpy(&il
->card_alive
, &pkt
->u
.alive_frame
,
4006 sizeof(struct il_alive_resp
));
4007 pwork
= &il
->alive_start
;
4010 /* We delay the ALIVE response by 5ms to
4011 * give the HW RF Kill time to activate... */
4012 if (palive
->is_valid
== UCODE_VALID_OK
)
4013 queue_delayed_work(il
->workqueue
, pwork
, msecs_to_jiffies(5));
4015 IL_WARN("uCode did not respond OK.\n");
4019 * il4965_bg_stats_periodic - Timer callback to queue stats
4021 * This callback is provided in order to send a stats request.
4023 * This timer function is continually reset to execute within
4024 * 60 seconds since the last N_STATS was received. We need to
4025 * ensure we receive the stats in order to update the temperature
4026 * used for calibrating the TXPOWER.
4029 il4965_bg_stats_periodic(unsigned long data
)
4031 struct il_priv
*il
= (struct il_priv
*)data
;
4033 if (test_bit(S_EXIT_PENDING
, &il
->status
))
4036 /* dont send host command if rf-kill is on */
4037 if (!il_is_ready_rf(il
))
4040 il_send_stats_request(il
, CMD_ASYNC
, false);
4044 il4965_hdl_beacon(struct il_priv
*il
, struct il_rx_buf
*rxb
)
4046 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
4047 struct il4965_beacon_notif
*beacon
=
4048 (struct il4965_beacon_notif
*)pkt
->u
.raw
;
4049 #ifdef CONFIG_IWLEGACY_DEBUG
4050 u8 rate
= il4965_hw_get_rate(beacon
->beacon_notify_hdr
.rate_n_flags
);
4052 D_RX("beacon status %x retries %d iss %d tsf:0x%.8x%.8x rate %d\n",
4053 le32_to_cpu(beacon
->beacon_notify_hdr
.u
.status
) & TX_STATUS_MSK
,
4054 beacon
->beacon_notify_hdr
.failure_frame
,
4055 le32_to_cpu(beacon
->ibss_mgr_status
),
4056 le32_to_cpu(beacon
->high_tsf
), le32_to_cpu(beacon
->low_tsf
), rate
);
4058 il
->ibss_manager
= le32_to_cpu(beacon
->ibss_mgr_status
);
4062 il4965_perform_ct_kill_task(struct il_priv
*il
)
4064 unsigned long flags
;
4066 D_POWER("Stop all queues\n");
4068 if (il
->mac80211_registered
)
4069 ieee80211_stop_queues(il
->hw
);
4071 _il_wr(il
, CSR_UCODE_DRV_GP1_SET
,
4072 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
4073 _il_rd(il
, CSR_UCODE_DRV_GP1
);
4075 spin_lock_irqsave(&il
->reg_lock
, flags
);
4076 if (likely(_il_grab_nic_access(il
)))
4077 _il_release_nic_access(il
);
4078 spin_unlock_irqrestore(&il
->reg_lock
, flags
);
4081 /* Handle notification from uCode that card's power state is changing
4082 * due to software, hardware, or critical temperature RFKILL */
4084 il4965_hdl_card_state(struct il_priv
*il
, struct il_rx_buf
*rxb
)
4086 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
4087 u32 flags
= le32_to_cpu(pkt
->u
.card_state_notif
.flags
);
4088 unsigned long status
= il
->status
;
4090 D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n",
4091 (flags
& HW_CARD_DISABLED
) ? "Kill" : "On",
4092 (flags
& SW_CARD_DISABLED
) ? "Kill" : "On",
4093 (flags
& CT_CARD_DISABLED
) ? "Reached" : "Not reached");
4095 if (flags
& (SW_CARD_DISABLED
| HW_CARD_DISABLED
| CT_CARD_DISABLED
)) {
4097 _il_wr(il
, CSR_UCODE_DRV_GP1_SET
,
4098 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED
);
4100 il_wr(il
, HBUS_TARG_MBX_C
, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED
);
4102 if (!(flags
& RXON_CARD_DISABLED
)) {
4103 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
,
4104 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED
);
4105 il_wr(il
, HBUS_TARG_MBX_C
,
4106 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED
);
4110 if (flags
& CT_CARD_DISABLED
)
4111 il4965_perform_ct_kill_task(il
);
4113 if (flags
& HW_CARD_DISABLED
)
4114 set_bit(S_RFKILL
, &il
->status
);
4116 clear_bit(S_RFKILL
, &il
->status
);
4118 if (!(flags
& RXON_CARD_DISABLED
))
4121 if ((test_bit(S_RFKILL
, &status
) !=
4122 test_bit(S_RFKILL
, &il
->status
)))
4123 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
,
4124 test_bit(S_RFKILL
, &il
->status
));
4126 wake_up(&il
->wait_command_queue
);
4130 * il4965_setup_handlers - Initialize Rx handler callbacks
4132 * Setup the RX handlers for each of the reply types sent from the uCode
4135 * This function chains into the hardware specific files for them to setup
4136 * any hardware specific handlers as well.
4139 il4965_setup_handlers(struct il_priv
*il
)
4141 il
->handlers
[N_ALIVE
] = il4965_hdl_alive
;
4142 il
->handlers
[N_ERROR
] = il_hdl_error
;
4143 il
->handlers
[N_CHANNEL_SWITCH
] = il_hdl_csa
;
4144 il
->handlers
[N_SPECTRUM_MEASUREMENT
] = il_hdl_spectrum_measurement
;
4145 il
->handlers
[N_PM_SLEEP
] = il_hdl_pm_sleep
;
4146 il
->handlers
[N_PM_DEBUG_STATS
] = il_hdl_pm_debug_stats
;
4147 il
->handlers
[N_BEACON
] = il4965_hdl_beacon
;
4150 * The same handler is used for both the REPLY to a discrete
4151 * stats request from the host as well as for the periodic
4152 * stats notifications (after received beacons) from the uCode.
4154 il
->handlers
[C_STATS
] = il4965_hdl_c_stats
;
4155 il
->handlers
[N_STATS
] = il4965_hdl_stats
;
4157 il_setup_rx_scan_handlers(il
);
4159 /* status change handler */
4160 il
->handlers
[N_CARD_STATE
] = il4965_hdl_card_state
;
4162 il
->handlers
[N_MISSED_BEACONS
] = il4965_hdl_missed_beacon
;
4164 il
->handlers
[N_RX_PHY
] = il4965_hdl_rx_phy
;
4165 il
->handlers
[N_RX_MPDU
] = il4965_hdl_rx
;
4166 il
->handlers
[N_RX
] = il4965_hdl_rx
;
4168 il
->handlers
[N_COMPRESSED_BA
] = il4965_hdl_compressed_ba
;
4170 il
->handlers
[C_TX
] = il4965_hdl_tx
;
4174 * il4965_rx_handle - Main entry function for receiving responses from uCode
4176 * Uses the il->handlers callback function array to invoke
4177 * the appropriate handlers, including command responses,
4178 * frame-received notifications, and other notifications.
4181 il4965_rx_handle(struct il_priv
*il
)
4183 struct il_rx_buf
*rxb
;
4184 struct il_rx_pkt
*pkt
;
4185 struct il_rx_queue
*rxq
= &il
->rxq
;
4188 unsigned long flags
;
4193 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
4194 * buffer that the driver may process (last buffer filled by ucode). */
4195 r
= le16_to_cpu(rxq
->rb_stts
->closed_rb_num
) & 0x0FFF;
4198 /* Rx interrupt, but nothing sent from uCode */
4200 D_RX("r = %d, i = %d\n", r
, i
);
4202 /* calculate total frames need to be restock after handling RX */
4203 total_empty
= r
- rxq
->write_actual
;
4204 if (total_empty
< 0)
4205 total_empty
+= RX_QUEUE_SIZE
;
4207 if (total_empty
> (RX_QUEUE_SIZE
/ 2))
4213 rxb
= rxq
->queue
[i
];
4215 /* If an RXB doesn't have a Rx queue slot associated with it,
4216 * then a bug has been introduced in the queue refilling
4217 * routines -- catch it here */
4218 BUG_ON(rxb
== NULL
);
4220 rxq
->queue
[i
] = NULL
;
4222 pci_unmap_page(il
->pci_dev
, rxb
->page_dma
,
4223 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
4224 PCI_DMA_FROMDEVICE
);
4225 pkt
= rxb_addr(rxb
);
4227 len
= le32_to_cpu(pkt
->len_n_flags
) & IL_RX_FRAME_SIZE_MSK
;
4228 len
+= sizeof(u32
); /* account for status word */
4230 /* Reclaim a command buffer only if this packet is a response
4231 * to a (driver-originated) command.
4232 * If the packet (e.g. Rx frame) originated from uCode,
4233 * there is no command buffer to reclaim.
4234 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4235 * but apparently a few don't get set; catch them here. */
4236 reclaim
= !(pkt
->hdr
.sequence
& SEQ_RX_FRAME
) &&
4237 (pkt
->hdr
.cmd
!= N_RX_PHY
) && (pkt
->hdr
.cmd
!= N_RX
) &&
4238 (pkt
->hdr
.cmd
!= N_RX_MPDU
) &&
4239 (pkt
->hdr
.cmd
!= N_COMPRESSED_BA
) &&
4240 (pkt
->hdr
.cmd
!= N_STATS
) && (pkt
->hdr
.cmd
!= C_TX
);
4242 /* Based on type of command response or notification,
4243 * handle those that need handling via function in
4244 * handlers table. See il4965_setup_handlers() */
4245 if (il
->handlers
[pkt
->hdr
.cmd
]) {
4246 D_RX("r = %d, i = %d, %s, 0x%02x\n", r
, i
,
4247 il_get_cmd_string(pkt
->hdr
.cmd
), pkt
->hdr
.cmd
);
4248 il
->isr_stats
.handlers
[pkt
->hdr
.cmd
]++;
4249 il
->handlers
[pkt
->hdr
.cmd
] (il
, rxb
);
4251 /* No handling needed */
4252 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r
,
4253 i
, il_get_cmd_string(pkt
->hdr
.cmd
), pkt
->hdr
.cmd
);
4257 * XXX: After here, we should always check rxb->page
4258 * against NULL before touching it or its virtual
4259 * memory (pkt). Because some handler might have
4260 * already taken or freed the pages.
4264 /* Invoke any callbacks, transfer the buffer to caller,
4265 * and fire off the (possibly) blocking il_send_cmd()
4266 * as we reclaim the driver command queue */
4268 il_tx_cmd_complete(il
, rxb
);
4270 IL_WARN("Claim null rxb?\n");
4273 /* Reuse the page if possible. For notification packets and
4274 * SKBs that fail to Rx correctly, add them back into the
4275 * rx_free list for reuse later. */
4276 spin_lock_irqsave(&rxq
->lock
, flags
);
4277 if (rxb
->page
!= NULL
) {
4279 pci_map_page(il
->pci_dev
, rxb
->page
, 0,
4280 PAGE_SIZE
<< il
->hw_params
.
4281 rx_page_order
, PCI_DMA_FROMDEVICE
);
4282 list_add_tail(&rxb
->list
, &rxq
->rx_free
);
4285 list_add_tail(&rxb
->list
, &rxq
->rx_used
);
4287 spin_unlock_irqrestore(&rxq
->lock
, flags
);
4289 i
= (i
+ 1) & RX_QUEUE_MASK
;
4290 /* If there are a lot of unused frames,
4291 * restock the Rx queue so ucode wont assert. */
4296 il4965_rx_replenish_now(il
);
4302 /* Backtrack one entry */
4305 il4965_rx_replenish_now(il
);
4307 il4965_rx_queue_restock(il
);
4310 /* call this function to flush any scheduled tasklet */
4312 il4965_synchronize_irq(struct il_priv
*il
)
4314 /* wait to make sure we flush pending tasklet */
4315 synchronize_irq(il
->pci_dev
->irq
);
4316 tasklet_kill(&il
->irq_tasklet
);
4320 il4965_irq_tasklet(struct il_priv
*il
)
4322 u32 inta
, handled
= 0;
4324 unsigned long flags
;
4326 #ifdef CONFIG_IWLEGACY_DEBUG
4330 spin_lock_irqsave(&il
->lock
, flags
);
4332 /* Ack/clear/reset pending uCode interrupts.
4333 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4334 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4335 inta
= _il_rd(il
, CSR_INT
);
4336 _il_wr(il
, CSR_INT
, inta
);
4338 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4339 * Any new interrupts that happen after this, either while we're
4340 * in this tasklet, or later, will show up in next ISR/tasklet. */
4341 inta_fh
= _il_rd(il
, CSR_FH_INT_STATUS
);
4342 _il_wr(il
, CSR_FH_INT_STATUS
, inta_fh
);
4344 #ifdef CONFIG_IWLEGACY_DEBUG
4345 if (il_get_debug_level(il
) & IL_DL_ISR
) {
4346 /* just for debug */
4347 inta_mask
= _il_rd(il
, CSR_INT_MASK
);
4348 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta
,
4349 inta_mask
, inta_fh
);
4353 spin_unlock_irqrestore(&il
->lock
, flags
);
4355 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4356 * atomic, make sure that inta covers all the interrupts that
4357 * we've discovered, even if FH interrupt came in just after
4358 * reading CSR_INT. */
4359 if (inta_fh
& CSR49_FH_INT_RX_MASK
)
4360 inta
|= CSR_INT_BIT_FH_RX
;
4361 if (inta_fh
& CSR49_FH_INT_TX_MASK
)
4362 inta
|= CSR_INT_BIT_FH_TX
;
4364 /* Now service all interrupt bits discovered above. */
4365 if (inta
& CSR_INT_BIT_HW_ERR
) {
4366 IL_ERR("Hardware error detected. Restarting.\n");
4368 /* Tell the device to stop sending interrupts */
4369 il_disable_interrupts(il
);
4372 il_irq_handle_error(il
);
4374 handled
|= CSR_INT_BIT_HW_ERR
;
4378 #ifdef CONFIG_IWLEGACY_DEBUG
4379 if (il_get_debug_level(il
) & (IL_DL_ISR
)) {
4380 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4381 if (inta
& CSR_INT_BIT_SCD
) {
4382 D_ISR("Scheduler finished to transmit "
4383 "the frame/frames.\n");
4384 il
->isr_stats
.sch
++;
4387 /* Alive notification via Rx interrupt will do the real work */
4388 if (inta
& CSR_INT_BIT_ALIVE
) {
4389 D_ISR("Alive interrupt\n");
4390 il
->isr_stats
.alive
++;
4394 /* Safely ignore these bits for debug checks below */
4395 inta
&= ~(CSR_INT_BIT_SCD
| CSR_INT_BIT_ALIVE
);
4397 /* HW RF KILL switch toggled */
4398 if (inta
& CSR_INT_BIT_RF_KILL
) {
4401 if (!(_il_rd(il
, CSR_GP_CNTRL
) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
))
4404 IL_WARN("RF_KILL bit toggled to %s.\n",
4405 hw_rf_kill
? "disable radio" : "enable radio");
4407 il
->isr_stats
.rfkill
++;
4409 /* driver only loads ucode once setting the interface up.
4410 * the driver allows loading the ucode even if the radio
4411 * is killed. Hence update the killswitch state here. The
4412 * rfkill handler will care about restarting if needed.
4414 if (!test_bit(S_ALIVE
, &il
->status
)) {
4416 set_bit(S_RFKILL
, &il
->status
);
4418 clear_bit(S_RFKILL
, &il
->status
);
4419 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
, hw_rf_kill
);
4422 handled
|= CSR_INT_BIT_RF_KILL
;
4425 /* Chip got too hot and stopped itself */
4426 if (inta
& CSR_INT_BIT_CT_KILL
) {
4427 IL_ERR("Microcode CT kill error detected.\n");
4428 il
->isr_stats
.ctkill
++;
4429 handled
|= CSR_INT_BIT_CT_KILL
;
4432 /* Error detected by uCode */
4433 if (inta
& CSR_INT_BIT_SW_ERR
) {
4434 IL_ERR("Microcode SW error detected. " " Restarting 0x%X.\n",
4437 il_irq_handle_error(il
);
4438 handled
|= CSR_INT_BIT_SW_ERR
;
4442 * uCode wakes up after power-down sleep.
4443 * Tell device about any new tx or host commands enqueued,
4444 * and about any Rx buffers made available while asleep.
4446 if (inta
& CSR_INT_BIT_WAKEUP
) {
4447 D_ISR("Wakeup interrupt\n");
4448 il_rx_queue_update_write_ptr(il
, &il
->rxq
);
4449 for (i
= 0; i
< il
->hw_params
.max_txq_num
; i
++)
4450 il_txq_update_write_ptr(il
, &il
->txq
[i
]);
4451 il
->isr_stats
.wakeup
++;
4452 handled
|= CSR_INT_BIT_WAKEUP
;
4455 /* All uCode command responses, including Tx command responses,
4456 * Rx "responses" (frame-received notification), and other
4457 * notifications from uCode come through here*/
4458 if (inta
& (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
)) {
4459 il4965_rx_handle(il
);
4461 handled
|= (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
);
4464 /* This "Tx" DMA channel is used only for loading uCode */
4465 if (inta
& CSR_INT_BIT_FH_TX
) {
4466 D_ISR("uCode load interrupt\n");
4468 handled
|= CSR_INT_BIT_FH_TX
;
4469 /* Wake up uCode load routine, now that load is complete */
4470 il
->ucode_write_complete
= 1;
4471 wake_up(&il
->wait_command_queue
);
4474 if (inta
& ~handled
) {
4475 IL_ERR("Unhandled INTA bits 0x%08x\n", inta
& ~handled
);
4476 il
->isr_stats
.unhandled
++;
4479 if (inta
& ~(il
->inta_mask
)) {
4480 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
4481 inta
& ~il
->inta_mask
);
4482 IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh
);
4485 /* Re-enable all interrupts */
4486 /* only Re-enable if disabled by irq */
4487 if (test_bit(S_INT_ENABLED
, &il
->status
))
4488 il_enable_interrupts(il
);
4489 /* Re-enable RF_KILL if it occurred */
4490 else if (handled
& CSR_INT_BIT_RF_KILL
)
4491 il_enable_rfkill_int(il
);
4493 #ifdef CONFIG_IWLEGACY_DEBUG
4494 if (il_get_debug_level(il
) & (IL_DL_ISR
)) {
4495 inta
= _il_rd(il
, CSR_INT
);
4496 inta_mask
= _il_rd(il
, CSR_INT_MASK
);
4497 inta_fh
= _il_rd(il
, CSR_FH_INT_STATUS
);
4498 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4499 "flags 0x%08lx\n", inta
, inta_mask
, inta_fh
, flags
);
4504 /*****************************************************************************
4508 *****************************************************************************/
4510 #ifdef CONFIG_IWLEGACY_DEBUG
4513 * The following adds a new attribute to the sysfs representation
4514 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
4515 * used for controlling the debug level.
4517 * See the level definitions in iwl for details.
4519 * The debug_level being managed using sysfs below is a per device debug
4520 * level that is used instead of the global debug level if it (the per
4521 * device debug level) is set.
4524 il4965_show_debug_level(struct device
*d
, struct device_attribute
*attr
,
4527 struct il_priv
*il
= dev_get_drvdata(d
);
4528 return sprintf(buf
, "0x%08X\n", il_get_debug_level(il
));
4532 il4965_store_debug_level(struct device
*d
, struct device_attribute
*attr
,
4533 const char *buf
, size_t count
)
4535 struct il_priv
*il
= dev_get_drvdata(d
);
4539 ret
= strict_strtoul(buf
, 0, &val
);
4541 IL_ERR("%s is not in hex or decimal form.\n", buf
);
4543 il
->debug_level
= val
;
4545 return strnlen(buf
, count
);
4548 static DEVICE_ATTR(debug_level
, S_IWUSR
| S_IRUGO
, il4965_show_debug_level
,
4549 il4965_store_debug_level
);
4551 #endif /* CONFIG_IWLEGACY_DEBUG */
4554 il4965_show_temperature(struct device
*d
, struct device_attribute
*attr
,
4557 struct il_priv
*il
= dev_get_drvdata(d
);
4559 if (!il_is_alive(il
))
4562 return sprintf(buf
, "%d\n", il
->temperature
);
4565 static DEVICE_ATTR(temperature
, S_IRUGO
, il4965_show_temperature
, NULL
);
4568 il4965_show_tx_power(struct device
*d
, struct device_attribute
*attr
, char *buf
)
4570 struct il_priv
*il
= dev_get_drvdata(d
);
4572 if (!il_is_ready_rf(il
))
4573 return sprintf(buf
, "off\n");
4575 return sprintf(buf
, "%d\n", il
->tx_power_user_lmt
);
4579 il4965_store_tx_power(struct device
*d
, struct device_attribute
*attr
,
4580 const char *buf
, size_t count
)
4582 struct il_priv
*il
= dev_get_drvdata(d
);
4586 ret
= strict_strtoul(buf
, 10, &val
);
4588 IL_INFO("%s is not in decimal form.\n", buf
);
4590 ret
= il_set_tx_power(il
, val
, false);
4592 IL_ERR("failed setting tx power (0x%d).\n", ret
);
4599 static DEVICE_ATTR(tx_power
, S_IWUSR
| S_IRUGO
, il4965_show_tx_power
,
4600 il4965_store_tx_power
);
4602 static struct attribute
*il_sysfs_entries
[] = {
4603 &dev_attr_temperature
.attr
,
4604 &dev_attr_tx_power
.attr
,
4605 #ifdef CONFIG_IWLEGACY_DEBUG
4606 &dev_attr_debug_level
.attr
,
4611 static struct attribute_group il_attribute_group
= {
4612 .name
= NULL
, /* put in device directory */
4613 .attrs
= il_sysfs_entries
,
4616 /******************************************************************************
4618 * uCode download functions
4620 ******************************************************************************/
4623 il4965_dealloc_ucode_pci(struct il_priv
*il
)
4625 il_free_fw_desc(il
->pci_dev
, &il
->ucode_code
);
4626 il_free_fw_desc(il
->pci_dev
, &il
->ucode_data
);
4627 il_free_fw_desc(il
->pci_dev
, &il
->ucode_data_backup
);
4628 il_free_fw_desc(il
->pci_dev
, &il
->ucode_init
);
4629 il_free_fw_desc(il
->pci_dev
, &il
->ucode_init_data
);
4630 il_free_fw_desc(il
->pci_dev
, &il
->ucode_boot
);
4634 il4965_nic_start(struct il_priv
*il
)
4636 /* Remove all resets to allow NIC to operate */
4637 _il_wr(il
, CSR_RESET
, 0);
4640 static void il4965_ucode_callback(const struct firmware
*ucode_raw
,
4642 static int il4965_mac_setup_register(struct il_priv
*il
, u32 max_probe_length
);
4644 static int __must_check
4645 il4965_request_firmware(struct il_priv
*il
, bool first
)
4647 const char *name_pre
= il
->cfg
->fw_name_pre
;
4651 il
->fw_idx
= il
->cfg
->ucode_api_max
;
4652 sprintf(tag
, "%d", il
->fw_idx
);
4655 sprintf(tag
, "%d", il
->fw_idx
);
4658 if (il
->fw_idx
< il
->cfg
->ucode_api_min
) {
4659 IL_ERR("no suitable firmware found!\n");
4663 sprintf(il
->firmware_name
, "%s%s%s", name_pre
, tag
, ".ucode");
4665 D_INFO("attempting to load firmware '%s'\n", il
->firmware_name
);
4667 return request_firmware_nowait(THIS_MODULE
, 1, il
->firmware_name
,
4668 &il
->pci_dev
->dev
, GFP_KERNEL
, il
,
4669 il4965_ucode_callback
);
4672 struct il4965_firmware_pieces
{
4673 const void *inst
, *data
, *init
, *init_data
, *boot
;
4674 size_t inst_size
, data_size
, init_size
, init_data_size
, boot_size
;
4678 il4965_load_firmware(struct il_priv
*il
, const struct firmware
*ucode_raw
,
4679 struct il4965_firmware_pieces
*pieces
)
4681 struct il_ucode_header
*ucode
= (void *)ucode_raw
->data
;
4682 u32 api_ver
, hdr_size
;
4685 il
->ucode_ver
= le32_to_cpu(ucode
->ver
);
4686 api_ver
= IL_UCODE_API(il
->ucode_ver
);
4694 if (ucode_raw
->size
< hdr_size
) {
4695 IL_ERR("File size too small!\n");
4698 pieces
->inst_size
= le32_to_cpu(ucode
->v1
.inst_size
);
4699 pieces
->data_size
= le32_to_cpu(ucode
->v1
.data_size
);
4700 pieces
->init_size
= le32_to_cpu(ucode
->v1
.init_size
);
4701 pieces
->init_data_size
= le32_to_cpu(ucode
->v1
.init_data_size
);
4702 pieces
->boot_size
= le32_to_cpu(ucode
->v1
.boot_size
);
4703 src
= ucode
->v1
.data
;
4707 /* Verify size of file vs. image size info in file's header */
4708 if (ucode_raw
->size
!=
4709 hdr_size
+ pieces
->inst_size
+ pieces
->data_size
+
4710 pieces
->init_size
+ pieces
->init_data_size
+ pieces
->boot_size
) {
4712 IL_ERR("uCode file size %d does not match expected size\n",
4713 (int)ucode_raw
->size
);
4718 src
+= pieces
->inst_size
;
4720 src
+= pieces
->data_size
;
4722 src
+= pieces
->init_size
;
4723 pieces
->init_data
= src
;
4724 src
+= pieces
->init_data_size
;
4726 src
+= pieces
->boot_size
;
4732 * il4965_ucode_callback - callback when firmware was loaded
4734 * If loaded successfully, copies the firmware into buffers
4735 * for the card to fetch (via DMA).
4738 il4965_ucode_callback(const struct firmware
*ucode_raw
, void *context
)
4740 struct il_priv
*il
= context
;
4741 struct il_ucode_header
*ucode
;
4743 struct il4965_firmware_pieces pieces
;
4744 const unsigned int api_max
= il
->cfg
->ucode_api_max
;
4745 const unsigned int api_min
= il
->cfg
->ucode_api_min
;
4748 u32 max_probe_length
= 200;
4749 u32 standard_phy_calibration_size
=
4750 IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE
;
4752 memset(&pieces
, 0, sizeof(pieces
));
4755 if (il
->fw_idx
<= il
->cfg
->ucode_api_max
)
4756 IL_ERR("request for firmware file '%s' failed.\n",
4761 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il
->firmware_name
,
4764 /* Make sure that we got at least the API version number */
4765 if (ucode_raw
->size
< 4) {
4766 IL_ERR("File size way too small!\n");
4770 /* Data from ucode file: header followed by uCode images */
4771 ucode
= (struct il_ucode_header
*)ucode_raw
->data
;
4773 err
= il4965_load_firmware(il
, ucode_raw
, &pieces
);
4778 api_ver
= IL_UCODE_API(il
->ucode_ver
);
4781 * api_ver should match the api version forming part of the
4782 * firmware filename ... but we don't check for that and only rely
4783 * on the API version read from firmware header from here on forward
4785 if (api_ver
< api_min
|| api_ver
> api_max
) {
4786 IL_ERR("Driver unable to support your firmware API. "
4787 "Driver supports v%u, firmware is v%u.\n", api_max
,
4792 if (api_ver
!= api_max
)
4793 IL_ERR("Firmware has old API version. Expected v%u, "
4794 "got v%u. New firmware can be obtained "
4795 "from http://www.intellinuxwireless.org.\n", api_max
,
4798 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
4799 IL_UCODE_MAJOR(il
->ucode_ver
), IL_UCODE_MINOR(il
->ucode_ver
),
4800 IL_UCODE_API(il
->ucode_ver
), IL_UCODE_SERIAL(il
->ucode_ver
));
4802 snprintf(il
->hw
->wiphy
->fw_version
, sizeof(il
->hw
->wiphy
->fw_version
),
4803 "%u.%u.%u.%u", IL_UCODE_MAJOR(il
->ucode_ver
),
4804 IL_UCODE_MINOR(il
->ucode_ver
), IL_UCODE_API(il
->ucode_ver
),
4805 IL_UCODE_SERIAL(il
->ucode_ver
));
4808 * For any of the failures below (before allocating pci memory)
4809 * we will try to load a version with a smaller API -- maybe the
4810 * user just got a corrupted version of the latest API.
4813 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il
->ucode_ver
);
4814 D_INFO("f/w package hdr runtime inst size = %Zd\n", pieces
.inst_size
);
4815 D_INFO("f/w package hdr runtime data size = %Zd\n", pieces
.data_size
);
4816 D_INFO("f/w package hdr init inst size = %Zd\n", pieces
.init_size
);
4817 D_INFO("f/w package hdr init data size = %Zd\n", pieces
.init_data_size
);
4818 D_INFO("f/w package hdr boot inst size = %Zd\n", pieces
.boot_size
);
4820 /* Verify that uCode images will fit in card's SRAM */
4821 if (pieces
.inst_size
> il
->hw_params
.max_inst_size
) {
4822 IL_ERR("uCode instr len %Zd too large to fit in\n",
4827 if (pieces
.data_size
> il
->hw_params
.max_data_size
) {
4828 IL_ERR("uCode data len %Zd too large to fit in\n",
4833 if (pieces
.init_size
> il
->hw_params
.max_inst_size
) {
4834 IL_ERR("uCode init instr len %Zd too large to fit in\n",
4839 if (pieces
.init_data_size
> il
->hw_params
.max_data_size
) {
4840 IL_ERR("uCode init data len %Zd too large to fit in\n",
4841 pieces
.init_data_size
);
4845 if (pieces
.boot_size
> il
->hw_params
.max_bsm_size
) {
4846 IL_ERR("uCode boot instr len %Zd too large to fit in\n",
4851 /* Allocate ucode buffers for card's bus-master loading ... */
4853 /* Runtime instructions and 2 copies of data:
4854 * 1) unmodified from disk
4855 * 2) backup cache for save/restore during power-downs */
4856 il
->ucode_code
.len
= pieces
.inst_size
;
4857 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_code
);
4859 il
->ucode_data
.len
= pieces
.data_size
;
4860 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_data
);
4862 il
->ucode_data_backup
.len
= pieces
.data_size
;
4863 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_data_backup
);
4865 if (!il
->ucode_code
.v_addr
|| !il
->ucode_data
.v_addr
||
4866 !il
->ucode_data_backup
.v_addr
)
4869 /* Initialization instructions and data */
4870 if (pieces
.init_size
&& pieces
.init_data_size
) {
4871 il
->ucode_init
.len
= pieces
.init_size
;
4872 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_init
);
4874 il
->ucode_init_data
.len
= pieces
.init_data_size
;
4875 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_init_data
);
4877 if (!il
->ucode_init
.v_addr
|| !il
->ucode_init_data
.v_addr
)
4881 /* Bootstrap (instructions only, no data) */
4882 if (pieces
.boot_size
) {
4883 il
->ucode_boot
.len
= pieces
.boot_size
;
4884 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_boot
);
4886 if (!il
->ucode_boot
.v_addr
)
4890 /* Now that we can no longer fail, copy information */
4892 il
->sta_key_max_num
= STA_KEY_MAX_NUM
;
4894 /* Copy images into buffers for card's bus-master reads ... */
4896 /* Runtime instructions (first block of data in file) */
4897 D_INFO("Copying (but not loading) uCode instr len %Zd\n",
4899 memcpy(il
->ucode_code
.v_addr
, pieces
.inst
, pieces
.inst_size
);
4901 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4902 il
->ucode_code
.v_addr
, (u32
) il
->ucode_code
.p_addr
);
4906 * NOTE: Copy into backup buffer will be done in il_up()
4908 D_INFO("Copying (but not loading) uCode data len %Zd\n",
4910 memcpy(il
->ucode_data
.v_addr
, pieces
.data
, pieces
.data_size
);
4911 memcpy(il
->ucode_data_backup
.v_addr
, pieces
.data
, pieces
.data_size
);
4913 /* Initialization instructions */
4914 if (pieces
.init_size
) {
4915 D_INFO("Copying (but not loading) init instr len %Zd\n",
4917 memcpy(il
->ucode_init
.v_addr
, pieces
.init
, pieces
.init_size
);
4920 /* Initialization data */
4921 if (pieces
.init_data_size
) {
4922 D_INFO("Copying (but not loading) init data len %Zd\n",
4923 pieces
.init_data_size
);
4924 memcpy(il
->ucode_init_data
.v_addr
, pieces
.init_data
,
4925 pieces
.init_data_size
);
4928 /* Bootstrap instructions */
4929 D_INFO("Copying (but not loading) boot instr len %Zd\n",
4931 memcpy(il
->ucode_boot
.v_addr
, pieces
.boot
, pieces
.boot_size
);
4934 * figure out the offset of chain noise reset and gain commands
4935 * base on the size of standard phy calibration commands table size
4937 il
->_4965
.phy_calib_chain_noise_reset_cmd
=
4938 standard_phy_calibration_size
;
4939 il
->_4965
.phy_calib_chain_noise_gain_cmd
=
4940 standard_phy_calibration_size
+ 1;
4942 /**************************************************
4943 * This is still part of probe() in a sense...
4945 * 9. Setup and register with mac80211 and debugfs
4946 **************************************************/
4947 err
= il4965_mac_setup_register(il
, max_probe_length
);
4951 err
= il_dbgfs_register(il
, DRV_NAME
);
4953 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
4956 err
= sysfs_create_group(&il
->pci_dev
->dev
.kobj
, &il_attribute_group
);
4958 IL_ERR("failed to create sysfs device attributes\n");
4962 /* We have our copies now, allow OS release its copies */
4963 release_firmware(ucode_raw
);
4964 complete(&il
->_4965
.firmware_loading_complete
);
4968 /* try next, if any */
4969 if (il4965_request_firmware(il
, false))
4971 release_firmware(ucode_raw
);
4975 IL_ERR("failed to allocate pci memory\n");
4976 il4965_dealloc_ucode_pci(il
);
4978 complete(&il
->_4965
.firmware_loading_complete
);
4979 device_release_driver(&il
->pci_dev
->dev
);
4980 release_firmware(ucode_raw
);
4983 static const char *const desc_lookup_text
[] = {
4988 "NMI_INTERRUPT_WDG",
4992 "HW_ERROR_TUNE_LOCK",
4993 "HW_ERROR_TEMPERATURE",
4994 "ILLEGAL_CHAN_FREQ",
4997 "NMI_INTERRUPT_HOST",
4998 "NMI_INTERRUPT_ACTION_PT",
4999 "NMI_INTERRUPT_UNKNOWN",
5000 "UCODE_VERSION_MISMATCH",
5001 "HW_ERROR_ABS_LOCK",
5002 "HW_ERROR_CAL_LOCK_FAIL",
5003 "NMI_INTERRUPT_INST_ACTION_PT",
5004 "NMI_INTERRUPT_DATA_ACTION_PT",
5006 "NMI_INTERRUPT_TRM",
5007 "NMI_INTERRUPT_BREAK_POINT",
5017 } advanced_lookup
[] = {
5019 "NMI_INTERRUPT_WDG", 0x34}, {
5020 "SYSASSERT", 0x35}, {
5021 "UCODE_VERSION_MISMATCH", 0x37}, {
5022 "BAD_COMMAND", 0x38}, {
5023 "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C}, {
5024 "FATAL_ERROR", 0x3D}, {
5025 "NMI_TRM_HW_ERR", 0x46}, {
5026 "NMI_INTERRUPT_TRM", 0x4C}, {
5027 "NMI_INTERRUPT_BREAK_POINT", 0x54}, {
5028 "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C}, {
5029 "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64}, {
5030 "NMI_INTERRUPT_HOST", 0x66}, {
5031 "NMI_INTERRUPT_ACTION_PT", 0x7C}, {
5032 "NMI_INTERRUPT_UNKNOWN", 0x84}, {
5033 "NMI_INTERRUPT_INST_ACTION_PT", 0x86}, {
5034 "ADVANCED_SYSASSERT", 0},};
5037 il4965_desc_lookup(u32 num
)
5040 int max
= ARRAY_SIZE(desc_lookup_text
);
5043 return desc_lookup_text
[num
];
5045 max
= ARRAY_SIZE(advanced_lookup
) - 1;
5046 for (i
= 0; i
< max
; i
++) {
5047 if (advanced_lookup
[i
].num
== num
)
5050 return advanced_lookup
[i
].name
;
5053 #define ERROR_START_OFFSET (1 * sizeof(u32))
5054 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
5057 il4965_dump_nic_error_log(struct il_priv
*il
)
5060 u32 desc
, time
, count
, base
, data1
;
5061 u32 blink1
, blink2
, ilink1
, ilink2
;
5064 if (il
->ucode_type
== UCODE_INIT
)
5065 base
= le32_to_cpu(il
->card_alive_init
.error_event_table_ptr
);
5067 base
= le32_to_cpu(il
->card_alive
.error_event_table_ptr
);
5069 if (!il
->ops
->is_valid_rtc_data_addr(base
)) {
5070 IL_ERR("Not valid error log pointer 0x%08X for %s uCode\n",
5071 base
, (il
->ucode_type
== UCODE_INIT
) ? "Init" : "RT");
5075 count
= il_read_targ_mem(il
, base
);
5077 if (ERROR_START_OFFSET
<= count
* ERROR_ELEM_SIZE
) {
5078 IL_ERR("Start IWL Error Log Dump:\n");
5079 IL_ERR("Status: 0x%08lX, count: %d\n", il
->status
, count
);
5082 desc
= il_read_targ_mem(il
, base
+ 1 * sizeof(u32
));
5083 il
->isr_stats
.err_code
= desc
;
5084 pc
= il_read_targ_mem(il
, base
+ 2 * sizeof(u32
));
5085 blink1
= il_read_targ_mem(il
, base
+ 3 * sizeof(u32
));
5086 blink2
= il_read_targ_mem(il
, base
+ 4 * sizeof(u32
));
5087 ilink1
= il_read_targ_mem(il
, base
+ 5 * sizeof(u32
));
5088 ilink2
= il_read_targ_mem(il
, base
+ 6 * sizeof(u32
));
5089 data1
= il_read_targ_mem(il
, base
+ 7 * sizeof(u32
));
5090 data2
= il_read_targ_mem(il
, base
+ 8 * sizeof(u32
));
5091 line
= il_read_targ_mem(il
, base
+ 9 * sizeof(u32
));
5092 time
= il_read_targ_mem(il
, base
+ 11 * sizeof(u32
));
5093 hcmd
= il_read_targ_mem(il
, base
+ 22 * sizeof(u32
));
5096 "data1 data2 line\n");
5097 IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
5098 il4965_desc_lookup(desc
), desc
, time
, data1
, data2
, line
);
5099 IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n");
5100 IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", pc
, blink1
,
5101 blink2
, ilink1
, ilink2
, hcmd
);
5105 il4965_rf_kill_ct_config(struct il_priv
*il
)
5107 struct il_ct_kill_config cmd
;
5108 unsigned long flags
;
5111 spin_lock_irqsave(&il
->lock
, flags
);
5112 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
,
5113 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
5114 spin_unlock_irqrestore(&il
->lock
, flags
);
5116 cmd
.critical_temperature_R
=
5117 cpu_to_le32(il
->hw_params
.ct_kill_threshold
);
5119 ret
= il_send_cmd_pdu(il
, C_CT_KILL_CONFIG
, sizeof(cmd
), &cmd
);
5121 IL_ERR("C_CT_KILL_CONFIG failed\n");
5123 D_INFO("C_CT_KILL_CONFIG " "succeeded, "
5124 "critical temperature is %d\n",
5125 il
->hw_params
.ct_kill_threshold
);
5128 static const s8 default_queue_to_tx_fifo
[] = {
5138 #define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
5141 il4965_alive_notify(struct il_priv
*il
)
5144 unsigned long flags
;
5148 spin_lock_irqsave(&il
->lock
, flags
);
5150 /* Clear 4965's internal Tx Scheduler data base */
5151 il
->scd_base_addr
= il_rd_prph(il
, IL49_SCD_SRAM_BASE_ADDR
);
5152 a
= il
->scd_base_addr
+ IL49_SCD_CONTEXT_DATA_OFFSET
;
5153 for (; a
< il
->scd_base_addr
+ IL49_SCD_TX_STTS_BITMAP_OFFSET
; a
+= 4)
5154 il_write_targ_mem(il
, a
, 0);
5155 for (; a
< il
->scd_base_addr
+ IL49_SCD_TRANSLATE_TBL_OFFSET
; a
+= 4)
5156 il_write_targ_mem(il
, a
, 0);
5160 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il
->hw_params
.max_txq_num
);
5162 il_write_targ_mem(il
, a
, 0);
5164 /* Tel 4965 where to find Tx byte count tables */
5165 il_wr_prph(il
, IL49_SCD_DRAM_BASE_ADDR
, il
->scd_bc_tbls
.dma
>> 10);
5167 /* Enable DMA channel */
5168 for (chan
= 0; chan
< FH49_TCSR_CHNL_NUM
; chan
++)
5169 il_wr(il
, FH49_TCSR_CHNL_TX_CONFIG_REG(chan
),
5170 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
|
5171 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE
);
5173 /* Update FH chicken bits */
5174 reg_val
= il_rd(il
, FH49_TX_CHICKEN_BITS_REG
);
5175 il_wr(il
, FH49_TX_CHICKEN_BITS_REG
,
5176 reg_val
| FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN
);
5178 /* Disable chain mode for all queues */
5179 il_wr_prph(il
, IL49_SCD_QUEUECHAIN_SEL
, 0);
5181 /* Initialize each Tx queue (including the command queue) */
5182 for (i
= 0; i
< il
->hw_params
.max_txq_num
; i
++) {
5184 /* TFD circular buffer read/write idxes */
5185 il_wr_prph(il
, IL49_SCD_QUEUE_RDPTR(i
), 0);
5186 il_wr(il
, HBUS_TARG_WRPTR
, 0 | (i
<< 8));
5188 /* Max Tx Window size for Scheduler-ACK mode */
5189 il_write_targ_mem(il
,
5191 IL49_SCD_CONTEXT_QUEUE_OFFSET(i
),
5193 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
5194 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
5197 il_write_targ_mem(il
,
5199 IL49_SCD_CONTEXT_QUEUE_OFFSET(i
) +
5202 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
5203 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
5206 il_wr_prph(il
, IL49_SCD_INTERRUPT_MASK
,
5207 (1 << il
->hw_params
.max_txq_num
) - 1);
5209 /* Activate all Tx DMA/FIFO channels */
5210 il4965_txq_set_sched(il
, IL_MASK(0, 6));
5212 il4965_set_wr_ptrs(il
, IL_DEFAULT_CMD_QUEUE_NUM
, 0);
5214 /* make sure all queue are not stopped */
5215 memset(&il
->queue_stopped
[0], 0, sizeof(il
->queue_stopped
));
5216 for (i
= 0; i
< 4; i
++)
5217 atomic_set(&il
->queue_stop_count
[i
], 0);
5219 /* reset to 0 to enable all the queue first */
5220 il
->txq_ctx_active_msk
= 0;
5221 /* Map each Tx/cmd queue to its corresponding fifo */
5222 BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo
) != 7);
5224 for (i
= 0; i
< ARRAY_SIZE(default_queue_to_tx_fifo
); i
++) {
5225 int ac
= default_queue_to_tx_fifo
[i
];
5227 il_txq_ctx_activate(il
, i
);
5229 if (ac
== IL_TX_FIFO_UNUSED
)
5232 il4965_tx_queue_set_status(il
, &il
->txq
[i
], ac
, 0);
5235 spin_unlock_irqrestore(&il
->lock
, flags
);
5241 * il4965_alive_start - called after N_ALIVE notification received
5242 * from protocol/runtime uCode (initialization uCode's
5243 * Alive gets handled by il_init_alive_start()).
5246 il4965_alive_start(struct il_priv
*il
)
5250 D_INFO("Runtime Alive received.\n");
5252 if (il
->card_alive
.is_valid
!= UCODE_VALID_OK
) {
5253 /* We had an error bringing up the hardware, so take it
5254 * all the way back down so we can try again */
5255 D_INFO("Alive failed.\n");
5259 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5260 * This is a paranoid check, because we would not have gotten the
5261 * "runtime" alive if code weren't properly loaded. */
5262 if (il4965_verify_ucode(il
)) {
5263 /* Runtime instruction load was bad;
5264 * take it all the way back down so we can try again */
5265 D_INFO("Bad runtime uCode load.\n");
5269 ret
= il4965_alive_notify(il
);
5271 IL_WARN("Could not complete ALIVE transition [ntf]: %d\n", ret
);
5275 /* After the ALIVE response, we can send host commands to the uCode */
5276 set_bit(S_ALIVE
, &il
->status
);
5278 /* Enable watchdog to monitor the driver tx queues */
5279 il_setup_watchdog(il
);
5281 if (il_is_rfkill(il
))
5284 ieee80211_wake_queues(il
->hw
);
5286 il
->active_rate
= RATES_MASK
;
5288 if (il_is_associated(il
)) {
5289 struct il_rxon_cmd
*active_rxon
=
5290 (struct il_rxon_cmd
*)&il
->active
;
5291 /* apply any changes in staging */
5292 il
->staging
.filter_flags
|= RXON_FILTER_ASSOC_MSK
;
5293 active_rxon
->filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
5295 /* Initialize our rx_config data */
5296 il_connection_init_rx_config(il
);
5298 if (il
->ops
->set_rxon_chain
)
5299 il
->ops
->set_rxon_chain(il
);
5302 /* Configure bluetooth coexistence if enabled */
5303 il_send_bt_config(il
);
5305 il4965_reset_run_time_calib(il
);
5307 set_bit(S_READY
, &il
->status
);
5309 /* Configure the adapter for unassociated operation */
5312 /* At this point, the NIC is initialized and operational */
5313 il4965_rf_kill_ct_config(il
);
5315 D_INFO("ALIVE processing complete.\n");
5316 wake_up(&il
->wait_command_queue
);
5318 il_power_update_mode(il
, true);
5319 D_INFO("Updated power mode\n");
5324 queue_work(il
->workqueue
, &il
->restart
);
5327 static void il4965_cancel_deferred_work(struct il_priv
*il
);
5330 __il4965_down(struct il_priv
*il
)
5332 unsigned long flags
;
5335 D_INFO(DRV_NAME
" is going down\n");
5337 il_scan_cancel_timeout(il
, 200);
5339 exit_pending
= test_and_set_bit(S_EXIT_PENDING
, &il
->status
);
5341 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
5342 * to prevent rearm timer */
5343 del_timer_sync(&il
->watchdog
);
5345 il_clear_ucode_stations(il
);
5347 /* FIXME: race conditions ? */
5348 spin_lock_irq(&il
->sta_lock
);
5350 * Remove all key information that is not stored as part
5351 * of station information since mac80211 may not have had
5352 * a chance to remove all the keys. When device is
5353 * reconfigured by mac80211 after an error all keys will
5356 memset(il
->_4965
.wep_keys
, 0, sizeof(il
->_4965
.wep_keys
));
5357 il
->_4965
.key_mapping_keys
= 0;
5358 spin_unlock_irq(&il
->sta_lock
);
5360 il_dealloc_bcast_stations(il
);
5361 il_clear_driver_stations(il
);
5363 /* Unblock any waiting calls */
5364 wake_up_all(&il
->wait_command_queue
);
5366 /* Wipe out the EXIT_PENDING status bit if we are not actually
5367 * exiting the module */
5369 clear_bit(S_EXIT_PENDING
, &il
->status
);
5371 /* stop and reset the on-board processor */
5372 _il_wr(il
, CSR_RESET
, CSR_RESET_REG_FLAG_NEVO_RESET
);
5374 /* tell the device to stop sending interrupts */
5375 spin_lock_irqsave(&il
->lock
, flags
);
5376 il_disable_interrupts(il
);
5377 spin_unlock_irqrestore(&il
->lock
, flags
);
5378 il4965_synchronize_irq(il
);
5380 if (il
->mac80211_registered
)
5381 ieee80211_stop_queues(il
->hw
);
5383 /* If we have not previously called il_init() then
5384 * clear all bits but the RF Kill bit and return */
5385 if (!il_is_init(il
)) {
5387 test_bit(S_RFKILL
, &il
->status
) << S_RFKILL
|
5388 test_bit(S_GEO_CONFIGURED
, &il
->status
) << S_GEO_CONFIGURED
|
5389 test_bit(S_EXIT_PENDING
, &il
->status
) << S_EXIT_PENDING
;
5393 /* ...otherwise clear out all the status bits but the RF Kill
5394 * bit and continue taking the NIC down. */
5396 test_bit(S_RFKILL
, &il
->status
) << S_RFKILL
|
5397 test_bit(S_GEO_CONFIGURED
, &il
->status
) << S_GEO_CONFIGURED
|
5398 test_bit(S_FW_ERROR
, &il
->status
) << S_FW_ERROR
|
5399 test_bit(S_EXIT_PENDING
, &il
->status
) << S_EXIT_PENDING
;
5402 * We disabled and synchronized interrupt, and priv->mutex is taken, so
5403 * here is the only thread which will program device registers, but
5404 * still have lockdep assertions, so we are taking reg_lock.
5406 spin_lock_irq(&il
->reg_lock
);
5407 /* FIXME: il_grab_nic_access if rfkill is off ? */
5409 il4965_txq_ctx_stop(il
);
5410 il4965_rxq_stop(il
);
5411 /* Power-down device's busmaster DMA clocks */
5412 _il_wr_prph(il
, APMG_CLK_DIS_REG
, APMG_CLK_VAL_DMA_CLK_RQT
);
5414 /* Make sure (redundant) we've released our request to stay awake */
5415 _il_clear_bit(il
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
);
5416 /* Stop the device, and put it in low power state */
5419 spin_unlock_irq(&il
->reg_lock
);
5421 il4965_txq_ctx_unmap(il
);
5423 memset(&il
->card_alive
, 0, sizeof(struct il_alive_resp
));
5425 dev_kfree_skb(il
->beacon_skb
);
5426 il
->beacon_skb
= NULL
;
5428 /* clear out any free frames */
5429 il4965_clear_free_frames(il
);
5433 il4965_down(struct il_priv
*il
)
5435 mutex_lock(&il
->mutex
);
5437 mutex_unlock(&il
->mutex
);
5439 il4965_cancel_deferred_work(il
);
5444 il4965_set_hw_ready(struct il_priv
*il
)
5448 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
5449 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
);
5451 /* See if we got it */
5452 ret
= _il_poll_bit(il
, CSR_HW_IF_CONFIG_REG
,
5453 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
,
5454 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
,
5457 il
->hw_ready
= true;
5459 D_INFO("hardware %s ready\n", (il
->hw_ready
) ? "" : "not");
5463 il4965_prepare_card_hw(struct il_priv
*il
)
5467 il
->hw_ready
= false;
5469 il4965_set_hw_ready(il
);
5473 /* If HW is not ready, prepare the conditions to check again */
5474 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
, CSR_HW_IF_CONFIG_REG_PREPARE
);
5477 _il_poll_bit(il
, CSR_HW_IF_CONFIG_REG
,
5478 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE
,
5479 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE
, 150000);
5481 /* HW should be ready by now, check again. */
5482 if (ret
!= -ETIMEDOUT
)
5483 il4965_set_hw_ready(il
);
5486 #define MAX_HW_RESTARTS 5
5489 __il4965_up(struct il_priv
*il
)
5494 if (test_bit(S_EXIT_PENDING
, &il
->status
)) {
5495 IL_WARN("Exit pending; will not bring the NIC up\n");
5499 if (!il
->ucode_data_backup
.v_addr
|| !il
->ucode_data
.v_addr
) {
5500 IL_ERR("ucode not available for device bringup\n");
5504 ret
= il4965_alloc_bcast_station(il
);
5506 il_dealloc_bcast_stations(il
);
5510 il4965_prepare_card_hw(il
);
5511 if (!il
->hw_ready
) {
5512 IL_ERR("HW not ready\n");
5516 /* If platform's RF_KILL switch is NOT set to KILL */
5517 if (_il_rd(il
, CSR_GP_CNTRL
) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
)
5518 clear_bit(S_RFKILL
, &il
->status
);
5520 set_bit(S_RFKILL
, &il
->status
);
5521 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
, true);
5523 il_enable_rfkill_int(il
);
5524 IL_WARN("Radio disabled by HW RF Kill switch\n");
5528 _il_wr(il
, CSR_INT
, 0xFFFFFFFF);
5530 /* must be initialised before il_hw_nic_init */
5531 il
->cmd_queue
= IL_DEFAULT_CMD_QUEUE_NUM
;
5533 ret
= il4965_hw_nic_init(il
);
5535 IL_ERR("Unable to init nic\n");
5539 /* make sure rfkill handshake bits are cleared */
5540 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_SW_BIT_RFKILL
);
5541 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED
);
5543 /* clear (again), then enable host interrupts */
5544 _il_wr(il
, CSR_INT
, 0xFFFFFFFF);
5545 il_enable_interrupts(il
);
5547 /* really make sure rfkill handshake bits are cleared */
5548 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_SW_BIT_RFKILL
);
5549 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_SW_BIT_RFKILL
);
5551 /* Copy original ucode data image from disk into backup cache.
5552 * This will be used to initialize the on-board processor's
5553 * data SRAM for a clean start when the runtime program first loads. */
5554 memcpy(il
->ucode_data_backup
.v_addr
, il
->ucode_data
.v_addr
,
5555 il
->ucode_data
.len
);
5557 for (i
= 0; i
< MAX_HW_RESTARTS
; i
++) {
5559 /* load bootstrap state machine,
5560 * load bootstrap program into processor's memory,
5561 * prepare to load the "initialize" uCode */
5562 ret
= il
->ops
->load_ucode(il
);
5565 IL_ERR("Unable to set up bootstrap uCode: %d\n", ret
);
5569 /* start card; "initialize" will load runtime ucode */
5570 il4965_nic_start(il
);
5572 D_INFO(DRV_NAME
" is coming up\n");
5577 set_bit(S_EXIT_PENDING
, &il
->status
);
5579 clear_bit(S_EXIT_PENDING
, &il
->status
);
5581 /* tried to restart and config the device for as long as our
5582 * patience could withstand */
5583 IL_ERR("Unable to initialize device after %d attempts.\n", i
);
5587 /*****************************************************************************
5589 * Workqueue callbacks
5591 *****************************************************************************/
5594 il4965_bg_init_alive_start(struct work_struct
*data
)
5596 struct il_priv
*il
=
5597 container_of(data
, struct il_priv
, init_alive_start
.work
);
5599 mutex_lock(&il
->mutex
);
5600 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5603 il
->ops
->init_alive_start(il
);
5605 mutex_unlock(&il
->mutex
);
5609 il4965_bg_alive_start(struct work_struct
*data
)
5611 struct il_priv
*il
=
5612 container_of(data
, struct il_priv
, alive_start
.work
);
5614 mutex_lock(&il
->mutex
);
5615 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5618 il4965_alive_start(il
);
5620 mutex_unlock(&il
->mutex
);
5624 il4965_bg_run_time_calib_work(struct work_struct
*work
)
5626 struct il_priv
*il
= container_of(work
, struct il_priv
,
5627 run_time_calib_work
);
5629 mutex_lock(&il
->mutex
);
5631 if (test_bit(S_EXIT_PENDING
, &il
->status
) ||
5632 test_bit(S_SCANNING
, &il
->status
)) {
5633 mutex_unlock(&il
->mutex
);
5637 if (il
->start_calib
) {
5638 il4965_chain_noise_calibration(il
, (void *)&il
->_4965
.stats
);
5639 il4965_sensitivity_calibration(il
, (void *)&il
->_4965
.stats
);
5642 mutex_unlock(&il
->mutex
);
5646 il4965_bg_restart(struct work_struct
*data
)
5648 struct il_priv
*il
= container_of(data
, struct il_priv
, restart
);
5650 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5653 if (test_and_clear_bit(S_FW_ERROR
, &il
->status
)) {
5654 mutex_lock(&il
->mutex
);
5659 mutex_unlock(&il
->mutex
);
5660 il4965_cancel_deferred_work(il
);
5661 ieee80211_restart_hw(il
->hw
);
5665 mutex_lock(&il
->mutex
);
5666 if (test_bit(S_EXIT_PENDING
, &il
->status
)) {
5667 mutex_unlock(&il
->mutex
);
5672 mutex_unlock(&il
->mutex
);
5677 il4965_bg_rx_replenish(struct work_struct
*data
)
5679 struct il_priv
*il
= container_of(data
, struct il_priv
, rx_replenish
);
5681 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5684 mutex_lock(&il
->mutex
);
5685 il4965_rx_replenish(il
);
5686 mutex_unlock(&il
->mutex
);
5689 /*****************************************************************************
5691 * mac80211 entry point functions
5693 *****************************************************************************/
5695 #define UCODE_READY_TIMEOUT (4 * HZ)
5698 * Not a mac80211 entry point function, but it fits in with all the
5699 * other mac80211 functions grouped here.
5702 il4965_mac_setup_register(struct il_priv
*il
, u32 max_probe_length
)
5705 struct ieee80211_hw
*hw
= il
->hw
;
5707 hw
->rate_control_algorithm
= "iwl-4965-rs";
5709 /* Tell mac80211 our characteristics */
5711 IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_AMPDU_AGGREGATION
|
5712 IEEE80211_HW_NEED_DTIM_PERIOD
| IEEE80211_HW_SPECTRUM_MGMT
|
5713 IEEE80211_HW_REPORTS_TX_ACK_STATUS
;
5715 if (il
->cfg
->sku
& IL_SKU_N
)
5717 IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS
|
5718 IEEE80211_HW_SUPPORTS_STATIC_SMPS
;
5720 hw
->sta_data_size
= sizeof(struct il_station_priv
);
5721 hw
->vif_data_size
= sizeof(struct il_vif_priv
);
5723 hw
->wiphy
->interface_modes
=
5724 BIT(NL80211_IFTYPE_STATION
) | BIT(NL80211_IFTYPE_ADHOC
);
5727 WIPHY_FLAG_CUSTOM_REGULATORY
| WIPHY_FLAG_DISABLE_BEACON_HINTS
;
5730 * For now, disable PS by default because it affects
5731 * RX performance significantly.
5733 hw
->wiphy
->flags
&= ~WIPHY_FLAG_PS_ON_BY_DEFAULT
;
5735 hw
->wiphy
->max_scan_ssids
= PROBE_OPTION_MAX
;
5736 /* we create the 802.11 header and a zero-length SSID element */
5737 hw
->wiphy
->max_scan_ie_len
= max_probe_length
- 24 - 2;
5739 /* Default value; 4 EDCA QOS priorities */
5742 hw
->max_listen_interval
= IL_CONN_MAX_LISTEN_INTERVAL
;
5744 if (il
->bands
[IEEE80211_BAND_2GHZ
].n_channels
)
5745 il
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
5746 &il
->bands
[IEEE80211_BAND_2GHZ
];
5747 if (il
->bands
[IEEE80211_BAND_5GHZ
].n_channels
)
5748 il
->hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
] =
5749 &il
->bands
[IEEE80211_BAND_5GHZ
];
5753 ret
= ieee80211_register_hw(il
->hw
);
5755 IL_ERR("Failed to register hw (error %d)\n", ret
);
5758 il
->mac80211_registered
= 1;
5764 il4965_mac_start(struct ieee80211_hw
*hw
)
5766 struct il_priv
*il
= hw
->priv
;
5769 D_MAC80211("enter\n");
5771 /* we should be verifying the device is ready to be opened */
5772 mutex_lock(&il
->mutex
);
5773 ret
= __il4965_up(il
);
5774 mutex_unlock(&il
->mutex
);
5779 if (il_is_rfkill(il
))
5782 D_INFO("Start UP work done.\n");
5784 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5785 * mac80211 will not be run successfully. */
5786 ret
= wait_event_timeout(il
->wait_command_queue
,
5787 test_bit(S_READY
, &il
->status
),
5788 UCODE_READY_TIMEOUT
);
5790 if (!test_bit(S_READY
, &il
->status
)) {
5791 IL_ERR("START_ALIVE timeout after %dms.\n",
5792 jiffies_to_msecs(UCODE_READY_TIMEOUT
));
5797 il4965_led_enable(il
);
5801 D_MAC80211("leave\n");
5806 il4965_mac_stop(struct ieee80211_hw
*hw
)
5808 struct il_priv
*il
= hw
->priv
;
5810 D_MAC80211("enter\n");
5819 flush_workqueue(il
->workqueue
);
5821 /* User space software may expect getting rfkill changes
5822 * even if interface is down */
5823 _il_wr(il
, CSR_INT
, 0xFFFFFFFF);
5824 il_enable_rfkill_int(il
);
5826 D_MAC80211("leave\n");
5830 il4965_mac_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
5832 struct il_priv
*il
= hw
->priv
;
5834 D_MACDUMP("enter\n");
5836 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb
->len
,
5837 ieee80211_get_tx_rate(hw
, IEEE80211_SKB_CB(skb
))->bitrate
);
5839 if (il4965_tx_skb(il
, skb
))
5840 dev_kfree_skb_any(skb
);
5842 D_MACDUMP("leave\n");
5846 il4965_mac_update_tkip_key(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
5847 struct ieee80211_key_conf
*keyconf
,
5848 struct ieee80211_sta
*sta
, u32 iv32
, u16
* phase1key
)
5850 struct il_priv
*il
= hw
->priv
;
5852 D_MAC80211("enter\n");
5854 il4965_update_tkip_key(il
, keyconf
, sta
, iv32
, phase1key
);
5856 D_MAC80211("leave\n");
5860 il4965_mac_set_key(struct ieee80211_hw
*hw
, enum set_key_cmd cmd
,
5861 struct ieee80211_vif
*vif
, struct ieee80211_sta
*sta
,
5862 struct ieee80211_key_conf
*key
)
5864 struct il_priv
*il
= hw
->priv
;
5867 bool is_default_wep_key
= false;
5869 D_MAC80211("enter\n");
5871 if (il
->cfg
->mod_params
->sw_crypto
) {
5872 D_MAC80211("leave - hwcrypto disabled\n");
5876 sta_id
= il_sta_id_or_broadcast(il
, sta
);
5877 if (sta_id
== IL_INVALID_STATION
)
5880 mutex_lock(&il
->mutex
);
5881 il_scan_cancel_timeout(il
, 100);
5884 * If we are getting WEP group key and we didn't receive any key mapping
5885 * so far, we are in legacy wep mode (group key only), otherwise we are
5887 * In legacy wep mode, we use another host command to the uCode.
5889 if ((key
->cipher
== WLAN_CIPHER_SUITE_WEP40
||
5890 key
->cipher
== WLAN_CIPHER_SUITE_WEP104
) && !sta
) {
5892 is_default_wep_key
= !il
->_4965
.key_mapping_keys
;
5894 is_default_wep_key
=
5895 (key
->hw_key_idx
== HW_KEY_DEFAULT
);
5900 if (is_default_wep_key
)
5901 ret
= il4965_set_default_wep_key(il
, key
);
5903 ret
= il4965_set_dynamic_key(il
, key
, sta_id
);
5905 D_MAC80211("enable hwcrypto key\n");
5908 if (is_default_wep_key
)
5909 ret
= il4965_remove_default_wep_key(il
, key
);
5911 ret
= il4965_remove_dynamic_key(il
, key
, sta_id
);
5913 D_MAC80211("disable hwcrypto key\n");
5919 mutex_unlock(&il
->mutex
);
5920 D_MAC80211("leave\n");
5926 il4965_mac_ampdu_action(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
5927 enum ieee80211_ampdu_mlme_action action
,
5928 struct ieee80211_sta
*sta
, u16 tid
, u16
* ssn
,
5931 struct il_priv
*il
= hw
->priv
;
5934 D_HT("A-MPDU action on addr %pM tid %d\n", sta
->addr
, tid
);
5936 if (!(il
->cfg
->sku
& IL_SKU_N
))
5939 mutex_lock(&il
->mutex
);
5942 case IEEE80211_AMPDU_RX_START
:
5944 ret
= il4965_sta_rx_agg_start(il
, sta
, tid
, *ssn
);
5946 case IEEE80211_AMPDU_RX_STOP
:
5948 ret
= il4965_sta_rx_agg_stop(il
, sta
, tid
);
5949 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5952 case IEEE80211_AMPDU_TX_START
:
5954 ret
= il4965_tx_agg_start(il
, vif
, sta
, tid
, ssn
);
5956 case IEEE80211_AMPDU_TX_STOP
:
5958 ret
= il4965_tx_agg_stop(il
, vif
, sta
, tid
);
5959 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5962 case IEEE80211_AMPDU_TX_OPERATIONAL
:
5966 mutex_unlock(&il
->mutex
);
5972 il4965_mac_sta_add(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
5973 struct ieee80211_sta
*sta
)
5975 struct il_priv
*il
= hw
->priv
;
5976 struct il_station_priv
*sta_priv
= (void *)sta
->drv_priv
;
5977 bool is_ap
= vif
->type
== NL80211_IFTYPE_STATION
;
5981 D_INFO("received request to add station %pM\n", sta
->addr
);
5982 mutex_lock(&il
->mutex
);
5983 D_INFO("proceeding to add station %pM\n", sta
->addr
);
5984 sta_priv
->common
.sta_id
= IL_INVALID_STATION
;
5986 atomic_set(&sta_priv
->pending_frames
, 0);
5989 il_add_station_common(il
, sta
->addr
, is_ap
, sta
, &sta_id
);
5991 IL_ERR("Unable to add station %pM (%d)\n", sta
->addr
, ret
);
5992 /* Should we return success if return code is EEXIST ? */
5993 mutex_unlock(&il
->mutex
);
5997 sta_priv
->common
.sta_id
= sta_id
;
5999 /* Initialize rate scaling */
6000 D_INFO("Initializing rate scaling for station %pM\n", sta
->addr
);
6001 il4965_rs_rate_init(il
, sta
, sta_id
);
6002 mutex_unlock(&il
->mutex
);
6008 il4965_mac_channel_switch(struct ieee80211_hw
*hw
,
6009 struct ieee80211_channel_switch
*ch_switch
)
6011 struct il_priv
*il
= hw
->priv
;
6012 const struct il_channel_info
*ch_info
;
6013 struct ieee80211_conf
*conf
= &hw
->conf
;
6014 struct ieee80211_channel
*channel
= ch_switch
->channel
;
6015 struct il_ht_config
*ht_conf
= &il
->current_ht_config
;
6018 D_MAC80211("enter\n");
6020 mutex_lock(&il
->mutex
);
6022 if (il_is_rfkill(il
))
6025 if (test_bit(S_EXIT_PENDING
, &il
->status
) ||
6026 test_bit(S_SCANNING
, &il
->status
) ||
6027 test_bit(S_CHANNEL_SWITCH_PENDING
, &il
->status
))
6030 if (!il_is_associated(il
))
6033 if (!il
->ops
->set_channel_switch
)
6036 ch
= channel
->hw_value
;
6037 if (le16_to_cpu(il
->active
.channel
) == ch
)
6040 ch_info
= il_get_channel_info(il
, channel
->band
, ch
);
6041 if (!il_is_channel_valid(ch_info
)) {
6042 D_MAC80211("invalid channel\n");
6046 spin_lock_irq(&il
->lock
);
6048 il
->current_ht_config
.smps
= conf
->smps_mode
;
6050 /* Configure HT40 channels */
6051 il
->ht
.enabled
= conf_is_ht(conf
);
6052 if (il
->ht
.enabled
) {
6053 if (conf_is_ht40_minus(conf
)) {
6054 il
->ht
.extension_chan_offset
=
6055 IEEE80211_HT_PARAM_CHA_SEC_BELOW
;
6056 il
->ht
.is_40mhz
= true;
6057 } else if (conf_is_ht40_plus(conf
)) {
6058 il
->ht
.extension_chan_offset
=
6059 IEEE80211_HT_PARAM_CHA_SEC_ABOVE
;
6060 il
->ht
.is_40mhz
= true;
6062 il
->ht
.extension_chan_offset
=
6063 IEEE80211_HT_PARAM_CHA_SEC_NONE
;
6064 il
->ht
.is_40mhz
= false;
6067 il
->ht
.is_40mhz
= false;
6069 if ((le16_to_cpu(il
->staging
.channel
) != ch
))
6070 il
->staging
.flags
= 0;
6072 il_set_rxon_channel(il
, channel
);
6073 il_set_rxon_ht(il
, ht_conf
);
6074 il_set_flags_for_band(il
, channel
->band
, il
->vif
);
6076 spin_unlock_irq(&il
->lock
);
6080 * at this point, staging_rxon has the
6081 * configuration for channel switch
6083 set_bit(S_CHANNEL_SWITCH_PENDING
, &il
->status
);
6084 il
->switch_channel
= cpu_to_le16(ch
);
6085 if (il
->ops
->set_channel_switch(il
, ch_switch
)) {
6086 clear_bit(S_CHANNEL_SWITCH_PENDING
, &il
->status
);
6087 il
->switch_channel
= 0;
6088 ieee80211_chswitch_done(il
->vif
, false);
6092 mutex_unlock(&il
->mutex
);
6093 D_MAC80211("leave\n");
6097 il4965_configure_filter(struct ieee80211_hw
*hw
, unsigned int changed_flags
,
6098 unsigned int *total_flags
, u64 multicast
)
6100 struct il_priv
*il
= hw
->priv
;
6101 __le32 filter_or
= 0, filter_nand
= 0;
6103 #define CHK(test, flag) do { \
6104 if (*total_flags & (test)) \
6105 filter_or |= (flag); \
6107 filter_nand |= (flag); \
6110 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags
,
6113 CHK(FIF_OTHER_BSS
| FIF_PROMISC_IN_BSS
, RXON_FILTER_PROMISC_MSK
);
6114 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
6115 CHK(FIF_CONTROL
, RXON_FILTER_CTL2HOST_MSK
| RXON_FILTER_PROMISC_MSK
);
6116 CHK(FIF_BCN_PRBRESP_PROMISC
, RXON_FILTER_BCON_AWARE_MSK
);
6120 mutex_lock(&il
->mutex
);
6122 il
->staging
.filter_flags
&= ~filter_nand
;
6123 il
->staging
.filter_flags
|= filter_or
;
6126 * Not committing directly because hardware can perform a scan,
6127 * but we'll eventually commit the filter flags change anyway.
6130 mutex_unlock(&il
->mutex
);
6133 * Receiving all multicast frames is always enabled by the
6134 * default flags setup in il_connection_init_rx_config()
6135 * since we currently do not support programming multicast
6136 * filters into the device.
6139 FIF_OTHER_BSS
| FIF_ALLMULTI
| FIF_PROMISC_IN_BSS
|
6140 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
;
6143 /*****************************************************************************
6145 * driver setup and teardown
6147 *****************************************************************************/
6150 il4965_bg_txpower_work(struct work_struct
*work
)
6152 struct il_priv
*il
= container_of(work
, struct il_priv
,
6155 mutex_lock(&il
->mutex
);
6157 /* If a scan happened to start before we got here
6158 * then just return; the stats notification will
6159 * kick off another scheduled work to compensate for
6160 * any temperature delta we missed here. */
6161 if (test_bit(S_EXIT_PENDING
, &il
->status
) ||
6162 test_bit(S_SCANNING
, &il
->status
))
6165 /* Regardless of if we are associated, we must reconfigure the
6166 * TX power since frames can be sent on non-radar channels while
6168 il
->ops
->send_tx_power(il
);
6170 /* Update last_temperature to keep is_calib_needed from running
6171 * when it isn't needed... */
6172 il
->last_temperature
= il
->temperature
;
6174 mutex_unlock(&il
->mutex
);
6178 il4965_setup_deferred_work(struct il_priv
*il
)
6180 il
->workqueue
= create_singlethread_workqueue(DRV_NAME
);
6182 init_waitqueue_head(&il
->wait_command_queue
);
6184 INIT_WORK(&il
->restart
, il4965_bg_restart
);
6185 INIT_WORK(&il
->rx_replenish
, il4965_bg_rx_replenish
);
6186 INIT_WORK(&il
->run_time_calib_work
, il4965_bg_run_time_calib_work
);
6187 INIT_DELAYED_WORK(&il
->init_alive_start
, il4965_bg_init_alive_start
);
6188 INIT_DELAYED_WORK(&il
->alive_start
, il4965_bg_alive_start
);
6190 il_setup_scan_deferred_work(il
);
6192 INIT_WORK(&il
->txpower_work
, il4965_bg_txpower_work
);
6194 init_timer(&il
->stats_periodic
);
6195 il
->stats_periodic
.data
= (unsigned long)il
;
6196 il
->stats_periodic
.function
= il4965_bg_stats_periodic
;
6198 init_timer(&il
->watchdog
);
6199 il
->watchdog
.data
= (unsigned long)il
;
6200 il
->watchdog
.function
= il_bg_watchdog
;
6202 tasklet_init(&il
->irq_tasklet
,
6203 (void (*)(unsigned long))il4965_irq_tasklet
,
6208 il4965_cancel_deferred_work(struct il_priv
*il
)
6210 cancel_work_sync(&il
->txpower_work
);
6211 cancel_delayed_work_sync(&il
->init_alive_start
);
6212 cancel_delayed_work(&il
->alive_start
);
6213 cancel_work_sync(&il
->run_time_calib_work
);
6215 il_cancel_scan_deferred_work(il
);
6217 del_timer_sync(&il
->stats_periodic
);
6221 il4965_init_hw_rates(struct il_priv
*il
, struct ieee80211_rate
*rates
)
6225 for (i
= 0; i
< RATE_COUNT_LEGACY
; i
++) {
6226 rates
[i
].bitrate
= il_rates
[i
].ieee
* 5;
6227 rates
[i
].hw_value
= i
; /* Rate scaling will work on idxes */
6228 rates
[i
].hw_value_short
= i
;
6230 if ((i
>= IL_FIRST_CCK_RATE
) && (i
<= IL_LAST_CCK_RATE
)) {
6232 * If CCK != 1M then set short preamble rate flag.
6235 (il_rates
[i
].plcp
==
6236 RATE_1M_PLCP
) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE
;
6242 * Acquire il->lock before calling this function !
6245 il4965_set_wr_ptrs(struct il_priv
*il
, int txq_id
, u32 idx
)
6247 il_wr(il
, HBUS_TARG_WRPTR
, (idx
& 0xff) | (txq_id
<< 8));
6248 il_wr_prph(il
, IL49_SCD_QUEUE_RDPTR(txq_id
), idx
);
6252 il4965_tx_queue_set_status(struct il_priv
*il
, struct il_tx_queue
*txq
,
6253 int tx_fifo_id
, int scd_retry
)
6255 int txq_id
= txq
->q
.id
;
6257 /* Find out whether to activate Tx queue */
6258 int active
= test_bit(txq_id
, &il
->txq_ctx_active_msk
) ? 1 : 0;
6260 /* Set up and activate */
6261 il_wr_prph(il
, IL49_SCD_QUEUE_STATUS_BITS(txq_id
),
6262 (active
<< IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
6263 (tx_fifo_id
<< IL49_SCD_QUEUE_STTS_REG_POS_TXF
) |
6264 (scd_retry
<< IL49_SCD_QUEUE_STTS_REG_POS_WSL
) |
6265 (scd_retry
<< IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK
) |
6266 IL49_SCD_QUEUE_STTS_REG_MSK
);
6268 txq
->sched_retry
= scd_retry
;
6270 D_INFO("%s %s Queue %d on AC %d\n", active
? "Activate" : "Deactivate",
6271 scd_retry
? "BA" : "AC", txq_id
, tx_fifo_id
);
6274 const struct ieee80211_ops il4965_mac_ops
= {
6275 .tx
= il4965_mac_tx
,
6276 .start
= il4965_mac_start
,
6277 .stop
= il4965_mac_stop
,
6278 .add_interface
= il_mac_add_interface
,
6279 .remove_interface
= il_mac_remove_interface
,
6280 .change_interface
= il_mac_change_interface
,
6281 .config
= il_mac_config
,
6282 .configure_filter
= il4965_configure_filter
,
6283 .set_key
= il4965_mac_set_key
,
6284 .update_tkip_key
= il4965_mac_update_tkip_key
,
6285 .conf_tx
= il_mac_conf_tx
,
6286 .reset_tsf
= il_mac_reset_tsf
,
6287 .bss_info_changed
= il_mac_bss_info_changed
,
6288 .ampdu_action
= il4965_mac_ampdu_action
,
6289 .hw_scan
= il_mac_hw_scan
,
6290 .sta_add
= il4965_mac_sta_add
,
6291 .sta_remove
= il_mac_sta_remove
,
6292 .channel_switch
= il4965_mac_channel_switch
,
6293 .tx_last_beacon
= il_mac_tx_last_beacon
,
6297 il4965_init_drv(struct il_priv
*il
)
6301 spin_lock_init(&il
->sta_lock
);
6302 spin_lock_init(&il
->hcmd_lock
);
6304 INIT_LIST_HEAD(&il
->free_frames
);
6306 mutex_init(&il
->mutex
);
6308 il
->ieee_channels
= NULL
;
6309 il
->ieee_rates
= NULL
;
6310 il
->band
= IEEE80211_BAND_2GHZ
;
6312 il
->iw_mode
= NL80211_IFTYPE_STATION
;
6313 il
->current_ht_config
.smps
= IEEE80211_SMPS_STATIC
;
6314 il
->missed_beacon_threshold
= IL_MISSED_BEACON_THRESHOLD_DEF
;
6316 /* initialize force reset */
6317 il
->force_reset
.reset_duration
= IL_DELAY_NEXT_FORCE_FW_RELOAD
;
6319 /* Choose which receivers/antennas to use */
6320 if (il
->ops
->set_rxon_chain
)
6321 il
->ops
->set_rxon_chain(il
);
6323 il_init_scan_params(il
);
6325 ret
= il_init_channel_map(il
);
6327 IL_ERR("initializing regulatory failed: %d\n", ret
);
6331 ret
= il_init_geos(il
);
6333 IL_ERR("initializing geos failed: %d\n", ret
);
6334 goto err_free_channel_map
;
6336 il4965_init_hw_rates(il
, il
->ieee_rates
);
6340 err_free_channel_map
:
6341 il_free_channel_map(il
);
6347 il4965_uninit_drv(struct il_priv
*il
)
6350 il_free_channel_map(il
);
6351 kfree(il
->scan_cmd
);
6355 il4965_hw_detect(struct il_priv
*il
)
6357 il
->hw_rev
= _il_rd(il
, CSR_HW_REV
);
6358 il
->hw_wa_rev
= _il_rd(il
, CSR_HW_REV_WA_REG
);
6359 il
->rev_id
= il
->pci_dev
->revision
;
6360 D_INFO("HW Revision ID = 0x%X\n", il
->rev_id
);
6363 static struct il_sensitivity_ranges il4965_sensitivity
= {
6365 .max_nrg_cck
= 0, /* not used, set to 0 */
6367 .auto_corr_min_ofdm
= 85,
6368 .auto_corr_min_ofdm_mrc
= 170,
6369 .auto_corr_min_ofdm_x1
= 105,
6370 .auto_corr_min_ofdm_mrc_x1
= 220,
6372 .auto_corr_max_ofdm
= 120,
6373 .auto_corr_max_ofdm_mrc
= 210,
6374 .auto_corr_max_ofdm_x1
= 140,
6375 .auto_corr_max_ofdm_mrc_x1
= 270,
6377 .auto_corr_min_cck
= 125,
6378 .auto_corr_max_cck
= 200,
6379 .auto_corr_min_cck_mrc
= 200,
6380 .auto_corr_max_cck_mrc
= 400,
6385 .barker_corr_th_min
= 190,
6386 .barker_corr_th_min_mrc
= 390,
6391 il4965_set_hw_params(struct il_priv
*il
)
6393 il
->hw_params
.bcast_id
= IL4965_BROADCAST_ID
;
6394 il
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
6395 il
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
6396 if (il
->cfg
->mod_params
->amsdu_size_8K
)
6397 il
->hw_params
.rx_page_order
= get_order(IL_RX_BUF_SIZE_8K
);
6399 il
->hw_params
.rx_page_order
= get_order(IL_RX_BUF_SIZE_4K
);
6401 il
->hw_params
.max_beacon_itrvl
= IL_MAX_UCODE_BEACON_INTERVAL
;
6403 if (il
->cfg
->mod_params
->disable_11n
)
6404 il
->cfg
->sku
&= ~IL_SKU_N
;
6406 if (il
->cfg
->mod_params
->num_of_queues
>= IL_MIN_NUM_QUEUES
&&
6407 il
->cfg
->mod_params
->num_of_queues
<= IL49_NUM_QUEUES
)
6408 il
->cfg
->num_of_queues
=
6409 il
->cfg
->mod_params
->num_of_queues
;
6411 il
->hw_params
.max_txq_num
= il
->cfg
->num_of_queues
;
6412 il
->hw_params
.dma_chnl_num
= FH49_TCSR_CHNL_NUM
;
6413 il
->hw_params
.scd_bc_tbls_size
=
6414 il
->cfg
->num_of_queues
*
6415 sizeof(struct il4965_scd_bc_tbl
);
6417 il
->hw_params
.tfd_size
= sizeof(struct il_tfd
);
6418 il
->hw_params
.max_stations
= IL4965_STATION_COUNT
;
6419 il
->hw_params
.max_data_size
= IL49_RTC_DATA_SIZE
;
6420 il
->hw_params
.max_inst_size
= IL49_RTC_INST_SIZE
;
6421 il
->hw_params
.max_bsm_size
= BSM_SRAM_SIZE
;
6422 il
->hw_params
.ht40_channel
= BIT(IEEE80211_BAND_5GHZ
);
6424 il
->hw_params
.rx_wrt_ptr_reg
= FH49_RSCSR_CHNL0_WPTR
;
6426 il
->hw_params
.tx_chains_num
= il4965_num_of_ant(il
->cfg
->valid_tx_ant
);
6427 il
->hw_params
.rx_chains_num
= il4965_num_of_ant(il
->cfg
->valid_rx_ant
);
6428 il
->hw_params
.valid_tx_ant
= il
->cfg
->valid_tx_ant
;
6429 il
->hw_params
.valid_rx_ant
= il
->cfg
->valid_rx_ant
;
6431 il
->hw_params
.ct_kill_threshold
=
6432 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY
);
6434 il
->hw_params
.sens
= &il4965_sensitivity
;
6435 il
->hw_params
.beacon_time_tsf_bits
= IL4965_EXT_BEACON_TIME_POS
;
6439 il4965_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
6443 struct ieee80211_hw
*hw
;
6444 struct il_cfg
*cfg
= (struct il_cfg
*)(ent
->driver_data
);
6445 unsigned long flags
;
6448 /************************
6449 * 1. Allocating HW data
6450 ************************/
6452 hw
= ieee80211_alloc_hw(sizeof(struct il_priv
), &il4965_mac_ops
);
6459 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
6461 D_INFO("*** LOAD DRIVER ***\n");
6463 il
->ops
= &il4965_ops
;
6464 #ifdef CONFIG_IWLEGACY_DEBUGFS
6465 il
->debugfs_ops
= &il4965_debugfs_ops
;
6468 il
->inta_mask
= CSR_INI_SET_MASK
;
6470 /**************************
6471 * 2. Initializing PCI bus
6472 **************************/
6473 pci_disable_link_state(pdev
,
6474 PCIE_LINK_STATE_L0S
| PCIE_LINK_STATE_L1
|
6475 PCIE_LINK_STATE_CLKPM
);
6477 if (pci_enable_device(pdev
)) {
6479 goto out_ieee80211_free_hw
;
6482 pci_set_master(pdev
);
6484 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(36));
6486 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(36));
6488 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
6491 pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
6492 /* both attempts failed: */
6494 IL_WARN("No suitable DMA available.\n");
6495 goto out_pci_disable_device
;
6499 err
= pci_request_regions(pdev
, DRV_NAME
);
6501 goto out_pci_disable_device
;
6503 pci_set_drvdata(pdev
, il
);
6505 /***********************
6506 * 3. Read REV register
6507 ***********************/
6508 il
->hw_base
= pci_ioremap_bar(pdev
, 0);
6511 goto out_pci_release_regions
;
6514 D_INFO("pci_resource_len = 0x%08llx\n",
6515 (unsigned long long)pci_resource_len(pdev
, 0));
6516 D_INFO("pci_resource_base = %p\n", il
->hw_base
);
6518 /* these spin locks will be used in apm_ops.init and EEPROM access
6519 * we should init now
6521 spin_lock_init(&il
->reg_lock
);
6522 spin_lock_init(&il
->lock
);
6525 * stop and reset the on-board processor just in case it is in a
6526 * strange state ... like being left stranded by a primary kernel
6527 * and this is now the kdump kernel trying to start up
6529 _il_wr(il
, CSR_RESET
, CSR_RESET_REG_FLAG_NEVO_RESET
);
6531 il4965_hw_detect(il
);
6532 IL_INFO("Detected %s, REV=0x%X\n", il
->cfg
->name
, il
->hw_rev
);
6534 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6535 * PCI Tx retries from interfering with C3 CPU state */
6536 pci_write_config_byte(pdev
, PCI_CFG_RETRY_TIMEOUT
, 0x00);
6538 il4965_prepare_card_hw(il
);
6539 if (!il
->hw_ready
) {
6540 IL_WARN("Failed, HW not ready\n");
6547 /* Read the EEPROM */
6548 err
= il_eeprom_init(il
);
6550 IL_ERR("Unable to init EEPROM\n");
6553 err
= il4965_eeprom_check_version(il
);
6555 goto out_free_eeprom
;
6558 goto out_free_eeprom
;
6560 /* extract MAC Address */
6561 il4965_eeprom_get_mac(il
, il
->addresses
[0].addr
);
6562 D_INFO("MAC address: %pM\n", il
->addresses
[0].addr
);
6563 il
->hw
->wiphy
->addresses
= il
->addresses
;
6564 il
->hw
->wiphy
->n_addresses
= 1;
6566 /************************
6567 * 5. Setup HW constants
6568 ************************/
6569 il4965_set_hw_params(il
);
6571 /*******************
6573 *******************/
6575 err
= il4965_init_drv(il
);
6577 goto out_free_eeprom
;
6578 /* At this point both hw and il are initialized. */
6580 /********************
6582 ********************/
6583 spin_lock_irqsave(&il
->lock
, flags
);
6584 il_disable_interrupts(il
);
6585 spin_unlock_irqrestore(&il
->lock
, flags
);
6587 pci_enable_msi(il
->pci_dev
);
6589 err
= request_irq(il
->pci_dev
->irq
, il_isr
, IRQF_SHARED
, DRV_NAME
, il
);
6591 IL_ERR("Error allocating IRQ %d\n", il
->pci_dev
->irq
);
6592 goto out_disable_msi
;
6595 il4965_setup_deferred_work(il
);
6596 il4965_setup_handlers(il
);
6598 /*********************************************
6599 * 8. Enable interrupts and read RFKILL state
6600 *********************************************/
6602 /* enable rfkill interrupt: hw bug w/a */
6603 pci_read_config_word(il
->pci_dev
, PCI_COMMAND
, &pci_cmd
);
6604 if (pci_cmd
& PCI_COMMAND_INTX_DISABLE
) {
6605 pci_cmd
&= ~PCI_COMMAND_INTX_DISABLE
;
6606 pci_write_config_word(il
->pci_dev
, PCI_COMMAND
, pci_cmd
);
6609 il_enable_rfkill_int(il
);
6611 /* If platform's RF_KILL switch is NOT set to KILL */
6612 if (_il_rd(il
, CSR_GP_CNTRL
) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
)
6613 clear_bit(S_RFKILL
, &il
->status
);
6615 set_bit(S_RFKILL
, &il
->status
);
6617 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
,
6618 test_bit(S_RFKILL
, &il
->status
));
6620 il_power_initialize(il
);
6622 init_completion(&il
->_4965
.firmware_loading_complete
);
6624 err
= il4965_request_firmware(il
, true);
6626 goto out_destroy_workqueue
;
6630 out_destroy_workqueue
:
6631 destroy_workqueue(il
->workqueue
);
6632 il
->workqueue
= NULL
;
6633 free_irq(il
->pci_dev
->irq
, il
);
6635 pci_disable_msi(il
->pci_dev
);
6636 il4965_uninit_drv(il
);
6640 iounmap(il
->hw_base
);
6641 out_pci_release_regions
:
6642 pci_set_drvdata(pdev
, NULL
);
6643 pci_release_regions(pdev
);
6644 out_pci_disable_device
:
6645 pci_disable_device(pdev
);
6646 out_ieee80211_free_hw
:
6647 ieee80211_free_hw(il
->hw
);
6652 static void __devexit
6653 il4965_pci_remove(struct pci_dev
*pdev
)
6655 struct il_priv
*il
= pci_get_drvdata(pdev
);
6656 unsigned long flags
;
6661 wait_for_completion(&il
->_4965
.firmware_loading_complete
);
6663 D_INFO("*** UNLOAD DRIVER ***\n");
6665 il_dbgfs_unregister(il
);
6666 sysfs_remove_group(&pdev
->dev
.kobj
, &il_attribute_group
);
6668 /* ieee80211_unregister_hw call wil cause il_mac_stop to
6669 * to be called and il4965_down since we are removing the device
6670 * we need to set S_EXIT_PENDING bit.
6672 set_bit(S_EXIT_PENDING
, &il
->status
);
6676 if (il
->mac80211_registered
) {
6677 ieee80211_unregister_hw(il
->hw
);
6678 il
->mac80211_registered
= 0;
6684 * Make sure device is reset to low power before unloading driver.
6685 * This may be redundant with il4965_down(), but there are paths to
6686 * run il4965_down() without calling apm_ops.stop(), and there are
6687 * paths to avoid running il4965_down() at all before leaving driver.
6688 * This (inexpensive) call *makes sure* device is reset.
6692 /* make sure we flush any pending irq or
6693 * tasklet for the driver
6695 spin_lock_irqsave(&il
->lock
, flags
);
6696 il_disable_interrupts(il
);
6697 spin_unlock_irqrestore(&il
->lock
, flags
);
6699 il4965_synchronize_irq(il
);
6701 il4965_dealloc_ucode_pci(il
);
6704 il4965_rx_queue_free(il
, &il
->rxq
);
6705 il4965_hw_txq_ctx_free(il
);
6709 /*netif_stop_queue(dev); */
6710 flush_workqueue(il
->workqueue
);
6712 /* ieee80211_unregister_hw calls il_mac_stop, which flushes
6713 * il->workqueue... so we can't take down the workqueue
6715 destroy_workqueue(il
->workqueue
);
6716 il
->workqueue
= NULL
;
6718 free_irq(il
->pci_dev
->irq
, il
);
6719 pci_disable_msi(il
->pci_dev
);
6720 iounmap(il
->hw_base
);
6721 pci_release_regions(pdev
);
6722 pci_disable_device(pdev
);
6723 pci_set_drvdata(pdev
, NULL
);
6725 il4965_uninit_drv(il
);
6727 dev_kfree_skb(il
->beacon_skb
);
6729 ieee80211_free_hw(il
->hw
);
6733 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
6734 * must be called under il->lock and mac access
6737 il4965_txq_set_sched(struct il_priv
*il
, u32 mask
)
6739 il_wr_prph(il
, IL49_SCD_TXFACT
, mask
);
6742 /*****************************************************************************
6744 * driver and module entry point
6746 *****************************************************************************/
6748 /* Hardware specific file defines the PCI IDs table for that hardware module */
6749 static DEFINE_PCI_DEVICE_TABLE(il4965_hw_card_ids
) = {
6750 {IL_PCI_DEVICE(0x4229, PCI_ANY_ID
, il4965_cfg
)},
6751 {IL_PCI_DEVICE(0x4230, PCI_ANY_ID
, il4965_cfg
)},
6754 MODULE_DEVICE_TABLE(pci
, il4965_hw_card_ids
);
6756 static struct pci_driver il4965_driver
= {
6758 .id_table
= il4965_hw_card_ids
,
6759 .probe
= il4965_pci_probe
,
6760 .remove
= __devexit_p(il4965_pci_remove
),
6761 .driver
.pm
= IL_LEGACY_PM_OPS
,
6769 pr_info(DRV_DESCRIPTION
", " DRV_VERSION
"\n");
6770 pr_info(DRV_COPYRIGHT
"\n");
6772 ret
= il4965_rate_control_register();
6774 pr_err("Unable to register rate control algorithm: %d\n", ret
);
6778 ret
= pci_register_driver(&il4965_driver
);
6780 pr_err("Unable to initialize PCI module\n");
6781 goto error_register
;
6787 il4965_rate_control_unregister();
6794 pci_unregister_driver(&il4965_driver
);
6795 il4965_rate_control_unregister();
6798 module_exit(il4965_exit
);
6799 module_init(il4965_init
);
6801 #ifdef CONFIG_IWLEGACY_DEBUG
6802 module_param_named(debug
, il_debug_level
, uint
, S_IRUGO
| S_IWUSR
);
6803 MODULE_PARM_DESC(debug
, "debug output mask");
6806 module_param_named(swcrypto
, il4965_mod_params
.sw_crypto
, int, S_IRUGO
);
6807 MODULE_PARM_DESC(swcrypto
, "using crypto in software (default 0 [hardware])");
6808 module_param_named(queues_num
, il4965_mod_params
.num_of_queues
, int, S_IRUGO
);
6809 MODULE_PARM_DESC(queues_num
, "number of hw queues.");
6810 module_param_named(11n_disable
, il4965_mod_params
.disable_11n
, int, S_IRUGO
);
6811 MODULE_PARM_DESC(11n_disable
, "disable 11n functionality");
6812 module_param_named(amsdu_size_8K
, il4965_mod_params
.amsdu_size_8K
, int,
6814 MODULE_PARM_DESC(amsdu_size_8K
, "enable 8K amsdu size");
6815 module_param_named(fw_restart
, il4965_mod_params
.restart_fw
, int, S_IRUGO
);
6816 MODULE_PARM_DESC(fw_restart
, "restart firmware in case of error");