da5900d30caa9a97b192768908f58637193f6af6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / ath / ath6kl / init.c
1
2 /*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #include <linux/moduleparam.h>
20 #include <linux/errno.h>
21 #include <linux/export.h>
22 #include <linux/of.h>
23 #include <linux/mmc/sdio_func.h>
24
25 #include "core.h"
26 #include "cfg80211.h"
27 #include "target.h"
28 #include "debug.h"
29 #include "hif-ops.h"
30
31 static const struct ath6kl_hw hw_list[] = {
32 {
33 .id = AR6003_HW_2_0_VERSION,
34 .name = "ar6003 hw 2.0",
35 .dataset_patch_addr = 0x57e884,
36 .app_load_addr = 0x543180,
37 .board_ext_data_addr = 0x57e500,
38 .reserved_ram_size = 6912,
39 .refclk_hz = 26000000,
40 .uarttx_pin = 8,
41
42 /* hw2.0 needs override address hardcoded */
43 .app_start_override_addr = 0x944C00,
44
45 .fw = {
46 .dir = AR6003_HW_2_0_FW_DIR,
47 .otp = AR6003_HW_2_0_OTP_FILE,
48 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
49 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
50 .patch = AR6003_HW_2_0_PATCH_FILE,
51 },
52
53 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
54 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
55 },
56 {
57 .id = AR6003_HW_2_1_1_VERSION,
58 .name = "ar6003 hw 2.1.1",
59 .dataset_patch_addr = 0x57ff74,
60 .app_load_addr = 0x1234,
61 .board_ext_data_addr = 0x542330,
62 .reserved_ram_size = 512,
63 .refclk_hz = 26000000,
64 .uarttx_pin = 8,
65 .testscript_addr = 0x57ef74,
66
67 .fw = {
68 .dir = AR6003_HW_2_1_1_FW_DIR,
69 .otp = AR6003_HW_2_1_1_OTP_FILE,
70 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
71 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
72 .patch = AR6003_HW_2_1_1_PATCH_FILE,
73 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
74 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
75 },
76
77 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
78 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
79 },
80 {
81 .id = AR6004_HW_1_0_VERSION,
82 .name = "ar6004 hw 1.0",
83 .dataset_patch_addr = 0x57e884,
84 .app_load_addr = 0x1234,
85 .board_ext_data_addr = 0x437000,
86 .reserved_ram_size = 19456,
87 .board_addr = 0x433900,
88 .refclk_hz = 26000000,
89 .uarttx_pin = 11,
90
91 .fw = {
92 .dir = AR6004_HW_1_0_FW_DIR,
93 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
94 },
95
96 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
97 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
98 },
99 {
100 .id = AR6004_HW_1_1_VERSION,
101 .name = "ar6004 hw 1.1",
102 .dataset_patch_addr = 0x57e884,
103 .app_load_addr = 0x1234,
104 .board_ext_data_addr = 0x437000,
105 .reserved_ram_size = 11264,
106 .board_addr = 0x43d400,
107 .refclk_hz = 40000000,
108 .uarttx_pin = 11,
109
110 .fw = {
111 .dir = AR6004_HW_1_1_FW_DIR,
112 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
113 },
114
115 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
116 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
117 },
118 };
119
120 /*
121 * Include definitions here that can be used to tune the WLAN module
122 * behavior. Different customers can tune the behavior as per their needs,
123 * here.
124 */
125
126 /*
127 * This configuration item enable/disable keepalive support.
128 * Keepalive support: In the absence of any data traffic to AP, null
129 * frames will be sent to the AP at periodic interval, to keep the association
130 * active. This configuration item defines the periodic interval.
131 * Use value of zero to disable keepalive support
132 * Default: 60 seconds
133 */
134 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
135
136 /*
137 * This configuration item sets the value of disconnect timeout
138 * Firmware delays sending the disconnec event to the host for this
139 * timeout after is gets disconnected from the current AP.
140 * If the firmware successly roams within the disconnect timeout
141 * it sends a new connect event
142 */
143 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
144
145
146 #define ATH6KL_DATA_OFFSET 64
147 struct sk_buff *ath6kl_buf_alloc(int size)
148 {
149 struct sk_buff *skb;
150 u16 reserved;
151
152 /* Add chacheline space at front and back of buffer */
153 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
154 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
155 skb = dev_alloc_skb(size + reserved);
156
157 if (skb)
158 skb_reserve(skb, reserved - L1_CACHE_BYTES);
159 return skb;
160 }
161
162 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
163 {
164 vif->ssid_len = 0;
165 memset(vif->ssid, 0, sizeof(vif->ssid));
166
167 vif->dot11_auth_mode = OPEN_AUTH;
168 vif->auth_mode = NONE_AUTH;
169 vif->prwise_crypto = NONE_CRYPT;
170 vif->prwise_crypto_len = 0;
171 vif->grp_crypto = NONE_CRYPT;
172 vif->grp_crypto_len = 0;
173 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
174 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
175 memset(vif->bssid, 0, sizeof(vif->bssid));
176 vif->bss_ch = 0;
177 }
178
179 static int ath6kl_set_host_app_area(struct ath6kl *ar)
180 {
181 u32 address, data;
182 struct host_app_area host_app_area;
183
184 /* Fetch the address of the host_app_area_s
185 * instance in the host interest area */
186 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
187 address = TARG_VTOP(ar->target_type, address);
188
189 if (ath6kl_diag_read32(ar, address, &data))
190 return -EIO;
191
192 address = TARG_VTOP(ar->target_type, data);
193 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
194 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
195 sizeof(struct host_app_area)))
196 return -EIO;
197
198 return 0;
199 }
200
201 static inline void set_ac2_ep_map(struct ath6kl *ar,
202 u8 ac,
203 enum htc_endpoint_id ep)
204 {
205 ar->ac2ep_map[ac] = ep;
206 ar->ep2ac_map[ep] = ac;
207 }
208
209 /* connect to a service */
210 static int ath6kl_connectservice(struct ath6kl *ar,
211 struct htc_service_connect_req *con_req,
212 char *desc)
213 {
214 int status;
215 struct htc_service_connect_resp response;
216
217 memset(&response, 0, sizeof(response));
218
219 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
220 if (status) {
221 ath6kl_err("failed to connect to %s service status:%d\n",
222 desc, status);
223 return status;
224 }
225
226 switch (con_req->svc_id) {
227 case WMI_CONTROL_SVC:
228 if (test_bit(WMI_ENABLED, &ar->flag))
229 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
230 ar->ctrl_ep = response.endpoint;
231 break;
232 case WMI_DATA_BE_SVC:
233 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
234 break;
235 case WMI_DATA_BK_SVC:
236 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
237 break;
238 case WMI_DATA_VI_SVC:
239 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
240 break;
241 case WMI_DATA_VO_SVC:
242 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
243 break;
244 default:
245 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
246 return -EINVAL;
247 }
248
249 return 0;
250 }
251
252 static int ath6kl_init_service_ep(struct ath6kl *ar)
253 {
254 struct htc_service_connect_req connect;
255
256 memset(&connect, 0, sizeof(connect));
257
258 /* these fields are the same for all service endpoints */
259 connect.ep_cb.rx = ath6kl_rx;
260 connect.ep_cb.rx_refill = ath6kl_rx_refill;
261 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
262
263 /*
264 * Set the max queue depth so that our ath6kl_tx_queue_full handler
265 * gets called.
266 */
267 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
268 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
269 if (!connect.ep_cb.rx_refill_thresh)
270 connect.ep_cb.rx_refill_thresh++;
271
272 /* connect to control service */
273 connect.svc_id = WMI_CONTROL_SVC;
274 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
275 return -EIO;
276
277 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
278
279 /*
280 * Limit the HTC message size on the send path, although e can
281 * receive A-MSDU frames of 4K, we will only send ethernet-sized
282 * (802.3) frames on the send path.
283 */
284 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
285
286 /*
287 * To reduce the amount of committed memory for larger A_MSDU
288 * frames, use the recv-alloc threshold mechanism for larger
289 * packets.
290 */
291 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
292 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
293
294 /*
295 * For the remaining data services set the connection flag to
296 * reduce dribbling, if configured to do so.
297 */
298 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
299 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
300 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
301
302 connect.svc_id = WMI_DATA_BE_SVC;
303
304 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
305 return -EIO;
306
307 /* connect to back-ground map this to WMI LOW_PRI */
308 connect.svc_id = WMI_DATA_BK_SVC;
309 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
310 return -EIO;
311
312 /* connect to Video service, map this to to HI PRI */
313 connect.svc_id = WMI_DATA_VI_SVC;
314 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
315 return -EIO;
316
317 /*
318 * Connect to VO service, this is currently not mapped to a WMI
319 * priority stream due to historical reasons. WMI originally
320 * defined 3 priorities over 3 mailboxes We can change this when
321 * WMI is reworked so that priorities are not dependent on
322 * mailboxes.
323 */
324 connect.svc_id = WMI_DATA_VO_SVC;
325 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
326 return -EIO;
327
328 return 0;
329 }
330
331 void ath6kl_init_control_info(struct ath6kl_vif *vif)
332 {
333 ath6kl_init_profile_info(vif);
334 vif->def_txkey_index = 0;
335 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
336 vif->ch_hint = 0;
337 }
338
339 /*
340 * Set HTC/Mbox operational parameters, this can only be called when the
341 * target is in the BMI phase.
342 */
343 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
344 u8 htc_ctrl_buf)
345 {
346 int status;
347 u32 blk_size;
348
349 blk_size = ar->mbox_info.block_size;
350
351 if (htc_ctrl_buf)
352 blk_size |= ((u32)htc_ctrl_buf) << 16;
353
354 /* set the host interest area for the block size */
355 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
356 if (status) {
357 ath6kl_err("bmi_write_memory for IO block size failed\n");
358 goto out;
359 }
360
361 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
362 blk_size,
363 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
364
365 if (mbox_isr_yield_val) {
366 /* set the host interest area for the mbox ISR yield limit */
367 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
368 mbox_isr_yield_val);
369 if (status) {
370 ath6kl_err("bmi_write_memory for yield limit failed\n");
371 goto out;
372 }
373 }
374
375 out:
376 return status;
377 }
378
379 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
380 {
381 int status = 0;
382 int ret;
383
384 /*
385 * Configure the device for rx dot11 header rules. "0,0" are the
386 * default values. Required if checksum offload is needed. Set
387 * RxMetaVersion to 2.
388 */
389 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
390 ar->rx_meta_ver, 0, 0)) {
391 ath6kl_err("unable to set the rx frame format\n");
392 status = -EIO;
393 }
394
395 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
396 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
397 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
398 ath6kl_err("unable to set power save fail event policy\n");
399 status = -EIO;
400 }
401
402 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
403 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
404 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
405 ath6kl_err("unable to set barker preamble policy\n");
406 status = -EIO;
407 }
408
409 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
410 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
411 ath6kl_err("unable to set keep alive interval\n");
412 status = -EIO;
413 }
414
415 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
416 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
417 ath6kl_err("unable to set disconnect timeout\n");
418 status = -EIO;
419 }
420
421 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
422 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
423 ath6kl_err("unable to set txop bursting\n");
424 status = -EIO;
425 }
426
427 if (ar->p2p && (ar->vif_max == 1 || idx)) {
428 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
429 P2P_FLAG_CAPABILITIES_REQ |
430 P2P_FLAG_MACADDR_REQ |
431 P2P_FLAG_HMODEL_REQ);
432 if (ret) {
433 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
434 "capabilities (%d) - assuming P2P not "
435 "supported\n", ret);
436 ar->p2p = false;
437 }
438 }
439
440 if (ar->p2p && (ar->vif_max == 1 || idx)) {
441 /* Enable Probe Request reporting for P2P */
442 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
443 if (ret) {
444 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
445 "Request reporting (%d)\n", ret);
446 }
447 }
448
449 return status;
450 }
451
452 int ath6kl_configure_target(struct ath6kl *ar)
453 {
454 u32 param, ram_reserved_size;
455 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
456 int i, status;
457
458 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
459 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
460 ath6kl_err("bmi_write_memory for uart debug failed\n");
461 return -EIO;
462 }
463
464 /*
465 * Note: Even though the firmware interface type is
466 * chosen as BSS_STA for all three interfaces, can
467 * be configured to IBSS/AP as long as the fw submode
468 * remains normal mode (0 - AP, STA and IBSS). But
469 * due to an target assert in firmware only one interface is
470 * configured for now.
471 */
472 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
473
474 for (i = 0; i < ar->vif_max; i++)
475 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
476
477 /*
478 * By default, submodes :
479 * vif[0] - AP/STA/IBSS
480 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
481 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
482 */
483
484 for (i = 0; i < ar->max_norm_iface; i++)
485 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
486 (i * HI_OPTION_FW_SUBMODE_BITS);
487
488 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
489 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
490 (i * HI_OPTION_FW_SUBMODE_BITS);
491
492 if (ar->p2p && ar->vif_max == 1)
493 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
494
495 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
496 HTC_PROTOCOL_VERSION) != 0) {
497 ath6kl_err("bmi_write_memory for htc version failed\n");
498 return -EIO;
499 }
500
501 /* set the firmware mode to STA/IBSS/AP */
502 param = 0;
503
504 if (ath6kl_bmi_read(ar,
505 ath6kl_get_hi_item_addr(ar,
506 HI_ITEM(hi_option_flag)),
507 (u8 *)&param, 4) != 0) {
508 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
509 return -EIO;
510 }
511
512 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
513 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
514 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
515
516 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
517 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
518
519 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
520 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
521 return -EIO;
522 }
523
524 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
525
526 /*
527 * Hardcode the address use for the extended board data
528 * Ideally this should be pre-allocate by the OS at boot time
529 * But since it is a new feature and board data is loaded
530 * at init time, we have to workaround this from host.
531 * It is difficult to patch the firmware boot code,
532 * but possible in theory.
533 */
534
535 param = ar->hw.board_ext_data_addr;
536 ram_reserved_size = ar->hw.reserved_ram_size;
537
538 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
539 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
540 return -EIO;
541 }
542
543 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
544 ram_reserved_size) != 0) {
545 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
546 return -EIO;
547 }
548
549 /* set the block size for the target */
550 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
551 /* use default number of control buffers */
552 return -EIO;
553
554 /* Configure GPIO AR600x UART */
555 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
556 ar->hw.uarttx_pin);
557 if (status)
558 return status;
559
560 /* Configure target refclk_hz */
561 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
562 if (status)
563 return status;
564
565 return 0;
566 }
567
568 /* firmware upload */
569 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
570 u8 **fw, size_t *fw_len)
571 {
572 const struct firmware *fw_entry;
573 int ret;
574
575 ret = request_firmware(&fw_entry, filename, ar->dev);
576 if (ret)
577 return ret;
578
579 *fw_len = fw_entry->size;
580 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
581
582 if (*fw == NULL)
583 ret = -ENOMEM;
584
585 release_firmware(fw_entry);
586
587 return ret;
588 }
589
590 #ifdef CONFIG_OF
591 /*
592 * Check the device tree for a board-id and use it to construct
593 * the pathname to the firmware file. Used (for now) to find a
594 * fallback to the "bdata.bin" file--typically a symlink to the
595 * appropriate board-specific file.
596 */
597 static bool check_device_tree(struct ath6kl *ar)
598 {
599 static const char *board_id_prop = "atheros,board-id";
600 struct device_node *node;
601 char board_filename[64];
602 const char *board_id;
603 int ret;
604
605 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
606 board_id = of_get_property(node, board_id_prop, NULL);
607 if (board_id == NULL) {
608 ath6kl_warn("No \"%s\" property on %s node.\n",
609 board_id_prop, node->name);
610 continue;
611 }
612 snprintf(board_filename, sizeof(board_filename),
613 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
614
615 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
616 &ar->fw_board_len);
617 if (ret) {
618 ath6kl_err("Failed to get DT board file %s: %d\n",
619 board_filename, ret);
620 continue;
621 }
622 return true;
623 }
624 return false;
625 }
626 #else
627 static bool check_device_tree(struct ath6kl *ar)
628 {
629 return false;
630 }
631 #endif /* CONFIG_OF */
632
633 static int ath6kl_fetch_board_file(struct ath6kl *ar)
634 {
635 const char *filename;
636 int ret;
637
638 if (ar->fw_board != NULL)
639 return 0;
640
641 if (WARN_ON(ar->hw.fw_board == NULL))
642 return -EINVAL;
643
644 filename = ar->hw.fw_board;
645
646 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
647 &ar->fw_board_len);
648 if (ret == 0) {
649 /* managed to get proper board file */
650 return 0;
651 }
652
653 if (check_device_tree(ar)) {
654 /* got board file from device tree */
655 return 0;
656 }
657
658 /* there was no proper board file, try to use default instead */
659 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
660 filename, ret);
661
662 filename = ar->hw.fw_default_board;
663
664 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
665 &ar->fw_board_len);
666 if (ret) {
667 ath6kl_err("Failed to get default board file %s: %d\n",
668 filename, ret);
669 return ret;
670 }
671
672 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
673 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
674
675 return 0;
676 }
677
678 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
679 {
680 char filename[100];
681 int ret;
682
683 if (ar->fw_otp != NULL)
684 return 0;
685
686 if (ar->hw.fw.otp == NULL) {
687 ath6kl_dbg(ATH6KL_DBG_BOOT,
688 "no OTP file configured for this hw\n");
689 return 0;
690 }
691
692 snprintf(filename, sizeof(filename), "%s/%s",
693 ar->hw.fw.dir, ar->hw.fw.otp);
694
695 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
696 &ar->fw_otp_len);
697 if (ret) {
698 ath6kl_err("Failed to get OTP file %s: %d\n",
699 filename, ret);
700 return ret;
701 }
702
703 return 0;
704 }
705
706 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
707 {
708 char filename[100];
709 int ret;
710
711 if (ar->testmode == 0)
712 return 0;
713
714 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
715
716 if (ar->testmode == 2) {
717 if (ar->hw.fw.utf == NULL) {
718 ath6kl_warn("testmode 2 not supported\n");
719 return -EOPNOTSUPP;
720 }
721
722 snprintf(filename, sizeof(filename), "%s/%s",
723 ar->hw.fw.dir, ar->hw.fw.utf);
724 } else {
725 if (ar->hw.fw.tcmd == NULL) {
726 ath6kl_warn("testmode 1 not supported\n");
727 return -EOPNOTSUPP;
728 }
729
730 snprintf(filename, sizeof(filename), "%s/%s",
731 ar->hw.fw.dir, ar->hw.fw.tcmd);
732 }
733
734 set_bit(TESTMODE, &ar->flag);
735
736 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
737 if (ret) {
738 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
739 ar->testmode, filename, ret);
740 return ret;
741 }
742
743 return 0;
744 }
745
746 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
747 {
748 char filename[100];
749 int ret;
750
751 if (ar->fw != NULL)
752 return 0;
753
754 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
755 if (WARN_ON(ar->hw.fw.fw == NULL))
756 return -EINVAL;
757
758 snprintf(filename, sizeof(filename), "%s/%s",
759 ar->hw.fw.dir, ar->hw.fw.fw);
760
761 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
762 if (ret) {
763 ath6kl_err("Failed to get firmware file %s: %d\n",
764 filename, ret);
765 return ret;
766 }
767
768 return 0;
769 }
770
771 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
772 {
773 char filename[100];
774 int ret;
775
776 if (ar->fw_patch != NULL)
777 return 0;
778
779 if (ar->hw.fw.patch == NULL)
780 return 0;
781
782 snprintf(filename, sizeof(filename), "%s/%s",
783 ar->hw.fw.dir, ar->hw.fw.patch);
784
785 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
786 &ar->fw_patch_len);
787 if (ret) {
788 ath6kl_err("Failed to get patch file %s: %d\n",
789 filename, ret);
790 return ret;
791 }
792
793 return 0;
794 }
795
796 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
797 {
798 char filename[100];
799 int ret;
800
801 if (ar->testmode != 2)
802 return 0;
803
804 if (ar->fw_testscript != NULL)
805 return 0;
806
807 if (ar->hw.fw.testscript == NULL)
808 return 0;
809
810 snprintf(filename, sizeof(filename), "%s/%s",
811 ar->hw.fw.dir, ar->hw.fw.testscript);
812
813 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
814 &ar->fw_testscript_len);
815 if (ret) {
816 ath6kl_err("Failed to get testscript file %s: %d\n",
817 filename, ret);
818 return ret;
819 }
820
821 return 0;
822 }
823
824 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
825 {
826 int ret;
827
828 ret = ath6kl_fetch_otp_file(ar);
829 if (ret)
830 return ret;
831
832 ret = ath6kl_fetch_fw_file(ar);
833 if (ret)
834 return ret;
835
836 ret = ath6kl_fetch_patch_file(ar);
837 if (ret)
838 return ret;
839
840 ret = ath6kl_fetch_testscript_file(ar);
841 if (ret)
842 return ret;
843
844 return 0;
845 }
846
847 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
848 {
849 size_t magic_len, len, ie_len;
850 const struct firmware *fw;
851 struct ath6kl_fw_ie *hdr;
852 char filename[100];
853 const u8 *data;
854 int ret, ie_id, i, index, bit;
855 __le32 *val;
856
857 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
858
859 ret = request_firmware(&fw, filename, ar->dev);
860 if (ret)
861 return ret;
862
863 data = fw->data;
864 len = fw->size;
865
866 /* magic also includes the null byte, check that as well */
867 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
868
869 if (len < magic_len) {
870 ret = -EINVAL;
871 goto out;
872 }
873
874 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
875 ret = -EINVAL;
876 goto out;
877 }
878
879 len -= magic_len;
880 data += magic_len;
881
882 /* loop elements */
883 while (len > sizeof(struct ath6kl_fw_ie)) {
884 /* hdr is unaligned! */
885 hdr = (struct ath6kl_fw_ie *) data;
886
887 ie_id = le32_to_cpup(&hdr->id);
888 ie_len = le32_to_cpup(&hdr->len);
889
890 len -= sizeof(*hdr);
891 data += sizeof(*hdr);
892
893 if (len < ie_len) {
894 ret = -EINVAL;
895 goto out;
896 }
897
898 switch (ie_id) {
899 case ATH6KL_FW_IE_OTP_IMAGE:
900 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
901 ie_len);
902
903 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
904
905 if (ar->fw_otp == NULL) {
906 ret = -ENOMEM;
907 goto out;
908 }
909
910 ar->fw_otp_len = ie_len;
911 break;
912 case ATH6KL_FW_IE_FW_IMAGE:
913 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
914 ie_len);
915
916 /* in testmode we already might have a fw file */
917 if (ar->fw != NULL)
918 break;
919
920 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
921
922 if (ar->fw == NULL) {
923 ret = -ENOMEM;
924 goto out;
925 }
926
927 ar->fw_len = ie_len;
928 break;
929 case ATH6KL_FW_IE_PATCH_IMAGE:
930 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
931 ie_len);
932
933 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
934
935 if (ar->fw_patch == NULL) {
936 ret = -ENOMEM;
937 goto out;
938 }
939
940 ar->fw_patch_len = ie_len;
941 break;
942 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
943 val = (__le32 *) data;
944 ar->hw.reserved_ram_size = le32_to_cpup(val);
945
946 ath6kl_dbg(ATH6KL_DBG_BOOT,
947 "found reserved ram size ie 0x%d\n",
948 ar->hw.reserved_ram_size);
949 break;
950 case ATH6KL_FW_IE_CAPABILITIES:
951 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
952 break;
953
954 ath6kl_dbg(ATH6KL_DBG_BOOT,
955 "found firmware capabilities ie (%zd B)\n",
956 ie_len);
957
958 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
959 index = i / 8;
960 bit = i % 8;
961
962 if (data[index] & (1 << bit))
963 __set_bit(i, ar->fw_capabilities);
964 }
965
966 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
967 ar->fw_capabilities,
968 sizeof(ar->fw_capabilities));
969 break;
970 case ATH6KL_FW_IE_PATCH_ADDR:
971 if (ie_len != sizeof(*val))
972 break;
973
974 val = (__le32 *) data;
975 ar->hw.dataset_patch_addr = le32_to_cpup(val);
976
977 ath6kl_dbg(ATH6KL_DBG_BOOT,
978 "found patch address ie 0x%x\n",
979 ar->hw.dataset_patch_addr);
980 break;
981 case ATH6KL_FW_IE_BOARD_ADDR:
982 if (ie_len != sizeof(*val))
983 break;
984
985 val = (__le32 *) data;
986 ar->hw.board_addr = le32_to_cpup(val);
987
988 ath6kl_dbg(ATH6KL_DBG_BOOT,
989 "found board address ie 0x%x\n",
990 ar->hw.board_addr);
991 break;
992 case ATH6KL_FW_IE_VIF_MAX:
993 if (ie_len != sizeof(*val))
994 break;
995
996 val = (__le32 *) data;
997 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
998 ATH6KL_VIF_MAX);
999
1000 if (ar->vif_max > 1 && !ar->p2p)
1001 ar->max_norm_iface = 2;
1002
1003 ath6kl_dbg(ATH6KL_DBG_BOOT,
1004 "found vif max ie %d\n", ar->vif_max);
1005 break;
1006 default:
1007 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1008 le32_to_cpup(&hdr->id));
1009 break;
1010 }
1011
1012 len -= ie_len;
1013 data += ie_len;
1014 };
1015
1016 ret = 0;
1017 out:
1018 release_firmware(fw);
1019
1020 return ret;
1021 }
1022
1023 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1024 {
1025 int ret;
1026
1027 ret = ath6kl_fetch_board_file(ar);
1028 if (ret)
1029 return ret;
1030
1031 ret = ath6kl_fetch_testmode_file(ar);
1032 if (ret)
1033 return ret;
1034
1035 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1036 if (ret == 0) {
1037 ar->fw_api = 3;
1038 goto out;
1039 }
1040
1041 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1042 if (ret == 0) {
1043 ar->fw_api = 2;
1044 goto out;
1045 }
1046
1047 ret = ath6kl_fetch_fw_api1(ar);
1048 if (ret)
1049 return ret;
1050
1051 ar->fw_api = 1;
1052
1053 out:
1054 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1055
1056 return 0;
1057 }
1058
1059 static int ath6kl_upload_board_file(struct ath6kl *ar)
1060 {
1061 u32 board_address, board_ext_address, param;
1062 u32 board_data_size, board_ext_data_size;
1063 int ret;
1064
1065 if (WARN_ON(ar->fw_board == NULL))
1066 return -ENOENT;
1067
1068 /*
1069 * Determine where in Target RAM to write Board Data.
1070 * For AR6004, host determine Target RAM address for
1071 * writing board data.
1072 */
1073 if (ar->hw.board_addr != 0) {
1074 ath6kl_bmi_write_hi32(ar, hi_board_data,
1075 ar->hw.board_addr);
1076 } else {
1077 ath6kl_bmi_read(ar,
1078 ath6kl_get_hi_item_addr(ar,
1079 HI_ITEM(hi_board_data)),
1080 (u8 *) &board_address, 4);
1081 }
1082
1083 /* determine where in target ram to write extended board data */
1084 ath6kl_bmi_read(ar,
1085 ath6kl_get_hi_item_addr(ar,
1086 HI_ITEM(hi_board_ext_data)),
1087 (u8 *) &board_ext_address, 4);
1088
1089 if (ar->target_type == TARGET_TYPE_AR6003 &&
1090 board_ext_address == 0) {
1091 ath6kl_err("Failed to get board file target address.\n");
1092 return -EINVAL;
1093 }
1094
1095 switch (ar->target_type) {
1096 case TARGET_TYPE_AR6003:
1097 board_data_size = AR6003_BOARD_DATA_SZ;
1098 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1099 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1100 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1101 break;
1102 case TARGET_TYPE_AR6004:
1103 board_data_size = AR6004_BOARD_DATA_SZ;
1104 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1105 break;
1106 default:
1107 WARN_ON(1);
1108 return -EINVAL;
1109 break;
1110 }
1111
1112 if (board_ext_address &&
1113 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1114
1115 /* write extended board data */
1116 ath6kl_dbg(ATH6KL_DBG_BOOT,
1117 "writing extended board data to 0x%x (%d B)\n",
1118 board_ext_address, board_ext_data_size);
1119
1120 ret = ath6kl_bmi_write(ar, board_ext_address,
1121 ar->fw_board + board_data_size,
1122 board_ext_data_size);
1123 if (ret) {
1124 ath6kl_err("Failed to write extended board data: %d\n",
1125 ret);
1126 return ret;
1127 }
1128
1129 /* record that extended board data is initialized */
1130 param = (board_ext_data_size << 16) | 1;
1131
1132 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1133 }
1134
1135 if (ar->fw_board_len < board_data_size) {
1136 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1137 ret = -EINVAL;
1138 return ret;
1139 }
1140
1141 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1142 board_address, board_data_size);
1143
1144 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1145 board_data_size);
1146
1147 if (ret) {
1148 ath6kl_err("Board file bmi write failed: %d\n", ret);
1149 return ret;
1150 }
1151
1152 /* record the fact that Board Data IS initialized */
1153 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1154
1155 return ret;
1156 }
1157
1158 static int ath6kl_upload_otp(struct ath6kl *ar)
1159 {
1160 u32 address, param;
1161 bool from_hw = false;
1162 int ret;
1163
1164 if (ar->fw_otp == NULL)
1165 return 0;
1166
1167 address = ar->hw.app_load_addr;
1168
1169 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1170 ar->fw_otp_len);
1171
1172 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1173 ar->fw_otp_len);
1174 if (ret) {
1175 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1176 return ret;
1177 }
1178
1179 /* read firmware start address */
1180 ret = ath6kl_bmi_read(ar,
1181 ath6kl_get_hi_item_addr(ar,
1182 HI_ITEM(hi_app_start)),
1183 (u8 *) &address, sizeof(address));
1184
1185 if (ret) {
1186 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1187 return ret;
1188 }
1189
1190 if (ar->hw.app_start_override_addr == 0) {
1191 ar->hw.app_start_override_addr = address;
1192 from_hw = true;
1193 }
1194
1195 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1196 from_hw ? " (from hw)" : "",
1197 ar->hw.app_start_override_addr);
1198
1199 /* execute the OTP code */
1200 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1201 ar->hw.app_start_override_addr);
1202 param = 0;
1203 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1204
1205 return ret;
1206 }
1207
1208 static int ath6kl_upload_firmware(struct ath6kl *ar)
1209 {
1210 u32 address;
1211 int ret;
1212
1213 if (WARN_ON(ar->fw == NULL))
1214 return 0;
1215
1216 address = ar->hw.app_load_addr;
1217
1218 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1219 address, ar->fw_len);
1220
1221 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1222
1223 if (ret) {
1224 ath6kl_err("Failed to write firmware: %d\n", ret);
1225 return ret;
1226 }
1227
1228 /*
1229 * Set starting address for firmware
1230 * Don't need to setup app_start override addr on AR6004
1231 */
1232 if (ar->target_type != TARGET_TYPE_AR6004) {
1233 address = ar->hw.app_start_override_addr;
1234 ath6kl_bmi_set_app_start(ar, address);
1235 }
1236 return ret;
1237 }
1238
1239 static int ath6kl_upload_patch(struct ath6kl *ar)
1240 {
1241 u32 address;
1242 int ret;
1243
1244 if (ar->fw_patch == NULL)
1245 return 0;
1246
1247 address = ar->hw.dataset_patch_addr;
1248
1249 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1250 address, ar->fw_patch_len);
1251
1252 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1253 if (ret) {
1254 ath6kl_err("Failed to write patch file: %d\n", ret);
1255 return ret;
1256 }
1257
1258 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1259
1260 return 0;
1261 }
1262
1263 static int ath6kl_upload_testscript(struct ath6kl *ar)
1264 {
1265 u32 address;
1266 int ret;
1267
1268 if (ar->testmode != 2)
1269 return 0;
1270
1271 if (ar->fw_testscript == NULL)
1272 return 0;
1273
1274 address = ar->hw.testscript_addr;
1275
1276 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1277 address, ar->fw_testscript_len);
1278
1279 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1280 ar->fw_testscript_len);
1281 if (ret) {
1282 ath6kl_err("Failed to write testscript file: %d\n", ret);
1283 return ret;
1284 }
1285
1286 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1287 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1288 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1289
1290 return 0;
1291 }
1292
1293 static int ath6kl_init_upload(struct ath6kl *ar)
1294 {
1295 u32 param, options, sleep, address;
1296 int status = 0;
1297
1298 if (ar->target_type != TARGET_TYPE_AR6003 &&
1299 ar->target_type != TARGET_TYPE_AR6004)
1300 return -EINVAL;
1301
1302 /* temporarily disable system sleep */
1303 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1304 status = ath6kl_bmi_reg_read(ar, address, &param);
1305 if (status)
1306 return status;
1307
1308 options = param;
1309
1310 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1311 status = ath6kl_bmi_reg_write(ar, address, param);
1312 if (status)
1313 return status;
1314
1315 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1316 status = ath6kl_bmi_reg_read(ar, address, &param);
1317 if (status)
1318 return status;
1319
1320 sleep = param;
1321
1322 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1323 status = ath6kl_bmi_reg_write(ar, address, param);
1324 if (status)
1325 return status;
1326
1327 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1328 options, sleep);
1329
1330 /* program analog PLL register */
1331 /* no need to control 40/44MHz clock on AR6004 */
1332 if (ar->target_type != TARGET_TYPE_AR6004) {
1333 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1334 0xF9104001);
1335
1336 if (status)
1337 return status;
1338
1339 /* Run at 80/88MHz by default */
1340 param = SM(CPU_CLOCK_STANDARD, 1);
1341
1342 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1343 status = ath6kl_bmi_reg_write(ar, address, param);
1344 if (status)
1345 return status;
1346 }
1347
1348 param = 0;
1349 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1350 param = SM(LPO_CAL_ENABLE, 1);
1351 status = ath6kl_bmi_reg_write(ar, address, param);
1352 if (status)
1353 return status;
1354
1355 /* WAR to avoid SDIO CRC err */
1356 if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1357 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
1358 ath6kl_err("temporary war to avoid sdio crc error\n");
1359
1360 param = 0x20;
1361
1362 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1363 status = ath6kl_bmi_reg_write(ar, address, param);
1364 if (status)
1365 return status;
1366
1367 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1368 status = ath6kl_bmi_reg_write(ar, address, param);
1369 if (status)
1370 return status;
1371
1372 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1373 status = ath6kl_bmi_reg_write(ar, address, param);
1374 if (status)
1375 return status;
1376
1377 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1378 status = ath6kl_bmi_reg_write(ar, address, param);
1379 if (status)
1380 return status;
1381 }
1382
1383 /* write EEPROM data to Target RAM */
1384 status = ath6kl_upload_board_file(ar);
1385 if (status)
1386 return status;
1387
1388 /* transfer One time Programmable data */
1389 status = ath6kl_upload_otp(ar);
1390 if (status)
1391 return status;
1392
1393 /* Download Target firmware */
1394 status = ath6kl_upload_firmware(ar);
1395 if (status)
1396 return status;
1397
1398 status = ath6kl_upload_patch(ar);
1399 if (status)
1400 return status;
1401
1402 /* Download the test script */
1403 status = ath6kl_upload_testscript(ar);
1404 if (status)
1405 return status;
1406
1407 /* Restore system sleep */
1408 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1409 status = ath6kl_bmi_reg_write(ar, address, sleep);
1410 if (status)
1411 return status;
1412
1413 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1414 param = options | 0x20;
1415 status = ath6kl_bmi_reg_write(ar, address, param);
1416 if (status)
1417 return status;
1418
1419 return status;
1420 }
1421
1422 int ath6kl_init_hw_params(struct ath6kl *ar)
1423 {
1424 const struct ath6kl_hw *uninitialized_var(hw);
1425 int i;
1426
1427 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1428 hw = &hw_list[i];
1429
1430 if (hw->id == ar->version.target_ver)
1431 break;
1432 }
1433
1434 if (i == ARRAY_SIZE(hw_list)) {
1435 ath6kl_err("Unsupported hardware version: 0x%x\n",
1436 ar->version.target_ver);
1437 return -EINVAL;
1438 }
1439
1440 ar->hw = *hw;
1441
1442 ath6kl_dbg(ATH6KL_DBG_BOOT,
1443 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1444 ar->version.target_ver, ar->target_type,
1445 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1446 ath6kl_dbg(ATH6KL_DBG_BOOT,
1447 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1448 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1449 ar->hw.reserved_ram_size);
1450 ath6kl_dbg(ATH6KL_DBG_BOOT,
1451 "refclk_hz %d uarttx_pin %d",
1452 ar->hw.refclk_hz, ar->hw.uarttx_pin);
1453
1454 return 0;
1455 }
1456
1457 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1458 {
1459 switch (type) {
1460 case ATH6KL_HIF_TYPE_SDIO:
1461 return "sdio";
1462 case ATH6KL_HIF_TYPE_USB:
1463 return "usb";
1464 }
1465
1466 return NULL;
1467 }
1468
1469 int ath6kl_init_hw_start(struct ath6kl *ar)
1470 {
1471 long timeleft;
1472 int ret, i;
1473
1474 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1475
1476 ret = ath6kl_hif_power_on(ar);
1477 if (ret)
1478 return ret;
1479
1480 ret = ath6kl_configure_target(ar);
1481 if (ret)
1482 goto err_power_off;
1483
1484 ret = ath6kl_init_upload(ar);
1485 if (ret)
1486 goto err_power_off;
1487
1488 /* Do we need to finish the BMI phase */
1489 /* FIXME: return error from ath6kl_bmi_done() */
1490 if (ath6kl_bmi_done(ar)) {
1491 ret = -EIO;
1492 goto err_power_off;
1493 }
1494
1495 /*
1496 * The reason we have to wait for the target here is that the
1497 * driver layer has to init BMI in order to set the host block
1498 * size.
1499 */
1500 if (ath6kl_htc_wait_target(ar->htc_target)) {
1501 ret = -EIO;
1502 goto err_power_off;
1503 }
1504
1505 if (ath6kl_init_service_ep(ar)) {
1506 ret = -EIO;
1507 goto err_cleanup_scatter;
1508 }
1509
1510 /* setup credit distribution */
1511 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1512
1513 /* start HTC */
1514 ret = ath6kl_htc_start(ar->htc_target);
1515 if (ret) {
1516 /* FIXME: call this */
1517 ath6kl_cookie_cleanup(ar);
1518 goto err_cleanup_scatter;
1519 }
1520
1521 /* Wait for Wmi event to be ready */
1522 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1523 test_bit(WMI_READY,
1524 &ar->flag),
1525 WMI_TIMEOUT);
1526
1527 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1528
1529
1530 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1531 ath6kl_info("%s %s fw %s api %d%s\n",
1532 ar->hw.name,
1533 ath6kl_init_get_hif_name(ar->hif_type),
1534 ar->wiphy->fw_version,
1535 ar->fw_api,
1536 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1537 }
1538
1539 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1540 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1541 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1542 ret = -EIO;
1543 goto err_htc_stop;
1544 }
1545
1546 if (!timeleft || signal_pending(current)) {
1547 ath6kl_err("wmi is not ready or wait was interrupted\n");
1548 ret = -EIO;
1549 goto err_htc_stop;
1550 }
1551
1552 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1553
1554 /* communicate the wmi protocol verision to the target */
1555 /* FIXME: return error */
1556 if ((ath6kl_set_host_app_area(ar)) != 0)
1557 ath6kl_err("unable to set the host app area\n");
1558
1559 for (i = 0; i < ar->vif_max; i++) {
1560 ret = ath6kl_target_config_wlan_params(ar, i);
1561 if (ret)
1562 goto err_htc_stop;
1563 }
1564
1565 ar->state = ATH6KL_STATE_ON;
1566
1567 return 0;
1568
1569 err_htc_stop:
1570 ath6kl_htc_stop(ar->htc_target);
1571 err_cleanup_scatter:
1572 ath6kl_hif_cleanup_scatter(ar);
1573 err_power_off:
1574 ath6kl_hif_power_off(ar);
1575
1576 return ret;
1577 }
1578
1579 int ath6kl_init_hw_stop(struct ath6kl *ar)
1580 {
1581 int ret;
1582
1583 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1584
1585 ath6kl_htc_stop(ar->htc_target);
1586
1587 ath6kl_hif_stop(ar);
1588
1589 ath6kl_bmi_reset(ar);
1590
1591 ret = ath6kl_hif_power_off(ar);
1592 if (ret)
1593 ath6kl_warn("failed to power off hif: %d\n", ret);
1594
1595 ar->state = ATH6KL_STATE_OFF;
1596
1597 return 0;
1598 }
1599
1600 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
1601 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
1602 {
1603 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1604 bool discon_issued;
1605
1606 netif_stop_queue(vif->ndev);
1607
1608 clear_bit(WLAN_ENABLED, &vif->flags);
1609
1610 if (wmi_ready) {
1611 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1612 test_bit(CONNECT_PEND, &vif->flags);
1613 ath6kl_disconnect(vif);
1614 del_timer(&vif->disconnect_timer);
1615
1616 if (discon_issued)
1617 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1618 (vif->nw_type & AP_NETWORK) ?
1619 bcast_mac : vif->bssid,
1620 0, NULL, 0);
1621 }
1622
1623 if (vif->scan_req) {
1624 cfg80211_scan_done(vif->scan_req, true);
1625 vif->scan_req = NULL;
1626 }
1627 }
1628
1629 void ath6kl_stop_txrx(struct ath6kl *ar)
1630 {
1631 struct ath6kl_vif *vif, *tmp_vif;
1632 int i;
1633
1634 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1635
1636 if (down_interruptible(&ar->sem)) {
1637 ath6kl_err("down_interruptible failed\n");
1638 return;
1639 }
1640
1641 for (i = 0; i < AP_MAX_NUM_STA; i++)
1642 aggr_reset_state(ar->sta_list[i].aggr_conn);
1643
1644 spin_lock_bh(&ar->list_lock);
1645 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1646 list_del(&vif->list);
1647 spin_unlock_bh(&ar->list_lock);
1648 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1649 rtnl_lock();
1650 ath6kl_cfg80211_vif_cleanup(vif);
1651 rtnl_unlock();
1652 spin_lock_bh(&ar->list_lock);
1653 }
1654 spin_unlock_bh(&ar->list_lock);
1655
1656 clear_bit(WMI_READY, &ar->flag);
1657
1658 /*
1659 * After wmi_shudown all WMI events will be dropped. We
1660 * need to cleanup the buffers allocated in AP mode and
1661 * give disconnect notification to stack, which usually
1662 * happens in the disconnect_event. Simulate the disconnect
1663 * event by calling the function directly. Sometimes
1664 * disconnect_event will be received when the debug logs
1665 * are collected.
1666 */
1667 ath6kl_wmi_shutdown(ar->wmi);
1668
1669 clear_bit(WMI_ENABLED, &ar->flag);
1670 if (ar->htc_target) {
1671 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1672 ath6kl_htc_stop(ar->htc_target);
1673 }
1674
1675 /*
1676 * Try to reset the device if we can. The driver may have been
1677 * configure NOT to reset the target during a debug session.
1678 */
1679 ath6kl_dbg(ATH6KL_DBG_TRC,
1680 "attempting to reset target on instance destroy\n");
1681 ath6kl_reset_device(ar, ar->target_type, true, true);
1682
1683 clear_bit(WLAN_ENABLED, &ar->flag);
1684
1685 up(&ar->sem);
1686 }
1687 EXPORT_SYMBOL(ath6kl_stop_txrx);