2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 /*************************************\
20 * Attach/Detach Functions and helpers *
21 \*************************************/
23 #include <linux/pci.h>
30 * ath5k_hw_post - Power On Self Test helper function
32 * @ah: The &struct ath5k_hw
34 static int ath5k_hw_post(struct ath5k_hw
*ah
)
37 static const u32 static_pattern
[4] = {
38 0x55555555, 0xaaaaaaaa,
39 0x66666666, 0x99999999
41 static const u16 regs
[2] = { AR5K_STA_ID0
, AR5K_PHY(8) };
48 for (c
= 0; c
< 2; c
++) {
52 /* Save previous value */
53 init_val
= ath5k_hw_reg_read(ah
, cur_reg
);
55 for (i
= 0; i
< 256; i
++) {
56 var_pattern
= i
<< 16 | i
;
57 ath5k_hw_reg_write(ah
, var_pattern
, cur_reg
);
58 cur_val
= ath5k_hw_reg_read(ah
, cur_reg
);
60 if (cur_val
!= var_pattern
) {
61 ATH5K_ERR(ah
->ah_sc
, "POST Failed !!!\n");
65 /* Found on ndiswrapper dumps */
66 var_pattern
= 0x0039080f;
67 ath5k_hw_reg_write(ah
, var_pattern
, cur_reg
);
70 for (i
= 0; i
< 4; i
++) {
71 var_pattern
= static_pattern
[i
];
72 ath5k_hw_reg_write(ah
, var_pattern
, cur_reg
);
73 cur_val
= ath5k_hw_reg_read(ah
, cur_reg
);
75 if (cur_val
!= var_pattern
) {
76 ATH5K_ERR(ah
->ah_sc
, "POST Failed !!!\n");
80 /* Found on ndiswrapper dumps */
81 var_pattern
= 0x003b080f;
82 ath5k_hw_reg_write(ah
, var_pattern
, cur_reg
);
85 /* Restore previous value */
86 ath5k_hw_reg_write(ah
, init_val
, cur_reg
);
95 * ath5k_hw_attach - Check if hw is supported and init the needed structs
97 * @sc: The &struct ath5k_softc we got from the driver's attach function
98 * @mac_version: The mac version id (check out ath5k.h) based on pci id
100 * Check if the device is supported, perform a POST and initialize the needed
101 * structs. Returns -ENOMEM if we don't have memory for the needed structs,
102 * -ENODEV if the device is not supported or prints an error msg if something
105 struct ath5k_hw
*ath5k_hw_attach(struct ath5k_softc
*sc
, u8 mac_version
)
108 struct pci_dev
*pdev
= sc
->pdev
;
112 /*If we passed the test malloc a ath5k_hw struct*/
113 ah
= kzalloc(sizeof(struct ath5k_hw
), GFP_KERNEL
);
116 ATH5K_ERR(sc
, "out of memory\n");
121 ah
->ah_iobase
= sc
->iobase
;
126 ah
->ah_op_mode
= NL80211_IFTYPE_STATION
;
127 ah
->ah_radar
.r_enabled
= AR5K_TUNE_RADAR_ALERT
;
128 ah
->ah_turbo
= false;
129 ah
->ah_txpower
.txp_tpc
= AR5K_TUNE_TPC_TXPOWER
;
131 ah
->ah_atim_window
= 0;
132 ah
->ah_aifs
= AR5K_TUNE_AIFS
;
133 ah
->ah_cw_min
= AR5K_TUNE_CWMIN
;
134 ah
->ah_limit_tx_retries
= AR5K_INIT_TX_RETRY
;
135 ah
->ah_software_retry
= false;
138 * Set the mac version based on the pci id
140 ah
->ah_version
= mac_version
;
142 /*Fill the ath5k_hw struct with the needed functions*/
143 ret
= ath5k_hw_init_desc_functions(ah
);
147 /* Bring device out of sleep and reset it's units */
148 ret
= ath5k_hw_nic_wakeup(ah
, CHANNEL_B
, true);
152 /* Get MAC, PHY and RADIO revisions */
153 srev
= ath5k_hw_reg_read(ah
, AR5K_SREV
);
154 ah
->ah_mac_srev
= srev
;
155 ah
->ah_mac_version
= AR5K_REG_MS(srev
, AR5K_SREV_VER
);
156 ah
->ah_mac_revision
= AR5K_REG_MS(srev
, AR5K_SREV_REV
);
157 ah
->ah_phy_revision
= ath5k_hw_reg_read(ah
, AR5K_PHY_CHIP_ID
) &
159 ah
->ah_radio_5ghz_revision
= ath5k_hw_radio_revision(ah
,
161 ah
->ah_phy
= AR5K_PHY(0);
163 /* Try to identify radio chip based on it's srev */
164 switch (ah
->ah_radio_5ghz_revision
& 0xf0) {
165 case AR5K_SREV_RAD_5111
:
166 ah
->ah_radio
= AR5K_RF5111
;
167 ah
->ah_single_chip
= false;
168 ah
->ah_radio_2ghz_revision
= ath5k_hw_radio_revision(ah
,
171 case AR5K_SREV_RAD_5112
:
172 case AR5K_SREV_RAD_2112
:
173 ah
->ah_radio
= AR5K_RF5112
;
174 ah
->ah_single_chip
= false;
175 ah
->ah_radio_2ghz_revision
= ath5k_hw_radio_revision(ah
,
178 case AR5K_SREV_RAD_2413
:
179 ah
->ah_radio
= AR5K_RF2413
;
180 ah
->ah_single_chip
= true;
182 case AR5K_SREV_RAD_5413
:
183 ah
->ah_radio
= AR5K_RF5413
;
184 ah
->ah_single_chip
= true;
186 case AR5K_SREV_RAD_2316
:
187 ah
->ah_radio
= AR5K_RF2316
;
188 ah
->ah_single_chip
= true;
190 case AR5K_SREV_RAD_2317
:
191 ah
->ah_radio
= AR5K_RF2317
;
192 ah
->ah_single_chip
= true;
194 case AR5K_SREV_RAD_5424
:
195 if (ah
->ah_mac_version
== AR5K_SREV_AR2425
||
196 ah
->ah_mac_version
== AR5K_SREV_AR2417
){
197 ah
->ah_radio
= AR5K_RF2425
;
198 ah
->ah_single_chip
= true;
200 ah
->ah_radio
= AR5K_RF5413
;
201 ah
->ah_single_chip
= true;
205 /* Identify radio based on mac/phy srev */
206 if (ah
->ah_version
== AR5K_AR5210
) {
207 ah
->ah_radio
= AR5K_RF5110
;
208 ah
->ah_single_chip
= false;
209 } else if (ah
->ah_version
== AR5K_AR5211
) {
210 ah
->ah_radio
= AR5K_RF5111
;
211 ah
->ah_single_chip
= false;
212 ah
->ah_radio_2ghz_revision
= ath5k_hw_radio_revision(ah
,
214 } else if (ah
->ah_mac_version
== (AR5K_SREV_AR2425
>> 4) ||
215 ah
->ah_mac_version
== (AR5K_SREV_AR2417
>> 4) ||
216 ah
->ah_phy_revision
== AR5K_SREV_PHY_2425
) {
217 ah
->ah_radio
= AR5K_RF2425
;
218 ah
->ah_single_chip
= true;
219 ah
->ah_radio_5ghz_revision
= AR5K_SREV_RAD_2425
;
220 } else if (srev
== AR5K_SREV_AR5213A
&&
221 ah
->ah_phy_revision
== AR5K_SREV_PHY_5212B
) {
222 ah
->ah_radio
= AR5K_RF5112
;
223 ah
->ah_single_chip
= false;
224 ah
->ah_radio_5ghz_revision
= AR5K_SREV_RAD_5112B
;
225 } else if (ah
->ah_mac_version
== (AR5K_SREV_AR2415
>> 4)) {
226 ah
->ah_radio
= AR5K_RF2316
;
227 ah
->ah_single_chip
= true;
228 ah
->ah_radio_5ghz_revision
= AR5K_SREV_RAD_2316
;
229 } else if (ah
->ah_mac_version
== (AR5K_SREV_AR5414
>> 4) ||
230 ah
->ah_phy_revision
== AR5K_SREV_PHY_5413
) {
231 ah
->ah_radio
= AR5K_RF5413
;
232 ah
->ah_single_chip
= true;
233 ah
->ah_radio_5ghz_revision
= AR5K_SREV_RAD_5413
;
234 } else if (ah
->ah_mac_version
== (AR5K_SREV_AR2414
>> 4) ||
235 ah
->ah_phy_revision
== AR5K_SREV_PHY_2413
) {
236 ah
->ah_radio
= AR5K_RF2413
;
237 ah
->ah_single_chip
= true;
238 ah
->ah_radio_5ghz_revision
= AR5K_SREV_RAD_2413
;
240 ATH5K_ERR(sc
, "Couldn't identify radio revision.\n");
247 /* Return on unsuported chips (unsupported eeprom etc) */
248 if ((srev
>= AR5K_SREV_AR5416
) &&
249 (srev
< AR5K_SREV_AR2425
)) {
250 ATH5K_ERR(sc
, "Device not yet supported.\n");
258 ret
= ath5k_hw_post(ah
);
262 /* Enable pci core retry fix on Hainan (5213A) and later chips */
263 if (srev
>= AR5K_SREV_AR5213A
)
264 ath5k_hw_reg_write(ah
, AR5K_PCICFG_RETRY_FIX
, AR5K_PCICFG
);
267 * Get card capabilities, calibration values etc
270 ret
= ath5k_eeprom_init(ah
);
272 ATH5K_ERR(sc
, "unable to init EEPROM\n");
277 * Write PCI-E power save settings
279 if ((ah
->ah_version
== AR5K_AR5212
) && (pdev
->is_pcie
)) {
280 struct ath5k_eeprom_info
*ee
= &ah
->ah_capabilities
.cap_eeprom
;
282 ath5k_hw_reg_write(ah
, 0x9248fc00, AR5K_PCIE_SERDES
);
283 ath5k_hw_reg_write(ah
, 0x24924924, AR5K_PCIE_SERDES
);
285 /* Shut off RX when elecidle is asserted */
286 ath5k_hw_reg_write(ah
, 0x28000039, AR5K_PCIE_SERDES
);
287 ath5k_hw_reg_write(ah
, 0x53160824, AR5K_PCIE_SERDES
);
289 /* If serdes programing is enabled, increase PCI-E
290 * tx power for systems with long trace from host
291 * to minicard connector. */
293 ath5k_hw_reg_write(ah
, 0xe5980579, AR5K_PCIE_SERDES
);
295 ath5k_hw_reg_write(ah
, 0xf6800579, AR5K_PCIE_SERDES
);
297 /* Shut off PLL and CLKREQ active in L1 */
298 ath5k_hw_reg_write(ah
, 0x001defff, AR5K_PCIE_SERDES
);
300 /* Preserve other settings */
301 ath5k_hw_reg_write(ah
, 0x1aaabe40, AR5K_PCIE_SERDES
);
302 ath5k_hw_reg_write(ah
, 0xbe105554, AR5K_PCIE_SERDES
);
303 ath5k_hw_reg_write(ah
, 0x000e3007, AR5K_PCIE_SERDES
);
305 /* Reset SERDES to load new settings */
306 ath5k_hw_reg_write(ah
, 0x00000000, AR5K_PCIE_SERDES_RESET
);
310 /* Get misc capabilities */
311 ret
= ath5k_hw_set_capabilities(ah
);
313 ATH5K_ERR(sc
, "unable to get device capabilities: 0x%04x\n",
318 if (srev
>= AR5K_SREV_AR2414
) {
319 ah
->ah_combined_mic
= true;
320 AR5K_REG_ENABLE_BITS(ah
, AR5K_MISC_MODE
,
321 AR5K_MISC_MODE_COMBINED_MIC
);
324 /* MAC address is cleared until add_interface */
325 ath5k_hw_set_lladdr(ah
, (u8
[ETH_ALEN
]){});
327 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
328 memset(ah
->ah_bssid
, 0xff, ETH_ALEN
);
329 ath5k_hw_set_associd(ah
, ah
->ah_bssid
, 0);
330 ath5k_hw_set_opmode(ah
);
332 ath5k_hw_rfgain_opt_init(ah
);
334 /* turn on HW LEDs */
335 ath5k_hw_set_ledstate(ah
, AR5K_LED_INIT
);
345 * ath5k_hw_detach - Free the ath5k_hw struct
347 * @ah: The &struct ath5k_hw
349 void ath5k_hw_detach(struct ath5k_hw
*ah
)
351 ATH5K_TRACE(ah
->ah_sc
);
353 __set_bit(ATH_STAT_INVALID
, ah
->ah_sc
->status
);
355 if (ah
->ah_rf_banks
!= NULL
)
356 kfree(ah
->ah_rf_banks
);
358 ath5k_eeprom_detach(ah
);
360 /* assume interrupts are down */