1 /*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
25 Documentation available at:
26 http://www.stlinux.com
28 https://bugzilla.stlinux.com/
29 *******************************************************************************/
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
44 #include <linux/phy.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
49 #define STMMAC_RESOURCE_NAME "stmmaceth"
50 #define PHY_RESOURCE_NAME "stmmacphy"
53 /*#define STMMAC_DEBUG*/
55 #define DBG(nlevel, klevel, fmt, args...) \
56 ((void)(netif_msg_##nlevel(priv) && \
57 printk(KERN_##klevel fmt, ## args)))
59 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
62 #undef STMMAC_RX_DEBUG
63 /*#define STMMAC_RX_DEBUG*/
64 #ifdef STMMAC_RX_DEBUG
65 #define RX_DBG(fmt, args...) printk(fmt, ## args)
67 #define RX_DBG(fmt, args...) do { } while (0)
70 #undef STMMAC_XMIT_DEBUG
71 /*#define STMMAC_XMIT_DEBUG*/
72 #ifdef STMMAC_TX_DEBUG
73 #define TX_DBG(fmt, args...) printk(fmt, ## args)
75 #define TX_DBG(fmt, args...) do { } while (0)
78 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
79 #define JUMBO_LEN 9000
81 /* Module parameters */
82 #define TX_TIMEO 5000 /* default 5 seconds */
83 static int watchdog
= TX_TIMEO
;
84 module_param(watchdog
, int, S_IRUGO
| S_IWUSR
);
85 MODULE_PARM_DESC(watchdog
, "Transmit timeout in milliseconds");
87 static int debug
= -1; /* -1: default, 0: no output, 16: all */
88 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
89 MODULE_PARM_DESC(debug
, "Message Level (0: no output, 16: all)");
91 static int phyaddr
= -1;
92 module_param(phyaddr
, int, S_IRUGO
);
93 MODULE_PARM_DESC(phyaddr
, "Physical device address");
95 #define DMA_TX_SIZE 256
96 static int dma_txsize
= DMA_TX_SIZE
;
97 module_param(dma_txsize
, int, S_IRUGO
| S_IWUSR
);
98 MODULE_PARM_DESC(dma_txsize
, "Number of descriptors in the TX list");
100 #define DMA_RX_SIZE 256
101 static int dma_rxsize
= DMA_RX_SIZE
;
102 module_param(dma_rxsize
, int, S_IRUGO
| S_IWUSR
);
103 MODULE_PARM_DESC(dma_rxsize
, "Number of descriptors in the RX list");
105 static int flow_ctrl
= FLOW_OFF
;
106 module_param(flow_ctrl
, int, S_IRUGO
| S_IWUSR
);
107 MODULE_PARM_DESC(flow_ctrl
, "Flow control ability [on/off]");
109 static int pause
= PAUSE_TIME
;
110 module_param(pause
, int, S_IRUGO
| S_IWUSR
);
111 MODULE_PARM_DESC(pause
, "Flow Control Pause Time");
113 #define TC_DEFAULT 64
114 static int tc
= TC_DEFAULT
;
115 module_param(tc
, int, S_IRUGO
| S_IWUSR
);
116 MODULE_PARM_DESC(tc
, "DMA threshold control value");
118 #define RX_NO_COALESCE 1 /* Always interrupt on completion */
119 #define TX_NO_COALESCE -1 /* No moderation by default */
121 /* Pay attention to tune this parameter; take care of both
122 * hardware capability and network stabitily/performance impact.
123 * Many tests showed that ~4ms latency seems to be good enough. */
124 #ifdef CONFIG_STMMAC_TIMER
125 #define DEFAULT_PERIODIC_RATE 256
126 static int tmrate
= DEFAULT_PERIODIC_RATE
;
127 module_param(tmrate
, int, S_IRUGO
| S_IWUSR
);
128 MODULE_PARM_DESC(tmrate
, "External timer freq. (default: 256Hz)");
131 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
132 static int buf_sz
= DMA_BUFFER_SIZE
;
133 module_param(buf_sz
, int, S_IRUGO
| S_IWUSR
);
134 MODULE_PARM_DESC(buf_sz
, "DMA buffer size");
136 /* In case of Giga ETH, we can enable/disable the COE for the
137 * transmit HW checksum computation.
138 * Note that, if tx csum is off in HW, SG will be still supported. */
139 static int tx_coe
= HW_CSUM
;
140 module_param(tx_coe
, int, S_IRUGO
| S_IWUSR
);
141 MODULE_PARM_DESC(tx_coe
, "GMAC COE type 2 [on/off]");
143 static const u32 default_msg_level
= (NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
144 NETIF_MSG_LINK
| NETIF_MSG_IFUP
|
145 NETIF_MSG_IFDOWN
| NETIF_MSG_TIMER
);
147 static irqreturn_t
stmmac_interrupt(int irq
, void *dev_id
);
148 static netdev_tx_t
stmmac_xmit(struct sk_buff
*skb
, struct net_device
*dev
);
151 * stmmac_verify_args - verify the driver parameters.
152 * Description: it verifies if some wrong parameter is passed to the driver.
153 * Note that wrong parameters are replaced with the default values.
155 static void stmmac_verify_args(void)
157 if (unlikely(watchdog
< 0))
159 if (unlikely(dma_rxsize
< 0))
160 dma_rxsize
= DMA_RX_SIZE
;
161 if (unlikely(dma_txsize
< 0))
162 dma_txsize
= DMA_TX_SIZE
;
163 if (unlikely((buf_sz
< DMA_BUFFER_SIZE
) || (buf_sz
> BUF_SIZE_16KiB
)))
164 buf_sz
= DMA_BUFFER_SIZE
;
165 if (unlikely(flow_ctrl
> 1))
166 flow_ctrl
= FLOW_AUTO
;
167 else if (likely(flow_ctrl
< 0))
168 flow_ctrl
= FLOW_OFF
;
169 if (unlikely((pause
< 0) || (pause
> 0xffff)))
175 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
176 static void print_pkt(unsigned char *buf
, int len
)
179 pr_info("len = %d byte, buf addr: 0x%p", len
, buf
);
180 for (j
= 0; j
< len
; j
++) {
182 pr_info("\n %03x:", j
);
183 pr_info(" %02x", buf
[j
]);
190 /* minimum number of free TX descriptors required to wake up TX process */
191 #define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
193 static inline u32
stmmac_tx_avail(struct stmmac_priv
*priv
)
195 return priv
->dirty_tx
+ priv
->dma_tx_size
- priv
->cur_tx
- 1;
200 * @dev: net device structure
201 * Description: it adjusts the link parameters.
203 static void stmmac_adjust_link(struct net_device
*dev
)
205 struct stmmac_priv
*priv
= netdev_priv(dev
);
206 struct phy_device
*phydev
= priv
->phydev
;
207 unsigned long ioaddr
= dev
->base_addr
;
210 unsigned int fc
= priv
->flow_ctrl
, pause_time
= priv
->pause
;
215 DBG(probe
, DEBUG
, "stmmac_adjust_link: called. address %d link %d\n",
216 phydev
->addr
, phydev
->link
);
218 spin_lock_irqsave(&priv
->lock
, flags
);
220 u32 ctrl
= readl(ioaddr
+ MAC_CTRL_REG
);
222 /* Now we make sure that we can be in full duplex mode.
223 * If not, we operate in half-duplex mode. */
224 if (phydev
->duplex
!= priv
->oldduplex
) {
226 if (!(phydev
->duplex
))
227 ctrl
&= ~priv
->hw
->link
.duplex
;
229 ctrl
|= priv
->hw
->link
.duplex
;
230 priv
->oldduplex
= phydev
->duplex
;
232 /* Flow Control operation */
234 priv
->hw
->mac
->flow_ctrl(ioaddr
, phydev
->duplex
,
237 if (phydev
->speed
!= priv
->speed
) {
239 switch (phydev
->speed
) {
241 if (likely(priv
->is_gmac
))
242 ctrl
&= ~priv
->hw
->link
.port
;
247 ctrl
|= priv
->hw
->link
.port
;
248 if (phydev
->speed
== SPEED_100
) {
249 ctrl
|= priv
->hw
->link
.speed
;
251 ctrl
&= ~(priv
->hw
->link
.speed
);
254 ctrl
&= ~priv
->hw
->link
.port
;
256 if (likely(priv
->fix_mac_speed
))
257 priv
->fix_mac_speed(priv
->bsp_priv
,
261 if (netif_msg_link(priv
))
262 pr_warning("%s: Speed (%d) is not 10"
263 " or 100!\n", dev
->name
, phydev
->speed
);
267 priv
->speed
= phydev
->speed
;
270 writel(ctrl
, ioaddr
+ MAC_CTRL_REG
);
272 if (!priv
->oldlink
) {
276 } else if (priv
->oldlink
) {
280 priv
->oldduplex
= -1;
283 if (new_state
&& netif_msg_link(priv
))
284 phy_print_status(phydev
);
286 spin_unlock_irqrestore(&priv
->lock
, flags
);
288 DBG(probe
, DEBUG
, "stmmac_adjust_link: exiting\n");
292 * stmmac_init_phy - PHY initialization
293 * @dev: net device structure
294 * Description: it initializes the driver's PHY state, and attaches the PHY
299 static int stmmac_init_phy(struct net_device
*dev
)
301 struct stmmac_priv
*priv
= netdev_priv(dev
);
302 struct phy_device
*phydev
;
303 char phy_id
[MII_BUS_ID_SIZE
+ 3];
304 char bus_id
[MII_BUS_ID_SIZE
];
308 priv
->oldduplex
= -1;
310 if (priv
->phy_addr
== -1) {
311 /* We don't have a PHY, so do nothing */
315 snprintf(bus_id
, MII_BUS_ID_SIZE
, "%x", priv
->bus_id
);
316 snprintf(phy_id
, MII_BUS_ID_SIZE
+ 3, PHY_ID_FMT
, bus_id
,
318 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id
);
320 phydev
= phy_connect(dev
, phy_id
, &stmmac_adjust_link
, 0,
321 priv
->phy_interface
);
323 if (IS_ERR(phydev
)) {
324 pr_err("%s: Could not attach to PHY\n", dev
->name
);
325 return PTR_ERR(phydev
);
329 * Broken HW is sometimes missing the pull-up resistor on the
330 * MDIO line, which results in reads to non-existent devices returning
331 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
333 * Note: phydev->phy_id is the result of reading the UID PHY registers.
335 if (phydev
->phy_id
== 0) {
336 phy_disconnect(phydev
);
339 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
340 " Link = %d\n", dev
->name
, phydev
->phy_id
, phydev
->link
);
342 priv
->phydev
= phydev
;
347 static inline void stmmac_mac_enable_rx(unsigned long ioaddr
)
349 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
350 value
|= MAC_RNABLE_RX
;
351 /* Set the RE (receive enable bit into the MAC CTRL register). */
352 writel(value
, ioaddr
+ MAC_CTRL_REG
);
355 static inline void stmmac_mac_enable_tx(unsigned long ioaddr
)
357 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
358 value
|= MAC_ENABLE_TX
;
359 /* Set the TE (transmit enable bit into the MAC CTRL register). */
360 writel(value
, ioaddr
+ MAC_CTRL_REG
);
363 static inline void stmmac_mac_disable_rx(unsigned long ioaddr
)
365 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
366 value
&= ~MAC_RNABLE_RX
;
367 writel(value
, ioaddr
+ MAC_CTRL_REG
);
370 static inline void stmmac_mac_disable_tx(unsigned long ioaddr
)
372 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
373 value
&= ~MAC_ENABLE_TX
;
374 writel(value
, ioaddr
+ MAC_CTRL_REG
);
379 * @p: pointer to the ring.
380 * @size: size of the ring.
381 * Description: display all the descriptors within the ring.
383 static void display_ring(struct dma_desc
*p
, int size
)
391 for (i
= 0; i
< size
; i
++) {
392 struct tmp_s
*x
= (struct tmp_s
*)(p
+ i
);
393 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
394 i
, (unsigned int)virt_to_phys(&p
[i
]),
395 (unsigned int)(x
->a
), (unsigned int)((x
->a
) >> 32),
402 * init_dma_desc_rings - init the RX/TX descriptor rings
403 * @dev: net device structure
404 * Description: this function initializes the DMA RX/TX descriptors
405 * and allocates the socket buffers.
407 static void init_dma_desc_rings(struct net_device
*dev
)
410 struct stmmac_priv
*priv
= netdev_priv(dev
);
412 unsigned int txsize
= priv
->dma_tx_size
;
413 unsigned int rxsize
= priv
->dma_rx_size
;
414 unsigned int bfsize
= priv
->dma_buf_sz
;
415 int buff2_needed
= 0, dis_ic
= 0;
417 /* Set the Buffer size according to the MTU;
418 * indeed, in case of jumbo we need to bump-up the buffer sizes.
420 if (unlikely(dev
->mtu
>= BUF_SIZE_8KiB
))
421 bfsize
= BUF_SIZE_16KiB
;
422 else if (unlikely(dev
->mtu
>= BUF_SIZE_4KiB
))
423 bfsize
= BUF_SIZE_8KiB
;
424 else if (unlikely(dev
->mtu
>= BUF_SIZE_2KiB
))
425 bfsize
= BUF_SIZE_4KiB
;
426 else if (unlikely(dev
->mtu
>= DMA_BUFFER_SIZE
))
427 bfsize
= BUF_SIZE_2KiB
;
429 bfsize
= DMA_BUFFER_SIZE
;
431 #ifdef CONFIG_STMMAC_TIMER
432 /* Disable interrupts on completion for the reception if timer is on */
433 if (likely(priv
->tm
->enable
))
436 /* If the MTU exceeds 8k so use the second buffer in the chain */
437 if (bfsize
>= BUF_SIZE_8KiB
)
440 DBG(probe
, INFO
, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
441 txsize
, rxsize
, bfsize
);
443 priv
->rx_skbuff_dma
= kmalloc(rxsize
* sizeof(dma_addr_t
), GFP_KERNEL
);
445 kmalloc(sizeof(struct sk_buff
*) * rxsize
, GFP_KERNEL
);
447 (struct dma_desc
*)dma_alloc_coherent(priv
->device
,
449 sizeof(struct dma_desc
),
452 priv
->tx_skbuff
= kmalloc(sizeof(struct sk_buff
*) * txsize
,
455 (struct dma_desc
*)dma_alloc_coherent(priv
->device
,
457 sizeof(struct dma_desc
),
461 if ((priv
->dma_rx
== NULL
) || (priv
->dma_tx
== NULL
)) {
462 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__
);
466 DBG(probe
, INFO
, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
467 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
468 dev
->name
, priv
->dma_rx
, priv
->dma_tx
,
469 (unsigned int)priv
->dma_rx_phy
, (unsigned int)priv
->dma_tx_phy
);
471 /* RX INITIALIZATION */
472 DBG(probe
, INFO
, "stmmac: SKB addresses:\n"
473 "skb\t\tskb data\tdma data\n");
475 for (i
= 0; i
< rxsize
; i
++) {
476 struct dma_desc
*p
= priv
->dma_rx
+ i
;
478 skb
= netdev_alloc_skb_ip_align(dev
, bfsize
);
479 if (unlikely(skb
== NULL
)) {
480 pr_err("%s: Rx init fails; skb is NULL\n", __func__
);
483 priv
->rx_skbuff
[i
] = skb
;
484 priv
->rx_skbuff_dma
[i
] = dma_map_single(priv
->device
, skb
->data
,
485 bfsize
, DMA_FROM_DEVICE
);
487 p
->des2
= priv
->rx_skbuff_dma
[i
];
488 if (unlikely(buff2_needed
))
489 p
->des3
= p
->des2
+ BUF_SIZE_8KiB
;
490 DBG(probe
, INFO
, "[%p]\t[%p]\t[%x]\n", priv
->rx_skbuff
[i
],
491 priv
->rx_skbuff
[i
]->data
, priv
->rx_skbuff_dma
[i
]);
494 priv
->dirty_rx
= (unsigned int)(i
- rxsize
);
495 priv
->dma_buf_sz
= bfsize
;
498 /* TX INITIALIZATION */
499 for (i
= 0; i
< txsize
; i
++) {
500 priv
->tx_skbuff
[i
] = NULL
;
501 priv
->dma_tx
[i
].des2
= 0;
506 /* Clear the Rx/Tx descriptors */
507 priv
->hw
->desc
->init_rx_desc(priv
->dma_rx
, rxsize
, dis_ic
);
508 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, txsize
);
510 if (netif_msg_hw(priv
)) {
511 pr_info("RX descriptor ring:\n");
512 display_ring(priv
->dma_rx
, rxsize
);
513 pr_info("TX descriptor ring:\n");
514 display_ring(priv
->dma_tx
, txsize
);
519 static void dma_free_rx_skbufs(struct stmmac_priv
*priv
)
523 for (i
= 0; i
< priv
->dma_rx_size
; i
++) {
524 if (priv
->rx_skbuff
[i
]) {
525 dma_unmap_single(priv
->device
, priv
->rx_skbuff_dma
[i
],
526 priv
->dma_buf_sz
, DMA_FROM_DEVICE
);
527 dev_kfree_skb_any(priv
->rx_skbuff
[i
]);
529 priv
->rx_skbuff
[i
] = NULL
;
534 static void dma_free_tx_skbufs(struct stmmac_priv
*priv
)
538 for (i
= 0; i
< priv
->dma_tx_size
; i
++) {
539 if (priv
->tx_skbuff
[i
] != NULL
) {
540 struct dma_desc
*p
= priv
->dma_tx
+ i
;
542 dma_unmap_single(priv
->device
, p
->des2
,
543 priv
->hw
->desc
->get_tx_len(p
),
545 dev_kfree_skb_any(priv
->tx_skbuff
[i
]);
546 priv
->tx_skbuff
[i
] = NULL
;
552 static void free_dma_desc_resources(struct stmmac_priv
*priv
)
554 /* Release the DMA TX/RX socket buffers */
555 dma_free_rx_skbufs(priv
);
556 dma_free_tx_skbufs(priv
);
558 /* Free the region of consistent memory previously allocated for
560 dma_free_coherent(priv
->device
,
561 priv
->dma_tx_size
* sizeof(struct dma_desc
),
562 priv
->dma_tx
, priv
->dma_tx_phy
);
563 dma_free_coherent(priv
->device
,
564 priv
->dma_rx_size
* sizeof(struct dma_desc
),
565 priv
->dma_rx
, priv
->dma_rx_phy
);
566 kfree(priv
->rx_skbuff_dma
);
567 kfree(priv
->rx_skbuff
);
568 kfree(priv
->tx_skbuff
);
574 * stmmac_dma_operation_mode - HW DMA operation mode
575 * @priv : pointer to the private device structure.
576 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
577 * or Store-And-Forward capability. It also verifies the COE for the
578 * transmission in case of Giga ETH.
580 static void stmmac_dma_operation_mode(struct stmmac_priv
*priv
)
582 if (!priv
->is_gmac
) {
584 priv
->hw
->dma
->dma_mode(priv
->dev
->base_addr
, tc
, 0);
585 priv
->tx_coe
= NO_HW_CSUM
;
587 if ((priv
->dev
->mtu
<= ETH_DATA_LEN
) && (tx_coe
)) {
588 priv
->hw
->dma
->dma_mode(priv
->dev
->base_addr
,
589 SF_DMA_MODE
, SF_DMA_MODE
);
591 priv
->tx_coe
= HW_CSUM
;
593 /* Checksum computation is performed in software. */
594 priv
->hw
->dma
->dma_mode(priv
->dev
->base_addr
, tc
,
596 priv
->tx_coe
= NO_HW_CSUM
;
599 tx_coe
= priv
->tx_coe
;
606 * @priv: private driver structure
607 * Description: it reclaims resources after transmission completes.
609 static void stmmac_tx(struct stmmac_priv
*priv
)
611 unsigned int txsize
= priv
->dma_tx_size
;
612 unsigned long ioaddr
= priv
->dev
->base_addr
;
614 while (priv
->dirty_tx
!= priv
->cur_tx
) {
616 unsigned int entry
= priv
->dirty_tx
% txsize
;
617 struct sk_buff
*skb
= priv
->tx_skbuff
[entry
];
618 struct dma_desc
*p
= priv
->dma_tx
+ entry
;
620 /* Check if the descriptor is owned by the DMA. */
621 if (priv
->hw
->desc
->get_tx_owner(p
))
624 /* Verify tx error by looking at the last segment */
625 last
= priv
->hw
->desc
->get_tx_ls(p
);
628 priv
->hw
->desc
->tx_status(&priv
->dev
->stats
,
631 if (likely(tx_error
== 0)) {
632 priv
->dev
->stats
.tx_packets
++;
633 priv
->xstats
.tx_pkt_n
++;
635 priv
->dev
->stats
.tx_errors
++;
637 TX_DBG("%s: curr %d, dirty %d\n", __func__
,
638 priv
->cur_tx
, priv
->dirty_tx
);
641 dma_unmap_single(priv
->device
, p
->des2
,
642 priv
->hw
->desc
->get_tx_len(p
),
644 if (unlikely(p
->des3
))
647 if (likely(skb
!= NULL
)) {
649 * If there's room in the queue (limit it to size)
650 * we add this skb back into the pool,
651 * if it's the right size.
653 if ((skb_queue_len(&priv
->rx_recycle
) <
654 priv
->dma_rx_size
) &&
655 skb_recycle_check(skb
, priv
->dma_buf_sz
))
656 __skb_queue_head(&priv
->rx_recycle
, skb
);
660 priv
->tx_skbuff
[entry
] = NULL
;
663 priv
->hw
->desc
->release_tx_desc(p
);
665 entry
= (++priv
->dirty_tx
) % txsize
;
667 if (unlikely(netif_queue_stopped(priv
->dev
) &&
668 stmmac_tx_avail(priv
) > STMMAC_TX_THRESH(priv
))) {
669 netif_tx_lock(priv
->dev
);
670 if (netif_queue_stopped(priv
->dev
) &&
671 stmmac_tx_avail(priv
) > STMMAC_TX_THRESH(priv
)) {
672 TX_DBG("%s: restart transmit\n", __func__
);
673 netif_wake_queue(priv
->dev
);
675 netif_tx_unlock(priv
->dev
);
680 static inline void stmmac_enable_irq(struct stmmac_priv
*priv
)
682 #ifdef CONFIG_STMMAC_TIMER
683 if (likely(priv
->tm
->enable
))
684 priv
->tm
->timer_start(tmrate
);
687 priv
->hw
->dma
->enable_dma_irq(priv
->dev
->base_addr
);
690 static inline void stmmac_disable_irq(struct stmmac_priv
*priv
)
692 #ifdef CONFIG_STMMAC_TIMER
693 if (likely(priv
->tm
->enable
))
694 priv
->tm
->timer_stop();
697 priv
->hw
->dma
->disable_dma_irq(priv
->dev
->base_addr
);
700 static int stmmac_has_work(struct stmmac_priv
*priv
)
702 unsigned int has_work
= 0;
703 int rxret
, tx_work
= 0;
705 rxret
= priv
->hw
->desc
->get_rx_owner(priv
->dma_rx
+
706 (priv
->cur_rx
% priv
->dma_rx_size
));
708 if (priv
->dirty_tx
!= priv
->cur_tx
)
711 if (likely(!rxret
|| tx_work
))
717 static inline void _stmmac_schedule(struct stmmac_priv
*priv
)
719 if (likely(stmmac_has_work(priv
))) {
720 stmmac_disable_irq(priv
);
721 napi_schedule(&priv
->napi
);
725 #ifdef CONFIG_STMMAC_TIMER
726 void stmmac_schedule(struct net_device
*dev
)
728 struct stmmac_priv
*priv
= netdev_priv(dev
);
730 priv
->xstats
.sched_timer_n
++;
732 _stmmac_schedule(priv
);
737 static void stmmac_no_timer_started(unsigned int x
)
741 static void stmmac_no_timer_stopped(void)
748 * @priv: pointer to the private device structure
749 * Description: it cleans the descriptors and restarts the transmission
752 static void stmmac_tx_err(struct stmmac_priv
*priv
)
754 netif_stop_queue(priv
->dev
);
756 priv
->hw
->dma
->stop_tx(priv
->dev
->base_addr
);
757 dma_free_tx_skbufs(priv
);
758 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, priv
->dma_tx_size
);
761 priv
->hw
->dma
->start_tx(priv
->dev
->base_addr
);
763 priv
->dev
->stats
.tx_errors
++;
764 netif_wake_queue(priv
->dev
);
770 static void stmmac_dma_interrupt(struct stmmac_priv
*priv
)
772 unsigned long ioaddr
= priv
->dev
->base_addr
;
775 status
= priv
->hw
->dma
->dma_interrupt(priv
->dev
->base_addr
,
777 if (likely(status
== handle_tx_rx
))
778 _stmmac_schedule(priv
);
780 else if (unlikely(status
== tx_hard_error_bump_tc
)) {
781 /* Try to bump up the dma threshold on this failure */
782 if (unlikely(tc
!= SF_DMA_MODE
) && (tc
<= 256)) {
784 priv
->hw
->dma
->dma_mode(ioaddr
, tc
, SF_DMA_MODE
);
785 priv
->xstats
.threshold
= tc
;
788 } else if (unlikely(status
== tx_hard_error
))
795 * stmmac_open - open entry point of the driver
796 * @dev : pointer to the device structure.
798 * This function is the open entry point of the driver.
800 * 0 on success and an appropriate (-)ve integer as defined in errno.h
803 static int stmmac_open(struct net_device
*dev
)
805 struct stmmac_priv
*priv
= netdev_priv(dev
);
806 unsigned long ioaddr
= dev
->base_addr
;
809 /* Check that the MAC address is valid. If its not, refuse
810 * to bring the device up. The user must specify an
811 * address using the following linux command:
812 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
813 if (!is_valid_ether_addr(dev
->dev_addr
)) {
814 random_ether_addr(dev
->dev_addr
);
815 pr_warning("%s: generated random MAC address %pM\n", dev
->name
,
819 stmmac_verify_args();
821 ret
= stmmac_init_phy(dev
);
823 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__
, ret
);
827 /* Request the IRQ lines */
828 ret
= request_irq(dev
->irq
, stmmac_interrupt
,
829 IRQF_SHARED
, dev
->name
, dev
);
830 if (unlikely(ret
< 0)) {
831 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
832 __func__
, dev
->irq
, ret
);
836 #ifdef CONFIG_STMMAC_TIMER
837 priv
->tm
= kzalloc(sizeof(struct stmmac_timer
*), GFP_KERNEL
);
838 if (unlikely(priv
->tm
== NULL
)) {
839 pr_err("%s: ERROR: timer memory alloc failed \n", __func__
);
842 priv
->tm
->freq
= tmrate
;
844 /* Test if the external timer can be actually used.
845 * In case of failure continue without timer. */
846 if (unlikely((stmmac_open_ext_timer(dev
, priv
->tm
)) < 0)) {
847 pr_warning("stmmaceth: cannot attach the external timer.\n");
850 priv
->tm
->timer_start
= stmmac_no_timer_started
;
851 priv
->tm
->timer_stop
= stmmac_no_timer_stopped
;
853 priv
->tm
->enable
= 1;
856 /* Create and initialize the TX/RX descriptors chains. */
857 priv
->dma_tx_size
= STMMAC_ALIGN(dma_txsize
);
858 priv
->dma_rx_size
= STMMAC_ALIGN(dma_rxsize
);
859 priv
->dma_buf_sz
= STMMAC_ALIGN(buf_sz
);
860 init_dma_desc_rings(dev
);
862 /* DMA initialization and SW reset */
863 if (unlikely(priv
->hw
->dma
->init(ioaddr
, priv
->pbl
, priv
->dma_tx_phy
,
864 priv
->dma_rx_phy
) < 0)) {
866 pr_err("%s: DMA initialization failed\n", __func__
);
870 /* Copy the MAC addr into the HW */
871 priv
->hw
->mac
->set_umac_addr(ioaddr
, dev
->dev_addr
, 0);
872 /* If required, perform hw setup of the bus. */
874 priv
->bus_setup(ioaddr
);
875 /* Initialize the MAC Core */
876 priv
->hw
->mac
->core_init(ioaddr
);
880 /* Initialise the MMC (if present) to disable all interrupts. */
881 writel(0xffffffff, ioaddr
+ MMC_HIGH_INTR_MASK
);
882 writel(0xffffffff, ioaddr
+ MMC_LOW_INTR_MASK
);
884 /* Enable the MAC Rx/Tx */
885 stmmac_mac_enable_rx(ioaddr
);
886 stmmac_mac_enable_tx(ioaddr
);
888 /* Set the HW DMA mode and the COE */
889 stmmac_dma_operation_mode(priv
);
891 /* Extra statistics */
892 memset(&priv
->xstats
, 0, sizeof(struct stmmac_extra_stats
));
893 priv
->xstats
.threshold
= tc
;
895 /* Start the ball rolling... */
896 DBG(probe
, DEBUG
, "%s: DMA RX/TX processes started...\n", dev
->name
);
897 priv
->hw
->dma
->start_tx(ioaddr
);
898 priv
->hw
->dma
->start_rx(ioaddr
);
900 #ifdef CONFIG_STMMAC_TIMER
901 priv
->tm
->timer_start(tmrate
);
903 /* Dump DMA/MAC registers */
904 if (netif_msg_hw(priv
)) {
905 priv
->hw
->mac
->dump_regs(ioaddr
);
906 priv
->hw
->dma
->dump_regs(ioaddr
);
910 phy_start(priv
->phydev
);
912 napi_enable(&priv
->napi
);
913 skb_queue_head_init(&priv
->rx_recycle
);
914 netif_start_queue(dev
);
919 * stmmac_release - close entry point of the driver
920 * @dev : device pointer.
922 * This is the stop entry point of the driver.
924 static int stmmac_release(struct net_device
*dev
)
926 struct stmmac_priv
*priv
= netdev_priv(dev
);
928 /* Stop and disconnect the PHY */
930 phy_stop(priv
->phydev
);
931 phy_disconnect(priv
->phydev
);
935 netif_stop_queue(dev
);
937 #ifdef CONFIG_STMMAC_TIMER
938 /* Stop and release the timer */
939 stmmac_close_ext_timer();
940 if (priv
->tm
!= NULL
)
943 napi_disable(&priv
->napi
);
944 skb_queue_purge(&priv
->rx_recycle
);
946 /* Free the IRQ lines */
947 free_irq(dev
->irq
, dev
);
949 /* Stop TX/RX DMA and clear the descriptors */
950 priv
->hw
->dma
->stop_tx(dev
->base_addr
);
951 priv
->hw
->dma
->stop_rx(dev
->base_addr
);
953 /* Release and free the Rx/Tx resources */
954 free_dma_desc_resources(priv
);
956 /* Disable the MAC core */
957 stmmac_mac_disable_tx(dev
->base_addr
);
958 stmmac_mac_disable_rx(dev
->base_addr
);
960 netif_carrier_off(dev
);
966 * To perform emulated hardware segmentation on skb.
968 static int stmmac_sw_tso(struct stmmac_priv
*priv
, struct sk_buff
*skb
)
970 struct sk_buff
*segs
, *curr_skb
;
971 int gso_segs
= skb_shinfo(skb
)->gso_segs
;
973 /* Estimate the number of fragments in the worst case */
974 if (unlikely(stmmac_tx_avail(priv
) < gso_segs
)) {
975 netif_stop_queue(priv
->dev
);
976 TX_DBG(KERN_ERR
"%s: TSO BUG! Tx Ring full when queue awake\n",
978 if (stmmac_tx_avail(priv
) < gso_segs
)
979 return NETDEV_TX_BUSY
;
981 netif_wake_queue(priv
->dev
);
983 TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
986 segs
= skb_gso_segment(skb
, priv
->dev
->features
& ~NETIF_F_TSO
);
987 if (unlikely(IS_ERR(segs
)))
993 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
994 "*next %p\n", curr_skb
->len
, curr_skb
, segs
);
995 curr_skb
->next
= NULL
;
996 stmmac_xmit(curr_skb
, priv
->dev
);
1002 return NETDEV_TX_OK
;
1005 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff
*skb
,
1006 struct net_device
*dev
,
1009 struct stmmac_priv
*priv
= netdev_priv(dev
);
1010 unsigned int nopaged_len
= skb_headlen(skb
);
1011 unsigned int txsize
= priv
->dma_tx_size
;
1012 unsigned int entry
= priv
->cur_tx
% txsize
;
1013 struct dma_desc
*desc
= priv
->dma_tx
+ entry
;
1015 if (nopaged_len
> BUF_SIZE_8KiB
) {
1017 int buf2_size
= nopaged_len
- BUF_SIZE_8KiB
;
1019 desc
->des2
= dma_map_single(priv
->device
, skb
->data
,
1020 BUF_SIZE_8KiB
, DMA_TO_DEVICE
);
1021 desc
->des3
= desc
->des2
+ BUF_SIZE_4KiB
;
1022 priv
->hw
->desc
->prepare_tx_desc(desc
, 1, BUF_SIZE_8KiB
,
1025 entry
= (++priv
->cur_tx
) % txsize
;
1026 desc
= priv
->dma_tx
+ entry
;
1028 desc
->des2
= dma_map_single(priv
->device
,
1029 skb
->data
+ BUF_SIZE_8KiB
,
1030 buf2_size
, DMA_TO_DEVICE
);
1031 desc
->des3
= desc
->des2
+ BUF_SIZE_4KiB
;
1032 priv
->hw
->desc
->prepare_tx_desc(desc
, 0, buf2_size
,
1034 priv
->hw
->desc
->set_tx_owner(desc
);
1035 priv
->tx_skbuff
[entry
] = NULL
;
1037 desc
->des2
= dma_map_single(priv
->device
, skb
->data
,
1038 nopaged_len
, DMA_TO_DEVICE
);
1039 desc
->des3
= desc
->des2
+ BUF_SIZE_4KiB
;
1040 priv
->hw
->desc
->prepare_tx_desc(desc
, 1, nopaged_len
,
1048 * @skb : the socket buffer
1049 * @dev : device pointer
1050 * Description : Tx entry point of the driver.
1052 static netdev_tx_t
stmmac_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1054 struct stmmac_priv
*priv
= netdev_priv(dev
);
1055 unsigned int txsize
= priv
->dma_tx_size
;
1057 int i
, csum_insertion
= 0;
1058 int nfrags
= skb_shinfo(skb
)->nr_frags
;
1059 struct dma_desc
*desc
, *first
;
1061 if (unlikely(stmmac_tx_avail(priv
) < nfrags
+ 1)) {
1062 if (!netif_queue_stopped(dev
)) {
1063 netif_stop_queue(dev
);
1064 /* This is a hard error, log it. */
1065 pr_err("%s: BUG! Tx Ring full when queue awake\n",
1068 return NETDEV_TX_BUSY
;
1071 entry
= priv
->cur_tx
% txsize
;
1073 #ifdef STMMAC_XMIT_DEBUG
1074 if ((skb
->len
> ETH_FRAME_LEN
) || nfrags
)
1075 pr_info("stmmac xmit:\n"
1076 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1077 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1078 skb
, skb
->len
, skb_headlen(skb
), nfrags
, skb
->ip_summed
,
1079 !skb_is_gso(skb
) ? "isn't" : "is");
1082 if (unlikely(skb_is_gso(skb
)))
1083 return stmmac_sw_tso(priv
, skb
);
1085 if (likely((skb
->ip_summed
== CHECKSUM_PARTIAL
))) {
1086 if (likely(priv
->tx_coe
== NO_HW_CSUM
))
1087 skb_checksum_help(skb
);
1092 desc
= priv
->dma_tx
+ entry
;
1095 #ifdef STMMAC_XMIT_DEBUG
1096 if ((nfrags
> 0) || (skb
->len
> ETH_FRAME_LEN
))
1097 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1098 "\t\tn_frags: %d, ip_summed: %d\n",
1099 skb
->len
, skb_headlen(skb
), nfrags
, skb
->ip_summed
);
1101 priv
->tx_skbuff
[entry
] = skb
;
1102 if (unlikely(skb
->len
>= BUF_SIZE_4KiB
)) {
1103 entry
= stmmac_handle_jumbo_frames(skb
, dev
, csum_insertion
);
1104 desc
= priv
->dma_tx
+ entry
;
1106 unsigned int nopaged_len
= skb_headlen(skb
);
1107 desc
->des2
= dma_map_single(priv
->device
, skb
->data
,
1108 nopaged_len
, DMA_TO_DEVICE
);
1109 priv
->hw
->desc
->prepare_tx_desc(desc
, 1, nopaged_len
,
1113 for (i
= 0; i
< nfrags
; i
++) {
1114 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1115 int len
= frag
->size
;
1117 entry
= (++priv
->cur_tx
) % txsize
;
1118 desc
= priv
->dma_tx
+ entry
;
1120 TX_DBG("\t[entry %d] segment len: %d\n", entry
, len
);
1121 desc
->des2
= dma_map_page(priv
->device
, frag
->page
,
1123 len
, DMA_TO_DEVICE
);
1124 priv
->tx_skbuff
[entry
] = NULL
;
1125 priv
->hw
->desc
->prepare_tx_desc(desc
, 0, len
, csum_insertion
);
1126 priv
->hw
->desc
->set_tx_owner(desc
);
1129 /* Interrupt on completition only for the latest segment */
1130 priv
->hw
->desc
->close_tx_desc(desc
);
1132 #ifdef CONFIG_STMMAC_TIMER
1133 /* Clean IC while using timer */
1134 if (likely(priv
->tm
->enable
))
1135 priv
->hw
->desc
->clear_tx_ic(desc
);
1137 /* To avoid raise condition */
1138 priv
->hw
->desc
->set_tx_owner(first
);
1142 #ifdef STMMAC_XMIT_DEBUG
1143 if (netif_msg_pktdata(priv
)) {
1144 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1145 "first=%p, nfrags=%d\n",
1146 (priv
->cur_tx
% txsize
), (priv
->dirty_tx
% txsize
),
1147 entry
, first
, nfrags
);
1148 display_ring(priv
->dma_tx
, txsize
);
1149 pr_info(">>> frame to be transmitted: ");
1150 print_pkt(skb
->data
, skb
->len
);
1153 if (unlikely(stmmac_tx_avail(priv
) <= (MAX_SKB_FRAGS
+ 1))) {
1154 TX_DBG("%s: stop transmitted packets\n", __func__
);
1155 netif_stop_queue(dev
);
1158 dev
->stats
.tx_bytes
+= skb
->len
;
1160 priv
->hw
->dma
->enable_dma_transmission(dev
->base_addr
);
1162 return NETDEV_TX_OK
;
1165 static inline void stmmac_rx_refill(struct stmmac_priv
*priv
)
1167 unsigned int rxsize
= priv
->dma_rx_size
;
1168 int bfsize
= priv
->dma_buf_sz
;
1169 struct dma_desc
*p
= priv
->dma_rx
;
1171 for (; priv
->cur_rx
- priv
->dirty_rx
> 0; priv
->dirty_rx
++) {
1172 unsigned int entry
= priv
->dirty_rx
% rxsize
;
1173 if (likely(priv
->rx_skbuff
[entry
] == NULL
)) {
1174 struct sk_buff
*skb
;
1176 skb
= __skb_dequeue(&priv
->rx_recycle
);
1178 skb
= netdev_alloc_skb_ip_align(priv
->dev
,
1181 if (unlikely(skb
== NULL
))
1184 priv
->rx_skbuff
[entry
] = skb
;
1185 priv
->rx_skbuff_dma
[entry
] =
1186 dma_map_single(priv
->device
, skb
->data
, bfsize
,
1189 (p
+ entry
)->des2
= priv
->rx_skbuff_dma
[entry
];
1190 if (unlikely(priv
->is_gmac
)) {
1191 if (bfsize
>= BUF_SIZE_8KiB
)
1193 (p
+ entry
)->des2
+ BUF_SIZE_8KiB
;
1195 RX_DBG(KERN_INFO
"\trefill entry #%d\n", entry
);
1197 priv
->hw
->desc
->set_rx_owner(p
+ entry
);
1202 static int stmmac_rx(struct stmmac_priv
*priv
, int limit
)
1204 unsigned int rxsize
= priv
->dma_rx_size
;
1205 unsigned int entry
= priv
->cur_rx
% rxsize
;
1206 unsigned int next_entry
;
1207 unsigned int count
= 0;
1208 struct dma_desc
*p
= priv
->dma_rx
+ entry
;
1209 struct dma_desc
*p_next
;
1211 #ifdef STMMAC_RX_DEBUG
1212 if (netif_msg_hw(priv
)) {
1213 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1214 display_ring(priv
->dma_rx
, rxsize
);
1218 while (!priv
->hw
->desc
->get_rx_owner(p
)) {
1226 next_entry
= (++priv
->cur_rx
) % rxsize
;
1227 p_next
= priv
->dma_rx
+ next_entry
;
1230 /* read the status of the incoming frame */
1231 status
= (priv
->hw
->desc
->rx_status(&priv
->dev
->stats
,
1233 if (unlikely(status
== discard_frame
))
1234 priv
->dev
->stats
.rx_errors
++;
1236 struct sk_buff
*skb
;
1237 /* Length should omit the CRC */
1238 int frame_len
= priv
->hw
->desc
->get_rx_frame_len(p
) - 4;
1240 #ifdef STMMAC_RX_DEBUG
1241 if (frame_len
> ETH_FRAME_LEN
)
1242 pr_debug("\tRX frame size %d, COE status: %d\n",
1245 if (netif_msg_hw(priv
))
1246 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1249 skb
= priv
->rx_skbuff
[entry
];
1250 if (unlikely(!skb
)) {
1251 pr_err("%s: Inconsistent Rx descriptor chain\n",
1253 priv
->dev
->stats
.rx_dropped
++;
1256 prefetch(skb
->data
- NET_IP_ALIGN
);
1257 priv
->rx_skbuff
[entry
] = NULL
;
1259 skb_put(skb
, frame_len
);
1260 dma_unmap_single(priv
->device
,
1261 priv
->rx_skbuff_dma
[entry
],
1262 priv
->dma_buf_sz
, DMA_FROM_DEVICE
);
1263 #ifdef STMMAC_RX_DEBUG
1264 if (netif_msg_pktdata(priv
)) {
1265 pr_info(" frame received (%dbytes)", frame_len
);
1266 print_pkt(skb
->data
, frame_len
);
1269 skb
->protocol
= eth_type_trans(skb
, priv
->dev
);
1271 if (unlikely(status
== csum_none
)) {
1272 /* always for the old mac 10/100 */
1273 skb
->ip_summed
= CHECKSUM_NONE
;
1274 netif_receive_skb(skb
);
1276 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1277 napi_gro_receive(&priv
->napi
, skb
);
1280 priv
->dev
->stats
.rx_packets
++;
1281 priv
->dev
->stats
.rx_bytes
+= frame_len
;
1282 priv
->dev
->last_rx
= jiffies
;
1285 p
= p_next
; /* use prefetched values */
1288 stmmac_rx_refill(priv
);
1290 priv
->xstats
.rx_pkt_n
+= count
;
1296 * stmmac_poll - stmmac poll method (NAPI)
1297 * @napi : pointer to the napi structure.
1298 * @budget : maximum number of packets that the current CPU can receive from
1301 * This function implements the the reception process.
1302 * Also it runs the TX completion thread
1304 static int stmmac_poll(struct napi_struct
*napi
, int budget
)
1306 struct stmmac_priv
*priv
= container_of(napi
, struct stmmac_priv
, napi
);
1309 priv
->xstats
.poll_n
++;
1311 work_done
= stmmac_rx(priv
, budget
);
1313 if (work_done
< budget
) {
1314 napi_complete(napi
);
1315 stmmac_enable_irq(priv
);
1322 * @dev : Pointer to net device structure
1323 * Description: this function is called when a packet transmission fails to
1324 * complete within a reasonable tmrate. The driver will mark the error in the
1325 * netdev structure and arrange for the device to be reset to a sane state
1326 * in order to transmit a new packet.
1328 static void stmmac_tx_timeout(struct net_device
*dev
)
1330 struct stmmac_priv
*priv
= netdev_priv(dev
);
1332 /* Clear Tx resources and restart transmitting again */
1333 stmmac_tx_err(priv
);
1337 /* Configuration changes (passed on by ifconfig) */
1338 static int stmmac_config(struct net_device
*dev
, struct ifmap
*map
)
1340 if (dev
->flags
& IFF_UP
) /* can't act on a running interface */
1343 /* Don't allow changing the I/O address */
1344 if (map
->base_addr
!= dev
->base_addr
) {
1345 pr_warning("%s: can't change I/O address\n", dev
->name
);
1349 /* Don't allow changing the IRQ */
1350 if (map
->irq
!= dev
->irq
) {
1351 pr_warning("%s: can't change IRQ number %d\n",
1352 dev
->name
, dev
->irq
);
1356 /* ignore other fields */
1361 * stmmac_multicast_list - entry point for multicast addressing
1362 * @dev : pointer to the device structure
1364 * This function is a driver entry point which gets called by the kernel
1365 * whenever multicast addresses must be enabled/disabled.
1369 static void stmmac_multicast_list(struct net_device
*dev
)
1371 struct stmmac_priv
*priv
= netdev_priv(dev
);
1373 spin_lock(&priv
->lock
);
1374 priv
->hw
->mac
->set_filter(dev
);
1375 spin_unlock(&priv
->lock
);
1380 * stmmac_change_mtu - entry point to change MTU size for the device.
1381 * @dev : device pointer.
1382 * @new_mtu : the new MTU size for the device.
1383 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1384 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1385 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1387 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1390 static int stmmac_change_mtu(struct net_device
*dev
, int new_mtu
)
1392 struct stmmac_priv
*priv
= netdev_priv(dev
);
1395 if (netif_running(dev
)) {
1396 pr_err("%s: must be stopped to change its MTU\n", dev
->name
);
1401 max_mtu
= JUMBO_LEN
;
1403 max_mtu
= ETH_DATA_LEN
;
1405 if ((new_mtu
< 46) || (new_mtu
> max_mtu
)) {
1406 pr_err("%s: invalid MTU, max MTU is: %d\n", dev
->name
, max_mtu
);
1415 static irqreturn_t
stmmac_interrupt(int irq
, void *dev_id
)
1417 struct net_device
*dev
= (struct net_device
*)dev_id
;
1418 struct stmmac_priv
*priv
= netdev_priv(dev
);
1420 if (unlikely(!dev
)) {
1421 pr_err("%s: invalid dev pointer\n", __func__
);
1425 if (priv
->is_gmac
) {
1426 unsigned long ioaddr
= dev
->base_addr
;
1427 /* To handle GMAC own interrupts */
1428 priv
->hw
->mac
->host_irq_status(ioaddr
);
1431 stmmac_dma_interrupt(priv
);
1436 #ifdef CONFIG_NET_POLL_CONTROLLER
1437 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1438 * to allow network I/O with interrupts disabled. */
1439 static void stmmac_poll_controller(struct net_device
*dev
)
1441 disable_irq(dev
->irq
);
1442 stmmac_interrupt(dev
->irq
, dev
);
1443 enable_irq(dev
->irq
);
1448 * stmmac_ioctl - Entry point for the Ioctl
1449 * @dev: Device pointer.
1450 * @rq: An IOCTL specefic structure, that can contain a pointer to
1451 * a proprietary structure used to pass information to the driver.
1452 * @cmd: IOCTL command
1454 * Currently there are no special functionality supported in IOCTL, just the
1455 * phy_mii_ioctl(...) can be invoked.
1457 static int stmmac_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1459 struct stmmac_priv
*priv
= netdev_priv(dev
);
1460 int ret
= -EOPNOTSUPP
;
1462 if (!netif_running(dev
))
1472 spin_lock(&priv
->lock
);
1473 ret
= phy_mii_ioctl(priv
->phydev
, if_mii(rq
), cmd
);
1474 spin_unlock(&priv
->lock
);
1481 #ifdef STMMAC_VLAN_TAG_USED
1482 static void stmmac_vlan_rx_register(struct net_device
*dev
,
1483 struct vlan_group
*grp
)
1485 struct stmmac_priv
*priv
= netdev_priv(dev
);
1487 DBG(probe
, INFO
, "%s: Setting vlgrp to %p\n", dev
->name
, grp
);
1489 spin_lock(&priv
->lock
);
1491 spin_unlock(&priv
->lock
);
1497 static const struct net_device_ops stmmac_netdev_ops
= {
1498 .ndo_open
= stmmac_open
,
1499 .ndo_start_xmit
= stmmac_xmit
,
1500 .ndo_stop
= stmmac_release
,
1501 .ndo_change_mtu
= stmmac_change_mtu
,
1502 .ndo_set_multicast_list
= stmmac_multicast_list
,
1503 .ndo_tx_timeout
= stmmac_tx_timeout
,
1504 .ndo_do_ioctl
= stmmac_ioctl
,
1505 .ndo_set_config
= stmmac_config
,
1506 #ifdef STMMAC_VLAN_TAG_USED
1507 .ndo_vlan_rx_register
= stmmac_vlan_rx_register
,
1509 #ifdef CONFIG_NET_POLL_CONTROLLER
1510 .ndo_poll_controller
= stmmac_poll_controller
,
1512 .ndo_set_mac_address
= eth_mac_addr
,
1516 * stmmac_probe - Initialization of the adapter .
1517 * @dev : device pointer
1518 * Description: The function initializes the network device structure for
1519 * the STMMAC driver. It also calls the low level routines
1520 * in order to init the HW (i.e. the DMA engine)
1522 static int stmmac_probe(struct net_device
*dev
)
1525 struct stmmac_priv
*priv
= netdev_priv(dev
);
1529 dev
->netdev_ops
= &stmmac_netdev_ops
;
1530 stmmac_set_ethtool_ops(dev
);
1532 dev
->features
|= (NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_HIGHDMA
);
1533 dev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1534 #ifdef STMMAC_VLAN_TAG_USED
1535 /* Both mac100 and gmac support receive VLAN tag detection */
1536 dev
->features
|= NETIF_F_HW_VLAN_RX
;
1538 priv
->msg_enable
= netif_msg_init(debug
, default_msg_level
);
1544 priv
->flow_ctrl
= FLOW_AUTO
; /* RX/TX pause on */
1546 priv
->pause
= pause
;
1547 netif_napi_add(dev
, &priv
->napi
, stmmac_poll
, 64);
1549 /* Get the MAC address */
1550 priv
->hw
->mac
->get_umac_addr(dev
->base_addr
, dev
->dev_addr
, 0);
1552 if (!is_valid_ether_addr(dev
->dev_addr
))
1553 pr_warning("\tno valid MAC address;"
1554 "please, use ifconfig or nwhwconfig!\n");
1556 ret
= register_netdev(dev
);
1558 pr_err("%s: ERROR %i registering the device\n",
1563 DBG(probe
, DEBUG
, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1564 dev
->name
, (dev
->features
& NETIF_F_SG
) ? "on" : "off",
1565 (dev
->features
& NETIF_F_HW_CSUM
) ? "on" : "off");
1567 spin_lock_init(&priv
->lock
);
1573 * stmmac_mac_device_setup
1574 * @dev : device pointer
1575 * Description: select and initialise the mac device (mac100 or Gmac).
1577 static int stmmac_mac_device_setup(struct net_device
*dev
)
1579 struct stmmac_priv
*priv
= netdev_priv(dev
);
1580 unsigned long ioaddr
= dev
->base_addr
;
1582 struct mac_device_info
*device
;
1585 device
= dwmac1000_setup(ioaddr
);
1587 device
= dwmac100_setup(ioaddr
);
1594 priv
->wolenabled
= priv
->hw
->pmt
; /* PMT supported */
1595 if (priv
->wolenabled
== PMT_SUPPORTED
)
1596 priv
->wolopts
= WAKE_MAGIC
; /* Magic Frame */
1601 static int stmmacphy_dvr_probe(struct platform_device
*pdev
)
1603 struct plat_stmmacphy_data
*plat_dat
= pdev
->dev
.platform_data
;
1605 pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1611 static int stmmacphy_dvr_remove(struct platform_device
*pdev
)
1616 static struct platform_driver stmmacphy_driver
= {
1618 .name
= PHY_RESOURCE_NAME
,
1620 .probe
= stmmacphy_dvr_probe
,
1621 .remove
= stmmacphy_dvr_remove
,
1625 * stmmac_associate_phy
1626 * @dev: pointer to device structure
1627 * @data: points to the private structure.
1628 * Description: Scans through all the PHYs we have registered and checks if
1629 * any are associated with our MAC. If so, then just fill in
1630 * the blanks in our local context structure
1632 static int stmmac_associate_phy(struct device
*dev
, void *data
)
1634 struct stmmac_priv
*priv
= (struct stmmac_priv
*)data
;
1635 struct plat_stmmacphy_data
*plat_dat
= dev
->platform_data
;
1637 DBG(probe
, DEBUG
, "%s: checking phy for bus %d\n", __func__
,
1640 /* Check that this phy is for the MAC being initialised */
1641 if (priv
->bus_id
!= plat_dat
->bus_id
)
1644 /* OK, this PHY is connected to the MAC.
1645 Go ahead and get the parameters */
1646 DBG(probe
, DEBUG
, "%s: OK. Found PHY config\n", __func__
);
1648 platform_get_irq_byname(to_platform_device(dev
), "phyirq");
1649 DBG(probe
, DEBUG
, "%s: PHY irq on bus %d is %d\n", __func__
,
1650 plat_dat
->bus_id
, priv
->phy_irq
);
1652 /* Override with kernel parameters if supplied XXX CRS XXX
1653 * this needs to have multiple instances */
1654 if ((phyaddr
>= 0) && (phyaddr
<= 31))
1655 plat_dat
->phy_addr
= phyaddr
;
1657 priv
->phy_addr
= plat_dat
->phy_addr
;
1658 priv
->phy_mask
= plat_dat
->phy_mask
;
1659 priv
->phy_interface
= plat_dat
->interface
;
1660 priv
->phy_reset
= plat_dat
->phy_reset
;
1662 DBG(probe
, DEBUG
, "%s: exiting\n", __func__
);
1663 return 1; /* forces exit of driver_for_each_device() */
1668 * @pdev: platform device pointer
1669 * Description: the driver is initialized through platform_device.
1671 static int stmmac_dvr_probe(struct platform_device
*pdev
)
1674 struct resource
*res
;
1675 unsigned int *addr
= NULL
;
1676 struct net_device
*ndev
= NULL
;
1677 struct stmmac_priv
*priv
;
1678 struct plat_stmmacenet_data
*plat_dat
;
1680 pr_info("STMMAC driver:\n\tplatform registration... ");
1681 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1688 if (!request_mem_region(res
->start
, (res
->end
- res
->start
),
1690 pr_err("%s: ERROR: memory allocation failed"
1691 "cannot get the I/O addr 0x%x\n",
1692 __func__
, (unsigned int)res
->start
);
1697 addr
= ioremap(res
->start
, (res
->end
- res
->start
));
1699 pr_err("%s: ERROR: memory mapping failed \n", __func__
);
1704 ndev
= alloc_etherdev(sizeof(struct stmmac_priv
));
1706 pr_err("%s: ERROR: allocating the device\n", __func__
);
1711 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1713 /* Get the MAC information */
1714 ndev
->irq
= platform_get_irq_byname(pdev
, "macirq");
1715 if (ndev
->irq
== -ENXIO
) {
1716 pr_err("%s: ERROR: MAC IRQ configuration "
1717 "information not found\n", __func__
);
1722 priv
= netdev_priv(ndev
);
1723 priv
->device
= &(pdev
->dev
);
1725 plat_dat
= pdev
->dev
.platform_data
;
1726 priv
->bus_id
= plat_dat
->bus_id
;
1727 priv
->pbl
= plat_dat
->pbl
; /* TLI */
1728 priv
->is_gmac
= plat_dat
->has_gmac
; /* GMAC is on board */
1730 platform_set_drvdata(pdev
, ndev
);
1732 /* Set the I/O base addr */
1733 ndev
->base_addr
= (unsigned long)addr
;
1735 /* Verify embedded resource for the platform */
1736 ret
= stmmac_claim_resource(pdev
);
1740 /* MAC HW revice detection */
1741 ret
= stmmac_mac_device_setup(ndev
);
1745 /* Network Device Registration */
1746 ret
= stmmac_probe(ndev
);
1750 /* associate a PHY - it is provided by another platform bus */
1751 if (!driver_for_each_device
1752 (&(stmmacphy_driver
.driver
), NULL
, (void *)priv
,
1753 stmmac_associate_phy
)) {
1754 pr_err("No PHY device is associated with this MAC!\n");
1759 priv
->fix_mac_speed
= plat_dat
->fix_mac_speed
;
1760 priv
->bus_setup
= plat_dat
->bus_setup
;
1761 priv
->bsp_priv
= plat_dat
->bsp_priv
;
1763 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1764 "\tIO base addr: 0x%08x)\n", ndev
->name
, pdev
->name
,
1765 pdev
->id
, ndev
->irq
, (unsigned int)addr
);
1767 /* MDIO bus Registration */
1768 pr_debug("\tMDIO bus (id: %d)...", priv
->bus_id
);
1769 ret
= stmmac_mdio_register(ndev
);
1772 pr_debug("registered!\n");
1776 platform_set_drvdata(pdev
, NULL
);
1777 release_mem_region(res
->start
, (res
->end
- res
->start
));
1787 * @pdev: platform device pointer
1788 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1789 * changes the link status, releases the DMA descriptor rings,
1790 * unregisters the MDIO bus and unmaps the allocated memory.
1792 static int stmmac_dvr_remove(struct platform_device
*pdev
)
1794 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1795 struct stmmac_priv
*priv
= netdev_priv(ndev
);
1796 struct resource
*res
;
1798 pr_info("%s:\n\tremoving driver", __func__
);
1800 priv
->hw
->dma
->stop_rx(ndev
->base_addr
);
1801 priv
->hw
->dma
->stop_tx(ndev
->base_addr
);
1803 stmmac_mac_disable_rx(ndev
->base_addr
);
1804 stmmac_mac_disable_tx(ndev
->base_addr
);
1806 netif_carrier_off(ndev
);
1808 stmmac_mdio_unregister(ndev
);
1810 platform_set_drvdata(pdev
, NULL
);
1811 unregister_netdev(ndev
);
1813 iounmap((void *)ndev
->base_addr
);
1814 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1815 release_mem_region(res
->start
, (res
->end
- res
->start
));
1823 static int stmmac_suspend(struct platform_device
*pdev
, pm_message_t state
)
1825 struct net_device
*dev
= platform_get_drvdata(pdev
);
1826 struct stmmac_priv
*priv
= netdev_priv(dev
);
1829 if (!dev
|| !netif_running(dev
))
1832 spin_lock(&priv
->lock
);
1834 if (state
.event
== PM_EVENT_SUSPEND
) {
1835 netif_device_detach(dev
);
1836 netif_stop_queue(dev
);
1838 phy_stop(priv
->phydev
);
1840 #ifdef CONFIG_STMMAC_TIMER
1841 priv
->tm
->timer_stop();
1842 if (likely(priv
->tm
->enable
))
1845 napi_disable(&priv
->napi
);
1847 /* Stop TX/RX DMA */
1848 priv
->hw
->dma
->stop_tx(dev
->base_addr
);
1849 priv
->hw
->dma
->stop_rx(dev
->base_addr
);
1850 /* Clear the Rx/Tx descriptors */
1851 priv
->hw
->desc
->init_rx_desc(priv
->dma_rx
, priv
->dma_rx_size
,
1853 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, priv
->dma_tx_size
);
1855 stmmac_mac_disable_tx(dev
->base_addr
);
1857 if (device_may_wakeup(&(pdev
->dev
))) {
1858 /* Enable Power down mode by programming the PMT regs */
1859 if (priv
->wolenabled
== PMT_SUPPORTED
)
1860 priv
->hw
->mac
->pmt(dev
->base_addr
,
1863 stmmac_mac_disable_rx(dev
->base_addr
);
1867 /* Although this can appear slightly redundant it actually
1868 * makes fast the standby operation and guarantees the driver
1869 * working if hibernation is on media. */
1870 stmmac_release(dev
);
1873 spin_unlock(&priv
->lock
);
1877 static int stmmac_resume(struct platform_device
*pdev
)
1879 struct net_device
*dev
= platform_get_drvdata(pdev
);
1880 struct stmmac_priv
*priv
= netdev_priv(dev
);
1881 unsigned long ioaddr
= dev
->base_addr
;
1883 if (!netif_running(dev
))
1886 spin_lock(&priv
->lock
);
1888 if (priv
->shutdown
) {
1889 /* Re-open the interface and re-init the MAC/DMA
1895 /* Power Down bit, into the PM register, is cleared
1896 * automatically as soon as a magic packet or a Wake-up frame
1897 * is received. Anyway, it's better to manually clear
1898 * this bit because it can generate problems while resuming
1899 * from another devices (e.g. serial console). */
1900 if (device_may_wakeup(&(pdev
->dev
)))
1901 if (priv
->wolenabled
== PMT_SUPPORTED
)
1902 priv
->hw
->mac
->pmt(dev
->base_addr
, 0);
1904 netif_device_attach(dev
);
1906 /* Enable the MAC and DMA */
1907 stmmac_mac_enable_rx(ioaddr
);
1908 stmmac_mac_enable_tx(ioaddr
);
1909 priv
->hw
->dma
->start_tx(ioaddr
);
1910 priv
->hw
->dma
->start_rx(ioaddr
);
1912 #ifdef CONFIG_STMMAC_TIMER
1913 priv
->tm
->timer_start(tmrate
);
1915 napi_enable(&priv
->napi
);
1918 phy_start(priv
->phydev
);
1920 netif_start_queue(dev
);
1923 spin_unlock(&priv
->lock
);
1928 static struct platform_driver stmmac_driver
= {
1930 .name
= STMMAC_RESOURCE_NAME
,
1932 .probe
= stmmac_dvr_probe
,
1933 .remove
= stmmac_dvr_remove
,
1935 .suspend
= stmmac_suspend
,
1936 .resume
= stmmac_resume
,
1942 * stmmac_init_module - Entry point for the driver
1943 * Description: This function is the entry point for the driver.
1945 static int __init
stmmac_init_module(void)
1949 if (platform_driver_register(&stmmacphy_driver
)) {
1950 pr_err("No PHY devices registered!\n");
1954 ret
= platform_driver_register(&stmmac_driver
);
1959 * stmmac_cleanup_module - Cleanup routine for the driver
1960 * Description: This function is the cleanup routine for the driver.
1962 static void __exit
stmmac_cleanup_module(void)
1964 platform_driver_unregister(&stmmacphy_driver
);
1965 platform_driver_unregister(&stmmac_driver
);
1969 static int __init
stmmac_cmdline_opt(char *str
)
1975 while ((opt
= strsep(&str
, ",")) != NULL
) {
1976 if (!strncmp(opt
, "debug:", 6))
1977 strict_strtoul(opt
+ 6, 0, (unsigned long *)&debug
);
1978 else if (!strncmp(opt
, "phyaddr:", 8))
1979 strict_strtoul(opt
+ 8, 0, (unsigned long *)&phyaddr
);
1980 else if (!strncmp(opt
, "dma_txsize:", 11))
1981 strict_strtoul(opt
+ 11, 0,
1982 (unsigned long *)&dma_txsize
);
1983 else if (!strncmp(opt
, "dma_rxsize:", 11))
1984 strict_strtoul(opt
+ 11, 0,
1985 (unsigned long *)&dma_rxsize
);
1986 else if (!strncmp(opt
, "buf_sz:", 7))
1987 strict_strtoul(opt
+ 7, 0, (unsigned long *)&buf_sz
);
1988 else if (!strncmp(opt
, "tc:", 3))
1989 strict_strtoul(opt
+ 3, 0, (unsigned long *)&tc
);
1990 else if (!strncmp(opt
, "tx_coe:", 7))
1991 strict_strtoul(opt
+ 7, 0, (unsigned long *)&tx_coe
);
1992 else if (!strncmp(opt
, "watchdog:", 9))
1993 strict_strtoul(opt
+ 9, 0, (unsigned long *)&watchdog
);
1994 else if (!strncmp(opt
, "flow_ctrl:", 10))
1995 strict_strtoul(opt
+ 10, 0,
1996 (unsigned long *)&flow_ctrl
);
1997 else if (!strncmp(opt
, "pause:", 6))
1998 strict_strtoul(opt
+ 6, 0, (unsigned long *)&pause
);
1999 #ifdef CONFIG_STMMAC_TIMER
2000 else if (!strncmp(opt
, "tmrate:", 7))
2001 strict_strtoul(opt
+ 7, 0, (unsigned long *)&tmrate
);
2007 __setup("stmmaceth=", stmmac_cmdline_opt
);
2010 module_init(stmmac_init_module
);
2011 module_exit(stmmac_cleanup_module
);
2013 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2014 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2015 MODULE_LICENSE("GPL");