1021108e9a255e5972cf1ee46c03d1bdeace03b1
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / smc91x.c
1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
4 *
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
29 *
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
32 *
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
35 *
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
40 *
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
59 */
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
62
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
67
68
69 #include <linux/config.h>
70 #include <linux/init.h>
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/sched.h>
74 #include <linux/slab.h>
75 #include <linux/delay.h>
76 #include <linux/interrupt.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/crc32.h>
80 #include <linux/platform_device.h>
81 #include <linux/spinlock.h>
82 #include <linux/ethtool.h>
83 #include <linux/mii.h>
84 #include <linux/workqueue.h>
85
86 #include <linux/netdevice.h>
87 #include <linux/etherdevice.h>
88 #include <linux/skbuff.h>
89
90 #include <asm/io.h>
91 #include <asm/irq.h>
92
93 #include "smc91x.h"
94
95 #ifdef CONFIG_ISA
96 /*
97 * the LAN91C111 can be at any of the following port addresses. To change,
98 * for a slightly different card, you can add it to the array. Keep in
99 * mind that the array must end in zero.
100 */
101 static unsigned int smc_portlist[] __initdata = {
102 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
103 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
104 };
105
106 #ifndef SMC_IOADDR
107 # define SMC_IOADDR -1
108 #endif
109 static unsigned long io = SMC_IOADDR;
110 module_param(io, ulong, 0400);
111 MODULE_PARM_DESC(io, "I/O base address");
112
113 #ifndef SMC_IRQ
114 # define SMC_IRQ -1
115 #endif
116 static int irq = SMC_IRQ;
117 module_param(irq, int, 0400);
118 MODULE_PARM_DESC(irq, "IRQ number");
119
120 #endif /* CONFIG_ISA */
121
122 #ifndef SMC_NOWAIT
123 # define SMC_NOWAIT 0
124 #endif
125 static int nowait = SMC_NOWAIT;
126 module_param(nowait, int, 0400);
127 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128
129 /*
130 * Transmit timeout, default 5 seconds.
131 */
132 static int watchdog = 1000;
133 module_param(watchdog, int, 0400);
134 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
135
136 MODULE_LICENSE("GPL");
137
138 /*
139 * The internal workings of the driver. If you are changing anything
140 * here with the SMC stuff, you should have the datasheet and know
141 * what you are doing.
142 */
143 #define CARDNAME "smc91x"
144
145 /*
146 * Use power-down feature of the chip
147 */
148 #define POWER_DOWN 1
149
150 /*
151 * Wait time for memory to be free. This probably shouldn't be
152 * tuned that much, as waiting for this means nothing else happens
153 * in the system
154 */
155 #define MEMORY_WAIT_TIME 16
156
157 /*
158 * The maximum number of processing loops allowed for each call to the
159 * IRQ handler.
160 */
161 #define MAX_IRQ_LOOPS 8
162
163 /*
164 * This selects whether TX packets are sent one by one to the SMC91x internal
165 * memory and throttled until transmission completes. This may prevent
166 * RX overruns a litle by keeping much of the memory free for RX packets
167 * but to the expense of reduced TX throughput and increased IRQ overhead.
168 * Note this is not a cure for a too slow data bus or too high IRQ latency.
169 */
170 #define THROTTLE_TX_PKTS 0
171
172 /*
173 * The MII clock high/low times. 2x this number gives the MII clock period
174 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
175 */
176 #define MII_DELAY 1
177
178 /* store this information for the driver.. */
179 struct smc_local {
180 /*
181 * If I have to wait until memory is available to send a
182 * packet, I will store the skbuff here, until I get the
183 * desired memory. Then, I'll send it out and free it.
184 */
185 struct sk_buff *pending_tx_skb;
186 struct tasklet_struct tx_task;
187
188 /*
189 * these are things that the kernel wants me to keep, so users
190 * can find out semi-useless statistics of how well the card is
191 * performing
192 */
193 struct net_device_stats stats;
194
195 /* version/revision of the SMC91x chip */
196 int version;
197
198 /* Contains the current active transmission mode */
199 int tcr_cur_mode;
200
201 /* Contains the current active receive mode */
202 int rcr_cur_mode;
203
204 /* Contains the current active receive/phy mode */
205 int rpc_cur_mode;
206 int ctl_rfduplx;
207 int ctl_rspeed;
208
209 u32 msg_enable;
210 u32 phy_type;
211 struct mii_if_info mii;
212
213 /* work queue */
214 struct work_struct phy_configure;
215 int work_pending;
216
217 spinlock_t lock;
218
219 #ifdef SMC_CAN_USE_DATACS
220 u32 __iomem *datacs;
221 #endif
222
223 #ifdef SMC_USE_PXA_DMA
224 /* DMA needs the physical address of the chip */
225 u_long physaddr;
226 #endif
227 void __iomem *base;
228 };
229
230 #if SMC_DEBUG > 0
231 #define DBG(n, args...) \
232 do { \
233 if (SMC_DEBUG >= (n)) \
234 printk(args); \
235 } while (0)
236
237 #define PRINTK(args...) printk(args)
238 #else
239 #define DBG(n, args...) do { } while(0)
240 #define PRINTK(args...) printk(KERN_DEBUG args)
241 #endif
242
243 #if SMC_DEBUG > 3
244 static void PRINT_PKT(u_char *buf, int length)
245 {
246 int i;
247 int remainder;
248 int lines;
249
250 lines = length / 16;
251 remainder = length % 16;
252
253 for (i = 0; i < lines ; i ++) {
254 int cur;
255 for (cur = 0; cur < 8; cur++) {
256 u_char a, b;
257 a = *buf++;
258 b = *buf++;
259 printk("%02x%02x ", a, b);
260 }
261 printk("\n");
262 }
263 for (i = 0; i < remainder/2 ; i++) {
264 u_char a, b;
265 a = *buf++;
266 b = *buf++;
267 printk("%02x%02x ", a, b);
268 }
269 printk("\n");
270 }
271 #else
272 #define PRINT_PKT(x...) do { } while(0)
273 #endif
274
275
276 /* this enables an interrupt in the interrupt mask register */
277 #define SMC_ENABLE_INT(x) do { \
278 unsigned char mask; \
279 spin_lock_irq(&lp->lock); \
280 mask = SMC_GET_INT_MASK(); \
281 mask |= (x); \
282 SMC_SET_INT_MASK(mask); \
283 spin_unlock_irq(&lp->lock); \
284 } while (0)
285
286 /* this disables an interrupt from the interrupt mask register */
287 #define SMC_DISABLE_INT(x) do { \
288 unsigned char mask; \
289 spin_lock_irq(&lp->lock); \
290 mask = SMC_GET_INT_MASK(); \
291 mask &= ~(x); \
292 SMC_SET_INT_MASK(mask); \
293 spin_unlock_irq(&lp->lock); \
294 } while (0)
295
296 /*
297 * Wait while MMU is busy. This is usually in the order of a few nanosecs
298 * if at all, but let's avoid deadlocking the system if the hardware
299 * decides to go south.
300 */
301 #define SMC_WAIT_MMU_BUSY() do { \
302 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
303 unsigned long timeout = jiffies + 2; \
304 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
305 if (time_after(jiffies, timeout)) { \
306 printk("%s: timeout %s line %d\n", \
307 dev->name, __FILE__, __LINE__); \
308 break; \
309 } \
310 cpu_relax(); \
311 } \
312 } \
313 } while (0)
314
315
316 /*
317 * this does a soft reset on the device
318 */
319 static void smc_reset(struct net_device *dev)
320 {
321 struct smc_local *lp = netdev_priv(dev);
322 void __iomem *ioaddr = lp->base;
323 unsigned int ctl, cfg;
324 struct sk_buff *pending_skb;
325
326 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
327
328 /* Disable all interrupts, block TX tasklet */
329 spin_lock(&lp->lock);
330 SMC_SELECT_BANK(2);
331 SMC_SET_INT_MASK(0);
332 pending_skb = lp->pending_tx_skb;
333 lp->pending_tx_skb = NULL;
334 spin_unlock(&lp->lock);
335
336 /* free any pending tx skb */
337 if (pending_skb) {
338 dev_kfree_skb(pending_skb);
339 lp->stats.tx_errors++;
340 lp->stats.tx_aborted_errors++;
341 }
342
343 /*
344 * This resets the registers mostly to defaults, but doesn't
345 * affect EEPROM. That seems unnecessary
346 */
347 SMC_SELECT_BANK(0);
348 SMC_SET_RCR(RCR_SOFTRST);
349
350 /*
351 * Setup the Configuration Register
352 * This is necessary because the CONFIG_REG is not affected
353 * by a soft reset
354 */
355 SMC_SELECT_BANK(1);
356
357 cfg = CONFIG_DEFAULT;
358
359 /*
360 * Setup for fast accesses if requested. If the card/system
361 * can't handle it then there will be no recovery except for
362 * a hard reset or power cycle
363 */
364 if (nowait)
365 cfg |= CONFIG_NO_WAIT;
366
367 /*
368 * Release from possible power-down state
369 * Configuration register is not affected by Soft Reset
370 */
371 cfg |= CONFIG_EPH_POWER_EN;
372
373 SMC_SET_CONFIG(cfg);
374
375 /* this should pause enough for the chip to be happy */
376 /*
377 * elaborate? What does the chip _need_? --jgarzik
378 *
379 * This seems to be undocumented, but something the original
380 * driver(s) have always done. Suspect undocumented timing
381 * info/determined empirically. --rmk
382 */
383 udelay(1);
384
385 /* Disable transmit and receive functionality */
386 SMC_SELECT_BANK(0);
387 SMC_SET_RCR(RCR_CLEAR);
388 SMC_SET_TCR(TCR_CLEAR);
389
390 SMC_SELECT_BANK(1);
391 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
392
393 /*
394 * Set the control register to automatically release successfully
395 * transmitted packets, to make the best use out of our limited
396 * memory
397 */
398 if(!THROTTLE_TX_PKTS)
399 ctl |= CTL_AUTO_RELEASE;
400 else
401 ctl &= ~CTL_AUTO_RELEASE;
402 SMC_SET_CTL(ctl);
403
404 /* Reset the MMU */
405 SMC_SELECT_BANK(2);
406 SMC_SET_MMU_CMD(MC_RESET);
407 SMC_WAIT_MMU_BUSY();
408 }
409
410 /*
411 * Enable Interrupts, Receive, and Transmit
412 */
413 static void smc_enable(struct net_device *dev)
414 {
415 struct smc_local *lp = netdev_priv(dev);
416 void __iomem *ioaddr = lp->base;
417 int mask;
418
419 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
420
421 /* see the header file for options in TCR/RCR DEFAULT */
422 SMC_SELECT_BANK(0);
423 SMC_SET_TCR(lp->tcr_cur_mode);
424 SMC_SET_RCR(lp->rcr_cur_mode);
425
426 SMC_SELECT_BANK(1);
427 SMC_SET_MAC_ADDR(dev->dev_addr);
428
429 /* now, enable interrupts */
430 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
431 if (lp->version >= (CHIP_91100 << 4))
432 mask |= IM_MDINT;
433 SMC_SELECT_BANK(2);
434 SMC_SET_INT_MASK(mask);
435
436 /*
437 * From this point the register bank must _NOT_ be switched away
438 * to something else than bank 2 without proper locking against
439 * races with any tasklet or interrupt handlers until smc_shutdown()
440 * or smc_reset() is called.
441 */
442 }
443
444 /*
445 * this puts the device in an inactive state
446 */
447 static void smc_shutdown(struct net_device *dev)
448 {
449 struct smc_local *lp = netdev_priv(dev);
450 void __iomem *ioaddr = lp->base;
451 struct sk_buff *pending_skb;
452
453 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
454
455 /* no more interrupts for me */
456 spin_lock(&lp->lock);
457 SMC_SELECT_BANK(2);
458 SMC_SET_INT_MASK(0);
459 pending_skb = lp->pending_tx_skb;
460 lp->pending_tx_skb = NULL;
461 spin_unlock(&lp->lock);
462 if (pending_skb)
463 dev_kfree_skb(pending_skb);
464
465 /* and tell the card to stay away from that nasty outside world */
466 SMC_SELECT_BANK(0);
467 SMC_SET_RCR(RCR_CLEAR);
468 SMC_SET_TCR(TCR_CLEAR);
469
470 #ifdef POWER_DOWN
471 /* finally, shut the chip down */
472 SMC_SELECT_BANK(1);
473 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
474 #endif
475 }
476
477 /*
478 * This is the procedure to handle the receipt of a packet.
479 */
480 static inline void smc_rcv(struct net_device *dev)
481 {
482 struct smc_local *lp = netdev_priv(dev);
483 void __iomem *ioaddr = lp->base;
484 unsigned int packet_number, status, packet_len;
485
486 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
487
488 packet_number = SMC_GET_RXFIFO();
489 if (unlikely(packet_number & RXFIFO_REMPTY)) {
490 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
491 return;
492 }
493
494 /* read from start of packet */
495 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
496
497 /* First two words are status and packet length */
498 SMC_GET_PKT_HDR(status, packet_len);
499 packet_len &= 0x07ff; /* mask off top bits */
500 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
501 dev->name, packet_number, status,
502 packet_len, packet_len);
503
504 back:
505 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
506 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
507 /* accept VLAN packets */
508 status &= ~RS_TOOLONG;
509 goto back;
510 }
511 if (packet_len < 6) {
512 /* bloody hardware */
513 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
514 dev->name, packet_len, status);
515 status |= RS_TOOSHORT;
516 }
517 SMC_WAIT_MMU_BUSY();
518 SMC_SET_MMU_CMD(MC_RELEASE);
519 lp->stats.rx_errors++;
520 if (status & RS_ALGNERR)
521 lp->stats.rx_frame_errors++;
522 if (status & (RS_TOOSHORT | RS_TOOLONG))
523 lp->stats.rx_length_errors++;
524 if (status & RS_BADCRC)
525 lp->stats.rx_crc_errors++;
526 } else {
527 struct sk_buff *skb;
528 unsigned char *data;
529 unsigned int data_len;
530
531 /* set multicast stats */
532 if (status & RS_MULTICAST)
533 lp->stats.multicast++;
534
535 /*
536 * Actual payload is packet_len - 6 (or 5 if odd byte).
537 * We want skb_reserve(2) and the final ctrl word
538 * (2 bytes, possibly containing the payload odd byte).
539 * Furthermore, we add 2 bytes to allow rounding up to
540 * multiple of 4 bytes on 32 bit buses.
541 * Hence packet_len - 6 + 2 + 2 + 2.
542 */
543 skb = dev_alloc_skb(packet_len);
544 if (unlikely(skb == NULL)) {
545 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
546 dev->name);
547 SMC_WAIT_MMU_BUSY();
548 SMC_SET_MMU_CMD(MC_RELEASE);
549 lp->stats.rx_dropped++;
550 return;
551 }
552
553 /* Align IP header to 32 bits */
554 skb_reserve(skb, 2);
555
556 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
557 if (lp->version == 0x90)
558 status |= RS_ODDFRAME;
559
560 /*
561 * If odd length: packet_len - 5,
562 * otherwise packet_len - 6.
563 * With the trailing ctrl byte it's packet_len - 4.
564 */
565 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
566 data = skb_put(skb, data_len);
567 SMC_PULL_DATA(data, packet_len - 4);
568
569 SMC_WAIT_MMU_BUSY();
570 SMC_SET_MMU_CMD(MC_RELEASE);
571
572 PRINT_PKT(data, packet_len - 4);
573
574 dev->last_rx = jiffies;
575 skb->dev = dev;
576 skb->protocol = eth_type_trans(skb, dev);
577 netif_rx(skb);
578 lp->stats.rx_packets++;
579 lp->stats.rx_bytes += data_len;
580 }
581 }
582
583 #ifdef CONFIG_SMP
584 /*
585 * On SMP we have the following problem:
586 *
587 * A = smc_hardware_send_pkt()
588 * B = smc_hard_start_xmit()
589 * C = smc_interrupt()
590 *
591 * A and B can never be executed simultaneously. However, at least on UP,
592 * it is possible (and even desirable) for C to interrupt execution of
593 * A or B in order to have better RX reliability and avoid overruns.
594 * C, just like A and B, must have exclusive access to the chip and
595 * each of them must lock against any other concurrent access.
596 * Unfortunately this is not possible to have C suspend execution of A or
597 * B taking place on another CPU. On UP this is no an issue since A and B
598 * are run from softirq context and C from hard IRQ context, and there is
599 * no other CPU where concurrent access can happen.
600 * If ever there is a way to force at least B and C to always be executed
601 * on the same CPU then we could use read/write locks to protect against
602 * any other concurrent access and C would always interrupt B. But life
603 * isn't that easy in a SMP world...
604 */
605 #define smc_special_trylock(lock) \
606 ({ \
607 int __ret; \
608 local_irq_disable(); \
609 __ret = spin_trylock(lock); \
610 if (!__ret) \
611 local_irq_enable(); \
612 __ret; \
613 })
614 #define smc_special_lock(lock) spin_lock_irq(lock)
615 #define smc_special_unlock(lock) spin_unlock_irq(lock)
616 #else
617 #define smc_special_trylock(lock) (1)
618 #define smc_special_lock(lock) do { } while (0)
619 #define smc_special_unlock(lock) do { } while (0)
620 #endif
621
622 /*
623 * This is called to actually send a packet to the chip.
624 */
625 static void smc_hardware_send_pkt(unsigned long data)
626 {
627 struct net_device *dev = (struct net_device *)data;
628 struct smc_local *lp = netdev_priv(dev);
629 void __iomem *ioaddr = lp->base;
630 struct sk_buff *skb;
631 unsigned int packet_no, len;
632 unsigned char *buf;
633
634 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
635
636 if (!smc_special_trylock(&lp->lock)) {
637 netif_stop_queue(dev);
638 tasklet_schedule(&lp->tx_task);
639 return;
640 }
641
642 skb = lp->pending_tx_skb;
643 if (unlikely(!skb)) {
644 smc_special_unlock(&lp->lock);
645 return;
646 }
647 lp->pending_tx_skb = NULL;
648
649 packet_no = SMC_GET_AR();
650 if (unlikely(packet_no & AR_FAILED)) {
651 printk("%s: Memory allocation failed.\n", dev->name);
652 lp->stats.tx_errors++;
653 lp->stats.tx_fifo_errors++;
654 smc_special_unlock(&lp->lock);
655 goto done;
656 }
657
658 /* point to the beginning of the packet */
659 SMC_SET_PN(packet_no);
660 SMC_SET_PTR(PTR_AUTOINC);
661
662 buf = skb->data;
663 len = skb->len;
664 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
665 dev->name, packet_no, len, len, buf);
666 PRINT_PKT(buf, len);
667
668 /*
669 * Send the packet length (+6 for status words, length, and ctl.
670 * The card will pad to 64 bytes with zeroes if packet is too small.
671 */
672 SMC_PUT_PKT_HDR(0, len + 6);
673
674 /* send the actual data */
675 SMC_PUSH_DATA(buf, len & ~1);
676
677 /* Send final ctl word with the last byte if there is one */
678 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
679
680 /*
681 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
682 * have the effect of having at most one packet queued for TX
683 * in the chip's memory at all time.
684 *
685 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
686 * when memory allocation (MC_ALLOC) does not succeed right away.
687 */
688 if (THROTTLE_TX_PKTS)
689 netif_stop_queue(dev);
690
691 /* queue the packet for TX */
692 SMC_SET_MMU_CMD(MC_ENQUEUE);
693 smc_special_unlock(&lp->lock);
694
695 dev->trans_start = jiffies;
696 lp->stats.tx_packets++;
697 lp->stats.tx_bytes += len;
698
699 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
700
701 done: if (!THROTTLE_TX_PKTS)
702 netif_wake_queue(dev);
703
704 dev_kfree_skb(skb);
705 }
706
707 /*
708 * Since I am not sure if I will have enough room in the chip's ram
709 * to store the packet, I call this routine which either sends it
710 * now, or set the card to generates an interrupt when ready
711 * for the packet.
712 */
713 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
714 {
715 struct smc_local *lp = netdev_priv(dev);
716 void __iomem *ioaddr = lp->base;
717 unsigned int numPages, poll_count, status;
718
719 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
720
721 BUG_ON(lp->pending_tx_skb != NULL);
722
723 /*
724 * The MMU wants the number of pages to be the number of 256 bytes
725 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
726 *
727 * The 91C111 ignores the size bits, but earlier models don't.
728 *
729 * Pkt size for allocating is data length +6 (for additional status
730 * words, length and ctl)
731 *
732 * If odd size then last byte is included in ctl word.
733 */
734 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
735 if (unlikely(numPages > 7)) {
736 printk("%s: Far too big packet error.\n", dev->name);
737 lp->stats.tx_errors++;
738 lp->stats.tx_dropped++;
739 dev_kfree_skb(skb);
740 return 0;
741 }
742
743 smc_special_lock(&lp->lock);
744
745 /* now, try to allocate the memory */
746 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
747
748 /*
749 * Poll the chip for a short amount of time in case the
750 * allocation succeeds quickly.
751 */
752 poll_count = MEMORY_WAIT_TIME;
753 do {
754 status = SMC_GET_INT();
755 if (status & IM_ALLOC_INT) {
756 SMC_ACK_INT(IM_ALLOC_INT);
757 break;
758 }
759 } while (--poll_count);
760
761 smc_special_unlock(&lp->lock);
762
763 lp->pending_tx_skb = skb;
764 if (!poll_count) {
765 /* oh well, wait until the chip finds memory later */
766 netif_stop_queue(dev);
767 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
768 SMC_ENABLE_INT(IM_ALLOC_INT);
769 } else {
770 /*
771 * Allocation succeeded: push packet to the chip's own memory
772 * immediately.
773 */
774 smc_hardware_send_pkt((unsigned long)dev);
775 }
776
777 return 0;
778 }
779
780 /*
781 * This handles a TX interrupt, which is only called when:
782 * - a TX error occurred, or
783 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
784 */
785 static void smc_tx(struct net_device *dev)
786 {
787 struct smc_local *lp = netdev_priv(dev);
788 void __iomem *ioaddr = lp->base;
789 unsigned int saved_packet, packet_no, tx_status, pkt_len;
790
791 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
792
793 /* If the TX FIFO is empty then nothing to do */
794 packet_no = SMC_GET_TXFIFO();
795 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
796 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
797 return;
798 }
799
800 /* select packet to read from */
801 saved_packet = SMC_GET_PN();
802 SMC_SET_PN(packet_no);
803
804 /* read the first word (status word) from this packet */
805 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
806 SMC_GET_PKT_HDR(tx_status, pkt_len);
807 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
808 dev->name, tx_status, packet_no);
809
810 if (!(tx_status & ES_TX_SUC))
811 lp->stats.tx_errors++;
812
813 if (tx_status & ES_LOSTCARR)
814 lp->stats.tx_carrier_errors++;
815
816 if (tx_status & (ES_LATCOL | ES_16COL)) {
817 PRINTK("%s: %s occurred on last xmit\n", dev->name,
818 (tx_status & ES_LATCOL) ?
819 "late collision" : "too many collisions");
820 lp->stats.tx_window_errors++;
821 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
822 printk(KERN_INFO "%s: unexpectedly large number of "
823 "bad collisions. Please check duplex "
824 "setting.\n", dev->name);
825 }
826 }
827
828 /* kill the packet */
829 SMC_WAIT_MMU_BUSY();
830 SMC_SET_MMU_CMD(MC_FREEPKT);
831
832 /* Don't restore Packet Number Reg until busy bit is cleared */
833 SMC_WAIT_MMU_BUSY();
834 SMC_SET_PN(saved_packet);
835
836 /* re-enable transmit */
837 SMC_SELECT_BANK(0);
838 SMC_SET_TCR(lp->tcr_cur_mode);
839 SMC_SELECT_BANK(2);
840 }
841
842
843 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
844
845 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
846 {
847 struct smc_local *lp = netdev_priv(dev);
848 void __iomem *ioaddr = lp->base;
849 unsigned int mii_reg, mask;
850
851 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
852 mii_reg |= MII_MDOE;
853
854 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
855 if (val & mask)
856 mii_reg |= MII_MDO;
857 else
858 mii_reg &= ~MII_MDO;
859
860 SMC_SET_MII(mii_reg);
861 udelay(MII_DELAY);
862 SMC_SET_MII(mii_reg | MII_MCLK);
863 udelay(MII_DELAY);
864 }
865 }
866
867 static unsigned int smc_mii_in(struct net_device *dev, int bits)
868 {
869 struct smc_local *lp = netdev_priv(dev);
870 void __iomem *ioaddr = lp->base;
871 unsigned int mii_reg, mask, val;
872
873 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
874 SMC_SET_MII(mii_reg);
875
876 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
877 if (SMC_GET_MII() & MII_MDI)
878 val |= mask;
879
880 SMC_SET_MII(mii_reg);
881 udelay(MII_DELAY);
882 SMC_SET_MII(mii_reg | MII_MCLK);
883 udelay(MII_DELAY);
884 }
885
886 return val;
887 }
888
889 /*
890 * Reads a register from the MII Management serial interface
891 */
892 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
893 {
894 struct smc_local *lp = netdev_priv(dev);
895 void __iomem *ioaddr = lp->base;
896 unsigned int phydata;
897
898 SMC_SELECT_BANK(3);
899
900 /* Idle - 32 ones */
901 smc_mii_out(dev, 0xffffffff, 32);
902
903 /* Start code (01) + read (10) + phyaddr + phyreg */
904 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
905
906 /* Turnaround (2bits) + phydata */
907 phydata = smc_mii_in(dev, 18);
908
909 /* Return to idle state */
910 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
911
912 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
913 __FUNCTION__, phyaddr, phyreg, phydata);
914
915 SMC_SELECT_BANK(2);
916 return phydata;
917 }
918
919 /*
920 * Writes a register to the MII Management serial interface
921 */
922 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
923 int phydata)
924 {
925 struct smc_local *lp = netdev_priv(dev);
926 void __iomem *ioaddr = lp->base;
927
928 SMC_SELECT_BANK(3);
929
930 /* Idle - 32 ones */
931 smc_mii_out(dev, 0xffffffff, 32);
932
933 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
934 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
935
936 /* Return to idle state */
937 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
938
939 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
940 __FUNCTION__, phyaddr, phyreg, phydata);
941
942 SMC_SELECT_BANK(2);
943 }
944
945 /*
946 * Finds and reports the PHY address
947 */
948 static void smc_phy_detect(struct net_device *dev)
949 {
950 struct smc_local *lp = netdev_priv(dev);
951 int phyaddr;
952
953 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
954
955 lp->phy_type = 0;
956
957 /*
958 * Scan all 32 PHY addresses if necessary, starting at
959 * PHY#1 to PHY#31, and then PHY#0 last.
960 */
961 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
962 unsigned int id1, id2;
963
964 /* Read the PHY identifiers */
965 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
966 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
967
968 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
969 dev->name, id1, id2);
970
971 /* Make sure it is a valid identifier */
972 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
973 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
974 /* Save the PHY's address */
975 lp->mii.phy_id = phyaddr & 31;
976 lp->phy_type = id1 << 16 | id2;
977 break;
978 }
979 }
980 }
981
982 /*
983 * Sets the PHY to a configuration as determined by the user
984 */
985 static int smc_phy_fixed(struct net_device *dev)
986 {
987 struct smc_local *lp = netdev_priv(dev);
988 void __iomem *ioaddr = lp->base;
989 int phyaddr = lp->mii.phy_id;
990 int bmcr, cfg1;
991
992 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
993
994 /* Enter Link Disable state */
995 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
996 cfg1 |= PHY_CFG1_LNKDIS;
997 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
998
999 /*
1000 * Set our fixed capabilities
1001 * Disable auto-negotiation
1002 */
1003 bmcr = 0;
1004
1005 if (lp->ctl_rfduplx)
1006 bmcr |= BMCR_FULLDPLX;
1007
1008 if (lp->ctl_rspeed == 100)
1009 bmcr |= BMCR_SPEED100;
1010
1011 /* Write our capabilities to the phy control register */
1012 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1013
1014 /* Re-Configure the Receive/Phy Control register */
1015 SMC_SELECT_BANK(0);
1016 SMC_SET_RPC(lp->rpc_cur_mode);
1017 SMC_SELECT_BANK(2);
1018
1019 return 1;
1020 }
1021
1022 /*
1023 * smc_phy_reset - reset the phy
1024 * @dev: net device
1025 * @phy: phy address
1026 *
1027 * Issue a software reset for the specified PHY and
1028 * wait up to 100ms for the reset to complete. We should
1029 * not access the PHY for 50ms after issuing the reset.
1030 *
1031 * The time to wait appears to be dependent on the PHY.
1032 *
1033 * Must be called with lp->lock locked.
1034 */
1035 static int smc_phy_reset(struct net_device *dev, int phy)
1036 {
1037 struct smc_local *lp = netdev_priv(dev);
1038 unsigned int bmcr;
1039 int timeout;
1040
1041 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1042
1043 for (timeout = 2; timeout; timeout--) {
1044 spin_unlock_irq(&lp->lock);
1045 msleep(50);
1046 spin_lock_irq(&lp->lock);
1047
1048 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1049 if (!(bmcr & BMCR_RESET))
1050 break;
1051 }
1052
1053 return bmcr & BMCR_RESET;
1054 }
1055
1056 /*
1057 * smc_phy_powerdown - powerdown phy
1058 * @dev: net device
1059 *
1060 * Power down the specified PHY
1061 */
1062 static void smc_phy_powerdown(struct net_device *dev)
1063 {
1064 struct smc_local *lp = netdev_priv(dev);
1065 unsigned int bmcr;
1066 int phy = lp->mii.phy_id;
1067
1068 if (lp->phy_type == 0)
1069 return;
1070
1071 /* We need to ensure that no calls to smc_phy_configure are
1072 pending.
1073
1074 flush_scheduled_work() cannot be called because we are
1075 running with the netlink semaphore held (from
1076 devinet_ioctl()) and the pending work queue contains
1077 linkwatch_event() (scheduled by netif_carrier_off()
1078 above). linkwatch_event() also wants the netlink semaphore.
1079 */
1080 while(lp->work_pending)
1081 yield();
1082
1083 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1084 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1085 }
1086
1087 /*
1088 * smc_phy_check_media - check the media status and adjust TCR
1089 * @dev: net device
1090 * @init: set true for initialisation
1091 *
1092 * Select duplex mode depending on negotiation state. This
1093 * also updates our carrier state.
1094 */
1095 static void smc_phy_check_media(struct net_device *dev, int init)
1096 {
1097 struct smc_local *lp = netdev_priv(dev);
1098 void __iomem *ioaddr = lp->base;
1099
1100 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1101 /* duplex state has changed */
1102 if (lp->mii.full_duplex) {
1103 lp->tcr_cur_mode |= TCR_SWFDUP;
1104 } else {
1105 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1106 }
1107
1108 SMC_SELECT_BANK(0);
1109 SMC_SET_TCR(lp->tcr_cur_mode);
1110 }
1111 }
1112
1113 /*
1114 * Configures the specified PHY through the MII management interface
1115 * using Autonegotiation.
1116 * Calls smc_phy_fixed() if the user has requested a certain config.
1117 * If RPC ANEG bit is set, the media selection is dependent purely on
1118 * the selection by the MII (either in the MII BMCR reg or the result
1119 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1120 * is controlled by the RPC SPEED and RPC DPLX bits.
1121 */
1122 static void smc_phy_configure(void *data)
1123 {
1124 struct net_device *dev = data;
1125 struct smc_local *lp = netdev_priv(dev);
1126 void __iomem *ioaddr = lp->base;
1127 int phyaddr = lp->mii.phy_id;
1128 int my_phy_caps; /* My PHY capabilities */
1129 int my_ad_caps; /* My Advertised capabilities */
1130 int status;
1131
1132 DBG(3, "%s:smc_program_phy()\n", dev->name);
1133
1134 spin_lock_irq(&lp->lock);
1135
1136 /*
1137 * We should not be called if phy_type is zero.
1138 */
1139 if (lp->phy_type == 0)
1140 goto smc_phy_configure_exit;
1141
1142 if (smc_phy_reset(dev, phyaddr)) {
1143 printk("%s: PHY reset timed out\n", dev->name);
1144 goto smc_phy_configure_exit;
1145 }
1146
1147 /*
1148 * Enable PHY Interrupts (for register 18)
1149 * Interrupts listed here are disabled
1150 */
1151 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1152 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1153 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1154 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1155
1156 /* Configure the Receive/Phy Control register */
1157 SMC_SELECT_BANK(0);
1158 SMC_SET_RPC(lp->rpc_cur_mode);
1159
1160 /* If the user requested no auto neg, then go set his request */
1161 if (lp->mii.force_media) {
1162 smc_phy_fixed(dev);
1163 goto smc_phy_configure_exit;
1164 }
1165
1166 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1167 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1168
1169 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1170 printk(KERN_INFO "Auto negotiation NOT supported\n");
1171 smc_phy_fixed(dev);
1172 goto smc_phy_configure_exit;
1173 }
1174
1175 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1176
1177 if (my_phy_caps & BMSR_100BASE4)
1178 my_ad_caps |= ADVERTISE_100BASE4;
1179 if (my_phy_caps & BMSR_100FULL)
1180 my_ad_caps |= ADVERTISE_100FULL;
1181 if (my_phy_caps & BMSR_100HALF)
1182 my_ad_caps |= ADVERTISE_100HALF;
1183 if (my_phy_caps & BMSR_10FULL)
1184 my_ad_caps |= ADVERTISE_10FULL;
1185 if (my_phy_caps & BMSR_10HALF)
1186 my_ad_caps |= ADVERTISE_10HALF;
1187
1188 /* Disable capabilities not selected by our user */
1189 if (lp->ctl_rspeed != 100)
1190 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1191
1192 if (!lp->ctl_rfduplx)
1193 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1194
1195 /* Update our Auto-Neg Advertisement Register */
1196 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1197 lp->mii.advertising = my_ad_caps;
1198
1199 /*
1200 * Read the register back. Without this, it appears that when
1201 * auto-negotiation is restarted, sometimes it isn't ready and
1202 * the link does not come up.
1203 */
1204 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1205
1206 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1207 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1208
1209 /* Restart auto-negotiation process in order to advertise my caps */
1210 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1211
1212 smc_phy_check_media(dev, 1);
1213
1214 smc_phy_configure_exit:
1215 spin_unlock_irq(&lp->lock);
1216 lp->work_pending = 0;
1217 }
1218
1219 /*
1220 * smc_phy_interrupt
1221 *
1222 * Purpose: Handle interrupts relating to PHY register 18. This is
1223 * called from the "hard" interrupt handler under our private spinlock.
1224 */
1225 static void smc_phy_interrupt(struct net_device *dev)
1226 {
1227 struct smc_local *lp = netdev_priv(dev);
1228 int phyaddr = lp->mii.phy_id;
1229 int phy18;
1230
1231 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1232
1233 if (lp->phy_type == 0)
1234 return;
1235
1236 for(;;) {
1237 smc_phy_check_media(dev, 0);
1238
1239 /* Read PHY Register 18, Status Output */
1240 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1241 if ((phy18 & PHY_INT_INT) == 0)
1242 break;
1243 }
1244 }
1245
1246 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1247
1248 static void smc_10bt_check_media(struct net_device *dev, int init)
1249 {
1250 struct smc_local *lp = netdev_priv(dev);
1251 void __iomem *ioaddr = lp->base;
1252 unsigned int old_carrier, new_carrier;
1253
1254 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1255
1256 SMC_SELECT_BANK(0);
1257 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1258 SMC_SELECT_BANK(2);
1259
1260 if (init || (old_carrier != new_carrier)) {
1261 if (!new_carrier) {
1262 netif_carrier_off(dev);
1263 } else {
1264 netif_carrier_on(dev);
1265 }
1266 if (netif_msg_link(lp))
1267 printk(KERN_INFO "%s: link %s\n", dev->name,
1268 new_carrier ? "up" : "down");
1269 }
1270 }
1271
1272 static void smc_eph_interrupt(struct net_device *dev)
1273 {
1274 struct smc_local *lp = netdev_priv(dev);
1275 void __iomem *ioaddr = lp->base;
1276 unsigned int ctl;
1277
1278 smc_10bt_check_media(dev, 0);
1279
1280 SMC_SELECT_BANK(1);
1281 ctl = SMC_GET_CTL();
1282 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1283 SMC_SET_CTL(ctl);
1284 SMC_SELECT_BANK(2);
1285 }
1286
1287 /*
1288 * This is the main routine of the driver, to handle the device when
1289 * it needs some attention.
1290 */
1291 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1292 {
1293 struct net_device *dev = dev_id;
1294 struct smc_local *lp = netdev_priv(dev);
1295 void __iomem *ioaddr = lp->base;
1296 int status, mask, timeout, card_stats;
1297 int saved_pointer;
1298
1299 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1300
1301 spin_lock(&lp->lock);
1302
1303 /* A preamble may be used when there is a potential race
1304 * between the interruptible transmit functions and this
1305 * ISR. */
1306 SMC_INTERRUPT_PREAMBLE;
1307
1308 saved_pointer = SMC_GET_PTR();
1309 mask = SMC_GET_INT_MASK();
1310 SMC_SET_INT_MASK(0);
1311
1312 /* set a timeout value, so I don't stay here forever */
1313 timeout = MAX_IRQ_LOOPS;
1314
1315 do {
1316 status = SMC_GET_INT();
1317
1318 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1319 dev->name, status, mask,
1320 ({ int meminfo; SMC_SELECT_BANK(0);
1321 meminfo = SMC_GET_MIR();
1322 SMC_SELECT_BANK(2); meminfo; }),
1323 SMC_GET_FIFO());
1324
1325 status &= mask;
1326 if (!status)
1327 break;
1328
1329 if (status & IM_TX_INT) {
1330 /* do this before RX as it will free memory quickly */
1331 DBG(3, "%s: TX int\n", dev->name);
1332 smc_tx(dev);
1333 SMC_ACK_INT(IM_TX_INT);
1334 if (THROTTLE_TX_PKTS)
1335 netif_wake_queue(dev);
1336 } else if (status & IM_RCV_INT) {
1337 DBG(3, "%s: RX irq\n", dev->name);
1338 smc_rcv(dev);
1339 } else if (status & IM_ALLOC_INT) {
1340 DBG(3, "%s: Allocation irq\n", dev->name);
1341 tasklet_hi_schedule(&lp->tx_task);
1342 mask &= ~IM_ALLOC_INT;
1343 } else if (status & IM_TX_EMPTY_INT) {
1344 DBG(3, "%s: TX empty\n", dev->name);
1345 mask &= ~IM_TX_EMPTY_INT;
1346
1347 /* update stats */
1348 SMC_SELECT_BANK(0);
1349 card_stats = SMC_GET_COUNTER();
1350 SMC_SELECT_BANK(2);
1351
1352 /* single collisions */
1353 lp->stats.collisions += card_stats & 0xF;
1354 card_stats >>= 4;
1355
1356 /* multiple collisions */
1357 lp->stats.collisions += card_stats & 0xF;
1358 } else if (status & IM_RX_OVRN_INT) {
1359 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1360 ({ int eph_st; SMC_SELECT_BANK(0);
1361 eph_st = SMC_GET_EPH_STATUS();
1362 SMC_SELECT_BANK(2); eph_st; }) );
1363 SMC_ACK_INT(IM_RX_OVRN_INT);
1364 lp->stats.rx_errors++;
1365 lp->stats.rx_fifo_errors++;
1366 } else if (status & IM_EPH_INT) {
1367 smc_eph_interrupt(dev);
1368 } else if (status & IM_MDINT) {
1369 SMC_ACK_INT(IM_MDINT);
1370 smc_phy_interrupt(dev);
1371 } else if (status & IM_ERCV_INT) {
1372 SMC_ACK_INT(IM_ERCV_INT);
1373 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1374 }
1375 } while (--timeout);
1376
1377 /* restore register states */
1378 SMC_SET_PTR(saved_pointer);
1379 SMC_SET_INT_MASK(mask);
1380 spin_unlock(&lp->lock);
1381
1382 if (timeout == MAX_IRQ_LOOPS)
1383 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1384 dev->name, mask);
1385 DBG(3, "%s: Interrupt done (%d loops)\n",
1386 dev->name, MAX_IRQ_LOOPS - timeout);
1387
1388 /*
1389 * We return IRQ_HANDLED unconditionally here even if there was
1390 * nothing to do. There is a possibility that a packet might
1391 * get enqueued into the chip right after TX_EMPTY_INT is raised
1392 * but just before the CPU acknowledges the IRQ.
1393 * Better take an unneeded IRQ in some occasions than complexifying
1394 * the code for all cases.
1395 */
1396 return IRQ_HANDLED;
1397 }
1398
1399 #ifdef CONFIG_NET_POLL_CONTROLLER
1400 /*
1401 * Polling receive - used by netconsole and other diagnostic tools
1402 * to allow network i/o with interrupts disabled.
1403 */
1404 static void smc_poll_controller(struct net_device *dev)
1405 {
1406 disable_irq(dev->irq);
1407 smc_interrupt(dev->irq, dev, NULL);
1408 enable_irq(dev->irq);
1409 }
1410 #endif
1411
1412 /* Our watchdog timed out. Called by the networking layer */
1413 static void smc_timeout(struct net_device *dev)
1414 {
1415 struct smc_local *lp = netdev_priv(dev);
1416 void __iomem *ioaddr = lp->base;
1417 int status, mask, eph_st, meminfo, fifo;
1418
1419 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1420
1421 spin_lock_irq(&lp->lock);
1422 status = SMC_GET_INT();
1423 mask = SMC_GET_INT_MASK();
1424 fifo = SMC_GET_FIFO();
1425 SMC_SELECT_BANK(0);
1426 eph_st = SMC_GET_EPH_STATUS();
1427 meminfo = SMC_GET_MIR();
1428 SMC_SELECT_BANK(2);
1429 spin_unlock_irq(&lp->lock);
1430 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1431 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1432 dev->name, status, mask, meminfo, fifo, eph_st );
1433
1434 smc_reset(dev);
1435 smc_enable(dev);
1436
1437 /*
1438 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1439 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1440 * which calls schedule(). Hence we use a work queue.
1441 */
1442 if (lp->phy_type != 0) {
1443 if (schedule_work(&lp->phy_configure)) {
1444 lp->work_pending = 1;
1445 }
1446 }
1447
1448 /* We can accept TX packets again */
1449 dev->trans_start = jiffies;
1450 netif_wake_queue(dev);
1451 }
1452
1453 /*
1454 * This routine will, depending on the values passed to it,
1455 * either make it accept multicast packets, go into
1456 * promiscuous mode (for TCPDUMP and cousins) or accept
1457 * a select set of multicast packets
1458 */
1459 static void smc_set_multicast_list(struct net_device *dev)
1460 {
1461 struct smc_local *lp = netdev_priv(dev);
1462 void __iomem *ioaddr = lp->base;
1463 unsigned char multicast_table[8];
1464 int update_multicast = 0;
1465
1466 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1467
1468 if (dev->flags & IFF_PROMISC) {
1469 DBG(2, "%s: RCR_PRMS\n", dev->name);
1470 lp->rcr_cur_mode |= RCR_PRMS;
1471 }
1472
1473 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1474 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1475 when promiscuous mode is turned on.
1476 */
1477
1478 /*
1479 * Here, I am setting this to accept all multicast packets.
1480 * I don't need to zero the multicast table, because the flag is
1481 * checked before the table is
1482 */
1483 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1484 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1485 lp->rcr_cur_mode |= RCR_ALMUL;
1486 }
1487
1488 /*
1489 * This sets the internal hardware table to filter out unwanted
1490 * multicast packets before they take up memory.
1491 *
1492 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1493 * address are the offset into the table. If that bit is 1, then the
1494 * multicast packet is accepted. Otherwise, it's dropped silently.
1495 *
1496 * To use the 6 bits as an offset into the table, the high 3 bits are
1497 * the number of the 8 bit register, while the low 3 bits are the bit
1498 * within that register.
1499 */
1500 else if (dev->mc_count) {
1501 int i;
1502 struct dev_mc_list *cur_addr;
1503
1504 /* table for flipping the order of 3 bits */
1505 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1506
1507 /* start with a table of all zeros: reject all */
1508 memset(multicast_table, 0, sizeof(multicast_table));
1509
1510 cur_addr = dev->mc_list;
1511 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1512 int position;
1513
1514 /* do we have a pointer here? */
1515 if (!cur_addr)
1516 break;
1517 /* make sure this is a multicast address -
1518 shouldn't this be a given if we have it here ? */
1519 if (!(*cur_addr->dmi_addr & 1))
1520 continue;
1521
1522 /* only use the low order bits */
1523 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1524
1525 /* do some messy swapping to put the bit in the right spot */
1526 multicast_table[invert3[position&7]] |=
1527 (1<<invert3[(position>>3)&7]);
1528 }
1529
1530 /* be sure I get rid of flags I might have set */
1531 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1532
1533 /* now, the table can be loaded into the chipset */
1534 update_multicast = 1;
1535 } else {
1536 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1537 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1538
1539 /*
1540 * since I'm disabling all multicast entirely, I need to
1541 * clear the multicast list
1542 */
1543 memset(multicast_table, 0, sizeof(multicast_table));
1544 update_multicast = 1;
1545 }
1546
1547 spin_lock_irq(&lp->lock);
1548 SMC_SELECT_BANK(0);
1549 SMC_SET_RCR(lp->rcr_cur_mode);
1550 if (update_multicast) {
1551 SMC_SELECT_BANK(3);
1552 SMC_SET_MCAST(multicast_table);
1553 }
1554 SMC_SELECT_BANK(2);
1555 spin_unlock_irq(&lp->lock);
1556 }
1557
1558
1559 /*
1560 * Open and Initialize the board
1561 *
1562 * Set up everything, reset the card, etc..
1563 */
1564 static int
1565 smc_open(struct net_device *dev)
1566 {
1567 struct smc_local *lp = netdev_priv(dev);
1568
1569 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1570
1571 /*
1572 * Check that the address is valid. If its not, refuse
1573 * to bring the device up. The user must specify an
1574 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1575 */
1576 if (!is_valid_ether_addr(dev->dev_addr)) {
1577 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1578 return -EINVAL;
1579 }
1580
1581 /* Setup the default Register Modes */
1582 lp->tcr_cur_mode = TCR_DEFAULT;
1583 lp->rcr_cur_mode = RCR_DEFAULT;
1584 lp->rpc_cur_mode = RPC_DEFAULT;
1585
1586 /*
1587 * If we are not using a MII interface, we need to
1588 * monitor our own carrier signal to detect faults.
1589 */
1590 if (lp->phy_type == 0)
1591 lp->tcr_cur_mode |= TCR_MON_CSN;
1592
1593 /* reset the hardware */
1594 smc_reset(dev);
1595 smc_enable(dev);
1596
1597 /* Configure the PHY, initialize the link state */
1598 if (lp->phy_type != 0)
1599 smc_phy_configure(dev);
1600 else {
1601 spin_lock_irq(&lp->lock);
1602 smc_10bt_check_media(dev, 1);
1603 spin_unlock_irq(&lp->lock);
1604 }
1605
1606 netif_start_queue(dev);
1607 return 0;
1608 }
1609
1610 /*
1611 * smc_close
1612 *
1613 * this makes the board clean up everything that it can
1614 * and not talk to the outside world. Caused by
1615 * an 'ifconfig ethX down'
1616 */
1617 static int smc_close(struct net_device *dev)
1618 {
1619 struct smc_local *lp = netdev_priv(dev);
1620
1621 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1622
1623 netif_stop_queue(dev);
1624 netif_carrier_off(dev);
1625
1626 /* clear everything */
1627 smc_shutdown(dev);
1628 tasklet_kill(&lp->tx_task);
1629 smc_phy_powerdown(dev);
1630 return 0;
1631 }
1632
1633 /*
1634 * Get the current statistics.
1635 * This may be called with the card open or closed.
1636 */
1637 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1638 {
1639 struct smc_local *lp = netdev_priv(dev);
1640
1641 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1642
1643 return &lp->stats;
1644 }
1645
1646 /*
1647 * Ethtool support
1648 */
1649 static int
1650 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1651 {
1652 struct smc_local *lp = netdev_priv(dev);
1653 int ret;
1654
1655 cmd->maxtxpkt = 1;
1656 cmd->maxrxpkt = 1;
1657
1658 if (lp->phy_type != 0) {
1659 spin_lock_irq(&lp->lock);
1660 ret = mii_ethtool_gset(&lp->mii, cmd);
1661 spin_unlock_irq(&lp->lock);
1662 } else {
1663 cmd->supported = SUPPORTED_10baseT_Half |
1664 SUPPORTED_10baseT_Full |
1665 SUPPORTED_TP | SUPPORTED_AUI;
1666
1667 if (lp->ctl_rspeed == 10)
1668 cmd->speed = SPEED_10;
1669 else if (lp->ctl_rspeed == 100)
1670 cmd->speed = SPEED_100;
1671
1672 cmd->autoneg = AUTONEG_DISABLE;
1673 cmd->transceiver = XCVR_INTERNAL;
1674 cmd->port = 0;
1675 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1676
1677 ret = 0;
1678 }
1679
1680 return ret;
1681 }
1682
1683 static int
1684 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1685 {
1686 struct smc_local *lp = netdev_priv(dev);
1687 int ret;
1688
1689 if (lp->phy_type != 0) {
1690 spin_lock_irq(&lp->lock);
1691 ret = mii_ethtool_sset(&lp->mii, cmd);
1692 spin_unlock_irq(&lp->lock);
1693 } else {
1694 if (cmd->autoneg != AUTONEG_DISABLE ||
1695 cmd->speed != SPEED_10 ||
1696 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1697 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1698 return -EINVAL;
1699
1700 // lp->port = cmd->port;
1701 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1702
1703 // if (netif_running(dev))
1704 // smc_set_port(dev);
1705
1706 ret = 0;
1707 }
1708
1709 return ret;
1710 }
1711
1712 static void
1713 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1714 {
1715 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1716 strncpy(info->version, version, sizeof(info->version));
1717 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1718 }
1719
1720 static int smc_ethtool_nwayreset(struct net_device *dev)
1721 {
1722 struct smc_local *lp = netdev_priv(dev);
1723 int ret = -EINVAL;
1724
1725 if (lp->phy_type != 0) {
1726 spin_lock_irq(&lp->lock);
1727 ret = mii_nway_restart(&lp->mii);
1728 spin_unlock_irq(&lp->lock);
1729 }
1730
1731 return ret;
1732 }
1733
1734 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1735 {
1736 struct smc_local *lp = netdev_priv(dev);
1737 return lp->msg_enable;
1738 }
1739
1740 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1741 {
1742 struct smc_local *lp = netdev_priv(dev);
1743 lp->msg_enable = level;
1744 }
1745
1746 static struct ethtool_ops smc_ethtool_ops = {
1747 .get_settings = smc_ethtool_getsettings,
1748 .set_settings = smc_ethtool_setsettings,
1749 .get_drvinfo = smc_ethtool_getdrvinfo,
1750
1751 .get_msglevel = smc_ethtool_getmsglevel,
1752 .set_msglevel = smc_ethtool_setmsglevel,
1753 .nway_reset = smc_ethtool_nwayreset,
1754 .get_link = ethtool_op_get_link,
1755 // .get_eeprom = smc_ethtool_geteeprom,
1756 // .set_eeprom = smc_ethtool_seteeprom,
1757 };
1758
1759 /*
1760 * smc_findirq
1761 *
1762 * This routine has a simple purpose -- make the SMC chip generate an
1763 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1764 */
1765 /*
1766 * does this still work?
1767 *
1768 * I just deleted auto_irq.c, since it was never built...
1769 * --jgarzik
1770 */
1771 static int __init smc_findirq(void __iomem *ioaddr)
1772 {
1773 int timeout = 20;
1774 unsigned long cookie;
1775
1776 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1777
1778 cookie = probe_irq_on();
1779
1780 /*
1781 * What I try to do here is trigger an ALLOC_INT. This is done
1782 * by allocating a small chunk of memory, which will give an interrupt
1783 * when done.
1784 */
1785 /* enable ALLOCation interrupts ONLY */
1786 SMC_SELECT_BANK(2);
1787 SMC_SET_INT_MASK(IM_ALLOC_INT);
1788
1789 /*
1790 * Allocate 512 bytes of memory. Note that the chip was just
1791 * reset so all the memory is available
1792 */
1793 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1794
1795 /*
1796 * Wait until positive that the interrupt has been generated
1797 */
1798 do {
1799 int int_status;
1800 udelay(10);
1801 int_status = SMC_GET_INT();
1802 if (int_status & IM_ALLOC_INT)
1803 break; /* got the interrupt */
1804 } while (--timeout);
1805
1806 /*
1807 * there is really nothing that I can do here if timeout fails,
1808 * as autoirq_report will return a 0 anyway, which is what I
1809 * want in this case. Plus, the clean up is needed in both
1810 * cases.
1811 */
1812
1813 /* and disable all interrupts again */
1814 SMC_SET_INT_MASK(0);
1815
1816 /* and return what I found */
1817 return probe_irq_off(cookie);
1818 }
1819
1820 /*
1821 * Function: smc_probe(unsigned long ioaddr)
1822 *
1823 * Purpose:
1824 * Tests to see if a given ioaddr points to an SMC91x chip.
1825 * Returns a 0 on success
1826 *
1827 * Algorithm:
1828 * (1) see if the high byte of BANK_SELECT is 0x33
1829 * (2) compare the ioaddr with the base register's address
1830 * (3) see if I recognize the chip ID in the appropriate register
1831 *
1832 * Here I do typical initialization tasks.
1833 *
1834 * o Initialize the structure if needed
1835 * o print out my vanity message if not done so already
1836 * o print out what type of hardware is detected
1837 * o print out the ethernet address
1838 * o find the IRQ
1839 * o set up my private data
1840 * o configure the dev structure with my subroutines
1841 * o actually GRAB the irq.
1842 * o GRAB the region
1843 */
1844 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1845 {
1846 struct smc_local *lp = netdev_priv(dev);
1847 static int version_printed = 0;
1848 int i, retval;
1849 unsigned int val, revision_register;
1850 const char *version_string;
1851
1852 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1853
1854 /* First, see if the high byte is 0x33 */
1855 val = SMC_CURRENT_BANK();
1856 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1857 if ((val & 0xFF00) != 0x3300) {
1858 if ((val & 0xFF) == 0x33) {
1859 printk(KERN_WARNING
1860 "%s: Detected possible byte-swapped interface"
1861 " at IOADDR %p\n", CARDNAME, ioaddr);
1862 }
1863 retval = -ENODEV;
1864 goto err_out;
1865 }
1866
1867 /*
1868 * The above MIGHT indicate a device, but I need to write to
1869 * further test this.
1870 */
1871 SMC_SELECT_BANK(0);
1872 val = SMC_CURRENT_BANK();
1873 if ((val & 0xFF00) != 0x3300) {
1874 retval = -ENODEV;
1875 goto err_out;
1876 }
1877
1878 /*
1879 * well, we've already written once, so hopefully another
1880 * time won't hurt. This time, I need to switch the bank
1881 * register to bank 1, so I can access the base address
1882 * register
1883 */
1884 SMC_SELECT_BANK(1);
1885 val = SMC_GET_BASE();
1886 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1887 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1888 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1889 CARDNAME, ioaddr, val);
1890 }
1891
1892 /*
1893 * check if the revision register is something that I
1894 * recognize. These might need to be added to later,
1895 * as future revisions could be added.
1896 */
1897 SMC_SELECT_BANK(3);
1898 revision_register = SMC_GET_REV();
1899 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1900 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1901 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1902 /* I don't recognize this chip, so... */
1903 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1904 ", Contact author.\n", CARDNAME,
1905 ioaddr, revision_register);
1906
1907 retval = -ENODEV;
1908 goto err_out;
1909 }
1910
1911 /* At this point I'll assume that the chip is an SMC91x. */
1912 if (version_printed++ == 0)
1913 printk("%s", version);
1914
1915 /* fill in some of the fields */
1916 dev->base_addr = (unsigned long)ioaddr;
1917 lp->base = ioaddr;
1918 lp->version = revision_register & 0xff;
1919 spin_lock_init(&lp->lock);
1920
1921 /* Get the MAC address */
1922 SMC_SELECT_BANK(1);
1923 SMC_GET_MAC_ADDR(dev->dev_addr);
1924
1925 /* now, reset the chip, and put it into a known state */
1926 smc_reset(dev);
1927
1928 /*
1929 * If dev->irq is 0, then the device has to be banged on to see
1930 * what the IRQ is.
1931 *
1932 * This banging doesn't always detect the IRQ, for unknown reasons.
1933 * a workaround is to reset the chip and try again.
1934 *
1935 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1936 * be what is requested on the command line. I don't do that, mostly
1937 * because the card that I have uses a non-standard method of accessing
1938 * the IRQs, and because this _should_ work in most configurations.
1939 *
1940 * Specifying an IRQ is done with the assumption that the user knows
1941 * what (s)he is doing. No checking is done!!!!
1942 */
1943 if (dev->irq < 1) {
1944 int trials;
1945
1946 trials = 3;
1947 while (trials--) {
1948 dev->irq = smc_findirq(ioaddr);
1949 if (dev->irq)
1950 break;
1951 /* kick the card and try again */
1952 smc_reset(dev);
1953 }
1954 }
1955 if (dev->irq == 0) {
1956 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1957 dev->name);
1958 retval = -ENODEV;
1959 goto err_out;
1960 }
1961 dev->irq = irq_canonicalize(dev->irq);
1962
1963 /* Fill in the fields of the device structure with ethernet values. */
1964 ether_setup(dev);
1965
1966 dev->open = smc_open;
1967 dev->stop = smc_close;
1968 dev->hard_start_xmit = smc_hard_start_xmit;
1969 dev->tx_timeout = smc_timeout;
1970 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1971 dev->get_stats = smc_query_statistics;
1972 dev->set_multicast_list = smc_set_multicast_list;
1973 dev->ethtool_ops = &smc_ethtool_ops;
1974 #ifdef CONFIG_NET_POLL_CONTROLLER
1975 dev->poll_controller = smc_poll_controller;
1976 #endif
1977
1978 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1979 INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
1980 lp->mii.phy_id_mask = 0x1f;
1981 lp->mii.reg_num_mask = 0x1f;
1982 lp->mii.force_media = 0;
1983 lp->mii.full_duplex = 0;
1984 lp->mii.dev = dev;
1985 lp->mii.mdio_read = smc_phy_read;
1986 lp->mii.mdio_write = smc_phy_write;
1987
1988 /*
1989 * Locate the phy, if any.
1990 */
1991 if (lp->version >= (CHIP_91100 << 4))
1992 smc_phy_detect(dev);
1993
1994 /* then shut everything down to save power */
1995 smc_shutdown(dev);
1996 smc_phy_powerdown(dev);
1997
1998 /* Set default parameters */
1999 lp->msg_enable = NETIF_MSG_LINK;
2000 lp->ctl_rfduplx = 0;
2001 lp->ctl_rspeed = 10;
2002
2003 if (lp->version >= (CHIP_91100 << 4)) {
2004 lp->ctl_rfduplx = 1;
2005 lp->ctl_rspeed = 100;
2006 }
2007
2008 /* Grab the IRQ */
2009 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
2010 if (retval)
2011 goto err_out;
2012
2013 set_irq_type(dev->irq, SMC_IRQ_TRIGGER_TYPE);
2014
2015 #ifdef SMC_USE_PXA_DMA
2016 {
2017 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2018 smc_pxa_dma_irq, NULL);
2019 if (dma >= 0)
2020 dev->dma = dma;
2021 }
2022 #endif
2023
2024 retval = register_netdev(dev);
2025 if (retval == 0) {
2026 /* now, print out the card info, in a short format.. */
2027 printk("%s: %s (rev %d) at %p IRQ %d",
2028 dev->name, version_string, revision_register & 0x0f,
2029 lp->base, dev->irq);
2030
2031 if (dev->dma != (unsigned char)-1)
2032 printk(" DMA %d", dev->dma);
2033
2034 printk("%s%s\n", nowait ? " [nowait]" : "",
2035 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2036
2037 if (!is_valid_ether_addr(dev->dev_addr)) {
2038 printk("%s: Invalid ethernet MAC address. Please "
2039 "set using ifconfig\n", dev->name);
2040 } else {
2041 /* Print the Ethernet address */
2042 printk("%s: Ethernet addr: ", dev->name);
2043 for (i = 0; i < 5; i++)
2044 printk("%2.2x:", dev->dev_addr[i]);
2045 printk("%2.2x\n", dev->dev_addr[5]);
2046 }
2047
2048 if (lp->phy_type == 0) {
2049 PRINTK("%s: No PHY found\n", dev->name);
2050 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2051 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2052 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2053 PRINTK("%s: PHY LAN83C180\n", dev->name);
2054 }
2055 }
2056
2057 err_out:
2058 #ifdef SMC_USE_PXA_DMA
2059 if (retval && dev->dma != (unsigned char)-1)
2060 pxa_free_dma(dev->dma);
2061 #endif
2062 return retval;
2063 }
2064
2065 static int smc_enable_device(struct platform_device *pdev)
2066 {
2067 unsigned long flags;
2068 unsigned char ecor, ecsr;
2069 void __iomem *addr;
2070 struct resource * res;
2071
2072 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2073 if (!res)
2074 return 0;
2075
2076 /*
2077 * Map the attribute space. This is overkill, but clean.
2078 */
2079 addr = ioremap(res->start, ATTRIB_SIZE);
2080 if (!addr)
2081 return -ENOMEM;
2082
2083 /*
2084 * Reset the device. We must disable IRQs around this
2085 * since a reset causes the IRQ line become active.
2086 */
2087 local_irq_save(flags);
2088 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2089 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2090 readb(addr + (ECOR << SMC_IO_SHIFT));
2091
2092 /*
2093 * Wait 100us for the chip to reset.
2094 */
2095 udelay(100);
2096
2097 /*
2098 * The device will ignore all writes to the enable bit while
2099 * reset is asserted, even if the reset bit is cleared in the
2100 * same write. Must clear reset first, then enable the device.
2101 */
2102 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2103 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2104
2105 /*
2106 * Set the appropriate byte/word mode.
2107 */
2108 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2109 #ifndef SMC_CAN_USE_16BIT
2110 ecsr |= ECSR_IOIS8;
2111 #endif
2112 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2113 local_irq_restore(flags);
2114
2115 iounmap(addr);
2116
2117 /*
2118 * Wait for the chip to wake up. We could poll the control
2119 * register in the main register space, but that isn't mapped
2120 * yet. We know this is going to take 750us.
2121 */
2122 msleep(1);
2123
2124 return 0;
2125 }
2126
2127 static int smc_request_attrib(struct platform_device *pdev)
2128 {
2129 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2130
2131 if (!res)
2132 return 0;
2133
2134 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2135 return -EBUSY;
2136
2137 return 0;
2138 }
2139
2140 static void smc_release_attrib(struct platform_device *pdev)
2141 {
2142 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2143
2144 if (res)
2145 release_mem_region(res->start, ATTRIB_SIZE);
2146 }
2147
2148 #ifdef SMC_CAN_USE_DATACS
2149 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2150 {
2151 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2152 struct smc_local *lp = netdev_priv(ndev);
2153
2154 if (!res)
2155 return;
2156
2157 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2158 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2159 return;
2160 }
2161
2162 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2163 }
2164
2165 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2166 {
2167 struct smc_local *lp = netdev_priv(ndev);
2168 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2169
2170 if (lp->datacs)
2171 iounmap(lp->datacs);
2172
2173 lp->datacs = NULL;
2174
2175 if (res)
2176 release_mem_region(res->start, SMC_DATA_EXTENT);
2177 }
2178 #else
2179 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2180 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2181 #endif
2182
2183 /*
2184 * smc_init(void)
2185 * Input parameters:
2186 * dev->base_addr == 0, try to find all possible locations
2187 * dev->base_addr > 0x1ff, this is the address to check
2188 * dev->base_addr == <anything else>, return failure code
2189 *
2190 * Output:
2191 * 0 --> there is a device
2192 * anything else, error
2193 */
2194 static int smc_drv_probe(struct platform_device *pdev)
2195 {
2196 struct net_device *ndev;
2197 struct resource *res;
2198 unsigned int __iomem *addr;
2199 int ret;
2200
2201 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2202 if (!res)
2203 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2204 if (!res) {
2205 ret = -ENODEV;
2206 goto out;
2207 }
2208
2209
2210 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2211 ret = -EBUSY;
2212 goto out;
2213 }
2214
2215 ndev = alloc_etherdev(sizeof(struct smc_local));
2216 if (!ndev) {
2217 printk("%s: could not allocate device.\n", CARDNAME);
2218 ret = -ENOMEM;
2219 goto out_release_io;
2220 }
2221 SET_MODULE_OWNER(ndev);
2222 SET_NETDEV_DEV(ndev, &pdev->dev);
2223
2224 ndev->dma = (unsigned char)-1;
2225 ndev->irq = platform_get_irq(pdev, 0);
2226
2227 ret = smc_request_attrib(pdev);
2228 if (ret)
2229 goto out_free_netdev;
2230 #if defined(CONFIG_SA1100_ASSABET)
2231 NCR_0 |= NCR_ENET_OSC_EN;
2232 #endif
2233 ret = smc_enable_device(pdev);
2234 if (ret)
2235 goto out_release_attrib;
2236
2237 addr = ioremap(res->start, SMC_IO_EXTENT);
2238 if (!addr) {
2239 ret = -ENOMEM;
2240 goto out_release_attrib;
2241 }
2242
2243 platform_set_drvdata(pdev, ndev);
2244 ret = smc_probe(ndev, addr);
2245 if (ret != 0)
2246 goto out_iounmap;
2247 #ifdef SMC_USE_PXA_DMA
2248 else {
2249 struct smc_local *lp = netdev_priv(ndev);
2250 lp->physaddr = res->start;
2251 }
2252 #endif
2253
2254 smc_request_datacs(pdev, ndev);
2255
2256 return 0;
2257
2258 out_iounmap:
2259 platform_set_drvdata(pdev, NULL);
2260 iounmap(addr);
2261 out_release_attrib:
2262 smc_release_attrib(pdev);
2263 out_free_netdev:
2264 free_netdev(ndev);
2265 out_release_io:
2266 release_mem_region(res->start, SMC_IO_EXTENT);
2267 out:
2268 printk("%s: not found (%d).\n", CARDNAME, ret);
2269
2270 return ret;
2271 }
2272
2273 static int smc_drv_remove(struct platform_device *pdev)
2274 {
2275 struct net_device *ndev = platform_get_drvdata(pdev);
2276 struct smc_local *lp = netdev_priv(ndev);
2277 struct resource *res;
2278
2279 platform_set_drvdata(pdev, NULL);
2280
2281 unregister_netdev(ndev);
2282
2283 free_irq(ndev->irq, ndev);
2284
2285 #ifdef SMC_USE_PXA_DMA
2286 if (ndev->dma != (unsigned char)-1)
2287 pxa_free_dma(ndev->dma);
2288 #endif
2289 iounmap(lp->base);
2290
2291 smc_release_datacs(pdev,ndev);
2292 smc_release_attrib(pdev);
2293
2294 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2295 if (!res)
2296 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2297 release_mem_region(res->start, SMC_IO_EXTENT);
2298
2299 free_netdev(ndev);
2300
2301 return 0;
2302 }
2303
2304 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2305 {
2306 struct net_device *ndev = platform_get_drvdata(dev);
2307
2308 if (ndev) {
2309 if (netif_running(ndev)) {
2310 netif_device_detach(ndev);
2311 smc_shutdown(ndev);
2312 smc_phy_powerdown(ndev);
2313 }
2314 }
2315 return 0;
2316 }
2317
2318 static int smc_drv_resume(struct platform_device *dev)
2319 {
2320 struct net_device *ndev = platform_get_drvdata(dev);
2321
2322 if (ndev) {
2323 struct smc_local *lp = netdev_priv(ndev);
2324 smc_enable_device(dev);
2325 if (netif_running(ndev)) {
2326 smc_reset(ndev);
2327 smc_enable(ndev);
2328 if (lp->phy_type != 0)
2329 smc_phy_configure(ndev);
2330 netif_device_attach(ndev);
2331 }
2332 }
2333 return 0;
2334 }
2335
2336 static struct platform_driver smc_driver = {
2337 .probe = smc_drv_probe,
2338 .remove = smc_drv_remove,
2339 .suspend = smc_drv_suspend,
2340 .resume = smc_drv_resume,
2341 .driver = {
2342 .name = CARDNAME,
2343 },
2344 };
2345
2346 static int __init smc_init(void)
2347 {
2348 #ifdef MODULE
2349 #ifdef CONFIG_ISA
2350 if (io == -1)
2351 printk(KERN_WARNING
2352 "%s: You shouldn't use auto-probing with insmod!\n",
2353 CARDNAME);
2354 #endif
2355 #endif
2356
2357 return platform_driver_register(&smc_driver);
2358 }
2359
2360 static void __exit smc_cleanup(void)
2361 {
2362 platform_driver_unregister(&smc_driver);
2363 }
2364
2365 module_init(smc_init);
2366 module_exit(smc_cleanup);