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Merge branch 'upstream-fixes'
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / sis900.c
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50 */
51
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/string.h>
56 #include <linux/timer.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/slab.h>
60 #include <linux/interrupt.h>
61 #include <linux/pci.h>
62 #include <linux/netdevice.h>
63 #include <linux/init.h>
64 #include <linux/mii.h>
65 #include <linux/etherdevice.h>
66 #include <linux/skbuff.h>
67 #include <linux/delay.h>
68 #include <linux/ethtool.h>
69 #include <linux/crc32.h>
70 #include <linux/bitops.h>
71 #include <linux/dma-mapping.h>
72
73 #include <asm/processor.h> /* Processor type for cache alignment. */
74 #include <asm/io.h>
75 #include <asm/irq.h>
76 #include <asm/uaccess.h> /* User space memory access functions */
77
78 #include "sis900.h"
79
80 #define SIS900_MODULE_NAME "sis900"
81 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
82
83 static char version[] __devinitdata =
84 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86 static int max_interrupt_work = 40;
87 static int multicast_filter_limit = 128;
88
89 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91 #define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
96
97 /* Time in jiffies before concluding the transmitter is hung. */
98 #define TX_TIMEOUT (4*HZ)
99
100 enum {
101 SIS_900 = 0,
102 SIS_7016
103 };
104 static const char * card_names[] = {
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
107 };
108 static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
114 };
115 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116
117 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118
119 static const struct mii_chip_info {
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124 #define HOME 0x0001
125 #define LAN 0x0002
126 #define MIX 0x0003
127 #define UNKNOWN 0x0
128 } mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
131 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
132 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
133 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
134 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
135 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
136 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
137 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
138 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
139 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
140 {NULL,},
141 };
142
143 struct mii_phy {
144 struct mii_phy * next;
145 int phy_addr;
146 u16 phy_id0;
147 u16 phy_id1;
148 u16 status;
149 u8 phy_types;
150 };
151
152 typedef struct _BufferDesc {
153 u32 link;
154 u32 cmdsts;
155 u32 bufptr;
156 } BufferDesc;
157
158 struct sis900_private {
159 struct net_device_stats stats;
160 struct pci_dev * pci_dev;
161
162 spinlock_t lock;
163
164 struct mii_phy * mii;
165 struct mii_phy * first_mii; /* record the first mii structure */
166 unsigned int cur_phy;
167 struct mii_if_info mii_info;
168
169 struct timer_list timer; /* Link status detection timer. */
170 u8 autong_complete; /* 1: auto-negotiate complete */
171
172 u32 msg_enable;
173
174 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
175 unsigned int cur_tx, dirty_tx;
176
177 /* The saved address of a sent/receive-in-place packet buffer */
178 struct sk_buff *tx_skbuff[NUM_TX_DESC];
179 struct sk_buff *rx_skbuff[NUM_RX_DESC];
180 BufferDesc *tx_ring;
181 BufferDesc *rx_ring;
182
183 dma_addr_t tx_ring_dma;
184 dma_addr_t rx_ring_dma;
185
186 unsigned int tx_full; /* The Tx queue is full. */
187 u8 host_bridge_rev;
188 u8 chipset_rev;
189 };
190
191 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
192 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
193 MODULE_LICENSE("GPL");
194
195 module_param(multicast_filter_limit, int, 0444);
196 module_param(max_interrupt_work, int, 0444);
197 module_param(sis900_debug, int, 0444);
198 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
199 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
200 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
201
202 #ifdef CONFIG_NET_POLL_CONTROLLER
203 static void sis900_poll(struct net_device *dev);
204 #endif
205 static int sis900_open(struct net_device *net_dev);
206 static int sis900_mii_probe (struct net_device * net_dev);
207 static void sis900_init_rxfilter (struct net_device * net_dev);
208 static u16 read_eeprom(long ioaddr, int location);
209 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
210 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
211 static void sis900_timer(unsigned long data);
212 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
213 static void sis900_tx_timeout(struct net_device *net_dev);
214 static void sis900_init_tx_ring(struct net_device *net_dev);
215 static void sis900_init_rx_ring(struct net_device *net_dev);
216 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
217 static int sis900_rx(struct net_device *net_dev);
218 static void sis900_finish_xmit (struct net_device *net_dev);
219 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
220 static int sis900_close(struct net_device *net_dev);
221 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
222 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
223 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
224 static void set_rx_mode(struct net_device *net_dev);
225 static void sis900_reset(struct net_device *net_dev);
226 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
227 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
228 static u16 sis900_default_phy(struct net_device * net_dev);
229 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
230 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
231 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
232 static void sis900_set_mode (long ioaddr, int speed, int duplex);
233 static struct ethtool_ops sis900_ethtool_ops;
234
235 /**
236 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
237 * @pci_dev: the sis900 pci device
238 * @net_dev: the net device to get address for
239 *
240 * Older SiS900 and friends, use EEPROM to store MAC address.
241 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
242 */
243
244 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
245 {
246 long ioaddr = pci_resource_start(pci_dev, 0);
247 u16 signature;
248 int i;
249
250 /* check to see if we have sane EEPROM */
251 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
252 if (signature == 0xffff || signature == 0x0000) {
253 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
254 pci_name(pci_dev), signature);
255 return 0;
256 }
257
258 /* get MAC address from EEPROM */
259 for (i = 0; i < 3; i++)
260 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
261
262 return 1;
263 }
264
265 /**
266 * sis630e_get_mac_addr - Get MAC address for SiS630E model
267 * @pci_dev: the sis900 pci device
268 * @net_dev: the net device to get address for
269 *
270 * SiS630E model, use APC CMOS RAM to store MAC address.
271 * APC CMOS RAM is accessed through ISA bridge.
272 * MAC address is read into @net_dev->dev_addr.
273 */
274
275 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
276 struct net_device *net_dev)
277 {
278 struct pci_dev *isa_bridge = NULL;
279 u8 reg;
280 int i;
281
282 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
283 if (!isa_bridge)
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
285 if (!isa_bridge) {
286 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
287 pci_name(pci_dev));
288 return 0;
289 }
290 pci_read_config_byte(isa_bridge, 0x48, &reg);
291 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
292
293 for (i = 0; i < 6; i++) {
294 outb(0x09 + i, 0x70);
295 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
296 }
297 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
298 pci_dev_put(isa_bridge);
299
300 return 1;
301 }
302
303
304 /**
305 * sis635_get_mac_addr - Get MAC address for SIS635 model
306 * @pci_dev: the sis900 pci device
307 * @net_dev: the net device to get address for
308 *
309 * SiS635 model, set MAC Reload Bit to load Mac address from APC
310 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
311 * @net_dev->dev_addr.
312 */
313
314 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
315 struct net_device *net_dev)
316 {
317 long ioaddr = net_dev->base_addr;
318 u32 rfcrSave;
319 u32 i;
320
321 rfcrSave = inl(rfcr + ioaddr);
322
323 outl(rfcrSave | RELOAD, ioaddr + cr);
324 outl(0, ioaddr + cr);
325
326 /* disable packet filtering before setting filter */
327 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
328
329 /* load MAC addr to filter data register */
330 for (i = 0 ; i < 3 ; i++) {
331 outl((i << RFADDR_shift), ioaddr + rfcr);
332 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
333 }
334
335 /* enable packet filtering */
336 outl(rfcrSave | RFEN, rfcr + ioaddr);
337
338 return 1;
339 }
340
341 /**
342 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
343 * @pci_dev: the sis900 pci device
344 * @net_dev: the net device to get address for
345 *
346 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
347 * is shared by
348 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
349 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
350 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
351 * EEDONE signal to refuse EEPROM access by LAN.
352 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
353 * The signature field in SiS962 or SiS963 spec is meaningless.
354 * MAC address is read into @net_dev->dev_addr.
355 */
356
357 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
358 struct net_device *net_dev)
359 {
360 long ioaddr = net_dev->base_addr;
361 long ee_addr = ioaddr + mear;
362 u32 waittime = 0;
363 int i;
364
365 outl(EEREQ, ee_addr);
366 while(waittime < 2000) {
367 if(inl(ee_addr) & EEGNT) {
368
369 /* get MAC address from EEPROM */
370 for (i = 0; i < 3; i++)
371 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
372
373 outl(EEDONE, ee_addr);
374 return 1;
375 } else {
376 udelay(1);
377 waittime ++;
378 }
379 }
380 outl(EEDONE, ee_addr);
381 return 0;
382 }
383
384 /**
385 * sis900_probe - Probe for sis900 device
386 * @pci_dev: the sis900 pci device
387 * @pci_id: the pci device ID
388 *
389 * Check and probe sis900 net device for @pci_dev.
390 * Get mac address according to the chip revision,
391 * and assign SiS900-specific entries in the device structure.
392 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
393 */
394
395 static int __devinit sis900_probe(struct pci_dev *pci_dev,
396 const struct pci_device_id *pci_id)
397 {
398 struct sis900_private *sis_priv;
399 struct net_device *net_dev;
400 struct pci_dev *dev;
401 dma_addr_t ring_dma;
402 void *ring_space;
403 long ioaddr;
404 int i, ret;
405 const char *card_name = card_names[pci_id->driver_data];
406 const char *dev_name = pci_name(pci_dev);
407
408 /* when built into the kernel, we only print version if device is found */
409 #ifndef MODULE
410 static int printed_version;
411 if (!printed_version++)
412 printk(version);
413 #endif
414
415 /* setup various bits in PCI command register */
416 ret = pci_enable_device(pci_dev);
417 if(ret) return ret;
418
419 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
420 if(i){
421 printk(KERN_ERR "sis900.c: architecture does not support"
422 "32bit PCI busmaster DMA\n");
423 return i;
424 }
425
426 pci_set_master(pci_dev);
427
428 net_dev = alloc_etherdev(sizeof(struct sis900_private));
429 if (!net_dev)
430 return -ENOMEM;
431 SET_MODULE_OWNER(net_dev);
432 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
433
434 /* We do a request_region() to register /proc/ioports info. */
435 ioaddr = pci_resource_start(pci_dev, 0);
436 ret = pci_request_regions(pci_dev, "sis900");
437 if (ret)
438 goto err_out;
439
440 sis_priv = net_dev->priv;
441 net_dev->base_addr = ioaddr;
442 net_dev->irq = pci_dev->irq;
443 sis_priv->pci_dev = pci_dev;
444 spin_lock_init(&sis_priv->lock);
445
446 pci_set_drvdata(pci_dev, net_dev);
447
448 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
449 if (!ring_space) {
450 ret = -ENOMEM;
451 goto err_out_cleardev;
452 }
453 sis_priv->tx_ring = (BufferDesc *)ring_space;
454 sis_priv->tx_ring_dma = ring_dma;
455
456 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
457 if (!ring_space) {
458 ret = -ENOMEM;
459 goto err_unmap_tx;
460 }
461 sis_priv->rx_ring = (BufferDesc *)ring_space;
462 sis_priv->rx_ring_dma = ring_dma;
463
464 /* The SiS900-specific entries in the device structure. */
465 net_dev->open = &sis900_open;
466 net_dev->hard_start_xmit = &sis900_start_xmit;
467 net_dev->stop = &sis900_close;
468 net_dev->get_stats = &sis900_get_stats;
469 net_dev->set_config = &sis900_set_config;
470 net_dev->set_multicast_list = &set_rx_mode;
471 net_dev->do_ioctl = &mii_ioctl;
472 net_dev->tx_timeout = sis900_tx_timeout;
473 net_dev->watchdog_timeo = TX_TIMEOUT;
474 net_dev->ethtool_ops = &sis900_ethtool_ops;
475
476 #ifdef CONFIG_NET_POLL_CONTROLLER
477 net_dev->poll_controller = &sis900_poll;
478 #endif
479
480 if (sis900_debug > 0)
481 sis_priv->msg_enable = sis900_debug;
482 else
483 sis_priv->msg_enable = SIS900_DEF_MSG;
484
485 sis_priv->mii_info.dev = net_dev;
486 sis_priv->mii_info.mdio_read = mdio_read;
487 sis_priv->mii_info.mdio_write = mdio_write;
488 sis_priv->mii_info.phy_id_mask = 0x1f;
489 sis_priv->mii_info.reg_num_mask = 0x1f;
490
491 /* Get Mac address according to the chip revision */
492 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
493 if(netif_msg_probe(sis_priv))
494 printk(KERN_DEBUG "%s: detected revision %2.2x, "
495 "trying to get MAC address...\n",
496 dev_name, sis_priv->chipset_rev);
497
498 ret = 0;
499 if (sis_priv->chipset_rev == SIS630E_900_REV)
500 ret = sis630e_get_mac_addr(pci_dev, net_dev);
501 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
502 ret = sis635_get_mac_addr(pci_dev, net_dev);
503 else if (sis_priv->chipset_rev == SIS96x_900_REV)
504 ret = sis96x_get_mac_addr(pci_dev, net_dev);
505 else
506 ret = sis900_get_mac_addr(pci_dev, net_dev);
507
508 if (ret == 0) {
509 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
510 ret = -ENODEV;
511 goto err_unmap_rx;
512 }
513
514 /* 630ET : set the mii access mode as software-mode */
515 if (sis_priv->chipset_rev == SIS630ET_900_REV)
516 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
517
518 /* probe for mii transceiver */
519 if (sis900_mii_probe(net_dev) == 0) {
520 printk(KERN_WARNING "%s: Error probing MII device.\n",
521 dev_name);
522 ret = -ENODEV;
523 goto err_unmap_rx;
524 }
525
526 /* save our host bridge revision */
527 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
528 if (dev) {
529 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
530 pci_dev_put(dev);
531 }
532
533 ret = register_netdev(net_dev);
534 if (ret)
535 goto err_unmap_rx;
536
537 /* print some information about our NIC */
538 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
539 card_name, ioaddr, net_dev->irq);
540 for (i = 0; i < 5; i++)
541 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
542 printk("%2.2x.\n", net_dev->dev_addr[i]);
543
544 /* Detect Wake on Lan support */
545 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
546 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
547 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
548
549 return 0;
550
551 err_unmap_rx:
552 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
553 sis_priv->rx_ring_dma);
554 err_unmap_tx:
555 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
556 sis_priv->tx_ring_dma);
557 err_out_cleardev:
558 pci_set_drvdata(pci_dev, NULL);
559 pci_release_regions(pci_dev);
560 err_out:
561 free_netdev(net_dev);
562 return ret;
563 }
564
565 /**
566 * sis900_mii_probe - Probe MII PHY for sis900
567 * @net_dev: the net device to probe for
568 *
569 * Search for total of 32 possible mii phy addresses.
570 * Identify and set current phy if found one,
571 * return error if it failed to found.
572 */
573
574 static int __init sis900_mii_probe(struct net_device * net_dev)
575 {
576 struct sis900_private * sis_priv = net_dev->priv;
577 const char *dev_name = pci_name(sis_priv->pci_dev);
578 u16 poll_bit = MII_STAT_LINK, status = 0;
579 unsigned long timeout = jiffies + 5 * HZ;
580 int phy_addr;
581
582 sis_priv->mii = NULL;
583
584 /* search for total of 32 possible mii phy addresses */
585 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
586 struct mii_phy * mii_phy = NULL;
587 u16 mii_status;
588 int i;
589
590 mii_phy = NULL;
591 for(i = 0; i < 2; i++)
592 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
593
594 if (mii_status == 0xffff || mii_status == 0x0000) {
595 if (netif_msg_probe(sis_priv))
596 printk(KERN_DEBUG "%s: MII at address %d"
597 " not accessible\n",
598 dev_name, phy_addr);
599 continue;
600 }
601
602 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
603 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
604 mii_phy = sis_priv->first_mii;
605 while (mii_phy) {
606 struct mii_phy *phy;
607 phy = mii_phy;
608 mii_phy = mii_phy->next;
609 kfree(phy);
610 }
611 return 0;
612 }
613
614 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
615 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
616 mii_phy->phy_addr = phy_addr;
617 mii_phy->status = mii_status;
618 mii_phy->next = sis_priv->mii;
619 sis_priv->mii = mii_phy;
620 sis_priv->first_mii = mii_phy;
621
622 for (i = 0; mii_chip_table[i].phy_id1; i++)
623 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
624 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
625 mii_phy->phy_types = mii_chip_table[i].phy_types;
626 if (mii_chip_table[i].phy_types == MIX)
627 mii_phy->phy_types =
628 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
629 printk(KERN_INFO "%s: %s transceiver found "
630 "at address %d.\n",
631 dev_name,
632 mii_chip_table[i].name,
633 phy_addr);
634 break;
635 }
636
637 if( !mii_chip_table[i].phy_id1 ) {
638 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
639 dev_name, phy_addr);
640 mii_phy->phy_types = UNKNOWN;
641 }
642 }
643
644 if (sis_priv->mii == NULL) {
645 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
646 return 0;
647 }
648
649 /* select default PHY for mac */
650 sis_priv->mii = NULL;
651 sis900_default_phy( net_dev );
652
653 /* Reset phy if default phy is internal sis900 */
654 if ((sis_priv->mii->phy_id0 == 0x001D) &&
655 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
656 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
657
658 /* workaround for ICS1893 PHY */
659 if ((sis_priv->mii->phy_id0 == 0x0015) &&
660 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
661 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
662
663 if(status & MII_STAT_LINK){
664 while (poll_bit) {
665 yield();
666
667 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
668 if (time_after_eq(jiffies, timeout)) {
669 printk(KERN_WARNING "%s: reset phy and link down now\n",
670 dev_name);
671 return -ETIME;
672 }
673 }
674 }
675
676 if (sis_priv->chipset_rev == SIS630E_900_REV) {
677 /* SiS 630E has some bugs on default value of PHY registers */
678 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
679 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
680 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
681 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
682 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
683 }
684
685 if (sis_priv->mii->status & MII_STAT_LINK)
686 netif_carrier_on(net_dev);
687 else
688 netif_carrier_off(net_dev);
689
690 return 1;
691 }
692
693 /**
694 * sis900_default_phy - Select default PHY for sis900 mac.
695 * @net_dev: the net device to probe for
696 *
697 * Select first detected PHY with link as default.
698 * If no one is link on, select PHY whose types is HOME as default.
699 * If HOME doesn't exist, select LAN.
700 */
701
702 static u16 sis900_default_phy(struct net_device * net_dev)
703 {
704 struct sis900_private * sis_priv = net_dev->priv;
705 struct mii_phy *phy = NULL, *phy_home = NULL,
706 *default_phy = NULL, *phy_lan = NULL;
707 u16 status;
708
709 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
710 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
711 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
712
713 /* Link ON & Not select default PHY & not ghost PHY */
714 if ((status & MII_STAT_LINK) && !default_phy &&
715 (phy->phy_types != UNKNOWN))
716 default_phy = phy;
717 else {
718 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
719 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
720 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
721 if (phy->phy_types == HOME)
722 phy_home = phy;
723 else if(phy->phy_types == LAN)
724 phy_lan = phy;
725 }
726 }
727
728 if (!default_phy && phy_home)
729 default_phy = phy_home;
730 else if (!default_phy && phy_lan)
731 default_phy = phy_lan;
732 else if (!default_phy)
733 default_phy = sis_priv->first_mii;
734
735 if (sis_priv->mii != default_phy) {
736 sis_priv->mii = default_phy;
737 sis_priv->cur_phy = default_phy->phy_addr;
738 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
739 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
740 }
741
742 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
743
744 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
745 status &= (~MII_CNTL_ISOLATE);
746
747 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
748 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
749 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
750
751 return status;
752 }
753
754
755 /**
756 * sis900_set_capability - set the media capability of network adapter.
757 * @net_dev : the net device to probe for
758 * @phy : default PHY
759 *
760 * Set the media capability of network adapter according to
761 * mii status register. It's necessary before auto-negotiate.
762 */
763
764 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
765 {
766 u16 cap;
767 u16 status;
768
769 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
770 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
771
772 cap = MII_NWAY_CSMA_CD |
773 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
774 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
775 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
776 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
777
778 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
779 }
780
781
782 /* Delay between EEPROM clock transitions. */
783 #define eeprom_delay() inl(ee_addr)
784
785 /**
786 * read_eeprom - Read Serial EEPROM
787 * @ioaddr: base i/o address
788 * @location: the EEPROM location to read
789 *
790 * Read Serial EEPROM through EEPROM Access Register.
791 * Note that location is in word (16 bits) unit
792 */
793
794 static u16 __devinit read_eeprom(long ioaddr, int location)
795 {
796 int i;
797 u16 retval = 0;
798 long ee_addr = ioaddr + mear;
799 u32 read_cmd = location | EEread;
800
801 outl(0, ee_addr);
802 eeprom_delay();
803 outl(EECS, ee_addr);
804 eeprom_delay();
805
806 /* Shift the read command (9) bits out. */
807 for (i = 8; i >= 0; i--) {
808 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
809 outl(dataval, ee_addr);
810 eeprom_delay();
811 outl(dataval | EECLK, ee_addr);
812 eeprom_delay();
813 }
814 outl(EECS, ee_addr);
815 eeprom_delay();
816
817 /* read the 16-bits data in */
818 for (i = 16; i > 0; i--) {
819 outl(EECS, ee_addr);
820 eeprom_delay();
821 outl(EECS | EECLK, ee_addr);
822 eeprom_delay();
823 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
824 eeprom_delay();
825 }
826
827 /* Terminate the EEPROM access. */
828 outl(0, ee_addr);
829 eeprom_delay();
830
831 return (retval);
832 }
833
834 /* Read and write the MII management registers using software-generated
835 serial MDIO protocol. Note that the command bits and data bits are
836 send out separately */
837 #define mdio_delay() inl(mdio_addr)
838
839 static void mdio_idle(long mdio_addr)
840 {
841 outl(MDIO | MDDIR, mdio_addr);
842 mdio_delay();
843 outl(MDIO | MDDIR | MDC, mdio_addr);
844 }
845
846 /* Syncronize the MII management interface by shifting 32 one bits out. */
847 static void mdio_reset(long mdio_addr)
848 {
849 int i;
850
851 for (i = 31; i >= 0; i--) {
852 outl(MDDIR | MDIO, mdio_addr);
853 mdio_delay();
854 outl(MDDIR | MDIO | MDC, mdio_addr);
855 mdio_delay();
856 }
857 return;
858 }
859
860 /**
861 * mdio_read - read MII PHY register
862 * @net_dev: the net device to read
863 * @phy_id: the phy address to read
864 * @location: the phy regiester id to read
865 *
866 * Read MII registers through MDIO and MDC
867 * using MDIO management frame structure and protocol(defined by ISO/IEC).
868 * Please see SiS7014 or ICS spec
869 */
870
871 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
872 {
873 long mdio_addr = net_dev->base_addr + mear;
874 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
875 u16 retval = 0;
876 int i;
877
878 mdio_reset(mdio_addr);
879 mdio_idle(mdio_addr);
880
881 for (i = 15; i >= 0; i--) {
882 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
883 outl(dataval, mdio_addr);
884 mdio_delay();
885 outl(dataval | MDC, mdio_addr);
886 mdio_delay();
887 }
888
889 /* Read the 16 data bits. */
890 for (i = 16; i > 0; i--) {
891 outl(0, mdio_addr);
892 mdio_delay();
893 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
894 outl(MDC, mdio_addr);
895 mdio_delay();
896 }
897 outl(0x00, mdio_addr);
898
899 return retval;
900 }
901
902 /**
903 * mdio_write - write MII PHY register
904 * @net_dev: the net device to write
905 * @phy_id: the phy address to write
906 * @location: the phy regiester id to write
907 * @value: the register value to write with
908 *
909 * Write MII registers with @value through MDIO and MDC
910 * using MDIO management frame structure and protocol(defined by ISO/IEC)
911 * please see SiS7014 or ICS spec
912 */
913
914 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
915 int value)
916 {
917 long mdio_addr = net_dev->base_addr + mear;
918 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
919 int i;
920
921 mdio_reset(mdio_addr);
922 mdio_idle(mdio_addr);
923
924 /* Shift the command bits out. */
925 for (i = 15; i >= 0; i--) {
926 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
927 outb(dataval, mdio_addr);
928 mdio_delay();
929 outb(dataval | MDC, mdio_addr);
930 mdio_delay();
931 }
932 mdio_delay();
933
934 /* Shift the value bits out. */
935 for (i = 15; i >= 0; i--) {
936 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
937 outl(dataval, mdio_addr);
938 mdio_delay();
939 outl(dataval | MDC, mdio_addr);
940 mdio_delay();
941 }
942 mdio_delay();
943
944 /* Clear out extra bits. */
945 for (i = 2; i > 0; i--) {
946 outb(0, mdio_addr);
947 mdio_delay();
948 outb(MDC, mdio_addr);
949 mdio_delay();
950 }
951 outl(0x00, mdio_addr);
952
953 return;
954 }
955
956
957 /**
958 * sis900_reset_phy - reset sis900 mii phy.
959 * @net_dev: the net device to write
960 * @phy_addr: default phy address
961 *
962 * Some specific phy can't work properly without reset.
963 * This function will be called during initialization and
964 * link status change from ON to DOWN.
965 */
966
967 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
968 {
969 int i = 0;
970 u16 status;
971
972 while (i++ < 2)
973 status = mdio_read(net_dev, phy_addr, MII_STATUS);
974
975 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
976
977 return status;
978 }
979
980 #ifdef CONFIG_NET_POLL_CONTROLLER
981 /*
982 * Polling 'interrupt' - used by things like netconsole to send skbs
983 * without having to re-enable interrupts. It's not called while
984 * the interrupt routine is executing.
985 */
986 static void sis900_poll(struct net_device *dev)
987 {
988 disable_irq(dev->irq);
989 sis900_interrupt(dev->irq, dev, NULL);
990 enable_irq(dev->irq);
991 }
992 #endif
993
994 /**
995 * sis900_open - open sis900 device
996 * @net_dev: the net device to open
997 *
998 * Do some initialization and start net interface.
999 * enable interrupts and set sis900 timer.
1000 */
1001
1002 static int
1003 sis900_open(struct net_device *net_dev)
1004 {
1005 struct sis900_private *sis_priv = net_dev->priv;
1006 long ioaddr = net_dev->base_addr;
1007 int ret;
1008
1009 /* Soft reset the chip. */
1010 sis900_reset(net_dev);
1011
1012 /* Equalizer workaround Rule */
1013 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1014
1015 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ,
1016 net_dev->name, net_dev);
1017 if (ret)
1018 return ret;
1019
1020 sis900_init_rxfilter(net_dev);
1021
1022 sis900_init_tx_ring(net_dev);
1023 sis900_init_rx_ring(net_dev);
1024
1025 set_rx_mode(net_dev);
1026
1027 netif_start_queue(net_dev);
1028
1029 /* Workaround for EDB */
1030 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1031
1032 /* Enable all known interrupts by setting the interrupt mask. */
1033 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1034 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1035 outl(IE, ioaddr + ier);
1036
1037 sis900_check_mode(net_dev, sis_priv->mii);
1038
1039 /* Set the timer to switch to check for link beat and perhaps switch
1040 to an alternate media type. */
1041 init_timer(&sis_priv->timer);
1042 sis_priv->timer.expires = jiffies + HZ;
1043 sis_priv->timer.data = (unsigned long)net_dev;
1044 sis_priv->timer.function = &sis900_timer;
1045 add_timer(&sis_priv->timer);
1046
1047 return 0;
1048 }
1049
1050 /**
1051 * sis900_init_rxfilter - Initialize the Rx filter
1052 * @net_dev: the net device to initialize for
1053 *
1054 * Set receive filter address to our MAC address
1055 * and enable packet filtering.
1056 */
1057
1058 static void
1059 sis900_init_rxfilter (struct net_device * net_dev)
1060 {
1061 struct sis900_private *sis_priv = net_dev->priv;
1062 long ioaddr = net_dev->base_addr;
1063 u32 rfcrSave;
1064 u32 i;
1065
1066 rfcrSave = inl(rfcr + ioaddr);
1067
1068 /* disable packet filtering before setting filter */
1069 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1070
1071 /* load MAC addr to filter data register */
1072 for (i = 0 ; i < 3 ; i++) {
1073 u32 w;
1074
1075 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1076 outl((i << RFADDR_shift), ioaddr + rfcr);
1077 outl(w, ioaddr + rfdr);
1078
1079 if (netif_msg_hw(sis_priv)) {
1080 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1081 net_dev->name, i, inl(ioaddr + rfdr));
1082 }
1083 }
1084
1085 /* enable packet filtering */
1086 outl(rfcrSave | RFEN, rfcr + ioaddr);
1087 }
1088
1089 /**
1090 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1091 * @net_dev: the net device to initialize for
1092 *
1093 * Initialize the Tx descriptor ring,
1094 */
1095
1096 static void
1097 sis900_init_tx_ring(struct net_device *net_dev)
1098 {
1099 struct sis900_private *sis_priv = net_dev->priv;
1100 long ioaddr = net_dev->base_addr;
1101 int i;
1102
1103 sis_priv->tx_full = 0;
1104 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1105
1106 for (i = 0; i < NUM_TX_DESC; i++) {
1107 sis_priv->tx_skbuff[i] = NULL;
1108
1109 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1110 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1111 sis_priv->tx_ring[i].cmdsts = 0;
1112 sis_priv->tx_ring[i].bufptr = 0;
1113 }
1114
1115 /* load Transmit Descriptor Register */
1116 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1117 if (netif_msg_hw(sis_priv))
1118 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1119 net_dev->name, inl(ioaddr + txdp));
1120 }
1121
1122 /**
1123 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1124 * @net_dev: the net device to initialize for
1125 *
1126 * Initialize the Rx descriptor ring,
1127 * and pre-allocate recevie buffers (socket buffer)
1128 */
1129
1130 static void
1131 sis900_init_rx_ring(struct net_device *net_dev)
1132 {
1133 struct sis900_private *sis_priv = net_dev->priv;
1134 long ioaddr = net_dev->base_addr;
1135 int i;
1136
1137 sis_priv->cur_rx = 0;
1138 sis_priv->dirty_rx = 0;
1139
1140 /* init RX descriptor */
1141 for (i = 0; i < NUM_RX_DESC; i++) {
1142 sis_priv->rx_skbuff[i] = NULL;
1143
1144 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1145 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1146 sis_priv->rx_ring[i].cmdsts = 0;
1147 sis_priv->rx_ring[i].bufptr = 0;
1148 }
1149
1150 /* allocate sock buffers */
1151 for (i = 0; i < NUM_RX_DESC; i++) {
1152 struct sk_buff *skb;
1153
1154 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1155 /* not enough memory for skbuff, this makes a "hole"
1156 on the buffer ring, it is not clear how the
1157 hardware will react to this kind of degenerated
1158 buffer */
1159 break;
1160 }
1161 skb->dev = net_dev;
1162 sis_priv->rx_skbuff[i] = skb;
1163 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1164 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1165 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1166 }
1167 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1168
1169 /* load Receive Descriptor Register */
1170 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1171 if (netif_msg_hw(sis_priv))
1172 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1173 net_dev->name, inl(ioaddr + rxdp));
1174 }
1175
1176 /**
1177 * sis630_set_eq - set phy equalizer value for 630 LAN
1178 * @net_dev: the net device to set equalizer value
1179 * @revision: 630 LAN revision number
1180 *
1181 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1182 * PHY register 14h(Test)
1183 * Bit 14: 0 -- Automatically dectect (default)
1184 * 1 -- Manually set Equalizer filter
1185 * Bit 13: 0 -- (Default)
1186 * 1 -- Speed up convergence of equalizer setting
1187 * Bit 9 : 0 -- (Default)
1188 * 1 -- Disable Baseline Wander
1189 * Bit 3~7 -- Equalizer filter setting
1190 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1191 * Then calculate equalizer value
1192 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1193 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1194 * Calculate Equalizer value:
1195 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1196 * When the equalizer is stable, this value is not a fixed value. It will be within
1197 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1198 * 0 <= max <= 4 --> set equalizer to max
1199 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1200 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1201 */
1202
1203 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1204 {
1205 struct sis900_private *sis_priv = net_dev->priv;
1206 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1207 int i, maxcount=10;
1208
1209 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1210 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1211 return;
1212
1213 if (netif_carrier_ok(net_dev)) {
1214 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1215 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1216 (0x2200 | reg14h) & 0xBFFF);
1217 for (i=0; i < maxcount; i++) {
1218 eq_value = (0x00F8 & mdio_read(net_dev,
1219 sis_priv->cur_phy, MII_RESV)) >> 3;
1220 if (i == 0)
1221 max_value=min_value=eq_value;
1222 max_value = (eq_value > max_value) ?
1223 eq_value : max_value;
1224 min_value = (eq_value < min_value) ?
1225 eq_value : min_value;
1226 }
1227 /* 630E rule to determine the equalizer value */
1228 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1229 revision == SIS630ET_900_REV) {
1230 if (max_value < 5)
1231 eq_value = max_value;
1232 else if (max_value >= 5 && max_value < 15)
1233 eq_value = (max_value == min_value) ?
1234 max_value+2 : max_value+1;
1235 else if (max_value >= 15)
1236 eq_value=(max_value == min_value) ?
1237 max_value+6 : max_value+5;
1238 }
1239 /* 630B0&B1 rule to determine the equalizer value */
1240 if (revision == SIS630A_900_REV &&
1241 (sis_priv->host_bridge_rev == SIS630B0 ||
1242 sis_priv->host_bridge_rev == SIS630B1)) {
1243 if (max_value == 0)
1244 eq_value = 3;
1245 else
1246 eq_value = (max_value + min_value + 1)/2;
1247 }
1248 /* write equalizer value and setting */
1249 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1250 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1251 reg14h = (reg14h | 0x6000) & 0xFDFF;
1252 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1253 } else {
1254 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1255 if (revision == SIS630A_900_REV &&
1256 (sis_priv->host_bridge_rev == SIS630B0 ||
1257 sis_priv->host_bridge_rev == SIS630B1))
1258 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1259 (reg14h | 0x2200) & 0xBFFF);
1260 else
1261 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1262 (reg14h | 0x2000) & 0xBFFF);
1263 }
1264 return;
1265 }
1266
1267 /**
1268 * sis900_timer - sis900 timer routine
1269 * @data: pointer to sis900 net device
1270 *
1271 * On each timer ticks we check two things,
1272 * link status (ON/OFF) and link mode (10/100/Full/Half)
1273 */
1274
1275 static void sis900_timer(unsigned long data)
1276 {
1277 struct net_device *net_dev = (struct net_device *)data;
1278 struct sis900_private *sis_priv = net_dev->priv;
1279 struct mii_phy *mii_phy = sis_priv->mii;
1280 static const int next_tick = 5*HZ;
1281 u16 status;
1282
1283 if (!sis_priv->autong_complete){
1284 int speed, duplex = 0;
1285
1286 sis900_read_mode(net_dev, &speed, &duplex);
1287 if (duplex){
1288 sis900_set_mode(net_dev->base_addr, speed, duplex);
1289 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1290 netif_start_queue(net_dev);
1291 }
1292
1293 sis_priv->timer.expires = jiffies + HZ;
1294 add_timer(&sis_priv->timer);
1295 return;
1296 }
1297
1298 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1299 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1300
1301 /* Link OFF -> ON */
1302 if (!netif_carrier_ok(net_dev)) {
1303 LookForLink:
1304 /* Search for new PHY */
1305 status = sis900_default_phy(net_dev);
1306 mii_phy = sis_priv->mii;
1307
1308 if (status & MII_STAT_LINK){
1309 sis900_check_mode(net_dev, mii_phy);
1310 netif_carrier_on(net_dev);
1311 }
1312 } else {
1313 /* Link ON -> OFF */
1314 if (!(status & MII_STAT_LINK)){
1315 netif_carrier_off(net_dev);
1316 if(netif_msg_link(sis_priv))
1317 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1318
1319 /* Change mode issue */
1320 if ((mii_phy->phy_id0 == 0x001D) &&
1321 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1322 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1323
1324 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1325
1326 goto LookForLink;
1327 }
1328 }
1329
1330 sis_priv->timer.expires = jiffies + next_tick;
1331 add_timer(&sis_priv->timer);
1332 }
1333
1334 /**
1335 * sis900_check_mode - check the media mode for sis900
1336 * @net_dev: the net device to be checked
1337 * @mii_phy: the mii phy
1338 *
1339 * Older driver gets the media mode from mii status output
1340 * register. Now we set our media capability and auto-negotiate
1341 * to get the upper bound of speed and duplex between two ends.
1342 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1343 * and autong_complete should be set to 1.
1344 */
1345
1346 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1347 {
1348 struct sis900_private *sis_priv = net_dev->priv;
1349 long ioaddr = net_dev->base_addr;
1350 int speed, duplex;
1351
1352 if (mii_phy->phy_types == LAN) {
1353 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1354 sis900_set_capability(net_dev , mii_phy);
1355 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1356 } else {
1357 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1358 speed = HW_SPEED_HOME;
1359 duplex = FDX_CAPABLE_HALF_SELECTED;
1360 sis900_set_mode(ioaddr, speed, duplex);
1361 sis_priv->autong_complete = 1;
1362 }
1363 }
1364
1365 /**
1366 * sis900_set_mode - Set the media mode of mac register.
1367 * @ioaddr: the address of the device
1368 * @speed : the transmit speed to be determined
1369 * @duplex: the duplex mode to be determined
1370 *
1371 * Set the media mode of mac register txcfg/rxcfg according to
1372 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1373 * bus is used instead of PCI bus. When this bit is set 1, the
1374 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1375 * double words.
1376 */
1377
1378 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1379 {
1380 u32 tx_flags = 0, rx_flags = 0;
1381
1382 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1383 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1384 (TX_FILL_THRESH << TxFILLT_shift);
1385 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1386 } else {
1387 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1388 (TX_FILL_THRESH << TxFILLT_shift);
1389 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1390 }
1391
1392 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1393 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1394 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1395 } else {
1396 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1397 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1398 }
1399
1400 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1401 tx_flags |= (TxCSI | TxHBI);
1402 rx_flags |= RxATX;
1403 }
1404
1405 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1406 /* Can accept Jumbo packet */
1407 rx_flags |= RxAJAB;
1408 #endif
1409
1410 outl (tx_flags, ioaddr + txcfg);
1411 outl (rx_flags, ioaddr + rxcfg);
1412 }
1413
1414 /**
1415 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1416 * @net_dev: the net device to read mode for
1417 * @phy_addr: mii phy address
1418 *
1419 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1420 * autong_complete should be set to 0 when starting auto-negotiation.
1421 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1422 * sis900_timer will wait for link on again if autong_complete = 0.
1423 */
1424
1425 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1426 {
1427 struct sis900_private *sis_priv = net_dev->priv;
1428 int i = 0;
1429 u32 status;
1430
1431 while (i++ < 2)
1432 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1433
1434 if (!(status & MII_STAT_LINK)){
1435 if(netif_msg_link(sis_priv))
1436 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1437 sis_priv->autong_complete = 1;
1438 netif_carrier_off(net_dev);
1439 return;
1440 }
1441
1442 /* (Re)start AutoNegotiate */
1443 mdio_write(net_dev, phy_addr, MII_CONTROL,
1444 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1445 sis_priv->autong_complete = 0;
1446 }
1447
1448
1449 /**
1450 * sis900_read_mode - read media mode for sis900 internal phy
1451 * @net_dev: the net device to read mode for
1452 * @speed : the transmit speed to be determined
1453 * @duplex : the duplex mode to be determined
1454 *
1455 * The capability of remote end will be put in mii register autorec
1456 * after auto-negotiation. Use AND operation to get the upper bound
1457 * of speed and duplex between two ends.
1458 */
1459
1460 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1461 {
1462 struct sis900_private *sis_priv = net_dev->priv;
1463 struct mii_phy *phy = sis_priv->mii;
1464 int phy_addr = sis_priv->cur_phy;
1465 u32 status;
1466 u16 autoadv, autorec;
1467 int i = 0;
1468
1469 while (i++ < 2)
1470 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1471
1472 if (!(status & MII_STAT_LINK))
1473 return;
1474
1475 /* AutoNegotiate completed */
1476 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1477 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1478 status = autoadv & autorec;
1479
1480 *speed = HW_SPEED_10_MBPS;
1481 *duplex = FDX_CAPABLE_HALF_SELECTED;
1482
1483 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1484 *speed = HW_SPEED_100_MBPS;
1485 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1486 *duplex = FDX_CAPABLE_FULL_SELECTED;
1487
1488 sis_priv->autong_complete = 1;
1489
1490 /* Workaround for Realtek RTL8201 PHY issue */
1491 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1492 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1493 *duplex = FDX_CAPABLE_FULL_SELECTED;
1494 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1495 *speed = HW_SPEED_100_MBPS;
1496 }
1497
1498 if(netif_msg_link(sis_priv))
1499 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1500 net_dev->name,
1501 *speed == HW_SPEED_100_MBPS ?
1502 "100mbps" : "10mbps",
1503 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1504 "full" : "half");
1505 }
1506
1507 /**
1508 * sis900_tx_timeout - sis900 transmit timeout routine
1509 * @net_dev: the net device to transmit
1510 *
1511 * print transmit timeout status
1512 * disable interrupts and do some tasks
1513 */
1514
1515 static void sis900_tx_timeout(struct net_device *net_dev)
1516 {
1517 struct sis900_private *sis_priv = net_dev->priv;
1518 long ioaddr = net_dev->base_addr;
1519 unsigned long flags;
1520 int i;
1521
1522 if(netif_msg_tx_err(sis_priv))
1523 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1524 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1525
1526 /* Disable interrupts by clearing the interrupt mask. */
1527 outl(0x0000, ioaddr + imr);
1528
1529 /* use spinlock to prevent interrupt handler accessing buffer ring */
1530 spin_lock_irqsave(&sis_priv->lock, flags);
1531
1532 /* discard unsent packets */
1533 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1534 for (i = 0; i < NUM_TX_DESC; i++) {
1535 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1536
1537 if (skb) {
1538 pci_unmap_single(sis_priv->pci_dev,
1539 sis_priv->tx_ring[i].bufptr, skb->len,
1540 PCI_DMA_TODEVICE);
1541 dev_kfree_skb_irq(skb);
1542 sis_priv->tx_skbuff[i] = NULL;
1543 sis_priv->tx_ring[i].cmdsts = 0;
1544 sis_priv->tx_ring[i].bufptr = 0;
1545 sis_priv->stats.tx_dropped++;
1546 }
1547 }
1548 sis_priv->tx_full = 0;
1549 netif_wake_queue(net_dev);
1550
1551 spin_unlock_irqrestore(&sis_priv->lock, flags);
1552
1553 net_dev->trans_start = jiffies;
1554
1555 /* load Transmit Descriptor Register */
1556 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1557
1558 /* Enable all known interrupts by setting the interrupt mask. */
1559 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1560 return;
1561 }
1562
1563 /**
1564 * sis900_start_xmit - sis900 start transmit routine
1565 * @skb: socket buffer pointer to put the data being transmitted
1566 * @net_dev: the net device to transmit with
1567 *
1568 * Set the transmit buffer descriptor,
1569 * and write TxENA to enable transmit state machine.
1570 * tell upper layer if the buffer is full
1571 */
1572
1573 static int
1574 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1575 {
1576 struct sis900_private *sis_priv = net_dev->priv;
1577 long ioaddr = net_dev->base_addr;
1578 unsigned int entry;
1579 unsigned long flags;
1580 unsigned int index_cur_tx, index_dirty_tx;
1581 unsigned int count_dirty_tx;
1582
1583 /* Don't transmit data before the complete of auto-negotiation */
1584 if(!sis_priv->autong_complete){
1585 netif_stop_queue(net_dev);
1586 return 1;
1587 }
1588
1589 spin_lock_irqsave(&sis_priv->lock, flags);
1590
1591 /* Calculate the next Tx descriptor entry. */
1592 entry = sis_priv->cur_tx % NUM_TX_DESC;
1593 sis_priv->tx_skbuff[entry] = skb;
1594
1595 /* set the transmit buffer descriptor and enable Transmit State Machine */
1596 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1597 skb->data, skb->len, PCI_DMA_TODEVICE);
1598 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1599 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1600
1601 sis_priv->cur_tx ++;
1602 index_cur_tx = sis_priv->cur_tx;
1603 index_dirty_tx = sis_priv->dirty_tx;
1604
1605 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1606 count_dirty_tx ++;
1607
1608 if (index_cur_tx == index_dirty_tx) {
1609 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1610 sis_priv->tx_full = 1;
1611 netif_stop_queue(net_dev);
1612 } else if (count_dirty_tx < NUM_TX_DESC) {
1613 /* Typical path, tell upper layer that more transmission is possible */
1614 netif_start_queue(net_dev);
1615 } else {
1616 /* buffer full, tell upper layer no more transmission */
1617 sis_priv->tx_full = 1;
1618 netif_stop_queue(net_dev);
1619 }
1620
1621 spin_unlock_irqrestore(&sis_priv->lock, flags);
1622
1623 net_dev->trans_start = jiffies;
1624
1625 if (netif_msg_tx_queued(sis_priv))
1626 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1627 "to slot %d.\n",
1628 net_dev->name, skb->data, (int)skb->len, entry);
1629
1630 return 0;
1631 }
1632
1633 /**
1634 * sis900_interrupt - sis900 interrupt handler
1635 * @irq: the irq number
1636 * @dev_instance: the client data object
1637 * @regs: snapshot of processor context
1638 *
1639 * The interrupt handler does all of the Rx thread work,
1640 * and cleans up after the Tx thread
1641 */
1642
1643 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1644 {
1645 struct net_device *net_dev = dev_instance;
1646 struct sis900_private *sis_priv = net_dev->priv;
1647 int boguscnt = max_interrupt_work;
1648 long ioaddr = net_dev->base_addr;
1649 u32 status;
1650 unsigned int handled = 0;
1651
1652 spin_lock (&sis_priv->lock);
1653
1654 do {
1655 status = inl(ioaddr + isr);
1656
1657 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1658 /* nothing intresting happened */
1659 break;
1660 handled = 1;
1661
1662 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1663 if (status & (RxORN | RxERR | RxOK))
1664 /* Rx interrupt */
1665 sis900_rx(net_dev);
1666
1667 if (status & (TxURN | TxERR | TxIDLE))
1668 /* Tx interrupt */
1669 sis900_finish_xmit(net_dev);
1670
1671 /* something strange happened !!! */
1672 if (status & HIBERR) {
1673 if(netif_msg_intr(sis_priv))
1674 printk(KERN_INFO "%s: Abnormal interrupt,"
1675 "status %#8.8x.\n", net_dev->name, status);
1676 break;
1677 }
1678 if (--boguscnt < 0) {
1679 if(netif_msg_intr(sis_priv))
1680 printk(KERN_INFO "%s: Too much work at interrupt, "
1681 "interrupt status = %#8.8x.\n",
1682 net_dev->name, status);
1683 break;
1684 }
1685 } while (1);
1686
1687 if(netif_msg_intr(sis_priv))
1688 printk(KERN_DEBUG "%s: exiting interrupt, "
1689 "interrupt status = 0x%#8.8x.\n",
1690 net_dev->name, inl(ioaddr + isr));
1691
1692 spin_unlock (&sis_priv->lock);
1693 return IRQ_RETVAL(handled);
1694 }
1695
1696 /**
1697 * sis900_rx - sis900 receive routine
1698 * @net_dev: the net device which receives data
1699 *
1700 * Process receive interrupt events,
1701 * put buffer to higher layer and refill buffer pool
1702 * Note: This function is called by interrupt handler,
1703 * don't do "too much" work here
1704 */
1705
1706 static int sis900_rx(struct net_device *net_dev)
1707 {
1708 struct sis900_private *sis_priv = net_dev->priv;
1709 long ioaddr = net_dev->base_addr;
1710 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1711 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1712 int rx_work_limit;
1713
1714 if (netif_msg_rx_status(sis_priv))
1715 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1716 "status:0x%8.8x\n",
1717 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1718 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1719
1720 while (rx_status & OWN) {
1721 unsigned int rx_size;
1722 unsigned int data_size;
1723
1724 if (--rx_work_limit < 0)
1725 break;
1726
1727 data_size = rx_status & DSIZE;
1728 rx_size = data_size - CRC_SIZE;
1729
1730 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1731 /* ``TOOLONG'' flag means jumbo packet recived. */
1732 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1733 rx_status &= (~ ((unsigned int)TOOLONG));
1734 #endif
1735
1736 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1737 /* corrupted packet received */
1738 if (netif_msg_rx_err(sis_priv))
1739 printk(KERN_DEBUG "%s: Corrupted packet "
1740 "received, buffer status = 0x%8.8x/%d.\n",
1741 net_dev->name, rx_status, data_size);
1742 sis_priv->stats.rx_errors++;
1743 if (rx_status & OVERRUN)
1744 sis_priv->stats.rx_over_errors++;
1745 if (rx_status & (TOOLONG|RUNT))
1746 sis_priv->stats.rx_length_errors++;
1747 if (rx_status & (RXISERR | FAERR))
1748 sis_priv->stats.rx_frame_errors++;
1749 if (rx_status & CRCERR)
1750 sis_priv->stats.rx_crc_errors++;
1751 /* reset buffer descriptor state */
1752 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1753 } else {
1754 struct sk_buff * skb;
1755
1756 /* This situation should never happen, but due to
1757 some unknow bugs, it is possible that
1758 we are working on NULL sk_buff :-( */
1759 if (sis_priv->rx_skbuff[entry] == NULL) {
1760 if (netif_msg_rx_err(sis_priv))
1761 printk(KERN_WARNING "%s: NULL pointer "
1762 "encountered in Rx ring\n"
1763 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1764 net_dev->name, sis_priv->cur_rx,
1765 sis_priv->dirty_rx);
1766 break;
1767 }
1768
1769 pci_unmap_single(sis_priv->pci_dev,
1770 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1771 PCI_DMA_FROMDEVICE);
1772 /* give the socket buffer to upper layers */
1773 skb = sis_priv->rx_skbuff[entry];
1774 skb_put(skb, rx_size);
1775 skb->protocol = eth_type_trans(skb, net_dev);
1776 netif_rx(skb);
1777
1778 /* some network statistics */
1779 if ((rx_status & BCAST) == MCAST)
1780 sis_priv->stats.multicast++;
1781 net_dev->last_rx = jiffies;
1782 sis_priv->stats.rx_bytes += rx_size;
1783 sis_priv->stats.rx_packets++;
1784
1785 /* refill the Rx buffer, what if there is not enought
1786 * memory for new socket buffer ?? */
1787 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1788 /* not enough memory for skbuff, this makes a
1789 * "hole" on the buffer ring, it is not clear
1790 * how the hardware will react to this kind
1791 * of degenerated buffer */
1792 if (netif_msg_rx_status(sis_priv))
1793 printk(KERN_INFO "%s: Memory squeeze,"
1794 "deferring packet.\n",
1795 net_dev->name);
1796 sis_priv->rx_skbuff[entry] = NULL;
1797 /* reset buffer descriptor state */
1798 sis_priv->rx_ring[entry].cmdsts = 0;
1799 sis_priv->rx_ring[entry].bufptr = 0;
1800 sis_priv->stats.rx_dropped++;
1801 sis_priv->cur_rx++;
1802 break;
1803 }
1804 skb->dev = net_dev;
1805 sis_priv->rx_skbuff[entry] = skb;
1806 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1807 sis_priv->rx_ring[entry].bufptr =
1808 pci_map_single(sis_priv->pci_dev, skb->data,
1809 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1810 sis_priv->dirty_rx++;
1811 }
1812 sis_priv->cur_rx++;
1813 entry = sis_priv->cur_rx % NUM_RX_DESC;
1814 rx_status = sis_priv->rx_ring[entry].cmdsts;
1815 } // while
1816
1817 /* refill the Rx buffer, what if the rate of refilling is slower
1818 * than consuming ?? */
1819 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1820 struct sk_buff *skb;
1821
1822 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1823
1824 if (sis_priv->rx_skbuff[entry] == NULL) {
1825 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1826 /* not enough memory for skbuff, this makes a
1827 * "hole" on the buffer ring, it is not clear
1828 * how the hardware will react to this kind
1829 * of degenerated buffer */
1830 if (netif_msg_rx_err(sis_priv))
1831 printk(KERN_INFO "%s: Memory squeeze,"
1832 "deferring packet.\n",
1833 net_dev->name);
1834 sis_priv->stats.rx_dropped++;
1835 break;
1836 }
1837 skb->dev = net_dev;
1838 sis_priv->rx_skbuff[entry] = skb;
1839 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1840 sis_priv->rx_ring[entry].bufptr =
1841 pci_map_single(sis_priv->pci_dev, skb->data,
1842 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1843 }
1844 }
1845 /* re-enable the potentially idle receive state matchine */
1846 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1847
1848 return 0;
1849 }
1850
1851 /**
1852 * sis900_finish_xmit - finish up transmission of packets
1853 * @net_dev: the net device to be transmitted on
1854 *
1855 * Check for error condition and free socket buffer etc
1856 * schedule for more transmission as needed
1857 * Note: This function is called by interrupt handler,
1858 * don't do "too much" work here
1859 */
1860
1861 static void sis900_finish_xmit (struct net_device *net_dev)
1862 {
1863 struct sis900_private *sis_priv = net_dev->priv;
1864
1865 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1866 struct sk_buff *skb;
1867 unsigned int entry;
1868 u32 tx_status;
1869
1870 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1871 tx_status = sis_priv->tx_ring[entry].cmdsts;
1872
1873 if (tx_status & OWN) {
1874 /* The packet is not transmitted yet (owned by hardware) !
1875 * Note: the interrupt is generated only when Tx Machine
1876 * is idle, so this is an almost impossible case */
1877 break;
1878 }
1879
1880 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1881 /* packet unsuccessfully transmitted */
1882 if (netif_msg_tx_err(sis_priv))
1883 printk(KERN_DEBUG "%s: Transmit "
1884 "error, Tx status %8.8x.\n",
1885 net_dev->name, tx_status);
1886 sis_priv->stats.tx_errors++;
1887 if (tx_status & UNDERRUN)
1888 sis_priv->stats.tx_fifo_errors++;
1889 if (tx_status & ABORT)
1890 sis_priv->stats.tx_aborted_errors++;
1891 if (tx_status & NOCARRIER)
1892 sis_priv->stats.tx_carrier_errors++;
1893 if (tx_status & OWCOLL)
1894 sis_priv->stats.tx_window_errors++;
1895 } else {
1896 /* packet successfully transmitted */
1897 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1898 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1899 sis_priv->stats.tx_packets++;
1900 }
1901 /* Free the original skb. */
1902 skb = sis_priv->tx_skbuff[entry];
1903 pci_unmap_single(sis_priv->pci_dev,
1904 sis_priv->tx_ring[entry].bufptr, skb->len,
1905 PCI_DMA_TODEVICE);
1906 dev_kfree_skb_irq(skb);
1907 sis_priv->tx_skbuff[entry] = NULL;
1908 sis_priv->tx_ring[entry].bufptr = 0;
1909 sis_priv->tx_ring[entry].cmdsts = 0;
1910 }
1911
1912 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1913 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1914 /* The ring is no longer full, clear tx_full and schedule
1915 * more transmission by netif_wake_queue(net_dev) */
1916 sis_priv->tx_full = 0;
1917 netif_wake_queue (net_dev);
1918 }
1919 }
1920
1921 /**
1922 * sis900_close - close sis900 device
1923 * @net_dev: the net device to be closed
1924 *
1925 * Disable interrupts, stop the Tx and Rx Status Machine
1926 * free Tx and RX socket buffer
1927 */
1928
1929 static int sis900_close(struct net_device *net_dev)
1930 {
1931 long ioaddr = net_dev->base_addr;
1932 struct sis900_private *sis_priv = net_dev->priv;
1933 struct sk_buff *skb;
1934 int i;
1935
1936 netif_stop_queue(net_dev);
1937
1938 /* Disable interrupts by clearing the interrupt mask. */
1939 outl(0x0000, ioaddr + imr);
1940 outl(0x0000, ioaddr + ier);
1941
1942 /* Stop the chip's Tx and Rx Status Machine */
1943 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1944
1945 del_timer(&sis_priv->timer);
1946
1947 free_irq(net_dev->irq, net_dev);
1948
1949 /* Free Tx and RX skbuff */
1950 for (i = 0; i < NUM_RX_DESC; i++) {
1951 skb = sis_priv->rx_skbuff[i];
1952 if (skb) {
1953 pci_unmap_single(sis_priv->pci_dev,
1954 sis_priv->rx_ring[i].bufptr,
1955 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1956 dev_kfree_skb(skb);
1957 sis_priv->rx_skbuff[i] = NULL;
1958 }
1959 }
1960 for (i = 0; i < NUM_TX_DESC; i++) {
1961 skb = sis_priv->tx_skbuff[i];
1962 if (skb) {
1963 pci_unmap_single(sis_priv->pci_dev,
1964 sis_priv->tx_ring[i].bufptr, skb->len,
1965 PCI_DMA_TODEVICE);
1966 dev_kfree_skb(skb);
1967 sis_priv->tx_skbuff[i] = NULL;
1968 }
1969 }
1970
1971 /* Green! Put the chip in low-power mode. */
1972
1973 return 0;
1974 }
1975
1976 /**
1977 * sis900_get_drvinfo - Return information about driver
1978 * @net_dev: the net device to probe
1979 * @info: container for info returned
1980 *
1981 * Process ethtool command such as "ehtool -i" to show information
1982 */
1983
1984 static void sis900_get_drvinfo(struct net_device *net_dev,
1985 struct ethtool_drvinfo *info)
1986 {
1987 struct sis900_private *sis_priv = net_dev->priv;
1988
1989 strcpy (info->driver, SIS900_MODULE_NAME);
1990 strcpy (info->version, SIS900_DRV_VERSION);
1991 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1992 }
1993
1994 static u32 sis900_get_msglevel(struct net_device *net_dev)
1995 {
1996 struct sis900_private *sis_priv = net_dev->priv;
1997 return sis_priv->msg_enable;
1998 }
1999
2000 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2001 {
2002 struct sis900_private *sis_priv = net_dev->priv;
2003 sis_priv->msg_enable = value;
2004 }
2005
2006 static u32 sis900_get_link(struct net_device *net_dev)
2007 {
2008 struct sis900_private *sis_priv = net_dev->priv;
2009 return mii_link_ok(&sis_priv->mii_info);
2010 }
2011
2012 static int sis900_get_settings(struct net_device *net_dev,
2013 struct ethtool_cmd *cmd)
2014 {
2015 struct sis900_private *sis_priv = net_dev->priv;
2016 spin_lock_irq(&sis_priv->lock);
2017 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2018 spin_unlock_irq(&sis_priv->lock);
2019 return 0;
2020 }
2021
2022 static int sis900_set_settings(struct net_device *net_dev,
2023 struct ethtool_cmd *cmd)
2024 {
2025 struct sis900_private *sis_priv = net_dev->priv;
2026 int rt;
2027 spin_lock_irq(&sis_priv->lock);
2028 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2029 spin_unlock_irq(&sis_priv->lock);
2030 return rt;
2031 }
2032
2033 static int sis900_nway_reset(struct net_device *net_dev)
2034 {
2035 struct sis900_private *sis_priv = net_dev->priv;
2036 return mii_nway_restart(&sis_priv->mii_info);
2037 }
2038
2039 /**
2040 * sis900_set_wol - Set up Wake on Lan registers
2041 * @net_dev: the net device to probe
2042 * @wol: container for info passed to the driver
2043 *
2044 * Process ethtool command "wol" to setup wake on lan features.
2045 * SiS900 supports sending WoL events if a correct packet is received,
2046 * but there is no simple way to filter them to only a subset (broadcast,
2047 * multicast, unicast or arp).
2048 */
2049
2050 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2051 {
2052 struct sis900_private *sis_priv = net_dev->priv;
2053 long pmctrl_addr = net_dev->base_addr + pmctrl;
2054 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2055
2056 if (wol->wolopts == 0) {
2057 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2058 cfgpmcsr &= ~PME_EN;
2059 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2060 outl(pmctrl_bits, pmctrl_addr);
2061 if (netif_msg_wol(sis_priv))
2062 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2063 return 0;
2064 }
2065
2066 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2067 | WAKE_BCAST | WAKE_ARP))
2068 return -EINVAL;
2069
2070 if (wol->wolopts & WAKE_MAGIC)
2071 pmctrl_bits |= MAGICPKT;
2072 if (wol->wolopts & WAKE_PHY)
2073 pmctrl_bits |= LINKON;
2074
2075 outl(pmctrl_bits, pmctrl_addr);
2076
2077 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2078 cfgpmcsr |= PME_EN;
2079 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2080 if (netif_msg_wol(sis_priv))
2081 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2082
2083 return 0;
2084 }
2085
2086 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2087 {
2088 long pmctrl_addr = net_dev->base_addr + pmctrl;
2089 u32 pmctrl_bits;
2090
2091 pmctrl_bits = inl(pmctrl_addr);
2092 if (pmctrl_bits & MAGICPKT)
2093 wol->wolopts |= WAKE_MAGIC;
2094 if (pmctrl_bits & LINKON)
2095 wol->wolopts |= WAKE_PHY;
2096
2097 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2098 }
2099
2100 static struct ethtool_ops sis900_ethtool_ops = {
2101 .get_drvinfo = sis900_get_drvinfo,
2102 .get_msglevel = sis900_get_msglevel,
2103 .set_msglevel = sis900_set_msglevel,
2104 .get_link = sis900_get_link,
2105 .get_settings = sis900_get_settings,
2106 .set_settings = sis900_set_settings,
2107 .nway_reset = sis900_nway_reset,
2108 .get_wol = sis900_get_wol,
2109 .set_wol = sis900_set_wol
2110 };
2111
2112 /**
2113 * mii_ioctl - process MII i/o control command
2114 * @net_dev: the net device to command for
2115 * @rq: parameter for command
2116 * @cmd: the i/o command
2117 *
2118 * Process MII command like read/write MII register
2119 */
2120
2121 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2122 {
2123 struct sis900_private *sis_priv = net_dev->priv;
2124 struct mii_ioctl_data *data = if_mii(rq);
2125
2126 switch(cmd) {
2127 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2128 data->phy_id = sis_priv->mii->phy_addr;
2129 /* Fall Through */
2130
2131 case SIOCGMIIREG: /* Read MII PHY register. */
2132 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2133 return 0;
2134
2135 case SIOCSMIIREG: /* Write MII PHY register. */
2136 if (!capable(CAP_NET_ADMIN))
2137 return -EPERM;
2138 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2139 return 0;
2140 default:
2141 return -EOPNOTSUPP;
2142 }
2143 }
2144
2145 /**
2146 * sis900_get_stats - Get sis900 read/write statistics
2147 * @net_dev: the net device to get statistics for
2148 *
2149 * get tx/rx statistics for sis900
2150 */
2151
2152 static struct net_device_stats *
2153 sis900_get_stats(struct net_device *net_dev)
2154 {
2155 struct sis900_private *sis_priv = net_dev->priv;
2156
2157 return &sis_priv->stats;
2158 }
2159
2160 /**
2161 * sis900_set_config - Set media type by net_device.set_config
2162 * @dev: the net device for media type change
2163 * @map: ifmap passed by ifconfig
2164 *
2165 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2166 * we support only port changes. All other runtime configuration
2167 * changes will be ignored
2168 */
2169
2170 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2171 {
2172 struct sis900_private *sis_priv = dev->priv;
2173 struct mii_phy *mii_phy = sis_priv->mii;
2174
2175 u16 status;
2176
2177 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2178 /* we switch on the ifmap->port field. I couldn't find anything
2179 * like a definition or standard for the values of that field.
2180 * I think the meaning of those values is device specific. But
2181 * since I would like to change the media type via the ifconfig
2182 * command I use the definition from linux/netdevice.h
2183 * (which seems to be different from the ifport(pcmcia) definition) */
2184 switch(map->port){
2185 case IF_PORT_UNKNOWN: /* use auto here */
2186 dev->if_port = map->port;
2187 /* we are going to change the media type, so the Link
2188 * will be temporary down and we need to reflect that
2189 * here. When the Link comes up again, it will be
2190 * sensed by the sis_timer procedure, which also does
2191 * all the rest for us */
2192 netif_carrier_off(dev);
2193
2194 /* read current state */
2195 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2196
2197 /* enable auto negotiation and reset the negotioation
2198 * (I don't really know what the auto negatiotiation
2199 * reset really means, but it sounds for me right to
2200 * do one here) */
2201 mdio_write(dev, mii_phy->phy_addr,
2202 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2203
2204 break;
2205
2206 case IF_PORT_10BASET: /* 10BaseT */
2207 dev->if_port = map->port;
2208
2209 /* we are going to change the media type, so the Link
2210 * will be temporary down and we need to reflect that
2211 * here. When the Link comes up again, it will be
2212 * sensed by the sis_timer procedure, which also does
2213 * all the rest for us */
2214 netif_carrier_off(dev);
2215
2216 /* set Speed to 10Mbps */
2217 /* read current state */
2218 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2219
2220 /* disable auto negotiation and force 10MBit mode*/
2221 mdio_write(dev, mii_phy->phy_addr,
2222 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2223 MII_CNTL_AUTO));
2224 break;
2225
2226 case IF_PORT_100BASET: /* 100BaseT */
2227 case IF_PORT_100BASETX: /* 100BaseTx */
2228 dev->if_port = map->port;
2229
2230 /* we are going to change the media type, so the Link
2231 * will be temporary down and we need to reflect that
2232 * here. When the Link comes up again, it will be
2233 * sensed by the sis_timer procedure, which also does
2234 * all the rest for us */
2235 netif_carrier_off(dev);
2236
2237 /* set Speed to 100Mbps */
2238 /* disable auto negotiation and enable 100MBit Mode */
2239 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2240 mdio_write(dev, mii_phy->phy_addr,
2241 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2242 MII_CNTL_SPEED);
2243
2244 break;
2245
2246 case IF_PORT_10BASE2: /* 10Base2 */
2247 case IF_PORT_AUI: /* AUI */
2248 case IF_PORT_100BASEFX: /* 100BaseFx */
2249 /* These Modes are not supported (are they?)*/
2250 return -EOPNOTSUPP;
2251 break;
2252
2253 default:
2254 return -EINVAL;
2255 }
2256 }
2257 return 0;
2258 }
2259
2260 /**
2261 * sis900_mcast_bitnr - compute hashtable index
2262 * @addr: multicast address
2263 * @revision: revision id of chip
2264 *
2265 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2266 * hash table, which makes this function a little bit different from other drivers
2267 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2268 * multicast hash table.
2269 */
2270
2271 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2272 {
2273
2274 u32 crc = ether_crc(6, addr);
2275
2276 /* leave 8 or 7 most siginifant bits */
2277 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2278 return ((int)(crc >> 24));
2279 else
2280 return ((int)(crc >> 25));
2281 }
2282
2283 /**
2284 * set_rx_mode - Set SiS900 receive mode
2285 * @net_dev: the net device to be set
2286 *
2287 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2288 * And set the appropriate multicast filter.
2289 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2290 */
2291
2292 static void set_rx_mode(struct net_device *net_dev)
2293 {
2294 long ioaddr = net_dev->base_addr;
2295 struct sis900_private * sis_priv = net_dev->priv;
2296 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2297 int i, table_entries;
2298 u32 rx_mode;
2299
2300 /* 635 Hash Table entries = 256(2^16) */
2301 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2302 (sis_priv->chipset_rev == SIS900B_900_REV))
2303 table_entries = 16;
2304 else
2305 table_entries = 8;
2306
2307 if (net_dev->flags & IFF_PROMISC) {
2308 /* Accept any kinds of packets */
2309 rx_mode = RFPromiscuous;
2310 for (i = 0; i < table_entries; i++)
2311 mc_filter[i] = 0xffff;
2312 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2313 (net_dev->flags & IFF_ALLMULTI)) {
2314 /* too many multicast addresses or accept all multicast packet */
2315 rx_mode = RFAAB | RFAAM;
2316 for (i = 0; i < table_entries; i++)
2317 mc_filter[i] = 0xffff;
2318 } else {
2319 /* Accept Broadcast packet, destination address matchs our
2320 * MAC address, use Receive Filter to reject unwanted MCAST
2321 * packets */
2322 struct dev_mc_list *mclist;
2323 rx_mode = RFAAB;
2324 for (i = 0, mclist = net_dev->mc_list;
2325 mclist && i < net_dev->mc_count;
2326 i++, mclist = mclist->next) {
2327 unsigned int bit_nr =
2328 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2329 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2330 }
2331 }
2332
2333 /* update Multicast Hash Table in Receive Filter */
2334 for (i = 0; i < table_entries; i++) {
2335 /* why plus 0x04 ??, That makes the correct value for hash table. */
2336 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2337 outl(mc_filter[i], ioaddr + rfdr);
2338 }
2339
2340 outl(RFEN | rx_mode, ioaddr + rfcr);
2341
2342 /* sis900 is capable of looping back packets at MAC level for
2343 * debugging purpose */
2344 if (net_dev->flags & IFF_LOOPBACK) {
2345 u32 cr_saved;
2346 /* We must disable Tx/Rx before setting loopback mode */
2347 cr_saved = inl(ioaddr + cr);
2348 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2349 /* enable loopback */
2350 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2351 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2352 /* restore cr */
2353 outl(cr_saved, ioaddr + cr);
2354 }
2355
2356 return;
2357 }
2358
2359 /**
2360 * sis900_reset - Reset sis900 MAC
2361 * @net_dev: the net device to reset
2362 *
2363 * reset sis900 MAC and wait until finished
2364 * reset through command register
2365 * change backoff algorithm for 900B0 & 635 M/B
2366 */
2367
2368 static void sis900_reset(struct net_device *net_dev)
2369 {
2370 struct sis900_private * sis_priv = net_dev->priv;
2371 long ioaddr = net_dev->base_addr;
2372 int i = 0;
2373 u32 status = TxRCMP | RxRCMP;
2374
2375 outl(0, ioaddr + ier);
2376 outl(0, ioaddr + imr);
2377 outl(0, ioaddr + rfcr);
2378
2379 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2380
2381 /* Check that the chip has finished the reset. */
2382 while (status && (i++ < 1000)) {
2383 status ^= (inl(isr + ioaddr) & status);
2384 }
2385
2386 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2387 (sis_priv->chipset_rev == SIS900B_900_REV) )
2388 outl(PESEL | RND_CNT, ioaddr + cfg);
2389 else
2390 outl(PESEL, ioaddr + cfg);
2391 }
2392
2393 /**
2394 * sis900_remove - Remove sis900 device
2395 * @pci_dev: the pci device to be removed
2396 *
2397 * remove and release SiS900 net device
2398 */
2399
2400 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2401 {
2402 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2403 struct sis900_private * sis_priv = net_dev->priv;
2404 struct mii_phy *phy = NULL;
2405
2406 while (sis_priv->first_mii) {
2407 phy = sis_priv->first_mii;
2408 sis_priv->first_mii = phy->next;
2409 kfree(phy);
2410 }
2411
2412 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2413 sis_priv->rx_ring_dma);
2414 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2415 sis_priv->tx_ring_dma);
2416 unregister_netdev(net_dev);
2417 free_netdev(net_dev);
2418 pci_release_regions(pci_dev);
2419 pci_set_drvdata(pci_dev, NULL);
2420 }
2421
2422 #ifdef CONFIG_PM
2423
2424 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2425 {
2426 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2427 long ioaddr = net_dev->base_addr;
2428
2429 if(!netif_running(net_dev))
2430 return 0;
2431
2432 netif_stop_queue(net_dev);
2433 netif_device_detach(net_dev);
2434
2435 /* Stop the chip's Tx and Rx Status Machine */
2436 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2437
2438 pci_set_power_state(pci_dev, PCI_D3hot);
2439 pci_save_state(pci_dev);
2440
2441 return 0;
2442 }
2443
2444 static int sis900_resume(struct pci_dev *pci_dev)
2445 {
2446 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2447 struct sis900_private *sis_priv = net_dev->priv;
2448 long ioaddr = net_dev->base_addr;
2449
2450 if(!netif_running(net_dev))
2451 return 0;
2452 pci_restore_state(pci_dev);
2453 pci_set_power_state(pci_dev, PCI_D0);
2454
2455 sis900_init_rxfilter(net_dev);
2456
2457 sis900_init_tx_ring(net_dev);
2458 sis900_init_rx_ring(net_dev);
2459
2460 set_rx_mode(net_dev);
2461
2462 netif_device_attach(net_dev);
2463 netif_start_queue(net_dev);
2464
2465 /* Workaround for EDB */
2466 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2467
2468 /* Enable all known interrupts by setting the interrupt mask. */
2469 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2470 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2471 outl(IE, ioaddr + ier);
2472
2473 sis900_check_mode(net_dev, sis_priv->mii);
2474
2475 return 0;
2476 }
2477 #endif /* CONFIG_PM */
2478
2479 static struct pci_driver sis900_pci_driver = {
2480 .name = SIS900_MODULE_NAME,
2481 .id_table = sis900_pci_tbl,
2482 .probe = sis900_probe,
2483 .remove = __devexit_p(sis900_remove),
2484 #ifdef CONFIG_PM
2485 .suspend = sis900_suspend,
2486 .resume = sis900_resume,
2487 #endif /* CONFIG_PM */
2488 };
2489
2490 static int __init sis900_init_module(void)
2491 {
2492 /* when a module, this is printed whether or not devices are found in probe */
2493 #ifdef MODULE
2494 printk(version);
2495 #endif
2496
2497 return pci_module_init(&sis900_pci_driver);
2498 }
2499
2500 static void __exit sis900_cleanup_module(void)
2501 {
2502 pci_unregister_driver(&sis900_pci_driver);
2503 }
2504
2505 module_init(sis900_init_module);
2506 module_exit(sis900_cleanup_module);
2507