1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
28 /**************************************************************************
32 **************************************************************************
35 /* Loopback mode names (see LOOPBACK_MODE()) */
36 const unsigned int efx_loopback_mode_max
= LOOPBACK_MAX
;
37 const char *efx_loopback_mode_names
[] = {
38 [LOOPBACK_NONE
] = "NONE",
39 [LOOPBACK_GMAC
] = "GMAC",
40 [LOOPBACK_XGMII
] = "XGMII",
41 [LOOPBACK_XGXS
] = "XGXS",
42 [LOOPBACK_XAUI
] = "XAUI",
43 [LOOPBACK_GPHY
] = "GPHY",
44 [LOOPBACK_PHYXS
] = "PHYXS",
45 [LOOPBACK_PCS
] = "PCS",
46 [LOOPBACK_PMAPMD
] = "PMA/PMD",
47 [LOOPBACK_NETWORK
] = "NETWORK",
50 /* Interrupt mode names (see INT_MODE())) */
51 const unsigned int efx_interrupt_mode_max
= EFX_INT_MODE_MAX
;
52 const char *efx_interrupt_mode_names
[] = {
53 [EFX_INT_MODE_MSIX
] = "MSI-X",
54 [EFX_INT_MODE_MSI
] = "MSI",
55 [EFX_INT_MODE_LEGACY
] = "legacy",
58 const unsigned int efx_reset_type_max
= RESET_TYPE_MAX
;
59 const char *efx_reset_type_names
[] = {
60 [RESET_TYPE_INVISIBLE
] = "INVISIBLE",
61 [RESET_TYPE_ALL
] = "ALL",
62 [RESET_TYPE_WORLD
] = "WORLD",
63 [RESET_TYPE_DISABLE
] = "DISABLE",
64 [RESET_TYPE_TX_WATCHDOG
] = "TX_WATCHDOG",
65 [RESET_TYPE_INT_ERROR
] = "INT_ERROR",
66 [RESET_TYPE_RX_RECOVERY
] = "RX_RECOVERY",
67 [RESET_TYPE_RX_DESC_FETCH
] = "RX_DESC_FETCH",
68 [RESET_TYPE_TX_DESC_FETCH
] = "TX_DESC_FETCH",
69 [RESET_TYPE_TX_SKIP
] = "TX_SKIP",
72 #define EFX_MAX_MTU (9 * 1024)
74 /* RX slow fill workqueue. If memory allocation fails in the fast path,
75 * a work item is pushed onto this work queue to retry the allocation later,
76 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
77 * workqueue, there is nothing to be gained in making it per NIC
79 static struct workqueue_struct
*refill_workqueue
;
81 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
82 * queued onto this work queue. This is not a per-nic work queue, because
83 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
85 static struct workqueue_struct
*reset_workqueue
;
87 /**************************************************************************
91 *************************************************************************/
94 * Use separate channels for TX and RX events
96 * Set this to 1 to use separate channels for TX and RX. It allows us
97 * to control interrupt affinity separately for TX and RX.
99 * This is only used in MSI-X interrupt mode
101 static unsigned int separate_tx_channels
;
102 module_param(separate_tx_channels
, uint
, 0644);
103 MODULE_PARM_DESC(separate_tx_channels
,
104 "Use separate channels for TX and RX");
106 /* This is the weight assigned to each of the (per-channel) virtual
109 static int napi_weight
= 64;
111 /* This is the time (in jiffies) between invocations of the hardware
112 * monitor, which checks for known hardware bugs and resets the
113 * hardware and driver as necessary.
115 unsigned int efx_monitor_interval
= 1 * HZ
;
117 /* This controls whether or not the driver will initialise devices
118 * with invalid MAC addresses stored in the EEPROM or flash. If true,
119 * such devices will be initialised with a random locally-generated
120 * MAC address. This allows for loading the sfc_mtd driver to
121 * reprogram the flash, even if the flash contents (including the MAC
122 * address) have previously been erased.
124 static unsigned int allow_bad_hwaddr
;
126 /* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
132 static unsigned int rx_irq_mod_usec
= 60;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
143 static unsigned int tx_irq_mod_usec
= 150;
145 /* This is the first interrupt mode to try out of:
150 static unsigned int interrupt_mode
;
152 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each package (level II cache)
159 static unsigned int rss_cpus
;
160 module_param(rss_cpus
, uint
, 0444);
161 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
163 static int phy_flash_cfg
;
164 module_param(phy_flash_cfg
, int, 0644);
165 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
167 static unsigned irq_adapt_low_thresh
= 10000;
168 module_param(irq_adapt_low_thresh
, uint
, 0644);
169 MODULE_PARM_DESC(irq_adapt_low_thresh
,
170 "Threshold score for reducing IRQ moderation");
172 static unsigned irq_adapt_high_thresh
= 20000;
173 module_param(irq_adapt_high_thresh
, uint
, 0644);
174 MODULE_PARM_DESC(irq_adapt_high_thresh
,
175 "Threshold score for increasing IRQ moderation");
177 /**************************************************************************
179 * Utility functions and prototypes
181 *************************************************************************/
182 static void efx_remove_channel(struct efx_channel
*channel
);
183 static void efx_remove_port(struct efx_nic
*efx
);
184 static void efx_fini_napi(struct efx_nic
*efx
);
185 static void efx_fini_channels(struct efx_nic
*efx
);
187 #define EFX_ASSERT_RESET_SERIALISED(efx) \
189 if ((efx->state == STATE_RUNNING) || \
190 (efx->state == STATE_DISABLED)) \
194 /**************************************************************************
196 * Event queue processing
198 *************************************************************************/
200 /* Process channel's event queue
202 * This function is responsible for processing the event queue of a
203 * single channel. The caller must guarantee that this function will
204 * never be concurrently called more than once on the same channel,
205 * though different channels may be being processed concurrently.
207 static int efx_process_channel(struct efx_channel
*channel
, int rx_quota
)
209 struct efx_nic
*efx
= channel
->efx
;
212 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
216 rx_packets
= falcon_process_eventq(channel
, rx_quota
);
220 /* Deliver last RX packet. */
221 if (channel
->rx_pkt
) {
222 __efx_rx_packet(channel
, channel
->rx_pkt
,
223 channel
->rx_pkt_csummed
);
224 channel
->rx_pkt
= NULL
;
227 efx_rx_strategy(channel
);
229 efx_fast_push_rx_descriptors(&efx
->rx_queue
[channel
->channel
]);
234 /* Mark channel as finished processing
236 * Note that since we will not receive further interrupts for this
237 * channel before we finish processing and call the eventq_read_ack()
238 * method, there is no need to use the interrupt hold-off timers.
240 static inline void efx_channel_processed(struct efx_channel
*channel
)
242 /* The interrupt handler for this channel may set work_pending
243 * as soon as we acknowledge the events we've seen. Make sure
244 * it's cleared before then. */
245 channel
->work_pending
= false;
248 falcon_eventq_read_ack(channel
);
253 * NAPI guarantees serialisation of polls of the same device, which
254 * provides the guarantee required by efx_process_channel().
256 static int efx_poll(struct napi_struct
*napi
, int budget
)
258 struct efx_channel
*channel
=
259 container_of(napi
, struct efx_channel
, napi_str
);
262 EFX_TRACE(channel
->efx
, "channel %d NAPI poll executing on CPU %d\n",
263 channel
->channel
, raw_smp_processor_id());
265 rx_packets
= efx_process_channel(channel
, budget
);
267 if (rx_packets
< budget
) {
268 struct efx_nic
*efx
= channel
->efx
;
270 if (channel
->used_flags
& EFX_USED_BY_RX
&&
271 efx
->irq_rx_adaptive
&&
272 unlikely(++channel
->irq_count
== 1000)) {
273 if (unlikely(channel
->irq_mod_score
<
274 irq_adapt_low_thresh
)) {
275 if (channel
->irq_moderation
> 1) {
276 channel
->irq_moderation
-= 1;
277 efx
->type
->push_irq_moderation(channel
);
279 } else if (unlikely(channel
->irq_mod_score
>
280 irq_adapt_high_thresh
)) {
281 if (channel
->irq_moderation
<
282 efx
->irq_rx_moderation
) {
283 channel
->irq_moderation
+= 1;
284 efx
->type
->push_irq_moderation(channel
);
287 channel
->irq_count
= 0;
288 channel
->irq_mod_score
= 0;
291 /* There is no race here; although napi_disable() will
292 * only wait for napi_complete(), this isn't a problem
293 * since efx_channel_processed() will have no effect if
294 * interrupts have already been disabled.
297 efx_channel_processed(channel
);
303 /* Process the eventq of the specified channel immediately on this CPU
305 * Disable hardware generated interrupts, wait for any existing
306 * processing to finish, then directly poll (and ack ) the eventq.
307 * Finally reenable NAPI and interrupts.
309 * Since we are touching interrupts the caller should hold the suspend lock
311 void efx_process_channel_now(struct efx_channel
*channel
)
313 struct efx_nic
*efx
= channel
->efx
;
315 BUG_ON(!channel
->used_flags
);
316 BUG_ON(!channel
->enabled
);
318 /* Disable interrupts and wait for ISRs to complete */
319 falcon_disable_interrupts(efx
);
321 synchronize_irq(efx
->legacy_irq
);
323 synchronize_irq(channel
->irq
);
325 /* Wait for any NAPI processing to complete */
326 napi_disable(&channel
->napi_str
);
328 /* Poll the channel */
329 efx_process_channel(channel
, EFX_EVQ_SIZE
);
331 /* Ack the eventq. This may cause an interrupt to be generated
332 * when they are reenabled */
333 efx_channel_processed(channel
);
335 napi_enable(&channel
->napi_str
);
336 falcon_enable_interrupts(efx
);
339 /* Create event queue
340 * Event queue memory allocations are done only once. If the channel
341 * is reset, the memory buffer will be reused; this guards against
342 * errors during channel reset and also simplifies interrupt handling.
344 static int efx_probe_eventq(struct efx_channel
*channel
)
346 EFX_LOG(channel
->efx
, "chan %d create event queue\n", channel
->channel
);
348 return falcon_probe_eventq(channel
);
351 /* Prepare channel's event queue */
352 static void efx_init_eventq(struct efx_channel
*channel
)
354 EFX_LOG(channel
->efx
, "chan %d init event queue\n", channel
->channel
);
356 channel
->eventq_read_ptr
= 0;
358 falcon_init_eventq(channel
);
361 static void efx_fini_eventq(struct efx_channel
*channel
)
363 EFX_LOG(channel
->efx
, "chan %d fini event queue\n", channel
->channel
);
365 falcon_fini_eventq(channel
);
368 static void efx_remove_eventq(struct efx_channel
*channel
)
370 EFX_LOG(channel
->efx
, "chan %d remove event queue\n", channel
->channel
);
372 falcon_remove_eventq(channel
);
375 /**************************************************************************
379 *************************************************************************/
381 static int efx_probe_channel(struct efx_channel
*channel
)
383 struct efx_tx_queue
*tx_queue
;
384 struct efx_rx_queue
*rx_queue
;
387 EFX_LOG(channel
->efx
, "creating channel %d\n", channel
->channel
);
389 rc
= efx_probe_eventq(channel
);
393 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
394 rc
= efx_probe_tx_queue(tx_queue
);
399 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
400 rc
= efx_probe_rx_queue(rx_queue
);
405 channel
->n_rx_frm_trunc
= 0;
410 efx_for_each_channel_rx_queue(rx_queue
, channel
)
411 efx_remove_rx_queue(rx_queue
);
413 efx_for_each_channel_tx_queue(tx_queue
, channel
)
414 efx_remove_tx_queue(tx_queue
);
420 static void efx_set_channel_names(struct efx_nic
*efx
)
422 struct efx_channel
*channel
;
423 const char *type
= "";
426 efx_for_each_channel(channel
, efx
) {
427 number
= channel
->channel
;
428 if (efx
->n_channels
> efx
->n_rx_queues
) {
429 if (channel
->channel
< efx
->n_rx_queues
) {
433 number
-= efx
->n_rx_queues
;
436 snprintf(channel
->name
, sizeof(channel
->name
),
437 "%s%s-%d", efx
->name
, type
, number
);
441 /* Channels are shutdown and reinitialised whilst the NIC is running
442 * to propagate configuration changes (mtu, checksum offload), or
443 * to clear hardware error conditions
445 static void efx_init_channels(struct efx_nic
*efx
)
447 struct efx_tx_queue
*tx_queue
;
448 struct efx_rx_queue
*rx_queue
;
449 struct efx_channel
*channel
;
451 /* Calculate the rx buffer allocation parameters required to
452 * support the current MTU, including padding for header
453 * alignment and overruns.
455 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
456 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
457 efx
->type
->rx_buffer_padding
);
458 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
);
460 /* Initialise the channels */
461 efx_for_each_channel(channel
, efx
) {
462 EFX_LOG(channel
->efx
, "init chan %d\n", channel
->channel
);
464 efx_init_eventq(channel
);
466 efx_for_each_channel_tx_queue(tx_queue
, channel
)
467 efx_init_tx_queue(tx_queue
);
469 /* The rx buffer allocation strategy is MTU dependent */
470 efx_rx_strategy(channel
);
472 efx_for_each_channel_rx_queue(rx_queue
, channel
)
473 efx_init_rx_queue(rx_queue
);
475 WARN_ON(channel
->rx_pkt
!= NULL
);
476 efx_rx_strategy(channel
);
480 /* This enables event queue processing and packet transmission.
482 * Note that this function is not allowed to fail, since that would
483 * introduce too much complexity into the suspend/resume path.
485 static void efx_start_channel(struct efx_channel
*channel
)
487 struct efx_rx_queue
*rx_queue
;
489 EFX_LOG(channel
->efx
, "starting chan %d\n", channel
->channel
);
491 /* The interrupt handler for this channel may set work_pending
492 * as soon as we enable it. Make sure it's cleared before
493 * then. Similarly, make sure it sees the enabled flag set. */
494 channel
->work_pending
= false;
495 channel
->enabled
= true;
498 napi_enable(&channel
->napi_str
);
500 /* Load up RX descriptors */
501 efx_for_each_channel_rx_queue(rx_queue
, channel
)
502 efx_fast_push_rx_descriptors(rx_queue
);
505 /* This disables event queue processing and packet transmission.
506 * This function does not guarantee that all queue processing
507 * (e.g. RX refill) is complete.
509 static void efx_stop_channel(struct efx_channel
*channel
)
511 struct efx_rx_queue
*rx_queue
;
513 if (!channel
->enabled
)
516 EFX_LOG(channel
->efx
, "stop chan %d\n", channel
->channel
);
518 channel
->enabled
= false;
519 napi_disable(&channel
->napi_str
);
521 /* Ensure that any worker threads have exited or will be no-ops */
522 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
523 spin_lock_bh(&rx_queue
->add_lock
);
524 spin_unlock_bh(&rx_queue
->add_lock
);
528 static void efx_fini_channels(struct efx_nic
*efx
)
530 struct efx_channel
*channel
;
531 struct efx_tx_queue
*tx_queue
;
532 struct efx_rx_queue
*rx_queue
;
535 EFX_ASSERT_RESET_SERIALISED(efx
);
536 BUG_ON(efx
->port_enabled
);
538 rc
= falcon_flush_queues(efx
);
540 EFX_ERR(efx
, "failed to flush queues\n");
542 EFX_LOG(efx
, "successfully flushed all queues\n");
544 efx_for_each_channel(channel
, efx
) {
545 EFX_LOG(channel
->efx
, "shut down chan %d\n", channel
->channel
);
547 efx_for_each_channel_rx_queue(rx_queue
, channel
)
548 efx_fini_rx_queue(rx_queue
);
549 efx_for_each_channel_tx_queue(tx_queue
, channel
)
550 efx_fini_tx_queue(tx_queue
);
551 efx_fini_eventq(channel
);
555 static void efx_remove_channel(struct efx_channel
*channel
)
557 struct efx_tx_queue
*tx_queue
;
558 struct efx_rx_queue
*rx_queue
;
560 EFX_LOG(channel
->efx
, "destroy chan %d\n", channel
->channel
);
562 efx_for_each_channel_rx_queue(rx_queue
, channel
)
563 efx_remove_rx_queue(rx_queue
);
564 efx_for_each_channel_tx_queue(tx_queue
, channel
)
565 efx_remove_tx_queue(tx_queue
);
566 efx_remove_eventq(channel
);
568 channel
->used_flags
= 0;
571 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
, int delay
)
573 queue_delayed_work(refill_workqueue
, &rx_queue
->work
, delay
);
576 /**************************************************************************
580 **************************************************************************/
582 /* This ensures that the kernel is kept informed (via
583 * netif_carrier_on/off) of the link status, and also maintains the
584 * link status's stop on the port's TX queue.
586 void efx_link_status_changed(struct efx_nic
*efx
)
588 struct efx_link_state
*link_state
= &efx
->link_state
;
590 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
591 * that no events are triggered between unregister_netdev() and the
592 * driver unloading. A more general condition is that NETDEV_CHANGE
593 * can only be generated between NETDEV_UP and NETDEV_DOWN */
594 if (!netif_running(efx
->net_dev
))
597 if (efx
->port_inhibited
) {
598 netif_carrier_off(efx
->net_dev
);
602 if (link_state
->up
!= netif_carrier_ok(efx
->net_dev
)) {
603 efx
->n_link_state_changes
++;
606 netif_carrier_on(efx
->net_dev
);
608 netif_carrier_off(efx
->net_dev
);
611 /* Status message for kernel log */
612 if (link_state
->up
) {
613 EFX_INFO(efx
, "link up at %uMbps %s-duplex (MTU %d)%s\n",
614 link_state
->speed
, link_state
->fd
? "full" : "half",
616 (efx
->promiscuous
? " [PROMISC]" : ""));
618 EFX_INFO(efx
, "link down\n");
623 void efx_link_set_advertising(struct efx_nic
*efx
, u32 advertising
)
625 efx
->link_advertising
= advertising
;
627 if (advertising
& ADVERTISED_Pause
)
628 efx
->wanted_fc
|= (EFX_FC_TX
| EFX_FC_RX
);
630 efx
->wanted_fc
&= ~(EFX_FC_TX
| EFX_FC_RX
);
631 if (advertising
& ADVERTISED_Asym_Pause
)
632 efx
->wanted_fc
^= EFX_FC_TX
;
636 void efx_link_set_wanted_fc(struct efx_nic
*efx
, enum efx_fc_type wanted_fc
)
638 efx
->wanted_fc
= wanted_fc
;
639 if (efx
->link_advertising
) {
640 if (wanted_fc
& EFX_FC_RX
)
641 efx
->link_advertising
|= (ADVERTISED_Pause
|
642 ADVERTISED_Asym_Pause
);
644 efx
->link_advertising
&= ~(ADVERTISED_Pause
|
645 ADVERTISED_Asym_Pause
);
646 if (wanted_fc
& EFX_FC_TX
)
647 efx
->link_advertising
^= ADVERTISED_Asym_Pause
;
651 static void efx_fini_port(struct efx_nic
*efx
);
653 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
654 * the MAC appropriately. All other PHY configuration changes are pushed
655 * through phy_op->set_settings(), and pushed asynchronously to the MAC
656 * through efx_monitor().
658 * Callers must hold the mac_lock
660 int __efx_reconfigure_port(struct efx_nic
*efx
)
662 enum efx_phy_mode phy_mode
;
665 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
667 /* Serialise the promiscuous flag with efx_set_multicast_list. */
668 if (efx_dev_registered(efx
)) {
669 netif_addr_lock_bh(efx
->net_dev
);
670 netif_addr_unlock_bh(efx
->net_dev
);
673 /* Disable PHY transmit in mac level loopbacks */
674 phy_mode
= efx
->phy_mode
;
675 if (LOOPBACK_INTERNAL(efx
))
676 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
678 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
680 rc
= efx
->type
->reconfigure_port(efx
);
683 efx
->phy_mode
= phy_mode
;
688 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
690 int efx_reconfigure_port(struct efx_nic
*efx
)
694 EFX_ASSERT_RESET_SERIALISED(efx
);
696 mutex_lock(&efx
->mac_lock
);
697 rc
= __efx_reconfigure_port(efx
);
698 mutex_unlock(&efx
->mac_lock
);
703 /* Asynchronous work item for changing MAC promiscuity and multicast
704 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
706 static void efx_mac_work(struct work_struct
*data
)
708 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, mac_work
);
710 mutex_lock(&efx
->mac_lock
);
711 if (efx
->port_enabled
) {
712 efx
->type
->push_multicast_hash(efx
);
713 efx
->mac_op
->reconfigure(efx
);
715 mutex_unlock(&efx
->mac_lock
);
718 static int efx_probe_port(struct efx_nic
*efx
)
722 EFX_LOG(efx
, "create port\n");
724 /* Connect up MAC/PHY operations table */
725 rc
= efx
->type
->probe_port(efx
);
730 efx
->phy_mode
= PHY_MODE_SPECIAL
;
732 /* Sanity check MAC address */
733 if (is_valid_ether_addr(efx
->mac_address
)) {
734 memcpy(efx
->net_dev
->dev_addr
, efx
->mac_address
, ETH_ALEN
);
736 EFX_ERR(efx
, "invalid MAC address %pM\n",
738 if (!allow_bad_hwaddr
) {
742 random_ether_addr(efx
->net_dev
->dev_addr
);
743 EFX_INFO(efx
, "using locally-generated MAC %pM\n",
744 efx
->net_dev
->dev_addr
);
750 efx_remove_port(efx
);
754 static int efx_init_port(struct efx_nic
*efx
)
758 EFX_LOG(efx
, "init port\n");
760 mutex_lock(&efx
->mac_lock
);
762 rc
= efx
->phy_op
->init(efx
);
766 efx
->port_initialized
= true;
768 /* Reconfigure the MAC before creating dma queues (required for
769 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
770 efx
->mac_op
->reconfigure(efx
);
772 /* Ensure the PHY advertises the correct flow control settings */
773 rc
= efx
->phy_op
->reconfigure(efx
);
777 mutex_unlock(&efx
->mac_lock
);
781 efx
->phy_op
->fini(efx
);
783 mutex_unlock(&efx
->mac_lock
);
787 static void efx_start_port(struct efx_nic
*efx
)
789 EFX_LOG(efx
, "start port\n");
790 BUG_ON(efx
->port_enabled
);
792 mutex_lock(&efx
->mac_lock
);
793 efx
->port_enabled
= true;
795 /* efx_mac_work() might have been scheduled after efx_stop_port(),
796 * and then cancelled by efx_flush_all() */
797 efx
->type
->push_multicast_hash(efx
);
798 efx
->mac_op
->reconfigure(efx
);
800 mutex_unlock(&efx
->mac_lock
);
803 /* Prevent efx_mac_work() and efx_monitor() from working */
804 static void efx_stop_port(struct efx_nic
*efx
)
806 EFX_LOG(efx
, "stop port\n");
808 mutex_lock(&efx
->mac_lock
);
809 efx
->port_enabled
= false;
810 mutex_unlock(&efx
->mac_lock
);
812 /* Serialise against efx_set_multicast_list() */
813 if (efx_dev_registered(efx
)) {
814 netif_addr_lock_bh(efx
->net_dev
);
815 netif_addr_unlock_bh(efx
->net_dev
);
819 static void efx_fini_port(struct efx_nic
*efx
)
821 EFX_LOG(efx
, "shut down port\n");
823 if (!efx
->port_initialized
)
826 efx
->phy_op
->fini(efx
);
827 efx
->port_initialized
= false;
829 efx
->link_state
.up
= false;
830 efx_link_status_changed(efx
);
833 static void efx_remove_port(struct efx_nic
*efx
)
835 EFX_LOG(efx
, "destroying port\n");
837 efx
->type
->remove_port(efx
);
840 /**************************************************************************
844 **************************************************************************/
846 /* This configures the PCI device to enable I/O and DMA. */
847 static int efx_init_io(struct efx_nic
*efx
)
849 struct pci_dev
*pci_dev
= efx
->pci_dev
;
850 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
853 EFX_LOG(efx
, "initialising I/O\n");
855 rc
= pci_enable_device(pci_dev
);
857 EFX_ERR(efx
, "failed to enable PCI device\n");
861 pci_set_master(pci_dev
);
863 /* Set the PCI DMA mask. Try all possibilities from our
864 * genuine mask down to 32 bits, because some architectures
865 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
866 * masks event though they reject 46 bit masks.
868 while (dma_mask
> 0x7fffffffUL
) {
869 if (pci_dma_supported(pci_dev
, dma_mask
) &&
870 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
875 EFX_ERR(efx
, "could not find a suitable DMA mask\n");
878 EFX_LOG(efx
, "using DMA mask %llx\n", (unsigned long long) dma_mask
);
879 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
881 /* pci_set_consistent_dma_mask() is not *allowed* to
882 * fail with a mask that pci_set_dma_mask() accepted,
883 * but just in case...
885 EFX_ERR(efx
, "failed to set consistent DMA mask\n");
889 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
, EFX_MEM_BAR
);
890 rc
= pci_request_region(pci_dev
, EFX_MEM_BAR
, "sfc");
892 EFX_ERR(efx
, "request for memory BAR failed\n");
896 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
897 efx
->type
->mem_map_size
);
899 EFX_ERR(efx
, "could not map memory BAR at %llx+%x\n",
900 (unsigned long long)efx
->membase_phys
,
901 efx
->type
->mem_map_size
);
905 EFX_LOG(efx
, "memory BAR at %llx+%x (virtual %p)\n",
906 (unsigned long long)efx
->membase_phys
,
907 efx
->type
->mem_map_size
, efx
->membase
);
912 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
914 efx
->membase_phys
= 0;
916 pci_disable_device(efx
->pci_dev
);
921 static void efx_fini_io(struct efx_nic
*efx
)
923 EFX_LOG(efx
, "shutting down I/O\n");
926 iounmap(efx
->membase
);
930 if (efx
->membase_phys
) {
931 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
932 efx
->membase_phys
= 0;
935 pci_disable_device(efx
->pci_dev
);
938 /* Get number of RX queues wanted. Return number of online CPU
939 * packages in the expectation that an IRQ balancer will spread
940 * interrupts across them. */
941 static int efx_wanted_rx_queues(void)
943 cpumask_var_t core_mask
;
947 if (unlikely(!zalloc_cpumask_var(&core_mask
, GFP_KERNEL
))) {
949 "sfc: RSS disabled due to allocation failure\n");
954 for_each_online_cpu(cpu
) {
955 if (!cpumask_test_cpu(cpu
, core_mask
)) {
957 cpumask_or(core_mask
, core_mask
,
958 topology_core_cpumask(cpu
));
962 free_cpumask_var(core_mask
);
966 /* Probe the number and type of interrupts we are able to obtain, and
967 * the resulting numbers of channels and RX queues.
969 static void efx_probe_interrupts(struct efx_nic
*efx
)
972 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
975 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
976 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
980 /* We want one RX queue and interrupt per CPU package
981 * (or as specified by the rss_cpus module parameter).
982 * We will need one channel per interrupt.
984 rx_queues
= rss_cpus
? rss_cpus
: efx_wanted_rx_queues();
985 wanted_ints
= rx_queues
+ (separate_tx_channels
? 1 : 0);
986 wanted_ints
= min(wanted_ints
, max_channels
);
988 for (i
= 0; i
< wanted_ints
; i
++)
989 xentries
[i
].entry
= i
;
990 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, wanted_ints
);
992 EFX_ERR(efx
, "WARNING: Insufficient MSI-X vectors"
993 " available (%d < %d).\n", rc
, wanted_ints
);
994 EFX_ERR(efx
, "WARNING: Performance may be reduced.\n");
995 EFX_BUG_ON_PARANOID(rc
>= wanted_ints
);
997 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
1002 efx
->n_rx_queues
= min(rx_queues
, wanted_ints
);
1003 efx
->n_channels
= wanted_ints
;
1004 for (i
= 0; i
< wanted_ints
; i
++)
1005 efx
->channel
[i
].irq
= xentries
[i
].vector
;
1007 /* Fall back to single channel MSI */
1008 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
1009 EFX_ERR(efx
, "could not enable MSI-X\n");
1013 /* Try single interrupt MSI */
1014 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
1015 efx
->n_rx_queues
= 1;
1016 efx
->n_channels
= 1;
1017 rc
= pci_enable_msi(efx
->pci_dev
);
1019 efx
->channel
[0].irq
= efx
->pci_dev
->irq
;
1021 EFX_ERR(efx
, "could not enable MSI\n");
1022 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
1026 /* Assume legacy interrupts */
1027 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
1028 efx
->n_rx_queues
= 1;
1029 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
1030 efx
->legacy_irq
= efx
->pci_dev
->irq
;
1034 static void efx_remove_interrupts(struct efx_nic
*efx
)
1036 struct efx_channel
*channel
;
1038 /* Remove MSI/MSI-X interrupts */
1039 efx_for_each_channel(channel
, efx
)
1041 pci_disable_msi(efx
->pci_dev
);
1042 pci_disable_msix(efx
->pci_dev
);
1044 /* Remove legacy interrupt */
1045 efx
->legacy_irq
= 0;
1048 static void efx_set_channels(struct efx_nic
*efx
)
1050 struct efx_tx_queue
*tx_queue
;
1051 struct efx_rx_queue
*rx_queue
;
1053 efx_for_each_tx_queue(tx_queue
, efx
) {
1054 if (separate_tx_channels
)
1055 tx_queue
->channel
= &efx
->channel
[efx
->n_channels
-1];
1057 tx_queue
->channel
= &efx
->channel
[0];
1058 tx_queue
->channel
->used_flags
|= EFX_USED_BY_TX
;
1061 efx_for_each_rx_queue(rx_queue
, efx
) {
1062 rx_queue
->channel
= &efx
->channel
[rx_queue
->queue
];
1063 rx_queue
->channel
->used_flags
|= EFX_USED_BY_RX
;
1067 static int efx_probe_nic(struct efx_nic
*efx
)
1071 EFX_LOG(efx
, "creating NIC\n");
1073 /* Carry out hardware-type specific initialisation */
1074 rc
= efx
->type
->probe(efx
);
1078 /* Determine the number of channels and RX queues by trying to hook
1079 * in MSI-X interrupts. */
1080 efx_probe_interrupts(efx
);
1082 efx_set_channels(efx
);
1084 /* Initialise the interrupt moderation settings */
1085 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
, true);
1090 static void efx_remove_nic(struct efx_nic
*efx
)
1092 EFX_LOG(efx
, "destroying NIC\n");
1094 efx_remove_interrupts(efx
);
1095 efx
->type
->remove(efx
);
1098 /**************************************************************************
1100 * NIC startup/shutdown
1102 *************************************************************************/
1104 static int efx_probe_all(struct efx_nic
*efx
)
1106 struct efx_channel
*channel
;
1110 rc
= efx_probe_nic(efx
);
1112 EFX_ERR(efx
, "failed to create NIC\n");
1117 rc
= efx_probe_port(efx
);
1119 EFX_ERR(efx
, "failed to create port\n");
1123 /* Create channels */
1124 efx_for_each_channel(channel
, efx
) {
1125 rc
= efx_probe_channel(channel
);
1127 EFX_ERR(efx
, "failed to create channel %d\n",
1132 efx_set_channel_names(efx
);
1137 efx_for_each_channel(channel
, efx
)
1138 efx_remove_channel(channel
);
1139 efx_remove_port(efx
);
1141 efx_remove_nic(efx
);
1146 /* Called after previous invocation(s) of efx_stop_all, restarts the
1147 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1148 * and ensures that the port is scheduled to be reconfigured.
1149 * This function is safe to call multiple times when the NIC is in any
1151 static void efx_start_all(struct efx_nic
*efx
)
1153 struct efx_channel
*channel
;
1155 EFX_ASSERT_RESET_SERIALISED(efx
);
1157 /* Check that it is appropriate to restart the interface. All
1158 * of these flags are safe to read under just the rtnl lock */
1159 if (efx
->port_enabled
)
1161 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1163 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1166 /* Mark the port as enabled so port reconfigurations can start, then
1167 * restart the transmit interface early so the watchdog timer stops */
1168 efx_start_port(efx
);
1169 if (efx_dev_registered(efx
))
1170 efx_wake_queue(efx
);
1172 efx_for_each_channel(channel
, efx
)
1173 efx_start_channel(channel
);
1175 falcon_enable_interrupts(efx
);
1177 /* Start the hardware monitor if there is one. Otherwise (we're link
1178 * event driven), we have to poll the PHY because after an event queue
1179 * flush, we could have a missed a link state change */
1180 if (efx
->type
->monitor
!= NULL
) {
1181 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1182 efx_monitor_interval
);
1184 mutex_lock(&efx
->mac_lock
);
1185 if (efx
->phy_op
->poll(efx
))
1186 efx_link_status_changed(efx
);
1187 mutex_unlock(&efx
->mac_lock
);
1190 efx
->type
->start_stats(efx
);
1193 /* Flush all delayed work. Should only be called when no more delayed work
1194 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1195 * since we're holding the rtnl_lock at this point. */
1196 static void efx_flush_all(struct efx_nic
*efx
)
1198 struct efx_rx_queue
*rx_queue
;
1200 /* Make sure the hardware monitor is stopped */
1201 cancel_delayed_work_sync(&efx
->monitor_work
);
1203 /* Ensure that all RX slow refills are complete. */
1204 efx_for_each_rx_queue(rx_queue
, efx
)
1205 cancel_delayed_work_sync(&rx_queue
->work
);
1207 /* Stop scheduled port reconfigurations */
1208 cancel_work_sync(&efx
->mac_work
);
1211 /* Quiesce hardware and software without bringing the link down.
1212 * Safe to call multiple times, when the nic and interface is in any
1213 * state. The caller is guaranteed to subsequently be in a position
1214 * to modify any hardware and software state they see fit without
1216 static void efx_stop_all(struct efx_nic
*efx
)
1218 struct efx_channel
*channel
;
1220 EFX_ASSERT_RESET_SERIALISED(efx
);
1222 /* port_enabled can be read safely under the rtnl lock */
1223 if (!efx
->port_enabled
)
1226 efx
->type
->stop_stats(efx
);
1228 /* Disable interrupts and wait for ISR to complete */
1229 falcon_disable_interrupts(efx
);
1230 if (efx
->legacy_irq
)
1231 synchronize_irq(efx
->legacy_irq
);
1232 efx_for_each_channel(channel
, efx
) {
1234 synchronize_irq(channel
->irq
);
1237 /* Stop all NAPI processing and synchronous rx refills */
1238 efx_for_each_channel(channel
, efx
)
1239 efx_stop_channel(channel
);
1241 /* Stop all asynchronous port reconfigurations. Since all
1242 * event processing has already been stopped, there is no
1243 * window to loose phy events */
1246 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1249 /* Stop the kernel transmit interface late, so the watchdog
1250 * timer isn't ticking over the flush */
1251 if (efx_dev_registered(efx
)) {
1252 efx_stop_queue(efx
);
1253 netif_tx_lock_bh(efx
->net_dev
);
1254 netif_tx_unlock_bh(efx
->net_dev
);
1258 static void efx_remove_all(struct efx_nic
*efx
)
1260 struct efx_channel
*channel
;
1262 efx_for_each_channel(channel
, efx
)
1263 efx_remove_channel(channel
);
1264 efx_remove_port(efx
);
1265 efx_remove_nic(efx
);
1268 /**************************************************************************
1270 * Interrupt moderation
1272 **************************************************************************/
1274 static unsigned irq_mod_ticks(int usecs
, int resolution
)
1277 return 0; /* cannot receive interrupts ahead of time :-) */
1278 if (usecs
< resolution
)
1279 return 1; /* never round down to 0 */
1280 return usecs
/ resolution
;
1283 /* Set interrupt moderation parameters */
1284 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
,
1287 struct efx_tx_queue
*tx_queue
;
1288 struct efx_rx_queue
*rx_queue
;
1289 unsigned tx_ticks
= irq_mod_ticks(tx_usecs
, FALCON_IRQ_MOD_RESOLUTION
);
1290 unsigned rx_ticks
= irq_mod_ticks(rx_usecs
, FALCON_IRQ_MOD_RESOLUTION
);
1292 EFX_ASSERT_RESET_SERIALISED(efx
);
1294 efx_for_each_tx_queue(tx_queue
, efx
)
1295 tx_queue
->channel
->irq_moderation
= tx_ticks
;
1297 efx
->irq_rx_adaptive
= rx_adaptive
;
1298 efx
->irq_rx_moderation
= rx_ticks
;
1299 efx_for_each_rx_queue(rx_queue
, efx
)
1300 rx_queue
->channel
->irq_moderation
= rx_ticks
;
1303 /**************************************************************************
1307 **************************************************************************/
1309 /* Run periodically off the general workqueue. Serialised against
1310 * efx_reconfigure_port via the mac_lock */
1311 static void efx_monitor(struct work_struct
*data
)
1313 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1316 EFX_TRACE(efx
, "hardware monitor executing on CPU %d\n",
1317 raw_smp_processor_id());
1318 BUG_ON(efx
->type
->monitor
== NULL
);
1320 /* If the mac_lock is already held then it is likely a port
1321 * reconfiguration is already in place, which will likely do
1322 * most of the work of check_hw() anyway. */
1323 if (!mutex_trylock(&efx
->mac_lock
))
1325 if (!efx
->port_enabled
)
1327 efx
->type
->monitor(efx
);
1330 mutex_unlock(&efx
->mac_lock
);
1332 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1333 efx_monitor_interval
);
1336 /**************************************************************************
1340 *************************************************************************/
1343 * Context: process, rtnl_lock() held.
1345 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1347 struct efx_nic
*efx
= netdev_priv(net_dev
);
1348 struct mii_ioctl_data
*data
= if_mii(ifr
);
1350 EFX_ASSERT_RESET_SERIALISED(efx
);
1352 /* Convert phy_id from older PRTAD/DEVAD format */
1353 if ((cmd
== SIOCGMIIREG
|| cmd
== SIOCSMIIREG
) &&
1354 (data
->phy_id
& 0xfc00) == 0x0400)
1355 data
->phy_id
^= MDIO_PHY_ID_C45
| 0x0400;
1357 return mdio_mii_ioctl(&efx
->mdio
, data
, cmd
);
1360 /**************************************************************************
1364 **************************************************************************/
1366 static int efx_init_napi(struct efx_nic
*efx
)
1368 struct efx_channel
*channel
;
1370 efx_for_each_channel(channel
, efx
) {
1371 channel
->napi_dev
= efx
->net_dev
;
1372 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
1373 efx_poll
, napi_weight
);
1378 static void efx_fini_napi(struct efx_nic
*efx
)
1380 struct efx_channel
*channel
;
1382 efx_for_each_channel(channel
, efx
) {
1383 if (channel
->napi_dev
)
1384 netif_napi_del(&channel
->napi_str
);
1385 channel
->napi_dev
= NULL
;
1389 /**************************************************************************
1391 * Kernel netpoll interface
1393 *************************************************************************/
1395 #ifdef CONFIG_NET_POLL_CONTROLLER
1397 /* Although in the common case interrupts will be disabled, this is not
1398 * guaranteed. However, all our work happens inside the NAPI callback,
1399 * so no locking is required.
1401 static void efx_netpoll(struct net_device
*net_dev
)
1403 struct efx_nic
*efx
= netdev_priv(net_dev
);
1404 struct efx_channel
*channel
;
1406 efx_for_each_channel(channel
, efx
)
1407 efx_schedule_channel(channel
);
1412 /**************************************************************************
1414 * Kernel net device interface
1416 *************************************************************************/
1418 /* Context: process, rtnl_lock() held. */
1419 static int efx_net_open(struct net_device
*net_dev
)
1421 struct efx_nic
*efx
= netdev_priv(net_dev
);
1422 EFX_ASSERT_RESET_SERIALISED(efx
);
1424 EFX_LOG(efx
, "opening device %s on CPU %d\n", net_dev
->name
,
1425 raw_smp_processor_id());
1427 if (efx
->state
== STATE_DISABLED
)
1429 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1432 /* Notify the kernel of the link state polled during driver load,
1433 * before the monitor starts running */
1434 efx_link_status_changed(efx
);
1440 /* Context: process, rtnl_lock() held.
1441 * Note that the kernel will ignore our return code; this method
1442 * should really be a void.
1444 static int efx_net_stop(struct net_device
*net_dev
)
1446 struct efx_nic
*efx
= netdev_priv(net_dev
);
1448 EFX_LOG(efx
, "closing %s on CPU %d\n", net_dev
->name
,
1449 raw_smp_processor_id());
1451 if (efx
->state
!= STATE_DISABLED
) {
1452 /* Stop the device and flush all the channels */
1454 efx_fini_channels(efx
);
1455 efx_init_channels(efx
);
1461 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1462 static struct net_device_stats
*efx_net_stats(struct net_device
*net_dev
)
1464 struct efx_nic
*efx
= netdev_priv(net_dev
);
1465 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1466 struct net_device_stats
*stats
= &net_dev
->stats
;
1468 spin_lock_bh(&efx
->stats_lock
);
1469 efx
->type
->update_stats(efx
);
1470 spin_unlock_bh(&efx
->stats_lock
);
1472 stats
->rx_packets
= mac_stats
->rx_packets
;
1473 stats
->tx_packets
= mac_stats
->tx_packets
;
1474 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1475 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1476 stats
->multicast
= mac_stats
->rx_multicast
;
1477 stats
->collisions
= mac_stats
->tx_collision
;
1478 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1479 mac_stats
->rx_length_error
);
1480 stats
->rx_over_errors
= efx
->n_rx_nodesc_drop_cnt
;
1481 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1482 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1483 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1484 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1485 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1487 stats
->rx_errors
= (stats
->rx_length_errors
+
1488 stats
->rx_over_errors
+
1489 stats
->rx_crc_errors
+
1490 stats
->rx_frame_errors
+
1491 stats
->rx_fifo_errors
+
1492 stats
->rx_missed_errors
+
1493 mac_stats
->rx_symbol_error
);
1494 stats
->tx_errors
= (stats
->tx_window_errors
+
1500 /* Context: netif_tx_lock held, BHs disabled. */
1501 static void efx_watchdog(struct net_device
*net_dev
)
1503 struct efx_nic
*efx
= netdev_priv(net_dev
);
1505 EFX_ERR(efx
, "TX stuck with stop_count=%d port_enabled=%d:"
1506 " resetting channels\n",
1507 atomic_read(&efx
->netif_stop_count
), efx
->port_enabled
);
1509 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1513 /* Context: process, rtnl_lock() held. */
1514 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1516 struct efx_nic
*efx
= netdev_priv(net_dev
);
1519 EFX_ASSERT_RESET_SERIALISED(efx
);
1521 if (new_mtu
> EFX_MAX_MTU
)
1526 EFX_LOG(efx
, "changing MTU to %d\n", new_mtu
);
1528 efx_fini_channels(efx
);
1530 mutex_lock(&efx
->mac_lock
);
1531 /* Reconfigure the MAC before enabling the dma queues so that
1532 * the RX buffers don't overflow */
1533 net_dev
->mtu
= new_mtu
;
1534 efx
->mac_op
->reconfigure(efx
);
1535 mutex_unlock(&efx
->mac_lock
);
1537 efx_init_channels(efx
);
1543 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1545 struct efx_nic
*efx
= netdev_priv(net_dev
);
1546 struct sockaddr
*addr
= data
;
1547 char *new_addr
= addr
->sa_data
;
1549 EFX_ASSERT_RESET_SERIALISED(efx
);
1551 if (!is_valid_ether_addr(new_addr
)) {
1552 EFX_ERR(efx
, "invalid ethernet MAC address requested: %pM\n",
1557 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1559 /* Reconfigure the MAC */
1560 mutex_lock(&efx
->mac_lock
);
1561 efx
->mac_op
->reconfigure(efx
);
1562 mutex_unlock(&efx
->mac_lock
);
1567 /* Context: netif_addr_lock held, BHs disabled. */
1568 static void efx_set_multicast_list(struct net_device
*net_dev
)
1570 struct efx_nic
*efx
= netdev_priv(net_dev
);
1571 struct dev_mc_list
*mc_list
= net_dev
->mc_list
;
1572 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1577 efx
->promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1579 /* Build multicast hash table */
1580 if (efx
->promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1581 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1583 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1584 for (i
= 0; i
< net_dev
->mc_count
; i
++) {
1585 crc
= ether_crc_le(ETH_ALEN
, mc_list
->dmi_addr
);
1586 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1587 set_bit_le(bit
, mc_hash
->byte
);
1588 mc_list
= mc_list
->next
;
1591 /* Broadcast packets go through the multicast hash filter.
1592 * ether_crc_le() of the broadcast address is 0xbe2612ff
1593 * so we always add bit 0xff to the mask.
1595 set_bit_le(0xff, mc_hash
->byte
);
1598 if (efx
->port_enabled
)
1599 queue_work(efx
->workqueue
, &efx
->mac_work
);
1600 /* Otherwise efx_start_port() will do this */
1603 static const struct net_device_ops efx_netdev_ops
= {
1604 .ndo_open
= efx_net_open
,
1605 .ndo_stop
= efx_net_stop
,
1606 .ndo_get_stats
= efx_net_stats
,
1607 .ndo_tx_timeout
= efx_watchdog
,
1608 .ndo_start_xmit
= efx_hard_start_xmit
,
1609 .ndo_validate_addr
= eth_validate_addr
,
1610 .ndo_do_ioctl
= efx_ioctl
,
1611 .ndo_change_mtu
= efx_change_mtu
,
1612 .ndo_set_mac_address
= efx_set_mac_address
,
1613 .ndo_set_multicast_list
= efx_set_multicast_list
,
1614 #ifdef CONFIG_NET_POLL_CONTROLLER
1615 .ndo_poll_controller
= efx_netpoll
,
1619 static void efx_update_name(struct efx_nic
*efx
)
1621 strcpy(efx
->name
, efx
->net_dev
->name
);
1622 efx_mtd_rename(efx
);
1623 efx_set_channel_names(efx
);
1626 static int efx_netdev_event(struct notifier_block
*this,
1627 unsigned long event
, void *ptr
)
1629 struct net_device
*net_dev
= ptr
;
1631 if (net_dev
->netdev_ops
== &efx_netdev_ops
&&
1632 event
== NETDEV_CHANGENAME
)
1633 efx_update_name(netdev_priv(net_dev
));
1638 static struct notifier_block efx_netdev_notifier
= {
1639 .notifier_call
= efx_netdev_event
,
1643 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1645 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1646 return sprintf(buf
, "%d\n", efx
->phy_type
);
1648 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1650 static int efx_register_netdev(struct efx_nic
*efx
)
1652 struct net_device
*net_dev
= efx
->net_dev
;
1655 net_dev
->watchdog_timeo
= 5 * HZ
;
1656 net_dev
->irq
= efx
->pci_dev
->irq
;
1657 net_dev
->netdev_ops
= &efx_netdev_ops
;
1658 SET_NETDEV_DEV(net_dev
, &efx
->pci_dev
->dev
);
1659 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1661 /* Clear MAC statistics */
1662 efx
->mac_op
->update_stats(efx
);
1663 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1667 rc
= dev_alloc_name(net_dev
, net_dev
->name
);
1670 efx_update_name(efx
);
1672 rc
= register_netdevice(net_dev
);
1676 /* Always start with carrier off; PHY events will detect the link */
1677 netif_carrier_off(efx
->net_dev
);
1681 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1683 EFX_ERR(efx
, "failed to init net dev attributes\n");
1684 goto fail_registered
;
1691 EFX_ERR(efx
, "could not register net dev\n");
1695 unregister_netdev(net_dev
);
1699 static void efx_unregister_netdev(struct efx_nic
*efx
)
1701 struct efx_tx_queue
*tx_queue
;
1706 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1708 /* Free up any skbs still remaining. This has to happen before
1709 * we try to unregister the netdev as running their destructors
1710 * may be needed to get the device ref. count to 0. */
1711 efx_for_each_tx_queue(tx_queue
, efx
)
1712 efx_release_tx_buffers(tx_queue
);
1714 if (efx_dev_registered(efx
)) {
1715 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1716 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1717 unregister_netdev(efx
->net_dev
);
1721 /**************************************************************************
1723 * Device reset and suspend
1725 **************************************************************************/
1727 /* Tears down the entire software state and most of the hardware state
1729 void efx_reset_down(struct efx_nic
*efx
, enum reset_type method
)
1731 EFX_ASSERT_RESET_SERIALISED(efx
);
1734 mutex_lock(&efx
->mac_lock
);
1735 mutex_lock(&efx
->spi_lock
);
1737 efx_fini_channels(efx
);
1738 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
)
1739 efx
->phy_op
->fini(efx
);
1740 efx
->type
->fini(efx
);
1743 /* This function will always ensure that the locks acquired in
1744 * efx_reset_down() are released. A failure return code indicates
1745 * that we were unable to reinitialise the hardware, and the
1746 * driver should be disabled. If ok is false, then the rx and tx
1747 * engines are not restarted, pending a RESET_DISABLE. */
1748 int efx_reset_up(struct efx_nic
*efx
, enum reset_type method
, bool ok
)
1752 EFX_ASSERT_RESET_SERIALISED(efx
);
1754 rc
= efx
->type
->init(efx
);
1756 EFX_ERR(efx
, "failed to initialise NIC\n");
1763 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
) {
1764 rc
= efx
->phy_op
->init(efx
);
1767 if (efx
->phy_op
->reconfigure(efx
))
1768 EFX_ERR(efx
, "could not restore PHY settings\n");
1771 efx
->mac_op
->reconfigure(efx
);
1773 efx_init_channels(efx
);
1775 mutex_unlock(&efx
->spi_lock
);
1776 mutex_unlock(&efx
->mac_lock
);
1783 efx
->port_initialized
= false;
1785 mutex_unlock(&efx
->spi_lock
);
1786 mutex_unlock(&efx
->mac_lock
);
1791 /* Reset the NIC using the specified method. Note that the reset may
1792 * fail, in which case the card will be left in an unusable state.
1794 * Caller must hold the rtnl_lock.
1796 int efx_reset(struct efx_nic
*efx
, enum reset_type method
)
1801 EFX_INFO(efx
, "resetting (%s)\n", RESET_TYPE(method
));
1803 efx_reset_down(efx
, method
);
1805 rc
= efx
->type
->reset(efx
, method
);
1807 EFX_ERR(efx
, "failed to reset hardware\n");
1811 /* Allow resets to be rescheduled. */
1812 efx
->reset_pending
= RESET_TYPE_NONE
;
1814 /* Reinitialise bus-mastering, which may have been turned off before
1815 * the reset was scheduled. This is still appropriate, even in the
1816 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1817 * can respond to requests. */
1818 pci_set_master(efx
->pci_dev
);
1821 /* Leave device stopped if necessary */
1822 disabled
= rc
|| method
== RESET_TYPE_DISABLE
;
1823 rc2
= efx_reset_up(efx
, method
, !disabled
);
1831 EFX_ERR(efx
, "has been disabled\n");
1832 efx
->state
= STATE_DISABLED
;
1834 EFX_LOG(efx
, "reset complete\n");
1839 /* The worker thread exists so that code that cannot sleep can
1840 * schedule a reset for later.
1842 static void efx_reset_work(struct work_struct
*data
)
1844 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, reset_work
);
1846 /* If we're not RUNNING then don't reset. Leave the reset_pending
1847 * flag set so that efx_pci_probe_main will be retried */
1848 if (efx
->state
!= STATE_RUNNING
) {
1849 EFX_INFO(efx
, "scheduled reset quenched. NIC not RUNNING\n");
1854 if (efx_reset(efx
, efx
->reset_pending
))
1855 dev_close(efx
->net_dev
);
1859 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
1861 enum reset_type method
;
1863 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
1864 EFX_INFO(efx
, "quenching already scheduled reset\n");
1869 case RESET_TYPE_INVISIBLE
:
1870 case RESET_TYPE_ALL
:
1871 case RESET_TYPE_WORLD
:
1872 case RESET_TYPE_DISABLE
:
1875 case RESET_TYPE_RX_RECOVERY
:
1876 case RESET_TYPE_RX_DESC_FETCH
:
1877 case RESET_TYPE_TX_DESC_FETCH
:
1878 case RESET_TYPE_TX_SKIP
:
1879 method
= RESET_TYPE_INVISIBLE
;
1882 method
= RESET_TYPE_ALL
;
1887 EFX_LOG(efx
, "scheduling %s reset for %s\n",
1888 RESET_TYPE(method
), RESET_TYPE(type
));
1890 EFX_LOG(efx
, "scheduling %s reset\n", RESET_TYPE(method
));
1892 efx
->reset_pending
= method
;
1894 queue_work(reset_workqueue
, &efx
->reset_work
);
1897 /**************************************************************************
1899 * List of NICs we support
1901 **************************************************************************/
1903 /* PCI device ID table */
1904 static struct pci_device_id efx_pci_table
[] __devinitdata
= {
1905 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
1906 .driver_data
= (unsigned long) &falcon_a1_nic_type
},
1907 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
1908 .driver_data
= (unsigned long) &falcon_b0_nic_type
},
1909 {0} /* end of list */
1912 /**************************************************************************
1914 * Dummy PHY/MAC operations
1916 * Can be used for some unimplemented operations
1917 * Needed so all function pointers are valid and do not have to be tested
1920 **************************************************************************/
1921 int efx_port_dummy_op_int(struct efx_nic
*efx
)
1925 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
1926 void efx_port_dummy_op_set_id_led(struct efx_nic
*efx
, enum efx_led_mode mode
)
1929 bool efx_port_dummy_op_poll(struct efx_nic
*efx
)
1934 static struct efx_phy_operations efx_dummy_phy_operations
= {
1935 .init
= efx_port_dummy_op_int
,
1936 .reconfigure
= efx_port_dummy_op_int
,
1937 .poll
= efx_port_dummy_op_poll
,
1938 .fini
= efx_port_dummy_op_void
,
1941 /**************************************************************************
1945 **************************************************************************/
1947 /* This zeroes out and then fills in the invariants in a struct
1948 * efx_nic (including all sub-structures).
1950 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
1951 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
1953 struct efx_channel
*channel
;
1954 struct efx_tx_queue
*tx_queue
;
1955 struct efx_rx_queue
*rx_queue
;
1958 /* Initialise common structures */
1959 memset(efx
, 0, sizeof(*efx
));
1960 spin_lock_init(&efx
->biu_lock
);
1961 mutex_init(&efx
->mdio_lock
);
1962 mutex_init(&efx
->spi_lock
);
1963 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
1964 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
1965 efx
->pci_dev
= pci_dev
;
1966 efx
->state
= STATE_INIT
;
1967 efx
->reset_pending
= RESET_TYPE_NONE
;
1968 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
1970 efx
->net_dev
= net_dev
;
1971 efx
->rx_checksum_enabled
= true;
1972 spin_lock_init(&efx
->netif_stop_lock
);
1973 spin_lock_init(&efx
->stats_lock
);
1974 mutex_init(&efx
->mac_lock
);
1975 efx
->mac_op
= type
->default_mac_ops
;
1976 efx
->phy_op
= &efx_dummy_phy_operations
;
1977 efx
->mdio
.dev
= net_dev
;
1978 INIT_WORK(&efx
->mac_work
, efx_mac_work
);
1979 atomic_set(&efx
->netif_stop_count
, 1);
1981 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
1982 channel
= &efx
->channel
[i
];
1984 channel
->channel
= i
;
1985 channel
->work_pending
= false;
1987 for (i
= 0; i
< EFX_TX_QUEUE_COUNT
; i
++) {
1988 tx_queue
= &efx
->tx_queue
[i
];
1989 tx_queue
->efx
= efx
;
1990 tx_queue
->queue
= i
;
1991 tx_queue
->buffer
= NULL
;
1992 tx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1993 tx_queue
->tso_headers_free
= NULL
;
1995 for (i
= 0; i
< EFX_MAX_RX_QUEUES
; i
++) {
1996 rx_queue
= &efx
->rx_queue
[i
];
1997 rx_queue
->efx
= efx
;
1998 rx_queue
->queue
= i
;
1999 rx_queue
->channel
= &efx
->channel
[0]; /* for safety */
2000 rx_queue
->buffer
= NULL
;
2001 spin_lock_init(&rx_queue
->add_lock
);
2002 INIT_DELAYED_WORK(&rx_queue
->work
, efx_rx_work
);
2007 /* As close as we can get to guaranteeing that we don't overflow */
2008 BUILD_BUG_ON(EFX_EVQ_SIZE
< EFX_TXQ_SIZE
+ EFX_RXQ_SIZE
);
2010 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
2012 /* Higher numbered interrupt modes are less capable! */
2013 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
2016 /* Would be good to use the net_dev name, but we're too early */
2017 snprintf(efx
->workqueue_name
, sizeof(efx
->workqueue_name
), "sfc%s",
2019 efx
->workqueue
= create_singlethread_workqueue(efx
->workqueue_name
);
2020 if (!efx
->workqueue
)
2026 static void efx_fini_struct(struct efx_nic
*efx
)
2028 if (efx
->workqueue
) {
2029 destroy_workqueue(efx
->workqueue
);
2030 efx
->workqueue
= NULL
;
2034 /**************************************************************************
2038 **************************************************************************/
2040 /* Main body of final NIC shutdown code
2041 * This is called only at module unload (or hotplug removal).
2043 static void efx_pci_remove_main(struct efx_nic
*efx
)
2045 falcon_fini_interrupt(efx
);
2046 efx_fini_channels(efx
);
2048 efx
->type
->fini(efx
);
2050 efx_remove_all(efx
);
2053 /* Final NIC shutdown
2054 * This is called only at module unload (or hotplug removal).
2056 static void efx_pci_remove(struct pci_dev
*pci_dev
)
2058 struct efx_nic
*efx
;
2060 efx
= pci_get_drvdata(pci_dev
);
2064 /* Mark the NIC as fini, then stop the interface */
2066 efx
->state
= STATE_FINI
;
2067 dev_close(efx
->net_dev
);
2069 /* Allow any queued efx_resets() to complete */
2072 efx_unregister_netdev(efx
);
2074 efx_mtd_remove(efx
);
2076 /* Wait for any scheduled resets to complete. No more will be
2077 * scheduled from this point because efx_stop_all() has been
2078 * called, we are no longer registered with driverlink, and
2079 * the net_device's have been removed. */
2080 cancel_work_sync(&efx
->reset_work
);
2082 efx_pci_remove_main(efx
);
2085 EFX_LOG(efx
, "shutdown successful\n");
2087 pci_set_drvdata(pci_dev
, NULL
);
2088 efx_fini_struct(efx
);
2089 free_netdev(efx
->net_dev
);
2092 /* Main body of NIC initialisation
2093 * This is called at module load (or hotplug insertion, theoretically).
2095 static int efx_pci_probe_main(struct efx_nic
*efx
)
2099 /* Do start-of-day initialisation */
2100 rc
= efx_probe_all(efx
);
2104 rc
= efx_init_napi(efx
);
2108 rc
= efx
->type
->init(efx
);
2110 EFX_ERR(efx
, "failed to initialise NIC\n");
2114 rc
= efx_init_port(efx
);
2116 EFX_ERR(efx
, "failed to initialise port\n");
2120 efx_init_channels(efx
);
2122 rc
= falcon_init_interrupt(efx
);
2129 efx_fini_channels(efx
);
2132 efx
->type
->fini(efx
);
2136 efx_remove_all(efx
);
2141 /* NIC initialisation
2143 * This is called at module load (or hotplug insertion,
2144 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2145 * sets up and registers the network devices with the kernel and hooks
2146 * the interrupt service routine. It does not prepare the device for
2147 * transmission; this is left to the first time one of the network
2148 * interfaces is brought up (i.e. efx_net_open).
2150 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2151 const struct pci_device_id
*entry
)
2153 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2154 struct net_device
*net_dev
;
2155 struct efx_nic
*efx
;
2158 /* Allocate and initialise a struct net_device and struct efx_nic */
2159 net_dev
= alloc_etherdev(sizeof(*efx
));
2162 net_dev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_SG
|
2163 NETIF_F_HIGHDMA
| NETIF_F_TSO
|
2165 /* Mask for features that also apply to VLAN devices */
2166 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2167 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2168 efx
= netdev_priv(net_dev
);
2169 pci_set_drvdata(pci_dev
, efx
);
2170 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2174 EFX_INFO(efx
, "Solarflare Communications NIC detected\n");
2176 /* Set up basic I/O (BAR mappings etc) */
2177 rc
= efx_init_io(efx
);
2181 /* No serialisation is required with the reset path because
2182 * we're in STATE_INIT. */
2183 for (i
= 0; i
< 5; i
++) {
2184 rc
= efx_pci_probe_main(efx
);
2186 /* Serialise against efx_reset(). No more resets will be
2187 * scheduled since efx_stop_all() has been called, and we
2188 * have not and never have been registered with either
2189 * the rtnetlink or driverlink layers. */
2190 cancel_work_sync(&efx
->reset_work
);
2193 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
2194 /* If there was a scheduled reset during
2195 * probe, the NIC is probably hosed anyway */
2196 efx_pci_remove_main(efx
);
2203 /* Retry if a recoverably reset event has been scheduled */
2204 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2205 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2208 efx
->reset_pending
= RESET_TYPE_NONE
;
2212 EFX_ERR(efx
, "Could not reset NIC\n");
2216 /* Switch to the running state before we expose the device to the OS,
2217 * so that dev_open()|efx_start_all() will actually start the device */
2218 efx
->state
= STATE_RUNNING
;
2220 rc
= efx_register_netdev(efx
);
2224 EFX_LOG(efx
, "initialisation successful\n");
2227 efx_mtd_probe(efx
); /* allowed to fail */
2232 efx_pci_remove_main(efx
);
2237 efx_fini_struct(efx
);
2239 EFX_LOG(efx
, "initialisation failed. rc=%d\n", rc
);
2240 free_netdev(net_dev
);
2244 static int efx_pm_freeze(struct device
*dev
)
2246 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2248 efx
->state
= STATE_FINI
;
2250 netif_device_detach(efx
->net_dev
);
2253 efx_fini_channels(efx
);
2258 static int efx_pm_thaw(struct device
*dev
)
2260 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2262 efx
->state
= STATE_INIT
;
2264 efx_init_channels(efx
);
2266 mutex_lock(&efx
->mac_lock
);
2267 efx
->phy_op
->reconfigure(efx
);
2268 mutex_unlock(&efx
->mac_lock
);
2272 netif_device_attach(efx
->net_dev
);
2274 efx
->state
= STATE_RUNNING
;
2276 efx
->type
->resume_wol(efx
);
2281 static int efx_pm_poweroff(struct device
*dev
)
2283 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2284 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2286 efx
->type
->fini(efx
);
2288 efx
->reset_pending
= RESET_TYPE_NONE
;
2290 pci_save_state(pci_dev
);
2291 return pci_set_power_state(pci_dev
, PCI_D3hot
);
2294 /* Used for both resume and restore */
2295 static int efx_pm_resume(struct device
*dev
)
2297 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2298 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2301 rc
= pci_set_power_state(pci_dev
, PCI_D0
);
2304 pci_restore_state(pci_dev
);
2305 rc
= pci_enable_device(pci_dev
);
2308 pci_set_master(efx
->pci_dev
);
2309 rc
= efx
->type
->reset(efx
, RESET_TYPE_ALL
);
2312 rc
= efx
->type
->init(efx
);
2319 static int efx_pm_suspend(struct device
*dev
)
2324 rc
= efx_pm_poweroff(dev
);
2330 static struct dev_pm_ops efx_pm_ops
= {
2331 .suspend
= efx_pm_suspend
,
2332 .resume
= efx_pm_resume
,
2333 .freeze
= efx_pm_freeze
,
2334 .thaw
= efx_pm_thaw
,
2335 .poweroff
= efx_pm_poweroff
,
2336 .restore
= efx_pm_resume
,
2339 static struct pci_driver efx_pci_driver
= {
2340 .name
= EFX_DRIVER_NAME
,
2341 .id_table
= efx_pci_table
,
2342 .probe
= efx_pci_probe
,
2343 .remove
= efx_pci_remove
,
2344 .driver
.pm
= &efx_pm_ops
,
2347 /**************************************************************************
2349 * Kernel module interface
2351 *************************************************************************/
2353 module_param(interrupt_mode
, uint
, 0444);
2354 MODULE_PARM_DESC(interrupt_mode
,
2355 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2357 static int __init
efx_init_module(void)
2361 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2363 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2367 refill_workqueue
= create_workqueue("sfc_refill");
2368 if (!refill_workqueue
) {
2372 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2373 if (!reset_workqueue
) {
2378 rc
= pci_register_driver(&efx_pci_driver
);
2385 destroy_workqueue(reset_workqueue
);
2387 destroy_workqueue(refill_workqueue
);
2389 unregister_netdevice_notifier(&efx_netdev_notifier
);
2394 static void __exit
efx_exit_module(void)
2396 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2398 pci_unregister_driver(&efx_pci_driver
);
2399 destroy_workqueue(reset_workqueue
);
2400 destroy_workqueue(refill_workqueue
);
2401 unregister_netdevice_notifier(&efx_netdev_notifier
);
2405 module_init(efx_init_module
);
2406 module_exit(efx_exit_module
);
2408 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2409 "Solarflare Communications");
2410 MODULE_DESCRIPTION("Solarflare Communications network driver");
2411 MODULE_LICENSE("GPL");
2412 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);