1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005, 2006 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.0.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR
);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA 0xffffffff
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 struct myri10ge_rx_buffer_state
{
97 DECLARE_PCI_UNMAP_ADDR(bus
)
98 DECLARE_PCI_UNMAP_LEN(len
)
101 struct myri10ge_tx_buffer_state
{
104 DECLARE_PCI_UNMAP_ADDR(bus
)
105 DECLARE_PCI_UNMAP_LEN(len
)
108 struct myri10ge_cmd
{
114 struct myri10ge_rx_buf
{
115 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
116 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
117 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
118 struct myri10ge_rx_buffer_state
*info
;
121 int mask
; /* number of rx slots -1 */
124 struct myri10ge_tx_buf
{
125 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
126 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
127 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
129 struct myri10ge_tx_buffer_state
*info
;
130 int mask
; /* number of transmit slots -1 */
131 int boundary
; /* boundary transmits cannot cross */
132 int req ____cacheline_aligned
; /* transmit slots submitted */
133 int pkt_start
; /* packets started */
134 int done ____cacheline_aligned
; /* transmit slots completed */
135 int pkt_done
; /* packets completed */
138 struct myri10ge_rx_done
{
139 struct mcp_slot
*entry
;
145 struct myri10ge_priv
{
146 int running
; /* running? */
147 int csum_flag
; /* rx_csums? */
148 struct myri10ge_tx_buf tx
; /* transmit ring */
149 struct myri10ge_rx_buf rx_small
;
150 struct myri10ge_rx_buf rx_big
;
151 struct myri10ge_rx_done rx_done
;
153 struct net_device
*dev
;
154 struct net_device_stats stats
;
157 unsigned long board_span
;
158 unsigned long iomem_base
;
159 u32 __iomem
*irq_claim
;
160 u32 __iomem
*irq_deassert
;
161 char *mac_addr_string
;
162 struct mcp_cmd_response
*cmd
;
164 struct mcp_irq_data
*fw_stats
;
165 dma_addr_t fw_stats_bus
;
166 struct pci_dev
*pdev
;
168 unsigned int link_state
;
169 unsigned int rdma_tags_available
;
171 u32 __iomem
*intr_coal_delay_ptr
;
176 wait_queue_head_t down_wq
;
177 struct work_struct watchdog_work
;
178 struct timer_list watchdog_timer
;
179 int watchdog_tx_done
;
184 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
185 char fw_version
[128];
186 u8 mac_addr
[6]; /* eeprom mac address */
187 unsigned long serial_number
;
188 int vendor_specific_offset
;
196 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
197 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
199 static char *myri10ge_fw_name
= NULL
;
200 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
201 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
203 static int myri10ge_ecrc_enable
= 1;
204 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
205 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
207 static int myri10ge_max_intr_slots
= 1024;
208 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
209 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
211 static int myri10ge_small_bytes
= -1; /* -1 == auto */
212 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
213 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
215 static int myri10ge_msi
= 1; /* enable msi by default */
216 module_param(myri10ge_msi
, int, S_IRUGO
);
217 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
219 static int myri10ge_intr_coal_delay
= 25;
220 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
221 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
223 static int myri10ge_flow_control
= 1;
224 module_param(myri10ge_flow_control
, int, S_IRUGO
);
225 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
227 static int myri10ge_deassert_wait
= 1;
228 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
229 MODULE_PARM_DESC(myri10ge_deassert_wait
,
230 "Wait when deasserting legacy interrupts\n");
232 static int myri10ge_force_firmware
= 0;
233 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
234 MODULE_PARM_DESC(myri10ge_force_firmware
,
235 "Force firmware to assume aligned completions\n");
237 static int myri10ge_skb_cross_4k
= 0;
238 module_param(myri10ge_skb_cross_4k
, int, S_IRUGO
| S_IWUSR
);
239 MODULE_PARM_DESC(myri10ge_skb_cross_4k
,
240 "Can a small skb cross a 4KB boundary?\n");
242 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
243 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
244 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
246 static int myri10ge_napi_weight
= 64;
247 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
248 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
250 static int myri10ge_watchdog_timeout
= 1;
251 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
252 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
254 static int myri10ge_max_irq_loops
= 1048576;
255 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
256 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
257 "Set stuck legacy IRQ detection threshold\n");
259 #define MYRI10GE_FW_OFFSET 1024*1024
260 #define MYRI10GE_HIGHPART_TO_U32(X) \
261 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
262 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
264 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
267 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
268 struct myri10ge_cmd
*data
, int atomic
)
271 char buf_bytes
[sizeof(*buf
) + 8];
272 struct mcp_cmd_response
*response
= mgp
->cmd
;
273 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_CMD_OFFSET
;
274 u32 dma_low
, dma_high
, result
, value
;
277 /* ensure buf is aligned to 8 bytes */
278 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
280 buf
->data0
= htonl(data
->data0
);
281 buf
->data1
= htonl(data
->data1
);
282 buf
->data2
= htonl(data
->data2
);
283 buf
->cmd
= htonl(cmd
);
284 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
285 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
287 buf
->response_addr
.low
= htonl(dma_low
);
288 buf
->response_addr
.high
= htonl(dma_high
);
289 response
->result
= MYRI10GE_NO_RESPONSE_RESULT
;
291 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
293 /* wait up to 15ms. Longest command is the DMA benchmark,
294 * which is capped at 5ms, but runs from a timeout handler
295 * that runs every 7.8ms. So a 15ms timeout leaves us with
299 /* if atomic is set, do not sleep,
300 * and try to get the completion quickly
301 * (1ms will be enough for those commands) */
302 for (sleep_total
= 0;
304 && response
->result
== MYRI10GE_NO_RESPONSE_RESULT
;
308 /* use msleep for most command */
309 for (sleep_total
= 0;
311 && response
->result
== MYRI10GE_NO_RESPONSE_RESULT
;
316 result
= ntohl(response
->result
);
317 value
= ntohl(response
->data
);
318 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
323 dev_err(&mgp
->pdev
->dev
,
324 "command %d failed, result = %d\n",
330 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
336 * The eeprom strings on the lanaiX have the format
339 * PT:ddd mmm xx xx:xx:xx xx\0
340 * PV:ddd mmm xx xx:xx:xx xx\0
342 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
347 ptr
= mgp
->eeprom_strings
;
348 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
350 while (*ptr
!= '\0' && ptr
< limit
) {
351 if (memcmp(ptr
, "MAC=", 4) == 0) {
353 mgp
->mac_addr_string
= ptr
;
354 for (i
= 0; i
< 6; i
++) {
355 if ((ptr
+ 2) > limit
)
358 simple_strtoul(ptr
, &ptr
, 16);
362 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
364 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
366 while (ptr
< limit
&& *ptr
++) ;
372 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
377 * Enable or disable periodic RDMAs from the host to make certain
378 * chipsets resend dropped PCIe messages
381 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
383 char __iomem
*submit
;
385 u32 dma_low
, dma_high
;
388 /* clear confirmation addr */
392 /* send a rdma command to the PCIe engine, and wait for the
393 * response in the confirmation address. The firmware should
394 * write a -1 there to indicate it is alive and well
396 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
397 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
399 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
400 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
401 buf
[2] = htonl(MYRI10GE_NO_CONFIRM_DATA
); /* confirm data */
402 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
403 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
404 buf
[5] = htonl(enable
); /* enable? */
406 submit
= mgp
->sram
+ 0xfc01c0;
408 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
409 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
411 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
412 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
413 (enable
? "enable" : "disable"));
417 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
418 struct mcp_gen_header
*hdr
)
420 struct device
*dev
= &mgp
->pdev
->dev
;
423 /* check firmware type */
424 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
425 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
429 /* save firmware version for ethtool */
430 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
432 sscanf(mgp
->fw_version
, "%d.%d", &major
, &minor
);
434 if (!(major
== MXGEFW_VERSION_MAJOR
&& minor
== MXGEFW_VERSION_MINOR
)) {
435 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
436 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
437 MXGEFW_VERSION_MINOR
);
443 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
445 unsigned crc
, reread_crc
;
446 const struct firmware
*fw
;
447 struct device
*dev
= &mgp
->pdev
->dev
;
448 struct mcp_gen_header
*hdr
;
452 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
453 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
456 goto abort_with_nothing
;
461 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
462 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
463 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
469 hdr_offset
= ntohl(*(u32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
470 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
471 dev_err(dev
, "Bad firmware file\n");
475 hdr
= (void *)(fw
->data
+ hdr_offset
);
477 status
= myri10ge_validate_firmware(mgp
, hdr
);
481 crc
= crc32(~0, fw
->data
, fw
->size
);
482 if (mgp
->tx
.boundary
== 2048) {
483 /* Avoid PCI burst on chipset with unaligned completions. */
485 __iomem u32
*ptr
= (__iomem u32
*) (mgp
->sram
+
487 for (i
= 0; i
< fw
->size
/ 4; i
++) {
488 __raw_writel(((u32
*) fw
->data
)[i
], ptr
+ i
);
492 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->data
,
495 /* corruption checking is good for parity recovery and buggy chipset */
496 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
497 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
498 if (crc
!= reread_crc
) {
499 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
500 (unsigned)fw
->size
, reread_crc
, crc
);
504 *size
= (u32
) fw
->size
;
507 release_firmware(fw
);
513 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
515 struct mcp_gen_header
*hdr
;
516 struct device
*dev
= &mgp
->pdev
->dev
;
517 const size_t bytes
= sizeof(struct mcp_gen_header
);
521 /* find running firmware header */
522 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
524 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
525 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
530 /* copy header of running firmware from SRAM to host memory to
531 * validate firmware */
532 hdr
= kmalloc(bytes
, GFP_KERNEL
);
534 dev_err(dev
, "could not malloc firmware hdr\n");
537 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
538 status
= myri10ge_validate_firmware(mgp
, hdr
);
543 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
545 char __iomem
*submit
;
547 u32 dma_low
, dma_high
, size
;
551 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
553 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
555 /* Do not attempt to adopt firmware if there
560 status
= myri10ge_adopt_running_firmware(mgp
);
562 dev_err(&mgp
->pdev
->dev
,
563 "failed to adopt running firmware\n");
566 dev_info(&mgp
->pdev
->dev
,
567 "Successfully adopted running firmware\n");
568 if (mgp
->tx
.boundary
== 4096) {
569 dev_warn(&mgp
->pdev
->dev
,
570 "Using firmware currently running on NIC"
572 dev_warn(&mgp
->pdev
->dev
,
573 "performance consider loading optimized "
575 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
578 mgp
->fw_name
= "adopted";
579 mgp
->tx
.boundary
= 2048;
583 /* clear confirmation addr */
587 /* send a reload command to the bootstrap MCP, and wait for the
588 * response in the confirmation address. The firmware should
589 * write a -1 there to indicate it is alive and well
591 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
592 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
594 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
595 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
596 buf
[2] = htonl(MYRI10GE_NO_CONFIRM_DATA
); /* confirm data */
598 /* FIX: All newest firmware should un-protect the bottom of
599 * the sram before handoff. However, the very first interfaces
600 * do not. Therefore the handoff copy must skip the first 8 bytes
602 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
603 buf
[4] = htonl(size
- 8); /* length of code */
604 buf
[5] = htonl(8); /* where to copy to */
605 buf
[6] = htonl(0); /* where to jump to */
607 submit
= mgp
->sram
+ 0xfc0000;
609 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
614 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
618 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
619 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
622 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
623 myri10ge_dummy_rdma(mgp
, mgp
->tx
.boundary
!= 4096);
628 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
630 struct myri10ge_cmd cmd
;
633 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
634 | (addr
[2] << 8) | addr
[3]);
636 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
638 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
642 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
644 struct myri10ge_cmd cmd
;
647 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
648 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
652 "myri10ge: %s: Failed to set flow control mode\n",
661 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
663 struct myri10ge_cmd cmd
;
666 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
667 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
669 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
673 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
675 struct myri10ge_cmd cmd
;
680 /* try to send a reset command to the card to see if it
682 memset(&cmd
, 0, sizeof(cmd
));
683 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
685 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
689 /* Now exchange information about interrupts */
691 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
692 memset(mgp
->rx_done
.entry
, 0, bytes
);
693 cmd
.data0
= (u32
) bytes
;
694 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
695 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
696 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
697 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
700 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
701 mgp
->irq_claim
= (__iomem u32
*) (mgp
->sram
+ cmd
.data0
);
702 if (!mgp
->msi_enabled
) {
703 status
|= myri10ge_send_cmd
704 (mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
, &cmd
, 0);
705 mgp
->irq_deassert
= (__iomem u32
*) (mgp
->sram
+ cmd
.data0
);
708 status
|= myri10ge_send_cmd
709 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
710 mgp
->intr_coal_delay_ptr
= (__iomem u32
*) (mgp
->sram
+ cmd
.data0
);
712 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
715 __raw_writel(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
717 /* Run a small DMA test.
718 * The magic multipliers to the length tell the firmware
719 * to do DMA read, write, or read+write tests. The
720 * results are returned in cmd.data0. The upper 16
721 * bits or the return is the number of transfers completed.
722 * The lower 16 bits is the time in 0.5us ticks that the
723 * transfers took to complete.
726 len
= mgp
->tx
.boundary
;
728 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
729 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
730 cmd
.data2
= len
* 0x10000;
731 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
733 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) /
734 (cmd
.data0
& 0xffff);
736 dev_warn(&mgp
->pdev
->dev
, "DMA read benchmark failed: %d\n",
738 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
739 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
740 cmd
.data2
= len
* 0x1;
741 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
743 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) /
744 (cmd
.data0
& 0xffff);
746 dev_warn(&mgp
->pdev
->dev
, "DMA write benchmark failed: %d\n",
749 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
750 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
751 cmd
.data2
= len
* 0x10001;
752 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
754 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
755 (cmd
.data0
& 0xffff);
757 dev_warn(&mgp
->pdev
->dev
,
758 "DMA read/write benchmark failed: %d\n", status
);
760 memset(mgp
->rx_done
.entry
, 0, bytes
);
762 /* reset mcp/driver shared state back to 0 */
765 mgp
->tx
.pkt_start
= 0;
766 mgp
->tx
.pkt_done
= 0;
768 mgp
->rx_small
.cnt
= 0;
769 mgp
->rx_done
.idx
= 0;
770 mgp
->rx_done
.cnt
= 0;
771 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
772 myri10ge_change_promisc(mgp
, 0, 0);
773 myri10ge_change_pause(mgp
, mgp
->pause
);
778 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
779 struct mcp_kreq_ether_recv
*src
)
784 src
->addr_low
= DMA_32BIT_MASK
;
785 myri10ge_pio_copy(dst
, src
, 8 * sizeof(*src
));
788 __raw_writel(low
, &dst
->addr_low
);
793 * Set of routines to get a new receive buffer. Any buffer which
794 * crosses a 4KB boundary must start on a 4KB boundary due to PCIe
795 * wdma restrictions. We also try to align any smaller allocation to
796 * at least a 16 byte boundary for efficiency. We assume the linux
797 * memory allocator works by powers of 2, and will not return memory
798 * smaller than 2KB which crosses a 4KB boundary. If it does, we fall
799 * back to allocating 2x as much space as required.
801 * We intend to replace large (>4KB) skb allocations by using
802 * pages directly and building a fraglist in the near future.
805 static inline struct sk_buff
*myri10ge_alloc_big(int bytes
)
808 unsigned long data
, roundup
;
810 skb
= dev_alloc_skb(bytes
+ 4096 + MXGEFW_PAD
);
814 /* Correct skb->truesize so that socket buffer
815 * accounting is not confused the rounding we must
816 * do to satisfy alignment constraints.
818 skb
->truesize
-= 4096;
820 data
= (unsigned long)(skb
->data
);
821 roundup
= (-data
) & (4095);
822 skb_reserve(skb
, roundup
);
826 /* Allocate 2x as much space as required and use whichever portion
827 * does not cross a 4KB boundary */
828 static inline struct sk_buff
*myri10ge_alloc_small_safe(unsigned int bytes
)
831 unsigned long data
, boundary
;
833 skb
= dev_alloc_skb(2 * (bytes
+ MXGEFW_PAD
) - 1);
834 if (unlikely(skb
== NULL
))
837 /* Correct skb->truesize so that socket buffer
838 * accounting is not confused the rounding we must
839 * do to satisfy alignment constraints.
841 skb
->truesize
-= bytes
+ MXGEFW_PAD
;
843 data
= (unsigned long)(skb
->data
);
844 boundary
= (data
+ 4095UL) & ~4095UL;
845 if ((boundary
- data
) >= (bytes
+ MXGEFW_PAD
))
848 skb_reserve(skb
, boundary
- data
);
852 /* Allocate just enough space, and verify that the allocated
853 * space does not cross a 4KB boundary */
854 static inline struct sk_buff
*myri10ge_alloc_small(int bytes
)
857 unsigned long roundup
, data
, end
;
859 skb
= dev_alloc_skb(bytes
+ 16 + MXGEFW_PAD
);
860 if (unlikely(skb
== NULL
))
863 /* Round allocated buffer to 16 byte boundary */
864 data
= (unsigned long)(skb
->data
);
865 roundup
= (-data
) & 15UL;
866 skb_reserve(skb
, roundup
);
867 /* Verify that the data buffer does not cross a page boundary */
868 data
= (unsigned long)(skb
->data
);
869 end
= data
+ bytes
+ MXGEFW_PAD
- 1;
870 if (unlikely(((end
>> 12) != (data
>> 12)) && (data
& 4095UL))) {
872 "myri10ge_alloc_small: small skb crossed 4KB boundary\n");
873 myri10ge_skb_cross_4k
= 1;
874 dev_kfree_skb_any(skb
);
875 skb
= myri10ge_alloc_small_safe(bytes
);
881 myri10ge_getbuf(struct myri10ge_rx_buf
*rx
, struct pci_dev
*pdev
, int bytes
,
888 bytes
+= VLAN_HLEN
; /* account for 802.1q vlan tag */
890 if ((bytes
+ MXGEFW_PAD
) > (4096 - 16) /* linux overhead */ )
891 skb
= myri10ge_alloc_big(bytes
);
892 else if (myri10ge_skb_cross_4k
)
893 skb
= myri10ge_alloc_small_safe(bytes
);
895 skb
= myri10ge_alloc_small(bytes
);
897 if (unlikely(skb
== NULL
)) {
903 /* set len so that it only covers the area we
904 * need mapped for DMA */
905 len
= bytes
+ MXGEFW_PAD
;
907 bus
= pci_map_single(pdev
, skb
->data
, len
, PCI_DMA_FROMDEVICE
);
908 rx
->info
[idx
].skb
= skb
;
909 pci_unmap_addr_set(&rx
->info
[idx
], bus
, bus
);
910 pci_unmap_len_set(&rx
->info
[idx
], len
, len
);
911 rx
->shadow
[idx
].addr_low
= htonl(MYRI10GE_LOWPART_TO_U32(bus
));
912 rx
->shadow
[idx
].addr_high
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
915 /* copy 8 descriptors (64-bytes) to the mcp at a time */
916 if ((idx
& 7) == 7) {
917 if (rx
->wc_fifo
== NULL
)
918 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
919 &rx
->shadow
[idx
- 7]);
922 myri10ge_pio_copy(rx
->wc_fifo
,
923 &rx
->shadow
[idx
- 7], 64);
929 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, u16 hw_csum
)
931 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
933 if ((skb
->protocol
== ntohs(ETH_P_8021Q
)) &&
934 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
935 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
937 skb
->ip_summed
= CHECKSUM_HW
;
941 static inline unsigned long
942 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
943 int bytes
, int len
, int csum
)
949 idx
= rx
->cnt
& rx
->mask
;
952 /* save a pointer to the received skb */
953 skb
= rx
->info
[idx
].skb
;
954 bus
= pci_unmap_addr(&rx
->info
[idx
], bus
);
955 unmap_len
= pci_unmap_len(&rx
->info
[idx
], len
);
957 /* try to replace the received skb */
958 if (myri10ge_getbuf(rx
, mgp
->pdev
, bytes
, idx
)) {
959 /* drop the frame -- the old skbuf is re-cycled */
960 mgp
->stats
.rx_dropped
+= 1;
964 /* unmap the recvd skb */
965 pci_unmap_single(mgp
->pdev
, bus
, unmap_len
, PCI_DMA_FROMDEVICE
);
967 /* mcp implicitly skips 1st bytes so that packet is properly
969 skb_reserve(skb
, MXGEFW_PAD
);
971 /* set the length of the frame */
974 skb
->protocol
= eth_type_trans(skb
, mgp
->dev
);
976 if (mgp
->csum_flag
) {
977 if ((skb
->protocol
== ntohs(ETH_P_IP
)) ||
978 (skb
->protocol
== ntohs(ETH_P_IPV6
))) {
979 skb
->csum
= ntohs((u16
) csum
);
980 skb
->ip_summed
= CHECKSUM_HW
;
982 myri10ge_vlan_ip_csum(skb
, ntohs((u16
) csum
));
985 netif_receive_skb(skb
);
986 mgp
->dev
->last_rx
= jiffies
;
990 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
992 struct pci_dev
*pdev
= mgp
->pdev
;
993 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
998 while (tx
->pkt_done
!= mcp_index
) {
999 idx
= tx
->done
& tx
->mask
;
1000 skb
= tx
->info
[idx
].skb
;
1003 tx
->info
[idx
].skb
= NULL
;
1004 if (tx
->info
[idx
].last
) {
1006 tx
->info
[idx
].last
= 0;
1009 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1010 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1012 mgp
->stats
.tx_bytes
+= skb
->len
;
1013 mgp
->stats
.tx_packets
++;
1014 dev_kfree_skb_irq(skb
);
1016 pci_unmap_single(pdev
,
1017 pci_unmap_addr(&tx
->info
[idx
],
1022 pci_unmap_page(pdev
,
1023 pci_unmap_addr(&tx
->info
[idx
],
1028 /* limit potential for livelock by only handling
1029 * 2 full tx rings per call */
1030 if (unlikely(++limit
> 2 * tx
->mask
))
1033 /* start the queue if we've stopped it */
1034 if (netif_queue_stopped(mgp
->dev
)
1035 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1037 netif_wake_queue(mgp
->dev
);
1041 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1043 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1044 unsigned long rx_bytes
= 0;
1045 unsigned long rx_packets
= 0;
1046 unsigned long rx_ok
;
1048 int idx
= rx_done
->idx
;
1049 int cnt
= rx_done
->cnt
;
1053 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1054 length
= ntohs(rx_done
->entry
[idx
].length
);
1055 rx_done
->entry
[idx
].length
= 0;
1056 checksum
= ntohs(rx_done
->entry
[idx
].checksum
);
1057 if (length
<= mgp
->small_bytes
)
1058 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1062 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1063 mgp
->dev
->mtu
+ ETH_HLEN
,
1065 rx_packets
+= rx_ok
;
1066 rx_bytes
+= rx_ok
* (unsigned long)length
;
1068 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1070 /* limit potential for livelock by only handling a
1071 * limited number of frames. */
1076 mgp
->stats
.rx_packets
+= rx_packets
;
1077 mgp
->stats
.rx_bytes
+= rx_bytes
;
1080 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1082 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1084 if (unlikely(stats
->stats_updated
)) {
1085 if (mgp
->link_state
!= stats
->link_up
) {
1086 mgp
->link_state
= stats
->link_up
;
1087 if (mgp
->link_state
) {
1088 printk(KERN_INFO
"myri10ge: %s: link up\n",
1090 netif_carrier_on(mgp
->dev
);
1092 printk(KERN_INFO
"myri10ge: %s: link down\n",
1094 netif_carrier_off(mgp
->dev
);
1097 if (mgp
->rdma_tags_available
!=
1098 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1099 mgp
->rdma_tags_available
=
1100 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1101 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1102 "%d tags left\n", mgp
->dev
->name
,
1103 mgp
->rdma_tags_available
);
1105 mgp
->down_cnt
+= stats
->link_down
;
1106 if (stats
->link_down
)
1107 wake_up(&mgp
->down_wq
);
1111 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1113 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1114 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1115 int limit
, orig_limit
, work_done
;
1117 /* process as many rx events as NAPI will allow */
1118 limit
= min(*budget
, netdev
->quota
);
1120 myri10ge_clean_rx_done(mgp
, &limit
);
1121 work_done
= orig_limit
- limit
;
1122 *budget
-= work_done
;
1123 netdev
->quota
-= work_done
;
1125 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1126 netif_rx_complete(netdev
);
1127 __raw_writel(htonl(3), mgp
->irq_claim
);
1133 static irqreturn_t
myri10ge_intr(int irq
, void *arg
, struct pt_regs
*regs
)
1135 struct myri10ge_priv
*mgp
= arg
;
1136 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1137 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1138 u32 send_done_count
;
1141 /* make sure it is our IRQ, and that the DMA has finished */
1142 if (unlikely(!stats
->valid
))
1145 /* low bit indicates receives are present, so schedule
1146 * napi poll handler */
1147 if (stats
->valid
& 1)
1148 netif_rx_schedule(mgp
->dev
);
1150 if (!mgp
->msi_enabled
) {
1151 __raw_writel(0, mgp
->irq_deassert
);
1152 if (!myri10ge_deassert_wait
)
1158 /* Wait for IRQ line to go low, if using INTx */
1162 /* check for transmit completes and receives */
1163 send_done_count
= ntohl(stats
->send_done_count
);
1164 if (send_done_count
!= tx
->pkt_done
)
1165 myri10ge_tx_done(mgp
, (int)send_done_count
);
1166 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1167 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1170 schedule_work(&mgp
->watchdog_work
);
1172 if (likely(stats
->valid
== 0))
1178 myri10ge_check_statblock(mgp
);
1180 __raw_writel(htonl(3), mgp
->irq_claim
+ 1);
1181 return (IRQ_HANDLED
);
1185 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1187 cmd
->autoneg
= AUTONEG_DISABLE
;
1188 cmd
->speed
= SPEED_10000
;
1189 cmd
->duplex
= DUPLEX_FULL
;
1194 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1196 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1198 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1199 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1200 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1201 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1205 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1207 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1208 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1213 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1215 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1217 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1218 __raw_writel(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1223 myri10ge_get_pauseparam(struct net_device
*netdev
,
1224 struct ethtool_pauseparam
*pause
)
1226 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1229 pause
->rx_pause
= mgp
->pause
;
1230 pause
->tx_pause
= mgp
->pause
;
1234 myri10ge_set_pauseparam(struct net_device
*netdev
,
1235 struct ethtool_pauseparam
*pause
)
1237 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1239 if (pause
->tx_pause
!= mgp
->pause
)
1240 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1241 if (pause
->rx_pause
!= mgp
->pause
)
1242 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1243 if (pause
->autoneg
!= 0)
1249 myri10ge_get_ringparam(struct net_device
*netdev
,
1250 struct ethtool_ringparam
*ring
)
1252 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1254 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1255 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1256 ring
->rx_jumbo_max_pending
= 0;
1257 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1258 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1259 ring
->rx_pending
= ring
->rx_max_pending
;
1260 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1261 ring
->tx_pending
= ring
->tx_max_pending
;
1264 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1266 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1273 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1275 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1277 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1283 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1284 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1285 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1286 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1287 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1288 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1289 "tx_heartbeat_errors", "tx_window_errors",
1290 /* device-specific stats */
1291 "tx_boundary", "WC", "irq", "MSI",
1292 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1293 "serial_number", "tx_pkt_start", "tx_pkt_done",
1294 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1295 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1296 "link_up", "dropped_link_overflow", "dropped_link_error_or_filtered",
1297 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1298 "dropped_no_big_buffer"
1301 #define MYRI10GE_NET_STATS_LEN 21
1302 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1305 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1307 switch (stringset
) {
1309 memcpy(data
, *myri10ge_gstrings_stats
,
1310 sizeof(myri10ge_gstrings_stats
));
1315 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1317 return MYRI10GE_STATS_LEN
;
1321 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1322 struct ethtool_stats
*stats
, u64
* data
)
1324 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1327 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1328 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1330 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1331 data
[i
++] = (unsigned int)(mgp
->mtrr
>= 0);
1332 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1333 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1334 data
[i
++] = (unsigned int)mgp
->read_dma
;
1335 data
[i
++] = (unsigned int)mgp
->write_dma
;
1336 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1337 data
[i
++] = (unsigned int)mgp
->serial_number
;
1338 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1339 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1340 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1341 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1342 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1343 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1344 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1345 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1346 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1347 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1348 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1349 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1351 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1352 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1353 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1354 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1355 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1358 static struct ethtool_ops myri10ge_ethtool_ops
= {
1359 .get_settings
= myri10ge_get_settings
,
1360 .get_drvinfo
= myri10ge_get_drvinfo
,
1361 .get_coalesce
= myri10ge_get_coalesce
,
1362 .set_coalesce
= myri10ge_set_coalesce
,
1363 .get_pauseparam
= myri10ge_get_pauseparam
,
1364 .set_pauseparam
= myri10ge_set_pauseparam
,
1365 .get_ringparam
= myri10ge_get_ringparam
,
1366 .get_rx_csum
= myri10ge_get_rx_csum
,
1367 .set_rx_csum
= myri10ge_set_rx_csum
,
1368 .get_tx_csum
= ethtool_op_get_tx_csum
,
1369 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1370 .get_sg
= ethtool_op_get_sg
,
1371 .set_sg
= ethtool_op_set_sg
,
1373 .get_tso
= ethtool_op_get_tso
,
1374 .set_tso
= ethtool_op_set_tso
,
1376 .get_strings
= myri10ge_get_strings
,
1377 .get_stats_count
= myri10ge_get_stats_count
,
1378 .get_ethtool_stats
= myri10ge_get_ethtool_stats
1381 static int myri10ge_allocate_rings(struct net_device
*dev
)
1383 struct myri10ge_priv
*mgp
;
1384 struct myri10ge_cmd cmd
;
1385 int tx_ring_size
, rx_ring_size
;
1386 int tx_ring_entries
, rx_ring_entries
;
1390 mgp
= netdev_priv(dev
);
1392 /* get ring sizes */
1394 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1395 tx_ring_size
= cmd
.data0
;
1396 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1397 rx_ring_size
= cmd
.data0
;
1399 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1400 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1401 mgp
->tx
.mask
= tx_ring_entries
- 1;
1402 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1404 /* allocate the host shadow rings */
1406 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1407 * sizeof(*mgp
->tx
.req_list
);
1408 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1409 if (mgp
->tx
.req_bytes
== NULL
)
1410 goto abort_with_nothing
;
1412 /* ensure req_list entries are aligned to 8 bytes */
1413 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1414 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1416 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1417 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1418 if (mgp
->rx_small
.shadow
== NULL
)
1419 goto abort_with_tx_req_bytes
;
1421 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1422 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1423 if (mgp
->rx_big
.shadow
== NULL
)
1424 goto abort_with_rx_small_shadow
;
1426 /* allocate the host info rings */
1428 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1429 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1430 if (mgp
->tx
.info
== NULL
)
1431 goto abort_with_rx_big_shadow
;
1433 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1434 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1435 if (mgp
->rx_small
.info
== NULL
)
1436 goto abort_with_tx_info
;
1438 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1439 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1440 if (mgp
->rx_big
.info
== NULL
)
1441 goto abort_with_rx_small_info
;
1443 /* Fill the receive rings */
1445 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1446 status
= myri10ge_getbuf(&mgp
->rx_small
, mgp
->pdev
,
1447 mgp
->small_bytes
, i
);
1450 "myri10ge: %s: alloced only %d small bufs\n",
1452 goto abort_with_rx_small_ring
;
1456 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1458 myri10ge_getbuf(&mgp
->rx_big
, mgp
->pdev
,
1459 dev
->mtu
+ ETH_HLEN
, i
);
1462 "myri10ge: %s: alloced only %d big bufs\n",
1464 goto abort_with_rx_big_ring
;
1470 abort_with_rx_big_ring
:
1471 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1472 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1473 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1474 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1475 pci_unmap_single(mgp
->pdev
,
1476 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1478 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1480 PCI_DMA_FROMDEVICE
);
1483 abort_with_rx_small_ring
:
1484 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1485 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1486 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1487 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1488 pci_unmap_single(mgp
->pdev
,
1489 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1491 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1493 PCI_DMA_FROMDEVICE
);
1495 kfree(mgp
->rx_big
.info
);
1497 abort_with_rx_small_info
:
1498 kfree(mgp
->rx_small
.info
);
1501 kfree(mgp
->tx
.info
);
1503 abort_with_rx_big_shadow
:
1504 kfree(mgp
->rx_big
.shadow
);
1506 abort_with_rx_small_shadow
:
1507 kfree(mgp
->rx_small
.shadow
);
1509 abort_with_tx_req_bytes
:
1510 kfree(mgp
->tx
.req_bytes
);
1511 mgp
->tx
.req_bytes
= NULL
;
1512 mgp
->tx
.req_list
= NULL
;
1518 static void myri10ge_free_rings(struct net_device
*dev
)
1520 struct myri10ge_priv
*mgp
;
1521 struct sk_buff
*skb
;
1522 struct myri10ge_tx_buf
*tx
;
1525 mgp
= netdev_priv(dev
);
1527 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1528 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1529 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1530 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1531 pci_unmap_single(mgp
->pdev
,
1532 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1534 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1536 PCI_DMA_FROMDEVICE
);
1539 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1540 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1541 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1542 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1543 pci_unmap_single(mgp
->pdev
,
1544 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1546 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1548 PCI_DMA_FROMDEVICE
);
1552 while (tx
->done
!= tx
->req
) {
1553 idx
= tx
->done
& tx
->mask
;
1554 skb
= tx
->info
[idx
].skb
;
1557 tx
->info
[idx
].skb
= NULL
;
1559 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1560 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1562 mgp
->stats
.tx_dropped
++;
1563 dev_kfree_skb_any(skb
);
1565 pci_unmap_single(mgp
->pdev
,
1566 pci_unmap_addr(&tx
->info
[idx
],
1571 pci_unmap_page(mgp
->pdev
,
1572 pci_unmap_addr(&tx
->info
[idx
],
1577 kfree(mgp
->rx_big
.info
);
1579 kfree(mgp
->rx_small
.info
);
1581 kfree(mgp
->tx
.info
);
1583 kfree(mgp
->rx_big
.shadow
);
1585 kfree(mgp
->rx_small
.shadow
);
1587 kfree(mgp
->tx
.req_bytes
);
1588 mgp
->tx
.req_bytes
= NULL
;
1589 mgp
->tx
.req_list
= NULL
;
1592 static int myri10ge_open(struct net_device
*dev
)
1594 struct myri10ge_priv
*mgp
;
1595 struct myri10ge_cmd cmd
;
1596 int status
, big_pow2
;
1598 mgp
= netdev_priv(dev
);
1600 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1603 mgp
->running
= MYRI10GE_ETH_STARTING
;
1604 status
= myri10ge_reset(mgp
);
1606 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1607 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1611 /* decide what small buffer size to use. For good TCP rx
1612 * performance, it is important to not receive 1514 byte
1613 * frames into jumbo buffers, as it confuses the socket buffer
1614 * accounting code, leading to drops and erratic performance.
1617 if (dev
->mtu
<= ETH_DATA_LEN
)
1618 mgp
->small_bytes
= 128; /* enough for a TCP header */
1620 mgp
->small_bytes
= ETH_FRAME_LEN
; /* enough for an ETH_DATA_LEN frame */
1622 /* Override the small buffer size? */
1623 if (myri10ge_small_bytes
> 0)
1624 mgp
->small_bytes
= myri10ge_small_bytes
;
1626 /* If the user sets an obscenely small MTU, adjust the small
1627 * bytes down to nearly nothing */
1628 if (mgp
->small_bytes
>= (dev
->mtu
+ ETH_HLEN
))
1629 mgp
->small_bytes
= 64;
1631 /* get the lanai pointers to the send and receive rings */
1633 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1635 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1638 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1639 mgp
->rx_small
.lanai
=
1640 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1642 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1644 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1648 "myri10ge: %s: failed to get ring sizes or locations\n",
1650 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1654 if (mgp
->mtrr
>= 0) {
1655 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ 0x200000;
1656 mgp
->rx_small
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ 0x300000;
1657 mgp
->rx_big
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ 0x340000;
1659 mgp
->tx
.wc_fifo
= NULL
;
1660 mgp
->rx_small
.wc_fifo
= NULL
;
1661 mgp
->rx_big
.wc_fifo
= NULL
;
1664 status
= myri10ge_allocate_rings(dev
);
1666 goto abort_with_nothing
;
1668 /* Firmware needs the big buff size as a power of 2. Lie and
1669 * tell him the buffer is larger, because we only use 1
1670 * buffer/pkt, and the mtu will prevent overruns.
1672 big_pow2
= dev
->mtu
+ ETH_HLEN
+ MXGEFW_PAD
;
1673 while ((big_pow2
& (big_pow2
- 1)) != 0)
1676 /* now give firmware buffers sizes, and MTU */
1677 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1678 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1679 cmd
.data0
= mgp
->small_bytes
;
1681 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1682 cmd
.data0
= big_pow2
;
1684 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1686 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1688 goto abort_with_rings
;
1691 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1692 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1693 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA
, &cmd
, 0);
1695 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1697 goto abort_with_rings
;
1700 mgp
->link_state
= -1;
1701 mgp
->rdma_tags_available
= 15;
1703 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1705 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1707 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1709 goto abort_with_rings
;
1712 mgp
->wake_queue
= 0;
1713 mgp
->stop_queue
= 0;
1714 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1715 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1716 add_timer(&mgp
->watchdog_timer
);
1717 netif_wake_queue(dev
);
1721 myri10ge_free_rings(dev
);
1724 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1728 static int myri10ge_close(struct net_device
*dev
)
1730 struct myri10ge_priv
*mgp
;
1731 struct myri10ge_cmd cmd
;
1732 int status
, old_down_cnt
;
1734 mgp
= netdev_priv(dev
);
1736 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1739 if (mgp
->tx
.req_bytes
== NULL
)
1742 del_timer_sync(&mgp
->watchdog_timer
);
1743 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1744 netif_poll_disable(mgp
->dev
);
1745 netif_carrier_off(dev
);
1746 netif_stop_queue(dev
);
1747 old_down_cnt
= mgp
->down_cnt
;
1749 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1751 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
1754 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
1755 if (old_down_cnt
== mgp
->down_cnt
)
1756 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
1758 netif_tx_disable(dev
);
1760 myri10ge_free_rings(dev
);
1762 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1766 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1767 * backwards one at a time and handle ring wraps */
1770 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
1771 struct mcp_kreq_ether_send
*src
, int cnt
)
1773 int idx
, starting_slot
;
1774 starting_slot
= tx
->req
;
1777 idx
= (starting_slot
+ cnt
) & tx
->mask
;
1778 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
1784 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1785 * at most 32 bytes at a time, so as to avoid involving the software
1786 * pio handler in the nic. We re-write the first segment's flags
1787 * to mark them valid only after writing the entire chain.
1791 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
1795 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
1796 struct mcp_kreq_ether_send
*srcp
;
1799 idx
= tx
->req
& tx
->mask
;
1801 last_flags
= src
->flags
;
1804 dst
= dstp
= &tx
->lanai
[idx
];
1807 if ((idx
+ cnt
) < tx
->mask
) {
1808 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
1809 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
1810 mb(); /* force write every 32 bytes */
1815 /* submit all but the first request, and ensure
1816 * that it is submitted below */
1817 myri10ge_submit_req_backwards(tx
, src
, cnt
);
1821 /* submit the first request */
1822 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
1823 mb(); /* barrier before setting valid flag */
1826 /* re-write the last 32-bits with the valid flags */
1827 src
->flags
= last_flags
;
1828 __raw_writel(*((u32
*) src
+ 3), (u32 __iomem
*) dst
+ 3);
1834 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
1835 struct mcp_kreq_ether_send
*src
, int cnt
)
1840 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
1846 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1847 * needs to be so that we don't overrun it */
1848 myri10ge_pio_copy(tx
->wc_fifo
+ (cnt
<< 18), src
, 64);
1854 * Transmit a packet. We need to split the packet so that a single
1855 * segment does not cross myri10ge->tx.boundary, so this makes segment
1856 * counting tricky. So rather than try to count segments up front, we
1857 * just give up if there are too few segments to hold a reasonably
1858 * fragmented packet currently available. If we run
1859 * out of segments while preparing a packet for DMA, we just linearize
1863 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1865 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
1866 struct mcp_kreq_ether_send
*req
;
1867 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1868 struct skb_frag_struct
*frag
;
1870 u32 low
, high_swapped
;
1872 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
1873 u16 pseudo_hdr_offset
, cksum_offset
;
1874 int cum_len
, seglen
, boundary
, rdma_count
;
1879 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
1882 max_segments
= MXGEFW_MAX_SEND_DESC
;
1885 if (skb
->len
> (dev
->mtu
+ ETH_HLEN
)) {
1886 mss
= skb_shinfo(skb
)->gso_size
;
1888 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
1890 #endif /*NETIF_F_TSO */
1892 if ((unlikely(avail
< max_segments
))) {
1893 /* we are out of transmit resources */
1895 netif_stop_queue(dev
);
1899 /* Setup checksum offloading, if needed */
1901 pseudo_hdr_offset
= 0;
1903 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
1904 if (likely(skb
->ip_summed
== CHECKSUM_HW
)) {
1905 cksum_offset
= (skb
->h
.raw
- skb
->data
);
1906 pseudo_hdr_offset
= (skb
->h
.raw
+ skb
->csum
) - skb
->data
;
1907 /* If the headers are excessively large, then we must
1908 * fall back to a software checksum */
1909 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
1910 if (skb_checksum_help(skb
, 0))
1913 pseudo_hdr_offset
= 0;
1915 pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
1916 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
1917 flags
|= MXGEFW_FLAGS_CKSUM
;
1924 if (mss
) { /* TSO */
1925 /* this removes any CKSUM flag from before */
1926 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
1928 /* negative cum_len signifies to the
1929 * send loop that we are still in the
1930 * header portion of the TSO packet.
1931 * TSO header must be at most 134 bytes long */
1932 cum_len
= -((skb
->h
.raw
- skb
->data
) + (skb
->h
.th
->doff
<< 2));
1934 /* for TSO, pseudo_hdr_offset holds mss.
1935 * The firmware figures out where to put
1936 * the checksum by parsing the header. */
1937 pseudo_hdr_offset
= htons(mss
);
1939 #endif /*NETIF_F_TSO */
1940 /* Mark small packets, and pad out tiny packets */
1941 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
1942 flags
|= MXGEFW_FLAGS_SMALL
;
1944 /* pad frames to at least ETH_ZLEN bytes */
1945 if (unlikely(skb
->len
< ETH_ZLEN
)) {
1946 if (skb_padto(skb
, ETH_ZLEN
)) {
1947 /* The packet is gone, so we must
1949 mgp
->stats
.tx_dropped
+= 1;
1952 /* adjust the len to account for the zero pad
1953 * so that the nic can know how long it is */
1954 skb
->len
= ETH_ZLEN
;
1958 /* map the skb for DMA */
1959 len
= skb
->len
- skb
->data_len
;
1960 idx
= tx
->req
& tx
->mask
;
1961 tx
->info
[idx
].skb
= skb
;
1962 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
1963 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
1964 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
1966 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
1971 /* "rdma_count" is the number of RDMAs belonging to the
1972 * current packet BEFORE the current send request. For
1973 * non-TSO packets, this is equal to "count".
1974 * For TSO packets, rdma_count needs to be reset
1975 * to 0 after a segment cut.
1977 * The rdma_count field of the send request is
1978 * the number of RDMAs of the packet starting at
1979 * that request. For TSO send requests with one ore more cuts
1980 * in the middle, this is the number of RDMAs starting
1981 * after the last cut in the request. All previous
1982 * segments before the last cut implicitly have 1 RDMA.
1984 * Since the number of RDMAs is not known beforehand,
1985 * it must be filled-in retroactively - after each
1986 * segmentation cut or at the end of the entire packet.
1990 /* Break the SKB or Fragment up into pieces which
1991 * do not cross mgp->tx.boundary */
1992 low
= MYRI10GE_LOWPART_TO_U32(bus
);
1993 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
1998 if (unlikely(count
== max_segments
))
1999 goto abort_linearize
;
2001 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2002 seglen
= boundary
- low
;
2005 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2006 cum_len_next
= cum_len
+ seglen
;
2008 if (mss
) { /* TSO */
2009 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2011 if (likely(cum_len
>= 0)) { /* payload */
2012 int next_is_first
, chop
;
2014 chop
= (cum_len_next
> mss
);
2015 cum_len_next
= cum_len_next
% mss
;
2016 next_is_first
= (cum_len_next
== 0);
2017 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2018 flags_next
|= next_is_first
*
2020 rdma_count
|= -(chop
| next_is_first
);
2021 rdma_count
+= chop
& !next_is_first
;
2022 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2028 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2029 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2030 MXGEFW_FLAGS_FIRST
|
2031 (small
* MXGEFW_FLAGS_SMALL
);
2034 #endif /* NETIF_F_TSO */
2035 req
->addr_high
= high_swapped
;
2036 req
->addr_low
= htonl(low
);
2037 req
->pseudo_hdr_offset
= pseudo_hdr_offset
;
2038 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2039 req
->rdma_count
= 1;
2040 req
->length
= htons(seglen
);
2041 req
->cksum_offset
= cksum_offset
;
2042 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2046 cum_len
= cum_len_next
;
2051 if (unlikely(cksum_offset
> seglen
))
2052 cksum_offset
-= seglen
;
2056 if (frag_idx
== frag_cnt
)
2059 /* map next fragment for DMA */
2060 idx
= (count
+ tx
->req
) & tx
->mask
;
2061 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2064 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2065 len
, PCI_DMA_TODEVICE
);
2066 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2067 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2070 (req
- rdma_count
)->rdma_count
= rdma_count
;
2075 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2076 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2077 MXGEFW_FLAGS_FIRST
)));
2079 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2080 tx
->info
[idx
].last
= 1;
2081 if (tx
->wc_fifo
== NULL
)
2082 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2084 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2086 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2088 netif_stop_queue(dev
);
2090 dev
->trans_start
= jiffies
;
2094 /* Free any DMA resources we've alloced and clear out the skb
2095 * slot so as to not trip up assertions, and to avoid a
2096 * double-free if linearizing fails */
2098 last_idx
= (idx
+ 1) & tx
->mask
;
2099 idx
= tx
->req
& tx
->mask
;
2100 tx
->info
[idx
].skb
= NULL
;
2102 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2104 if (tx
->info
[idx
].skb
!= NULL
)
2105 pci_unmap_single(mgp
->pdev
,
2106 pci_unmap_addr(&tx
->info
[idx
],
2110 pci_unmap_page(mgp
->pdev
,
2111 pci_unmap_addr(&tx
->info
[idx
],
2114 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2115 tx
->info
[idx
].skb
= NULL
;
2117 idx
= (idx
+ 1) & tx
->mask
;
2118 } while (idx
!= last_idx
);
2119 if (skb_shinfo(skb
)->gso_size
) {
2121 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2126 if (skb_linearize(skb
))
2129 mgp
->tx_linearized
++;
2133 dev_kfree_skb_any(skb
);
2134 mgp
->stats
.tx_dropped
+= 1;
2139 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2141 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2145 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2147 /* can be called from atomic contexts,
2148 * pass 1 to force atomicity in myri10ge_send_cmd() */
2149 myri10ge_change_promisc(netdev_priv(dev
), dev
->flags
& IFF_PROMISC
, 1);
2152 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2154 struct sockaddr
*sa
= addr
;
2155 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2158 if (!is_valid_ether_addr(sa
->sa_data
))
2159 return -EADDRNOTAVAIL
;
2161 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2164 "myri10ge: %s: changing mac address failed with %d\n",
2169 /* change the dev structure */
2170 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2174 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2176 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2179 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2180 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2181 dev
->name
, new_mtu
);
2184 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2185 dev
->name
, dev
->mtu
, new_mtu
);
2187 /* if we change the mtu on an active device, we must
2188 * reset the device so the firmware sees the change */
2189 myri10ge_close(dev
);
2199 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2200 * Only do it if the bridge is a root port since we don't want to disturb
2201 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2204 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2206 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2207 struct device
*dev
= &mgp
->pdev
->dev
;
2214 if (!myri10ge_ecrc_enable
|| !bridge
)
2217 /* check that the bridge is a root port */
2218 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2219 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2220 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2221 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2222 if (myri10ge_ecrc_enable
> 1) {
2223 struct pci_dev
*old_bridge
= bridge
;
2225 /* Walk the hierarchy up to the root port
2226 * where ECRC has to be enabled */
2228 bridge
= bridge
->bus
->self
;
2231 "Failed to find root port"
2232 " to force ECRC\n");
2236 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2237 pci_read_config_word(bridge
,
2238 cap
+ PCI_CAP_FLAGS
, &val
);
2239 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2240 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2243 "Forcing ECRC on non-root port %s"
2244 " (enabling on root port %s)\n",
2245 pci_name(old_bridge
), pci_name(bridge
));
2248 "Not enabling ECRC on non-root port %s\n",
2254 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2258 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2260 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2262 dev_err(dev
, "\t pci=nommconf in use? "
2263 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2266 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2269 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2270 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2271 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2272 mgp
->tx
.boundary
= 4096;
2273 mgp
->fw_name
= myri10ge_fw_aligned
;
2277 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2278 * when the PCI-E Completion packets are aligned on an 8-byte
2279 * boundary. Some PCI-E chip sets always align Completion packets; on
2280 * the ones that do not, the alignment can be enforced by enabling
2281 * ECRC generation (if supported).
2283 * When PCI-E Completion packets are not aligned, it is actually more
2284 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2286 * If the driver can neither enable ECRC nor verify that it has
2287 * already been enabled, then it must use a firmware image which works
2288 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2289 * should also ensure that it never gives the device a Read-DMA which is
2290 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2291 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2292 * firmware image, and set tx.boundary to 4KB.
2295 #define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132
2297 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2299 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2301 mgp
->tx
.boundary
= 2048;
2302 mgp
->fw_name
= myri10ge_fw_unaligned
;
2304 if (myri10ge_force_firmware
== 0) {
2305 myri10ge_enable_ecrc(mgp
);
2307 /* Check to see if the upstream bridge is known to
2308 * provide aligned completions */
2310 /* ServerWorks HT2000/HT1000 */
2311 && bridge
->vendor
== PCI_VENDOR_ID_SERVERWORKS
2312 && bridge
->device
==
2313 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE
) {
2314 dev_info(&mgp
->pdev
->dev
,
2315 "Assuming aligned completions (0x%x:0x%x)\n",
2316 bridge
->vendor
, bridge
->device
);
2317 mgp
->tx
.boundary
= 4096;
2318 mgp
->fw_name
= myri10ge_fw_aligned
;
2321 if (myri10ge_force_firmware
== 1) {
2322 dev_info(&mgp
->pdev
->dev
,
2323 "Assuming aligned completions (forced)\n");
2324 mgp
->tx
.boundary
= 4096;
2325 mgp
->fw_name
= myri10ge_fw_aligned
;
2327 dev_info(&mgp
->pdev
->dev
,
2328 "Assuming unaligned completions (forced)\n");
2329 mgp
->tx
.boundary
= 2048;
2330 mgp
->fw_name
= myri10ge_fw_unaligned
;
2333 if (myri10ge_fw_name
!= NULL
) {
2334 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2336 mgp
->fw_name
= myri10ge_fw_name
;
2340 static void myri10ge_save_state(struct myri10ge_priv
*mgp
)
2342 struct pci_dev
*pdev
= mgp
->pdev
;
2345 pci_save_state(pdev
);
2346 /* now save PCIe and MSI state that Linux will not
2348 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2349 pci_read_config_dword(pdev
, cap
+ PCI_EXP_DEVCTL
, &mgp
->devctl
);
2350 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2351 pci_read_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, &mgp
->msi_flags
);
2354 static void myri10ge_restore_state(struct myri10ge_priv
*mgp
)
2356 struct pci_dev
*pdev
= mgp
->pdev
;
2359 /* restore PCIe and MSI state that linux will not */
2360 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2361 pci_write_config_dword(pdev
, cap
+ PCI_CAP_ID_EXP
, mgp
->devctl
);
2362 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2363 pci_write_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, mgp
->msi_flags
);
2365 pci_restore_state(pdev
);
2370 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2372 struct myri10ge_priv
*mgp
;
2373 struct net_device
*netdev
;
2375 mgp
= pci_get_drvdata(pdev
);
2380 netif_device_detach(netdev
);
2381 if (netif_running(netdev
)) {
2382 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2384 myri10ge_close(netdev
);
2387 myri10ge_dummy_rdma(mgp
, 0);
2388 free_irq(pdev
->irq
, mgp
);
2389 myri10ge_save_state(mgp
);
2390 pci_disable_device(pdev
);
2391 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2395 static int myri10ge_resume(struct pci_dev
*pdev
)
2397 struct myri10ge_priv
*mgp
;
2398 struct net_device
*netdev
;
2402 mgp
= pci_get_drvdata(pdev
);
2406 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2407 msleep(5); /* give card time to respond */
2408 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2409 if (vendor
== 0xffff) {
2410 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2414 myri10ge_restore_state(mgp
);
2415 pci_enable_device(pdev
);
2416 pci_set_master(pdev
);
2418 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
2421 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
2422 goto abort_with_msi
;
2425 myri10ge_reset(mgp
);
2426 myri10ge_dummy_rdma(mgp
, mgp
->tx
.boundary
!= 4096);
2428 /* Save configuration space to be restored if the
2429 * nic resets due to a parity error */
2430 myri10ge_save_state(mgp
);
2432 if (netif_running(netdev
)) {
2434 myri10ge_open(netdev
);
2437 netif_device_attach(netdev
);
2446 #endif /* CONFIG_PM */
2448 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2450 struct pci_dev
*pdev
= mgp
->pdev
;
2451 int vs
= mgp
->vendor_specific_offset
;
2454 /*enter read32 mode */
2455 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2457 /*read REBOOT_STATUS (0xfffffff0) */
2458 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2459 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2464 * This watchdog is used to check whether the board has suffered
2465 * from a parity error and needs to be recovered.
2467 static void myri10ge_watchdog(void *arg
)
2469 struct myri10ge_priv
*mgp
= arg
;
2474 mgp
->watchdog_resets
++;
2475 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2476 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2477 /* Bus master DMA disabled? Check to see
2478 * if the card rebooted due to a parity error
2479 * For now, just report it */
2480 reboot
= myri10ge_read_reboot(mgp
);
2482 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2483 mgp
->dev
->name
, reboot
);
2485 * A rebooted nic will come back with config space as
2486 * it was after power was applied to PCIe bus.
2487 * Attempt to restore config space which was saved
2488 * when the driver was loaded, or the last time the
2489 * nic was resumed from power saving mode.
2491 myri10ge_restore_state(mgp
);
2493 /* if we get back -1's from our slot, perhaps somebody
2494 * powered off our card. Don't try to reset it in
2496 if (cmd
== 0xffff) {
2497 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2498 if (vendor
== 0xffff) {
2500 "myri10ge: %s: device disappeared!\n",
2505 /* Perhaps it is a software error. Try to reset */
2507 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2509 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2510 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2511 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2512 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2514 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2515 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2516 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2517 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2520 myri10ge_close(mgp
->dev
);
2521 status
= myri10ge_load_firmware(mgp
);
2523 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2526 myri10ge_open(mgp
->dev
);
2531 * We use our own timer routine rather than relying upon
2532 * netdev->tx_timeout because we have a very large hardware transmit
2533 * queue. Due to the large queue, the netdev->tx_timeout function
2534 * cannot detect a NIC with a parity error in a timely fashion if the
2535 * NIC is lightly loaded.
2537 static void myri10ge_watchdog_timer(unsigned long arg
)
2539 struct myri10ge_priv
*mgp
;
2541 mgp
= (struct myri10ge_priv
*)arg
;
2542 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2543 mgp
->tx
.done
== mgp
->watchdog_tx_done
)
2544 /* nic seems like it might be stuck.. */
2545 schedule_work(&mgp
->watchdog_work
);
2548 mod_timer(&mgp
->watchdog_timer
,
2549 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2551 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2554 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2556 struct net_device
*netdev
;
2557 struct myri10ge_priv
*mgp
;
2558 struct device
*dev
= &pdev
->dev
;
2561 int status
= -ENXIO
;
2566 netdev
= alloc_etherdev(sizeof(*mgp
));
2567 if (netdev
== NULL
) {
2568 dev_err(dev
, "Could not allocate ethernet device\n");
2572 mgp
= netdev_priv(netdev
);
2573 memset(mgp
, 0, sizeof(*mgp
));
2576 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2577 mgp
->pause
= myri10ge_flow_control
;
2578 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2579 init_waitqueue_head(&mgp
->down_wq
);
2581 if (pci_enable_device(pdev
)) {
2582 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2584 goto abort_with_netdev
;
2586 myri10ge_select_firmware(mgp
);
2588 /* Find the vendor-specific cap so we can check
2589 * the reboot register later on */
2590 mgp
->vendor_specific_offset
2591 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2593 /* Set our max read request to 4KB */
2594 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2596 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2597 goto abort_with_netdev
;
2599 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2601 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2603 goto abort_with_netdev
;
2605 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2606 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2608 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2610 goto abort_with_netdev
;
2613 pci_set_master(pdev
);
2615 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2619 "64-bit pci address mask was refused, trying 32-bit");
2620 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2623 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2624 goto abort_with_netdev
;
2626 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2627 &mgp
->cmd_bus
, GFP_KERNEL
);
2628 if (mgp
->cmd
== NULL
)
2629 goto abort_with_netdev
;
2631 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2632 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2633 if (mgp
->fw_stats
== NULL
)
2634 goto abort_with_cmd
;
2636 mgp
->board_span
= pci_resource_len(pdev
, 0);
2637 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2640 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2641 MTRR_TYPE_WRCOMB
, 1);
2643 /* Hack. need to get rid of these magic numbers */
2645 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2646 if (mgp
->sram_size
> mgp
->board_span
) {
2647 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
2651 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
2652 if (mgp
->sram
== NULL
) {
2653 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
2654 mgp
->board_span
, mgp
->iomem_base
);
2658 memcpy_fromio(mgp
->eeprom_strings
,
2659 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
2660 MYRI10GE_EEPROM_STRINGS_SIZE
);
2661 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
2662 status
= myri10ge_read_mac_addr(mgp
);
2664 goto abort_with_ioremap
;
2666 for (i
= 0; i
< ETH_ALEN
; i
++)
2667 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
2669 /* allocate rx done ring */
2670 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2671 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
2672 &mgp
->rx_done
.bus
, GFP_KERNEL
);
2673 if (mgp
->rx_done
.entry
== NULL
)
2674 goto abort_with_ioremap
;
2675 memset(mgp
->rx_done
.entry
, 0, bytes
);
2677 status
= myri10ge_load_firmware(mgp
);
2679 dev_err(&pdev
->dev
, "failed to load firmware\n");
2680 goto abort_with_rx_done
;
2683 status
= myri10ge_reset(mgp
);
2685 dev_err(&pdev
->dev
, "failed reset\n");
2686 goto abort_with_firmware
;
2690 status
= pci_enable_msi(pdev
);
2693 "Error %d setting up MSI; falling back to xPIC\n",
2696 mgp
->msi_enabled
= 1;
2699 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
2702 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
2703 goto abort_with_firmware
;
2706 pci_set_drvdata(pdev
, mgp
);
2707 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
2708 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
2709 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
2710 myri10ge_initial_mtu
= 68;
2711 netdev
->mtu
= myri10ge_initial_mtu
;
2712 netdev
->open
= myri10ge_open
;
2713 netdev
->stop
= myri10ge_close
;
2714 netdev
->hard_start_xmit
= myri10ge_xmit
;
2715 netdev
->get_stats
= myri10ge_get_stats
;
2716 netdev
->base_addr
= mgp
->iomem_base
;
2717 netdev
->irq
= pdev
->irq
;
2718 netdev
->change_mtu
= myri10ge_change_mtu
;
2719 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
2720 netdev
->set_mac_address
= myri10ge_set_mac_address
;
2721 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
2723 netdev
->features
|= NETIF_F_HIGHDMA
;
2724 netdev
->poll
= myri10ge_poll
;
2725 netdev
->weight
= myri10ge_napi_weight
;
2727 /* Save configuration space to be restored if the
2728 * nic resets due to a parity error */
2729 myri10ge_save_state(mgp
);
2731 /* Setup the watchdog timer */
2732 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
2733 (unsigned long)mgp
);
2735 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
2736 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
, mgp
);
2737 status
= register_netdev(netdev
);
2739 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
2740 goto abort_with_irq
;
2742 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2743 (mgp
->msi_enabled
? "MSI" : "xPIC"),
2744 pdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
2745 (mgp
->mtrr
>= 0 ? "Enabled" : "Disabled"));
2750 free_irq(pdev
->irq
, mgp
);
2751 if (mgp
->msi_enabled
)
2752 pci_disable_msi(pdev
);
2754 abort_with_firmware
:
2755 myri10ge_dummy_rdma(mgp
, 0);
2758 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2759 dma_free_coherent(&pdev
->dev
, bytes
,
2760 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2768 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2770 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2771 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2774 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2775 mgp
->cmd
, mgp
->cmd_bus
);
2779 free_netdev(netdev
);
2786 * Does what is necessary to shutdown one Myrinet device. Called
2787 * once for each Myrinet card by the kernel when a module is
2790 static void myri10ge_remove(struct pci_dev
*pdev
)
2792 struct myri10ge_priv
*mgp
;
2793 struct net_device
*netdev
;
2796 mgp
= pci_get_drvdata(pdev
);
2800 flush_scheduled_work();
2802 unregister_netdev(netdev
);
2803 free_irq(pdev
->irq
, mgp
);
2804 if (mgp
->msi_enabled
)
2805 pci_disable_msi(pdev
);
2807 myri10ge_dummy_rdma(mgp
, 0);
2809 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2810 dma_free_coherent(&pdev
->dev
, bytes
,
2811 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2817 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2819 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2820 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2822 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2823 mgp
->cmd
, mgp
->cmd_bus
);
2825 free_netdev(netdev
);
2826 pci_set_drvdata(pdev
, NULL
);
2829 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
2831 static struct pci_device_id myri10ge_pci_tbl
[] = {
2832 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
2836 static struct pci_driver myri10ge_driver
= {
2838 .probe
= myri10ge_probe
,
2839 .remove
= myri10ge_remove
,
2840 .id_table
= myri10ge_pci_tbl
,
2842 .suspend
= myri10ge_suspend
,
2843 .resume
= myri10ge_resume
,
2847 static __init
int myri10ge_init_module(void)
2849 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
2850 MYRI10GE_VERSION_STR
);
2851 return pci_register_driver(&myri10ge_driver
);
2854 module_init(myri10ge_init_module
);
2856 static __exit
void myri10ge_cleanup_module(void)
2858 pci_unregister_driver(&myri10ge_driver
);
2861 module_exit(myri10ge_cleanup_module
);