drivers/net/meth.c

   1 /*
   2  * meth.c -- O2 Builtin 10/100 Ethernet driver
   3  *
   4  * Copyright (C) 2001-2003 Ilya Volynets
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  */
  11 #include <linux/delay.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/init.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/slab.h>
  18 #include <linux/errno.h>
  19 #include <linux/types.h>
  20 #include <linux/interrupt.h>
  21
  22 #include <linux/in.h>
  23 #include <linux/in6.h>
  24 #include <linux/device.h> /* struct device, et al */
  25 #include <linux/netdevice.h>   /* struct device, and other headers */
  26 #include <linux/etherdevice.h> /* eth_type_trans */
  27 #include <linux/ip.h>          /* struct iphdr */
  28 #include <linux/tcp.h>         /* struct tcphdr */
  29 #include <linux/skbuff.h>
  30 #include <linux/mii.h>         /* MII definitions */
  31
  32 #include <asm/ip32/mace.h>
  33 #include <asm/ip32/ip32_ints.h>
  34
  35 #include <asm/io.h>
  36
  37 #include "meth.h"
  38
  39 #ifndef MFE_DEBUG
  40 #define MFE_DEBUG 0
  41 #endif
  42
  43 #if MFE_DEBUG>=1
  44 #define DPRINTK(str,args...) printk(KERN_DEBUG "meth: %s: " str, __func__ , ## args)
  45 #define MFE_RX_DEBUG 2
  46 #else
  47 #define DPRINTK(str,args...)
  48 #define MFE_RX_DEBUG 0
  49 #endif
  50
  51
  52 static const char *meth_str="SGI O2 Fast Ethernet";
  53
  54 /* The maximum time waited (in jiffies) before assuming a Tx failed. (400ms) */
  55 #define TX_TIMEOUT (400*HZ/1000)
  56
  57 static int timeout = TX_TIMEOUT;
  58 module_param(timeout, int, 0);
  59
  60 /*
  61  * This structure is private to each device. It is used to pass
  62  * packets in and out, so there is place for a packet
  63  */
  64 struct meth_private {
  65         /* in-memory copy of MAC Control register */
  66         unsigned long mac_ctrl;
  67         /* in-memory copy of DMA Control register */
  68         unsigned long dma_ctrl;
  69         /* address of PHY, used by mdio_* functions, initialized in mdio_probe */
  70         unsigned long phy_addr;
  71         tx_packet *tx_ring;
  72         dma_addr_t tx_ring_dma;
  73         struct sk_buff *tx_skbs[TX_RING_ENTRIES];
  74         dma_addr_t tx_skb_dmas[TX_RING_ENTRIES];
  75         unsigned long tx_read, tx_write, tx_count;
  76
  77         rx_packet *rx_ring[RX_RING_ENTRIES];
  78         dma_addr_t rx_ring_dmas[RX_RING_ENTRIES];
  79         struct sk_buff *rx_skbs[RX_RING_ENTRIES];
  80         unsigned long rx_write;
  81
  82         spinlock_t meth_lock;
  83 };
  84
  85 static void meth_tx_timeout(struct net_device *dev);
  86 static irqreturn_t meth_interrupt(int irq, void *dev_id);
  87
  88 /* global, initialized in ip32-setup.c */
  89 char o2meth_eaddr[8]={0,0,0,0,0,0,0,0};
  90
  91 static inline void load_eaddr(struct net_device *dev)
  92 {
  93         int i;
  94         u64 macaddr;
  95
  96         DPRINTK("Loading MAC Address: %pM\n", dev->dev_addr);
  97         macaddr = 0;
  98         for (i = 0; i < 6; i++)
  99                 macaddr |= (u64)dev->dev_addr[i] << ((5 - i) * 8);
 100
 101         mace->eth.mac_addr = macaddr;
 102 }
 103
 104 /*
 105  * Waits for BUSY status of mdio bus to clear
 106  */
 107 #define WAIT_FOR_PHY(___rval)                                   \
 108         while ((___rval = mace->eth.phy_data) & MDIO_BUSY) {    \
 109                 udelay(25);                                     \
 110         }
 111 /*read phy register, return value read */
 112 static unsigned long mdio_read(struct meth_private *priv, unsigned long phyreg)
 113 {
 114         unsigned long rval;
 115         WAIT_FOR_PHY(rval);
 116         mace->eth.phy_regs = (priv->phy_addr << 5) | (phyreg & 0x1f);
 117         udelay(25);
 118         mace->eth.phy_trans_go = 1;
 119         udelay(25);
 120         WAIT_FOR_PHY(rval);
 121         return rval & MDIO_DATA_MASK;
 122 }
 123
 124 static int mdio_probe(struct meth_private *priv)
 125 {
 126         int i;
 127         unsigned long p2, p3, flags;
 128         /* check if phy is detected already */
 129         if(priv->phy_addr>=0&&priv->phy_addr<32)
 130                 return 0;
 131         spin_lock_irqsave(&priv->meth_lock, flags);
 132         for (i=0;i<32;++i){
 133                 priv->phy_addr=i;
 134                 p2=mdio_read(priv,2);
 135                 p3=mdio_read(priv,3);
 136 #if MFE_DEBUG>=2
 137                 switch ((p2<<12)|(p3>>4)){
 138                 case PHY_QS6612X:
 139                         DPRINTK("PHY is QS6612X\n");
 140                         break;
 141                 case PHY_ICS1889:
 142                         DPRINTK("PHY is ICS1889\n");
 143                         break;
 144                 case PHY_ICS1890:
 145                         DPRINTK("PHY is ICS1890\n");
 146                         break;
 147                 case PHY_DP83840:
 148                         DPRINTK("PHY is DP83840\n");
 149                         break;
 150                 }
 151 #endif
 152                 if(p2!=0xffff&&p2!=0x0000){
 153                         DPRINTK("PHY code: %x\n",(p2<<12)|(p3>>4));
 154                         break;
 155                 }
 156         }
 157         spin_unlock_irqrestore(&priv->meth_lock, flags);
 158         if(priv->phy_addr<32) {
 159                 return 0;
 160         }
 161         DPRINTK("Oopsie! PHY is not known!\n");
 162         priv->phy_addr=-1;
 163         return -ENODEV;
 164 }
 165
 166 static void meth_check_link(struct net_device *dev)
 167 {
 168         struct meth_private *priv = netdev_priv(dev);
 169         unsigned long mii_advertising = mdio_read(priv, 4);
 170         unsigned long mii_partner = mdio_read(priv, 5);
 171         unsigned long negotiated = mii_advertising & mii_partner;
 172         unsigned long duplex, speed;
 173
 174         if (mii_partner == 0xffff)
 175                 return;
 176
 177         speed = (negotiated & 0x0380) ? METH_100MBIT : 0;
 178         duplex = ((negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040) ?
 179                  METH_PHY_FDX : 0;
 180
 181         if ((priv->mac_ctrl & METH_PHY_FDX) ^ duplex) {
 182                 DPRINTK("Setting %s-duplex\n", duplex ? "full" : "half");
 183                 if (duplex)
 184                         priv->mac_ctrl |= METH_PHY_FDX;
 185                 else
 186                         priv->mac_ctrl &= ~METH_PHY_FDX;
 187                 mace->eth.mac_ctrl = priv->mac_ctrl;
 188         }
 189
 190         if ((priv->mac_ctrl & METH_100MBIT) ^ speed) {
 191                 DPRINTK("Setting %dMbs mode\n", speed ? 100 : 10);
 192                 if (duplex)
 193                         priv->mac_ctrl |= METH_100MBIT;
 194                 else
 195                         priv->mac_ctrl &= ~METH_100MBIT;
 196                 mace->eth.mac_ctrl = priv->mac_ctrl;
 197         }
 198 }
 199
 200
 201 static int meth_init_tx_ring(struct meth_private *priv)
 202 {
 203         /* Init TX ring */
 204         priv->tx_ring = dma_alloc_coherent(NULL, TX_RING_BUFFER_SIZE,
 205                                            &priv->tx_ring_dma, GFP_ATOMIC);
 206         if (!priv->tx_ring)
 207                 return -ENOMEM;
 208         memset(priv->tx_ring, 0, TX_RING_BUFFER_SIZE);
 209         priv->tx_count = priv->tx_read = priv->tx_write = 0;
 210         mace->eth.tx_ring_base = priv->tx_ring_dma;
 211         /* Now init skb save area */
 212         memset(priv->tx_skbs, 0, sizeof(priv->tx_skbs));
 213         memset(priv->tx_skb_dmas, 0, sizeof(priv->tx_skb_dmas));
 214         return 0;
 215 }
 216
 217 static int meth_init_rx_ring(struct meth_private *priv)
 218 {
 219         int i;
 220
 221         for (i = 0; i < RX_RING_ENTRIES; i++) {
 222                 priv->rx_skbs[i] = alloc_skb(METH_RX_BUFF_SIZE, 0);
 223                 /* 8byte status vector + 3quad padding + 2byte padding,
 224                  * to put data on 64bit aligned boundary */
 225                 skb_reserve(priv->rx_skbs[i],METH_RX_HEAD);
 226                 priv->rx_ring[i]=(rx_packet*)(priv->rx_skbs[i]->head);
 227                 /* I'll need to re-sync it after each RX */
 228                 priv->rx_ring_dmas[i] =
 229                         dma_map_single(NULL, priv->rx_ring[i],
 230                                        METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 231                 mace->eth.rx_fifo = priv->rx_ring_dmas[i];
 232         }
 233         priv->rx_write = 0;
 234         return 0;
 235 }
 236 static void meth_free_tx_ring(struct meth_private *priv)
 237 {
 238         int i;
 239
 240         /* Remove any pending skb */
 241         for (i = 0; i < TX_RING_ENTRIES; i++) {
 242                 if (priv->tx_skbs[i])
 243                         dev_kfree_skb(priv->tx_skbs[i]);
 244                 priv->tx_skbs[i] = NULL;
 245         }
 246         dma_free_coherent(NULL, TX_RING_BUFFER_SIZE, priv->tx_ring,
 247                           priv->tx_ring_dma);
 248 }
 249
 250 /* Presumes RX DMA engine is stopped, and RX fifo ring is reset */
 251 static void meth_free_rx_ring(struct meth_private *priv)
 252 {
 253         int i;
 254
 255         for (i = 0; i < RX_RING_ENTRIES; i++) {
 256                 dma_unmap_single(NULL, priv->rx_ring_dmas[i],
 257                                  METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 258                 priv->rx_ring[i] = 0;
 259                 priv->rx_ring_dmas[i] = 0;
 260                 kfree_skb(priv->rx_skbs[i]);
 261         }
 262 }
 263
 264 int meth_reset(struct net_device *dev)
 265 {
 266         struct meth_private *priv = netdev_priv(dev);
 267
 268         /* Reset card */
 269         mace->eth.mac_ctrl = SGI_MAC_RESET;
 270         udelay(1);
 271         mace->eth.mac_ctrl = 0;
 272         udelay(25);
 273
 274         /* Load ethernet address */
 275         load_eaddr(dev);
 276         /* Should load some "errata", but later */
 277
 278         /* Check for device */
 279         if (mdio_probe(priv) < 0) {
 280                 DPRINTK("Unable to find PHY\n");
 281                 return -ENODEV;
 282         }
 283
 284         /* Initial mode: 10 | Half-duplex | Accept normal packets */
 285         priv->mac_ctrl = METH_ACCEPT_MCAST | METH_DEFAULT_IPG;
 286         if (dev->flags & IFF_PROMISC)
 287                 priv->mac_ctrl |= METH_PROMISC;
 288         mace->eth.mac_ctrl = priv->mac_ctrl;
 289
 290         /* Autonegotiate speed and duplex mode */
 291         meth_check_link(dev);
 292
 293         /* Now set dma control, but don't enable DMA, yet */
 294         priv->dma_ctrl = (4 << METH_RX_OFFSET_SHIFT) |
 295                          (RX_RING_ENTRIES << METH_RX_DEPTH_SHIFT);
 296         mace->eth.dma_ctrl = priv->dma_ctrl;
 297
 298         return 0;
 299 }
 300
 301 /*============End Helper Routines=====================*/
 302
 303 /*
 304  * Open and close
 305  */
 306 static int meth_open(struct net_device *dev)
 307 {
 308         struct meth_private *priv = netdev_priv(dev);
 309         int ret;
 310
 311         priv->phy_addr = -1;    /* No PHY is known yet... */
 312
 313         /* Initialize the hardware */
 314         ret = meth_reset(dev);
 315         if (ret < 0)
 316                 return ret;
 317
 318         /* Allocate the ring buffers */
 319         ret = meth_init_tx_ring(priv);
 320         if (ret < 0)
 321                 return ret;
 322         ret = meth_init_rx_ring(priv);
 323         if (ret < 0)
 324                 goto out_free_tx_ring;
 325
 326         ret = request_irq(dev->irq, meth_interrupt, 0, meth_str, dev);
 327         if (ret) {
 328                 printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq);
 329                 goto out_free_rx_ring;
 330         }
 331
 332         /* Start DMA */
 333         priv->dma_ctrl |= METH_DMA_TX_EN | /*METH_DMA_TX_INT_EN |*/
 334                           METH_DMA_RX_EN | METH_DMA_RX_INT_EN;
 335         mace->eth.dma_ctrl = priv->dma_ctrl;
 336
 337         DPRINTK("About to start queue\n");
 338         netif_start_queue(dev);
 339
 340         return 0;
 341
 342 out_free_rx_ring:
 343         meth_free_rx_ring(priv);
 344 out_free_tx_ring:
 345         meth_free_tx_ring(priv);
 346
 347         return ret;
 348 }
 349
 350 static int meth_release(struct net_device *dev)
 351 {
 352         struct meth_private *priv = netdev_priv(dev);
 353
 354         DPRINTK("Stopping queue\n");
 355         netif_stop_queue(dev); /* can't transmit any more */
 356         /* shut down DMA */
 357         priv->dma_ctrl &= ~(METH_DMA_TX_EN | METH_DMA_TX_INT_EN |
 358                             METH_DMA_RX_EN | METH_DMA_RX_INT_EN);
 359         mace->eth.dma_ctrl = priv->dma_ctrl;
 360         free_irq(dev->irq, dev);
 361         meth_free_tx_ring(priv);
 362         meth_free_rx_ring(priv);
 363
 364         return 0;
 365 }
 366
 367 /*
 368  * Receive a packet: retrieve, encapsulate and pass over to upper levels
 369  */
 370 static void meth_rx(struct net_device* dev, unsigned long int_status)
 371 {
 372         struct sk_buff *skb;
 373         unsigned long status, flags;
 374         struct meth_private *priv = netdev_priv(dev);
 375         unsigned long fifo_rptr = (int_status & METH_INT_RX_RPTR_MASK) >> 8;
 376
 377         spin_lock_irqsave(&priv->meth_lock, flags);
 378         priv->dma_ctrl &= ~METH_DMA_RX_INT_EN;
 379         mace->eth.dma_ctrl = priv->dma_ctrl;
 380         spin_unlock_irqrestore(&priv->meth_lock, flags);
 381
 382         if (int_status & METH_INT_RX_UNDERFLOW) {
 383                 fifo_rptr = (fifo_rptr - 1) & 0x0f;
 384         }
 385         while (priv->rx_write != fifo_rptr) {
 386                 dma_unmap_single(NULL, priv->rx_ring_dmas[priv->rx_write],
 387                                  METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 388                 status = priv->rx_ring[priv->rx_write]->status.raw;
 389 #if MFE_DEBUG
 390                 if (!(status & METH_RX_ST_VALID)) {
 391                         DPRINTK("Not received? status=%016lx\n",status);
 392                 }
 393 #endif
 394                 if ((!(status & METH_RX_STATUS_ERRORS)) && (status & METH_RX_ST_VALID)) {
 395                         int len = (status & 0xffff) - 4; /* omit CRC */
 396                         /* length sanity check */
 397                         if (len < 60 || len > 1518) {
 398                                 printk(KERN_DEBUG "%s: bogus packet size: %ld, status=%#2Lx.\n",
 399                                        dev->name, priv->rx_write,
 400                                        priv->rx_ring[priv->rx_write]->status.raw);
 401                                 dev->stats.rx_errors++;
 402                                 dev->stats.rx_length_errors++;
 403                                 skb = priv->rx_skbs[priv->rx_write];
 404                         } else {
 405                                 skb = alloc_skb(METH_RX_BUFF_SIZE, GFP_ATOMIC);
 406                                 if (!skb) {
 407                                         /* Ouch! No memory! Drop packet on the floor */
 408                                         DPRINTK("No mem: dropping packet\n");
 409                                         dev->stats.rx_dropped++;
 410                                         skb = priv->rx_skbs[priv->rx_write];
 411                                 } else {
 412                                         struct sk_buff *skb_c = priv->rx_skbs[priv->rx_write];
 413                                         /* 8byte status vector + 3quad padding + 2byte padding,
 414                                          * to put data on 64bit aligned boundary */
 415                                         skb_reserve(skb, METH_RX_HEAD);
 416                                         /* Write metadata, and then pass to the receive level */
 417                                         skb_put(skb_c, len);
 418                                         priv->rx_skbs[priv->rx_write] = skb;
 419                                         skb_c->protocol = eth_type_trans(skb_c, dev);
 420                                         dev->stats.rx_packets++;
 421                                         dev->stats.rx_bytes += len;
 422                                         netif_rx(skb_c);
 423                                 }
 424                         }
 425                 } else {
 426                         dev->stats.rx_errors++;
 427                         skb=priv->rx_skbs[priv->rx_write];
 428 #if MFE_DEBUG>0
 429                         printk(KERN_WARNING "meth: RX error: status=0x%016lx\n",status);
 430                         if(status&METH_RX_ST_RCV_CODE_VIOLATION)
 431                                 printk(KERN_WARNING "Receive Code Violation\n");
 432                         if(status&METH_RX_ST_CRC_ERR)
 433                                 printk(KERN_WARNING "CRC error\n");
 434                         if(status&METH_RX_ST_INV_PREAMBLE_CTX)
 435                                 printk(KERN_WARNING "Invalid Preamble Context\n");
 436                         if(status&METH_RX_ST_LONG_EVT_SEEN)
 437                                 printk(KERN_WARNING "Long Event Seen...\n");
 438                         if(status&METH_RX_ST_BAD_PACKET)
 439                                 printk(KERN_WARNING "Bad Packet\n");
 440                         if(status&METH_RX_ST_CARRIER_EVT_SEEN)
 441                                 printk(KERN_WARNING "Carrier Event Seen\n");
 442 #endif
 443                 }
 444                 priv->rx_ring[priv->rx_write] = (rx_packet*)skb->head;
 445                 priv->rx_ring[priv->rx_write]->status.raw = 0;
 446                 priv->rx_ring_dmas[priv->rx_write] =
 447                         dma_map_single(NULL, priv->rx_ring[priv->rx_write],
 448                                        METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 449                 mace->eth.rx_fifo = priv->rx_ring_dmas[priv->rx_write];
 450                 ADVANCE_RX_PTR(priv->rx_write);
 451         }
 452         spin_lock_irqsave(&priv->meth_lock, flags);
 453         /* In case there was underflow, and Rx DMA was disabled */
 454         priv->dma_ctrl |= METH_DMA_RX_INT_EN | METH_DMA_RX_EN;
 455         mace->eth.dma_ctrl = priv->dma_ctrl;
 456         mace->eth.int_stat = METH_INT_RX_THRESHOLD;
 457         spin_unlock_irqrestore(&priv->meth_lock, flags);
 458 }
 459
 460 static int meth_tx_full(struct net_device *dev)
 461 {
 462         struct meth_private *priv = netdev_priv(dev);
 463
 464         return (priv->tx_count >= TX_RING_ENTRIES - 1);
 465 }
 466
 467 static void meth_tx_cleanup(struct net_device* dev, unsigned long int_status)
 468 {
 469         struct meth_private *priv = netdev_priv(dev);
 470         unsigned long status, flags;
 471         struct sk_buff *skb;
 472         unsigned long rptr = (int_status&TX_INFO_RPTR) >> 16;
 473
 474         spin_lock_irqsave(&priv->meth_lock, flags);
 475
 476         /* Stop DMA notification */
 477         priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN);
 478         mace->eth.dma_ctrl = priv->dma_ctrl;
 479
 480         while (priv->tx_read != rptr) {
 481                 skb = priv->tx_skbs[priv->tx_read];
 482                 status = priv->tx_ring[priv->tx_read].header.raw;
 483 #if MFE_DEBUG>=1
 484                 if (priv->tx_read == priv->tx_write)
 485                         DPRINTK("Auchi! tx_read=%d,tx_write=%d,rptr=%d?\n", priv->tx_read, priv->tx_write,rptr);
 486 #endif
 487                 if (status & METH_TX_ST_DONE) {
 488                         if (status & METH_TX_ST_SUCCESS){
 489                                 dev->stats.tx_packets++;
 490                                 dev->stats.tx_bytes += skb->len;
 491                         } else {
 492                                 dev->stats.tx_errors++;
 493 #if MFE_DEBUG>=1
 494                                 DPRINTK("TX error: status=%016lx <",status);
 495                                 if(status & METH_TX_ST_SUCCESS)
 496                                         printk(" SUCCESS");
 497                                 if(status & METH_TX_ST_TOOLONG)
 498                                         printk(" TOOLONG");
 499                                 if(status & METH_TX_ST_UNDERRUN)
 500                                         printk(" UNDERRUN");
 501                                 if(status & METH_TX_ST_EXCCOLL)
 502                                         printk(" EXCCOLL");
 503                                 if(status & METH_TX_ST_DEFER)
 504                                         printk(" DEFER");
 505                                 if(status & METH_TX_ST_LATECOLL)
 506                                         printk(" LATECOLL");
 507                                 printk(" >\n");
 508 #endif
 509                         }
 510                 } else {
 511                         DPRINTK("RPTR points us here, but packet not done?\n");
 512                         break;
 513                 }
 514                 dev_kfree_skb_irq(skb);
 515                 priv->tx_skbs[priv->tx_read] = NULL;
 516                 priv->tx_ring[priv->tx_read].header.raw = 0;
 517                 priv->tx_read = (priv->tx_read+1)&(TX_RING_ENTRIES-1);
 518                 priv->tx_count--;
 519         }
 520
 521         /* wake up queue if it was stopped */
 522         if (netif_queue_stopped(dev) && !meth_tx_full(dev)) {
 523                 netif_wake_queue(dev);
 524         }
 525
 526         mace->eth.int_stat = METH_INT_TX_EMPTY | METH_INT_TX_PKT;
 527         spin_unlock_irqrestore(&priv->meth_lock, flags);
 528 }
 529
 530 static void meth_error(struct net_device* dev, unsigned status)
 531 {
 532         struct meth_private *priv = netdev_priv(dev);
 533         unsigned long flags;
 534
 535         printk(KERN_WARNING "meth: error status: 0x%08x\n",status);
 536         /* check for errors too... */
 537         if (status & (METH_INT_TX_LINK_FAIL))
 538                 printk(KERN_WARNING "meth: link failure\n");
 539         /* Should I do full reset in this case? */
 540         if (status & (METH_INT_MEM_ERROR))
 541                 printk(KERN_WARNING "meth: memory error\n");
 542         if (status & (METH_INT_TX_ABORT))
 543                 printk(KERN_WARNING "meth: aborted\n");
 544         if (status & (METH_INT_RX_OVERFLOW))
 545                 printk(KERN_WARNING "meth: Rx overflow\n");
 546         if (status & (METH_INT_RX_UNDERFLOW)) {
 547                 printk(KERN_WARNING "meth: Rx underflow\n");
 548                 spin_lock_irqsave(&priv->meth_lock, flags);
 549                 mace->eth.int_stat = METH_INT_RX_UNDERFLOW;
 550                 /* more underflow interrupts will be delivered,
 551                  * effectively throwing us into an infinite loop.
 552                  *  Thus I stop processing Rx in this case. */
 553                 priv->dma_ctrl &= ~METH_DMA_RX_EN;
 554                 mace->eth.dma_ctrl = priv->dma_ctrl;
 555                 DPRINTK("Disabled meth Rx DMA temporarily\n");
 556                 spin_unlock_irqrestore(&priv->meth_lock, flags);
 557         }
 558         mace->eth.int_stat = METH_INT_ERROR;
 559 }
 560
 561 /*
 562  * The typical interrupt entry point
 563  */
 564 static irqreturn_t meth_interrupt(int irq, void *dev_id)
 565 {
 566         struct net_device *dev = (struct net_device *)dev_id;
 567         struct meth_private *priv = netdev_priv(dev);
 568         unsigned long status;
 569
 570         status = mace->eth.int_stat;
 571         while (status & 0xff) {
 572                 /* First handle errors - if we get Rx underflow,
 573                  * Rx DMA will be disabled, and Rx handler will reenable
 574                  * it. I don't think it's possible to get Rx underflow,
 575                  * without getting Rx interrupt */
 576                 if (status & METH_INT_ERROR) {
 577                         meth_error(dev, status);
 578                 }
 579                 if (status & (METH_INT_TX_EMPTY | METH_INT_TX_PKT)) {
 580                         /* a transmission is over: free the skb */
 581                         meth_tx_cleanup(dev, status);
 582                 }
 583                 if (status & METH_INT_RX_THRESHOLD) {
 584                         if (!(priv->dma_ctrl & METH_DMA_RX_INT_EN))
 585                                 break;
 586                         /* send it to meth_rx for handling */
 587                         meth_rx(dev, status);
 588                 }
 589                 status = mace->eth.int_stat;
 590         }
 591
 592         return IRQ_HANDLED;
 593 }
 594
 595 /*
 596  * Transmits packets that fit into TX descriptor (are <=120B)
 597  */
 598 static void meth_tx_short_prepare(struct meth_private *priv,
 599                                   struct sk_buff *skb)
 600 {
 601         tx_packet *desc = &priv->tx_ring[priv->tx_write];
 602         int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
 603
 604         desc->header.raw = METH_TX_CMD_INT_EN | (len-1) | ((128-len) << 16);
 605         /* maybe I should set whole thing to 0 first... */
 606         skb_copy_from_linear_data(skb, desc->data.dt + (120 - len), skb->len);
 607         if (skb->len < len)
 608                 memset(desc->data.dt + 120 - len + skb->len, 0, len-skb->len);
 609 }
 610 #define TX_CATBUF1 BIT(25)
 611 static void meth_tx_1page_prepare(struct meth_private *priv,
 612                                   struct sk_buff *skb)
 613 {
 614         tx_packet *desc = &priv->tx_ring[priv->tx_write];
 615         void *buffer_data = (void *)(((unsigned long)skb->data + 7) & ~7);
 616         int unaligned_len = (int)((unsigned long)buffer_data - (unsigned long)skb->data);
 617         int buffer_len = skb->len - unaligned_len;
 618         dma_addr_t catbuf;
 619
 620         desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | (skb->len - 1);
 621
 622         /* unaligned part */
 623         if (unaligned_len) {
 624                 skb_copy_from_linear_data(skb, desc->data.dt + (120 - unaligned_len),
 625                               unaligned_len);
 626                 desc->header.raw |= (128 - unaligned_len) << 16;
 627         }
 628
 629         /* first page */
 630         catbuf = dma_map_single(NULL, buffer_data, buffer_len,
 631                                 DMA_TO_DEVICE);
 632         desc->data.cat_buf[0].form.start_addr = catbuf >> 3;
 633         desc->data.cat_buf[0].form.len = buffer_len - 1;
 634 }
 635 #define TX_CATBUF2 BIT(26)
 636 static void meth_tx_2page_prepare(struct meth_private *priv,
 637                                   struct sk_buff *skb)
 638 {
 639         tx_packet *desc = &priv->tx_ring[priv->tx_write];
 640         void *buffer1_data = (void *)(((unsigned long)skb->data + 7) & ~7);
 641         void *buffer2_data = (void *)PAGE_ALIGN((unsigned long)skb->data);
 642         int unaligned_len = (int)((unsigned long)buffer1_data - (unsigned long)skb->data);
 643         int buffer1_len = (int)((unsigned long)buffer2_data - (unsigned long)buffer1_data);
 644         int buffer2_len = skb->len - buffer1_len - unaligned_len;
 645         dma_addr_t catbuf1, catbuf2;
 646
 647         desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | TX_CATBUF2| (skb->len - 1);
 648         /* unaligned part */
 649         if (unaligned_len){
 650                 skb_copy_from_linear_data(skb, desc->data.dt + (120 - unaligned_len),
 651                               unaligned_len);
 652                 desc->header.raw |= (128 - unaligned_len) << 16;
 653         }
 654
 655         /* first page */
 656         catbuf1 = dma_map_single(NULL, buffer1_data, buffer1_len,
 657                                  DMA_TO_DEVICE);
 658         desc->data.cat_buf[0].form.start_addr = catbuf1 >> 3;
 659         desc->data.cat_buf[0].form.len = buffer1_len - 1;
 660         /* second page */
 661         catbuf2 = dma_map_single(NULL, buffer2_data, buffer2_len,
 662                                  DMA_TO_DEVICE);
 663         desc->data.cat_buf[1].form.start_addr = catbuf2 >> 3;
 664         desc->data.cat_buf[1].form.len = buffer2_len - 1;
 665 }
 666
 667 static void meth_add_to_tx_ring(struct meth_private *priv, struct sk_buff *skb)
 668 {
 669         /* Remember the skb, so we can free it at interrupt time */
 670         priv->tx_skbs[priv->tx_write] = skb;
 671         if (skb->len <= 120) {
 672                 /* Whole packet fits into descriptor */
 673                 meth_tx_short_prepare(priv, skb);
 674         } else if (PAGE_ALIGN((unsigned long)skb->data) !=
 675                    PAGE_ALIGN((unsigned long)skb->data + skb->len - 1)) {
 676                 /* Packet crosses page boundary */
 677                 meth_tx_2page_prepare(priv, skb);
 678         } else {
 679                 /* Packet is in one page */
 680                 meth_tx_1page_prepare(priv, skb);
 681         }
 682         priv->tx_write = (priv->tx_write + 1) & (TX_RING_ENTRIES - 1);
 683         mace->eth.tx_info = priv->tx_write;
 684         priv->tx_count++;
 685 }
 686
 687 /*
 688  * Transmit a packet (called by the kernel)
 689  */
 690 static int meth_tx(struct sk_buff *skb, struct net_device *dev)
 691 {
 692         struct meth_private *priv = netdev_priv(dev);
 693         unsigned long flags;
 694
 695         spin_lock_irqsave(&priv->meth_lock, flags);
 696         /* Stop DMA notification */
 697         priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN);
 698         mace->eth.dma_ctrl = priv->dma_ctrl;
 699
 700         meth_add_to_tx_ring(priv, skb);
 701         dev->trans_start = jiffies; /* save the timestamp */
 702
 703         /* If TX ring is full, tell the upper layer to stop sending packets */
 704         if (meth_tx_full(dev)) {
 705                 printk(KERN_DEBUG "TX full: stopping\n");
 706                 netif_stop_queue(dev);
 707         }
 708
 709         /* Restart DMA notification */
 710         priv->dma_ctrl |= METH_DMA_TX_INT_EN;
 711         mace->eth.dma_ctrl = priv->dma_ctrl;
 712
 713         spin_unlock_irqrestore(&priv->meth_lock, flags);
 714
 715         return NETDEV_TX_OK;
 716 }
 717
 718 /*
 719  * Deal with a transmit timeout.
 720  */
 721 static void meth_tx_timeout(struct net_device *dev)
 722 {
 723         struct meth_private *priv = netdev_priv(dev);
 724         unsigned long flags;
 725
 726         printk(KERN_WARNING "%s: transmit timed out\n", dev->name);
 727
 728         /* Protect against concurrent rx interrupts */
 729         spin_lock_irqsave(&priv->meth_lock,flags);
 730
 731         /* Try to reset the interface. */
 732         meth_reset(dev);
 733
 734         dev->stats.tx_errors++;
 735
 736         /* Clear all rings */
 737         meth_free_tx_ring(priv);
 738         meth_free_rx_ring(priv);
 739         meth_init_tx_ring(priv);
 740         meth_init_rx_ring(priv);
 741
 742         /* Restart dma */
 743         priv->dma_ctrl |= METH_DMA_TX_EN | METH_DMA_RX_EN | METH_DMA_RX_INT_EN;
 744         mace->eth.dma_ctrl = priv->dma_ctrl;
 745
 746         /* Enable interrupt */
 747         spin_unlock_irqrestore(&priv->meth_lock, flags);
 748
 749         dev->trans_start = jiffies; /* prevent tx timeout */
 750         netif_wake_queue(dev);
 751 }
 752
 753 /*
 754  * Ioctl commands
 755  */
 756 static int meth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 757 {
 758         /* XXX Not yet implemented */
 759         switch(cmd) {
 760         case SIOCGMIIPHY:
 761         case SIOCGMIIREG:
 762         case SIOCSMIIREG:
 763         default:
 764                 return -EOPNOTSUPP;
 765         }
 766 }
 767
 768 static const struct net_device_ops meth_netdev_ops = {
 769         .ndo_open               = meth_open,
 770         .ndo_stop               = meth_release,
 771         .ndo_start_xmit         = meth_tx,
 772         .ndo_do_ioctl           = meth_ioctl,
 773         .ndo_tx_timeout         = meth_tx_timeout,
 774         .ndo_change_mtu         = eth_change_mtu,
 775         .ndo_validate_addr      = eth_validate_addr,
 776         .ndo_set_mac_address    = eth_mac_addr,
 777 };
 778
 779 /*
 780  * The init function.
 781  */
 782 static int __devinit meth_probe(struct platform_device *pdev)
 783 {
 784         struct net_device *dev;
 785         struct meth_private *priv;
 786         int err;
 787
 788         dev = alloc_etherdev(sizeof(struct meth_private));
 789         if (!dev)
 790                 return -ENOMEM;
 791
 792         dev->netdev_ops         = &meth_netdev_ops;
 793         dev->watchdog_timeo     = timeout;
 794         dev->irq                = MACE_ETHERNET_IRQ;
 795         dev->base_addr          = (unsigned long)&mace->eth;
 796         memcpy(dev->dev_addr, o2meth_eaddr, 6);
 797
 798         priv = netdev_priv(dev);
 799         spin_lock_init(&priv->meth_lock);
 800         SET_NETDEV_DEV(dev, &pdev->dev);
 801
 802         err = register_netdev(dev);
 803         if (err) {
 804                 free_netdev(dev);
 805                 return err;
 806         }
 807
 808         printk(KERN_INFO "%s: SGI MACE Ethernet rev. %d\n",
 809                dev->name, (unsigned int)(mace->eth.mac_ctrl >> 29));
 810         return 0;
 811 }
 812
 813 static int __exit meth_remove(struct platform_device *pdev)
 814 {
 815         struct net_device *dev = platform_get_drvdata(pdev);
 816
 817         unregister_netdev(dev);
 818         free_netdev(dev);
 819         platform_set_drvdata(pdev, NULL);
 820
 821         return 0;
 822 }
 823
 824 static struct platform_driver meth_driver = {
 825         .probe  = meth_probe,
 826         .remove = __exit_p(meth_remove),
 827         .driver = {
 828                 .name   = "meth",
 829                 .owner  = THIS_MODULE,
 830         }
 831 };
 832
 833 static int __init meth_init_module(void)
 834 {
 835         int err;
 836
 837         err = platform_driver_register(&meth_driver);
 838         if (err)
 839                 printk(KERN_ERR "Driver registration failed\n");
 840
 841         return err;
 842 }
 843
 844 static void __exit meth_exit_module(void)
 845 {
 846         platform_driver_unregister(&meth_driver);
 847 }
 848
 849 module_init(meth_init_module);
 850 module_exit(meth_exit_module);
 851
 852 MODULE_AUTHOR("Ilya Volynets <ilya@theIlya.com>");
 853 MODULE_DESCRIPTION("SGI O2 Builtin Fast Ethernet driver");
 854 MODULE_LICENSE("GPL");
 855 MODULE_ALIAS("platform:meth");