2 * Driver for the IDT RC32434 (Korina) on-chip ethernet controller.
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Felix Fietkau <nbd@openwrt.org>
6 * Copyright 2008 Florian Fainelli <florian@openwrt.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 * Writing to a DMA status register:
30 * When writing to the status register, you should mask the bit you have
31 * been testing the status register with. Both Tx and Rx DMA registers
32 * should stick to this procedure.
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/moduleparam.h>
38 #include <linux/sched.h>
39 #include <linux/ctype.h>
40 #include <linux/types.h>
41 #include <linux/interrupt.h>
42 #include <linux/init.h>
43 #include <linux/ioport.h>
45 #include <linux/slab.h>
46 #include <linux/string.h>
47 #include <linux/delay.h>
48 #include <linux/netdevice.h>
49 #include <linux/etherdevice.h>
50 #include <linux/skbuff.h>
51 #include <linux/errno.h>
52 #include <linux/platform_device.h>
53 #include <linux/mii.h>
54 #include <linux/ethtool.h>
55 #include <linux/crc32.h>
57 #include <asm/bootinfo.h>
58 #include <asm/system.h>
59 #include <asm/bitops.h>
60 #include <asm/pgtable.h>
61 #include <asm/segment.h>
65 #include <asm/mach-rc32434/rb.h>
66 #include <asm/mach-rc32434/rc32434.h>
67 #include <asm/mach-rc32434/eth.h>
68 #include <asm/mach-rc32434/dma_v.h>
70 #define DRV_NAME "korina"
71 #define DRV_VERSION "0.10"
72 #define DRV_RELDATE "04Mar2008"
74 #define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \
76 #define STATION_ADDRESS_LOW(dev) (((dev)->dev_addr[2] << 24) | \
77 ((dev)->dev_addr[3] << 16) | \
78 ((dev)->dev_addr[4] << 8) | \
81 #define MII_CLOCK 1250000 /* no more than 2.5MHz */
83 /* the following must be powers of two */
84 #define KORINA_NUM_RDS 64 /* number of receive descriptors */
85 #define KORINA_NUM_TDS 64 /* number of transmit descriptors */
87 /* KORINA_RBSIZE is the hardware's default maximum receive
88 * frame size in bytes. Having this hardcoded means that there
89 * is no support for MTU sizes greater than 1500. */
90 #define KORINA_RBSIZE 1536 /* size of one resource buffer = Ether MTU */
91 #define KORINA_RDS_MASK (KORINA_NUM_RDS - 1)
92 #define KORINA_TDS_MASK (KORINA_NUM_TDS - 1)
93 #define RD_RING_SIZE (KORINA_NUM_RDS * sizeof(struct dma_desc))
94 #define TD_RING_SIZE (KORINA_NUM_TDS * sizeof(struct dma_desc))
96 #define TX_TIMEOUT (6000 * HZ / 1000)
98 enum chain_status
{ desc_filled
, desc_empty
};
99 #define IS_DMA_FINISHED(X) (((X) & (DMA_DESC_FINI)) != 0)
100 #define IS_DMA_DONE(X) (((X) & (DMA_DESC_DONE)) != 0)
101 #define RCVPKT_LENGTH(X) (((X) & ETH_RX_LEN) >> ETH_RX_LEN_BIT)
103 /* Information that need to be kept for each board. */
104 struct korina_private
{
105 struct eth_regs
*eth_regs
;
106 struct dma_reg
*rx_dma_regs
;
107 struct dma_reg
*tx_dma_regs
;
108 struct dma_desc
*td_ring
; /* transmit descriptor ring */
109 struct dma_desc
*rd_ring
; /* receive descriptor ring */
111 struct sk_buff
*tx_skb
[KORINA_NUM_TDS
];
112 struct sk_buff
*rx_skb
[KORINA_NUM_RDS
];
117 enum chain_status rx_chain_status
;
122 enum chain_status tx_chain_status
;
131 spinlock_t lock
; /* NIC xmit lock */
135 struct napi_struct napi
;
136 struct timer_list media_check_timer
;
137 struct mii_if_info mii_if
;
138 struct net_device
*dev
;
142 extern unsigned int idt_cpu_freq
;
144 static inline void korina_start_dma(struct dma_reg
*ch
, u32 dma_addr
)
146 writel(0, &ch
->dmandptr
);
147 writel(dma_addr
, &ch
->dmadptr
);
150 static inline void korina_abort_dma(struct net_device
*dev
,
153 if (readl(&ch
->dmac
) & DMA_CHAN_RUN_BIT
) {
154 writel(0x10, &ch
->dmac
);
156 while (!(readl(&ch
->dmas
) & DMA_STAT_HALT
))
157 dev
->trans_start
= jiffies
;
159 writel(0, &ch
->dmas
);
162 writel(0, &ch
->dmadptr
);
163 writel(0, &ch
->dmandptr
);
166 static inline void korina_chain_dma(struct dma_reg
*ch
, u32 dma_addr
)
168 writel(dma_addr
, &ch
->dmandptr
);
171 static void korina_abort_tx(struct net_device
*dev
)
173 struct korina_private
*lp
= netdev_priv(dev
);
175 korina_abort_dma(dev
, lp
->tx_dma_regs
);
178 static void korina_abort_rx(struct net_device
*dev
)
180 struct korina_private
*lp
= netdev_priv(dev
);
182 korina_abort_dma(dev
, lp
->rx_dma_regs
);
185 static void korina_start_rx(struct korina_private
*lp
,
188 korina_start_dma(lp
->rx_dma_regs
, CPHYSADDR(rd
));
191 static void korina_chain_rx(struct korina_private
*lp
,
194 korina_chain_dma(lp
->rx_dma_regs
, CPHYSADDR(rd
));
197 /* transmit packet */
198 static int korina_send_packet(struct sk_buff
*skb
, struct net_device
*dev
)
200 struct korina_private
*lp
= netdev_priv(dev
);
203 u32 chain_prev
, chain_next
;
206 spin_lock_irqsave(&lp
->lock
, flags
);
208 td
= &lp
->td_ring
[lp
->tx_chain_tail
];
210 /* stop queue when full, drop pkts if queue already full */
211 if (lp
->tx_count
>= (KORINA_NUM_TDS
- 2)) {
214 if (lp
->tx_count
== (KORINA_NUM_TDS
- 2))
215 netif_stop_queue(dev
);
217 dev
->stats
.tx_dropped
++;
218 dev_kfree_skb_any(skb
);
219 spin_unlock_irqrestore(&lp
->lock
, flags
);
221 return NETDEV_TX_BUSY
;
227 lp
->tx_skb
[lp
->tx_chain_tail
] = skb
;
230 dma_cache_wback((u32
)skb
->data
, skb
->len
);
232 /* Setup the transmit descriptor. */
233 dma_cache_inv((u32
) td
, sizeof(*td
));
234 td
->ca
= CPHYSADDR(skb
->data
);
235 chain_prev
= (lp
->tx_chain_tail
- 1) & KORINA_TDS_MASK
;
236 chain_next
= (lp
->tx_chain_tail
+ 1) & KORINA_TDS_MASK
;
238 if (readl(&(lp
->tx_dma_regs
->dmandptr
)) == 0) {
239 if (lp
->tx_chain_status
== desc_empty
) {
241 td
->control
= DMA_COUNT(length
) |
242 DMA_DESC_COF
| DMA_DESC_IOF
;
244 lp
->tx_chain_tail
= chain_next
;
246 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
247 &lp
->tx_dma_regs
->dmandptr
);
248 /* Move head to tail */
249 lp
->tx_chain_head
= lp
->tx_chain_tail
;
252 td
->control
= DMA_COUNT(length
) |
253 DMA_DESC_COF
| DMA_DESC_IOF
;
255 lp
->td_ring
[chain_prev
].control
&=
258 lp
->td_ring
[chain_prev
].link
= CPHYSADDR(td
);
260 lp
->tx_chain_tail
= chain_next
;
262 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
263 &(lp
->tx_dma_regs
->dmandptr
));
264 /* Move head to tail */
265 lp
->tx_chain_head
= lp
->tx_chain_tail
;
266 lp
->tx_chain_status
= desc_empty
;
269 if (lp
->tx_chain_status
== desc_empty
) {
271 td
->control
= DMA_COUNT(length
) |
272 DMA_DESC_COF
| DMA_DESC_IOF
;
274 lp
->tx_chain_tail
= chain_next
;
275 lp
->tx_chain_status
= desc_filled
;
278 td
->control
= DMA_COUNT(length
) |
279 DMA_DESC_COF
| DMA_DESC_IOF
;
280 lp
->td_ring
[chain_prev
].control
&=
282 lp
->td_ring
[chain_prev
].link
= CPHYSADDR(td
);
283 lp
->tx_chain_tail
= chain_next
;
286 dma_cache_wback((u32
) td
, sizeof(*td
));
288 dev
->trans_start
= jiffies
;
289 spin_unlock_irqrestore(&lp
->lock
, flags
);
294 static int mdio_read(struct net_device
*dev
, int mii_id
, int reg
)
296 struct korina_private
*lp
= netdev_priv(dev
);
299 mii_id
= ((lp
->rx_irq
== 0x2c ? 1 : 0) << 8);
301 writel(0, &lp
->eth_regs
->miimcfg
);
302 writel(0, &lp
->eth_regs
->miimcmd
);
303 writel(mii_id
| reg
, &lp
->eth_regs
->miimaddr
);
304 writel(ETH_MII_CMD_SCN
, &lp
->eth_regs
->miimcmd
);
306 ret
= (int)(readl(&lp
->eth_regs
->miimrdd
));
310 static void mdio_write(struct net_device
*dev
, int mii_id
, int reg
, int val
)
312 struct korina_private
*lp
= netdev_priv(dev
);
314 mii_id
= ((lp
->rx_irq
== 0x2c ? 1 : 0) << 8);
316 writel(0, &lp
->eth_regs
->miimcfg
);
317 writel(1, &lp
->eth_regs
->miimcmd
);
318 writel(mii_id
| reg
, &lp
->eth_regs
->miimaddr
);
319 writel(ETH_MII_CMD_SCN
, &lp
->eth_regs
->miimcmd
);
320 writel(val
, &lp
->eth_regs
->miimwtd
);
323 /* Ethernet Rx DMA interrupt */
324 static irqreturn_t
korina_rx_dma_interrupt(int irq
, void *dev_id
)
326 struct net_device
*dev
= dev_id
;
327 struct korina_private
*lp
= netdev_priv(dev
);
331 dmas
= readl(&lp
->rx_dma_regs
->dmas
);
332 if (dmas
& (DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
)) {
333 dmasm
= readl(&lp
->rx_dma_regs
->dmasm
);
334 writel(dmasm
| (DMA_STAT_DONE
|
335 DMA_STAT_HALT
| DMA_STAT_ERR
),
336 &lp
->rx_dma_regs
->dmasm
);
338 napi_schedule(&lp
->napi
);
340 if (dmas
& DMA_STAT_ERR
)
341 printk(KERN_ERR
"%s: DMA error\n", dev
->name
);
343 retval
= IRQ_HANDLED
;
350 static int korina_rx(struct net_device
*dev
, int limit
)
352 struct korina_private
*lp
= netdev_priv(dev
);
353 struct dma_desc
*rd
= &lp
->rd_ring
[lp
->rx_next_done
];
354 struct sk_buff
*skb
, *skb_new
;
356 u32 devcs
, pkt_len
, dmas
;
359 dma_cache_inv((u32
)rd
, sizeof(*rd
));
361 for (count
= 0; count
< limit
; count
++) {
362 skb
= lp
->rx_skb
[lp
->rx_next_done
];
367 if ((KORINA_RBSIZE
- (u32
)DMA_COUNT(rd
->control
)) == 0)
370 /* Update statistics counters */
371 if (devcs
& ETH_RX_CRC
)
372 dev
->stats
.rx_crc_errors
++;
373 if (devcs
& ETH_RX_LOR
)
374 dev
->stats
.rx_length_errors
++;
375 if (devcs
& ETH_RX_LE
)
376 dev
->stats
.rx_length_errors
++;
377 if (devcs
& ETH_RX_OVR
)
378 dev
->stats
.rx_over_errors
++;
379 if (devcs
& ETH_RX_CV
)
380 dev
->stats
.rx_frame_errors
++;
381 if (devcs
& ETH_RX_CES
)
382 dev
->stats
.rx_length_errors
++;
383 if (devcs
& ETH_RX_MP
)
384 dev
->stats
.multicast
++;
386 if ((devcs
& ETH_RX_LD
) != ETH_RX_LD
) {
387 /* check that this is a whole packet
388 * WARNING: DMA_FD bit incorrectly set
389 * in Rc32434 (errata ref #077) */
390 dev
->stats
.rx_errors
++;
391 dev
->stats
.rx_dropped
++;
392 } else if ((devcs
& ETH_RX_ROK
)) {
393 pkt_len
= RCVPKT_LENGTH(devcs
);
395 /* must be the (first and) last
397 pkt_buf
= (u8
*)lp
->rx_skb
[lp
->rx_next_done
]->data
;
399 /* invalidate the cache */
400 dma_cache_inv((unsigned long)pkt_buf
, pkt_len
- 4);
402 /* Malloc up new buffer. */
403 skb_new
= netdev_alloc_skb(dev
, KORINA_RBSIZE
+ 2);
407 /* Do not count the CRC */
408 skb_put(skb
, pkt_len
- 4);
409 skb
->protocol
= eth_type_trans(skb
, dev
);
411 /* Pass the packet to upper layers */
412 netif_receive_skb(skb
);
413 dev
->stats
.rx_packets
++;
414 dev
->stats
.rx_bytes
+= pkt_len
;
416 /* Update the mcast stats */
417 if (devcs
& ETH_RX_MP
)
418 dev
->stats
.multicast
++;
421 skb_reserve(skb_new
, 2);
423 lp
->rx_skb
[lp
->rx_next_done
] = skb_new
;
428 /* Restore descriptor's curr_addr */
430 rd
->ca
= CPHYSADDR(skb_new
->data
);
432 rd
->ca
= CPHYSADDR(skb
->data
);
434 rd
->control
= DMA_COUNT(KORINA_RBSIZE
) |
435 DMA_DESC_COD
| DMA_DESC_IOD
;
436 lp
->rd_ring
[(lp
->rx_next_done
- 1) &
437 KORINA_RDS_MASK
].control
&=
440 lp
->rx_next_done
= (lp
->rx_next_done
+ 1) & KORINA_RDS_MASK
;
441 dma_cache_wback((u32
)rd
, sizeof(*rd
));
442 rd
= &lp
->rd_ring
[lp
->rx_next_done
];
443 writel(~DMA_STAT_DONE
, &lp
->rx_dma_regs
->dmas
);
446 dmas
= readl(&lp
->rx_dma_regs
->dmas
);
448 if (dmas
& DMA_STAT_HALT
) {
449 writel(~(DMA_STAT_HALT
| DMA_STAT_ERR
),
450 &lp
->rx_dma_regs
->dmas
);
454 skb
= lp
->rx_skb
[lp
->rx_next_done
];
455 rd
->ca
= CPHYSADDR(skb
->data
);
456 dma_cache_wback((u32
)rd
, sizeof(*rd
));
457 korina_chain_rx(lp
, rd
);
463 static int korina_poll(struct napi_struct
*napi
, int budget
)
465 struct korina_private
*lp
=
466 container_of(napi
, struct korina_private
, napi
);
467 struct net_device
*dev
= lp
->dev
;
470 work_done
= korina_rx(dev
, budget
);
471 if (work_done
< budget
) {
474 writel(readl(&lp
->rx_dma_regs
->dmasm
) &
475 ~(DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
),
476 &lp
->rx_dma_regs
->dmasm
);
482 * Set or clear the multicast filter for this adaptor.
484 static void korina_multicast_list(struct net_device
*dev
)
486 struct korina_private
*lp
= netdev_priv(dev
);
488 struct dev_mc_list
*dmi
= dev
->mc_list
;
489 u32 recognise
= ETH_ARC_AB
; /* always accept broadcasts */
492 /* Set promiscuous mode */
493 if (dev
->flags
& IFF_PROMISC
)
494 recognise
|= ETH_ARC_PRO
;
496 else if ((dev
->flags
& IFF_ALLMULTI
) || (dev
->mc_count
> 4))
497 /* All multicast and broadcast */
498 recognise
|= ETH_ARC_AM
;
500 /* Build the hash table */
501 if (dev
->mc_count
> 4) {
505 for (i
= 0; i
< 4; i
++)
508 for (i
= 0; i
< dev
->mc_count
; i
++) {
509 char *addrs
= dmi
->dmi_addr
;
516 crc
= ether_crc_le(6, addrs
);
518 hash_table
[crc
>> 4] |= 1 << (15 - (crc
& 0xf));
520 /* Accept filtered multicast */
521 recognise
|= ETH_ARC_AFM
;
523 /* Fill the MAC hash tables with their values */
524 writel((u32
)(hash_table
[1] << 16 | hash_table
[0]),
525 &lp
->eth_regs
->ethhash0
);
526 writel((u32
)(hash_table
[3] << 16 | hash_table
[2]),
527 &lp
->eth_regs
->ethhash1
);
530 spin_lock_irqsave(&lp
->lock
, flags
);
531 writel(recognise
, &lp
->eth_regs
->etharc
);
532 spin_unlock_irqrestore(&lp
->lock
, flags
);
535 static void korina_tx(struct net_device
*dev
)
537 struct korina_private
*lp
= netdev_priv(dev
);
538 struct dma_desc
*td
= &lp
->td_ring
[lp
->tx_next_done
];
542 spin_lock(&lp
->lock
);
544 /* Process all desc that are done */
545 while (IS_DMA_FINISHED(td
->control
)) {
546 if (lp
->tx_full
== 1) {
547 netif_wake_queue(dev
);
551 devcs
= lp
->td_ring
[lp
->tx_next_done
].devcs
;
552 if ((devcs
& (ETH_TX_FD
| ETH_TX_LD
)) !=
553 (ETH_TX_FD
| ETH_TX_LD
)) {
554 dev
->stats
.tx_errors
++;
555 dev
->stats
.tx_dropped
++;
557 /* Should never happen */
558 printk(KERN_ERR
"%s: split tx ignored\n",
560 } else if (devcs
& ETH_TX_TOK
) {
561 dev
->stats
.tx_packets
++;
562 dev
->stats
.tx_bytes
+=
563 lp
->tx_skb
[lp
->tx_next_done
]->len
;
565 dev
->stats
.tx_errors
++;
566 dev
->stats
.tx_dropped
++;
569 if (devcs
& ETH_TX_UND
)
570 dev
->stats
.tx_fifo_errors
++;
572 /* Oversized frame */
573 if (devcs
& ETH_TX_OF
)
574 dev
->stats
.tx_aborted_errors
++;
576 /* Excessive deferrals */
577 if (devcs
& ETH_TX_ED
)
578 dev
->stats
.tx_carrier_errors
++;
580 /* Collisions: medium busy */
581 if (devcs
& ETH_TX_EC
)
582 dev
->stats
.collisions
++;
585 if (devcs
& ETH_TX_LC
)
586 dev
->stats
.tx_window_errors
++;
589 /* We must always free the original skb */
590 if (lp
->tx_skb
[lp
->tx_next_done
]) {
591 dev_kfree_skb_any(lp
->tx_skb
[lp
->tx_next_done
]);
592 lp
->tx_skb
[lp
->tx_next_done
] = NULL
;
595 lp
->td_ring
[lp
->tx_next_done
].control
= DMA_DESC_IOF
;
596 lp
->td_ring
[lp
->tx_next_done
].devcs
= ETH_TX_FD
| ETH_TX_LD
;
597 lp
->td_ring
[lp
->tx_next_done
].link
= 0;
598 lp
->td_ring
[lp
->tx_next_done
].ca
= 0;
601 /* Go on to next transmission */
602 lp
->tx_next_done
= (lp
->tx_next_done
+ 1) & KORINA_TDS_MASK
;
603 td
= &lp
->td_ring
[lp
->tx_next_done
];
607 /* Clear the DMA status register */
608 dmas
= readl(&lp
->tx_dma_regs
->dmas
);
609 writel(~dmas
, &lp
->tx_dma_regs
->dmas
);
611 writel(readl(&lp
->tx_dma_regs
->dmasm
) &
612 ~(DMA_STAT_FINI
| DMA_STAT_ERR
),
613 &lp
->tx_dma_regs
->dmasm
);
615 spin_unlock(&lp
->lock
);
619 korina_tx_dma_interrupt(int irq
, void *dev_id
)
621 struct net_device
*dev
= dev_id
;
622 struct korina_private
*lp
= netdev_priv(dev
);
626 dmas
= readl(&lp
->tx_dma_regs
->dmas
);
628 if (dmas
& (DMA_STAT_FINI
| DMA_STAT_ERR
)) {
629 dmasm
= readl(&lp
->tx_dma_regs
->dmasm
);
630 writel(dmasm
| (DMA_STAT_FINI
| DMA_STAT_ERR
),
631 &lp
->tx_dma_regs
->dmasm
);
635 if (lp
->tx_chain_status
== desc_filled
&&
636 (readl(&(lp
->tx_dma_regs
->dmandptr
)) == 0)) {
637 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
638 &(lp
->tx_dma_regs
->dmandptr
));
639 lp
->tx_chain_status
= desc_empty
;
640 lp
->tx_chain_head
= lp
->tx_chain_tail
;
641 dev
->trans_start
= jiffies
;
643 if (dmas
& DMA_STAT_ERR
)
644 printk(KERN_ERR
"%s: DMA error\n", dev
->name
);
646 retval
= IRQ_HANDLED
;
654 static void korina_check_media(struct net_device
*dev
, unsigned int init_media
)
656 struct korina_private
*lp
= netdev_priv(dev
);
658 mii_check_media(&lp
->mii_if
, 0, init_media
);
660 if (lp
->mii_if
.full_duplex
)
661 writel(readl(&lp
->eth_regs
->ethmac2
) | ETH_MAC2_FD
,
662 &lp
->eth_regs
->ethmac2
);
664 writel(readl(&lp
->eth_regs
->ethmac2
) & ~ETH_MAC2_FD
,
665 &lp
->eth_regs
->ethmac2
);
668 static void korina_poll_media(unsigned long data
)
670 struct net_device
*dev
= (struct net_device
*) data
;
671 struct korina_private
*lp
= netdev_priv(dev
);
673 korina_check_media(dev
, 0);
674 mod_timer(&lp
->media_check_timer
, jiffies
+ HZ
);
677 static void korina_set_carrier(struct mii_if_info
*mii
)
679 if (mii
->force_media
) {
680 /* autoneg is off: Link is always assumed to be up */
681 if (!netif_carrier_ok(mii
->dev
))
682 netif_carrier_on(mii
->dev
);
683 } else /* Let MMI library update carrier status */
684 korina_check_media(mii
->dev
, 0);
687 static int korina_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
689 struct korina_private
*lp
= netdev_priv(dev
);
690 struct mii_ioctl_data
*data
= if_mii(rq
);
693 if (!netif_running(dev
))
695 spin_lock_irq(&lp
->lock
);
696 rc
= generic_mii_ioctl(&lp
->mii_if
, data
, cmd
, NULL
);
697 spin_unlock_irq(&lp
->lock
);
698 korina_set_carrier(&lp
->mii_if
);
703 /* ethtool helpers */
704 static void netdev_get_drvinfo(struct net_device
*dev
,
705 struct ethtool_drvinfo
*info
)
707 struct korina_private
*lp
= netdev_priv(dev
);
709 strcpy(info
->driver
, DRV_NAME
);
710 strcpy(info
->version
, DRV_VERSION
);
711 strcpy(info
->bus_info
, lp
->dev
->name
);
714 static int netdev_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
716 struct korina_private
*lp
= netdev_priv(dev
);
719 spin_lock_irq(&lp
->lock
);
720 rc
= mii_ethtool_gset(&lp
->mii_if
, cmd
);
721 spin_unlock_irq(&lp
->lock
);
726 static int netdev_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
728 struct korina_private
*lp
= netdev_priv(dev
);
731 spin_lock_irq(&lp
->lock
);
732 rc
= mii_ethtool_sset(&lp
->mii_if
, cmd
);
733 spin_unlock_irq(&lp
->lock
);
734 korina_set_carrier(&lp
->mii_if
);
739 static u32
netdev_get_link(struct net_device
*dev
)
741 struct korina_private
*lp
= netdev_priv(dev
);
743 return mii_link_ok(&lp
->mii_if
);
746 static struct ethtool_ops netdev_ethtool_ops
= {
747 .get_drvinfo
= netdev_get_drvinfo
,
748 .get_settings
= netdev_get_settings
,
749 .set_settings
= netdev_set_settings
,
750 .get_link
= netdev_get_link
,
753 static void korina_alloc_ring(struct net_device
*dev
)
755 struct korina_private
*lp
= netdev_priv(dev
);
759 /* Initialize the transmit descriptors */
760 for (i
= 0; i
< KORINA_NUM_TDS
; i
++) {
761 lp
->td_ring
[i
].control
= DMA_DESC_IOF
;
762 lp
->td_ring
[i
].devcs
= ETH_TX_FD
| ETH_TX_LD
;
763 lp
->td_ring
[i
].ca
= 0;
764 lp
->td_ring
[i
].link
= 0;
766 lp
->tx_next_done
= lp
->tx_chain_head
= lp
->tx_chain_tail
=
767 lp
->tx_full
= lp
->tx_count
= 0;
768 lp
->tx_chain_status
= desc_empty
;
770 /* Initialize the receive descriptors */
771 for (i
= 0; i
< KORINA_NUM_RDS
; i
++) {
772 skb
= dev_alloc_skb(KORINA_RBSIZE
+ 2);
777 lp
->rd_ring
[i
].control
= DMA_DESC_IOD
|
778 DMA_COUNT(KORINA_RBSIZE
);
779 lp
->rd_ring
[i
].devcs
= 0;
780 lp
->rd_ring
[i
].ca
= CPHYSADDR(skb
->data
);
781 lp
->rd_ring
[i
].link
= CPHYSADDR(&lp
->rd_ring
[i
+1]);
784 /* loop back receive descriptors, so the last
785 * descriptor points to the first one */
786 lp
->rd_ring
[i
- 1].link
= CPHYSADDR(&lp
->rd_ring
[0]);
787 lp
->rd_ring
[i
- 1].control
|= DMA_DESC_COD
;
789 lp
->rx_next_done
= 0;
790 lp
->rx_chain_head
= 0;
791 lp
->rx_chain_tail
= 0;
792 lp
->rx_chain_status
= desc_empty
;
795 static void korina_free_ring(struct net_device
*dev
)
797 struct korina_private
*lp
= netdev_priv(dev
);
800 for (i
= 0; i
< KORINA_NUM_RDS
; i
++) {
801 lp
->rd_ring
[i
].control
= 0;
803 dev_kfree_skb_any(lp
->rx_skb
[i
]);
804 lp
->rx_skb
[i
] = NULL
;
807 for (i
= 0; i
< KORINA_NUM_TDS
; i
++) {
808 lp
->td_ring
[i
].control
= 0;
810 dev_kfree_skb_any(lp
->tx_skb
[i
]);
811 lp
->tx_skb
[i
] = NULL
;
816 * Initialize the RC32434 ethernet controller.
818 static int korina_init(struct net_device
*dev
)
820 struct korina_private
*lp
= netdev_priv(dev
);
823 korina_abort_tx(dev
);
824 korina_abort_rx(dev
);
826 /* reset ethernet logic */
827 writel(0, &lp
->eth_regs
->ethintfc
);
828 while ((readl(&lp
->eth_regs
->ethintfc
) & ETH_INT_FC_RIP
))
829 dev
->trans_start
= jiffies
;
831 /* Enable Ethernet Interface */
832 writel(ETH_INT_FC_EN
, &lp
->eth_regs
->ethintfc
);
835 korina_alloc_ring(dev
);
837 writel(0, &lp
->rx_dma_regs
->dmas
);
839 korina_start_rx(lp
, &lp
->rd_ring
[0]);
841 writel(readl(&lp
->tx_dma_regs
->dmasm
) &
842 ~(DMA_STAT_FINI
| DMA_STAT_ERR
),
843 &lp
->tx_dma_regs
->dmasm
);
844 writel(readl(&lp
->rx_dma_regs
->dmasm
) &
845 ~(DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
),
846 &lp
->rx_dma_regs
->dmasm
);
848 /* Accept only packets destined for this Ethernet device address */
849 writel(ETH_ARC_AB
, &lp
->eth_regs
->etharc
);
851 /* Set all Ether station address registers to their initial values */
852 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal0
);
853 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah0
);
855 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal1
);
856 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah1
);
858 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal2
);
859 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah2
);
861 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal3
);
862 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah3
);
865 /* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */
866 writel(ETH_MAC2_PE
| ETH_MAC2_CEN
| ETH_MAC2_FD
,
867 &lp
->eth_regs
->ethmac2
);
869 /* Back to back inter-packet-gap */
870 writel(0x15, &lp
->eth_regs
->ethipgt
);
871 /* Non - Back to back inter-packet-gap */
872 writel(0x12, &lp
->eth_regs
->ethipgr
);
874 /* Management Clock Prescaler Divisor
875 * Clock independent setting */
876 writel(((idt_cpu_freq
) / MII_CLOCK
+ 1) & ~1,
877 &lp
->eth_regs
->ethmcp
);
879 /* don't transmit until fifo contains 48b */
880 writel(48, &lp
->eth_regs
->ethfifott
);
882 writel(ETH_MAC1_RE
, &lp
->eth_regs
->ethmac1
);
884 napi_enable(&lp
->napi
);
885 netif_start_queue(dev
);
891 * Restart the RC32434 ethernet controller.
892 * FIXME: check the return status where we call it
894 static int korina_restart(struct net_device
*dev
)
896 struct korina_private
*lp
= netdev_priv(dev
);
902 disable_irq(lp
->rx_irq
);
903 disable_irq(lp
->tx_irq
);
904 disable_irq(lp
->ovr_irq
);
905 disable_irq(lp
->und_irq
);
907 writel(readl(&lp
->tx_dma_regs
->dmasm
) |
908 DMA_STAT_FINI
| DMA_STAT_ERR
,
909 &lp
->tx_dma_regs
->dmasm
);
910 writel(readl(&lp
->rx_dma_regs
->dmasm
) |
911 DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
,
912 &lp
->rx_dma_regs
->dmasm
);
914 korina_free_ring(dev
);
916 napi_disable(&lp
->napi
);
918 ret
= korina_init(dev
);
920 printk(KERN_ERR
"%s: cannot restart device\n", dev
->name
);
923 korina_multicast_list(dev
);
925 enable_irq(lp
->und_irq
);
926 enable_irq(lp
->ovr_irq
);
927 enable_irq(lp
->tx_irq
);
928 enable_irq(lp
->rx_irq
);
933 static void korina_clear_and_restart(struct net_device
*dev
, u32 value
)
935 struct korina_private
*lp
= netdev_priv(dev
);
937 netif_stop_queue(dev
);
938 writel(value
, &lp
->eth_regs
->ethintfc
);
942 /* Ethernet Tx Underflow interrupt */
943 static irqreturn_t
korina_und_interrupt(int irq
, void *dev_id
)
945 struct net_device
*dev
= dev_id
;
946 struct korina_private
*lp
= netdev_priv(dev
);
949 spin_lock(&lp
->lock
);
951 und
= readl(&lp
->eth_regs
->ethintfc
);
953 if (und
& ETH_INT_FC_UND
)
954 korina_clear_and_restart(dev
, und
& ~ETH_INT_FC_UND
);
956 spin_unlock(&lp
->lock
);
961 static void korina_tx_timeout(struct net_device
*dev
)
963 struct korina_private
*lp
= netdev_priv(dev
);
966 spin_lock_irqsave(&lp
->lock
, flags
);
968 spin_unlock_irqrestore(&lp
->lock
, flags
);
971 /* Ethernet Rx Overflow interrupt */
973 korina_ovr_interrupt(int irq
, void *dev_id
)
975 struct net_device
*dev
= dev_id
;
976 struct korina_private
*lp
= netdev_priv(dev
);
979 spin_lock(&lp
->lock
);
980 ovr
= readl(&lp
->eth_regs
->ethintfc
);
982 if (ovr
& ETH_INT_FC_OVR
)
983 korina_clear_and_restart(dev
, ovr
& ~ETH_INT_FC_OVR
);
985 spin_unlock(&lp
->lock
);
990 #ifdef CONFIG_NET_POLL_CONTROLLER
991 static void korina_poll_controller(struct net_device
*dev
)
993 disable_irq(dev
->irq
);
994 korina_tx_dma_interrupt(dev
->irq
, dev
);
995 enable_irq(dev
->irq
);
999 static int korina_open(struct net_device
*dev
)
1001 struct korina_private
*lp
= netdev_priv(dev
);
1005 ret
= korina_init(dev
);
1007 printk(KERN_ERR
"%s: cannot open device\n", dev
->name
);
1011 /* Install the interrupt handler
1012 * that handles the Done Finished
1013 * Ovr and Und Events */
1014 ret
= request_irq(lp
->rx_irq
, &korina_rx_dma_interrupt
,
1015 IRQF_DISABLED
, "Korina ethernet Rx", dev
);
1017 printk(KERN_ERR
"%s: unable to get Rx DMA IRQ %d\n",
1018 dev
->name
, lp
->rx_irq
);
1021 ret
= request_irq(lp
->tx_irq
, &korina_tx_dma_interrupt
,
1022 IRQF_DISABLED
, "Korina ethernet Tx", dev
);
1024 printk(KERN_ERR
"%s: unable to get Tx DMA IRQ %d\n",
1025 dev
->name
, lp
->tx_irq
);
1026 goto err_free_rx_irq
;
1029 /* Install handler for overrun error. */
1030 ret
= request_irq(lp
->ovr_irq
, &korina_ovr_interrupt
,
1031 IRQF_DISABLED
, "Ethernet Overflow", dev
);
1033 printk(KERN_ERR
"%s: unable to get OVR IRQ %d\n",
1034 dev
->name
, lp
->ovr_irq
);
1035 goto err_free_tx_irq
;
1038 /* Install handler for underflow error. */
1039 ret
= request_irq(lp
->und_irq
, &korina_und_interrupt
,
1040 IRQF_DISABLED
, "Ethernet Underflow", dev
);
1042 printk(KERN_ERR
"%s: unable to get UND IRQ %d\n",
1043 dev
->name
, lp
->und_irq
);
1044 goto err_free_ovr_irq
;
1046 mod_timer(&lp
->media_check_timer
, jiffies
+ 1);
1051 free_irq(lp
->ovr_irq
, dev
);
1053 free_irq(lp
->tx_irq
, dev
);
1055 free_irq(lp
->rx_irq
, dev
);
1057 korina_free_ring(dev
);
1061 static int korina_close(struct net_device
*dev
)
1063 struct korina_private
*lp
= netdev_priv(dev
);
1066 del_timer(&lp
->media_check_timer
);
1068 /* Disable interrupts */
1069 disable_irq(lp
->rx_irq
);
1070 disable_irq(lp
->tx_irq
);
1071 disable_irq(lp
->ovr_irq
);
1072 disable_irq(lp
->und_irq
);
1074 korina_abort_tx(dev
);
1075 tmp
= readl(&lp
->tx_dma_regs
->dmasm
);
1076 tmp
= tmp
| DMA_STAT_FINI
| DMA_STAT_ERR
;
1077 writel(tmp
, &lp
->tx_dma_regs
->dmasm
);
1079 korina_abort_rx(dev
);
1080 tmp
= readl(&lp
->rx_dma_regs
->dmasm
);
1081 tmp
= tmp
| DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
;
1082 writel(tmp
, &lp
->rx_dma_regs
->dmasm
);
1084 korina_free_ring(dev
);
1086 napi_disable(&lp
->napi
);
1088 free_irq(lp
->rx_irq
, dev
);
1089 free_irq(lp
->tx_irq
, dev
);
1090 free_irq(lp
->ovr_irq
, dev
);
1091 free_irq(lp
->und_irq
, dev
);
1096 static const struct net_device_ops korina_netdev_ops
= {
1097 .ndo_open
= korina_open
,
1098 .ndo_stop
= korina_close
,
1099 .ndo_start_xmit
= korina_send_packet
,
1100 .ndo_set_multicast_list
= korina_multicast_list
,
1101 .ndo_tx_timeout
= korina_tx_timeout
,
1102 .ndo_do_ioctl
= korina_ioctl
,
1103 .ndo_change_mtu
= eth_change_mtu
,
1104 .ndo_validate_addr
= eth_validate_addr
,
1105 .ndo_set_mac_address
= eth_mac_addr
,
1106 #ifdef CONFIG_NET_POLL_CONTROLLER
1107 .ndo_poll_controller
= korina_poll_controller
,
1111 static int korina_probe(struct platform_device
*pdev
)
1113 struct korina_device
*bif
= platform_get_drvdata(pdev
);
1114 struct korina_private
*lp
;
1115 struct net_device
*dev
;
1119 dev
= alloc_etherdev(sizeof(struct korina_private
));
1121 printk(KERN_ERR DRV_NAME
": alloc_etherdev failed\n");
1124 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1125 lp
= netdev_priv(dev
);
1128 memcpy(dev
->dev_addr
, bif
->mac
, 6);
1130 lp
->rx_irq
= platform_get_irq_byname(pdev
, "korina_rx");
1131 lp
->tx_irq
= platform_get_irq_byname(pdev
, "korina_tx");
1132 lp
->ovr_irq
= platform_get_irq_byname(pdev
, "korina_ovr");
1133 lp
->und_irq
= platform_get_irq_byname(pdev
, "korina_und");
1135 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_regs");
1136 dev
->base_addr
= r
->start
;
1137 lp
->eth_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1138 if (!lp
->eth_regs
) {
1139 printk(KERN_ERR DRV_NAME
": cannot remap registers\n");
1144 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_dma_rx");
1145 lp
->rx_dma_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1146 if (!lp
->rx_dma_regs
) {
1147 printk(KERN_ERR DRV_NAME
": cannot remap Rx DMA registers\n");
1149 goto probe_err_dma_rx
;
1152 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_dma_tx");
1153 lp
->tx_dma_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1154 if (!lp
->tx_dma_regs
) {
1155 printk(KERN_ERR DRV_NAME
": cannot remap Tx DMA registers\n");
1157 goto probe_err_dma_tx
;
1160 lp
->td_ring
= kmalloc(TD_RING_SIZE
+ RD_RING_SIZE
, GFP_KERNEL
);
1162 printk(KERN_ERR DRV_NAME
": cannot allocate descriptors\n");
1164 goto probe_err_td_ring
;
1167 dma_cache_inv((unsigned long)(lp
->td_ring
),
1168 TD_RING_SIZE
+ RD_RING_SIZE
);
1170 /* now convert TD_RING pointer to KSEG1 */
1171 lp
->td_ring
= (struct dma_desc
*)KSEG1ADDR(lp
->td_ring
);
1172 lp
->rd_ring
= &lp
->td_ring
[KORINA_NUM_TDS
];
1174 spin_lock_init(&lp
->lock
);
1175 /* just use the rx dma irq */
1176 dev
->irq
= lp
->rx_irq
;
1179 dev
->netdev_ops
= &korina_netdev_ops
;
1180 dev
->ethtool_ops
= &netdev_ethtool_ops
;
1181 dev
->watchdog_timeo
= TX_TIMEOUT
;
1182 netif_napi_add(dev
, &lp
->napi
, korina_poll
, 64);
1184 lp
->phy_addr
= (((lp
->rx_irq
== 0x2c? 1:0) << 8) | 0x05);
1185 lp
->mii_if
.dev
= dev
;
1186 lp
->mii_if
.mdio_read
= mdio_read
;
1187 lp
->mii_if
.mdio_write
= mdio_write
;
1188 lp
->mii_if
.phy_id
= lp
->phy_addr
;
1189 lp
->mii_if
.phy_id_mask
= 0x1f;
1190 lp
->mii_if
.reg_num_mask
= 0x1f;
1192 rc
= register_netdev(dev
);
1194 printk(KERN_ERR DRV_NAME
1195 ": cannot register net device: %d\n", rc
);
1196 goto probe_err_register
;
1198 setup_timer(&lp
->media_check_timer
, korina_poll_media
, (unsigned long) dev
);
1200 printk(KERN_INFO
"%s: " DRV_NAME
"-" DRV_VERSION
" " DRV_RELDATE
"\n",
1208 iounmap(lp
->tx_dma_regs
);
1210 iounmap(lp
->rx_dma_regs
);
1212 iounmap(lp
->eth_regs
);
1218 static int korina_remove(struct platform_device
*pdev
)
1220 struct korina_device
*bif
= platform_get_drvdata(pdev
);
1221 struct korina_private
*lp
= netdev_priv(bif
->dev
);
1223 iounmap(lp
->eth_regs
);
1224 iounmap(lp
->rx_dma_regs
);
1225 iounmap(lp
->tx_dma_regs
);
1227 platform_set_drvdata(pdev
, NULL
);
1228 unregister_netdev(bif
->dev
);
1229 free_netdev(bif
->dev
);
1234 static struct platform_driver korina_driver
= {
1235 .driver
.name
= "korina",
1236 .probe
= korina_probe
,
1237 .remove
= korina_remove
,
1240 static int __init
korina_init_module(void)
1242 return platform_driver_register(&korina_driver
);
1245 static void korina_cleanup_module(void)
1247 return platform_driver_unregister(&korina_driver
);
1250 module_init(korina_init_module
);
1251 module_exit(korina_cleanup_module
);
1253 MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
1254 MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
1255 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
1256 MODULE_DESCRIPTION("IDT RC32434 (Korina) Ethernet driver");
1257 MODULE_LICENSE("GPL");