1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/pkt_sched.h>
38 #include <linux/ipv6.h>
39 #include <linux/slab.h>
40 #include <net/checksum.h>
41 #include <net/ip6_checksum.h>
42 #include <linux/ethtool.h>
43 #include <linux/if_vlan.h>
44 #include <scsi/fc/fc_fcoe.h>
47 #include "ixgbe_common.h"
48 #include "ixgbe_dcb_82599.h"
49 #include "ixgbe_sriov.h"
51 char ixgbe_driver_name
[] = "ixgbe";
52 static const char ixgbe_driver_string
[] =
53 "Intel(R) 10 Gigabit PCI Express Network Driver";
55 #define DRV_VERSION "2.0.84-k2"
56 const char ixgbe_driver_version
[] = DRV_VERSION
;
57 static char ixgbe_copyright
[] = "Copyright (c) 1999-2010 Intel Corporation.";
59 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
60 [board_82598
] = &ixgbe_82598_info
,
61 [board_82599
] = &ixgbe_82599_info
,
64 /* ixgbe_pci_tbl - PCI Device ID Table
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
72 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
79 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
81 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
),
83 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
85 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
87 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
),
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
),
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
),
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
),
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
),
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
),
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
),
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
),
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
),
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
),
116 /* required last entry */
119 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
121 #ifdef CONFIG_IXGBE_DCA
122 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
124 static struct notifier_block dca_notifier
= {
125 .notifier_call
= ixgbe_notify_dca
,
131 #ifdef CONFIG_PCI_IOV
132 static unsigned int max_vfs
;
133 module_param(max_vfs
, uint
, 0);
134 MODULE_PARM_DESC(max_vfs
,
135 "Maximum number of virtual functions to allocate per physical function");
136 #endif /* CONFIG_PCI_IOV */
138 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
139 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
140 MODULE_LICENSE("GPL");
141 MODULE_VERSION(DRV_VERSION
);
143 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
145 static inline void ixgbe_disable_sriov(struct ixgbe_adapter
*adapter
)
147 struct ixgbe_hw
*hw
= &adapter
->hw
;
152 #ifdef CONFIG_PCI_IOV
153 /* disable iov and allow time for transactions to clear */
154 pci_disable_sriov(adapter
->pdev
);
157 /* turn off device IOV mode */
158 gcr
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
159 gcr
&= ~(IXGBE_GCR_EXT_SRIOV
);
160 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr
);
161 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
162 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
163 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
165 /* set default pool back to 0 */
166 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
167 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
168 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
170 /* take a breather then clean up driver data */
173 kfree(adapter
->vfinfo
);
174 adapter
->vfinfo
= NULL
;
176 adapter
->num_vfs
= 0;
177 adapter
->flags
&= ~IXGBE_FLAG_SRIOV_ENABLED
;
180 struct ixgbe_reg_info
{
185 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
187 /* General Registers */
188 {IXGBE_CTRL
, "CTRL"},
189 {IXGBE_STATUS
, "STATUS"},
190 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
192 /* Interrupt Registers */
193 {IXGBE_EICR
, "EICR"},
196 {IXGBE_SRRCTL(0), "SRRCTL"},
197 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
198 {IXGBE_RDLEN(0), "RDLEN"},
199 {IXGBE_RDH(0), "RDH"},
200 {IXGBE_RDT(0), "RDT"},
201 {IXGBE_RXDCTL(0), "RXDCTL"},
202 {IXGBE_RDBAL(0), "RDBAL"},
203 {IXGBE_RDBAH(0), "RDBAH"},
206 {IXGBE_TDBAL(0), "TDBAL"},
207 {IXGBE_TDBAH(0), "TDBAH"},
208 {IXGBE_TDLEN(0), "TDLEN"},
209 {IXGBE_TDH(0), "TDH"},
210 {IXGBE_TDT(0), "TDT"},
211 {IXGBE_TXDCTL(0), "TXDCTL"},
213 /* List Terminator */
219 * ixgbe_regdump - register printout routine
221 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
227 switch (reginfo
->ofs
) {
228 case IXGBE_SRRCTL(0):
229 for (i
= 0; i
< 64; i
++)
230 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
232 case IXGBE_DCA_RXCTRL(0):
233 for (i
= 0; i
< 64; i
++)
234 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
237 for (i
= 0; i
< 64; i
++)
238 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
241 for (i
= 0; i
< 64; i
++)
242 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
245 for (i
= 0; i
< 64; i
++)
246 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
248 case IXGBE_RXDCTL(0):
249 for (i
= 0; i
< 64; i
++)
250 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
253 for (i
= 0; i
< 64; i
++)
254 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
257 for (i
= 0; i
< 64; i
++)
258 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
261 for (i
= 0; i
< 64; i
++)
262 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
265 for (i
= 0; i
< 64; i
++)
266 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
269 for (i
= 0; i
< 64; i
++)
270 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
273 for (i
= 0; i
< 64; i
++)
274 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
277 for (i
= 0; i
< 64; i
++)
278 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
280 case IXGBE_TXDCTL(0):
281 for (i
= 0; i
< 64; i
++)
282 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
285 pr_info("%-15s %08x\n", reginfo
->name
,
286 IXGBE_READ_REG(hw
, reginfo
->ofs
));
290 for (i
= 0; i
< 8; i
++) {
291 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
292 pr_err("%-15s", rname
);
293 for (j
= 0; j
< 8; j
++)
294 pr_cont(" %08x", regs
[i
*8+j
]);
301 * ixgbe_dump - Print registers, tx-rings and rx-rings
303 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
305 struct net_device
*netdev
= adapter
->netdev
;
306 struct ixgbe_hw
*hw
= &adapter
->hw
;
307 struct ixgbe_reg_info
*reginfo
;
309 struct ixgbe_ring
*tx_ring
;
310 struct ixgbe_tx_buffer
*tx_buffer_info
;
311 union ixgbe_adv_tx_desc
*tx_desc
;
312 struct my_u0
{ u64 a
; u64 b
; } *u0
;
313 struct ixgbe_ring
*rx_ring
;
314 union ixgbe_adv_rx_desc
*rx_desc
;
315 struct ixgbe_rx_buffer
*rx_buffer_info
;
319 if (!netif_msg_hw(adapter
))
322 /* Print netdevice Info */
324 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
325 pr_info("Device Name state "
326 "trans_start last_rx\n");
327 pr_info("%-15s %016lX %016lX %016lX\n",
334 /* Print Registers */
335 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
336 pr_info(" Register Name Value\n");
337 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
338 reginfo
->name
; reginfo
++) {
339 ixgbe_regdump(hw
, reginfo
);
342 /* Print TX Ring Summary */
343 if (!netdev
|| !netif_running(netdev
))
346 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
347 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
348 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
349 tx_ring
= adapter
->tx_ring
[n
];
351 &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
352 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
353 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
354 (u64
)tx_buffer_info
->dma
,
355 tx_buffer_info
->length
,
356 tx_buffer_info
->next_to_watch
,
357 (u64
)tx_buffer_info
->time_stamp
);
361 if (!netif_msg_tx_done(adapter
))
362 goto rx_ring_summary
;
364 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
366 /* Transmit Descriptor Formats
368 * Advanced Transmit Descriptor
369 * +--------------------------------------------------------------+
370 * 0 | Buffer Address [63:0] |
371 * +--------------------------------------------------------------+
372 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
373 * +--------------------------------------------------------------+
374 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
377 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
378 tx_ring
= adapter
->tx_ring
[n
];
379 pr_info("------------------------------------\n");
380 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
381 pr_info("------------------------------------\n");
382 pr_info("T [desc] [address 63:0 ] "
383 "[PlPOIdStDDt Ln] [bi->dma ] "
384 "leng ntw timestamp bi->skb\n");
386 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
387 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, i
);
388 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
389 u0
= (struct my_u0
*)tx_desc
;
390 pr_info("T [0x%03X] %016llX %016llX %016llX"
391 " %04X %3X %016llX %p", i
,
394 (u64
)tx_buffer_info
->dma
,
395 tx_buffer_info
->length
,
396 tx_buffer_info
->next_to_watch
,
397 (u64
)tx_buffer_info
->time_stamp
,
398 tx_buffer_info
->skb
);
399 if (i
== tx_ring
->next_to_use
&&
400 i
== tx_ring
->next_to_clean
)
402 else if (i
== tx_ring
->next_to_use
)
404 else if (i
== tx_ring
->next_to_clean
)
409 if (netif_msg_pktdata(adapter
) &&
410 tx_buffer_info
->dma
!= 0)
411 print_hex_dump(KERN_INFO
, "",
412 DUMP_PREFIX_ADDRESS
, 16, 1,
413 phys_to_virt(tx_buffer_info
->dma
),
414 tx_buffer_info
->length
, true);
418 /* Print RX Rings Summary */
420 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
421 pr_info("Queue [NTU] [NTC]\n");
422 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
423 rx_ring
= adapter
->rx_ring
[n
];
424 pr_info("%5d %5X %5X\n",
425 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
429 if (!netif_msg_rx_status(adapter
))
432 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
434 /* Advanced Receive Descriptor (Read) Format
436 * +-----------------------------------------------------+
437 * 0 | Packet Buffer Address [63:1] |A0/NSE|
438 * +----------------------------------------------+------+
439 * 8 | Header Buffer Address [63:1] | DD |
440 * +-----------------------------------------------------+
443 * Advanced Receive Descriptor (Write-Back) Format
445 * 63 48 47 32 31 30 21 20 16 15 4 3 0
446 * +------------------------------------------------------+
447 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
448 * | Checksum Ident | | | | Type | Type |
449 * +------------------------------------------------------+
450 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
451 * +------------------------------------------------------+
452 * 63 48 47 32 31 20 19 0
454 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
455 rx_ring
= adapter
->rx_ring
[n
];
456 pr_info("------------------------------------\n");
457 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
458 pr_info("------------------------------------\n");
459 pr_info("R [desc] [ PktBuf A0] "
460 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
461 "<-- Adv Rx Read format\n");
462 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
463 "[vl er S cks ln] ---------------- [bi->skb] "
464 "<-- Adv Rx Write-Back format\n");
466 for (i
= 0; i
< rx_ring
->count
; i
++) {
467 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
468 rx_desc
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
469 u0
= (struct my_u0
*)rx_desc
;
470 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
471 if (staterr
& IXGBE_RXD_STAT_DD
) {
472 /* Descriptor Done */
473 pr_info("RWB[0x%03X] %016llX "
474 "%016llX ---------------- %p", i
,
477 rx_buffer_info
->skb
);
479 pr_info("R [0x%03X] %016llX "
480 "%016llX %016llX %p", i
,
483 (u64
)rx_buffer_info
->dma
,
484 rx_buffer_info
->skb
);
486 if (netif_msg_pktdata(adapter
)) {
487 print_hex_dump(KERN_INFO
, "",
488 DUMP_PREFIX_ADDRESS
, 16, 1,
489 phys_to_virt(rx_buffer_info
->dma
),
490 rx_ring
->rx_buf_len
, true);
492 if (rx_ring
->rx_buf_len
493 < IXGBE_RXBUFFER_2048
)
494 print_hex_dump(KERN_INFO
, "",
495 DUMP_PREFIX_ADDRESS
, 16, 1,
497 rx_buffer_info
->page_dma
+
498 rx_buffer_info
->page_offset
504 if (i
== rx_ring
->next_to_use
)
506 else if (i
== rx_ring
->next_to_clean
)
518 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
522 /* Let firmware take over control of h/w */
523 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
524 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
525 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
528 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
532 /* Let firmware know the driver has taken over */
533 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
534 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
535 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
539 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
540 * @adapter: pointer to adapter struct
541 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
542 * @queue: queue to map the corresponding interrupt to
543 * @msix_vector: the vector to map to the corresponding queue
546 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
547 u8 queue
, u8 msix_vector
)
550 struct ixgbe_hw
*hw
= &adapter
->hw
;
551 switch (hw
->mac
.type
) {
552 case ixgbe_mac_82598EB
:
553 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
556 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
557 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
558 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
559 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
560 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
562 case ixgbe_mac_82599EB
:
563 if (direction
== -1) {
565 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
566 index
= ((queue
& 1) * 8);
567 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
568 ivar
&= ~(0xFF << index
);
569 ivar
|= (msix_vector
<< index
);
570 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
573 /* tx or rx causes */
574 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
575 index
= ((16 * (queue
& 1)) + (8 * direction
));
576 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
577 ivar
&= ~(0xFF << index
);
578 ivar
|= (msix_vector
<< index
);
579 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
587 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
592 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
593 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
594 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
596 mask
= (qmask
& 0xFFFFFFFF);
597 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
598 mask
= (qmask
>> 32);
599 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
603 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
604 struct ixgbe_tx_buffer
607 if (tx_buffer_info
->dma
) {
608 if (tx_buffer_info
->mapped_as_page
)
609 dma_unmap_page(&adapter
->pdev
->dev
,
611 tx_buffer_info
->length
,
614 dma_unmap_single(&adapter
->pdev
->dev
,
616 tx_buffer_info
->length
,
618 tx_buffer_info
->dma
= 0;
620 if (tx_buffer_info
->skb
) {
621 dev_kfree_skb_any(tx_buffer_info
->skb
);
622 tx_buffer_info
->skb
= NULL
;
624 tx_buffer_info
->time_stamp
= 0;
625 /* tx_buffer_info must be completely set up in the transmit path */
629 * ixgbe_tx_xon_state - check the tx ring xon state
630 * @adapter: the ixgbe adapter
631 * @tx_ring: the corresponding tx_ring
633 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
634 * corresponding TC of this tx_ring when checking TFCS.
636 * Returns : true if in xon state (currently not paused)
638 static inline bool ixgbe_tx_xon_state(struct ixgbe_adapter
*adapter
,
639 struct ixgbe_ring
*tx_ring
)
641 u32 txoff
= IXGBE_TFCS_TXOFF
;
643 #ifdef CONFIG_IXGBE_DCB
644 if (adapter
->dcb_cfg
.pfc_mode_enable
) {
646 int reg_idx
= tx_ring
->reg_idx
;
647 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
649 switch (adapter
->hw
.mac
.type
) {
650 case ixgbe_mac_82598EB
:
652 txoff
= IXGBE_TFCS_TXOFF0
;
654 case ixgbe_mac_82599EB
:
656 txoff
= IXGBE_TFCS_TXOFF
;
660 if (tc
== 2) /* TC2, TC3 */
661 tc
+= (reg_idx
- 64) >> 4;
662 else if (tc
== 3) /* TC4, TC5, TC6, TC7 */
663 tc
+= 1 + ((reg_idx
- 96) >> 3);
664 } else if (dcb_i
== 4) {
668 tc
+= (reg_idx
- 64) >> 5;
669 if (tc
== 2) /* TC2, TC3 */
670 tc
+= (reg_idx
- 96) >> 4;
680 return IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & txoff
;
683 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
684 struct ixgbe_ring
*tx_ring
,
687 struct ixgbe_hw
*hw
= &adapter
->hw
;
689 /* Detect a transmit hang in hardware, this serializes the
690 * check with the clearing of time_stamp and movement of eop */
691 adapter
->detect_tx_hung
= false;
692 if (tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
693 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
694 ixgbe_tx_xon_state(adapter
, tx_ring
)) {
695 /* detected Tx unit hang */
696 union ixgbe_adv_tx_desc
*tx_desc
;
697 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, eop
);
698 e_err(drv
, "Detected Tx Unit Hang\n"
700 " TDH, TDT <%x>, <%x>\n"
701 " next_to_use <%x>\n"
702 " next_to_clean <%x>\n"
703 "tx_buffer_info[next_to_clean]\n"
704 " time_stamp <%lx>\n"
706 tx_ring
->queue_index
,
707 IXGBE_READ_REG(hw
, tx_ring
->head
),
708 IXGBE_READ_REG(hw
, tx_ring
->tail
),
709 tx_ring
->next_to_use
, eop
,
710 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
717 #define IXGBE_MAX_TXD_PWR 14
718 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
720 /* Tx Descriptors needed, worst case */
721 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
722 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
723 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
724 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
726 static void ixgbe_tx_timeout(struct net_device
*netdev
);
729 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
730 * @q_vector: structure containing interrupt and ring information
731 * @tx_ring: tx ring to clean
733 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
734 struct ixgbe_ring
*tx_ring
)
736 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
737 struct net_device
*netdev
= adapter
->netdev
;
738 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
739 struct ixgbe_tx_buffer
*tx_buffer_info
;
740 unsigned int i
, eop
, count
= 0;
741 unsigned int total_bytes
= 0, total_packets
= 0;
743 i
= tx_ring
->next_to_clean
;
744 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
745 eop_desc
= IXGBE_TX_DESC_ADV(tx_ring
, eop
);
747 while ((eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) &&
748 (count
< tx_ring
->work_limit
)) {
749 bool cleaned
= false;
750 rmb(); /* read buffer_info after eop_desc */
751 for ( ; !cleaned
; count
++) {
753 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, i
);
754 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
755 cleaned
= (i
== eop
);
756 skb
= tx_buffer_info
->skb
;
758 if (cleaned
&& skb
) {
759 unsigned int segs
, bytecount
;
760 unsigned int hlen
= skb_headlen(skb
);
762 /* gso_segs is currently only valid for tcp */
763 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
765 /* adjust for FCoE Sequence Offload */
766 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
767 && (skb
->protocol
== htons(ETH_P_FCOE
)) &&
769 hlen
= skb_transport_offset(skb
) +
770 sizeof(struct fc_frame_header
) +
771 sizeof(struct fcoe_crc_eof
);
772 segs
= DIV_ROUND_UP(skb
->len
- hlen
,
773 skb_shinfo(skb
)->gso_size
);
775 #endif /* IXGBE_FCOE */
776 /* multiply data chunks by size of headers */
777 bytecount
= ((segs
- 1) * hlen
) + skb
->len
;
778 total_packets
+= segs
;
779 total_bytes
+= bytecount
;
782 ixgbe_unmap_and_free_tx_resource(adapter
,
785 tx_desc
->wb
.status
= 0;
788 if (i
== tx_ring
->count
)
792 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
793 eop_desc
= IXGBE_TX_DESC_ADV(tx_ring
, eop
);
796 tx_ring
->next_to_clean
= i
;
798 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
799 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
800 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
801 /* Make sure that anybody stopping the queue after this
802 * sees the new next_to_clean.
805 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
806 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
807 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
808 ++tx_ring
->restart_queue
;
812 if (adapter
->detect_tx_hung
) {
813 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
814 /* schedule immediate reset if we believe we hung */
815 e_info(probe
, "tx hang %d detected, resetting "
816 "adapter\n", adapter
->tx_timeout_count
+ 1);
817 ixgbe_tx_timeout(adapter
->netdev
);
821 /* re-arm the interrupt */
822 if (count
>= tx_ring
->work_limit
)
823 ixgbe_irq_rearm_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
825 tx_ring
->total_bytes
+= total_bytes
;
826 tx_ring
->total_packets
+= total_packets
;
827 tx_ring
->stats
.packets
+= total_packets
;
828 tx_ring
->stats
.bytes
+= total_bytes
;
829 return count
< tx_ring
->work_limit
;
832 #ifdef CONFIG_IXGBE_DCA
833 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
834 struct ixgbe_ring
*rx_ring
)
838 int q
= rx_ring
->reg_idx
;
840 if (rx_ring
->cpu
!= cpu
) {
841 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
842 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
843 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
844 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
845 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
846 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599
;
847 rxctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
848 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
);
850 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
851 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
852 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN
);
853 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN
|
854 IXGBE_DCA_RXCTRL_DESC_HSRO_EN
);
855 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
861 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
862 struct ixgbe_ring
*tx_ring
)
866 int q
= tx_ring
->reg_idx
;
867 struct ixgbe_hw
*hw
= &adapter
->hw
;
869 if (tx_ring
->cpu
!= cpu
) {
870 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
871 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(q
));
872 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
873 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
874 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
875 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
876 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
877 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
));
878 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599
;
879 txctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
880 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
);
881 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
882 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
), txctrl
);
889 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
893 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
896 /* always use CB2 mode, difference is masked in the CB driver */
897 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
899 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
900 adapter
->tx_ring
[i
]->cpu
= -1;
901 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
[i
]);
903 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
904 adapter
->rx_ring
[i
]->cpu
= -1;
905 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
[i
]);
909 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
911 struct net_device
*netdev
= dev_get_drvdata(dev
);
912 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
913 unsigned long event
= *(unsigned long *)data
;
916 case DCA_PROVIDER_ADD
:
917 /* if we're already enabled, don't do it again */
918 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
920 if (dca_add_requester(dev
) == 0) {
921 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
922 ixgbe_setup_dca(adapter
);
925 /* Fall Through since DCA is disabled. */
926 case DCA_PROVIDER_REMOVE
:
927 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
928 dca_remove_requester(dev
);
929 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
930 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
938 #endif /* CONFIG_IXGBE_DCA */
940 * ixgbe_receive_skb - Send a completed packet up the stack
941 * @adapter: board private structure
942 * @skb: packet to send up
943 * @status: hardware indication of status of receive
944 * @rx_ring: rx descriptor ring (for a specific queue) to setup
945 * @rx_desc: rx descriptor
947 static void ixgbe_receive_skb(struct ixgbe_q_vector
*q_vector
,
948 struct sk_buff
*skb
, u8 status
,
949 struct ixgbe_ring
*ring
,
950 union ixgbe_adv_rx_desc
*rx_desc
)
952 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
953 struct napi_struct
*napi
= &q_vector
->napi
;
954 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
955 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
957 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
958 if (adapter
->vlgrp
&& is_vlan
&& (tag
& VLAN_VID_MASK
))
959 vlan_gro_receive(napi
, adapter
->vlgrp
, tag
, skb
);
961 napi_gro_receive(napi
, skb
);
963 if (adapter
->vlgrp
&& is_vlan
&& (tag
& VLAN_VID_MASK
))
964 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
971 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
972 * @adapter: address of board private structure
973 * @status_err: hardware indication of status of receive
974 * @skb: skb currently being received and modified
976 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
977 union ixgbe_adv_rx_desc
*rx_desc
,
980 u32 status_err
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
982 skb_checksum_none_assert(skb
);
984 /* Rx csum disabled */
985 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
988 /* if IP and error */
989 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
990 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
991 adapter
->hw_csum_rx_error
++;
995 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
998 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
999 u16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1002 * 82599 errata, UDP frames with a 0 checksum can be marked as
1005 if ((pkt_info
& IXGBE_RXDADV_PKTTYPE_UDP
) &&
1006 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
))
1009 adapter
->hw_csum_rx_error
++;
1013 /* It must be a TCP or UDP packet with a valid checksum */
1014 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1017 static inline void ixgbe_release_rx_desc(struct ixgbe_hw
*hw
,
1018 struct ixgbe_ring
*rx_ring
, u32 val
)
1021 * Force memory writes to complete before letting h/w
1022 * know there are new descriptors to fetch. (Only
1023 * applicable for weak-ordered memory model archs,
1027 IXGBE_WRITE_REG(hw
, IXGBE_RDT(rx_ring
->reg_idx
), val
);
1031 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
1032 * @adapter: address of board private structure
1034 void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
1035 struct ixgbe_ring
*rx_ring
,
1038 struct net_device
*netdev
= adapter
->netdev
;
1039 struct pci_dev
*pdev
= adapter
->pdev
;
1040 union ixgbe_adv_rx_desc
*rx_desc
;
1041 struct ixgbe_rx_buffer
*bi
;
1043 unsigned int bufsz
= rx_ring
->rx_buf_len
;
1045 i
= rx_ring
->next_to_use
;
1046 bi
= &rx_ring
->rx_buffer_info
[i
];
1048 while (cleaned_count
--) {
1049 rx_desc
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
1051 if (!bi
->page_dma
&&
1052 (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
)) {
1054 bi
->page
= netdev_alloc_page(netdev
);
1056 adapter
->alloc_rx_page_failed
++;
1059 bi
->page_offset
= 0;
1061 /* use a half page if we're re-using */
1062 bi
->page_offset
^= (PAGE_SIZE
/ 2);
1065 bi
->page_dma
= dma_map_page(&pdev
->dev
, bi
->page
,
1072 struct sk_buff
*skb
= netdev_alloc_skb_ip_align(netdev
,
1077 adapter
->alloc_rx_buff_failed
++;
1080 /* initialize queue mapping */
1081 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1085 bi
->dma
= dma_map_single(&pdev
->dev
,
1087 rx_ring
->rx_buf_len
,
1090 /* Refresh the desc even if buffer_addrs didn't change because
1091 * each write-back erases this info. */
1092 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1093 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
1094 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
1096 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
1097 rx_desc
->read
.hdr_addr
= 0;
1101 if (i
== rx_ring
->count
)
1103 bi
= &rx_ring
->rx_buffer_info
[i
];
1107 if (rx_ring
->next_to_use
!= i
) {
1108 rx_ring
->next_to_use
= i
;
1110 i
= (rx_ring
->count
- 1);
1112 ixgbe_release_rx_desc(&adapter
->hw
, rx_ring
, i
);
1116 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
1118 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
1121 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
1123 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1126 static inline u32
ixgbe_get_rsc_count(union ixgbe_adv_rx_desc
*rx_desc
)
1128 return (le32_to_cpu(rx_desc
->wb
.lower
.lo_dword
.data
) &
1129 IXGBE_RXDADV_RSCCNT_MASK
) >>
1130 IXGBE_RXDADV_RSCCNT_SHIFT
;
1134 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
1135 * @skb: pointer to the last skb in the rsc queue
1136 * @count: pointer to number of packets coalesced in this context
1138 * This function changes a queue full of hw rsc buffers into a completed
1139 * packet. It uses the ->prev pointers to find the first packet and then
1140 * turns it into the frag list owner.
1142 static inline struct sk_buff
*ixgbe_transform_rsc_queue(struct sk_buff
*skb
,
1145 unsigned int frag_list_size
= 0;
1148 struct sk_buff
*prev
= skb
->prev
;
1149 frag_list_size
+= skb
->len
;
1155 skb_shinfo(skb
)->frag_list
= skb
->next
;
1157 skb
->len
+= frag_list_size
;
1158 skb
->data_len
+= frag_list_size
;
1159 skb
->truesize
+= frag_list_size
;
1163 struct ixgbe_rsc_cb
{
1168 #define IXGBE_RSC_CB(skb) ((struct ixgbe_rsc_cb *)(skb)->cb)
1170 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1171 struct ixgbe_ring
*rx_ring
,
1172 int *work_done
, int work_to_do
)
1174 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1175 struct net_device
*netdev
= adapter
->netdev
;
1176 struct pci_dev
*pdev
= adapter
->pdev
;
1177 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
1178 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
1179 struct sk_buff
*skb
;
1180 unsigned int i
, rsc_count
= 0;
1183 bool cleaned
= false;
1184 int cleaned_count
= 0;
1185 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1188 #endif /* IXGBE_FCOE */
1190 i
= rx_ring
->next_to_clean
;
1191 rx_desc
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
1192 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1193 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1195 while (staterr
& IXGBE_RXD_STAT_DD
) {
1197 if (*work_done
>= work_to_do
)
1201 rmb(); /* read descriptor and rx_buffer_info after status DD */
1202 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1203 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
1204 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
1205 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
1206 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1207 if ((len
> IXGBE_RX_HDR_SIZE
) ||
1208 (upper_len
&& !(hdr_info
& IXGBE_RXDADV_SPH
)))
1209 len
= IXGBE_RX_HDR_SIZE
;
1211 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1215 skb
= rx_buffer_info
->skb
;
1216 prefetch(skb
->data
);
1217 rx_buffer_info
->skb
= NULL
;
1219 if (rx_buffer_info
->dma
) {
1220 if ((adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) &&
1221 (!(staterr
& IXGBE_RXD_STAT_EOP
)) &&
1224 * When HWRSC is enabled, delay unmapping
1225 * of the first packet. It carries the
1226 * header information, HW may still
1227 * access the header after the writeback.
1228 * Only unmap it when EOP is reached
1230 IXGBE_RSC_CB(skb
)->delay_unmap
= true;
1231 IXGBE_RSC_CB(skb
)->dma
= rx_buffer_info
->dma
;
1233 dma_unmap_single(&pdev
->dev
,
1234 rx_buffer_info
->dma
,
1235 rx_ring
->rx_buf_len
,
1238 rx_buffer_info
->dma
= 0;
1243 dma_unmap_page(&pdev
->dev
, rx_buffer_info
->page_dma
,
1244 PAGE_SIZE
/ 2, DMA_FROM_DEVICE
);
1245 rx_buffer_info
->page_dma
= 0;
1246 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
1247 rx_buffer_info
->page
,
1248 rx_buffer_info
->page_offset
,
1251 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
1252 (page_count(rx_buffer_info
->page
) != 1))
1253 rx_buffer_info
->page
= NULL
;
1255 get_page(rx_buffer_info
->page
);
1257 skb
->len
+= upper_len
;
1258 skb
->data_len
+= upper_len
;
1259 skb
->truesize
+= upper_len
;
1263 if (i
== rx_ring
->count
)
1266 next_rxd
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
1270 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
1271 rsc_count
= ixgbe_get_rsc_count(rx_desc
);
1274 u32 nextp
= (staterr
& IXGBE_RXDADV_NEXTP_MASK
) >>
1275 IXGBE_RXDADV_NEXTP_SHIFT
;
1276 next_buffer
= &rx_ring
->rx_buffer_info
[nextp
];
1278 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
1281 if (staterr
& IXGBE_RXD_STAT_EOP
) {
1283 skb
= ixgbe_transform_rsc_queue(skb
,
1284 &(rx_ring
->rsc_count
));
1285 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
1286 if (IXGBE_RSC_CB(skb
)->delay_unmap
) {
1287 dma_unmap_single(&pdev
->dev
,
1288 IXGBE_RSC_CB(skb
)->dma
,
1289 rx_ring
->rx_buf_len
,
1291 IXGBE_RSC_CB(skb
)->dma
= 0;
1292 IXGBE_RSC_CB(skb
)->delay_unmap
= false;
1294 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
)
1295 rx_ring
->rsc_count
+=
1296 skb_shinfo(skb
)->nr_frags
;
1298 rx_ring
->rsc_count
++;
1299 rx_ring
->rsc_flush
++;
1301 rx_ring
->stats
.packets
++;
1302 rx_ring
->stats
.bytes
+= skb
->len
;
1304 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1305 rx_buffer_info
->skb
= next_buffer
->skb
;
1306 rx_buffer_info
->dma
= next_buffer
->dma
;
1307 next_buffer
->skb
= skb
;
1308 next_buffer
->dma
= 0;
1310 skb
->next
= next_buffer
->skb
;
1311 skb
->next
->prev
= skb
;
1313 rx_ring
->non_eop_descs
++;
1317 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
1318 dev_kfree_skb_irq(skb
);
1322 ixgbe_rx_checksum(adapter
, rx_desc
, skb
);
1324 /* probably a little skewed due to removing CRC */
1325 total_rx_bytes
+= skb
->len
;
1328 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
1330 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1331 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
1332 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
1336 #endif /* IXGBE_FCOE */
1337 ixgbe_receive_skb(q_vector
, skb
, staterr
, rx_ring
, rx_desc
);
1340 rx_desc
->wb
.upper
.status_error
= 0;
1342 /* return some buffers to hardware, one at a time is too slow */
1343 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
1344 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
1348 /* use prefetched values */
1350 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1352 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1355 rx_ring
->next_to_clean
= i
;
1356 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
1359 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
1362 /* include DDPed FCoE data */
1363 if (ddp_bytes
> 0) {
1366 mss
= adapter
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
1367 sizeof(struct fc_frame_header
) -
1368 sizeof(struct fcoe_crc_eof
);
1371 total_rx_bytes
+= ddp_bytes
;
1372 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
1374 #endif /* IXGBE_FCOE */
1376 rx_ring
->total_packets
+= total_rx_packets
;
1377 rx_ring
->total_bytes
+= total_rx_bytes
;
1378 netdev
->stats
.rx_bytes
+= total_rx_bytes
;
1379 netdev
->stats
.rx_packets
+= total_rx_packets
;
1384 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
1386 * ixgbe_configure_msix - Configure MSI-X hardware
1387 * @adapter: board private structure
1389 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1392 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
1394 struct ixgbe_q_vector
*q_vector
;
1395 int i
, j
, q_vectors
, v_idx
, r_idx
;
1398 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1401 * Populate the IVAR table and set the ITR values to the
1402 * corresponding register.
1404 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
1405 q_vector
= adapter
->q_vector
[v_idx
];
1406 /* XXX for_each_set_bit(...) */
1407 r_idx
= find_first_bit(q_vector
->rxr_idx
,
1408 adapter
->num_rx_queues
);
1410 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1411 j
= adapter
->rx_ring
[r_idx
]->reg_idx
;
1412 ixgbe_set_ivar(adapter
, 0, j
, v_idx
);
1413 r_idx
= find_next_bit(q_vector
->rxr_idx
,
1414 adapter
->num_rx_queues
,
1417 r_idx
= find_first_bit(q_vector
->txr_idx
,
1418 adapter
->num_tx_queues
);
1420 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1421 j
= adapter
->tx_ring
[r_idx
]->reg_idx
;
1422 ixgbe_set_ivar(adapter
, 1, j
, v_idx
);
1423 r_idx
= find_next_bit(q_vector
->txr_idx
,
1424 adapter
->num_tx_queues
,
1428 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
1430 q_vector
->eitr
= adapter
->tx_eitr_param
;
1431 else if (q_vector
->rxr_count
)
1433 q_vector
->eitr
= adapter
->rx_eitr_param
;
1435 ixgbe_write_eitr(q_vector
);
1438 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
1439 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
1441 else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
1442 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
1443 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1445 /* set up to autoclear timer, and the vectors */
1446 mask
= IXGBE_EIMS_ENABLE_MASK
;
1447 if (adapter
->num_vfs
)
1448 mask
&= ~(IXGBE_EIMS_OTHER
|
1449 IXGBE_EIMS_MAILBOX
|
1452 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
1453 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1456 enum latency_range
{
1460 latency_invalid
= 255
1464 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1465 * @adapter: pointer to adapter
1466 * @eitr: eitr setting (ints per sec) to give last timeslice
1467 * @itr_setting: current throttle rate in ints/second
1468 * @packets: the number of packets during this measurement interval
1469 * @bytes: the number of bytes during this measurement interval
1471 * Stores a new ITR value based on packets and byte
1472 * counts during the last interrupt. The advantage of per interrupt
1473 * computation is faster updates and more accurate ITR for the current
1474 * traffic pattern. Constants in this function were computed
1475 * based on theoretical maximum wire speed and thresholds were set based
1476 * on testing data as well as attempting to minimize response time
1477 * while increasing bulk throughput.
1478 * this functionality is controlled by the InterruptThrottleRate module
1479 * parameter (see ixgbe_param.c)
1481 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
1482 u32 eitr
, u8 itr_setting
,
1483 int packets
, int bytes
)
1485 unsigned int retval
= itr_setting
;
1490 goto update_itr_done
;
1493 /* simple throttlerate management
1494 * 0-20MB/s lowest (100000 ints/s)
1495 * 20-100MB/s low (20000 ints/s)
1496 * 100-1249MB/s bulk (8000 ints/s)
1498 /* what was last interrupt timeslice? */
1499 timepassed_us
= 1000000/eitr
;
1500 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
1502 switch (itr_setting
) {
1503 case lowest_latency
:
1504 if (bytes_perint
> adapter
->eitr_low
)
1505 retval
= low_latency
;
1508 if (bytes_perint
> adapter
->eitr_high
)
1509 retval
= bulk_latency
;
1510 else if (bytes_perint
<= adapter
->eitr_low
)
1511 retval
= lowest_latency
;
1514 if (bytes_perint
<= adapter
->eitr_high
)
1515 retval
= low_latency
;
1524 * ixgbe_write_eitr - write EITR register in hardware specific way
1525 * @q_vector: structure containing interrupt and ring information
1527 * This function is made to be called by ethtool and by the driver
1528 * when it needs to update EITR registers at runtime. Hardware
1529 * specific quirks/differences are taken care of here.
1531 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1533 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1534 struct ixgbe_hw
*hw
= &adapter
->hw
;
1535 int v_idx
= q_vector
->v_idx
;
1536 u32 itr_reg
= EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
);
1538 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1539 /* must write high and low 16 bits to reset counter */
1540 itr_reg
|= (itr_reg
<< 16);
1541 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1543 * 82599 can support a value of zero, so allow it for
1544 * max interrupt rate, but there is an errata where it can
1545 * not be zero with RSC
1548 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
1552 * set the WDIS bit to not clear the timer bits and cause an
1553 * immediate assertion of the interrupt
1555 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1557 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1560 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
1562 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1564 u8 current_itr
, ret_itr
;
1566 struct ixgbe_ring
*rx_ring
, *tx_ring
;
1568 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1569 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1570 tx_ring
= adapter
->tx_ring
[r_idx
];
1571 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1573 tx_ring
->total_packets
,
1574 tx_ring
->total_bytes
);
1575 /* if the result for this queue would decrease interrupt
1576 * rate for this vector then use that result */
1577 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
1578 q_vector
->tx_itr
- 1 : ret_itr
);
1579 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1583 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1584 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1585 rx_ring
= adapter
->rx_ring
[r_idx
];
1586 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1588 rx_ring
->total_packets
,
1589 rx_ring
->total_bytes
);
1590 /* if the result for this queue would decrease interrupt
1591 * rate for this vector then use that result */
1592 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
1593 q_vector
->rx_itr
- 1 : ret_itr
);
1594 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1598 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1600 switch (current_itr
) {
1601 /* counts and packets in update_itr are dependent on these numbers */
1602 case lowest_latency
:
1606 new_itr
= 20000; /* aka hwitr = ~200 */
1614 if (new_itr
!= q_vector
->eitr
) {
1615 /* do an exponential smoothing */
1616 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1618 /* save the algorithm value here, not the smoothed one */
1619 q_vector
->eitr
= new_itr
;
1621 ixgbe_write_eitr(q_vector
);
1626 * ixgbe_check_overtemp_task - worker thread to check over tempurature
1627 * @work: pointer to work_struct containing our data
1629 static void ixgbe_check_overtemp_task(struct work_struct
*work
)
1631 struct ixgbe_adapter
*adapter
= container_of(work
,
1632 struct ixgbe_adapter
,
1633 check_overtemp_task
);
1634 struct ixgbe_hw
*hw
= &adapter
->hw
;
1635 u32 eicr
= adapter
->interrupt_event
;
1637 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
1640 switch (hw
->device_id
) {
1641 case IXGBE_DEV_ID_82599_T3_LOM
: {
1643 bool link_up
= false;
1645 if (hw
->mac
.ops
.check_link
)
1646 hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
1648 if (((eicr
& IXGBE_EICR_GPI_SDP0
) && (!link_up
)) ||
1649 (eicr
& IXGBE_EICR_LSC
))
1650 /* Check if this is due to overtemp */
1651 if (hw
->phy
.ops
.check_overtemp(hw
) == IXGBE_ERR_OVERTEMP
)
1656 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
1661 "Network adapter has been stopped because it has over heated. "
1662 "Restart the computer. If the problem persists, "
1663 "power off the system and replace the adapter\n");
1664 /* write to clear the interrupt */
1665 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP0
);
1668 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
1670 struct ixgbe_hw
*hw
= &adapter
->hw
;
1672 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
1673 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
1674 e_crit(probe
, "Fan has stopped, replace the adapter\n");
1675 /* write to clear the interrupt */
1676 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1680 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
1682 struct ixgbe_hw
*hw
= &adapter
->hw
;
1684 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
1685 /* Clear the interrupt */
1686 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1687 schedule_work(&adapter
->multispeed_fiber_task
);
1688 } else if (eicr
& IXGBE_EICR_GPI_SDP2
) {
1689 /* Clear the interrupt */
1690 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
1691 schedule_work(&adapter
->sfp_config_module_task
);
1693 /* Interrupt isn't for us... */
1698 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
1700 struct ixgbe_hw
*hw
= &adapter
->hw
;
1703 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1704 adapter
->link_check_timeout
= jiffies
;
1705 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1706 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
1707 IXGBE_WRITE_FLUSH(hw
);
1708 schedule_work(&adapter
->watchdog_task
);
1712 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
1714 struct net_device
*netdev
= data
;
1715 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1716 struct ixgbe_hw
*hw
= &adapter
->hw
;
1720 * Workaround for Silicon errata. Use clear-by-write instead
1721 * of clear-by-read. Reading with EICS will return the
1722 * interrupt causes without clearing, which later be done
1723 * with the write to EICR.
1725 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
1726 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
1728 if (eicr
& IXGBE_EICR_LSC
)
1729 ixgbe_check_lsc(adapter
);
1731 if (eicr
& IXGBE_EICR_MAILBOX
)
1732 ixgbe_msg_task(adapter
);
1734 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1735 ixgbe_check_fan_failure(adapter
, eicr
);
1737 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1738 ixgbe_check_sfp_event(adapter
, eicr
);
1739 adapter
->interrupt_event
= eicr
;
1740 if ((adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
1741 ((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)))
1742 schedule_work(&adapter
->check_overtemp_task
);
1744 /* Handle Flow Director Full threshold interrupt */
1745 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
1747 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_FLOW_DIR
);
1748 /* Disable transmits before FDIR Re-initialization */
1749 netif_tx_stop_all_queues(netdev
);
1750 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1751 struct ixgbe_ring
*tx_ring
=
1752 adapter
->tx_ring
[i
];
1753 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE
,
1754 &tx_ring
->reinit_state
))
1755 schedule_work(&adapter
->fdir_reinit_task
);
1759 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1760 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
1765 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
1770 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1771 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1772 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1774 mask
= (qmask
& 0xFFFFFFFF);
1775 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(0), mask
);
1776 mask
= (qmask
>> 32);
1777 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1), mask
);
1779 /* skip the flush */
1782 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
1787 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1788 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1789 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, mask
);
1791 mask
= (qmask
& 0xFFFFFFFF);
1792 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), mask
);
1793 mask
= (qmask
>> 32);
1794 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), mask
);
1796 /* skip the flush */
1799 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
1801 struct ixgbe_q_vector
*q_vector
= data
;
1802 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1803 struct ixgbe_ring
*tx_ring
;
1806 if (!q_vector
->txr_count
)
1809 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1810 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1811 tx_ring
= adapter
->tx_ring
[r_idx
];
1812 tx_ring
->total_bytes
= 0;
1813 tx_ring
->total_packets
= 0;
1814 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1818 /* EIAM disabled interrupts (on this vector) for us */
1819 napi_schedule(&q_vector
->napi
);
1825 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1827 * @data: pointer to our q_vector struct for this interrupt vector
1829 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
1831 struct ixgbe_q_vector
*q_vector
= data
;
1832 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1833 struct ixgbe_ring
*rx_ring
;
1837 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1838 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1839 rx_ring
= adapter
->rx_ring
[r_idx
];
1840 rx_ring
->total_bytes
= 0;
1841 rx_ring
->total_packets
= 0;
1842 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1846 if (!q_vector
->rxr_count
)
1849 /* disable interrupts on this vector only */
1850 /* EIAM disabled interrupts (on this vector) for us */
1851 napi_schedule(&q_vector
->napi
);
1856 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1858 struct ixgbe_q_vector
*q_vector
= data
;
1859 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1860 struct ixgbe_ring
*ring
;
1864 if (!q_vector
->txr_count
&& !q_vector
->rxr_count
)
1867 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1868 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1869 ring
= adapter
->tx_ring
[r_idx
];
1870 ring
->total_bytes
= 0;
1871 ring
->total_packets
= 0;
1872 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1876 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1877 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1878 ring
= adapter
->rx_ring
[r_idx
];
1879 ring
->total_bytes
= 0;
1880 ring
->total_packets
= 0;
1881 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1885 /* EIAM disabled interrupts (on this vector) for us */
1886 napi_schedule(&q_vector
->napi
);
1892 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1893 * @napi: napi struct with our devices info in it
1894 * @budget: amount of work driver is allowed to do this pass, in packets
1896 * This function is optimized for cleaning one queue only on a single
1899 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1901 struct ixgbe_q_vector
*q_vector
=
1902 container_of(napi
, struct ixgbe_q_vector
, napi
);
1903 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1904 struct ixgbe_ring
*rx_ring
= NULL
;
1908 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1909 rx_ring
= adapter
->rx_ring
[r_idx
];
1910 #ifdef CONFIG_IXGBE_DCA
1911 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1912 ixgbe_update_rx_dca(adapter
, rx_ring
);
1915 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1917 /* If all Rx work done, exit the polling mode */
1918 if (work_done
< budget
) {
1919 napi_complete(napi
);
1920 if (adapter
->rx_itr_setting
& 1)
1921 ixgbe_set_itr_msix(q_vector
);
1922 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1923 ixgbe_irq_enable_queues(adapter
,
1924 ((u64
)1 << q_vector
->v_idx
));
1931 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
1932 * @napi: napi struct with our devices info in it
1933 * @budget: amount of work driver is allowed to do this pass, in packets
1935 * This function will clean more than one rx queue associated with a
1938 static int ixgbe_clean_rxtx_many(struct napi_struct
*napi
, int budget
)
1940 struct ixgbe_q_vector
*q_vector
=
1941 container_of(napi
, struct ixgbe_q_vector
, napi
);
1942 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1943 struct ixgbe_ring
*ring
= NULL
;
1944 int work_done
= 0, i
;
1946 bool tx_clean_complete
= true;
1948 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1949 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1950 ring
= adapter
->tx_ring
[r_idx
];
1951 #ifdef CONFIG_IXGBE_DCA
1952 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1953 ixgbe_update_tx_dca(adapter
, ring
);
1955 tx_clean_complete
&= ixgbe_clean_tx_irq(q_vector
, ring
);
1956 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1960 /* attempt to distribute budget to each queue fairly, but don't allow
1961 * the budget to go below 1 because we'll exit polling */
1962 budget
/= (q_vector
->rxr_count
?: 1);
1963 budget
= max(budget
, 1);
1964 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1965 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1966 ring
= adapter
->rx_ring
[r_idx
];
1967 #ifdef CONFIG_IXGBE_DCA
1968 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1969 ixgbe_update_rx_dca(adapter
, ring
);
1971 ixgbe_clean_rx_irq(q_vector
, ring
, &work_done
, budget
);
1972 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1976 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1977 ring
= adapter
->rx_ring
[r_idx
];
1978 /* If all Rx work done, exit the polling mode */
1979 if (work_done
< budget
) {
1980 napi_complete(napi
);
1981 if (adapter
->rx_itr_setting
& 1)
1982 ixgbe_set_itr_msix(q_vector
);
1983 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1984 ixgbe_irq_enable_queues(adapter
,
1985 ((u64
)1 << q_vector
->v_idx
));
1993 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1994 * @napi: napi struct with our devices info in it
1995 * @budget: amount of work driver is allowed to do this pass, in packets
1997 * This function is optimized for cleaning one queue only on a single
2000 static int ixgbe_clean_txonly(struct napi_struct
*napi
, int budget
)
2002 struct ixgbe_q_vector
*q_vector
=
2003 container_of(napi
, struct ixgbe_q_vector
, napi
);
2004 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2005 struct ixgbe_ring
*tx_ring
= NULL
;
2009 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
2010 tx_ring
= adapter
->tx_ring
[r_idx
];
2011 #ifdef CONFIG_IXGBE_DCA
2012 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2013 ixgbe_update_tx_dca(adapter
, tx_ring
);
2016 if (!ixgbe_clean_tx_irq(q_vector
, tx_ring
))
2019 /* If all Tx work done, exit the polling mode */
2020 if (work_done
< budget
) {
2021 napi_complete(napi
);
2022 if (adapter
->tx_itr_setting
& 1)
2023 ixgbe_set_itr_msix(q_vector
);
2024 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2025 ixgbe_irq_enable_queues(adapter
,
2026 ((u64
)1 << q_vector
->v_idx
));
2032 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
2035 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
2037 set_bit(r_idx
, q_vector
->rxr_idx
);
2038 q_vector
->rxr_count
++;
2041 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
2044 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
2046 set_bit(t_idx
, q_vector
->txr_idx
);
2047 q_vector
->txr_count
++;
2051 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
2052 * @adapter: board private structure to initialize
2053 * @vectors: allotted vector count for descriptor rings
2055 * This function maps descriptor rings to the queue-specific vectors
2056 * we were allotted through the MSI-X enabling code. Ideally, we'd have
2057 * one vector per ring/queue, but on a constrained vector budget, we
2058 * group the rings as "efficiently" as possible. You would add new
2059 * mapping configurations in here.
2061 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
2065 int rxr_idx
= 0, txr_idx
= 0;
2066 int rxr_remaining
= adapter
->num_rx_queues
;
2067 int txr_remaining
= adapter
->num_tx_queues
;
2072 /* No mapping required if MSI-X is disabled. */
2073 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2077 * The ideal configuration...
2078 * We have enough vectors to map one per queue.
2080 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
2081 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
2082 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
2084 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
2085 map_vector_to_txq(adapter
, v_start
, txr_idx
);
2091 * If we don't have enough vectors for a 1-to-1
2092 * mapping, we'll have to group them so there are
2093 * multiple queues per vector.
2095 /* Re-adjusting *qpv takes care of the remainder. */
2096 for (i
= v_start
; i
< vectors
; i
++) {
2097 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
2098 for (j
= 0; j
< rqpv
; j
++) {
2099 map_vector_to_rxq(adapter
, i
, rxr_idx
);
2104 for (i
= v_start
; i
< vectors
; i
++) {
2105 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
2106 for (j
= 0; j
< tqpv
; j
++) {
2107 map_vector_to_txq(adapter
, i
, txr_idx
);
2118 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2119 * @adapter: board private structure
2121 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2122 * interrupts from the kernel.
2124 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2126 struct net_device
*netdev
= adapter
->netdev
;
2127 irqreturn_t (*handler
)(int, void *);
2128 int i
, vector
, q_vectors
, err
;
2131 /* Decrement for Other and TCP Timer vectors */
2132 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2134 /* Map the Tx/Rx rings to the vectors we were allotted. */
2135 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
2139 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
2140 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
2141 &ixgbe_msix_clean_many)
2142 for (vector
= 0; vector
< q_vectors
; vector
++) {
2143 handler
= SET_HANDLER(adapter
->q_vector
[vector
]);
2145 if (handler
== &ixgbe_msix_clean_rx
) {
2146 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2147 netdev
->name
, "rx", ri
++);
2148 } else if (handler
== &ixgbe_msix_clean_tx
) {
2149 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2150 netdev
->name
, "tx", ti
++);
2152 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2153 netdev
->name
, "TxRx", vector
);
2155 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2156 handler
, 0, adapter
->name
[vector
],
2157 adapter
->q_vector
[vector
]);
2159 e_err(probe
, "request_irq failed for MSIX interrupt "
2160 "Error: %d\n", err
);
2161 goto free_queue_irqs
;
2165 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
2166 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2167 ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
2169 e_err(probe
, "request_irq for msix_lsc failed: %d\n", err
);
2170 goto free_queue_irqs
;
2176 for (i
= vector
- 1; i
>= 0; i
--)
2177 free_irq(adapter
->msix_entries
[--vector
].vector
,
2178 adapter
->q_vector
[i
]);
2179 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2180 pci_disable_msix(adapter
->pdev
);
2181 kfree(adapter
->msix_entries
);
2182 adapter
->msix_entries
= NULL
;
2187 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
2189 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2191 u32 new_itr
= q_vector
->eitr
;
2192 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[0];
2193 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[0];
2195 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
2197 tx_ring
->total_packets
,
2198 tx_ring
->total_bytes
);
2199 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
2201 rx_ring
->total_packets
,
2202 rx_ring
->total_bytes
);
2204 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
2206 switch (current_itr
) {
2207 /* counts and packets in update_itr are dependent on these numbers */
2208 case lowest_latency
:
2212 new_itr
= 20000; /* aka hwitr = ~200 */
2221 if (new_itr
!= q_vector
->eitr
) {
2222 /* do an exponential smoothing */
2223 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
2225 /* save the algorithm value here, not the smoothed one */
2226 q_vector
->eitr
= new_itr
;
2228 ixgbe_write_eitr(q_vector
);
2233 * ixgbe_irq_enable - Enable default interrupt generation settings
2234 * @adapter: board private structure
2236 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
2240 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2241 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2242 mask
|= IXGBE_EIMS_GPI_SDP0
;
2243 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2244 mask
|= IXGBE_EIMS_GPI_SDP1
;
2245 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
2246 mask
|= IXGBE_EIMS_ECC
;
2247 mask
|= IXGBE_EIMS_GPI_SDP1
;
2248 mask
|= IXGBE_EIMS_GPI_SDP2
;
2249 if (adapter
->num_vfs
)
2250 mask
|= IXGBE_EIMS_MAILBOX
;
2252 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
2253 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
2254 mask
|= IXGBE_EIMS_FLOW_DIR
;
2256 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2257 ixgbe_irq_enable_queues(adapter
, ~0);
2258 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2260 if (adapter
->num_vfs
> 32) {
2261 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2262 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2267 * ixgbe_intr - legacy mode Interrupt Handler
2268 * @irq: interrupt number
2269 * @data: pointer to a network interface device structure
2271 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2273 struct net_device
*netdev
= data
;
2274 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2275 struct ixgbe_hw
*hw
= &adapter
->hw
;
2276 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2280 * Workaround for silicon errata. Mask the interrupts
2281 * before the read of EICR.
2283 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2285 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2286 * therefore no explict interrupt disable is necessary */
2287 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2289 /* shared interrupt alert!
2290 * make sure interrupts are enabled because the read will
2291 * have disabled interrupts due to EIAM */
2292 ixgbe_irq_enable(adapter
);
2293 return IRQ_NONE
; /* Not our interrupt */
2296 if (eicr
& IXGBE_EICR_LSC
)
2297 ixgbe_check_lsc(adapter
);
2299 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2300 ixgbe_check_sfp_event(adapter
, eicr
);
2302 ixgbe_check_fan_failure(adapter
, eicr
);
2303 if ((adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2304 ((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)))
2305 schedule_work(&adapter
->check_overtemp_task
);
2307 if (napi_schedule_prep(&(q_vector
->napi
))) {
2308 adapter
->tx_ring
[0]->total_packets
= 0;
2309 adapter
->tx_ring
[0]->total_bytes
= 0;
2310 adapter
->rx_ring
[0]->total_packets
= 0;
2311 adapter
->rx_ring
[0]->total_bytes
= 0;
2312 /* would disable interrupts here but EIAM disabled it */
2313 __napi_schedule(&(q_vector
->napi
));
2319 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
2321 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2323 for (i
= 0; i
< q_vectors
; i
++) {
2324 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
2325 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
2326 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
2327 q_vector
->rxr_count
= 0;
2328 q_vector
->txr_count
= 0;
2333 * ixgbe_request_irq - initialize interrupts
2334 * @adapter: board private structure
2336 * Attempts to configure interrupts using the best available
2337 * capabilities of the hardware and kernel.
2339 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2341 struct net_device
*netdev
= adapter
->netdev
;
2344 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2345 err
= ixgbe_request_msix_irqs(adapter
);
2346 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2347 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2348 netdev
->name
, netdev
);
2350 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2351 netdev
->name
, netdev
);
2355 e_err(probe
, "request_irq failed, Error %d\n", err
);
2360 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2362 struct net_device
*netdev
= adapter
->netdev
;
2364 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2367 q_vectors
= adapter
->num_msix_vectors
;
2370 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
2373 for (; i
>= 0; i
--) {
2374 free_irq(adapter
->msix_entries
[i
].vector
,
2375 adapter
->q_vector
[i
]);
2378 ixgbe_reset_q_vectors(adapter
);
2380 free_irq(adapter
->pdev
->irq
, netdev
);
2385 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2386 * @adapter: board private structure
2388 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2390 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2391 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2393 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2394 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2395 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2396 if (adapter
->num_vfs
> 32)
2397 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
2399 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2400 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2402 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
2403 synchronize_irq(adapter
->msix_entries
[i
].vector
);
2405 synchronize_irq(adapter
->pdev
->irq
);
2410 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2413 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2415 struct ixgbe_hw
*hw
= &adapter
->hw
;
2417 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
2418 EITR_INTS_PER_SEC_TO_REG(adapter
->rx_eitr_param
));
2420 ixgbe_set_ivar(adapter
, 0, 0, 0);
2421 ixgbe_set_ivar(adapter
, 1, 0, 0);
2423 map_vector_to_rxq(adapter
, 0, 0);
2424 map_vector_to_txq(adapter
, 0, 0);
2426 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2430 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2431 * @adapter: board private structure
2432 * @ring: structure containing ring specific data
2434 * Configure the Tx descriptor ring after a reset.
2436 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2437 struct ixgbe_ring
*ring
)
2439 struct ixgbe_hw
*hw
= &adapter
->hw
;
2440 u64 tdba
= ring
->dma
;
2443 u16 reg_idx
= ring
->reg_idx
;
2445 /* disable queue to avoid issues while updating state */
2446 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2447 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
),
2448 txdctl
& ~IXGBE_TXDCTL_ENABLE
);
2449 IXGBE_WRITE_FLUSH(hw
);
2451 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2452 (tdba
& DMA_BIT_MASK(32)));
2453 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2454 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
2455 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
2456 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
2457 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
2458 ring
->head
= IXGBE_TDH(reg_idx
);
2459 ring
->tail
= IXGBE_TDT(reg_idx
);
2461 /* configure fetching thresholds */
2462 if (adapter
->rx_itr_setting
== 0) {
2463 /* cannot set wthresh when itr==0 */
2464 txdctl
&= ~0x007F0000;
2466 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2467 txdctl
|= (8 << 16);
2469 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2470 /* PThresh workaround for Tx hang with DFP enabled. */
2474 /* reinitialize flowdirector state */
2475 set_bit(__IXGBE_FDIR_INIT_DONE
, &ring
->reinit_state
);
2478 txdctl
|= IXGBE_TXDCTL_ENABLE
;
2479 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
2481 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2482 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2483 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2486 /* poll to verify queue is enabled */
2489 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2490 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
2492 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
2495 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
2497 struct ixgbe_hw
*hw
= &adapter
->hw
;
2501 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2504 /* disable the arbiter while setting MTQC */
2505 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
2506 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
2507 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2509 /* set transmit pool layout */
2510 mask
= (IXGBE_FLAG_SRIOV_ENABLED
| IXGBE_FLAG_DCB_ENABLED
);
2511 switch (adapter
->flags
& mask
) {
2513 case (IXGBE_FLAG_SRIOV_ENABLED
):
2514 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2515 (IXGBE_MTQC_VT_ENA
| IXGBE_MTQC_64VF
));
2518 case (IXGBE_FLAG_DCB_ENABLED
):
2519 /* We enable 8 traffic classes, DCB only */
2520 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2521 (IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
));
2525 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, IXGBE_MTQC_64Q_1PB
);
2529 /* re-enable the arbiter */
2530 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
2531 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2535 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2536 * @adapter: board private structure
2538 * Configure the Tx unit of the MAC after a reset.
2540 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
2542 struct ixgbe_hw
*hw
= &adapter
->hw
;
2546 ixgbe_setup_mtqc(adapter
);
2548 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
2549 /* DMATXCTL.EN must be before Tx queues are enabled */
2550 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2551 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2552 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2555 /* Setup the HW Tx Head and Tail descriptor pointers */
2556 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2557 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
2560 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2562 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
2563 struct ixgbe_ring
*rx_ring
)
2567 struct ixgbe_ring_feature
*feature
= adapter
->ring_feature
;
2569 index
= rx_ring
->reg_idx
;
2570 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2572 mask
= (unsigned long) feature
[RING_F_RSS
].mask
;
2573 index
= index
& mask
;
2575 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
2577 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
2578 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
2579 if (adapter
->num_vfs
)
2580 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
2582 srrctl
|= (IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
2583 IXGBE_SRRCTL_BSIZEHDR_MASK
;
2585 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2586 #if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
2587 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2589 srrctl
|= (PAGE_SIZE
/ 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2591 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2593 srrctl
|= ALIGN(rx_ring
->rx_buf_len
, 1024) >>
2594 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2595 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2598 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
2601 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2603 struct ixgbe_hw
*hw
= &adapter
->hw
;
2604 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2605 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2606 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2607 u32 mrqc
= 0, reta
= 0;
2612 /* Fill out hash function seeds */
2613 for (i
= 0; i
< 10; i
++)
2614 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2616 /* Fill out redirection table */
2617 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2618 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
2620 /* reta = 4-byte sliding window of
2621 * 0x00..(indices-1)(indices-1)00..etc. */
2622 reta
= (reta
<< 8) | (j
* 0x11);
2624 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2627 /* Disable indicating checksum in descriptor, enables RSS hash */
2628 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2629 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2630 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2632 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
2633 mask
= adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
;
2635 mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
2636 #ifdef CONFIG_IXGBE_DCB
2637 | IXGBE_FLAG_DCB_ENABLED
2639 | IXGBE_FLAG_SRIOV_ENABLED
2643 case (IXGBE_FLAG_RSS_ENABLED
):
2644 mrqc
= IXGBE_MRQC_RSSEN
;
2646 case (IXGBE_FLAG_SRIOV_ENABLED
):
2647 mrqc
= IXGBE_MRQC_VMDQEN
;
2649 #ifdef CONFIG_IXGBE_DCB
2650 case (IXGBE_FLAG_DCB_ENABLED
):
2651 mrqc
= IXGBE_MRQC_RT8TCEN
;
2653 #endif /* CONFIG_IXGBE_DCB */
2658 /* Perform hash on these packet types */
2659 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2660 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2661 | IXGBE_MRQC_RSS_FIELD_IPV6
2662 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
2664 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2668 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2669 * @adapter: address of board private structure
2670 * @index: index of ring to set
2672 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
2673 struct ixgbe_ring
*ring
)
2675 struct ixgbe_hw
*hw
= &adapter
->hw
;
2678 u16 reg_idx
= ring
->reg_idx
;
2680 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
2683 rx_buf_len
= ring
->rx_buf_len
;
2684 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
2685 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2687 * we must limit the number of descriptors so that the
2688 * total size of max desc * buf_len is not greater
2691 if (ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2692 #if (MAX_SKB_FRAGS > 16)
2693 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2694 #elif (MAX_SKB_FRAGS > 8)
2695 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2696 #elif (MAX_SKB_FRAGS > 4)
2697 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2699 rscctrl
|= IXGBE_RSCCTL_MAXDESC_1
;
2702 if (rx_buf_len
< IXGBE_RXBUFFER_4096
)
2703 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2704 else if (rx_buf_len
< IXGBE_RXBUFFER_8192
)
2705 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2707 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2709 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
2713 * ixgbe_set_uta - Set unicast filter table address
2714 * @adapter: board private structure
2716 * The unicast table address is a register array of 32-bit registers.
2717 * The table is meant to be used in a way similar to how the MTA is used
2718 * however due to certain limitations in the hardware it is necessary to
2719 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
2720 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
2722 static void ixgbe_set_uta(struct ixgbe_adapter
*adapter
)
2724 struct ixgbe_hw
*hw
= &adapter
->hw
;
2727 /* The UTA table only exists on 82599 hardware and newer */
2728 if (hw
->mac
.type
< ixgbe_mac_82599EB
)
2731 /* we only need to do this if VMDq is enabled */
2732 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
2735 for (i
= 0; i
< 128; i
++)
2736 IXGBE_WRITE_REG(hw
, IXGBE_UTA(i
), ~0);
2739 #define IXGBE_MAX_RX_DESC_POLL 10
2740 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2741 struct ixgbe_ring
*ring
)
2743 struct ixgbe_hw
*hw
= &adapter
->hw
;
2744 int reg_idx
= ring
->reg_idx
;
2745 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
2748 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2749 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2750 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2755 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2756 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
2759 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
2760 "the polling period\n", reg_idx
);
2764 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
2765 struct ixgbe_ring
*ring
)
2767 struct ixgbe_hw
*hw
= &adapter
->hw
;
2768 u64 rdba
= ring
->dma
;
2770 u16 reg_idx
= ring
->reg_idx
;
2772 /* disable queue to avoid issues while updating state */
2773 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2774 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
),
2775 rxdctl
& ~IXGBE_RXDCTL_ENABLE
);
2776 IXGBE_WRITE_FLUSH(hw
);
2778 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
2779 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
2780 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
2781 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
2782 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
2783 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
2784 ring
->head
= IXGBE_RDH(reg_idx
);
2785 ring
->tail
= IXGBE_RDT(reg_idx
);
2787 ixgbe_configure_srrctl(adapter
, ring
);
2788 ixgbe_configure_rscctl(adapter
, ring
);
2790 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2792 * enable cache line friendly hardware writes:
2793 * PTHRESH=32 descriptors (half the internal cache),
2794 * this also removes ugly rx_no_buffer_count increment
2795 * HTHRESH=4 descriptors (to minimize latency on fetch)
2796 * WTHRESH=8 burst writeback up to two cache lines
2798 rxdctl
&= ~0x3FFFFF;
2802 /* enable receive descriptor ring */
2803 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
2804 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
2806 ixgbe_rx_desc_queue_enable(adapter
, ring
);
2807 ixgbe_alloc_rx_buffers(adapter
, ring
, IXGBE_DESC_UNUSED(ring
));
2810 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
2812 struct ixgbe_hw
*hw
= &adapter
->hw
;
2815 /* PSRTYPE must be initialized in non 82598 adapters */
2816 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
2817 IXGBE_PSRTYPE_UDPHDR
|
2818 IXGBE_PSRTYPE_IPV4HDR
|
2819 IXGBE_PSRTYPE_L2HDR
|
2820 IXGBE_PSRTYPE_IPV6HDR
;
2822 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2825 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)
2826 psrtype
|= (adapter
->num_rx_queues_per_pool
<< 29);
2828 for (p
= 0; p
< adapter
->num_rx_pools
; p
++)
2829 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(adapter
->num_vfs
+ p
),
2833 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
2835 struct ixgbe_hw
*hw
= &adapter
->hw
;
2838 u32 reg_offset
, vf_shift
;
2841 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
2844 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
2845 vt_reg_bits
= IXGBE_VMD_CTL_VMDQ_EN
| IXGBE_VT_CTL_REPLEN
;
2846 vt_reg_bits
|= (adapter
->num_vfs
<< IXGBE_VT_CTL_POOL_SHIFT
);
2847 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
| vt_reg_bits
);
2849 vf_shift
= adapter
->num_vfs
% 32;
2850 reg_offset
= (adapter
->num_vfs
> 32) ? 1 : 0;
2852 /* Enable only the PF's pool for Tx/Rx */
2853 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (1 << vf_shift
));
2854 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), 0);
2855 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (1 << vf_shift
));
2856 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), 0);
2857 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
2859 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
2860 hw
->mac
.ops
.set_vmdq(hw
, 0, adapter
->num_vfs
);
2863 * Set up VF register offsets for selected VT Mode,
2864 * i.e. 32 or 64 VFs for SR-IOV
2866 gcr_ext
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
2867 gcr_ext
|= IXGBE_GCR_EXT_MSIX_EN
;
2868 gcr_ext
|= IXGBE_GCR_EXT_VT_MODE_64
;
2869 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
2871 /* enable Tx loopback for VF/PF communication */
2872 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
2875 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
2877 struct ixgbe_hw
*hw
= &adapter
->hw
;
2878 struct net_device
*netdev
= adapter
->netdev
;
2879 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2881 struct ixgbe_ring
*rx_ring
;
2885 /* Decide whether to use packet split mode or not */
2886 /* Do not use packet split if we're in SR-IOV Mode */
2887 if (!adapter
->num_vfs
)
2888 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
2890 /* Set the RX buffer length according to the mode */
2891 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
2892 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
2894 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) &&
2895 (netdev
->mtu
<= ETH_DATA_LEN
))
2896 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
2898 rx_buf_len
= ALIGN(max_frame
+ VLAN_HLEN
, 1024);
2902 /* adjust max frame to be able to do baby jumbo for FCoE */
2903 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
2904 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
2905 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2907 #endif /* IXGBE_FCOE */
2908 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
2909 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
2910 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
2911 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
2913 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
2916 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
2917 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
2918 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2919 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
2922 * Setup the HW Rx Head and Tail Descriptor Pointers and
2923 * the Base and Length of the Rx Descriptor Ring
2925 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2926 rx_ring
= adapter
->rx_ring
[i
];
2927 rx_ring
->rx_buf_len
= rx_buf_len
;
2929 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)
2930 rx_ring
->flags
|= IXGBE_RING_RX_PS_ENABLED
;
2932 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2935 if (netdev
->features
& NETIF_F_FCOE_MTU
) {
2936 struct ixgbe_ring_feature
*f
;
2937 f
= &adapter
->ring_feature
[RING_F_FCOE
];
2938 if ((i
>= f
->mask
) && (i
< f
->mask
+ f
->indices
)) {
2939 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2940 if (rx_buf_len
< IXGBE_FCOE_JUMBO_FRAME_SIZE
)
2941 rx_ring
->rx_buf_len
=
2942 IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2945 #endif /* IXGBE_FCOE */
2950 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
2952 struct ixgbe_hw
*hw
= &adapter
->hw
;
2953 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2955 switch (hw
->mac
.type
) {
2956 case ixgbe_mac_82598EB
:
2958 * For VMDq support of different descriptor types or
2959 * buffer sizes through the use of multiple SRRCTL
2960 * registers, RDRXCTL.MVMEN must be set to 1
2962 * also, the manual doesn't mention it clearly but DCA hints
2963 * will only use queue 0's tags unless this bit is set. Side
2964 * effects of setting this bit are only that SRRCTL must be
2965 * fully programmed [0..15]
2967 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
2969 case ixgbe_mac_82599EB
:
2970 /* Disable RSC for ACK packets */
2971 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
2972 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
2973 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
2974 /* hardware requires some bits to be set by default */
2975 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
2976 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
2979 /* We should do nothing since we don't know this hardware */
2983 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
2987 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
2988 * @adapter: board private structure
2990 * Configure the Rx unit of the MAC after a reset.
2992 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
2994 struct ixgbe_hw
*hw
= &adapter
->hw
;
2998 /* disable receives while setting up the descriptors */
2999 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3000 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3002 ixgbe_setup_psrtype(adapter
);
3003 ixgbe_setup_rdrxctl(adapter
);
3005 /* Program registers for the distribution of queues */
3006 ixgbe_setup_mrqc(adapter
);
3008 ixgbe_set_uta(adapter
);
3010 /* set_rx_buffer_len must be called before ring initialization */
3011 ixgbe_set_rx_buffer_len(adapter
);
3014 * Setup the HW Rx Head and Tail Descriptor Pointers and
3015 * the Base and Length of the Rx Descriptor Ring
3017 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3018 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3020 /* disable drop enable for 82598 parts */
3021 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3022 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3024 /* enable all receives */
3025 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3026 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3029 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
3031 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3032 struct ixgbe_hw
*hw
= &adapter
->hw
;
3033 int pool_ndx
= adapter
->num_vfs
;
3035 /* add VID to filter table */
3036 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, true);
3039 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
3041 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3042 struct ixgbe_hw
*hw
= &adapter
->hw
;
3043 int pool_ndx
= adapter
->num_vfs
;
3045 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3046 ixgbe_irq_disable(adapter
);
3048 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
3050 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3051 ixgbe_irq_enable(adapter
);
3053 /* remove VID from filter table */
3054 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, false);
3058 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3059 * @adapter: driver data
3061 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3063 struct ixgbe_hw
*hw
= &adapter
->hw
;
3064 u32 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3067 switch (hw
->mac
.type
) {
3068 case ixgbe_mac_82598EB
:
3069 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
3070 #ifdef CONFIG_IXGBE_DCB
3071 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
3072 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3074 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3075 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3077 case ixgbe_mac_82599EB
:
3078 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
3079 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3080 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3081 #ifdef CONFIG_IXGBE_DCB
3082 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
3085 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3086 j
= adapter
->rx_ring
[i
]->reg_idx
;
3087 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3088 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3089 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3098 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3099 * @adapter: driver data
3101 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3103 struct ixgbe_hw
*hw
= &adapter
->hw
;
3104 u32 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3107 switch (hw
->mac
.type
) {
3108 case ixgbe_mac_82598EB
:
3109 vlnctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
3110 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3111 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3113 case ixgbe_mac_82599EB
:
3114 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3115 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3116 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3117 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3118 j
= adapter
->rx_ring
[i
]->reg_idx
;
3119 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3120 vlnctrl
|= IXGBE_RXDCTL_VME
;
3121 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3129 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
3130 struct vlan_group
*grp
)
3132 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3134 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3135 ixgbe_irq_disable(adapter
);
3136 adapter
->vlgrp
= grp
;
3139 * For a DCB driver, always enable VLAN tag stripping so we can
3140 * still receive traffic from a DCB-enabled host even if we're
3143 ixgbe_vlan_filter_enable(adapter
);
3145 ixgbe_vlan_rx_add_vid(netdev
, 0);
3147 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3148 ixgbe_irq_enable(adapter
);
3151 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3153 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
3155 if (adapter
->vlgrp
) {
3157 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
3158 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
3160 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
3166 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3167 * @netdev: network interface device structure
3169 * Writes unicast address list to the RAR table.
3170 * Returns: -ENOMEM on failure/insufficient address space
3171 * 0 on no addresses written
3172 * X on writing X addresses to the RAR table
3174 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3176 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3177 struct ixgbe_hw
*hw
= &adapter
->hw
;
3178 unsigned int vfn
= adapter
->num_vfs
;
3179 unsigned int rar_entries
= hw
->mac
.num_rar_entries
- (vfn
+ 1);
3182 /* return ENOMEM indicating insufficient memory for addresses */
3183 if (netdev_uc_count(netdev
) > rar_entries
)
3186 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3187 struct netdev_hw_addr
*ha
;
3188 /* return error if we do not support writing to RAR table */
3189 if (!hw
->mac
.ops
.set_rar
)
3192 netdev_for_each_uc_addr(ha
, netdev
) {
3195 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3200 /* write the addresses in reverse order to avoid write combining */
3201 for (; rar_entries
> 0 ; rar_entries
--)
3202 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3208 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3209 * @netdev: network interface device structure
3211 * The set_rx_method entry point is called whenever the unicast/multicast
3212 * address list or the network interface flags are updated. This routine is
3213 * responsible for configuring the hardware for proper unicast, multicast and
3216 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3218 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3219 struct ixgbe_hw
*hw
= &adapter
->hw
;
3220 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3223 /* Check for Promiscuous and All Multicast modes */
3225 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3227 /* set all bits that we expect to always be set */
3228 fctrl
|= IXGBE_FCTRL_BAM
;
3229 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3230 fctrl
|= IXGBE_FCTRL_PMCF
;
3232 /* clear the bits we are changing the status of */
3233 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3235 if (netdev
->flags
& IFF_PROMISC
) {
3236 hw
->addr_ctrl
.user_set_promisc
= true;
3237 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3238 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3239 /* don't hardware filter vlans in promisc mode */
3240 ixgbe_vlan_filter_disable(adapter
);
3242 if (netdev
->flags
& IFF_ALLMULTI
) {
3243 fctrl
|= IXGBE_FCTRL_MPE
;
3244 vmolr
|= IXGBE_VMOLR_MPE
;
3247 * Write addresses to the MTA, if the attempt fails
3248 * then we should just turn on promiscous mode so
3249 * that we can at least receive multicast traffic
3251 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3252 vmolr
|= IXGBE_VMOLR_ROMPE
;
3254 ixgbe_vlan_filter_enable(adapter
);
3255 hw
->addr_ctrl
.user_set_promisc
= false;
3257 * Write addresses to available RAR registers, if there is not
3258 * sufficient space to store all the addresses then enable
3259 * unicast promiscous mode
3261 count
= ixgbe_write_uc_addr_list(netdev
);
3263 fctrl
|= IXGBE_FCTRL_UPE
;
3264 vmolr
|= IXGBE_VMOLR_ROPE
;
3268 if (adapter
->num_vfs
) {
3269 ixgbe_restore_vf_multicasts(adapter
);
3270 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
)) &
3271 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3273 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
), vmolr
);
3276 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3279 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3282 struct ixgbe_q_vector
*q_vector
;
3283 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3285 /* legacy and MSI only use one vector */
3286 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3289 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3290 struct napi_struct
*napi
;
3291 q_vector
= adapter
->q_vector
[q_idx
];
3292 napi
= &q_vector
->napi
;
3293 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3294 if (!q_vector
->rxr_count
|| !q_vector
->txr_count
) {
3295 if (q_vector
->txr_count
== 1)
3296 napi
->poll
= &ixgbe_clean_txonly
;
3297 else if (q_vector
->rxr_count
== 1)
3298 napi
->poll
= &ixgbe_clean_rxonly
;
3306 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3309 struct ixgbe_q_vector
*q_vector
;
3310 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3312 /* legacy and MSI only use one vector */
3313 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3316 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3317 q_vector
= adapter
->q_vector
[q_idx
];
3318 napi_disable(&q_vector
->napi
);
3322 #ifdef CONFIG_IXGBE_DCB
3324 * ixgbe_configure_dcb - Configure DCB hardware
3325 * @adapter: ixgbe adapter struct
3327 * This is called by the driver on open to configure the DCB hardware.
3328 * This is also called by the gennetlink interface when reconfiguring
3331 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3333 struct ixgbe_hw
*hw
= &adapter
->hw
;
3337 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
3338 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3339 netif_set_gso_max_size(adapter
->netdev
, 65536);
3343 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3344 netif_set_gso_max_size(adapter
->netdev
, 32768);
3346 ixgbe_dcb_check_config(&adapter
->dcb_cfg
);
3347 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_TX_CONFIG
);
3348 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_RX_CONFIG
);
3350 /* reconfigure the hardware */
3351 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
3353 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3354 j
= adapter
->tx_ring
[i
]->reg_idx
;
3355 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3356 /* PThresh workaround for Tx hang with DFP enabled. */
3358 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
3360 /* Enable VLAN tag insert/strip */
3361 ixgbe_vlan_filter_enable(adapter
);
3363 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
3367 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
3369 struct net_device
*netdev
= adapter
->netdev
;
3370 struct ixgbe_hw
*hw
= &adapter
->hw
;
3373 ixgbe_set_rx_mode(netdev
);
3375 ixgbe_restore_vlan(adapter
);
3376 #ifdef CONFIG_IXGBE_DCB
3377 ixgbe_configure_dcb(adapter
);
3381 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
3382 ixgbe_configure_fcoe(adapter
);
3384 #endif /* IXGBE_FCOE */
3385 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3386 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3387 adapter
->tx_ring
[i
]->atr_sample_rate
=
3388 adapter
->atr_sample_rate
;
3389 ixgbe_init_fdir_signature_82599(hw
, adapter
->fdir_pballoc
);
3390 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
3391 ixgbe_init_fdir_perfect_82599(hw
, adapter
->fdir_pballoc
);
3393 ixgbe_configure_virtualization(adapter
);
3395 ixgbe_configure_tx(adapter
);
3396 ixgbe_configure_rx(adapter
);
3399 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
3401 switch (hw
->phy
.type
) {
3402 case ixgbe_phy_sfp_avago
:
3403 case ixgbe_phy_sfp_ftl
:
3404 case ixgbe_phy_sfp_intel
:
3405 case ixgbe_phy_sfp_unknown
:
3406 case ixgbe_phy_sfp_passive_tyco
:
3407 case ixgbe_phy_sfp_passive_unknown
:
3408 case ixgbe_phy_sfp_active_unknown
:
3409 case ixgbe_phy_sfp_ftl_active
:
3417 * ixgbe_sfp_link_config - set up SFP+ link
3418 * @adapter: pointer to private adapter struct
3420 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
3422 struct ixgbe_hw
*hw
= &adapter
->hw
;
3424 if (hw
->phy
.multispeed_fiber
) {
3426 * In multispeed fiber setups, the device may not have
3427 * had a physical connection when the driver loaded.
3428 * If that's the case, the initial link configuration
3429 * couldn't get the MAC into 10G or 1G mode, so we'll
3430 * never have a link status change interrupt fire.
3431 * We need to try and force an autonegotiation
3432 * session, then bring up link.
3434 hw
->mac
.ops
.setup_sfp(hw
);
3435 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
3436 schedule_work(&adapter
->multispeed_fiber_task
);
3439 * Direct Attach Cu and non-multispeed fiber modules
3440 * still need to be configured properly prior to
3443 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_MOD_TASK
))
3444 schedule_work(&adapter
->sfp_config_module_task
);
3449 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3450 * @hw: pointer to private hardware struct
3452 * Returns 0 on success, negative on failure
3454 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
3457 bool negotiation
, link_up
= false;
3458 u32 ret
= IXGBE_ERR_LINK_SETUP
;
3460 if (hw
->mac
.ops
.check_link
)
3461 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
3466 if (hw
->mac
.ops
.get_link_capabilities
)
3467 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3472 if (hw
->mac
.ops
.setup_link
)
3473 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
3478 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
3480 struct ixgbe_hw
*hw
= &adapter
->hw
;
3483 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3484 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
3486 gpie
|= IXGBE_GPIE_EIAME
;
3488 * use EIAM to auto-mask when MSI-X interrupt is asserted
3489 * this saves a register write for every interrupt
3491 switch (hw
->mac
.type
) {
3492 case ixgbe_mac_82598EB
:
3493 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3496 case ixgbe_mac_82599EB
:
3497 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3498 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3502 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3503 * specifically only auto mask tx and rx interrupts */
3504 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3507 /* XXX: to interrupt immediately for EICS writes, enable this */
3508 /* gpie |= IXGBE_GPIE_EIMEN; */
3510 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3511 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
3512 gpie
|= IXGBE_GPIE_VTMODE_64
;
3515 /* Enable fan failure interrupt */
3516 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
3517 gpie
|= IXGBE_SDP1_GPIEN
;
3519 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3520 gpie
|= IXGBE_SDP1_GPIEN
;
3521 gpie
|= IXGBE_SDP2_GPIEN
;
3523 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3526 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
3528 struct ixgbe_hw
*hw
= &adapter
->hw
;
3532 ixgbe_get_hw_control(adapter
);
3533 ixgbe_setup_gpie(adapter
);
3535 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3536 ixgbe_configure_msix(adapter
);
3538 ixgbe_configure_msi_and_legacy(adapter
);
3540 /* enable the optics */
3541 if (hw
->phy
.multispeed_fiber
)
3542 hw
->mac
.ops
.enable_tx_laser(hw
);
3544 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
3545 ixgbe_napi_enable_all(adapter
);
3547 /* clear any pending interrupts, may auto mask */
3548 IXGBE_READ_REG(hw
, IXGBE_EICR
);
3549 ixgbe_irq_enable(adapter
);
3552 * If this adapter has a fan, check to see if we had a failure
3553 * before we enabled the interrupt.
3555 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
3556 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
3557 if (esdp
& IXGBE_ESDP_SDP1
)
3558 e_crit(drv
, "Fan has stopped, replace the adapter\n");
3562 * For hot-pluggable SFP+ devices, a new SFP+ module may have
3563 * arrived before interrupts were enabled but after probe. Such
3564 * devices wouldn't have their type identified yet. We need to
3565 * kick off the SFP+ module setup first, then try to bring up link.
3566 * If we're not hot-pluggable SFP+, we just need to configure link
3569 if (hw
->phy
.type
== ixgbe_phy_unknown
) {
3570 err
= hw
->phy
.ops
.identify(hw
);
3571 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3573 * Take the device down and schedule the sfp tasklet
3574 * which will unregister_netdev and log it.
3576 ixgbe_down(adapter
);
3577 schedule_work(&adapter
->sfp_config_module_task
);
3582 if (ixgbe_is_sfp(hw
)) {
3583 ixgbe_sfp_link_config(adapter
);
3585 err
= ixgbe_non_sfp_link_config(hw
);
3587 e_err(probe
, "link_config FAILED %d\n", err
);
3590 /* enable transmits */
3591 netif_tx_start_all_queues(adapter
->netdev
);
3593 /* bring the link up in the watchdog, this could race with our first
3594 * link up interrupt but shouldn't be a problem */
3595 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
3596 adapter
->link_check_timeout
= jiffies
;
3597 mod_timer(&adapter
->watchdog_timer
, jiffies
);
3599 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
3600 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
3601 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
3602 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
3607 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
3609 WARN_ON(in_interrupt());
3610 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
3612 ixgbe_down(adapter
);
3614 * If SR-IOV enabled then wait a bit before bringing the adapter
3615 * back up to give the VFs time to respond to the reset. The
3616 * two second wait is based upon the watchdog timer cycle in
3619 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3622 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
3625 int ixgbe_up(struct ixgbe_adapter
*adapter
)
3627 /* hardware has been reset, we need to reload some things */
3628 ixgbe_configure(adapter
);
3630 return ixgbe_up_complete(adapter
);
3633 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
3635 struct ixgbe_hw
*hw
= &adapter
->hw
;
3638 err
= hw
->mac
.ops
.init_hw(hw
);
3641 case IXGBE_ERR_SFP_NOT_PRESENT
:
3643 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
3644 e_dev_err("master disable timed out\n");
3646 case IXGBE_ERR_EEPROM_VERSION
:
3647 /* We are running on a pre-production device, log a warning */
3648 e_dev_warn("This device is a pre-production adapter/LOM. "
3649 "Please be aware there may be issuesassociated with "
3650 "your hardware. If you are experiencing problems "
3651 "please contact your Intel or hardware "
3652 "representative who provided you with this "
3656 e_dev_err("Hardware Error: %d\n", err
);
3659 /* reprogram the RAR[0] in case user changed it. */
3660 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
3665 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
3666 * @adapter: board private structure
3667 * @rx_ring: ring to free buffers from
3669 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
3670 struct ixgbe_ring
*rx_ring
)
3672 struct pci_dev
*pdev
= adapter
->pdev
;
3676 /* ring already cleared, nothing to do */
3677 if (!rx_ring
->rx_buffer_info
)
3680 /* Free all the Rx ring sk_buffs */
3681 for (i
= 0; i
< rx_ring
->count
; i
++) {
3682 struct ixgbe_rx_buffer
*rx_buffer_info
;
3684 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3685 if (rx_buffer_info
->dma
) {
3686 dma_unmap_single(&pdev
->dev
, rx_buffer_info
->dma
,
3687 rx_ring
->rx_buf_len
,
3689 rx_buffer_info
->dma
= 0;
3691 if (rx_buffer_info
->skb
) {
3692 struct sk_buff
*skb
= rx_buffer_info
->skb
;
3693 rx_buffer_info
->skb
= NULL
;
3695 struct sk_buff
*this = skb
;
3696 if (IXGBE_RSC_CB(this)->delay_unmap
) {
3697 dma_unmap_single(&pdev
->dev
,
3698 IXGBE_RSC_CB(this)->dma
,
3699 rx_ring
->rx_buf_len
,
3701 IXGBE_RSC_CB(this)->dma
= 0;
3702 IXGBE_RSC_CB(skb
)->delay_unmap
= false;
3705 dev_kfree_skb(this);
3708 if (!rx_buffer_info
->page
)
3710 if (rx_buffer_info
->page_dma
) {
3711 dma_unmap_page(&pdev
->dev
, rx_buffer_info
->page_dma
,
3712 PAGE_SIZE
/ 2, DMA_FROM_DEVICE
);
3713 rx_buffer_info
->page_dma
= 0;
3715 put_page(rx_buffer_info
->page
);
3716 rx_buffer_info
->page
= NULL
;
3717 rx_buffer_info
->page_offset
= 0;
3720 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
3721 memset(rx_ring
->rx_buffer_info
, 0, size
);
3723 /* Zero out the descriptor ring */
3724 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3726 rx_ring
->next_to_clean
= 0;
3727 rx_ring
->next_to_use
= 0;
3730 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
3732 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
3736 * ixgbe_clean_tx_ring - Free Tx Buffers
3737 * @adapter: board private structure
3738 * @tx_ring: ring to be cleaned
3740 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
3741 struct ixgbe_ring
*tx_ring
)
3743 struct ixgbe_tx_buffer
*tx_buffer_info
;
3747 /* ring already cleared, nothing to do */
3748 if (!tx_ring
->tx_buffer_info
)
3751 /* Free all the Tx ring sk_buffs */
3752 for (i
= 0; i
< tx_ring
->count
; i
++) {
3753 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3754 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
3757 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
3758 memset(tx_ring
->tx_buffer_info
, 0, size
);
3760 /* Zero out the descriptor ring */
3761 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3763 tx_ring
->next_to_use
= 0;
3764 tx_ring
->next_to_clean
= 0;
3767 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
3769 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3773 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
3774 * @adapter: board private structure
3776 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
3780 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3781 ixgbe_clean_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3785 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
3786 * @adapter: board private structure
3788 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
3792 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3793 ixgbe_clean_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3796 void ixgbe_down(struct ixgbe_adapter
*adapter
)
3798 struct net_device
*netdev
= adapter
->netdev
;
3799 struct ixgbe_hw
*hw
= &adapter
->hw
;
3804 /* signal that we are down to the interrupt handler */
3805 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3807 /* disable receive for all VFs and wait one second */
3808 if (adapter
->num_vfs
) {
3809 /* ping all the active vfs to let them know we are going down */
3810 ixgbe_ping_all_vfs(adapter
);
3812 /* Disable all VFTE/VFRE TX/RX */
3813 ixgbe_disable_tx_rx(adapter
);
3815 /* Mark all the VFs as inactive */
3816 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
3817 adapter
->vfinfo
[i
].clear_to_send
= 0;
3820 /* disable receives */
3821 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3822 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3824 IXGBE_WRITE_FLUSH(hw
);
3827 netif_tx_stop_all_queues(netdev
);
3829 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3830 del_timer_sync(&adapter
->sfp_timer
);
3831 del_timer_sync(&adapter
->watchdog_timer
);
3832 cancel_work_sync(&adapter
->watchdog_task
);
3834 netif_carrier_off(netdev
);
3835 netif_tx_disable(netdev
);
3837 ixgbe_irq_disable(adapter
);
3839 ixgbe_napi_disable_all(adapter
);
3841 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3842 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3843 cancel_work_sync(&adapter
->fdir_reinit_task
);
3845 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
3846 cancel_work_sync(&adapter
->check_overtemp_task
);
3848 /* disable transmits in the hardware now that interrupts are off */
3849 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3850 j
= adapter
->tx_ring
[i
]->reg_idx
;
3851 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3852 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
3853 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
3855 /* Disable the Tx DMA engine on 82599 */
3856 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3857 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
3858 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
3859 ~IXGBE_DMATXCTL_TE
));
3861 /* power down the optics */
3862 if (hw
->phy
.multispeed_fiber
)
3863 hw
->mac
.ops
.disable_tx_laser(hw
);
3865 /* clear n-tuple filters that are cached */
3866 ethtool_ntuple_flush(netdev
);
3868 if (!pci_channel_offline(adapter
->pdev
))
3869 ixgbe_reset(adapter
);
3870 ixgbe_clean_all_tx_rings(adapter
);
3871 ixgbe_clean_all_rx_rings(adapter
);
3873 #ifdef CONFIG_IXGBE_DCA
3874 /* since we reset the hardware DCA settings were cleared */
3875 ixgbe_setup_dca(adapter
);
3880 * ixgbe_poll - NAPI Rx polling callback
3881 * @napi: structure for representing this polling device
3882 * @budget: how many packets driver is allowed to clean
3884 * This function is used for legacy and MSI, NAPI mode
3886 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
3888 struct ixgbe_q_vector
*q_vector
=
3889 container_of(napi
, struct ixgbe_q_vector
, napi
);
3890 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
3891 int tx_clean_complete
, work_done
= 0;
3893 #ifdef CONFIG_IXGBE_DCA
3894 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3895 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
[0]);
3896 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
[0]);
3900 tx_clean_complete
= ixgbe_clean_tx_irq(q_vector
, adapter
->tx_ring
[0]);
3901 ixgbe_clean_rx_irq(q_vector
, adapter
->rx_ring
[0], &work_done
, budget
);
3903 if (!tx_clean_complete
)
3906 /* If budget not fully consumed, exit the polling mode */
3907 if (work_done
< budget
) {
3908 napi_complete(napi
);
3909 if (adapter
->rx_itr_setting
& 1)
3910 ixgbe_set_itr(adapter
);
3911 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3912 ixgbe_irq_enable_queues(adapter
, IXGBE_EIMS_RTX_QUEUE
);
3918 * ixgbe_tx_timeout - Respond to a Tx Hang
3919 * @netdev: network interface device structure
3921 static void ixgbe_tx_timeout(struct net_device
*netdev
)
3923 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3925 /* Do the reset outside of interrupt context */
3926 schedule_work(&adapter
->reset_task
);
3929 static void ixgbe_reset_task(struct work_struct
*work
)
3931 struct ixgbe_adapter
*adapter
;
3932 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
3934 /* If we're already down or resetting, just bail */
3935 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
3936 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
3939 adapter
->tx_timeout_count
++;
3941 ixgbe_dump(adapter
);
3942 netdev_err(adapter
->netdev
, "Reset adapter\n");
3943 ixgbe_reinit_locked(adapter
);
3946 #ifdef CONFIG_IXGBE_DCB
3947 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter
*adapter
)
3950 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_DCB
];
3952 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
3956 adapter
->num_rx_queues
= f
->indices
;
3957 adapter
->num_tx_queues
= f
->indices
;
3965 * ixgbe_set_rss_queues: Allocate queues for RSS
3966 * @adapter: board private structure to initialize
3968 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3969 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3972 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter
*adapter
)
3975 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_RSS
];
3977 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3979 adapter
->num_rx_queues
= f
->indices
;
3980 adapter
->num_tx_queues
= f
->indices
;
3990 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3991 * @adapter: board private structure to initialize
3993 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3994 * to the original CPU that initiated the Tx session. This runs in addition
3995 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3996 * Rx load across CPUs using RSS.
3999 static inline bool ixgbe_set_fdir_queues(struct ixgbe_adapter
*adapter
)
4002 struct ixgbe_ring_feature
*f_fdir
= &adapter
->ring_feature
[RING_F_FDIR
];
4004 f_fdir
->indices
= min((int)num_online_cpus(), f_fdir
->indices
);
4007 /* Flow Director must have RSS enabled */
4008 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
4009 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4010 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)))) {
4011 adapter
->num_tx_queues
= f_fdir
->indices
;
4012 adapter
->num_rx_queues
= f_fdir
->indices
;
4015 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4016 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4023 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
4024 * @adapter: board private structure to initialize
4026 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
4027 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
4028 * rx queues out of the max number of rx queues, instead, it is used as the
4029 * index of the first rx queue used by FCoE.
4032 static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter
*adapter
)
4035 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
4037 f
->indices
= min((int)num_online_cpus(), f
->indices
);
4038 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
4039 adapter
->num_rx_queues
= 1;
4040 adapter
->num_tx_queues
= 1;
4041 #ifdef CONFIG_IXGBE_DCB
4042 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4043 e_info(probe
, "FCoE enabled with DCB\n");
4044 ixgbe_set_dcb_queues(adapter
);
4047 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4048 e_info(probe
, "FCoE enabled with RSS\n");
4049 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4050 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
4051 ixgbe_set_fdir_queues(adapter
);
4053 ixgbe_set_rss_queues(adapter
);
4055 /* adding FCoE rx rings to the end */
4056 f
->mask
= adapter
->num_rx_queues
;
4057 adapter
->num_rx_queues
+= f
->indices
;
4058 adapter
->num_tx_queues
+= f
->indices
;
4066 #endif /* IXGBE_FCOE */
4068 * ixgbe_set_sriov_queues: Allocate queues for IOV use
4069 * @adapter: board private structure to initialize
4071 * IOV doesn't actually use anything, so just NAK the
4072 * request for now and let the other queue routines
4073 * figure out what to do.
4075 static inline bool ixgbe_set_sriov_queues(struct ixgbe_adapter
*adapter
)
4081 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
4082 * @adapter: board private structure to initialize
4084 * This is the top level queue allocation routine. The order here is very
4085 * important, starting with the "most" number of features turned on at once,
4086 * and ending with the smallest set of features. This way large combinations
4087 * can be allocated if they're turned on, and smaller combinations are the
4088 * fallthrough conditions.
4091 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
4093 /* Start with base case */
4094 adapter
->num_rx_queues
= 1;
4095 adapter
->num_tx_queues
= 1;
4096 adapter
->num_rx_pools
= adapter
->num_rx_queues
;
4097 adapter
->num_rx_queues_per_pool
= 1;
4099 if (ixgbe_set_sriov_queues(adapter
))
4103 if (ixgbe_set_fcoe_queues(adapter
))
4106 #endif /* IXGBE_FCOE */
4107 #ifdef CONFIG_IXGBE_DCB
4108 if (ixgbe_set_dcb_queues(adapter
))
4112 if (ixgbe_set_fdir_queues(adapter
))
4115 if (ixgbe_set_rss_queues(adapter
))
4118 /* fallback to base case */
4119 adapter
->num_rx_queues
= 1;
4120 adapter
->num_tx_queues
= 1;
4123 /* Notify the stack of the (possibly) reduced Tx Queue count. */
4124 netif_set_real_num_tx_queues(adapter
->netdev
, adapter
->num_tx_queues
);
4127 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
4130 int err
, vector_threshold
;
4132 /* We'll want at least 3 (vector_threshold):
4135 * 3) Other (Link Status Change, etc.)
4136 * 4) TCP Timer (optional)
4138 vector_threshold
= MIN_MSIX_COUNT
;
4140 /* The more we get, the more we will assign to Tx/Rx Cleanup
4141 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
4142 * Right now, we simply care about how many we'll get; we'll
4143 * set them up later while requesting irq's.
4145 while (vectors
>= vector_threshold
) {
4146 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
4148 if (!err
) /* Success in acquiring all requested vectors. */
4151 vectors
= 0; /* Nasty failure, quit now */
4152 else /* err == number of vectors we should try again with */
4156 if (vectors
< vector_threshold
) {
4157 /* Can't allocate enough MSI-X interrupts? Oh well.
4158 * This just means we'll go with either a single MSI
4159 * vector or fall back to legacy interrupts.
4161 netif_printk(adapter
, hw
, KERN_DEBUG
, adapter
->netdev
,
4162 "Unable to allocate MSI-X interrupts\n");
4163 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
4164 kfree(adapter
->msix_entries
);
4165 adapter
->msix_entries
= NULL
;
4167 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
4169 * Adjust for only the vectors we'll use, which is minimum
4170 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
4171 * vectors we were allocated.
4173 adapter
->num_msix_vectors
= min(vectors
,
4174 adapter
->max_msix_q_vectors
+ NON_Q_VECTORS
);
4179 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
4180 * @adapter: board private structure to initialize
4182 * Cache the descriptor ring offsets for RSS to the assigned rings.
4185 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter
*adapter
)
4190 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4191 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4192 adapter
->rx_ring
[i
]->reg_idx
= i
;
4193 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4194 adapter
->tx_ring
[i
]->reg_idx
= i
;
4203 #ifdef CONFIG_IXGBE_DCB
4205 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
4206 * @adapter: board private structure to initialize
4208 * Cache the descriptor ring offsets for DCB to the assigned rings.
4211 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter
*adapter
)
4215 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
4217 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4218 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
4219 /* the number of queues is assumed to be symmetric */
4220 for (i
= 0; i
< dcb_i
; i
++) {
4221 adapter
->rx_ring
[i
]->reg_idx
= i
<< 3;
4222 adapter
->tx_ring
[i
]->reg_idx
= i
<< 2;
4225 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
4228 * Tx TC0 starts at: descriptor queue 0
4229 * Tx TC1 starts at: descriptor queue 32
4230 * Tx TC2 starts at: descriptor queue 64
4231 * Tx TC3 starts at: descriptor queue 80
4232 * Tx TC4 starts at: descriptor queue 96
4233 * Tx TC5 starts at: descriptor queue 104
4234 * Tx TC6 starts at: descriptor queue 112
4235 * Tx TC7 starts at: descriptor queue 120
4237 * Rx TC0-TC7 are offset by 16 queues each
4239 for (i
= 0; i
< 3; i
++) {
4240 adapter
->tx_ring
[i
]->reg_idx
= i
<< 5;
4241 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4243 for ( ; i
< 5; i
++) {
4244 adapter
->tx_ring
[i
]->reg_idx
=
4246 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4248 for ( ; i
< dcb_i
; i
++) {
4249 adapter
->tx_ring
[i
]->reg_idx
=
4251 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4255 } else if (dcb_i
== 4) {
4257 * Tx TC0 starts at: descriptor queue 0
4258 * Tx TC1 starts at: descriptor queue 64
4259 * Tx TC2 starts at: descriptor queue 96
4260 * Tx TC3 starts at: descriptor queue 112
4262 * Rx TC0-TC3 are offset by 32 queues each
4264 adapter
->tx_ring
[0]->reg_idx
= 0;
4265 adapter
->tx_ring
[1]->reg_idx
= 64;
4266 adapter
->tx_ring
[2]->reg_idx
= 96;
4267 adapter
->tx_ring
[3]->reg_idx
= 112;
4268 for (i
= 0 ; i
< dcb_i
; i
++)
4269 adapter
->rx_ring
[i
]->reg_idx
= i
<< 5;
4287 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
4288 * @adapter: board private structure to initialize
4290 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
4293 static inline bool ixgbe_cache_ring_fdir(struct ixgbe_adapter
*adapter
)
4298 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
4299 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4300 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))) {
4301 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4302 adapter
->rx_ring
[i
]->reg_idx
= i
;
4303 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4304 adapter
->tx_ring
[i
]->reg_idx
= i
;
4313 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
4314 * @adapter: board private structure to initialize
4316 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
4319 static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter
*adapter
)
4321 int i
, fcoe_rx_i
= 0, fcoe_tx_i
= 0;
4323 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
4325 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
4326 #ifdef CONFIG_IXGBE_DCB
4327 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4328 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
4330 ixgbe_cache_ring_dcb(adapter
);
4331 /* find out queues in TC for FCoE */
4332 fcoe_rx_i
= adapter
->rx_ring
[fcoe
->tc
]->reg_idx
+ 1;
4333 fcoe_tx_i
= adapter
->tx_ring
[fcoe
->tc
]->reg_idx
+ 1;
4335 * In 82599, the number of Tx queues for each traffic
4336 * class for both 8-TC and 4-TC modes are:
4337 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
4338 * 8 TCs: 32 32 16 16 8 8 8 8
4339 * 4 TCs: 64 64 32 32
4340 * We have max 8 queues for FCoE, where 8 the is
4341 * FCoE redirection table size. If TC for FCoE is
4342 * less than or equal to TC3, we have enough queues
4343 * to add max of 8 queues for FCoE, so we start FCoE
4344 * tx descriptor from the next one, i.e., reg_idx + 1.
4345 * If TC for FCoE is above TC3, implying 8 TC mode,
4346 * and we need 8 for FCoE, we have to take all queues
4347 * in that traffic class for FCoE.
4349 if ((f
->indices
== IXGBE_FCRETA_SIZE
) && (fcoe
->tc
> 3))
4352 #endif /* CONFIG_IXGBE_DCB */
4353 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4354 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4355 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
4356 ixgbe_cache_ring_fdir(adapter
);
4358 ixgbe_cache_ring_rss(adapter
);
4360 fcoe_rx_i
= f
->mask
;
4361 fcoe_tx_i
= f
->mask
;
4363 for (i
= 0; i
< f
->indices
; i
++, fcoe_rx_i
++, fcoe_tx_i
++) {
4364 adapter
->rx_ring
[f
->mask
+ i
]->reg_idx
= fcoe_rx_i
;
4365 adapter
->tx_ring
[f
->mask
+ i
]->reg_idx
= fcoe_tx_i
;
4372 #endif /* IXGBE_FCOE */
4374 * ixgbe_cache_ring_sriov - Descriptor ring to register mapping for sriov
4375 * @adapter: board private structure to initialize
4377 * SR-IOV doesn't use any descriptor rings but changes the default if
4378 * no other mapping is used.
4381 static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter
*adapter
)
4383 adapter
->rx_ring
[0]->reg_idx
= adapter
->num_vfs
* 2;
4384 adapter
->tx_ring
[0]->reg_idx
= adapter
->num_vfs
* 2;
4385 if (adapter
->num_vfs
)
4392 * ixgbe_cache_ring_register - Descriptor ring to register mapping
4393 * @adapter: board private structure to initialize
4395 * Once we know the feature-set enabled for the device, we'll cache
4396 * the register offset the descriptor ring is assigned to.
4398 * Note, the order the various feature calls is important. It must start with
4399 * the "most" features enabled at the same time, then trickle down to the
4400 * least amount of features turned on at once.
4402 static void ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
4404 /* start with default case */
4405 adapter
->rx_ring
[0]->reg_idx
= 0;
4406 adapter
->tx_ring
[0]->reg_idx
= 0;
4408 if (ixgbe_cache_ring_sriov(adapter
))
4412 if (ixgbe_cache_ring_fcoe(adapter
))
4415 #endif /* IXGBE_FCOE */
4416 #ifdef CONFIG_IXGBE_DCB
4417 if (ixgbe_cache_ring_dcb(adapter
))
4421 if (ixgbe_cache_ring_fdir(adapter
))
4424 if (ixgbe_cache_ring_rss(adapter
))
4429 * ixgbe_alloc_queues - Allocate memory for all rings
4430 * @adapter: board private structure to initialize
4432 * We allocate one ring per queue at run-time since we don't know the
4433 * number of queues at compile-time. The polling_netdev array is
4434 * intended for Multiqueue, but should work fine with a single queue.
4436 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
4439 int orig_node
= adapter
->node
;
4441 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4442 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
4443 if (orig_node
== -1) {
4444 int cur_node
= next_online_node(adapter
->node
);
4445 if (cur_node
== MAX_NUMNODES
)
4446 cur_node
= first_online_node
;
4447 adapter
->node
= cur_node
;
4449 ring
= kzalloc_node(sizeof(struct ixgbe_ring
), GFP_KERNEL
,
4452 ring
= kzalloc(sizeof(struct ixgbe_ring
), GFP_KERNEL
);
4454 goto err_tx_ring_allocation
;
4455 ring
->count
= adapter
->tx_ring_count
;
4456 ring
->queue_index
= i
;
4457 ring
->numa_node
= adapter
->node
;
4459 adapter
->tx_ring
[i
] = ring
;
4462 /* Restore the adapter's original node */
4463 adapter
->node
= orig_node
;
4465 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4466 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4467 if (orig_node
== -1) {
4468 int cur_node
= next_online_node(adapter
->node
);
4469 if (cur_node
== MAX_NUMNODES
)
4470 cur_node
= first_online_node
;
4471 adapter
->node
= cur_node
;
4473 ring
= kzalloc_node(sizeof(struct ixgbe_ring
), GFP_KERNEL
,
4476 ring
= kzalloc(sizeof(struct ixgbe_ring
), GFP_KERNEL
);
4478 goto err_rx_ring_allocation
;
4479 ring
->count
= adapter
->rx_ring_count
;
4480 ring
->queue_index
= i
;
4481 ring
->numa_node
= adapter
->node
;
4483 adapter
->rx_ring
[i
] = ring
;
4486 /* Restore the adapter's original node */
4487 adapter
->node
= orig_node
;
4489 ixgbe_cache_ring_register(adapter
);
4493 err_rx_ring_allocation
:
4494 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4495 kfree(adapter
->tx_ring
[i
]);
4496 err_tx_ring_allocation
:
4501 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
4502 * @adapter: board private structure to initialize
4504 * Attempt to configure the interrupts using the best available
4505 * capabilities of the hardware and the kernel.
4507 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter
*adapter
)
4509 struct ixgbe_hw
*hw
= &adapter
->hw
;
4511 int vector
, v_budget
;
4514 * It's easy to be greedy for MSI-X vectors, but it really
4515 * doesn't do us much good if we have a lot more vectors
4516 * than CPU's. So let's be conservative and only ask for
4517 * (roughly) the same number of vectors as there are CPU's.
4519 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
4520 (int)num_online_cpus()) + NON_Q_VECTORS
;
4523 * At the same time, hardware can only support a maximum of
4524 * hw.mac->max_msix_vectors vectors. With features
4525 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
4526 * descriptor queues supported by our device. Thus, we cap it off in
4527 * those rare cases where the cpu count also exceeds our vector limit.
4529 v_budget
= min(v_budget
, (int)hw
->mac
.max_msix_vectors
);
4531 /* A failure in MSI-X entry allocation isn't fatal, but it does
4532 * mean we disable MSI-X capabilities of the adapter. */
4533 adapter
->msix_entries
= kcalloc(v_budget
,
4534 sizeof(struct msix_entry
), GFP_KERNEL
);
4535 if (adapter
->msix_entries
) {
4536 for (vector
= 0; vector
< v_budget
; vector
++)
4537 adapter
->msix_entries
[vector
].entry
= vector
;
4539 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
4541 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4545 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
4546 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
4547 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4548 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4549 adapter
->atr_sample_rate
= 0;
4550 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4551 ixgbe_disable_sriov(adapter
);
4553 ixgbe_set_num_queues(adapter
);
4555 err
= pci_enable_msi(adapter
->pdev
);
4557 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
4559 netif_printk(adapter
, hw
, KERN_DEBUG
, adapter
->netdev
,
4560 "Unable to allocate MSI interrupt, "
4561 "falling back to legacy. Error: %d\n", err
);
4571 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
4572 * @adapter: board private structure to initialize
4574 * We allocate one q_vector per queue interrupt. If allocation fails we
4577 static int ixgbe_alloc_q_vectors(struct ixgbe_adapter
*adapter
)
4579 int q_idx
, num_q_vectors
;
4580 struct ixgbe_q_vector
*q_vector
;
4582 int (*poll
)(struct napi_struct
*, int);
4584 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4585 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
4586 napi_vectors
= adapter
->num_rx_queues
;
4587 poll
= &ixgbe_clean_rxtx_many
;
4594 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
4595 q_vector
= kzalloc_node(sizeof(struct ixgbe_q_vector
),
4596 GFP_KERNEL
, adapter
->node
);
4598 q_vector
= kzalloc(sizeof(struct ixgbe_q_vector
),
4602 q_vector
->adapter
= adapter
;
4603 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
4604 q_vector
->eitr
= adapter
->tx_eitr_param
;
4606 q_vector
->eitr
= adapter
->rx_eitr_param
;
4607 q_vector
->v_idx
= q_idx
;
4608 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
4609 adapter
->q_vector
[q_idx
] = q_vector
;
4617 q_vector
= adapter
->q_vector
[q_idx
];
4618 netif_napi_del(&q_vector
->napi
);
4620 adapter
->q_vector
[q_idx
] = NULL
;
4626 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
4627 * @adapter: board private structure to initialize
4629 * This function frees the memory allocated to the q_vectors. In addition if
4630 * NAPI is enabled it will delete any references to the NAPI struct prior
4631 * to freeing the q_vector.
4633 static void ixgbe_free_q_vectors(struct ixgbe_adapter
*adapter
)
4635 int q_idx
, num_q_vectors
;
4637 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4638 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
4642 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
4643 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[q_idx
];
4644 adapter
->q_vector
[q_idx
] = NULL
;
4645 netif_napi_del(&q_vector
->napi
);
4650 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
4652 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4653 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
4654 pci_disable_msix(adapter
->pdev
);
4655 kfree(adapter
->msix_entries
);
4656 adapter
->msix_entries
= NULL
;
4657 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
4658 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
4659 pci_disable_msi(adapter
->pdev
);
4664 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
4665 * @adapter: board private structure to initialize
4667 * We determine which interrupt scheme to use based on...
4668 * - Kernel support (MSI, MSI-X)
4669 * - which can be user-defined (via MODULE_PARAM)
4670 * - Hardware queue count (num_*_queues)
4671 * - defined by miscellaneous hardware support/features (RSS, etc.)
4673 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
4677 /* Number of supported queues */
4678 ixgbe_set_num_queues(adapter
);
4680 err
= ixgbe_set_interrupt_capability(adapter
);
4682 e_dev_err("Unable to setup interrupt capabilities\n");
4683 goto err_set_interrupt
;
4686 err
= ixgbe_alloc_q_vectors(adapter
);
4688 e_dev_err("Unable to allocate memory for queue vectors\n");
4689 goto err_alloc_q_vectors
;
4692 err
= ixgbe_alloc_queues(adapter
);
4694 e_dev_err("Unable to allocate memory for queues\n");
4695 goto err_alloc_queues
;
4698 e_dev_info("Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
4699 (adapter
->num_rx_queues
> 1) ? "Enabled" : "Disabled",
4700 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
4702 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4707 ixgbe_free_q_vectors(adapter
);
4708 err_alloc_q_vectors
:
4709 ixgbe_reset_interrupt_capability(adapter
);
4715 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
4716 * @adapter: board private structure to clear interrupt scheme on
4718 * We go through and clear interrupt specific resources and reset the structure
4719 * to pre-load conditions
4721 void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter
*adapter
)
4725 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4726 kfree(adapter
->tx_ring
[i
]);
4727 adapter
->tx_ring
[i
] = NULL
;
4729 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4730 kfree(adapter
->rx_ring
[i
]);
4731 adapter
->rx_ring
[i
] = NULL
;
4734 ixgbe_free_q_vectors(adapter
);
4735 ixgbe_reset_interrupt_capability(adapter
);
4739 * ixgbe_sfp_timer - worker thread to find a missing module
4740 * @data: pointer to our adapter struct
4742 static void ixgbe_sfp_timer(unsigned long data
)
4744 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
4747 * Do the sfp_timer outside of interrupt context due to the
4748 * delays that sfp+ detection requires
4750 schedule_work(&adapter
->sfp_task
);
4754 * ixgbe_sfp_task - worker thread to find a missing module
4755 * @work: pointer to work_struct containing our data
4757 static void ixgbe_sfp_task(struct work_struct
*work
)
4759 struct ixgbe_adapter
*adapter
= container_of(work
,
4760 struct ixgbe_adapter
,
4762 struct ixgbe_hw
*hw
= &adapter
->hw
;
4764 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
4765 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
4766 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
4767 if (ret
== IXGBE_ERR_SFP_NOT_PRESENT
)
4769 ret
= hw
->phy
.ops
.reset(hw
);
4770 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4771 e_dev_err("failed to initialize because an unsupported "
4772 "SFP+ module type was detected.\n");
4773 e_dev_err("Reload the driver after installing a "
4774 "supported module.\n");
4775 unregister_netdev(adapter
->netdev
);
4777 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
4779 /* don't need this routine any more */
4780 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4784 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
4785 mod_timer(&adapter
->sfp_timer
,
4786 round_jiffies(jiffies
+ (2 * HZ
)));
4790 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4791 * @adapter: board private structure to initialize
4793 * ixgbe_sw_init initializes the Adapter private data structure.
4794 * Fields are initialized based on PCI device information and
4795 * OS network device settings (MTU size).
4797 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4799 struct ixgbe_hw
*hw
= &adapter
->hw
;
4800 struct pci_dev
*pdev
= adapter
->pdev
;
4801 struct net_device
*dev
= adapter
->netdev
;
4803 #ifdef CONFIG_IXGBE_DCB
4805 struct tc_configuration
*tc
;
4808 /* PCI config space info */
4810 hw
->vendor_id
= pdev
->vendor
;
4811 hw
->device_id
= pdev
->device
;
4812 hw
->revision_id
= pdev
->revision
;
4813 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4814 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4816 /* Set capability flags */
4817 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
4818 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
4819 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
4820 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
4821 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
4822 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4823 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4824 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
4825 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4826 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
4827 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4828 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4829 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
4830 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4831 if (dev
->features
& NETIF_F_NTUPLE
) {
4832 /* Flow Director perfect filter enabled */
4833 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4834 adapter
->atr_sample_rate
= 0;
4835 spin_lock_init(&adapter
->fdir_perfect_lock
);
4837 /* Flow Director hash filters enabled */
4838 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4839 adapter
->atr_sample_rate
= 20;
4841 adapter
->ring_feature
[RING_F_FDIR
].indices
=
4842 IXGBE_MAX_FDIR_INDICES
;
4843 adapter
->fdir_pballoc
= 0;
4845 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4846 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4847 adapter
->ring_feature
[RING_F_FCOE
].indices
= 0;
4848 #ifdef CONFIG_IXGBE_DCB
4849 /* Default traffic class to use for FCoE */
4850 adapter
->fcoe
.tc
= IXGBE_FCOE_DEFTC
;
4851 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
4853 #endif /* IXGBE_FCOE */
4856 #ifdef CONFIG_IXGBE_DCB
4857 /* Configure DCB traffic classes */
4858 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
4859 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
4860 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
4861 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4862 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
4863 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4864 tc
->dcb_pfc
= pfc_disabled
;
4866 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
4867 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
4868 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
4869 adapter
->dcb_cfg
.pfc_mode_enable
= false;
4870 adapter
->dcb_cfg
.round_robin_enable
= false;
4871 adapter
->dcb_set_bitmap
= 0x00;
4872 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
4873 adapter
->ring_feature
[RING_F_DCB
].indices
);
4877 /* default flow control settings */
4878 hw
->fc
.requested_mode
= ixgbe_fc_full
;
4879 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
4881 adapter
->last_lfc_mode
= hw
->fc
.current_mode
;
4883 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
4884 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
4885 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
4886 hw
->fc
.send_xon
= true;
4887 hw
->fc
.disable_fc_autoneg
= false;
4889 /* enable itr by default in dynamic mode */
4890 adapter
->rx_itr_setting
= 1;
4891 adapter
->rx_eitr_param
= 20000;
4892 adapter
->tx_itr_setting
= 1;
4893 adapter
->tx_eitr_param
= 10000;
4895 /* set defaults for eitr in MegaBytes */
4896 adapter
->eitr_low
= 10;
4897 adapter
->eitr_high
= 20;
4899 /* set default ring sizes */
4900 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
4901 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
4903 /* initialize eeprom parameters */
4904 if (ixgbe_init_eeprom_params_generic(hw
)) {
4905 e_dev_err("EEPROM initialization failed\n");
4909 /* enable rx csum by default */
4910 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
4912 /* get assigned NUMA node */
4913 adapter
->node
= dev_to_node(&pdev
->dev
);
4915 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4921 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4922 * @adapter: board private structure
4923 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4925 * Return 0 on success, negative on failure
4927 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
4928 struct ixgbe_ring
*tx_ring
)
4930 struct pci_dev
*pdev
= adapter
->pdev
;
4933 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4934 tx_ring
->tx_buffer_info
= vmalloc_node(size
, tx_ring
->numa_node
);
4935 if (!tx_ring
->tx_buffer_info
)
4936 tx_ring
->tx_buffer_info
= vmalloc(size
);
4937 if (!tx_ring
->tx_buffer_info
)
4939 memset(tx_ring
->tx_buffer_info
, 0, size
);
4941 /* round up to nearest 4K */
4942 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4943 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4945 tx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, tx_ring
->size
,
4946 &tx_ring
->dma
, GFP_KERNEL
);
4950 tx_ring
->next_to_use
= 0;
4951 tx_ring
->next_to_clean
= 0;
4952 tx_ring
->work_limit
= tx_ring
->count
;
4956 vfree(tx_ring
->tx_buffer_info
);
4957 tx_ring
->tx_buffer_info
= NULL
;
4958 e_err(probe
, "Unable to allocate memory for the Tx descriptor ring\n");
4963 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4964 * @adapter: board private structure
4966 * If this function returns with an error, then it's possible one or
4967 * more of the rings is populated (while the rest are not). It is the
4968 * callers duty to clean those orphaned rings.
4970 * Return 0 on success, negative on failure
4972 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
4976 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4977 err
= ixgbe_setup_tx_resources(adapter
, adapter
->tx_ring
[i
]);
4980 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
4988 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4989 * @adapter: board private structure
4990 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4992 * Returns 0 on success, negative on failure
4994 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
4995 struct ixgbe_ring
*rx_ring
)
4997 struct pci_dev
*pdev
= adapter
->pdev
;
5000 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5001 rx_ring
->rx_buffer_info
= vmalloc_node(size
, adapter
->node
);
5002 if (!rx_ring
->rx_buffer_info
)
5003 rx_ring
->rx_buffer_info
= vmalloc(size
);
5004 if (!rx_ring
->rx_buffer_info
) {
5005 e_err(probe
, "vmalloc allocation failed for the Rx "
5006 "descriptor ring\n");
5009 memset(rx_ring
->rx_buffer_info
, 0, size
);
5011 /* Round up to nearest 4K */
5012 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5013 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5015 rx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, rx_ring
->size
,
5016 &rx_ring
->dma
, GFP_KERNEL
);
5018 if (!rx_ring
->desc
) {
5019 e_err(probe
, "Memory allocation failed for the Rx "
5020 "descriptor ring\n");
5021 vfree(rx_ring
->rx_buffer_info
);
5025 rx_ring
->next_to_clean
= 0;
5026 rx_ring
->next_to_use
= 0;
5035 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5036 * @adapter: board private structure
5038 * If this function returns with an error, then it's possible one or
5039 * more of the rings is populated (while the rest are not). It is the
5040 * callers duty to clean those orphaned rings.
5042 * Return 0 on success, negative on failure
5045 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5049 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5050 err
= ixgbe_setup_rx_resources(adapter
, adapter
->rx_ring
[i
]);
5053 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5061 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5062 * @adapter: board private structure
5063 * @tx_ring: Tx descriptor ring for a specific queue
5065 * Free all transmit software resources
5067 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
5068 struct ixgbe_ring
*tx_ring
)
5070 struct pci_dev
*pdev
= adapter
->pdev
;
5072 ixgbe_clean_tx_ring(adapter
, tx_ring
);
5074 vfree(tx_ring
->tx_buffer_info
);
5075 tx_ring
->tx_buffer_info
= NULL
;
5077 dma_free_coherent(&pdev
->dev
, tx_ring
->size
, tx_ring
->desc
,
5080 tx_ring
->desc
= NULL
;
5084 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5085 * @adapter: board private structure
5087 * Free all transmit software resources
5089 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
5093 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5094 if (adapter
->tx_ring
[i
]->desc
)
5095 ixgbe_free_tx_resources(adapter
, adapter
->tx_ring
[i
]);
5099 * ixgbe_free_rx_resources - Free Rx Resources
5100 * @adapter: board private structure
5101 * @rx_ring: ring to clean the resources from
5103 * Free all receive software resources
5105 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
5106 struct ixgbe_ring
*rx_ring
)
5108 struct pci_dev
*pdev
= adapter
->pdev
;
5110 ixgbe_clean_rx_ring(adapter
, rx_ring
);
5112 vfree(rx_ring
->rx_buffer_info
);
5113 rx_ring
->rx_buffer_info
= NULL
;
5115 dma_free_coherent(&pdev
->dev
, rx_ring
->size
, rx_ring
->desc
,
5118 rx_ring
->desc
= NULL
;
5122 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5123 * @adapter: board private structure
5125 * Free all receive software resources
5127 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
5131 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5132 if (adapter
->rx_ring
[i
]->desc
)
5133 ixgbe_free_rx_resources(adapter
, adapter
->rx_ring
[i
]);
5137 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5138 * @netdev: network interface device structure
5139 * @new_mtu: new value for maximum frame size
5141 * Returns 0 on success, negative on failure
5143 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
5145 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5146 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5148 /* MTU < 68 is an error and causes problems on some kernels */
5149 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
5152 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
5153 /* must set new MTU before calling down or up */
5154 netdev
->mtu
= new_mtu
;
5156 if (netif_running(netdev
))
5157 ixgbe_reinit_locked(adapter
);
5163 * ixgbe_open - Called when a network interface is made active
5164 * @netdev: network interface device structure
5166 * Returns 0 on success, negative value on failure
5168 * The open entry point is called when a network interface is made
5169 * active by the system (IFF_UP). At this point all resources needed
5170 * for transmit and receive operations are allocated, the interrupt
5171 * handler is registered with the OS, the watchdog timer is started,
5172 * and the stack is notified that the interface is ready.
5174 static int ixgbe_open(struct net_device
*netdev
)
5176 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5179 /* disallow open during test */
5180 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
5183 netif_carrier_off(netdev
);
5185 /* allocate transmit descriptors */
5186 err
= ixgbe_setup_all_tx_resources(adapter
);
5190 /* allocate receive descriptors */
5191 err
= ixgbe_setup_all_rx_resources(adapter
);
5195 ixgbe_configure(adapter
);
5197 err
= ixgbe_request_irq(adapter
);
5201 err
= ixgbe_up_complete(adapter
);
5205 netif_tx_start_all_queues(netdev
);
5210 ixgbe_release_hw_control(adapter
);
5211 ixgbe_free_irq(adapter
);
5214 ixgbe_free_all_rx_resources(adapter
);
5216 ixgbe_free_all_tx_resources(adapter
);
5217 ixgbe_reset(adapter
);
5223 * ixgbe_close - Disables a network interface
5224 * @netdev: network interface device structure
5226 * Returns 0, this is not allowed to fail
5228 * The close entry point is called when an interface is de-activated
5229 * by the OS. The hardware is still under the drivers control, but
5230 * needs to be disabled. A global MAC reset is issued to stop the
5231 * hardware, and all transmit and receive resources are freed.
5233 static int ixgbe_close(struct net_device
*netdev
)
5235 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5237 ixgbe_down(adapter
);
5238 ixgbe_free_irq(adapter
);
5240 ixgbe_free_all_tx_resources(adapter
);
5241 ixgbe_free_all_rx_resources(adapter
);
5243 ixgbe_release_hw_control(adapter
);
5249 static int ixgbe_resume(struct pci_dev
*pdev
)
5251 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5252 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5255 pci_set_power_state(pdev
, PCI_D0
);
5256 pci_restore_state(pdev
);
5258 * pci_restore_state clears dev->state_saved so call
5259 * pci_save_state to restore it.
5261 pci_save_state(pdev
);
5263 err
= pci_enable_device_mem(pdev
);
5265 e_dev_err("Cannot enable PCI device from suspend\n");
5268 pci_set_master(pdev
);
5270 pci_wake_from_d3(pdev
, false);
5272 err
= ixgbe_init_interrupt_scheme(adapter
);
5274 e_dev_err("Cannot initialize interrupts for device\n");
5278 ixgbe_reset(adapter
);
5280 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5282 if (netif_running(netdev
)) {
5283 err
= ixgbe_open(adapter
->netdev
);
5288 netif_device_attach(netdev
);
5292 #endif /* CONFIG_PM */
5294 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5296 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5297 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5298 struct ixgbe_hw
*hw
= &adapter
->hw
;
5300 u32 wufc
= adapter
->wol
;
5305 netif_device_detach(netdev
);
5307 if (netif_running(netdev
)) {
5308 ixgbe_down(adapter
);
5309 ixgbe_free_irq(adapter
);
5310 ixgbe_free_all_tx_resources(adapter
);
5311 ixgbe_free_all_rx_resources(adapter
);
5315 retval
= pci_save_state(pdev
);
5321 ixgbe_set_rx_mode(netdev
);
5323 /* turn on all-multi mode if wake on multicast is enabled */
5324 if (wufc
& IXGBE_WUFC_MC
) {
5325 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5326 fctrl
|= IXGBE_FCTRL_MPE
;
5327 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
5330 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
5331 ctrl
|= IXGBE_CTRL_GIO_DIS
;
5332 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
5334 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
5336 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
5337 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
5340 if (wufc
&& hw
->mac
.type
== ixgbe_mac_82599EB
)
5341 pci_wake_from_d3(pdev
, true);
5343 pci_wake_from_d3(pdev
, false);
5345 *enable_wake
= !!wufc
;
5347 ixgbe_clear_interrupt_scheme(adapter
);
5349 ixgbe_release_hw_control(adapter
);
5351 pci_disable_device(pdev
);
5357 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5362 retval
= __ixgbe_shutdown(pdev
, &wake
);
5367 pci_prepare_to_sleep(pdev
);
5369 pci_wake_from_d3(pdev
, false);
5370 pci_set_power_state(pdev
, PCI_D3hot
);
5375 #endif /* CONFIG_PM */
5377 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5381 __ixgbe_shutdown(pdev
, &wake
);
5383 if (system_state
== SYSTEM_POWER_OFF
) {
5384 pci_wake_from_d3(pdev
, wake
);
5385 pci_set_power_state(pdev
, PCI_D3hot
);
5390 * ixgbe_update_stats - Update the board statistics counters.
5391 * @adapter: board private structure
5393 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5395 struct net_device
*netdev
= adapter
->netdev
;
5396 struct ixgbe_hw
*hw
= &adapter
->hw
;
5398 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5399 u64 non_eop_descs
= 0, restart_queue
= 0;
5400 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5402 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5403 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5406 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5409 for (i
= 0; i
< 16; i
++)
5410 adapter
->hw_rx_no_dma_resources
+=
5411 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5412 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5413 rsc_count
+= adapter
->rx_ring
[i
]->rsc_count
;
5414 rsc_flush
+= adapter
->rx_ring
[i
]->rsc_flush
;
5416 adapter
->rsc_total_count
= rsc_count
;
5417 adapter
->rsc_total_flush
= rsc_flush
;
5420 /* gather some stats to the adapter struct that are per queue */
5421 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5422 restart_queue
+= adapter
->tx_ring
[i
]->restart_queue
;
5423 adapter
->restart_queue
= restart_queue
;
5425 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5426 non_eop_descs
+= adapter
->rx_ring
[i
]->non_eop_descs
;
5427 adapter
->non_eop_descs
= non_eop_descs
;
5429 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5430 for (i
= 0; i
< 8; i
++) {
5431 /* for packet buffers not used, the register should read 0 */
5432 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5434 hwstats
->mpc
[i
] += mpc
;
5435 total_mpc
+= hwstats
->mpc
[i
];
5436 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5437 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5438 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5439 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5440 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5441 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5442 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5443 hwstats
->pxonrxc
[i
] +=
5444 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5445 hwstats
->pxoffrxc
[i
] +=
5446 IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
5447 hwstats
->qprdc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5449 hwstats
->pxonrxc
[i
] +=
5450 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5451 hwstats
->pxoffrxc
[i
] +=
5452 IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
5454 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5455 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5457 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5458 /* work around hardware counting issue */
5459 hwstats
->gprc
-= missed_rx
;
5461 /* 82598 hardware only has a 32 bit counter in the high register */
5462 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5464 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5465 tmp
= IXGBE_READ_REG(hw
, IXGBE_GORCH
) & 0xF;
5466 /* 4 high bits of GORC */
5467 hwstats
->gorc
+= (tmp
<< 32);
5468 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5469 tmp
= IXGBE_READ_REG(hw
, IXGBE_GOTCH
) & 0xF;
5470 /* 4 high bits of GOTC */
5471 hwstats
->gotc
+= (tmp
<< 32);
5472 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5473 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5474 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5475 hwstats
->lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
5476 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5477 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5479 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5480 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5481 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5482 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5483 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5484 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5485 #endif /* IXGBE_FCOE */
5487 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5488 hwstats
->lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
5489 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5490 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5491 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5493 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5494 hwstats
->bprc
+= bprc
;
5495 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5496 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5497 hwstats
->mprc
-= bprc
;
5498 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5499 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5500 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5501 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5502 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5503 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5504 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5505 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5506 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5507 hwstats
->lxontxc
+= lxon
;
5508 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5509 hwstats
->lxofftxc
+= lxoff
;
5510 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5511 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5512 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5514 * 82598 errata - tx of flow control packets is included in tx counters
5516 xon_off_tot
= lxon
+ lxoff
;
5517 hwstats
->gptc
-= xon_off_tot
;
5518 hwstats
->mptc
-= xon_off_tot
;
5519 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5520 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5521 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5522 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5523 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5524 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5525 hwstats
->ptc64
-= xon_off_tot
;
5526 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5527 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5528 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5529 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5530 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5531 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5533 /* Fill out the OS statistics structure */
5534 netdev
->stats
.multicast
= hwstats
->mprc
;
5537 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5538 netdev
->stats
.rx_dropped
= 0;
5539 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5540 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5541 netdev
->stats
.rx_missed_errors
= total_mpc
;
5545 * ixgbe_watchdog - Timer Call-back
5546 * @data: pointer to adapter cast into an unsigned long
5548 static void ixgbe_watchdog(unsigned long data
)
5550 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
5551 struct ixgbe_hw
*hw
= &adapter
->hw
;
5556 * Do the watchdog outside of interrupt context due to the lovely
5557 * delays that some of the newer hardware requires
5560 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5561 goto watchdog_short_circuit
;
5563 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5565 * for legacy and MSI interrupts don't set any bits
5566 * that are enabled for EIAM, because this operation
5567 * would set *both* EIMS and EICS for any bit in EIAM
5569 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5570 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5571 goto watchdog_reschedule
;
5574 /* get one bit for every active tx/rx interrupt vector */
5575 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
5576 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5577 if (qv
->rxr_count
|| qv
->txr_count
)
5578 eics
|= ((u64
)1 << i
);
5581 /* Cause software interrupt to ensure rx rings are cleaned */
5582 ixgbe_irq_rearm_queues(adapter
, eics
);
5584 watchdog_reschedule
:
5585 /* Reset the timer */
5586 mod_timer(&adapter
->watchdog_timer
, round_jiffies(jiffies
+ 2 * HZ
));
5588 watchdog_short_circuit
:
5589 schedule_work(&adapter
->watchdog_task
);
5593 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
5594 * @work: pointer to work_struct containing our data
5596 static void ixgbe_multispeed_fiber_task(struct work_struct
*work
)
5598 struct ixgbe_adapter
*adapter
= container_of(work
,
5599 struct ixgbe_adapter
,
5600 multispeed_fiber_task
);
5601 struct ixgbe_hw
*hw
= &adapter
->hw
;
5605 adapter
->flags
|= IXGBE_FLAG_IN_SFP_LINK_TASK
;
5606 autoneg
= hw
->phy
.autoneg_advertised
;
5607 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
5608 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
5609 hw
->mac
.autotry_restart
= false;
5610 if (hw
->mac
.ops
.setup_link
)
5611 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
5612 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5613 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_LINK_TASK
;
5617 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
5618 * @work: pointer to work_struct containing our data
5620 static void ixgbe_sfp_config_module_task(struct work_struct
*work
)
5622 struct ixgbe_adapter
*adapter
= container_of(work
,
5623 struct ixgbe_adapter
,
5624 sfp_config_module_task
);
5625 struct ixgbe_hw
*hw
= &adapter
->hw
;
5628 adapter
->flags
|= IXGBE_FLAG_IN_SFP_MOD_TASK
;
5630 /* Time for electrical oscillations to settle down */
5632 err
= hw
->phy
.ops
.identify_sfp(hw
);
5634 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
5635 e_dev_err("failed to initialize because an unsupported SFP+ "
5636 "module type was detected.\n");
5637 e_dev_err("Reload the driver after installing a supported "
5639 unregister_netdev(adapter
->netdev
);
5642 hw
->mac
.ops
.setup_sfp(hw
);
5644 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
5645 /* This will also work for DA Twinax connections */
5646 schedule_work(&adapter
->multispeed_fiber_task
);
5647 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_MOD_TASK
;
5651 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
5652 * @work: pointer to work_struct containing our data
5654 static void ixgbe_fdir_reinit_task(struct work_struct
*work
)
5656 struct ixgbe_adapter
*adapter
= container_of(work
,
5657 struct ixgbe_adapter
,
5659 struct ixgbe_hw
*hw
= &adapter
->hw
;
5662 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5663 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5664 set_bit(__IXGBE_FDIR_INIT_DONE
,
5665 &(adapter
->tx_ring
[i
]->reinit_state
));
5667 e_err(probe
, "failed to finish FDIR re-initialization, "
5668 "ignored adding FDIR ATR filters\n");
5670 /* Done FDIR Re-initialization, enable transmits */
5671 netif_tx_start_all_queues(adapter
->netdev
);
5674 static DEFINE_MUTEX(ixgbe_watchdog_lock
);
5677 * ixgbe_watchdog_task - worker thread to bring link up
5678 * @work: pointer to work_struct containing our data
5680 static void ixgbe_watchdog_task(struct work_struct
*work
)
5682 struct ixgbe_adapter
*adapter
= container_of(work
,
5683 struct ixgbe_adapter
,
5685 struct net_device
*netdev
= adapter
->netdev
;
5686 struct ixgbe_hw
*hw
= &adapter
->hw
;
5690 struct ixgbe_ring
*tx_ring
;
5691 int some_tx_pending
= 0;
5693 mutex_lock(&ixgbe_watchdog_lock
);
5695 link_up
= adapter
->link_up
;
5696 link_speed
= adapter
->link_speed
;
5698 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
5699 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5702 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5703 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++)
5704 hw
->mac
.ops
.fc_enable(hw
, i
);
5706 hw
->mac
.ops
.fc_enable(hw
, 0);
5709 hw
->mac
.ops
.fc_enable(hw
, 0);
5714 time_after(jiffies
, (adapter
->link_check_timeout
+
5715 IXGBE_TRY_LINK_TIMEOUT
))) {
5716 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5717 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5719 adapter
->link_up
= link_up
;
5720 adapter
->link_speed
= link_speed
;
5724 if (!netif_carrier_ok(netdev
)) {
5725 bool flow_rx
, flow_tx
;
5727 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5728 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
5729 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
5730 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
5731 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
5733 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5734 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
5735 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
5736 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
5739 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
5740 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
5742 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
5743 "1 Gbps" : "unknown speed")),
5744 ((flow_rx
&& flow_tx
) ? "RX/TX" :
5746 (flow_tx
? "TX" : "None"))));
5748 netif_carrier_on(netdev
);
5750 /* Force detection of hung controller */
5751 adapter
->detect_tx_hung
= true;
5754 adapter
->link_up
= false;
5755 adapter
->link_speed
= 0;
5756 if (netif_carrier_ok(netdev
)) {
5757 e_info(drv
, "NIC Link is Down\n");
5758 netif_carrier_off(netdev
);
5762 if (!netif_carrier_ok(netdev
)) {
5763 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5764 tx_ring
= adapter
->tx_ring
[i
];
5765 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
5766 some_tx_pending
= 1;
5771 if (some_tx_pending
) {
5772 /* We've lost link, so the controller stops DMA,
5773 * but we've got queued Tx work that's never going
5774 * to get done, so reset controller to flush Tx.
5775 * (Do the reset outside of interrupt context).
5777 schedule_work(&adapter
->reset_task
);
5781 ixgbe_update_stats(adapter
);
5782 mutex_unlock(&ixgbe_watchdog_lock
);
5785 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
5786 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
5787 u32 tx_flags
, u8
*hdr_len
)
5789 struct ixgbe_adv_tx_context_desc
*context_desc
;
5792 struct ixgbe_tx_buffer
*tx_buffer_info
;
5793 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
5794 u32 mss_l4len_idx
, l4len
;
5796 if (skb_is_gso(skb
)) {
5797 if (skb_header_cloned(skb
)) {
5798 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
5802 l4len
= tcp_hdrlen(skb
);
5805 if (skb
->protocol
== htons(ETH_P_IP
)) {
5806 struct iphdr
*iph
= ip_hdr(skb
);
5809 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
5813 } else if (skb_is_gso_v6(skb
)) {
5814 ipv6_hdr(skb
)->payload_len
= 0;
5815 tcp_hdr(skb
)->check
=
5816 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5817 &ipv6_hdr(skb
)->daddr
,
5821 i
= tx_ring
->next_to_use
;
5823 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5824 context_desc
= IXGBE_TX_CTXTDESC_ADV(tx_ring
, i
);
5826 /* VLAN MACLEN IPLEN */
5827 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5829 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
5830 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
5831 IXGBE_ADVTXD_MACLEN_SHIFT
);
5832 *hdr_len
+= skb_network_offset(skb
);
5834 (skb_transport_header(skb
) - skb_network_header(skb
));
5836 (skb_transport_header(skb
) - skb_network_header(skb
));
5837 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
5838 context_desc
->seqnum_seed
= 0;
5840 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5841 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
5842 IXGBE_ADVTXD_DTYP_CTXT
);
5844 if (skb
->protocol
== htons(ETH_P_IP
))
5845 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5846 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5847 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
5851 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
5852 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
5853 /* use index 1 for TSO */
5854 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
5855 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
5857 tx_buffer_info
->time_stamp
= jiffies
;
5858 tx_buffer_info
->next_to_watch
= i
;
5861 if (i
== tx_ring
->count
)
5863 tx_ring
->next_to_use
= i
;
5870 static u32
ixgbe_psum(struct ixgbe_adapter
*adapter
, struct sk_buff
*skb
)
5875 if (skb
->protocol
== cpu_to_be16(ETH_P_8021Q
))
5876 protocol
= ((const struct vlan_ethhdr
*)skb
->data
)->
5877 h_vlan_encapsulated_proto
;
5879 protocol
= skb
->protocol
;
5882 case cpu_to_be16(ETH_P_IP
):
5883 rtn
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5884 switch (ip_hdr(skb
)->protocol
) {
5886 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5889 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5893 case cpu_to_be16(ETH_P_IPV6
):
5894 /* XXX what about other V6 headers?? */
5895 switch (ipv6_hdr(skb
)->nexthdr
) {
5897 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5900 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5905 if (unlikely(net_ratelimit()))
5906 e_warn(probe
, "partial checksum but proto=%x!\n",
5914 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
5915 struct ixgbe_ring
*tx_ring
,
5916 struct sk_buff
*skb
, u32 tx_flags
)
5918 struct ixgbe_adv_tx_context_desc
*context_desc
;
5920 struct ixgbe_tx_buffer
*tx_buffer_info
;
5921 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
5923 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
5924 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
5925 i
= tx_ring
->next_to_use
;
5926 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5927 context_desc
= IXGBE_TX_CTXTDESC_ADV(tx_ring
, i
);
5929 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5931 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
5932 vlan_macip_lens
|= (skb_network_offset(skb
) <<
5933 IXGBE_ADVTXD_MACLEN_SHIFT
);
5934 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
5935 vlan_macip_lens
|= (skb_transport_header(skb
) -
5936 skb_network_header(skb
));
5938 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
5939 context_desc
->seqnum_seed
= 0;
5941 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
5942 IXGBE_ADVTXD_DTYP_CTXT
);
5944 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
5945 type_tucmd_mlhl
|= ixgbe_psum(adapter
, skb
);
5947 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
5948 /* use index zero for tx checksum offload */
5949 context_desc
->mss_l4len_idx
= 0;
5951 tx_buffer_info
->time_stamp
= jiffies
;
5952 tx_buffer_info
->next_to_watch
= i
;
5955 if (i
== tx_ring
->count
)
5957 tx_ring
->next_to_use
= i
;
5965 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
5966 struct ixgbe_ring
*tx_ring
,
5967 struct sk_buff
*skb
, u32 tx_flags
,
5970 struct pci_dev
*pdev
= adapter
->pdev
;
5971 struct ixgbe_tx_buffer
*tx_buffer_info
;
5973 unsigned int total
= skb
->len
;
5974 unsigned int offset
= 0, size
, count
= 0, i
;
5975 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
5978 i
= tx_ring
->next_to_use
;
5980 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
)
5981 /* excluding fcoe_crc_eof for FCoE */
5982 total
-= sizeof(struct fcoe_crc_eof
);
5984 len
= min(skb_headlen(skb
), total
);
5986 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5987 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
5989 tx_buffer_info
->length
= size
;
5990 tx_buffer_info
->mapped_as_page
= false;
5991 tx_buffer_info
->dma
= dma_map_single(&pdev
->dev
,
5993 size
, DMA_TO_DEVICE
);
5994 if (dma_mapping_error(&pdev
->dev
, tx_buffer_info
->dma
))
5996 tx_buffer_info
->time_stamp
= jiffies
;
5997 tx_buffer_info
->next_to_watch
= i
;
6006 if (i
== tx_ring
->count
)
6011 for (f
= 0; f
< nr_frags
; f
++) {
6012 struct skb_frag_struct
*frag
;
6014 frag
= &skb_shinfo(skb
)->frags
[f
];
6015 len
= min((unsigned int)frag
->size
, total
);
6016 offset
= frag
->page_offset
;
6020 if (i
== tx_ring
->count
)
6023 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
6024 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
6026 tx_buffer_info
->length
= size
;
6027 tx_buffer_info
->dma
= dma_map_page(&adapter
->pdev
->dev
,
6031 tx_buffer_info
->mapped_as_page
= true;
6032 if (dma_mapping_error(&pdev
->dev
, tx_buffer_info
->dma
))
6034 tx_buffer_info
->time_stamp
= jiffies
;
6035 tx_buffer_info
->next_to_watch
= i
;
6046 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
6047 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
6052 e_dev_err("TX DMA map failed\n");
6054 /* clear timestamp and dma mappings for failed tx_buffer_info map */
6055 tx_buffer_info
->dma
= 0;
6056 tx_buffer_info
->time_stamp
= 0;
6057 tx_buffer_info
->next_to_watch
= 0;
6061 /* clear timestamp and dma mappings for remaining portion of packet */
6064 i
+= tx_ring
->count
;
6066 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
6067 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
6073 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
6074 struct ixgbe_ring
*tx_ring
,
6075 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
6077 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
6078 struct ixgbe_tx_buffer
*tx_buffer_info
;
6079 u32 olinfo_status
= 0, cmd_type_len
= 0;
6081 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
6083 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
6085 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
6087 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
6088 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
6090 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
6091 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
6093 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
6094 IXGBE_ADVTXD_POPTS_SHIFT
;
6096 /* use index 1 context for tso */
6097 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
6098 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
6099 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
6100 IXGBE_ADVTXD_POPTS_SHIFT
;
6102 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
6103 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
6104 IXGBE_ADVTXD_POPTS_SHIFT
;
6106 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6107 olinfo_status
|= IXGBE_ADVTXD_CC
;
6108 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
6109 if (tx_flags
& IXGBE_TX_FLAGS_FSO
)
6110 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
6113 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
6115 i
= tx_ring
->next_to_use
;
6117 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
6118 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, i
);
6119 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
6120 tx_desc
->read
.cmd_type_len
=
6121 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
6122 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
6124 if (i
== tx_ring
->count
)
6128 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
6131 * Force memory writes to complete before letting h/w
6132 * know there are new descriptors to fetch. (Only
6133 * applicable for weak-ordered memory model archs,
6138 tx_ring
->next_to_use
= i
;
6139 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
6142 static void ixgbe_atr(struct ixgbe_adapter
*adapter
, struct sk_buff
*skb
,
6143 int queue
, u32 tx_flags
)
6145 struct ixgbe_atr_input atr_input
;
6147 struct iphdr
*iph
= ip_hdr(skb
);
6148 struct ethhdr
*eth
= (struct ethhdr
*)skb
->data
;
6149 u16 vlan_id
, src_port
, dst_port
, flex_bytes
;
6150 u32 src_ipv4_addr
, dst_ipv4_addr
;
6153 /* Right now, we support IPv4 only */
6154 if (skb
->protocol
!= htons(ETH_P_IP
))
6156 /* check if we're UDP or TCP */
6157 if (iph
->protocol
== IPPROTO_TCP
) {
6159 src_port
= th
->source
;
6160 dst_port
= th
->dest
;
6161 l4type
|= IXGBE_ATR_L4TYPE_TCP
;
6162 /* l4type IPv4 type is 0, no need to assign */
6164 /* Unsupported L4 header, just bail here */
6168 memset(&atr_input
, 0, sizeof(struct ixgbe_atr_input
));
6170 vlan_id
= (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
) >>
6171 IXGBE_TX_FLAGS_VLAN_SHIFT
;
6172 src_ipv4_addr
= iph
->saddr
;
6173 dst_ipv4_addr
= iph
->daddr
;
6174 flex_bytes
= eth
->h_proto
;
6176 ixgbe_atr_set_vlan_id_82599(&atr_input
, vlan_id
);
6177 ixgbe_atr_set_src_port_82599(&atr_input
, dst_port
);
6178 ixgbe_atr_set_dst_port_82599(&atr_input
, src_port
);
6179 ixgbe_atr_set_flex_byte_82599(&atr_input
, flex_bytes
);
6180 ixgbe_atr_set_l4type_82599(&atr_input
, l4type
);
6181 /* src and dst are inverted, think how the receiver sees them */
6182 ixgbe_atr_set_src_ipv4_82599(&atr_input
, dst_ipv4_addr
);
6183 ixgbe_atr_set_dst_ipv4_82599(&atr_input
, src_ipv4_addr
);
6185 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6186 ixgbe_fdir_add_signature_filter_82599(&adapter
->hw
, &atr_input
, queue
);
6189 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
6190 struct ixgbe_ring
*tx_ring
, int size
)
6192 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
6193 /* Herbert's original patch had:
6194 * smp_mb__after_netif_stop_queue();
6195 * but since that doesn't exist yet, just open code it. */
6198 /* We need to check again in a case another CPU has just
6199 * made room available. */
6200 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
6203 /* A reprieve! - use start_queue because it doesn't call schedule */
6204 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
6205 ++tx_ring
->restart_queue
;
6209 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
6210 struct ixgbe_ring
*tx_ring
, int size
)
6212 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
6214 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
6217 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
6219 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6220 int txq
= smp_processor_id();
6223 if ((skb
->protocol
== htons(ETH_P_FCOE
)) ||
6224 (skb
->protocol
== htons(ETH_P_FIP
))) {
6225 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
6226 txq
&= (adapter
->ring_feature
[RING_F_FCOE
].indices
- 1);
6227 txq
+= adapter
->ring_feature
[RING_F_FCOE
].mask
;
6229 #ifdef CONFIG_IXGBE_DCB
6230 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6231 txq
= adapter
->fcoe
.up
;
6238 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
6239 while (unlikely(txq
>= dev
->real_num_tx_queues
))
6240 txq
-= dev
->real_num_tx_queues
;
6244 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6245 if (skb
->priority
== TC_PRIO_CONTROL
)
6246 txq
= adapter
->ring_feature
[RING_F_DCB
].indices
-1;
6248 txq
= (skb
->vlan_tci
& IXGBE_TX_FLAGS_VLAN_PRIO_MASK
)
6253 return skb_tx_hash(dev
, skb
);
6256 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
, struct net_device
*netdev
,
6257 struct ixgbe_adapter
*adapter
,
6258 struct ixgbe_ring
*tx_ring
)
6260 struct netdev_queue
*txq
;
6262 unsigned int tx_flags
= 0;
6268 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
6269 tx_flags
|= vlan_tx_tag_get(skb
);
6270 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6271 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
6272 tx_flags
|= ((skb
->queue_mapping
& 0x7) << 13);
6274 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
6275 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
6276 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
&&
6277 skb
->priority
!= TC_PRIO_CONTROL
) {
6278 tx_flags
|= ((skb
->queue_mapping
& 0x7) << 13);
6279 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
6280 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
6284 /* for FCoE with DCB, we force the priority to what
6285 * was specified by the switch */
6286 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
&&
6287 (skb
->protocol
== htons(ETH_P_FCOE
) ||
6288 skb
->protocol
== htons(ETH_P_FIP
))) {
6289 #ifdef CONFIG_IXGBE_DCB
6290 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6291 tx_flags
&= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK
6292 << IXGBE_TX_FLAGS_VLAN_SHIFT
);
6293 tx_flags
|= ((adapter
->fcoe
.up
<< 13)
6294 << IXGBE_TX_FLAGS_VLAN_SHIFT
);
6297 /* flag for FCoE offloads */
6298 if (skb
->protocol
== htons(ETH_P_FCOE
))
6299 tx_flags
|= IXGBE_TX_FLAGS_FCOE
;
6303 /* four things can cause us to need a context descriptor */
6304 if (skb_is_gso(skb
) ||
6305 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
6306 (tx_flags
& IXGBE_TX_FLAGS_VLAN
) ||
6307 (tx_flags
& IXGBE_TX_FLAGS_FCOE
))
6310 count
+= TXD_USE_COUNT(skb_headlen(skb
));
6311 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6312 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6314 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
6316 return NETDEV_TX_BUSY
;
6319 first
= tx_ring
->next_to_use
;
6320 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6322 /* setup tx offload for FCoE */
6323 tso
= ixgbe_fso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
6325 dev_kfree_skb_any(skb
);
6326 return NETDEV_TX_OK
;
6329 tx_flags
|= IXGBE_TX_FLAGS_FSO
;
6330 #endif /* IXGBE_FCOE */
6332 if (skb
->protocol
== htons(ETH_P_IP
))
6333 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
6334 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
6336 dev_kfree_skb_any(skb
);
6337 return NETDEV_TX_OK
;
6341 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
6342 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
6343 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
6344 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
6347 count
= ixgbe_tx_map(adapter
, tx_ring
, skb
, tx_flags
, first
);
6349 /* add the ATR filter if ATR is on */
6350 if (tx_ring
->atr_sample_rate
) {
6351 ++tx_ring
->atr_count
;
6352 if ((tx_ring
->atr_count
>= tx_ring
->atr_sample_rate
) &&
6353 test_bit(__IXGBE_FDIR_INIT_DONE
,
6354 &tx_ring
->reinit_state
)) {
6355 ixgbe_atr(adapter
, skb
, tx_ring
->queue_index
,
6357 tx_ring
->atr_count
= 0;
6360 txq
= netdev_get_tx_queue(netdev
, tx_ring
->queue_index
);
6361 txq
->tx_bytes
+= skb
->len
;
6363 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
, count
, skb
->len
,
6365 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
6368 dev_kfree_skb_any(skb
);
6369 tx_ring
->tx_buffer_info
[first
].time_stamp
= 0;
6370 tx_ring
->next_to_use
= first
;
6373 return NETDEV_TX_OK
;
6376 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
6378 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6379 struct ixgbe_ring
*tx_ring
;
6381 tx_ring
= adapter
->tx_ring
[skb
->queue_mapping
];
6382 return ixgbe_xmit_frame_ring(skb
, netdev
, adapter
, tx_ring
);
6386 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6387 * @netdev: network interface device structure
6388 * @p: pointer to an address structure
6390 * Returns 0 on success, negative on failure
6392 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
6394 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6395 struct ixgbe_hw
*hw
= &adapter
->hw
;
6396 struct sockaddr
*addr
= p
;
6398 if (!is_valid_ether_addr(addr
->sa_data
))
6399 return -EADDRNOTAVAIL
;
6401 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
6402 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
6404 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
6411 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
6413 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6414 struct ixgbe_hw
*hw
= &adapter
->hw
;
6418 if (prtad
!= hw
->phy
.mdio
.prtad
)
6420 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
6426 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
6427 u16 addr
, u16 value
)
6429 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6430 struct ixgbe_hw
*hw
= &adapter
->hw
;
6432 if (prtad
!= hw
->phy
.mdio
.prtad
)
6434 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
6437 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
6439 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6441 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
6445 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6447 * @netdev: network interface device structure
6449 * Returns non-zero on failure
6451 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
6454 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6455 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6457 if (is_valid_ether_addr(mac
->san_addr
)) {
6459 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6466 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6468 * @netdev: network interface device structure
6470 * Returns non-zero on failure
6472 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
6475 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6476 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6478 if (is_valid_ether_addr(mac
->san_addr
)) {
6480 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6486 #ifdef CONFIG_NET_POLL_CONTROLLER
6488 * Polling 'interrupt' - used by things like netconsole to send skbs
6489 * without having to re-enable interrupts. It's not called while
6490 * the interrupt routine is executing.
6492 static void ixgbe_netpoll(struct net_device
*netdev
)
6494 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6497 /* if interface is down do nothing */
6498 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6501 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
6502 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
6503 int num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
6504 for (i
= 0; i
< num_q_vectors
; i
++) {
6505 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
6506 ixgbe_msix_clean_many(0, q_vector
);
6509 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
6511 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
6515 static const struct net_device_ops ixgbe_netdev_ops
= {
6516 .ndo_open
= ixgbe_open
,
6517 .ndo_stop
= ixgbe_close
,
6518 .ndo_start_xmit
= ixgbe_xmit_frame
,
6519 .ndo_select_queue
= ixgbe_select_queue
,
6520 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
6521 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
6522 .ndo_validate_addr
= eth_validate_addr
,
6523 .ndo_set_mac_address
= ixgbe_set_mac
,
6524 .ndo_change_mtu
= ixgbe_change_mtu
,
6525 .ndo_tx_timeout
= ixgbe_tx_timeout
,
6526 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
6527 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
6528 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
6529 .ndo_do_ioctl
= ixgbe_ioctl
,
6530 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
6531 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
6532 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
6533 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
6534 #ifdef CONFIG_NET_POLL_CONTROLLER
6535 .ndo_poll_controller
= ixgbe_netpoll
,
6538 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
6539 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
6540 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
6541 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
6542 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
6543 #endif /* IXGBE_FCOE */
6546 static void __devinit
ixgbe_probe_vf(struct ixgbe_adapter
*adapter
,
6547 const struct ixgbe_info
*ii
)
6549 #ifdef CONFIG_PCI_IOV
6550 struct ixgbe_hw
*hw
= &adapter
->hw
;
6553 if (hw
->mac
.type
!= ixgbe_mac_82599EB
|| !max_vfs
)
6556 /* The 82599 supports up to 64 VFs per physical function
6557 * but this implementation limits allocation to 63 so that
6558 * basic networking resources are still available to the
6561 adapter
->num_vfs
= (max_vfs
> 63) ? 63 : max_vfs
;
6562 adapter
->flags
|= IXGBE_FLAG_SRIOV_ENABLED
;
6563 err
= pci_enable_sriov(adapter
->pdev
, adapter
->num_vfs
);
6565 e_err(probe
, "Failed to enable PCI sriov: %d\n", err
);
6568 /* If call to enable VFs succeeded then allocate memory
6569 * for per VF control structures.
6572 kcalloc(adapter
->num_vfs
,
6573 sizeof(struct vf_data_storage
), GFP_KERNEL
);
6574 if (adapter
->vfinfo
) {
6575 /* Now that we're sure SR-IOV is enabled
6576 * and memory allocated set up the mailbox parameters
6578 ixgbe_init_mbx_params_pf(hw
);
6579 memcpy(&hw
->mbx
.ops
, ii
->mbx_ops
,
6580 sizeof(hw
->mbx
.ops
));
6582 /* Disable RSC when in SR-IOV mode */
6583 adapter
->flags2
&= ~(IXGBE_FLAG2_RSC_CAPABLE
|
6584 IXGBE_FLAG2_RSC_ENABLED
);
6589 e_err(probe
, "Unable to allocate memory for VF Data Storage - "
6590 "SRIOV disabled\n");
6591 pci_disable_sriov(adapter
->pdev
);
6594 adapter
->flags
&= ~IXGBE_FLAG_SRIOV_ENABLED
;
6595 adapter
->num_vfs
= 0;
6596 #endif /* CONFIG_PCI_IOV */
6600 * ixgbe_probe - Device Initialization Routine
6601 * @pdev: PCI device information struct
6602 * @ent: entry in ixgbe_pci_tbl
6604 * Returns 0 on success, negative on failure
6606 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6607 * The OS initialization, configuring of the adapter private structure,
6608 * and a hardware reset occur.
6610 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
6611 const struct pci_device_id
*ent
)
6613 struct net_device
*netdev
;
6614 struct ixgbe_adapter
*adapter
= NULL
;
6615 struct ixgbe_hw
*hw
;
6616 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
6617 static int cards_found
;
6618 int i
, err
, pci_using_dac
;
6619 unsigned int indices
= num_possible_cpus();
6625 /* Catch broken hardware that put the wrong VF device ID in
6626 * the PCIe SR-IOV capability.
6628 if (pdev
->is_virtfn
) {
6629 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
6630 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
6634 err
= pci_enable_device_mem(pdev
);
6638 if (!dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64)) &&
6639 !dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64))) {
6642 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
6644 err
= dma_set_coherent_mask(&pdev
->dev
,
6648 "No usable DMA configuration, aborting\n");
6655 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
6656 IORESOURCE_MEM
), ixgbe_driver_name
);
6659 "pci_request_selected_regions failed 0x%x\n", err
);
6663 pci_enable_pcie_error_reporting(pdev
);
6665 pci_set_master(pdev
);
6666 pci_save_state(pdev
);
6668 if (ii
->mac
== ixgbe_mac_82598EB
)
6669 indices
= min_t(unsigned int, indices
, IXGBE_MAX_RSS_INDICES
);
6671 indices
= min_t(unsigned int, indices
, IXGBE_MAX_FDIR_INDICES
);
6673 indices
= max_t(unsigned int, indices
, IXGBE_MAX_DCB_INDICES
);
6675 indices
+= min_t(unsigned int, num_possible_cpus(),
6676 IXGBE_MAX_FCOE_INDICES
);
6678 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
6681 goto err_alloc_etherdev
;
6684 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
6686 pci_set_drvdata(pdev
, netdev
);
6687 adapter
= netdev_priv(netdev
);
6689 adapter
->netdev
= netdev
;
6690 adapter
->pdev
= pdev
;
6693 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
6695 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
6696 pci_resource_len(pdev
, 0));
6702 for (i
= 1; i
<= 5; i
++) {
6703 if (pci_resource_len(pdev
, i
) == 0)
6707 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
6708 ixgbe_set_ethtool_ops(netdev
);
6709 netdev
->watchdog_timeo
= 5 * HZ
;
6710 strcpy(netdev
->name
, pci_name(pdev
));
6712 adapter
->bd_number
= cards_found
;
6715 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
6716 hw
->mac
.type
= ii
->mac
;
6719 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
6720 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
6721 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
6722 if (!(eec
& (1 << 8)))
6723 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
6726 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
6727 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
6728 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
6729 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
6730 hw
->phy
.mdio
.mmds
= 0;
6731 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
6732 hw
->phy
.mdio
.dev
= netdev
;
6733 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
6734 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
6736 /* set up this timer and work struct before calling get_invariants
6737 * which might start the timer
6739 init_timer(&adapter
->sfp_timer
);
6740 adapter
->sfp_timer
.function
= ixgbe_sfp_timer
;
6741 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
6743 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
6745 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
6746 INIT_WORK(&adapter
->multispeed_fiber_task
, ixgbe_multispeed_fiber_task
);
6748 /* a new SFP+ module arrival, called from GPI SDP2 context */
6749 INIT_WORK(&adapter
->sfp_config_module_task
,
6750 ixgbe_sfp_config_module_task
);
6752 ii
->get_invariants(hw
);
6754 /* setup the private structure */
6755 err
= ixgbe_sw_init(adapter
);
6759 /* Make it possible the adapter to be woken up via WOL */
6760 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
6761 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6764 * If there is a fan on this device and it has failed log the
6767 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
6768 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
6769 if (esdp
& IXGBE_ESDP_SDP1
)
6770 e_crit(probe
, "Fan has stopped, replace the adapter\n");
6773 /* reset_hw fills in the perm_addr as well */
6774 hw
->phy
.reset_if_overtemp
= true;
6775 err
= hw
->mac
.ops
.reset_hw(hw
);
6776 hw
->phy
.reset_if_overtemp
= false;
6777 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
6778 hw
->mac
.type
== ixgbe_mac_82598EB
) {
6780 * Start a kernel thread to watch for a module to arrive.
6781 * Only do this for 82598, since 82599 will generate
6782 * interrupts on module arrival.
6784 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
6785 mod_timer(&adapter
->sfp_timer
,
6786 round_jiffies(jiffies
+ (2 * HZ
)));
6788 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
6789 e_dev_err("failed to initialize because an unsupported SFP+ "
6790 "module type was detected.\n");
6791 e_dev_err("Reload the driver after installing a supported "
6795 e_dev_err("HW Init failed: %d\n", err
);
6799 ixgbe_probe_vf(adapter
, ii
);
6801 netdev
->features
= NETIF_F_SG
|
6803 NETIF_F_HW_VLAN_TX
|
6804 NETIF_F_HW_VLAN_RX
|
6805 NETIF_F_HW_VLAN_FILTER
;
6807 netdev
->features
|= NETIF_F_IPV6_CSUM
;
6808 netdev
->features
|= NETIF_F_TSO
;
6809 netdev
->features
|= NETIF_F_TSO6
;
6810 netdev
->features
|= NETIF_F_GRO
;
6812 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
6813 netdev
->features
|= NETIF_F_SCTP_CSUM
;
6815 netdev
->vlan_features
|= NETIF_F_TSO
;
6816 netdev
->vlan_features
|= NETIF_F_TSO6
;
6817 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
6818 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
6819 netdev
->vlan_features
|= NETIF_F_SG
;
6821 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6822 adapter
->flags
&= ~(IXGBE_FLAG_RSS_ENABLED
|
6823 IXGBE_FLAG_DCB_ENABLED
);
6824 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
6825 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
6827 #ifdef CONFIG_IXGBE_DCB
6828 netdev
->dcbnl_ops
= &dcbnl_ops
;
6832 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
6833 if (hw
->mac
.ops
.get_device_caps
) {
6834 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
6835 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
6836 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
6839 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
6840 netdev
->vlan_features
|= NETIF_F_FCOE_CRC
;
6841 netdev
->vlan_features
|= NETIF_F_FSO
;
6842 netdev
->vlan_features
|= NETIF_F_FCOE_MTU
;
6844 #endif /* IXGBE_FCOE */
6845 if (pci_using_dac
) {
6846 netdev
->features
|= NETIF_F_HIGHDMA
;
6847 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
6850 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6851 netdev
->features
|= NETIF_F_LRO
;
6853 /* make sure the EEPROM is good */
6854 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
6855 e_dev_err("The EEPROM Checksum Is Not Valid\n");
6860 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
6861 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
6863 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
6864 e_dev_err("invalid MAC address\n");
6869 /* power down the optics */
6870 if (hw
->phy
.multispeed_fiber
)
6871 hw
->mac
.ops
.disable_tx_laser(hw
);
6873 init_timer(&adapter
->watchdog_timer
);
6874 adapter
->watchdog_timer
.function
= ixgbe_watchdog
;
6875 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
6877 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
6878 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
6880 err
= ixgbe_init_interrupt_scheme(adapter
);
6884 switch (pdev
->device
) {
6885 case IXGBE_DEV_ID_82599_KX4
:
6886 adapter
->wol
= (IXGBE_WUFC_MAG
| IXGBE_WUFC_EX
|
6887 IXGBE_WUFC_MC
| IXGBE_WUFC_BC
);
6893 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
6895 /* pick up the PCI bus settings for reporting later */
6896 hw
->mac
.ops
.get_bus_info(hw
);
6898 /* print bus type/speed/width info */
6899 e_dev_info("(PCI Express:%s:%s) %pM\n",
6900 (hw
->bus
.speed
== ixgbe_bus_speed_5000
? "5.0Gb/s" :
6901 hw
->bus
.speed
== ixgbe_bus_speed_2500
? "2.5Gb/s" :
6903 (hw
->bus
.width
== ixgbe_bus_width_pcie_x8
? "Width x8" :
6904 hw
->bus
.width
== ixgbe_bus_width_pcie_x4
? "Width x4" :
6905 hw
->bus
.width
== ixgbe_bus_width_pcie_x1
? "Width x1" :
6908 ixgbe_read_pba_num_generic(hw
, &part_num
);
6909 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
6910 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, "
6911 "PBA No: %06x-%03x\n",
6912 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
6913 (part_num
>> 8), (part_num
& 0xff));
6915 e_dev_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
6916 hw
->mac
.type
, hw
->phy
.type
,
6917 (part_num
>> 8), (part_num
& 0xff));
6919 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
6920 e_dev_warn("PCI-Express bandwidth available for this card is "
6921 "not sufficient for optimal performance.\n");
6922 e_dev_warn("For optimal performance a x8 PCI-Express slot "
6926 /* save off EEPROM version number */
6927 hw
->eeprom
.ops
.read(hw
, 0x29, &adapter
->eeprom_version
);
6929 /* reset the hardware with the new settings */
6930 err
= hw
->mac
.ops
.start_hw(hw
);
6932 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
6933 /* We are running on a pre-production device, log a warning */
6934 e_dev_warn("This device is a pre-production adapter/LOM. "
6935 "Please be aware there may be issues associated "
6936 "with your hardware. If you are experiencing "
6937 "problems please contact your Intel or hardware "
6938 "representative who provided you with this "
6941 strcpy(netdev
->name
, "eth%d");
6942 err
= register_netdev(netdev
);
6946 /* carrier off reporting is important to ethtool even BEFORE open */
6947 netif_carrier_off(netdev
);
6949 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
6950 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
6951 INIT_WORK(&adapter
->fdir_reinit_task
, ixgbe_fdir_reinit_task
);
6953 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
6954 INIT_WORK(&adapter
->check_overtemp_task
,
6955 ixgbe_check_overtemp_task
);
6956 #ifdef CONFIG_IXGBE_DCA
6957 if (dca_add_requester(&pdev
->dev
) == 0) {
6958 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
6959 ixgbe_setup_dca(adapter
);
6962 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6963 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
6964 for (i
= 0; i
< adapter
->num_vfs
; i
++)
6965 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
6968 /* add san mac addr to netdev */
6969 ixgbe_add_sanmac_netdev(netdev
);
6971 e_dev_info("Intel(R) 10 Gigabit Network Connection\n");
6976 ixgbe_release_hw_control(adapter
);
6977 ixgbe_clear_interrupt_scheme(adapter
);
6980 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6981 ixgbe_disable_sriov(adapter
);
6982 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
6983 del_timer_sync(&adapter
->sfp_timer
);
6984 cancel_work_sync(&adapter
->sfp_task
);
6985 cancel_work_sync(&adapter
->multispeed_fiber_task
);
6986 cancel_work_sync(&adapter
->sfp_config_module_task
);
6987 iounmap(hw
->hw_addr
);
6989 free_netdev(netdev
);
6991 pci_release_selected_regions(pdev
,
6992 pci_select_bars(pdev
, IORESOURCE_MEM
));
6995 pci_disable_device(pdev
);
7000 * ixgbe_remove - Device Removal Routine
7001 * @pdev: PCI device information struct
7003 * ixgbe_remove is called by the PCI subsystem to alert the driver
7004 * that it should release a PCI device. The could be caused by a
7005 * Hot-Plug event, or because the driver is going to be removed from
7008 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
7010 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7011 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7013 set_bit(__IXGBE_DOWN
, &adapter
->state
);
7014 /* clear the module not found bit to make sure the worker won't
7017 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
7018 del_timer_sync(&adapter
->watchdog_timer
);
7020 del_timer_sync(&adapter
->sfp_timer
);
7021 cancel_work_sync(&adapter
->watchdog_task
);
7022 cancel_work_sync(&adapter
->sfp_task
);
7023 cancel_work_sync(&adapter
->multispeed_fiber_task
);
7024 cancel_work_sync(&adapter
->sfp_config_module_task
);
7025 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
7026 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
7027 cancel_work_sync(&adapter
->fdir_reinit_task
);
7028 flush_scheduled_work();
7030 #ifdef CONFIG_IXGBE_DCA
7031 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
7032 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
7033 dca_remove_requester(&pdev
->dev
);
7034 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
7039 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7040 ixgbe_cleanup_fcoe(adapter
);
7042 #endif /* IXGBE_FCOE */
7044 /* remove the added san mac */
7045 ixgbe_del_sanmac_netdev(netdev
);
7047 if (netdev
->reg_state
== NETREG_REGISTERED
)
7048 unregister_netdev(netdev
);
7050 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7051 ixgbe_disable_sriov(adapter
);
7053 ixgbe_clear_interrupt_scheme(adapter
);
7055 ixgbe_release_hw_control(adapter
);
7057 iounmap(adapter
->hw
.hw_addr
);
7058 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
7061 e_dev_info("complete\n");
7063 free_netdev(netdev
);
7065 pci_disable_pcie_error_reporting(pdev
);
7067 pci_disable_device(pdev
);
7071 * ixgbe_io_error_detected - called when PCI error is detected
7072 * @pdev: Pointer to PCI device
7073 * @state: The current pci connection state
7075 * This function is called after a PCI bus error affecting
7076 * this device has been detected.
7078 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
7079 pci_channel_state_t state
)
7081 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7082 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7084 netif_device_detach(netdev
);
7086 if (state
== pci_channel_io_perm_failure
)
7087 return PCI_ERS_RESULT_DISCONNECT
;
7089 if (netif_running(netdev
))
7090 ixgbe_down(adapter
);
7091 pci_disable_device(pdev
);
7093 /* Request a slot reset. */
7094 return PCI_ERS_RESULT_NEED_RESET
;
7098 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7099 * @pdev: Pointer to PCI device
7101 * Restart the card from scratch, as if from a cold-boot.
7103 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
7105 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7106 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7107 pci_ers_result_t result
;
7110 if (pci_enable_device_mem(pdev
)) {
7111 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
7112 result
= PCI_ERS_RESULT_DISCONNECT
;
7114 pci_set_master(pdev
);
7115 pci_restore_state(pdev
);
7116 pci_save_state(pdev
);
7118 pci_wake_from_d3(pdev
, false);
7120 ixgbe_reset(adapter
);
7121 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7122 result
= PCI_ERS_RESULT_RECOVERED
;
7125 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7127 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7128 "failed 0x%0x\n", err
);
7129 /* non-fatal, continue */
7136 * ixgbe_io_resume - called when traffic can start flowing again.
7137 * @pdev: Pointer to PCI device
7139 * This callback is called when the error recovery driver tells us that
7140 * its OK to resume normal operation.
7142 static void ixgbe_io_resume(struct pci_dev
*pdev
)
7144 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7145 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7147 if (netif_running(netdev
)) {
7148 if (ixgbe_up(adapter
)) {
7149 e_info(probe
, "ixgbe_up failed after reset\n");
7154 netif_device_attach(netdev
);
7157 static struct pci_error_handlers ixgbe_err_handler
= {
7158 .error_detected
= ixgbe_io_error_detected
,
7159 .slot_reset
= ixgbe_io_slot_reset
,
7160 .resume
= ixgbe_io_resume
,
7163 static struct pci_driver ixgbe_driver
= {
7164 .name
= ixgbe_driver_name
,
7165 .id_table
= ixgbe_pci_tbl
,
7166 .probe
= ixgbe_probe
,
7167 .remove
= __devexit_p(ixgbe_remove
),
7169 .suspend
= ixgbe_suspend
,
7170 .resume
= ixgbe_resume
,
7172 .shutdown
= ixgbe_shutdown
,
7173 .err_handler
= &ixgbe_err_handler
7177 * ixgbe_init_module - Driver Registration Routine
7179 * ixgbe_init_module is the first routine called when the driver is
7180 * loaded. All it does is register with the PCI subsystem.
7182 static int __init
ixgbe_init_module(void)
7185 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
7186 pr_info("%s\n", ixgbe_copyright
);
7188 #ifdef CONFIG_IXGBE_DCA
7189 dca_register_notify(&dca_notifier
);
7192 ret
= pci_register_driver(&ixgbe_driver
);
7196 module_init(ixgbe_init_module
);
7199 * ixgbe_exit_module - Driver Exit Cleanup Routine
7201 * ixgbe_exit_module is called just before the driver is removed
7204 static void __exit
ixgbe_exit_module(void)
7206 #ifdef CONFIG_IXGBE_DCA
7207 dca_unregister_notify(&dca_notifier
);
7209 pci_unregister_driver(&ixgbe_driver
);
7212 #ifdef CONFIG_IXGBE_DCA
7213 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
7218 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
7219 __ixgbe_notify_dca
);
7221 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
7224 #endif /* CONFIG_IXGBE_DCA */
7227 * ixgbe_get_hw_dev return device
7228 * used by hardware layer to print debugging information
7230 struct net_device
*ixgbe_get_hw_dev(struct ixgbe_hw
*hw
)
7232 struct ixgbe_adapter
*adapter
= hw
->back
;
7233 return adapter
->netdev
;
7236 module_exit(ixgbe_exit_module
);