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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ixgbe / ixgbe_ethtool.c
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 /* ethtool support for ixgbe */
29
30 #include <linux/types.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/pci.h>
34 #include <linux/netdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/vmalloc.h>
37 #include <linux/uaccess.h>
38
39 #include "ixgbe.h"
40
41
42 #define IXGBE_ALL_RAR_ENTRIES 16
43
44 enum {NETDEV_STATS, IXGBE_STATS};
45
46 struct ixgbe_stats {
47 char stat_string[ETH_GSTRING_LEN];
48 int type;
49 int sizeof_stat;
50 int stat_offset;
51 };
52
53 #define IXGBE_STAT(m) IXGBE_STATS, \
54 sizeof(((struct ixgbe_adapter *)0)->m), \
55 offsetof(struct ixgbe_adapter, m)
56 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \
57 sizeof(((struct rtnl_link_stats64 *)0)->m), \
58 offsetof(struct rtnl_link_stats64, m)
59
60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
61 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
62 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
63 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
64 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
65 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
66 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
67 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
68 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
69 {"lsc_int", IXGBE_STAT(lsc_int)},
70 {"tx_busy", IXGBE_STAT(tx_busy)},
71 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
72 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
73 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
74 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
75 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
76 {"multicast", IXGBE_NETDEV_STAT(multicast)},
77 {"broadcast", IXGBE_STAT(stats.bprc)},
78 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
79 {"collisions", IXGBE_NETDEV_STAT(collisions)},
80 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
81 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
82 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
83 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
84 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
85 {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
86 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
87 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
88 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
89 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
90 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
91 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
92 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
93 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
94 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
95 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
96 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
97 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
98 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
99 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
100 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
101 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
102 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
103 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
104 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
105 #ifdef IXGBE_FCOE
106 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
107 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
108 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
109 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
110 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
111 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
112 #endif /* IXGBE_FCOE */
113 };
114
115 #define IXGBE_QUEUE_STATS_LEN \
116 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
117 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
118 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
120 #define IXGBE_PB_STATS_LEN ( \
121 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
122 IXGBE_FLAG_DCB_ENABLED) ? \
123 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
124 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
125 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
126 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
127 / sizeof(u64) : 0)
128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
129 IXGBE_PB_STATS_LEN + \
130 IXGBE_QUEUE_STATS_LEN)
131
132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
133 "Register test (offline)", "Eeprom test (offline)",
134 "Interrupt test (offline)", "Loopback test (offline)",
135 "Link test (on/offline)"
136 };
137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
138
139 static int ixgbe_get_settings(struct net_device *netdev,
140 struct ethtool_cmd *ecmd)
141 {
142 struct ixgbe_adapter *adapter = netdev_priv(netdev);
143 struct ixgbe_hw *hw = &adapter->hw;
144 u32 link_speed = 0;
145 bool link_up;
146
147 ecmd->supported = SUPPORTED_10000baseT_Full;
148 ecmd->autoneg = AUTONEG_ENABLE;
149 ecmd->transceiver = XCVR_EXTERNAL;
150 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
151 (hw->phy.multispeed_fiber)) {
152 ecmd->supported |= (SUPPORTED_1000baseT_Full |
153 SUPPORTED_Autoneg);
154
155 ecmd->advertising = ADVERTISED_Autoneg;
156 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
157 ecmd->advertising |= ADVERTISED_10000baseT_Full;
158 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
159 ecmd->advertising |= ADVERTISED_1000baseT_Full;
160 /*
161 * It's possible that phy.autoneg_advertised may not be
162 * set yet. If so display what the default would be -
163 * both 1G and 10G supported.
164 */
165 if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
166 ADVERTISED_10000baseT_Full)))
167 ecmd->advertising |= (ADVERTISED_10000baseT_Full |
168 ADVERTISED_1000baseT_Full);
169
170 if (hw->phy.media_type == ixgbe_media_type_copper) {
171 ecmd->supported |= SUPPORTED_TP;
172 ecmd->advertising |= ADVERTISED_TP;
173 ecmd->port = PORT_TP;
174 } else {
175 ecmd->supported |= SUPPORTED_FIBRE;
176 ecmd->advertising |= ADVERTISED_FIBRE;
177 ecmd->port = PORT_FIBRE;
178 }
179 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
180 /* Set as FIBRE until SERDES defined in kernel */
181 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
182 ecmd->supported = (SUPPORTED_1000baseT_Full |
183 SUPPORTED_FIBRE);
184 ecmd->advertising = (ADVERTISED_1000baseT_Full |
185 ADVERTISED_FIBRE);
186 ecmd->port = PORT_FIBRE;
187 ecmd->autoneg = AUTONEG_DISABLE;
188 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
189 (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
190 ecmd->supported |= (SUPPORTED_1000baseT_Full |
191 SUPPORTED_Autoneg |
192 SUPPORTED_FIBRE);
193 ecmd->advertising = (ADVERTISED_10000baseT_Full |
194 ADVERTISED_1000baseT_Full |
195 ADVERTISED_Autoneg |
196 ADVERTISED_FIBRE);
197 ecmd->port = PORT_FIBRE;
198 } else {
199 ecmd->supported |= (SUPPORTED_1000baseT_Full |
200 SUPPORTED_FIBRE);
201 ecmd->advertising = (ADVERTISED_10000baseT_Full |
202 ADVERTISED_1000baseT_Full |
203 ADVERTISED_FIBRE);
204 ecmd->port = PORT_FIBRE;
205 }
206 } else {
207 ecmd->supported |= SUPPORTED_FIBRE;
208 ecmd->advertising = (ADVERTISED_10000baseT_Full |
209 ADVERTISED_FIBRE);
210 ecmd->port = PORT_FIBRE;
211 ecmd->autoneg = AUTONEG_DISABLE;
212 }
213
214 /* Get PHY type */
215 switch (adapter->hw.phy.type) {
216 case ixgbe_phy_tn:
217 case ixgbe_phy_aq:
218 case ixgbe_phy_cu_unknown:
219 /* Copper 10G-BASET */
220 ecmd->port = PORT_TP;
221 break;
222 case ixgbe_phy_qt:
223 ecmd->port = PORT_FIBRE;
224 break;
225 case ixgbe_phy_nl:
226 case ixgbe_phy_sfp_passive_tyco:
227 case ixgbe_phy_sfp_passive_unknown:
228 case ixgbe_phy_sfp_ftl:
229 case ixgbe_phy_sfp_avago:
230 case ixgbe_phy_sfp_intel:
231 case ixgbe_phy_sfp_unknown:
232 switch (adapter->hw.phy.sfp_type) {
233 /* SFP+ devices, further checking needed */
234 case ixgbe_sfp_type_da_cu:
235 case ixgbe_sfp_type_da_cu_core0:
236 case ixgbe_sfp_type_da_cu_core1:
237 ecmd->port = PORT_DA;
238 break;
239 case ixgbe_sfp_type_sr:
240 case ixgbe_sfp_type_lr:
241 case ixgbe_sfp_type_srlr_core0:
242 case ixgbe_sfp_type_srlr_core1:
243 ecmd->port = PORT_FIBRE;
244 break;
245 case ixgbe_sfp_type_not_present:
246 ecmd->port = PORT_NONE;
247 break;
248 case ixgbe_sfp_type_1g_cu_core0:
249 case ixgbe_sfp_type_1g_cu_core1:
250 ecmd->port = PORT_TP;
251 ecmd->supported = SUPPORTED_TP;
252 ecmd->advertising = (ADVERTISED_1000baseT_Full |
253 ADVERTISED_TP);
254 break;
255 case ixgbe_sfp_type_unknown:
256 default:
257 ecmd->port = PORT_OTHER;
258 break;
259 }
260 break;
261 case ixgbe_phy_xaui:
262 ecmd->port = PORT_NONE;
263 break;
264 case ixgbe_phy_unknown:
265 case ixgbe_phy_generic:
266 case ixgbe_phy_sfp_unsupported:
267 default:
268 ecmd->port = PORT_OTHER;
269 break;
270 }
271
272 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
273 if (link_up) {
274 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
275 SPEED_10000 : SPEED_1000;
276 ecmd->duplex = DUPLEX_FULL;
277 } else {
278 ecmd->speed = -1;
279 ecmd->duplex = -1;
280 }
281
282 return 0;
283 }
284
285 static int ixgbe_set_settings(struct net_device *netdev,
286 struct ethtool_cmd *ecmd)
287 {
288 struct ixgbe_adapter *adapter = netdev_priv(netdev);
289 struct ixgbe_hw *hw = &adapter->hw;
290 u32 advertised, old;
291 s32 err = 0;
292
293 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
294 (hw->phy.multispeed_fiber)) {
295 /* 10000/copper and 1000/copper must autoneg
296 * this function does not support any duplex forcing, but can
297 * limit the advertising of the adapter to only 10000 or 1000 */
298 if (ecmd->autoneg == AUTONEG_DISABLE)
299 return -EINVAL;
300
301 old = hw->phy.autoneg_advertised;
302 advertised = 0;
303 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
304 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
305
306 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
307 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
308
309 if (old == advertised)
310 return err;
311 /* this sets the link speed and restarts auto-neg */
312 hw->mac.autotry_restart = true;
313 err = hw->mac.ops.setup_link(hw, advertised, true, true);
314 if (err) {
315 e_info(probe, "setup link failed with code %d\n", err);
316 hw->mac.ops.setup_link(hw, old, true, true);
317 }
318 } else {
319 /* in this case we currently only support 10Gb/FULL */
320 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
321 (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
322 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
323 return -EINVAL;
324 }
325
326 return err;
327 }
328
329 static void ixgbe_get_pauseparam(struct net_device *netdev,
330 struct ethtool_pauseparam *pause)
331 {
332 struct ixgbe_adapter *adapter = netdev_priv(netdev);
333 struct ixgbe_hw *hw = &adapter->hw;
334
335 /*
336 * Flow Control Autoneg isn't on if
337 * - we didn't ask for it OR
338 * - it failed, we know this by tx & rx being off
339 */
340 if (hw->fc.disable_fc_autoneg ||
341 (hw->fc.current_mode == ixgbe_fc_none))
342 pause->autoneg = 0;
343 else
344 pause->autoneg = 1;
345
346 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
347 pause->rx_pause = 1;
348 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
349 pause->tx_pause = 1;
350 } else if (hw->fc.current_mode == ixgbe_fc_full) {
351 pause->rx_pause = 1;
352 pause->tx_pause = 1;
353 #ifdef CONFIG_DCB
354 } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
355 pause->rx_pause = 0;
356 pause->tx_pause = 0;
357 #endif
358 }
359 }
360
361 static int ixgbe_set_pauseparam(struct net_device *netdev,
362 struct ethtool_pauseparam *pause)
363 {
364 struct ixgbe_adapter *adapter = netdev_priv(netdev);
365 struct ixgbe_hw *hw = &adapter->hw;
366 struct ixgbe_fc_info fc;
367
368 #ifdef CONFIG_DCB
369 if (adapter->dcb_cfg.pfc_mode_enable ||
370 ((hw->mac.type == ixgbe_mac_82598EB) &&
371 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
372 return -EINVAL;
373
374 #endif
375 fc = hw->fc;
376
377 if (pause->autoneg != AUTONEG_ENABLE)
378 fc.disable_fc_autoneg = true;
379 else
380 fc.disable_fc_autoneg = false;
381
382 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
383 fc.requested_mode = ixgbe_fc_full;
384 else if (pause->rx_pause && !pause->tx_pause)
385 fc.requested_mode = ixgbe_fc_rx_pause;
386 else if (!pause->rx_pause && pause->tx_pause)
387 fc.requested_mode = ixgbe_fc_tx_pause;
388 else if (!pause->rx_pause && !pause->tx_pause)
389 fc.requested_mode = ixgbe_fc_none;
390 else
391 return -EINVAL;
392
393 #ifdef CONFIG_DCB
394 adapter->last_lfc_mode = fc.requested_mode;
395 #endif
396
397 /* if the thing changed then we'll update and use new autoneg */
398 if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
399 hw->fc = fc;
400 if (netif_running(netdev))
401 ixgbe_reinit_locked(adapter);
402 else
403 ixgbe_reset(adapter);
404 }
405
406 return 0;
407 }
408
409 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
410 {
411 struct ixgbe_adapter *adapter = netdev_priv(netdev);
412 return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
413 }
414
415 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
416 {
417 struct ixgbe_adapter *adapter = netdev_priv(netdev);
418 if (data)
419 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
420 else
421 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
422
423 return 0;
424 }
425
426 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
427 {
428 return (netdev->features & NETIF_F_IP_CSUM) != 0;
429 }
430
431 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
432 {
433 struct ixgbe_adapter *adapter = netdev_priv(netdev);
434 u32 feature_list;
435
436 feature_list = (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
437 switch (adapter->hw.mac.type) {
438 case ixgbe_mac_82599EB:
439 case ixgbe_mac_X540:
440 feature_list |= NETIF_F_SCTP_CSUM;
441 break;
442 default:
443 break;
444 }
445 if (data)
446 netdev->features |= feature_list;
447 else
448 netdev->features &= ~feature_list;
449
450 return 0;
451 }
452
453 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
454 {
455 if (data) {
456 netdev->features |= NETIF_F_TSO;
457 netdev->features |= NETIF_F_TSO6;
458 } else {
459 netdev->features &= ~NETIF_F_TSO;
460 netdev->features &= ~NETIF_F_TSO6;
461 }
462 return 0;
463 }
464
465 static u32 ixgbe_get_msglevel(struct net_device *netdev)
466 {
467 struct ixgbe_adapter *adapter = netdev_priv(netdev);
468 return adapter->msg_enable;
469 }
470
471 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
472 {
473 struct ixgbe_adapter *adapter = netdev_priv(netdev);
474 adapter->msg_enable = data;
475 }
476
477 static int ixgbe_get_regs_len(struct net_device *netdev)
478 {
479 #define IXGBE_REGS_LEN 1128
480 return IXGBE_REGS_LEN * sizeof(u32);
481 }
482
483 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
484
485 static void ixgbe_get_regs(struct net_device *netdev,
486 struct ethtool_regs *regs, void *p)
487 {
488 struct ixgbe_adapter *adapter = netdev_priv(netdev);
489 struct ixgbe_hw *hw = &adapter->hw;
490 u32 *regs_buff = p;
491 u8 i;
492
493 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
494
495 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
496
497 /* General Registers */
498 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
499 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
500 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
501 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
502 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
503 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
504 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
505 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
506
507 /* NVM Register */
508 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
509 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
510 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
511 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
512 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
513 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
514 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
515 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
516 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
517 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
518
519 /* Interrupt */
520 /* don't read EICR because it can clear interrupt causes, instead
521 * read EICS which is a shadow but doesn't clear EICR */
522 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
523 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
524 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
525 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
526 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
527 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
528 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
529 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
530 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
531 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
532 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
533 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
534
535 /* Flow Control */
536 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
537 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
538 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
539 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
540 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
541 for (i = 0; i < 8; i++) {
542 switch (hw->mac.type) {
543 case ixgbe_mac_82598EB:
544 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
545 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
546 break;
547 case ixgbe_mac_82599EB:
548 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
549 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
550 break;
551 default:
552 break;
553 }
554 }
555 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
556 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
557
558 /* Receive DMA */
559 for (i = 0; i < 64; i++)
560 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
561 for (i = 0; i < 64; i++)
562 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
563 for (i = 0; i < 64; i++)
564 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
565 for (i = 0; i < 64; i++)
566 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
567 for (i = 0; i < 64; i++)
568 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
569 for (i = 0; i < 64; i++)
570 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
571 for (i = 0; i < 16; i++)
572 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
573 for (i = 0; i < 16; i++)
574 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
575 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
576 for (i = 0; i < 8; i++)
577 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
578 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
579 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
580
581 /* Receive */
582 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
583 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
584 for (i = 0; i < 16; i++)
585 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
586 for (i = 0; i < 16; i++)
587 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
588 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
589 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
590 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
591 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
592 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
593 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
594 for (i = 0; i < 8; i++)
595 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
596 for (i = 0; i < 8; i++)
597 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
598 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
599
600 /* Transmit */
601 for (i = 0; i < 32; i++)
602 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
603 for (i = 0; i < 32; i++)
604 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
605 for (i = 0; i < 32; i++)
606 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
607 for (i = 0; i < 32; i++)
608 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
609 for (i = 0; i < 32; i++)
610 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
611 for (i = 0; i < 32; i++)
612 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
613 for (i = 0; i < 32; i++)
614 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
615 for (i = 0; i < 32; i++)
616 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
617 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
618 for (i = 0; i < 16; i++)
619 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
620 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
621 for (i = 0; i < 8; i++)
622 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
623 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
624
625 /* Wake Up */
626 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
627 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
628 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
629 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
630 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
631 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
632 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
633 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
634 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
635
636 /* DCB */
637 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
638 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
639 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
640 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
641 for (i = 0; i < 8; i++)
642 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
643 for (i = 0; i < 8; i++)
644 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
645 for (i = 0; i < 8; i++)
646 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
647 for (i = 0; i < 8; i++)
648 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
649 for (i = 0; i < 8; i++)
650 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
651 for (i = 0; i < 8; i++)
652 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
653
654 /* Statistics */
655 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
656 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
657 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
658 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
659 for (i = 0; i < 8; i++)
660 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
661 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
662 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
663 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
664 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
665 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
666 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
667 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
668 for (i = 0; i < 8; i++)
669 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
670 for (i = 0; i < 8; i++)
671 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
672 for (i = 0; i < 8; i++)
673 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
674 for (i = 0; i < 8; i++)
675 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
676 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
677 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
678 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
679 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
680 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
681 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
682 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
683 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
684 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
685 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
686 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
687 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
688 for (i = 0; i < 8; i++)
689 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
690 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
691 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
692 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
693 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
694 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
695 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
696 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
697 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
698 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
699 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
700 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
701 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
702 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
703 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
704 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
705 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
706 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
707 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
708 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
709 for (i = 0; i < 16; i++)
710 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
711 for (i = 0; i < 16; i++)
712 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
713 for (i = 0; i < 16; i++)
714 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
715 for (i = 0; i < 16; i++)
716 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
717
718 /* MAC */
719 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
720 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
721 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
722 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
723 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
724 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
725 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
726 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
727 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
728 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
729 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
730 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
731 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
732 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
733 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
734 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
735 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
736 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
737 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
738 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
739 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
740 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
741 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
742 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
743 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
744 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
745 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
746 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
747 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
748 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
749 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
750 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
751 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
752
753 /* Diagnostic */
754 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
755 for (i = 0; i < 8; i++)
756 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
757 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
758 for (i = 0; i < 4; i++)
759 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
760 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
761 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
762 for (i = 0; i < 8; i++)
763 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
764 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
765 for (i = 0; i < 4; i++)
766 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
767 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
768 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
769 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
770 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
771 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
772 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
773 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
774 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
775 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
776 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
777 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
778 for (i = 0; i < 8; i++)
779 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
780 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
781 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
782 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
783 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
784 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
785 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
786 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
787 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
788 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
789 }
790
791 static int ixgbe_get_eeprom_len(struct net_device *netdev)
792 {
793 struct ixgbe_adapter *adapter = netdev_priv(netdev);
794 return adapter->hw.eeprom.word_size * 2;
795 }
796
797 static int ixgbe_get_eeprom(struct net_device *netdev,
798 struct ethtool_eeprom *eeprom, u8 *bytes)
799 {
800 struct ixgbe_adapter *adapter = netdev_priv(netdev);
801 struct ixgbe_hw *hw = &adapter->hw;
802 u16 *eeprom_buff;
803 int first_word, last_word, eeprom_len;
804 int ret_val = 0;
805 u16 i;
806
807 if (eeprom->len == 0)
808 return -EINVAL;
809
810 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
811
812 first_word = eeprom->offset >> 1;
813 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
814 eeprom_len = last_word - first_word + 1;
815
816 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
817 if (!eeprom_buff)
818 return -ENOMEM;
819
820 for (i = 0; i < eeprom_len; i++) {
821 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
822 &eeprom_buff[i])))
823 break;
824 }
825
826 /* Device's eeprom is always little-endian, word addressable */
827 for (i = 0; i < eeprom_len; i++)
828 le16_to_cpus(&eeprom_buff[i]);
829
830 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
831 kfree(eeprom_buff);
832
833 return ret_val;
834 }
835
836 static void ixgbe_get_drvinfo(struct net_device *netdev,
837 struct ethtool_drvinfo *drvinfo)
838 {
839 struct ixgbe_adapter *adapter = netdev_priv(netdev);
840 char firmware_version[32];
841
842 strncpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
843 strncpy(drvinfo->version, ixgbe_driver_version,
844 sizeof(drvinfo->version));
845
846 snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
847 (adapter->eeprom_version & 0xF000) >> 12,
848 (adapter->eeprom_version & 0x0FF0) >> 4,
849 adapter->eeprom_version & 0x000F);
850
851 strncpy(drvinfo->fw_version, firmware_version,
852 sizeof(drvinfo->fw_version));
853 strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
854 sizeof(drvinfo->bus_info));
855 drvinfo->n_stats = IXGBE_STATS_LEN;
856 drvinfo->testinfo_len = IXGBE_TEST_LEN;
857 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
858 }
859
860 static void ixgbe_get_ringparam(struct net_device *netdev,
861 struct ethtool_ringparam *ring)
862 {
863 struct ixgbe_adapter *adapter = netdev_priv(netdev);
864 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
865 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
866
867 ring->rx_max_pending = IXGBE_MAX_RXD;
868 ring->tx_max_pending = IXGBE_MAX_TXD;
869 ring->rx_mini_max_pending = 0;
870 ring->rx_jumbo_max_pending = 0;
871 ring->rx_pending = rx_ring->count;
872 ring->tx_pending = tx_ring->count;
873 ring->rx_mini_pending = 0;
874 ring->rx_jumbo_pending = 0;
875 }
876
877 static int ixgbe_set_ringparam(struct net_device *netdev,
878 struct ethtool_ringparam *ring)
879 {
880 struct ixgbe_adapter *adapter = netdev_priv(netdev);
881 struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
882 int i, err = 0;
883 u32 new_rx_count, new_tx_count;
884 bool need_update = false;
885
886 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
887 return -EINVAL;
888
889 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
890 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
891 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
892
893 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
894 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
895 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
896
897 if ((new_tx_count == adapter->tx_ring[0]->count) &&
898 (new_rx_count == adapter->rx_ring[0]->count)) {
899 /* nothing to do */
900 return 0;
901 }
902
903 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
904 msleep(1);
905
906 if (!netif_running(adapter->netdev)) {
907 for (i = 0; i < adapter->num_tx_queues; i++)
908 adapter->tx_ring[i]->count = new_tx_count;
909 for (i = 0; i < adapter->num_rx_queues; i++)
910 adapter->rx_ring[i]->count = new_rx_count;
911 adapter->tx_ring_count = new_tx_count;
912 adapter->rx_ring_count = new_rx_count;
913 goto clear_reset;
914 }
915
916 temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
917 if (!temp_tx_ring) {
918 err = -ENOMEM;
919 goto clear_reset;
920 }
921
922 if (new_tx_count != adapter->tx_ring_count) {
923 for (i = 0; i < adapter->num_tx_queues; i++) {
924 memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
925 sizeof(struct ixgbe_ring));
926 temp_tx_ring[i].count = new_tx_count;
927 err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
928 if (err) {
929 while (i) {
930 i--;
931 ixgbe_free_tx_resources(&temp_tx_ring[i]);
932 }
933 goto clear_reset;
934 }
935 }
936 need_update = true;
937 }
938
939 temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
940 if (!temp_rx_ring) {
941 err = -ENOMEM;
942 goto err_setup;
943 }
944
945 if (new_rx_count != adapter->rx_ring_count) {
946 for (i = 0; i < adapter->num_rx_queues; i++) {
947 memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
948 sizeof(struct ixgbe_ring));
949 temp_rx_ring[i].count = new_rx_count;
950 err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
951 if (err) {
952 while (i) {
953 i--;
954 ixgbe_free_rx_resources(&temp_rx_ring[i]);
955 }
956 goto err_setup;
957 }
958 }
959 need_update = true;
960 }
961
962 /* if rings need to be updated, here's the place to do it in one shot */
963 if (need_update) {
964 ixgbe_down(adapter);
965
966 /* tx */
967 if (new_tx_count != adapter->tx_ring_count) {
968 for (i = 0; i < adapter->num_tx_queues; i++) {
969 ixgbe_free_tx_resources(adapter->tx_ring[i]);
970 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
971 sizeof(struct ixgbe_ring));
972 }
973 adapter->tx_ring_count = new_tx_count;
974 }
975
976 /* rx */
977 if (new_rx_count != adapter->rx_ring_count) {
978 for (i = 0; i < adapter->num_rx_queues; i++) {
979 ixgbe_free_rx_resources(adapter->rx_ring[i]);
980 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
981 sizeof(struct ixgbe_ring));
982 }
983 adapter->rx_ring_count = new_rx_count;
984 }
985 ixgbe_up(adapter);
986 }
987
988 vfree(temp_rx_ring);
989 err_setup:
990 vfree(temp_tx_ring);
991 clear_reset:
992 clear_bit(__IXGBE_RESETTING, &adapter->state);
993 return err;
994 }
995
996 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
997 {
998 switch (sset) {
999 case ETH_SS_TEST:
1000 return IXGBE_TEST_LEN;
1001 case ETH_SS_STATS:
1002 return IXGBE_STATS_LEN;
1003 case ETH_SS_NTUPLE_FILTERS:
1004 return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
1005 ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
1006 default:
1007 return -EOPNOTSUPP;
1008 }
1009 }
1010
1011 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1012 struct ethtool_stats *stats, u64 *data)
1013 {
1014 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1015 struct rtnl_link_stats64 temp;
1016 const struct rtnl_link_stats64 *net_stats;
1017 unsigned int start;
1018 struct ixgbe_ring *ring;
1019 int i, j;
1020 char *p = NULL;
1021
1022 ixgbe_update_stats(adapter);
1023 net_stats = dev_get_stats(netdev, &temp);
1024 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1025 switch (ixgbe_gstrings_stats[i].type) {
1026 case NETDEV_STATS:
1027 p = (char *) net_stats +
1028 ixgbe_gstrings_stats[i].stat_offset;
1029 break;
1030 case IXGBE_STATS:
1031 p = (char *) adapter +
1032 ixgbe_gstrings_stats[i].stat_offset;
1033 break;
1034 }
1035
1036 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1037 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1038 }
1039 for (j = 0; j < adapter->num_tx_queues; j++) {
1040 ring = adapter->tx_ring[j];
1041 do {
1042 start = u64_stats_fetch_begin_bh(&ring->syncp);
1043 data[i] = ring->stats.packets;
1044 data[i+1] = ring->stats.bytes;
1045 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1046 i += 2;
1047 }
1048 for (j = 0; j < adapter->num_rx_queues; j++) {
1049 ring = adapter->rx_ring[j];
1050 do {
1051 start = u64_stats_fetch_begin_bh(&ring->syncp);
1052 data[i] = ring->stats.packets;
1053 data[i+1] = ring->stats.bytes;
1054 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1055 i += 2;
1056 }
1057 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1058 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1059 data[i++] = adapter->stats.pxontxc[j];
1060 data[i++] = adapter->stats.pxofftxc[j];
1061 }
1062 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1063 data[i++] = adapter->stats.pxonrxc[j];
1064 data[i++] = adapter->stats.pxoffrxc[j];
1065 }
1066 }
1067 }
1068
1069 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1070 u8 *data)
1071 {
1072 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1073 char *p = (char *)data;
1074 int i;
1075
1076 switch (stringset) {
1077 case ETH_SS_TEST:
1078 memcpy(data, *ixgbe_gstrings_test,
1079 IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1080 break;
1081 case ETH_SS_STATS:
1082 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1083 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1084 ETH_GSTRING_LEN);
1085 p += ETH_GSTRING_LEN;
1086 }
1087 for (i = 0; i < adapter->num_tx_queues; i++) {
1088 sprintf(p, "tx_queue_%u_packets", i);
1089 p += ETH_GSTRING_LEN;
1090 sprintf(p, "tx_queue_%u_bytes", i);
1091 p += ETH_GSTRING_LEN;
1092 }
1093 for (i = 0; i < adapter->num_rx_queues; i++) {
1094 sprintf(p, "rx_queue_%u_packets", i);
1095 p += ETH_GSTRING_LEN;
1096 sprintf(p, "rx_queue_%u_bytes", i);
1097 p += ETH_GSTRING_LEN;
1098 }
1099 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1100 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1101 sprintf(p, "tx_pb_%u_pxon", i);
1102 p += ETH_GSTRING_LEN;
1103 sprintf(p, "tx_pb_%u_pxoff", i);
1104 p += ETH_GSTRING_LEN;
1105 }
1106 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1107 sprintf(p, "rx_pb_%u_pxon", i);
1108 p += ETH_GSTRING_LEN;
1109 sprintf(p, "rx_pb_%u_pxoff", i);
1110 p += ETH_GSTRING_LEN;
1111 }
1112 }
1113 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1114 break;
1115 }
1116 }
1117
1118 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1119 {
1120 struct ixgbe_hw *hw = &adapter->hw;
1121 bool link_up;
1122 u32 link_speed = 0;
1123 *data = 0;
1124
1125 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1126 if (link_up)
1127 return *data;
1128 else
1129 *data = 1;
1130 return *data;
1131 }
1132
1133 /* ethtool register test data */
1134 struct ixgbe_reg_test {
1135 u16 reg;
1136 u8 array_len;
1137 u8 test_type;
1138 u32 mask;
1139 u32 write;
1140 };
1141
1142 /* In the hardware, registers are laid out either singly, in arrays
1143 * spaced 0x40 bytes apart, or in contiguous tables. We assume
1144 * most tests take place on arrays or single registers (handled
1145 * as a single-element array) and special-case the tables.
1146 * Table tests are always pattern tests.
1147 *
1148 * We also make provision for some required setup steps by specifying
1149 * registers to be written without any read-back testing.
1150 */
1151
1152 #define PATTERN_TEST 1
1153 #define SET_READ_TEST 2
1154 #define WRITE_NO_TEST 3
1155 #define TABLE32_TEST 4
1156 #define TABLE64_TEST_LO 5
1157 #define TABLE64_TEST_HI 6
1158
1159 /* default 82599 register test */
1160 static struct ixgbe_reg_test reg_test_82599[] = {
1161 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1162 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1163 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1164 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1165 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1166 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1168 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1169 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1170 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1171 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1172 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1173 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1174 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1175 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1176 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1177 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1178 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1179 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1180 { 0, 0, 0, 0 }
1181 };
1182
1183 /* default 82598 register test */
1184 static struct ixgbe_reg_test reg_test_82598[] = {
1185 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1186 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1187 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1188 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1189 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1190 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1191 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1192 /* Enable all four RX queues before testing. */
1193 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1194 /* RDH is read-only for 82598, only test RDT. */
1195 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1196 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1197 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1198 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1199 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1200 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1201 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1202 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1203 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1204 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1205 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1206 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1207 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1208 { 0, 0, 0, 0 }
1209 };
1210
1211 #define REG_PATTERN_TEST(R, M, W) \
1212 { \
1213 u32 pat, val, before; \
1214 const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1215 for (pat = 0; pat < ARRAY_SIZE(_test); pat++) { \
1216 before = readl(adapter->hw.hw_addr + R); \
1217 writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \
1218 val = readl(adapter->hw.hw_addr + R); \
1219 if (val != (_test[pat] & W & M)) { \
1220 e_err(drv, "pattern test reg %04X failed: got " \
1221 "0x%08X expected 0x%08X\n", \
1222 R, val, (_test[pat] & W & M)); \
1223 *data = R; \
1224 writel(before, adapter->hw.hw_addr + R); \
1225 return 1; \
1226 } \
1227 writel(before, adapter->hw.hw_addr + R); \
1228 } \
1229 }
1230
1231 #define REG_SET_AND_CHECK(R, M, W) \
1232 { \
1233 u32 val, before; \
1234 before = readl(adapter->hw.hw_addr + R); \
1235 writel((W & M), (adapter->hw.hw_addr + R)); \
1236 val = readl(adapter->hw.hw_addr + R); \
1237 if ((W & M) != (val & M)) { \
1238 e_err(drv, "set/check reg %04X test failed: got 0x%08X " \
1239 "expected 0x%08X\n", R, (val & M), (W & M)); \
1240 *data = R; \
1241 writel(before, (adapter->hw.hw_addr + R)); \
1242 return 1; \
1243 } \
1244 writel(before, (adapter->hw.hw_addr + R)); \
1245 }
1246
1247 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1248 {
1249 struct ixgbe_reg_test *test;
1250 u32 value, before, after;
1251 u32 i, toggle;
1252
1253 switch (adapter->hw.mac.type) {
1254 case ixgbe_mac_82598EB:
1255 toggle = 0x7FFFF3FF;
1256 test = reg_test_82598;
1257 break;
1258 case ixgbe_mac_82599EB:
1259 case ixgbe_mac_X540:
1260 toggle = 0x7FFFF30F;
1261 test = reg_test_82599;
1262 break;
1263 default:
1264 *data = 1;
1265 return 1;
1266 break;
1267 }
1268
1269 /*
1270 * Because the status register is such a special case,
1271 * we handle it separately from the rest of the register
1272 * tests. Some bits are read-only, some toggle, and some
1273 * are writeable on newer MACs.
1274 */
1275 before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1276 value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1277 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1278 after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1279 if (value != after) {
1280 e_err(drv, "failed STATUS register test got: 0x%08X "
1281 "expected: 0x%08X\n", after, value);
1282 *data = 1;
1283 return 1;
1284 }
1285 /* restore previous status */
1286 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1287
1288 /*
1289 * Perform the remainder of the register test, looping through
1290 * the test table until we either fail or reach the null entry.
1291 */
1292 while (test->reg) {
1293 for (i = 0; i < test->array_len; i++) {
1294 switch (test->test_type) {
1295 case PATTERN_TEST:
1296 REG_PATTERN_TEST(test->reg + (i * 0x40),
1297 test->mask,
1298 test->write);
1299 break;
1300 case SET_READ_TEST:
1301 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1302 test->mask,
1303 test->write);
1304 break;
1305 case WRITE_NO_TEST:
1306 writel(test->write,
1307 (adapter->hw.hw_addr + test->reg)
1308 + (i * 0x40));
1309 break;
1310 case TABLE32_TEST:
1311 REG_PATTERN_TEST(test->reg + (i * 4),
1312 test->mask,
1313 test->write);
1314 break;
1315 case TABLE64_TEST_LO:
1316 REG_PATTERN_TEST(test->reg + (i * 8),
1317 test->mask,
1318 test->write);
1319 break;
1320 case TABLE64_TEST_HI:
1321 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1322 test->mask,
1323 test->write);
1324 break;
1325 }
1326 }
1327 test++;
1328 }
1329
1330 *data = 0;
1331 return 0;
1332 }
1333
1334 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1335 {
1336 struct ixgbe_hw *hw = &adapter->hw;
1337 if (hw->eeprom.ops.validate_checksum(hw, NULL))
1338 *data = 1;
1339 else
1340 *data = 0;
1341 return *data;
1342 }
1343
1344 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1345 {
1346 struct net_device *netdev = (struct net_device *) data;
1347 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1348
1349 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1350
1351 return IRQ_HANDLED;
1352 }
1353
1354 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1355 {
1356 struct net_device *netdev = adapter->netdev;
1357 u32 mask, i = 0, shared_int = true;
1358 u32 irq = adapter->pdev->irq;
1359
1360 *data = 0;
1361
1362 /* Hook up test interrupt handler just for this test */
1363 if (adapter->msix_entries) {
1364 /* NOTE: we don't test MSI-X interrupts here, yet */
1365 return 0;
1366 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1367 shared_int = false;
1368 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1369 netdev)) {
1370 *data = 1;
1371 return -1;
1372 }
1373 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1374 netdev->name, netdev)) {
1375 shared_int = false;
1376 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1377 netdev->name, netdev)) {
1378 *data = 1;
1379 return -1;
1380 }
1381 e_info(hw, "testing %s interrupt\n", shared_int ?
1382 "shared" : "unshared");
1383
1384 /* Disable all the interrupts */
1385 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1386 msleep(10);
1387
1388 /* Test each interrupt */
1389 for (; i < 10; i++) {
1390 /* Interrupt to test */
1391 mask = 1 << i;
1392
1393 if (!shared_int) {
1394 /*
1395 * Disable the interrupts to be reported in
1396 * the cause register and then force the same
1397 * interrupt and see if one gets posted. If
1398 * an interrupt was posted to the bus, the
1399 * test failed.
1400 */
1401 adapter->test_icr = 0;
1402 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1403 ~mask & 0x00007FFF);
1404 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1405 ~mask & 0x00007FFF);
1406 msleep(10);
1407
1408 if (adapter->test_icr & mask) {
1409 *data = 3;
1410 break;
1411 }
1412 }
1413
1414 /*
1415 * Enable the interrupt to be reported in the cause
1416 * register and then force the same interrupt and see
1417 * if one gets posted. If an interrupt was not posted
1418 * to the bus, the test failed.
1419 */
1420 adapter->test_icr = 0;
1421 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1422 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1423 msleep(10);
1424
1425 if (!(adapter->test_icr &mask)) {
1426 *data = 4;
1427 break;
1428 }
1429
1430 if (!shared_int) {
1431 /*
1432 * Disable the other interrupts to be reported in
1433 * the cause register and then force the other
1434 * interrupts and see if any get posted. If
1435 * an interrupt was posted to the bus, the
1436 * test failed.
1437 */
1438 adapter->test_icr = 0;
1439 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1440 ~mask & 0x00007FFF);
1441 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1442 ~mask & 0x00007FFF);
1443 msleep(10);
1444
1445 if (adapter->test_icr) {
1446 *data = 5;
1447 break;
1448 }
1449 }
1450 }
1451
1452 /* Disable all the interrupts */
1453 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1454 msleep(10);
1455
1456 /* Unhook test interrupt handler */
1457 free_irq(irq, netdev);
1458
1459 return *data;
1460 }
1461
1462 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1463 {
1464 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1465 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1466 struct ixgbe_hw *hw = &adapter->hw;
1467 u32 reg_ctl;
1468
1469 /* shut down the DMA engines now so they can be reinitialized later */
1470
1471 /* first Rx */
1472 reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1473 reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1474 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1475 reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx));
1476 reg_ctl &= ~IXGBE_RXDCTL_ENABLE;
1477 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx), reg_ctl);
1478
1479 /* now Tx */
1480 reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1481 reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1482 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1483
1484 switch (hw->mac.type) {
1485 case ixgbe_mac_82599EB:
1486 case ixgbe_mac_X540:
1487 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1488 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1489 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1490 break;
1491 default:
1492 break;
1493 }
1494
1495 ixgbe_reset(adapter);
1496
1497 ixgbe_free_tx_resources(&adapter->test_tx_ring);
1498 ixgbe_free_rx_resources(&adapter->test_rx_ring);
1499 }
1500
1501 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1502 {
1503 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1504 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1505 u32 rctl, reg_data;
1506 int ret_val;
1507 int err;
1508
1509 /* Setup Tx descriptor ring and Tx buffers */
1510 tx_ring->count = IXGBE_DEFAULT_TXD;
1511 tx_ring->queue_index = 0;
1512 tx_ring->dev = &adapter->pdev->dev;
1513 tx_ring->netdev = adapter->netdev;
1514 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1515 tx_ring->numa_node = adapter->node;
1516
1517 err = ixgbe_setup_tx_resources(tx_ring);
1518 if (err)
1519 return 1;
1520
1521 switch (adapter->hw.mac.type) {
1522 case ixgbe_mac_82599EB:
1523 case ixgbe_mac_X540:
1524 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1525 reg_data |= IXGBE_DMATXCTL_TE;
1526 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1527 break;
1528 default:
1529 break;
1530 }
1531
1532 ixgbe_configure_tx_ring(adapter, tx_ring);
1533
1534 /* Setup Rx Descriptor ring and Rx buffers */
1535 rx_ring->count = IXGBE_DEFAULT_RXD;
1536 rx_ring->queue_index = 0;
1537 rx_ring->dev = &adapter->pdev->dev;
1538 rx_ring->netdev = adapter->netdev;
1539 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1540 rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1541 rx_ring->numa_node = adapter->node;
1542
1543 err = ixgbe_setup_rx_resources(rx_ring);
1544 if (err) {
1545 ret_val = 4;
1546 goto err_nomem;
1547 }
1548
1549 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1550 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1551
1552 ixgbe_configure_rx_ring(adapter, rx_ring);
1553
1554 rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1555 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1556
1557 return 0;
1558
1559 err_nomem:
1560 ixgbe_free_desc_rings(adapter);
1561 return ret_val;
1562 }
1563
1564 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1565 {
1566 struct ixgbe_hw *hw = &adapter->hw;
1567 u32 reg_data;
1568
1569 /* right now we only support MAC loopback in the driver */
1570 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1571 /* Setup MAC loopback */
1572 reg_data |= IXGBE_HLREG0_LPBK;
1573 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1574
1575 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1576 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1577 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1578
1579 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1580 reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1581 reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1583 IXGBE_WRITE_FLUSH(&adapter->hw);
1584 msleep(10);
1585
1586 /* Disable Atlas Tx lanes; re-enabled in reset path */
1587 if (hw->mac.type == ixgbe_mac_82598EB) {
1588 u8 atlas;
1589
1590 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1591 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1592 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1593
1594 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1595 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1596 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1597
1598 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1599 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1600 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1601
1602 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1603 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1604 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1605 }
1606
1607 return 0;
1608 }
1609
1610 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1611 {
1612 u32 reg_data;
1613
1614 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1615 reg_data &= ~IXGBE_HLREG0_LPBK;
1616 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1617 }
1618
1619 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1620 unsigned int frame_size)
1621 {
1622 memset(skb->data, 0xFF, frame_size);
1623 frame_size &= ~1;
1624 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1625 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1626 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1627 }
1628
1629 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1630 unsigned int frame_size)
1631 {
1632 frame_size &= ~1;
1633 if (*(skb->data + 3) == 0xFF) {
1634 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1635 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1636 return 0;
1637 }
1638 }
1639 return 13;
1640 }
1641
1642 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1643 struct ixgbe_ring *tx_ring,
1644 unsigned int size)
1645 {
1646 union ixgbe_adv_rx_desc *rx_desc;
1647 struct ixgbe_rx_buffer *rx_buffer_info;
1648 struct ixgbe_tx_buffer *tx_buffer_info;
1649 const int bufsz = rx_ring->rx_buf_len;
1650 u32 staterr;
1651 u16 rx_ntc, tx_ntc, count = 0;
1652
1653 /* initialize next to clean and descriptor values */
1654 rx_ntc = rx_ring->next_to_clean;
1655 tx_ntc = tx_ring->next_to_clean;
1656 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1657 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1658
1659 while (staterr & IXGBE_RXD_STAT_DD) {
1660 /* check Rx buffer */
1661 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1662
1663 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1664 dma_unmap_single(rx_ring->dev,
1665 rx_buffer_info->dma,
1666 bufsz,
1667 DMA_FROM_DEVICE);
1668 rx_buffer_info->dma = 0;
1669
1670 /* verify contents of skb */
1671 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1672 count++;
1673
1674 /* unmap buffer on Tx side */
1675 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1676 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1677
1678 /* increment Rx/Tx next to clean counters */
1679 rx_ntc++;
1680 if (rx_ntc == rx_ring->count)
1681 rx_ntc = 0;
1682 tx_ntc++;
1683 if (tx_ntc == tx_ring->count)
1684 tx_ntc = 0;
1685
1686 /* fetch next descriptor */
1687 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1688 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1689 }
1690
1691 /* re-map buffers to ring, store next to clean values */
1692 ixgbe_alloc_rx_buffers(rx_ring, count);
1693 rx_ring->next_to_clean = rx_ntc;
1694 tx_ring->next_to_clean = tx_ntc;
1695
1696 return count;
1697 }
1698
1699 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1700 {
1701 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1702 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1703 int i, j, lc, good_cnt, ret_val = 0;
1704 unsigned int size = 1024;
1705 netdev_tx_t tx_ret_val;
1706 struct sk_buff *skb;
1707
1708 /* allocate test skb */
1709 skb = alloc_skb(size, GFP_KERNEL);
1710 if (!skb)
1711 return 11;
1712
1713 /* place data into test skb */
1714 ixgbe_create_lbtest_frame(skb, size);
1715 skb_put(skb, size);
1716
1717 /*
1718 * Calculate the loop count based on the largest descriptor ring
1719 * The idea is to wrap the largest ring a number of times using 64
1720 * send/receive pairs during each loop
1721 */
1722
1723 if (rx_ring->count <= tx_ring->count)
1724 lc = ((tx_ring->count / 64) * 2) + 1;
1725 else
1726 lc = ((rx_ring->count / 64) * 2) + 1;
1727
1728 for (j = 0; j <= lc; j++) {
1729 /* reset count of good packets */
1730 good_cnt = 0;
1731
1732 /* place 64 packets on the transmit queue*/
1733 for (i = 0; i < 64; i++) {
1734 skb_get(skb);
1735 tx_ret_val = ixgbe_xmit_frame_ring(skb,
1736 adapter,
1737 tx_ring);
1738 if (tx_ret_val == NETDEV_TX_OK)
1739 good_cnt++;
1740 }
1741
1742 if (good_cnt != 64) {
1743 ret_val = 12;
1744 break;
1745 }
1746
1747 /* allow 200 milliseconds for packets to go from Tx to Rx */
1748 msleep(200);
1749
1750 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1751 if (good_cnt != 64) {
1752 ret_val = 13;
1753 break;
1754 }
1755 }
1756
1757 /* free the original skb */
1758 kfree_skb(skb);
1759
1760 return ret_val;
1761 }
1762
1763 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1764 {
1765 *data = ixgbe_setup_desc_rings(adapter);
1766 if (*data)
1767 goto out;
1768 *data = ixgbe_setup_loopback_test(adapter);
1769 if (*data)
1770 goto err_loopback;
1771 *data = ixgbe_run_loopback_test(adapter);
1772 ixgbe_loopback_cleanup(adapter);
1773
1774 err_loopback:
1775 ixgbe_free_desc_rings(adapter);
1776 out:
1777 return *data;
1778 }
1779
1780 static void ixgbe_diag_test(struct net_device *netdev,
1781 struct ethtool_test *eth_test, u64 *data)
1782 {
1783 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1784 bool if_running = netif_running(netdev);
1785
1786 set_bit(__IXGBE_TESTING, &adapter->state);
1787 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1788 /* Offline tests */
1789
1790 e_info(hw, "offline testing starting\n");
1791
1792 /* Link test performed before hardware reset so autoneg doesn't
1793 * interfere with test result */
1794 if (ixgbe_link_test(adapter, &data[4]))
1795 eth_test->flags |= ETH_TEST_FL_FAILED;
1796
1797 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1798 int i;
1799 for (i = 0; i < adapter->num_vfs; i++) {
1800 if (adapter->vfinfo[i].clear_to_send) {
1801 netdev_warn(netdev, "%s",
1802 "offline diagnostic is not "
1803 "supported when VFs are "
1804 "present\n");
1805 data[0] = 1;
1806 data[1] = 1;
1807 data[2] = 1;
1808 data[3] = 1;
1809 eth_test->flags |= ETH_TEST_FL_FAILED;
1810 clear_bit(__IXGBE_TESTING,
1811 &adapter->state);
1812 goto skip_ol_tests;
1813 }
1814 }
1815 }
1816
1817 if (if_running)
1818 /* indicate we're in test mode */
1819 dev_close(netdev);
1820 else
1821 ixgbe_reset(adapter);
1822
1823 e_info(hw, "register testing starting\n");
1824 if (ixgbe_reg_test(adapter, &data[0]))
1825 eth_test->flags |= ETH_TEST_FL_FAILED;
1826
1827 ixgbe_reset(adapter);
1828 e_info(hw, "eeprom testing starting\n");
1829 if (ixgbe_eeprom_test(adapter, &data[1]))
1830 eth_test->flags |= ETH_TEST_FL_FAILED;
1831
1832 ixgbe_reset(adapter);
1833 e_info(hw, "interrupt testing starting\n");
1834 if (ixgbe_intr_test(adapter, &data[2]))
1835 eth_test->flags |= ETH_TEST_FL_FAILED;
1836
1837 /* If SRIOV or VMDq is enabled then skip MAC
1838 * loopback diagnostic. */
1839 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1840 IXGBE_FLAG_VMDQ_ENABLED)) {
1841 e_info(hw, "Skip MAC loopback diagnostic in VT "
1842 "mode\n");
1843 data[3] = 0;
1844 goto skip_loopback;
1845 }
1846
1847 ixgbe_reset(adapter);
1848 e_info(hw, "loopback testing starting\n");
1849 if (ixgbe_loopback_test(adapter, &data[3]))
1850 eth_test->flags |= ETH_TEST_FL_FAILED;
1851
1852 skip_loopback:
1853 ixgbe_reset(adapter);
1854
1855 clear_bit(__IXGBE_TESTING, &adapter->state);
1856 if (if_running)
1857 dev_open(netdev);
1858 } else {
1859 e_info(hw, "online testing starting\n");
1860 /* Online tests */
1861 if (ixgbe_link_test(adapter, &data[4]))
1862 eth_test->flags |= ETH_TEST_FL_FAILED;
1863
1864 /* Online tests aren't run; pass by default */
1865 data[0] = 0;
1866 data[1] = 0;
1867 data[2] = 0;
1868 data[3] = 0;
1869
1870 clear_bit(__IXGBE_TESTING, &adapter->state);
1871 }
1872 skip_ol_tests:
1873 msleep_interruptible(4 * 1000);
1874 }
1875
1876 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1877 struct ethtool_wolinfo *wol)
1878 {
1879 struct ixgbe_hw *hw = &adapter->hw;
1880 int retval = 1;
1881
1882 /* WOL not supported except for the following */
1883 switch(hw->device_id) {
1884 case IXGBE_DEV_ID_82599_SFP:
1885 /* Only this subdevice supports WOL */
1886 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1887 wol->supported = 0;
1888 break;
1889 }
1890 retval = 0;
1891 break;
1892 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1893 /* All except this subdevice support WOL */
1894 if (hw->subsystem_device_id ==
1895 IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1896 wol->supported = 0;
1897 break;
1898 }
1899 retval = 0;
1900 break;
1901 case IXGBE_DEV_ID_82599_KX4:
1902 retval = 0;
1903 break;
1904 default:
1905 wol->supported = 0;
1906 }
1907
1908 return retval;
1909 }
1910
1911 static void ixgbe_get_wol(struct net_device *netdev,
1912 struct ethtool_wolinfo *wol)
1913 {
1914 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1915
1916 wol->supported = WAKE_UCAST | WAKE_MCAST |
1917 WAKE_BCAST | WAKE_MAGIC;
1918 wol->wolopts = 0;
1919
1920 if (ixgbe_wol_exclusion(adapter, wol) ||
1921 !device_can_wakeup(&adapter->pdev->dev))
1922 return;
1923
1924 if (adapter->wol & IXGBE_WUFC_EX)
1925 wol->wolopts |= WAKE_UCAST;
1926 if (adapter->wol & IXGBE_WUFC_MC)
1927 wol->wolopts |= WAKE_MCAST;
1928 if (adapter->wol & IXGBE_WUFC_BC)
1929 wol->wolopts |= WAKE_BCAST;
1930 if (adapter->wol & IXGBE_WUFC_MAG)
1931 wol->wolopts |= WAKE_MAGIC;
1932 }
1933
1934 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1935 {
1936 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1937
1938 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1939 return -EOPNOTSUPP;
1940
1941 if (ixgbe_wol_exclusion(adapter, wol))
1942 return wol->wolopts ? -EOPNOTSUPP : 0;
1943
1944 adapter->wol = 0;
1945
1946 if (wol->wolopts & WAKE_UCAST)
1947 adapter->wol |= IXGBE_WUFC_EX;
1948 if (wol->wolopts & WAKE_MCAST)
1949 adapter->wol |= IXGBE_WUFC_MC;
1950 if (wol->wolopts & WAKE_BCAST)
1951 adapter->wol |= IXGBE_WUFC_BC;
1952 if (wol->wolopts & WAKE_MAGIC)
1953 adapter->wol |= IXGBE_WUFC_MAG;
1954
1955 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1956
1957 return 0;
1958 }
1959
1960 static int ixgbe_nway_reset(struct net_device *netdev)
1961 {
1962 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1963
1964 if (netif_running(netdev))
1965 ixgbe_reinit_locked(adapter);
1966
1967 return 0;
1968 }
1969
1970 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1971 {
1972 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1973 struct ixgbe_hw *hw = &adapter->hw;
1974 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1975 u32 i;
1976
1977 if (!data || data > 300)
1978 data = 300;
1979
1980 for (i = 0; i < (data * 1000); i += 400) {
1981 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1982 msleep_interruptible(200);
1983 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1984 msleep_interruptible(200);
1985 }
1986
1987 /* Restore LED settings */
1988 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
1989
1990 return 0;
1991 }
1992
1993 static int ixgbe_get_coalesce(struct net_device *netdev,
1994 struct ethtool_coalesce *ec)
1995 {
1996 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1997
1998 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
1999
2000 /* only valid if in constant ITR mode */
2001 switch (adapter->rx_itr_setting) {
2002 case 0:
2003 /* throttling disabled */
2004 ec->rx_coalesce_usecs = 0;
2005 break;
2006 case 1:
2007 /* dynamic ITR mode */
2008 ec->rx_coalesce_usecs = 1;
2009 break;
2010 default:
2011 /* fixed interrupt rate mode */
2012 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2013 break;
2014 }
2015
2016 /* if in mixed tx/rx queues per vector mode, report only rx settings */
2017 if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
2018 return 0;
2019
2020 /* only valid if in constant ITR mode */
2021 switch (adapter->tx_itr_setting) {
2022 case 0:
2023 /* throttling disabled */
2024 ec->tx_coalesce_usecs = 0;
2025 break;
2026 case 1:
2027 /* dynamic ITR mode */
2028 ec->tx_coalesce_usecs = 1;
2029 break;
2030 default:
2031 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2032 break;
2033 }
2034
2035 return 0;
2036 }
2037
2038 /*
2039 * this function must be called before setting the new value of
2040 * rx_itr_setting
2041 */
2042 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2043 struct ethtool_coalesce *ec)
2044 {
2045 struct net_device *netdev = adapter->netdev;
2046
2047 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2048 return false;
2049
2050 /* if interrupt rate is too high then disable RSC */
2051 if (ec->rx_coalesce_usecs != 1 &&
2052 ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2053 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2054 e_info(probe, "rx-usecs set too low, "
2055 "disabling RSC\n");
2056 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2057 return true;
2058 }
2059 } else {
2060 /* check the feature flag value and enable RSC if necessary */
2061 if ((netdev->features & NETIF_F_LRO) &&
2062 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2063 e_info(probe, "rx-usecs set to %d, "
2064 "re-enabling RSC\n",
2065 ec->rx_coalesce_usecs);
2066 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2067 return true;
2068 }
2069 }
2070 return false;
2071 }
2072
2073 static int ixgbe_set_coalesce(struct net_device *netdev,
2074 struct ethtool_coalesce *ec)
2075 {
2076 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2077 struct ixgbe_q_vector *q_vector;
2078 int i;
2079 bool need_reset = false;
2080
2081 /* don't accept tx specific changes if we've got mixed RxTx vectors */
2082 if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2083 && ec->tx_coalesce_usecs)
2084 return -EINVAL;
2085
2086 if (ec->tx_max_coalesced_frames_irq)
2087 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2088
2089 if (ec->rx_coalesce_usecs > 1) {
2090 /* check the limits */
2091 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2092 (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2093 return -EINVAL;
2094
2095 /* check the old value and enable RSC if necessary */
2096 need_reset = ixgbe_update_rsc(adapter, ec);
2097
2098 /* store the value in ints/second */
2099 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2100
2101 /* static value of interrupt rate */
2102 adapter->rx_itr_setting = adapter->rx_eitr_param;
2103 /* clear the lower bit as its used for dynamic state */
2104 adapter->rx_itr_setting &= ~1;
2105 } else if (ec->rx_coalesce_usecs == 1) {
2106 /* check the old value and enable RSC if necessary */
2107 need_reset = ixgbe_update_rsc(adapter, ec);
2108
2109 /* 1 means dynamic mode */
2110 adapter->rx_eitr_param = 20000;
2111 adapter->rx_itr_setting = 1;
2112 } else {
2113 /* check the old value and enable RSC if necessary */
2114 need_reset = ixgbe_update_rsc(adapter, ec);
2115 /*
2116 * any other value means disable eitr, which is best
2117 * served by setting the interrupt rate very high
2118 */
2119 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2120 adapter->rx_itr_setting = 0;
2121 }
2122
2123 if (ec->tx_coalesce_usecs > 1) {
2124 /*
2125 * don't have to worry about max_int as above because
2126 * tx vectors don't do hardware RSC (an rx function)
2127 */
2128 /* check the limits */
2129 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2130 (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2131 return -EINVAL;
2132
2133 /* store the value in ints/second */
2134 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2135
2136 /* static value of interrupt rate */
2137 adapter->tx_itr_setting = adapter->tx_eitr_param;
2138
2139 /* clear the lower bit as its used for dynamic state */
2140 adapter->tx_itr_setting &= ~1;
2141 } else if (ec->tx_coalesce_usecs == 1) {
2142 /* 1 means dynamic mode */
2143 adapter->tx_eitr_param = 10000;
2144 adapter->tx_itr_setting = 1;
2145 } else {
2146 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2147 adapter->tx_itr_setting = 0;
2148 }
2149
2150 /* MSI/MSIx Interrupt Mode */
2151 if (adapter->flags &
2152 (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2153 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2154 for (i = 0; i < num_vectors; i++) {
2155 q_vector = adapter->q_vector[i];
2156 if (q_vector->txr_count && !q_vector->rxr_count)
2157 /* tx only */
2158 q_vector->eitr = adapter->tx_eitr_param;
2159 else
2160 /* rx only or mixed */
2161 q_vector->eitr = adapter->rx_eitr_param;
2162 ixgbe_write_eitr(q_vector);
2163 }
2164 /* Legacy Interrupt Mode */
2165 } else {
2166 q_vector = adapter->q_vector[0];
2167 q_vector->eitr = adapter->rx_eitr_param;
2168 ixgbe_write_eitr(q_vector);
2169 }
2170
2171 /*
2172 * do reset here at the end to make sure EITR==0 case is handled
2173 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2174 * also locks in RSC enable/disable which requires reset
2175 */
2176 if (need_reset) {
2177 if (netif_running(netdev))
2178 ixgbe_reinit_locked(adapter);
2179 else
2180 ixgbe_reset(adapter);
2181 }
2182
2183 return 0;
2184 }
2185
2186 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2187 {
2188 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2189 bool need_reset = false;
2190 int rc;
2191
2192 #ifdef CONFIG_IXGBE_DCB
2193 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2194 !(data & ETH_FLAG_RXVLAN))
2195 return -EINVAL;
2196 #endif
2197
2198 need_reset = (data & ETH_FLAG_RXVLAN) !=
2199 (netdev->features & NETIF_F_HW_VLAN_RX);
2200
2201 rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO |
2202 ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2203 if (rc)
2204 return rc;
2205
2206 /* if state changes we need to update adapter->flags and reset */
2207 if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2208 (!!(data & ETH_FLAG_LRO) !=
2209 !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2210 if ((data & ETH_FLAG_LRO) &&
2211 (!adapter->rx_itr_setting ||
2212 (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2213 e_info(probe, "rx-usecs set too low, "
2214 "not enabling RSC.\n");
2215 } else {
2216 adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2217 switch (adapter->hw.mac.type) {
2218 case ixgbe_mac_82599EB:
2219 need_reset = true;
2220 break;
2221 case ixgbe_mac_X540: {
2222 int i;
2223 for (i = 0; i < adapter->num_rx_queues; i++) {
2224 struct ixgbe_ring *ring =
2225 adapter->rx_ring[i];
2226 if (adapter->flags2 &
2227 IXGBE_FLAG2_RSC_ENABLED) {
2228 ixgbe_configure_rscctl(adapter,
2229 ring);
2230 } else {
2231 ixgbe_clear_rscctl(adapter,
2232 ring);
2233 }
2234 }
2235 }
2236 break;
2237 default:
2238 break;
2239 }
2240 }
2241 }
2242
2243 /*
2244 * Check if Flow Director n-tuple support was enabled or disabled. If
2245 * the state changed, we need to reset.
2246 */
2247 if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2248 (!(data & ETH_FLAG_NTUPLE))) {
2249 /* turn off Flow Director perfect, set hash and reset */
2250 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2251 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2252 need_reset = true;
2253 } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2254 (data & ETH_FLAG_NTUPLE)) {
2255 /* turn off Flow Director hash, enable perfect and reset */
2256 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2257 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2258 need_reset = true;
2259 } else {
2260 /* no state change */
2261 }
2262
2263 if (need_reset) {
2264 if (netif_running(netdev))
2265 ixgbe_reinit_locked(adapter);
2266 else
2267 ixgbe_reset(adapter);
2268 }
2269
2270 return 0;
2271 }
2272
2273 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2274 struct ethtool_rx_ntuple *cmd)
2275 {
2276 struct ixgbe_adapter *adapter = netdev_priv(dev);
2277 struct ethtool_rx_ntuple_flow_spec fs = cmd->fs;
2278 struct ixgbe_atr_input input_struct;
2279 struct ixgbe_atr_input_masks input_masks;
2280 int target_queue;
2281
2282 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2283 return -EOPNOTSUPP;
2284
2285 /*
2286 * Don't allow programming if the action is a queue greater than
2287 * the number of online Tx queues.
2288 */
2289 if ((fs.action >= adapter->num_tx_queues) ||
2290 (fs.action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2291 return -EINVAL;
2292
2293 memset(&input_struct, 0, sizeof(struct ixgbe_atr_input));
2294 memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2295
2296 input_masks.src_ip_mask = fs.m_u.tcp_ip4_spec.ip4src;
2297 input_masks.dst_ip_mask = fs.m_u.tcp_ip4_spec.ip4dst;
2298 input_masks.src_port_mask = fs.m_u.tcp_ip4_spec.psrc;
2299 input_masks.dst_port_mask = fs.m_u.tcp_ip4_spec.pdst;
2300 input_masks.vlan_id_mask = fs.vlan_tag_mask;
2301 /* only use the lowest 2 bytes for flex bytes */
2302 input_masks.data_mask = (fs.data_mask & 0xffff);
2303
2304 switch (fs.flow_type) {
2305 case TCP_V4_FLOW:
2306 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_TCP);
2307 break;
2308 case UDP_V4_FLOW:
2309 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_UDP);
2310 break;
2311 case SCTP_V4_FLOW:
2312 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_SCTP);
2313 break;
2314 default:
2315 return -1;
2316 }
2317
2318 /* Mask bits from the inputs based on user-supplied mask */
2319 ixgbe_atr_set_src_ipv4_82599(&input_struct,
2320 (fs.h_u.tcp_ip4_spec.ip4src & ~fs.m_u.tcp_ip4_spec.ip4src));
2321 ixgbe_atr_set_dst_ipv4_82599(&input_struct,
2322 (fs.h_u.tcp_ip4_spec.ip4dst & ~fs.m_u.tcp_ip4_spec.ip4dst));
2323 /* 82599 expects these to be byte-swapped for perfect filtering */
2324 ixgbe_atr_set_src_port_82599(&input_struct,
2325 ((ntohs(fs.h_u.tcp_ip4_spec.psrc)) & ~fs.m_u.tcp_ip4_spec.psrc));
2326 ixgbe_atr_set_dst_port_82599(&input_struct,
2327 ((ntohs(fs.h_u.tcp_ip4_spec.pdst)) & ~fs.m_u.tcp_ip4_spec.pdst));
2328
2329 /* VLAN and Flex bytes are either completely masked or not */
2330 if (!fs.vlan_tag_mask)
2331 ixgbe_atr_set_vlan_id_82599(&input_struct, fs.vlan_tag);
2332
2333 if (!input_masks.data_mask)
2334 /* make sure we only use the first 2 bytes of user data */
2335 ixgbe_atr_set_flex_byte_82599(&input_struct,
2336 (fs.data & 0xffff));
2337
2338 /* determine if we need to drop or route the packet */
2339 if (fs.action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2340 target_queue = MAX_RX_QUEUES - 1;
2341 else
2342 target_queue = fs.action;
2343
2344 spin_lock(&adapter->fdir_perfect_lock);
2345 ixgbe_fdir_add_perfect_filter_82599(&adapter->hw, &input_struct,
2346 &input_masks, 0, target_queue);
2347 spin_unlock(&adapter->fdir_perfect_lock);
2348
2349 return 0;
2350 }
2351
2352 static const struct ethtool_ops ixgbe_ethtool_ops = {
2353 .get_settings = ixgbe_get_settings,
2354 .set_settings = ixgbe_set_settings,
2355 .get_drvinfo = ixgbe_get_drvinfo,
2356 .get_regs_len = ixgbe_get_regs_len,
2357 .get_regs = ixgbe_get_regs,
2358 .get_wol = ixgbe_get_wol,
2359 .set_wol = ixgbe_set_wol,
2360 .nway_reset = ixgbe_nway_reset,
2361 .get_link = ethtool_op_get_link,
2362 .get_eeprom_len = ixgbe_get_eeprom_len,
2363 .get_eeprom = ixgbe_get_eeprom,
2364 .get_ringparam = ixgbe_get_ringparam,
2365 .set_ringparam = ixgbe_set_ringparam,
2366 .get_pauseparam = ixgbe_get_pauseparam,
2367 .set_pauseparam = ixgbe_set_pauseparam,
2368 .get_rx_csum = ixgbe_get_rx_csum,
2369 .set_rx_csum = ixgbe_set_rx_csum,
2370 .get_tx_csum = ixgbe_get_tx_csum,
2371 .set_tx_csum = ixgbe_set_tx_csum,
2372 .get_sg = ethtool_op_get_sg,
2373 .set_sg = ethtool_op_set_sg,
2374 .get_msglevel = ixgbe_get_msglevel,
2375 .set_msglevel = ixgbe_set_msglevel,
2376 .get_tso = ethtool_op_get_tso,
2377 .set_tso = ixgbe_set_tso,
2378 .self_test = ixgbe_diag_test,
2379 .get_strings = ixgbe_get_strings,
2380 .phys_id = ixgbe_phys_id,
2381 .get_sset_count = ixgbe_get_sset_count,
2382 .get_ethtool_stats = ixgbe_get_ethtool_stats,
2383 .get_coalesce = ixgbe_get_coalesce,
2384 .set_coalesce = ixgbe_set_coalesce,
2385 .get_flags = ethtool_op_get_flags,
2386 .set_flags = ixgbe_set_flags,
2387 .set_rx_ntuple = ixgbe_set_rx_ntuple,
2388 };
2389
2390 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2391 {
2392 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2393 }
kernel source for telekom puls (alcatel/mediatek)