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[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / hamradio / scc.c
1 #define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $"
2
3 #define VERSION "3.0"
4
5 /*
6 * Please use z8530drv-utils-3.0 with this version.
7 * ------------------
8 *
9 * You can find a subset of the documentation in
10 * Documentation/networking/z8530drv.txt.
11 */
12
13 /*
14 ********************************************************************
15 * SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 *
16 ********************************************************************
17
18
19 ********************************************************************
20
21 Copyright (c) 1993, 2000 Joerg Reuter DL1BKE
22
23 portions (c) 1993 Guido ten Dolle PE1NNZ
24
25 ********************************************************************
26
27 The driver and the programs in the archive are UNDER CONSTRUCTION.
28 The code is likely to fail, and so your kernel could --- even
29 a whole network.
30
31 This driver is intended for Amateur Radio use. If you are running it
32 for commercial purposes, please drop me a note. I am nosy...
33
34 ...BUT:
35
36 ! You m u s t recognize the appropriate legislations of your country !
37 ! before you connect a radio to the SCC board and start to transmit or !
38 ! receive. The GPL allows you to use the d r i v e r, NOT the RADIO! !
39
40 For non-Amateur-Radio use please note that you might need a special
41 allowance/licence from the designer of the SCC Board and/or the
42 MODEM.
43
44 This program is free software; you can redistribute it and/or modify
45 it under the terms of the (modified) GNU General Public License
46 delivered with the Linux kernel source.
47
48 This program is distributed in the hope that it will be useful,
49 but WITHOUT ANY WARRANTY; without even the implied warranty of
50 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
51 GNU General Public License for more details.
52
53 You should find a copy of the GNU General Public License in
54 /usr/src/linux/COPYING;
55
56 ********************************************************************
57
58
59 Incomplete history of z8530drv:
60 -------------------------------
61
62 1994-09-13 started to write the driver, rescued most of my own
63 code (and Hans Alblas' memory buffer pool concept) from
64 an earlier project "sccdrv" which was initiated by
65 Guido ten Dolle. Not much of the old driver survived,
66 though. The first version I put my hands on was sccdrv1.3
67 from August 1993. The memory buffer pool concept
68 appeared in an unauthorized sccdrv version (1.5) from
69 August 1994.
70
71 1995-01-31 changed copyright notice to GPL without limitations.
72
73 .
74 . <SNIP>
75 .
76
77 1996-10-05 New semester, new driver...
78
79 * KISS TNC emulator removed (TTY driver)
80 * Source moved to drivers/net/
81 * Includes Z8530 defines from drivers/net/z8530.h
82 * Uses sk_buffer memory management
83 * Reduced overhead of /proc/net/z8530drv output
84 * Streamlined quite a lot things
85 * Invents brand new bugs... ;-)
86
87 The move to version number 3.0 reflects theses changes.
88 You can use 'kissbridge' if you need a KISS TNC emulator.
89
90 1996-12-13 Fixed for Linux networking changes. (G4KLX)
91 1997-01-08 Fixed the remaining problems.
92 1997-04-02 Hopefully fixed the problems with the new *_timer()
93 routines, added calibration code.
94 1997-10-12 Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO
95 1998-01-29 Small fix to avoid lock-up on initialization
96 1998-09-29 Fixed the "grouping" bugs, tx_inhibit works again,
97 using dev->tx_queue_len now instead of MAXQUEUE now.
98 1998-10-21 Postponed the spinlock changes, would need a lot of
99 testing I currently don't have the time to. Softdcd doesn't
100 work.
101 1998-11-04 Softdcd does not work correctly in DPLL mode, in fact it
102 never did. The DPLL locks on noise, the SYNC unit sees
103 flags that aren't... Restarting the DPLL does not help
104 either, it resynchronizes too slow and the first received
105 frame gets lost.
106 2000-02-13 Fixed for new network driver interface changes, still
107 does TX timeouts itself since it uses its own queue
108 scheme.
109
110 Thanks to all who contributed to this driver with ideas and bug
111 reports!
112
113 NB -- if you find errors, change something, please let me know
114 first before you distribute it... And please don't touch
115 the version number. Just replace my callsign in
116 "v3.0.dl1bke" with your own. Just to avoid confusion...
117
118 If you want to add your modification to the linux distribution
119 please (!) contact me first.
120
121 New versions of the driver will be announced on the linux-hams
122 mailing list on vger.kernel.org. To subscribe send an e-mail
123 to majordomo@vger.kernel.org with the following line in
124 the body of the mail:
125
126 subscribe linux-hams
127
128 The content of the "Subject" field will be ignored.
129
130 vy 73,
131 Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
132 AX-25 : DL1BKE @ DB0ABH.#BAY.DEU.EU
133 Internet: jreuter@yaina.de
134 www : http://yaina.de/jreuter
135 */
136
137 /* ----------------------------------------------------------------------- */
138
139 #undef SCC_LDELAY /* slow it even a bit more down */
140 #undef SCC_DONT_CHECK /* don't look if the SCCs you specified are available */
141
142 #define SCC_MAXCHIPS 4 /* number of max. supported chips */
143 #define SCC_BUFSIZE 384 /* must not exceed 4096 */
144 #undef SCC_DEBUG
145
146 #define SCC_DEFAULT_CLOCK 4915200
147 /* default pclock if nothing is specified */
148
149 /* ----------------------------------------------------------------------- */
150
151 #include <linux/module.h>
152 #include <linux/errno.h>
153 #include <linux/signal.h>
154 #include <linux/timer.h>
155 #include <linux/interrupt.h>
156 #include <linux/ioport.h>
157 #include <linux/string.h>
158 #include <linux/in.h>
159 #include <linux/fcntl.h>
160 #include <linux/ptrace.h>
161 #include <linux/slab.h>
162 #include <linux/delay.h>
163 #include <linux/skbuff.h>
164 #include <linux/netdevice.h>
165 #include <linux/rtnetlink.h>
166 #include <linux/if_ether.h>
167 #include <linux/if_arp.h>
168 #include <linux/socket.h>
169 #include <linux/init.h>
170 #include <linux/scc.h>
171 #include <linux/ctype.h>
172 #include <linux/kernel.h>
173 #include <linux/proc_fs.h>
174 #include <linux/seq_file.h>
175 #include <linux/bitops.h>
176
177 #include <net/net_namespace.h>
178 #include <net/ax25.h>
179
180 #include <asm/irq.h>
181 #include <asm/system.h>
182 #include <asm/io.h>
183 #include <asm/uaccess.h>
184
185 #include "z8530.h"
186
187 static const char banner[] __initdata = KERN_INFO \
188 "AX.25: Z8530 SCC driver version "VERSION".dl1bke\n";
189
190 static void t_dwait(unsigned long);
191 static void t_txdelay(unsigned long);
192 static void t_tail(unsigned long);
193 static void t_busy(unsigned long);
194 static void t_maxkeyup(unsigned long);
195 static void t_idle(unsigned long);
196 static void scc_tx_done(struct scc_channel *);
197 static void scc_start_tx_timer(struct scc_channel *, void (*)(unsigned long), unsigned long);
198 static void scc_start_maxkeyup(struct scc_channel *);
199 static void scc_start_defer(struct scc_channel *);
200
201 static void z8530_init(void);
202
203 static void init_channel(struct scc_channel *scc);
204 static void scc_key_trx (struct scc_channel *scc, char tx);
205 static void scc_init_timer(struct scc_channel *scc);
206
207 static int scc_net_alloc(const char *name, struct scc_channel *scc);
208 static void scc_net_setup(struct net_device *dev);
209 static int scc_net_open(struct net_device *dev);
210 static int scc_net_close(struct net_device *dev);
211 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb);
212 static netdev_tx_t scc_net_tx(struct sk_buff *skb,
213 struct net_device *dev);
214 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
215 static int scc_net_set_mac_address(struct net_device *dev, void *addr);
216 static struct net_device_stats * scc_net_get_stats(struct net_device *dev);
217
218 static unsigned char SCC_DriverName[] = "scc";
219
220 static struct irqflags { unsigned char used : 1; } Ivec[NR_IRQS];
221
222 static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS]; /* information per channel */
223
224 static struct scc_ctrl {
225 io_port chan_A;
226 io_port chan_B;
227 int irq;
228 } SCC_ctrl[SCC_MAXCHIPS+1];
229
230 static unsigned char Driver_Initialized;
231 static int Nchips;
232 static io_port Vector_Latch;
233
234
235 /* ******************************************************************** */
236 /* * Port Access Functions * */
237 /* ******************************************************************** */
238
239 /* These provide interrupt save 2-step access to the Z8530 registers */
240
241 static DEFINE_SPINLOCK(iolock); /* Guards paired accesses */
242
243 static inline unsigned char InReg(io_port port, unsigned char reg)
244 {
245 unsigned long flags;
246 unsigned char r;
247
248 spin_lock_irqsave(&iolock, flags);
249 #ifdef SCC_LDELAY
250 Outb(port, reg);
251 udelay(SCC_LDELAY);
252 r=Inb(port);
253 udelay(SCC_LDELAY);
254 #else
255 Outb(port, reg);
256 r=Inb(port);
257 #endif
258 spin_unlock_irqrestore(&iolock, flags);
259 return r;
260 }
261
262 static inline void OutReg(io_port port, unsigned char reg, unsigned char val)
263 {
264 unsigned long flags;
265
266 spin_lock_irqsave(&iolock, flags);
267 #ifdef SCC_LDELAY
268 Outb(port, reg); udelay(SCC_LDELAY);
269 Outb(port, val); udelay(SCC_LDELAY);
270 #else
271 Outb(port, reg);
272 Outb(port, val);
273 #endif
274 spin_unlock_irqrestore(&iolock, flags);
275 }
276
277 static inline void wr(struct scc_channel *scc, unsigned char reg,
278 unsigned char val)
279 {
280 OutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
281 }
282
283 static inline void or(struct scc_channel *scc, unsigned char reg, unsigned char val)
284 {
285 OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
286 }
287
288 static inline void cl(struct scc_channel *scc, unsigned char reg, unsigned char val)
289 {
290 OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
291 }
292
293 /* ******************************************************************** */
294 /* * Some useful macros * */
295 /* ******************************************************************** */
296
297 static inline void scc_discard_buffers(struct scc_channel *scc)
298 {
299 unsigned long flags;
300
301 spin_lock_irqsave(&scc->lock, flags);
302 if (scc->tx_buff != NULL)
303 {
304 dev_kfree_skb(scc->tx_buff);
305 scc->tx_buff = NULL;
306 }
307
308 while (!skb_queue_empty(&scc->tx_queue))
309 dev_kfree_skb(skb_dequeue(&scc->tx_queue));
310
311 spin_unlock_irqrestore(&scc->lock, flags);
312 }
313
314
315
316 /* ******************************************************************** */
317 /* * Interrupt Service Routines * */
318 /* ******************************************************************** */
319
320
321 /* ----> subroutines for the interrupt handlers <---- */
322
323 static inline void scc_notify(struct scc_channel *scc, int event)
324 {
325 struct sk_buff *skb;
326 char *bp;
327
328 if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA)
329 return;
330
331 skb = dev_alloc_skb(2);
332 if (skb != NULL)
333 {
334 bp = skb_put(skb, 2);
335 *bp++ = PARAM_HWEVENT;
336 *bp++ = event;
337 scc_net_rx(scc, skb);
338 } else
339 scc->stat.nospace++;
340 }
341
342 static inline void flush_rx_FIFO(struct scc_channel *scc)
343 {
344 int k;
345
346 for (k=0; k<3; k++)
347 Inb(scc->data);
348
349 if(scc->rx_buff != NULL) /* did we receive something? */
350 {
351 scc->stat.rxerrs++; /* then count it as an error */
352 dev_kfree_skb_irq(scc->rx_buff);
353 scc->rx_buff = NULL;
354 }
355 }
356
357 static void start_hunt(struct scc_channel *scc)
358 {
359 if ((scc->modem.clocksrc != CLK_EXTERNAL))
360 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
361 or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */
362 }
363
364 /* ----> four different interrupt handlers for Tx, Rx, changing of */
365 /* DCD/CTS and Rx/Tx errors */
366
367 /* Transmitter interrupt handler */
368 static inline void scc_txint(struct scc_channel *scc)
369 {
370 struct sk_buff *skb;
371
372 scc->stat.txints++;
373 skb = scc->tx_buff;
374
375 /* send first octet */
376
377 if (skb == NULL)
378 {
379 skb = skb_dequeue(&scc->tx_queue);
380 scc->tx_buff = skb;
381 netif_wake_queue(scc->dev);
382
383 if (skb == NULL)
384 {
385 scc_tx_done(scc);
386 Outb(scc->ctrl, RES_Tx_P);
387 return;
388 }
389
390 if (skb->len == 0) /* Paranoia... */
391 {
392 dev_kfree_skb_irq(skb);
393 scc->tx_buff = NULL;
394 scc_tx_done(scc);
395 Outb(scc->ctrl, RES_Tx_P);
396 return;
397 }
398
399 scc->stat.tx_state = TXS_ACTIVE;
400
401 OutReg(scc->ctrl, R0, RES_Tx_CRC);
402 /* reset CRC generator */
403 or(scc,R10,ABUNDER); /* re-install underrun protection */
404 Outb(scc->data,*skb->data); /* send byte */
405 skb_pull(skb, 1);
406
407 if (!scc->enhanced) /* reset EOM latch */
408 Outb(scc->ctrl,RES_EOM_L);
409 return;
410 }
411
412 /* End Of Frame... */
413
414 if (skb->len == 0)
415 {
416 Outb(scc->ctrl, RES_Tx_P); /* reset pending int */
417 cl(scc, R10, ABUNDER); /* send CRC */
418 dev_kfree_skb_irq(skb);
419 scc->tx_buff = NULL;
420 scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */
421 return;
422 }
423
424 /* send octet */
425
426 Outb(scc->data,*skb->data);
427 skb_pull(skb, 1);
428 }
429
430
431 /* External/Status interrupt handler */
432 static inline void scc_exint(struct scc_channel *scc)
433 {
434 unsigned char status,changes,chg_and_stat;
435
436 scc->stat.exints++;
437
438 status = InReg(scc->ctrl,R0);
439 changes = status ^ scc->status;
440 chg_and_stat = changes & status;
441
442 /* ABORT: generated whenever DCD drops while receiving */
443
444 if (chg_and_stat & BRK_ABRT) /* Received an ABORT */
445 flush_rx_FIFO(scc);
446
447 /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */
448
449 if ((changes & SYNC_HUNT) && scc->kiss.softdcd)
450 {
451 if (status & SYNC_HUNT)
452 {
453 scc->dcd = 0;
454 flush_rx_FIFO(scc);
455 if ((scc->modem.clocksrc != CLK_EXTERNAL))
456 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
457 } else {
458 scc->dcd = 1;
459 }
460
461 scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON);
462 }
463
464 /* DCD: on = start to receive packet, off = ABORT condition */
465 /* (a successfully received packet generates a special condition int) */
466
467 if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */
468 {
469 if(status & DCD) /* DCD is now ON */
470 {
471 start_hunt(scc);
472 scc->dcd = 1;
473 } else { /* DCD is now OFF */
474 cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */
475 flush_rx_FIFO(scc);
476 scc->dcd = 0;
477 }
478
479 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
480 }
481
482 #ifdef notdef
483 /* CTS: use external TxDelay (what's that good for?!)
484 * Anyway: If we _could_ use it (BayCom USCC uses CTS for
485 * own purposes) we _should_ use the "autoenable" feature
486 * of the Z8530 and not this interrupt...
487 */
488
489 if (chg_and_stat & CTS) /* CTS is now ON */
490 {
491 if (scc->kiss.txdelay == 0) /* zero TXDELAY = wait for CTS */
492 scc_start_tx_timer(scc, t_txdelay, 0);
493 }
494 #endif
495
496 if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM))
497 {
498 scc->stat.tx_under++; /* oops, an underrun! count 'em */
499 Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */
500
501 if (scc->tx_buff != NULL)
502 {
503 dev_kfree_skb_irq(scc->tx_buff);
504 scc->tx_buff = NULL;
505 }
506
507 or(scc,R10,ABUNDER);
508 scc_start_tx_timer(scc, t_txdelay, 0); /* restart transmission */
509 }
510
511 scc->status = status;
512 Outb(scc->ctrl,RES_EXT_INT);
513 }
514
515
516 /* Receiver interrupt handler */
517 static inline void scc_rxint(struct scc_channel *scc)
518 {
519 struct sk_buff *skb;
520
521 scc->stat.rxints++;
522
523 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF)
524 {
525 Inb(scc->data); /* discard char */
526 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
527 return;
528 }
529
530 skb = scc->rx_buff;
531
532 if (skb == NULL)
533 {
534 skb = dev_alloc_skb(scc->stat.bufsize);
535 if (skb == NULL)
536 {
537 scc->dev_stat.rx_dropped++;
538 scc->stat.nospace++;
539 Inb(scc->data);
540 or(scc, R3, ENT_HM);
541 return;
542 }
543
544 scc->rx_buff = skb;
545 *(skb_put(skb, 1)) = 0; /* KISS data */
546 }
547
548 if (skb->len >= scc->stat.bufsize)
549 {
550 #ifdef notdef
551 printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n");
552 #endif
553 dev_kfree_skb_irq(skb);
554 scc->rx_buff = NULL;
555 Inb(scc->data);
556 or(scc, R3, ENT_HM);
557 return;
558 }
559
560 *(skb_put(skb, 1)) = Inb(scc->data);
561 }
562
563
564 /* Receive Special Condition interrupt handler */
565 static inline void scc_spint(struct scc_channel *scc)
566 {
567 unsigned char status;
568 struct sk_buff *skb;
569
570 scc->stat.spints++;
571
572 status = InReg(scc->ctrl,R1); /* read receiver status */
573
574 Inb(scc->data); /* throw away Rx byte */
575 skb = scc->rx_buff;
576
577 if(status & Rx_OVR) /* receiver overrun */
578 {
579 scc->stat.rx_over++; /* count them */
580 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
581
582 if (skb != NULL)
583 dev_kfree_skb_irq(skb);
584 scc->rx_buff = skb = NULL;
585 }
586
587 if(status & END_FR && skb != NULL) /* end of frame */
588 {
589 /* CRC okay, frame ends on 8 bit boundary and received something ? */
590
591 if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0)
592 {
593 /* ignore last received byte (first of the CRC bytes) */
594 skb_trim(skb, skb->len-1);
595 scc_net_rx(scc, skb);
596 scc->rx_buff = NULL;
597 scc->stat.rxframes++;
598 } else { /* a bad frame */
599 dev_kfree_skb_irq(skb);
600 scc->rx_buff = NULL;
601 scc->stat.rxerrs++;
602 }
603 }
604
605 Outb(scc->ctrl,ERR_RES);
606 }
607
608
609 /* ----> interrupt service routine for the Z8530 <---- */
610
611 static void scc_isr_dispatch(struct scc_channel *scc, int vector)
612 {
613 spin_lock(&scc->lock);
614 switch (vector & VECTOR_MASK)
615 {
616 case TXINT: scc_txint(scc); break;
617 case EXINT: scc_exint(scc); break;
618 case RXINT: scc_rxint(scc); break;
619 case SPINT: scc_spint(scc); break;
620 }
621 spin_unlock(&scc->lock);
622 }
623
624 /* If the card has a latch for the interrupt vector (like the PA0HZP card)
625 use it to get the number of the chip that generated the int.
626 If not: poll all defined chips.
627 */
628
629 #define SCC_IRQTIMEOUT 30000
630
631 static irqreturn_t scc_isr(int irq, void *dev_id)
632 {
633 int chip_irq = (long) dev_id;
634 unsigned char vector;
635 struct scc_channel *scc;
636 struct scc_ctrl *ctrl;
637 int k;
638
639 if (Vector_Latch)
640 {
641 for(k=0; k < SCC_IRQTIMEOUT; k++)
642 {
643 Outb(Vector_Latch, 0); /* Generate INTACK */
644
645 /* Read the vector */
646 if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break;
647 if (vector & 0x01) break;
648
649 scc=&SCC_Info[vector >> 3 ^ 0x01];
650 if (!scc->dev) break;
651
652 scc_isr_dispatch(scc, vector);
653
654 OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */
655 }
656
657 if (k == SCC_IRQTIMEOUT)
658 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n");
659
660 return IRQ_HANDLED;
661 }
662
663 /* Find the SCC generating the interrupt by polling all attached SCCs
664 * reading RR3A (the interrupt pending register)
665 */
666
667 ctrl = SCC_ctrl;
668 while (ctrl->chan_A)
669 {
670 if (ctrl->irq != chip_irq)
671 {
672 ctrl++;
673 continue;
674 }
675
676 scc = NULL;
677 for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++)
678 {
679 vector=InReg(ctrl->chan_B,R2); /* Read the vector */
680 if (vector & 0x01) break;
681
682 scc = &SCC_Info[vector >> 3 ^ 0x01];
683 if (!scc->dev) break;
684
685 scc_isr_dispatch(scc, vector);
686 }
687
688 if (k == SCC_IRQTIMEOUT)
689 {
690 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n");
691 break;
692 }
693
694 /* This looks weird and it is. At least the BayCom USCC doesn't
695 * use the Interrupt Daisy Chain, thus we'll have to start
696 * all over again to be sure not to miss an interrupt from
697 * (any of) the other chip(s)...
698 * Honestly, the situation *is* braindamaged...
699 */
700
701 if (scc != NULL)
702 {
703 OutReg(scc->ctrl,R0,RES_H_IUS);
704 ctrl = SCC_ctrl;
705 } else
706 ctrl++;
707 }
708 return IRQ_HANDLED;
709 }
710
711
712
713 /* ******************************************************************** */
714 /* * Init Channel */
715 /* ******************************************************************** */
716
717
718 /* ----> set SCC channel speed <---- */
719
720 static inline void set_brg(struct scc_channel *scc, unsigned int tc)
721 {
722 cl(scc,R14,BRENABL); /* disable baudrate generator */
723 wr(scc,R12,tc & 255); /* brg rate LOW */
724 wr(scc,R13,tc >> 8); /* brg rate HIGH */
725 or(scc,R14,BRENABL); /* enable baudrate generator */
726 }
727
728 static inline void set_speed(struct scc_channel *scc)
729 {
730 unsigned long flags;
731 spin_lock_irqsave(&scc->lock, flags);
732
733 if (scc->modem.speed > 0) /* paranoia... */
734 set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);
735
736 spin_unlock_irqrestore(&scc->lock, flags);
737 }
738
739
740 /* ----> initialize a SCC channel <---- */
741
742 static inline void init_brg(struct scc_channel *scc)
743 {
744 wr(scc, R14, BRSRC); /* BRG source = PCLK */
745 OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */
746 OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */
747 }
748
749 /*
750 * Initialization according to the Z8530 manual (SGS-Thomson's version):
751 *
752 * 1. Modes and constants
753 *
754 * WR9 11000000 chip reset
755 * WR4 XXXXXXXX Tx/Rx control, async or sync mode
756 * WR1 0XX00X00 select W/REQ (optional)
757 * WR2 XXXXXXXX program interrupt vector
758 * WR3 XXXXXXX0 select Rx control
759 * WR5 XXXX0XXX select Tx control
760 * WR6 XXXXXXXX sync character
761 * WR7 XXXXXXXX sync character
762 * WR9 000X0XXX select interrupt control
763 * WR10 XXXXXXXX miscellaneous control (optional)
764 * WR11 XXXXXXXX clock control
765 * WR12 XXXXXXXX time constant lower byte (optional)
766 * WR13 XXXXXXXX time constant upper byte (optional)
767 * WR14 XXXXXXX0 miscellaneous control
768 * WR14 XXXSSSSS commands (optional)
769 *
770 * 2. Enables
771 *
772 * WR14 000SSSS1 baud rate enable
773 * WR3 SSSSSSS1 Rx enable
774 * WR5 SSSS1SSS Tx enable
775 * WR0 10000000 reset Tx CRG (optional)
776 * WR1 XSS00S00 DMA enable (optional)
777 *
778 * 3. Interrupt status
779 *
780 * WR15 XXXXXXXX enable external/status
781 * WR0 00010000 reset external status
782 * WR0 00010000 reset external status twice
783 * WR1 SSSXXSXX enable Rx, Tx and Ext/status
784 * WR9 000SXSSS enable master interrupt enable
785 *
786 * 1 = set to one, 0 = reset to zero
787 * X = user defined, S = same as previous init
788 *
789 *
790 * Note that the implementation differs in some points from above scheme.
791 *
792 */
793
794 static void init_channel(struct scc_channel *scc)
795 {
796 del_timer(&scc->tx_t);
797 del_timer(&scc->tx_wdog);
798
799 disable_irq(scc->irq);
800
801 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
802 wr(scc,R1,0); /* no W/REQ operation */
803 wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */
804 wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */
805 wr(scc,R6,0); /* SDLC address zero (not used) */
806 wr(scc,R7,FLAG); /* SDLC flag value */
807 wr(scc,R9,VIS); /* vector includes status */
808 wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */
809 wr(scc,R14, 0);
810
811
812 /* set clock sources:
813
814 CLK_DPLL: normal halfduplex operation
815
816 RxClk: use DPLL
817 TxClk: use DPLL
818 TRxC mode DPLL output
819
820 CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem)
821
822 BayCom: others:
823
824 TxClk = pin RTxC TxClk = pin TRxC
825 RxClk = pin TRxC RxClk = pin RTxC
826
827
828 CLK_DIVIDER:
829 RxClk = use DPLL
830 TxClk = pin RTxC
831
832 BayCom: others:
833 pin TRxC = DPLL pin TRxC = BRG
834 (RxClk * 1) (RxClk * 32)
835 */
836
837
838 switch(scc->modem.clocksrc)
839 {
840 case CLK_DPLL:
841 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
842 init_brg(scc);
843 break;
844
845 case CLK_DIVIDER:
846 wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI);
847 init_brg(scc);
848 break;
849
850 case CLK_EXTERNAL:
851 wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP);
852 OutReg(scc->ctrl, R14, DISDPLL);
853 break;
854
855 }
856
857 set_speed(scc); /* set baudrate */
858
859 if(scc->enhanced)
860 {
861 or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
862 wr(scc,R7,AUTOEOM);
863 }
864
865 if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD))
866 /* DCD is now ON */
867 {
868 start_hunt(scc);
869 }
870
871 /* enable ABORT, DCD & SYNC/HUNT interrupts */
872
873 wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE));
874
875 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
876 Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */
877
878 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
879
880 scc->status = InReg(scc->ctrl,R0); /* read initial status */
881
882 or(scc,R9,MIE); /* master interrupt enable */
883
884 scc_init_timer(scc);
885
886 enable_irq(scc->irq);
887 }
888
889
890
891
892 /* ******************************************************************** */
893 /* * SCC timer functions * */
894 /* ******************************************************************** */
895
896
897 /* ----> scc_key_trx sets the time constant for the baudrate
898 generator and keys the transmitter <---- */
899
900 static void scc_key_trx(struct scc_channel *scc, char tx)
901 {
902 unsigned int time_const;
903
904 if (scc->brand & PRIMUS)
905 Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0));
906
907 if (scc->modem.speed < 300)
908 scc->modem.speed = 1200;
909
910 time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;
911
912 disable_irq(scc->irq);
913
914 if (tx)
915 {
916 or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */
917 or(scc, R15, TxUIE);
918 }
919
920 if (scc->modem.clocksrc == CLK_DPLL)
921 { /* force simplex operation */
922 if (tx)
923 {
924 #ifdef CONFIG_SCC_TRXECHO
925 cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */
926 cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */
927 #endif
928 set_brg(scc, time_const); /* reprogram baudrate generator */
929
930 /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */
931 wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR);
932
933 /* By popular demand: tx_inhibit */
934 if (scc->kiss.tx_inhibit)
935 {
936 or(scc,R5, TxENAB);
937 scc->wreg[R5] |= RTS;
938 } else {
939 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */
940 }
941 } else {
942 cl(scc,R5,RTS|TxENAB);
943
944 set_brg(scc, time_const); /* reprogram baudrate generator */
945
946 /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */
947 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
948
949 #ifndef CONFIG_SCC_TRXECHO
950 if (scc->kiss.softdcd)
951 #endif
952 {
953 or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE);
954 start_hunt(scc);
955 }
956 }
957 } else {
958 if (tx)
959 {
960 #ifdef CONFIG_SCC_TRXECHO
961 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
962 {
963 cl(scc, R3, RxENABLE);
964 cl(scc, R15, DCDIE|SYNCIE);
965 }
966 #endif
967
968 if (scc->kiss.tx_inhibit)
969 {
970 or(scc,R5, TxENAB);
971 scc->wreg[R5] |= RTS;
972 } else {
973 or(scc,R5,RTS|TxENAB); /* enable tx */
974 }
975 } else {
976 cl(scc,R5,RTS|TxENAB); /* disable tx */
977
978 if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) &&
979 #ifndef CONFIG_SCC_TRXECHO
980 scc->kiss.softdcd)
981 #else
982 1)
983 #endif
984 {
985 or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE);
986 start_hunt(scc);
987 }
988 }
989 }
990
991 enable_irq(scc->irq);
992 }
993
994
995 /* ----> SCC timer interrupt handler and friends. <---- */
996
997 static void __scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
998 {
999 del_timer(&scc->tx_t);
1000
1001 if (when == 0)
1002 {
1003 handler((unsigned long) scc);
1004 } else
1005 if (when != TIMER_OFF)
1006 {
1007 scc->tx_t.data = (unsigned long) scc;
1008 scc->tx_t.function = handler;
1009 scc->tx_t.expires = jiffies + (when*HZ)/100;
1010 add_timer(&scc->tx_t);
1011 }
1012 }
1013
1014 static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
1015 {
1016 unsigned long flags;
1017
1018 spin_lock_irqsave(&scc->lock, flags);
1019 __scc_start_tx_timer(scc, handler, when);
1020 spin_unlock_irqrestore(&scc->lock, flags);
1021 }
1022
1023 static void scc_start_defer(struct scc_channel *scc)
1024 {
1025 unsigned long flags;
1026
1027 spin_lock_irqsave(&scc->lock, flags);
1028 del_timer(&scc->tx_wdog);
1029
1030 if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF)
1031 {
1032 scc->tx_wdog.data = (unsigned long) scc;
1033 scc->tx_wdog.function = t_busy;
1034 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer;
1035 add_timer(&scc->tx_wdog);
1036 }
1037 spin_unlock_irqrestore(&scc->lock, flags);
1038 }
1039
1040 static void scc_start_maxkeyup(struct scc_channel *scc)
1041 {
1042 unsigned long flags;
1043
1044 spin_lock_irqsave(&scc->lock, flags);
1045 del_timer(&scc->tx_wdog);
1046
1047 if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF)
1048 {
1049 scc->tx_wdog.data = (unsigned long) scc;
1050 scc->tx_wdog.function = t_maxkeyup;
1051 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup;
1052 add_timer(&scc->tx_wdog);
1053 }
1054 spin_unlock_irqrestore(&scc->lock, flags);
1055 }
1056
1057 /*
1058 * This is called from scc_txint() when there are no more frames to send.
1059 * Not exactly a timer function, but it is a close friend of the family...
1060 */
1061
1062 static void scc_tx_done(struct scc_channel *scc)
1063 {
1064 /*
1065 * trx remains keyed in fulldup mode 2 until t_idle expires.
1066 */
1067
1068 switch (scc->kiss.fulldup)
1069 {
1070 case KISS_DUPLEX_LINK:
1071 scc->stat.tx_state = TXS_IDLE2;
1072 if (scc->kiss.idletime != TIMER_OFF)
1073 scc_start_tx_timer(scc, t_idle, scc->kiss.idletime*100);
1074 break;
1075 case KISS_DUPLEX_OPTIMA:
1076 scc_notify(scc, HWEV_ALL_SENT);
1077 break;
1078 default:
1079 scc->stat.tx_state = TXS_BUSY;
1080 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1081 }
1082
1083 netif_wake_queue(scc->dev);
1084 }
1085
1086
1087 static unsigned char Rand = 17;
1088
1089 static inline int is_grouped(struct scc_channel *scc)
1090 {
1091 int k;
1092 struct scc_channel *scc2;
1093 unsigned char grp1, grp2;
1094
1095 grp1 = scc->kiss.group;
1096
1097 for (k = 0; k < (Nchips * 2); k++)
1098 {
1099 scc2 = &SCC_Info[k];
1100 grp2 = scc2->kiss.group;
1101
1102 if (scc2 == scc || !(scc2->dev && grp2))
1103 continue;
1104
1105 if ((grp1 & 0x3f) == (grp2 & 0x3f))
1106 {
1107 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) )
1108 return 1;
1109
1110 if ( (grp1 & RXGROUP) && scc2->dcd )
1111 return 1;
1112 }
1113 }
1114 return 0;
1115 }
1116
1117 /* DWAIT and SLOTTIME expired
1118 *
1119 * fulldup == 0: DCD is active or Rand > P-persistence: start t_busy timer
1120 * else key trx and start txdelay
1121 * fulldup == 1: key trx and start txdelay
1122 * fulldup == 2: mintime expired, reset status or key trx and start txdelay
1123 */
1124
1125 static void t_dwait(unsigned long channel)
1126 {
1127 struct scc_channel *scc = (struct scc_channel *) channel;
1128
1129 if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */
1130 {
1131 if (skb_queue_empty(&scc->tx_queue)) { /* nothing to send */
1132 scc->stat.tx_state = TXS_IDLE;
1133 netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */
1134 return;
1135 }
1136
1137 scc->stat.tx_state = TXS_BUSY;
1138 }
1139
1140 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1141 {
1142 Rand = Rand * 17 + 31;
1143
1144 if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) )
1145 {
1146 scc_start_defer(scc);
1147 scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime);
1148 return ;
1149 }
1150 }
1151
1152 if ( !(scc->wreg[R5] & RTS) )
1153 {
1154 scc_key_trx(scc, TX_ON);
1155 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1156 } else {
1157 scc_start_tx_timer(scc, t_txdelay, 0);
1158 }
1159 }
1160
1161
1162 /* TXDELAY expired
1163 *
1164 * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog.
1165 */
1166
1167 static void t_txdelay(unsigned long channel)
1168 {
1169 struct scc_channel *scc = (struct scc_channel *) channel;
1170
1171 scc_start_maxkeyup(scc);
1172
1173 if (scc->tx_buff == NULL)
1174 {
1175 disable_irq(scc->irq);
1176 scc_txint(scc);
1177 enable_irq(scc->irq);
1178 }
1179 }
1180
1181
1182 /* TAILTIME expired
1183 *
1184 * switch off transmitter. If we were stopped by Maxkeyup restart
1185 * transmission after 'mintime' seconds
1186 */
1187
1188 static void t_tail(unsigned long channel)
1189 {
1190 struct scc_channel *scc = (struct scc_channel *) channel;
1191 unsigned long flags;
1192
1193 spin_lock_irqsave(&scc->lock, flags);
1194 del_timer(&scc->tx_wdog);
1195 scc_key_trx(scc, TX_OFF);
1196 spin_unlock_irqrestore(&scc->lock, flags);
1197
1198 if (scc->stat.tx_state == TXS_TIMEOUT) /* we had a timeout? */
1199 {
1200 scc->stat.tx_state = TXS_WAIT;
1201 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1202 return;
1203 }
1204
1205 scc->stat.tx_state = TXS_IDLE;
1206 netif_wake_queue(scc->dev);
1207 }
1208
1209
1210 /* BUSY timeout
1211 *
1212 * throw away send buffers if DCD remains active too long.
1213 */
1214
1215 static void t_busy(unsigned long channel)
1216 {
1217 struct scc_channel *scc = (struct scc_channel *) channel;
1218
1219 del_timer(&scc->tx_t);
1220 netif_stop_queue(scc->dev); /* don't pile on the wabbit! */
1221
1222 scc_discard_buffers(scc);
1223 scc->stat.txerrs++;
1224 scc->stat.tx_state = TXS_IDLE;
1225
1226 netif_wake_queue(scc->dev);
1227 }
1228
1229 /* MAXKEYUP timeout
1230 *
1231 * this is our watchdog.
1232 */
1233
1234 static void t_maxkeyup(unsigned long channel)
1235 {
1236 struct scc_channel *scc = (struct scc_channel *) channel;
1237 unsigned long flags;
1238
1239 spin_lock_irqsave(&scc->lock, flags);
1240 /*
1241 * let things settle down before we start to
1242 * accept new data.
1243 */
1244
1245 netif_stop_queue(scc->dev);
1246 scc_discard_buffers(scc);
1247
1248 del_timer(&scc->tx_t);
1249
1250 cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */
1251 cl(scc, R15, TxUIE); /* count it. */
1252 OutReg(scc->ctrl, R0, RES_Tx_P);
1253
1254 spin_unlock_irqrestore(&scc->lock, flags);
1255
1256 scc->stat.txerrs++;
1257 scc->stat.tx_state = TXS_TIMEOUT;
1258 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1259 }
1260
1261 /* IDLE timeout
1262 *
1263 * in fulldup mode 2 it keys down the transmitter after 'idle' seconds
1264 * of inactivity. We will not restart transmission before 'mintime'
1265 * expires.
1266 */
1267
1268 static void t_idle(unsigned long channel)
1269 {
1270 struct scc_channel *scc = (struct scc_channel *) channel;
1271
1272 del_timer(&scc->tx_wdog);
1273
1274 scc_key_trx(scc, TX_OFF);
1275 if(scc->kiss.mintime)
1276 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1277 scc->stat.tx_state = TXS_WAIT;
1278 }
1279
1280 static void scc_init_timer(struct scc_channel *scc)
1281 {
1282 unsigned long flags;
1283
1284 spin_lock_irqsave(&scc->lock, flags);
1285 scc->stat.tx_state = TXS_IDLE;
1286 spin_unlock_irqrestore(&scc->lock, flags);
1287 }
1288
1289
1290 /* ******************************************************************** */
1291 /* * Set/get L1 parameters * */
1292 /* ******************************************************************** */
1293
1294
1295 /*
1296 * this will set the "hardware" parameters through KISS commands or ioctl()
1297 */
1298
1299 #define CAST(x) (unsigned long)(x)
1300
1301 static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg)
1302 {
1303 switch (cmd)
1304 {
1305 case PARAM_TXDELAY: scc->kiss.txdelay=arg; break;
1306 case PARAM_PERSIST: scc->kiss.persist=arg; break;
1307 case PARAM_SLOTTIME: scc->kiss.slottime=arg; break;
1308 case PARAM_TXTAIL: scc->kiss.tailtime=arg; break;
1309 case PARAM_FULLDUP: scc->kiss.fulldup=arg; break;
1310 case PARAM_DTR: break; /* does someone need this? */
1311 case PARAM_GROUP: scc->kiss.group=arg; break;
1312 case PARAM_IDLE: scc->kiss.idletime=arg; break;
1313 case PARAM_MIN: scc->kiss.mintime=arg; break;
1314 case PARAM_MAXKEY: scc->kiss.maxkeyup=arg; break;
1315 case PARAM_WAIT: scc->kiss.waittime=arg; break;
1316 case PARAM_MAXDEFER: scc->kiss.maxdefer=arg; break;
1317 case PARAM_TX: scc->kiss.tx_inhibit=arg; break;
1318
1319 case PARAM_SOFTDCD:
1320 scc->kiss.softdcd=arg;
1321 if (arg)
1322 {
1323 or(scc, R15, SYNCIE);
1324 cl(scc, R15, DCDIE);
1325 start_hunt(scc);
1326 } else {
1327 or(scc, R15, DCDIE);
1328 cl(scc, R15, SYNCIE);
1329 }
1330 break;
1331
1332 case PARAM_SPEED:
1333 if (arg < 256)
1334 scc->modem.speed=arg*100;
1335 else
1336 scc->modem.speed=arg;
1337
1338 if (scc->stat.tx_state == 0) /* only switch baudrate on rx... ;-) */
1339 set_speed(scc);
1340 break;
1341
1342 case PARAM_RTS:
1343 if ( !(scc->wreg[R5] & RTS) )
1344 {
1345 if (arg != TX_OFF) {
1346 scc_key_trx(scc, TX_ON);
1347 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1348 }
1349 } else {
1350 if (arg == TX_OFF)
1351 {
1352 scc->stat.tx_state = TXS_BUSY;
1353 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1354 }
1355 }
1356 break;
1357
1358 case PARAM_HWEVENT:
1359 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
1360 break;
1361
1362 default: return -EINVAL;
1363 }
1364
1365 return 0;
1366 }
1367
1368
1369
1370 static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd)
1371 {
1372 switch (cmd)
1373 {
1374 case PARAM_TXDELAY: return CAST(scc->kiss.txdelay);
1375 case PARAM_PERSIST: return CAST(scc->kiss.persist);
1376 case PARAM_SLOTTIME: return CAST(scc->kiss.slottime);
1377 case PARAM_TXTAIL: return CAST(scc->kiss.tailtime);
1378 case PARAM_FULLDUP: return CAST(scc->kiss.fulldup);
1379 case PARAM_SOFTDCD: return CAST(scc->kiss.softdcd);
1380 case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0);
1381 case PARAM_RTS: return CAST((scc->wreg[R5] & RTS)? 1:0);
1382 case PARAM_SPEED: return CAST(scc->modem.speed);
1383 case PARAM_GROUP: return CAST(scc->kiss.group);
1384 case PARAM_IDLE: return CAST(scc->kiss.idletime);
1385 case PARAM_MIN: return CAST(scc->kiss.mintime);
1386 case PARAM_MAXKEY: return CAST(scc->kiss.maxkeyup);
1387 case PARAM_WAIT: return CAST(scc->kiss.waittime);
1388 case PARAM_MAXDEFER: return CAST(scc->kiss.maxdefer);
1389 case PARAM_TX: return CAST(scc->kiss.tx_inhibit);
1390 default: return NO_SUCH_PARAM;
1391 }
1392
1393 }
1394
1395 #undef CAST
1396
1397 /* ******************************************************************* */
1398 /* * Send calibration pattern * */
1399 /* ******************************************************************* */
1400
1401 static void scc_stop_calibrate(unsigned long channel)
1402 {
1403 struct scc_channel *scc = (struct scc_channel *) channel;
1404 unsigned long flags;
1405
1406 spin_lock_irqsave(&scc->lock, flags);
1407 del_timer(&scc->tx_wdog);
1408 scc_key_trx(scc, TX_OFF);
1409 wr(scc, R6, 0);
1410 wr(scc, R7, FLAG);
1411 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1412 Outb(scc->ctrl,RES_EXT_INT);
1413
1414 netif_wake_queue(scc->dev);
1415 spin_unlock_irqrestore(&scc->lock, flags);
1416 }
1417
1418
1419 static void
1420 scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern)
1421 {
1422 unsigned long flags;
1423
1424 spin_lock_irqsave(&scc->lock, flags);
1425 netif_stop_queue(scc->dev);
1426 scc_discard_buffers(scc);
1427
1428 del_timer(&scc->tx_wdog);
1429
1430 scc->tx_wdog.data = (unsigned long) scc;
1431 scc->tx_wdog.function = scc_stop_calibrate;
1432 scc->tx_wdog.expires = jiffies + HZ*duration;
1433 add_timer(&scc->tx_wdog);
1434
1435 /* This doesn't seem to work. Why not? */
1436 wr(scc, R6, 0);
1437 wr(scc, R7, pattern);
1438
1439 /*
1440 * Don't know if this works.
1441 * Damn, where is my Z8530 programming manual...?
1442 */
1443
1444 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1445 Outb(scc->ctrl,RES_EXT_INT);
1446
1447 scc_key_trx(scc, TX_ON);
1448 spin_unlock_irqrestore(&scc->lock, flags);
1449 }
1450
1451 /* ******************************************************************* */
1452 /* * Init channel structures, special HW, etc... * */
1453 /* ******************************************************************* */
1454
1455 /*
1456 * Reset the Z8530s and setup special hardware
1457 */
1458
1459 static void z8530_init(void)
1460 {
1461 struct scc_channel *scc;
1462 int chip, k;
1463 unsigned long flags;
1464 char *flag;
1465
1466
1467 printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2);
1468
1469 flag=" ";
1470 for (k = 0; k < nr_irqs; k++)
1471 if (Ivec[k].used)
1472 {
1473 printk("%s%d", flag, k);
1474 flag=",";
1475 }
1476 printk("\n");
1477
1478
1479 /* reset and pre-init all chips in the system */
1480 for (chip = 0; chip < Nchips; chip++)
1481 {
1482 scc=&SCC_Info[2*chip];
1483 if (!scc->ctrl) continue;
1484
1485 /* Special SCC cards */
1486
1487 if(scc->brand & EAGLE) /* this is an EAGLE card */
1488 Outb(scc->special,0x08); /* enable interrupt on the board */
1489
1490 if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */
1491 Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */
1492
1493
1494 /* Reset and pre-init Z8530 */
1495
1496 spin_lock_irqsave(&scc->lock, flags);
1497
1498 Outb(scc->ctrl, 0);
1499 OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */
1500 udelay(100); /* give it 'a bit' more time than required */
1501 wr(scc, R2, chip*16); /* interrupt vector */
1502 wr(scc, R9, VIS); /* vector includes status */
1503 spin_unlock_irqrestore(&scc->lock, flags);
1504 }
1505
1506
1507 Driver_Initialized = 1;
1508 }
1509
1510 /*
1511 * Allocate device structure, err, instance, and register driver
1512 */
1513
1514 static int scc_net_alloc(const char *name, struct scc_channel *scc)
1515 {
1516 int err;
1517 struct net_device *dev;
1518
1519 dev = alloc_netdev(0, name, scc_net_setup);
1520 if (!dev)
1521 return -ENOMEM;
1522
1523 dev->ml_priv = scc;
1524 scc->dev = dev;
1525 spin_lock_init(&scc->lock);
1526 init_timer(&scc->tx_t);
1527 init_timer(&scc->tx_wdog);
1528
1529 err = register_netdevice(dev);
1530 if (err) {
1531 printk(KERN_ERR "%s: can't register network device (%d)\n",
1532 name, err);
1533 free_netdev(dev);
1534 scc->dev = NULL;
1535 return err;
1536 }
1537
1538 return 0;
1539 }
1540
1541
1542
1543 /* ******************************************************************** */
1544 /* * Network driver methods * */
1545 /* ******************************************************************** */
1546
1547 static const struct net_device_ops scc_netdev_ops = {
1548 .ndo_open = scc_net_open,
1549 .ndo_stop = scc_net_close,
1550 .ndo_start_xmit = scc_net_tx,
1551 .ndo_set_mac_address = scc_net_set_mac_address,
1552 .ndo_get_stats = scc_net_get_stats,
1553 .ndo_do_ioctl = scc_net_ioctl,
1554 };
1555
1556 /* ----> Initialize device <----- */
1557
1558 static void scc_net_setup(struct net_device *dev)
1559 {
1560 dev->tx_queue_len = 16; /* should be enough... */
1561
1562 dev->netdev_ops = &scc_netdev_ops;
1563 dev->header_ops = &ax25_header_ops;
1564
1565 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1566 memcpy(dev->dev_addr, &ax25_defaddr, AX25_ADDR_LEN);
1567
1568 dev->flags = 0;
1569
1570 dev->type = ARPHRD_AX25;
1571 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1572 dev->mtu = AX25_DEF_PACLEN;
1573 dev->addr_len = AX25_ADDR_LEN;
1574
1575 }
1576
1577 /* ----> open network device <---- */
1578
1579 static int scc_net_open(struct net_device *dev)
1580 {
1581 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1582
1583 if (!scc->init)
1584 return -EINVAL;
1585
1586 scc->tx_buff = NULL;
1587 skb_queue_head_init(&scc->tx_queue);
1588
1589 init_channel(scc);
1590
1591 netif_start_queue(dev);
1592 return 0;
1593 }
1594
1595 /* ----> close network device <---- */
1596
1597 static int scc_net_close(struct net_device *dev)
1598 {
1599 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1600 unsigned long flags;
1601
1602 netif_stop_queue(dev);
1603
1604 spin_lock_irqsave(&scc->lock, flags);
1605 Outb(scc->ctrl,0); /* Make sure pointer is written */
1606 wr(scc,R1,0); /* disable interrupts */
1607 wr(scc,R3,0);
1608 spin_unlock_irqrestore(&scc->lock, flags);
1609
1610 del_timer_sync(&scc->tx_t);
1611 del_timer_sync(&scc->tx_wdog);
1612
1613 scc_discard_buffers(scc);
1614
1615 return 0;
1616 }
1617
1618 /* ----> receive frame, called from scc_rxint() <---- */
1619
1620 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb)
1621 {
1622 if (skb->len == 0) {
1623 dev_kfree_skb_irq(skb);
1624 return;
1625 }
1626
1627 scc->dev_stat.rx_packets++;
1628 scc->dev_stat.rx_bytes += skb->len;
1629
1630 skb->protocol = ax25_type_trans(skb, scc->dev);
1631
1632 netif_rx(skb);
1633 return;
1634 }
1635
1636 /* ----> transmit frame <---- */
1637
1638 static netdev_tx_t scc_net_tx(struct sk_buff *skb, struct net_device *dev)
1639 {
1640 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1641 unsigned long flags;
1642 char kisscmd;
1643
1644 if (skb->len > scc->stat.bufsize || skb->len < 2) {
1645 scc->dev_stat.tx_dropped++; /* bogus frame */
1646 dev_kfree_skb(skb);
1647 return NETDEV_TX_OK;
1648 }
1649
1650 scc->dev_stat.tx_packets++;
1651 scc->dev_stat.tx_bytes += skb->len;
1652 scc->stat.txframes++;
1653
1654 kisscmd = *skb->data & 0x1f;
1655 skb_pull(skb, 1);
1656
1657 if (kisscmd) {
1658 scc_set_param(scc, kisscmd, *skb->data);
1659 dev_kfree_skb(skb);
1660 return NETDEV_TX_OK;
1661 }
1662
1663 spin_lock_irqsave(&scc->lock, flags);
1664
1665 if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len) {
1666 struct sk_buff *skb_del;
1667 skb_del = skb_dequeue(&scc->tx_queue);
1668 dev_kfree_skb(skb_del);
1669 }
1670 skb_queue_tail(&scc->tx_queue, skb);
1671 dev->trans_start = jiffies;
1672
1673
1674 /*
1675 * Start transmission if the trx state is idle or
1676 * t_idle hasn't expired yet. Use dwait/persistence/slottime
1677 * algorithm for normal halfduplex operation.
1678 */
1679
1680 if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2) {
1681 scc->stat.tx_state = TXS_BUSY;
1682 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1683 __scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime);
1684 else
1685 __scc_start_tx_timer(scc, t_dwait, 0);
1686 }
1687 spin_unlock_irqrestore(&scc->lock, flags);
1688 return NETDEV_TX_OK;
1689 }
1690
1691 /* ----> ioctl functions <---- */
1692
1693 /*
1694 * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg
1695 * SIOCSCCINI - initialize driver arg: ---
1696 * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg
1697 * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg
1698 * SIOCSCCGKISS - get level 1 parameter arg: (struct scc_kiss_cmd *) arg
1699 * SIOCSCCSKISS - set level 1 parameter arg: (struct scc_kiss_cmd *) arg
1700 * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg
1701 * SIOCSCCCAL - send calib. pattern arg: (struct scc_calibrate *) arg
1702 */
1703
1704 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1705 {
1706 struct scc_kiss_cmd kiss_cmd;
1707 struct scc_mem_config memcfg;
1708 struct scc_hw_config hwcfg;
1709 struct scc_calibrate cal;
1710 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1711 int chan;
1712 unsigned char device_name[IFNAMSIZ];
1713 void __user *arg = ifr->ifr_data;
1714
1715
1716 if (!Driver_Initialized)
1717 {
1718 if (cmd == SIOCSCCCFG)
1719 {
1720 int found = 1;
1721
1722 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1723 if (!arg) return -EFAULT;
1724
1725 if (Nchips >= SCC_MAXCHIPS)
1726 return -EINVAL;
1727
1728 if (copy_from_user(&hwcfg, arg, sizeof(hwcfg)))
1729 return -EFAULT;
1730
1731 if (hwcfg.irq == 2) hwcfg.irq = 9;
1732
1733 if (hwcfg.irq < 0 || hwcfg.irq >= nr_irqs)
1734 return -EINVAL;
1735
1736 if (!Ivec[hwcfg.irq].used && hwcfg.irq)
1737 {
1738 if (request_irq(hwcfg.irq, scc_isr,
1739 IRQF_DISABLED, "AX.25 SCC",
1740 (void *)(long) hwcfg.irq))
1741 printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq);
1742 else
1743 Ivec[hwcfg.irq].used = 1;
1744 }
1745
1746 if (hwcfg.vector_latch && !Vector_Latch) {
1747 if (!request_region(hwcfg.vector_latch, 1, "scc vector latch"))
1748 printk(KERN_WARNING "z8530drv: warning, cannot reserve vector latch port 0x%lx\n, disabled.", hwcfg.vector_latch);
1749 else
1750 Vector_Latch = hwcfg.vector_latch;
1751 }
1752
1753 if (hwcfg.clock == 0)
1754 hwcfg.clock = SCC_DEFAULT_CLOCK;
1755
1756 #ifndef SCC_DONT_CHECK
1757
1758 if(request_region(hwcfg.ctrl_a, 1, "scc-probe"))
1759 {
1760 disable_irq(hwcfg.irq);
1761 Outb(hwcfg.ctrl_a, 0);
1762 OutReg(hwcfg.ctrl_a, R9, FHWRES);
1763 udelay(100);
1764 OutReg(hwcfg.ctrl_a,R13,0x55); /* is this chip really there? */
1765 udelay(5);
1766
1767 if (InReg(hwcfg.ctrl_a,R13) != 0x55)
1768 found = 0;
1769 enable_irq(hwcfg.irq);
1770 release_region(hwcfg.ctrl_a, 1);
1771 }
1772 else
1773 found = 0;
1774 #endif
1775
1776 if (found)
1777 {
1778 SCC_Info[2*Nchips ].ctrl = hwcfg.ctrl_a;
1779 SCC_Info[2*Nchips ].data = hwcfg.data_a;
1780 SCC_Info[2*Nchips ].irq = hwcfg.irq;
1781 SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b;
1782 SCC_Info[2*Nchips+1].data = hwcfg.data_b;
1783 SCC_Info[2*Nchips+1].irq = hwcfg.irq;
1784
1785 SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a;
1786 SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b;
1787 SCC_ctrl[Nchips].irq = hwcfg.irq;
1788 }
1789
1790
1791 for (chan = 0; chan < 2; chan++)
1792 {
1793 sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan);
1794
1795 SCC_Info[2*Nchips+chan].special = hwcfg.special;
1796 SCC_Info[2*Nchips+chan].clock = hwcfg.clock;
1797 SCC_Info[2*Nchips+chan].brand = hwcfg.brand;
1798 SCC_Info[2*Nchips+chan].option = hwcfg.option;
1799 SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc;
1800
1801 #ifdef SCC_DONT_CHECK
1802 printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n",
1803 device_name,
1804 SCC_Info[2*Nchips+chan].data,
1805 SCC_Info[2*Nchips+chan].ctrl);
1806
1807 #else
1808 printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n",
1809 device_name,
1810 chan? hwcfg.data_b : hwcfg.data_a,
1811 chan? hwcfg.ctrl_b : hwcfg.ctrl_a,
1812 found? "found" : "missing");
1813 #endif
1814
1815 if (found)
1816 {
1817 request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl");
1818 request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data");
1819 if (Nchips+chan != 0 &&
1820 scc_net_alloc(device_name,
1821 &SCC_Info[2*Nchips+chan]))
1822 return -EINVAL;
1823 }
1824 }
1825
1826 if (found) Nchips++;
1827
1828 return 0;
1829 }
1830
1831 if (cmd == SIOCSCCINI)
1832 {
1833 if (!capable(CAP_SYS_RAWIO))
1834 return -EPERM;
1835
1836 if (Nchips == 0)
1837 return -EINVAL;
1838
1839 z8530_init();
1840 return 0;
1841 }
1842
1843 return -EINVAL; /* confuse the user */
1844 }
1845
1846 if (!scc->init)
1847 {
1848 if (cmd == SIOCSCCCHANINI)
1849 {
1850 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1851 if (!arg) return -EINVAL;
1852
1853 scc->stat.bufsize = SCC_BUFSIZE;
1854
1855 if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem)))
1856 return -EINVAL;
1857
1858 /* default KISS Params */
1859
1860 if (scc->modem.speed < 4800)
1861 {
1862 scc->kiss.txdelay = 36; /* 360 ms */
1863 scc->kiss.persist = 42; /* 25% persistence */ /* was 25 */
1864 scc->kiss.slottime = 16; /* 160 ms */
1865 scc->kiss.tailtime = 4; /* minimal reasonable value */
1866 scc->kiss.fulldup = 0; /* CSMA */
1867 scc->kiss.waittime = 50; /* 500 ms */
1868 scc->kiss.maxkeyup = 10; /* 10 s */
1869 scc->kiss.mintime = 3; /* 3 s */
1870 scc->kiss.idletime = 30; /* 30 s */
1871 scc->kiss.maxdefer = 120; /* 2 min */
1872 scc->kiss.softdcd = 0; /* hardware dcd */
1873 } else {
1874 scc->kiss.txdelay = 10; /* 100 ms */
1875 scc->kiss.persist = 64; /* 25% persistence */ /* was 25 */
1876 scc->kiss.slottime = 8; /* 160 ms */
1877 scc->kiss.tailtime = 1; /* minimal reasonable value */
1878 scc->kiss.fulldup = 0; /* CSMA */
1879 scc->kiss.waittime = 50; /* 500 ms */
1880 scc->kiss.maxkeyup = 7; /* 7 s */
1881 scc->kiss.mintime = 3; /* 3 s */
1882 scc->kiss.idletime = 30; /* 30 s */
1883 scc->kiss.maxdefer = 120; /* 2 min */
1884 scc->kiss.softdcd = 0; /* hardware dcd */
1885 }
1886
1887 scc->tx_buff = NULL;
1888 skb_queue_head_init(&scc->tx_queue);
1889 scc->init = 1;
1890
1891 return 0;
1892 }
1893
1894 return -EINVAL;
1895 }
1896
1897 switch(cmd)
1898 {
1899 case SIOCSCCRESERVED:
1900 return -ENOIOCTLCMD;
1901
1902 case SIOCSCCSMEM:
1903 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1904 if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg)))
1905 return -EINVAL;
1906 scc->stat.bufsize = memcfg.bufsize;
1907 return 0;
1908
1909 case SIOCSCCGSTAT:
1910 if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat)))
1911 return -EINVAL;
1912 return 0;
1913
1914 case SIOCSCCGKISS:
1915 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1916 return -EINVAL;
1917 kiss_cmd.param = scc_get_param(scc, kiss_cmd.command);
1918 if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd)))
1919 return -EINVAL;
1920 return 0;
1921
1922 case SIOCSCCSKISS:
1923 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1924 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1925 return -EINVAL;
1926 return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param);
1927
1928 case SIOCSCCCAL:
1929 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1930 if (!arg || copy_from_user(&cal, arg, sizeof(cal)) || cal.time == 0)
1931 return -EINVAL;
1932
1933 scc_start_calibrate(scc, cal.time, cal.pattern);
1934 return 0;
1935
1936 default:
1937 return -ENOIOCTLCMD;
1938
1939 }
1940
1941 return -EINVAL;
1942 }
1943
1944 /* ----> set interface callsign <---- */
1945
1946 static int scc_net_set_mac_address(struct net_device *dev, void *addr)
1947 {
1948 struct sockaddr *sa = (struct sockaddr *) addr;
1949 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
1950 return 0;
1951 }
1952
1953 /* ----> get statistics <---- */
1954
1955 static struct net_device_stats *scc_net_get_stats(struct net_device *dev)
1956 {
1957 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1958
1959 scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over;
1960 scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under;
1961 scc->dev_stat.rx_fifo_errors = scc->stat.rx_over;
1962 scc->dev_stat.tx_fifo_errors = scc->stat.tx_under;
1963
1964 return &scc->dev_stat;
1965 }
1966
1967 /* ******************************************************************** */
1968 /* * dump statistics to /proc/net/z8530drv * */
1969 /* ******************************************************************** */
1970
1971 #ifdef CONFIG_PROC_FS
1972
1973 static inline struct scc_channel *scc_net_seq_idx(loff_t pos)
1974 {
1975 int k;
1976
1977 for (k = 0; k < Nchips*2; ++k) {
1978 if (!SCC_Info[k].init)
1979 continue;
1980 if (pos-- == 0)
1981 return &SCC_Info[k];
1982 }
1983 return NULL;
1984 }
1985
1986 static void *scc_net_seq_start(struct seq_file *seq, loff_t *pos)
1987 {
1988 return *pos ? scc_net_seq_idx(*pos - 1) : SEQ_START_TOKEN;
1989
1990 }
1991
1992 static void *scc_net_seq_next(struct seq_file *seq, void *v, loff_t *pos)
1993 {
1994 unsigned k;
1995 struct scc_channel *scc = v;
1996 ++*pos;
1997
1998 for (k = (v == SEQ_START_TOKEN) ? 0 : (scc - SCC_Info)+1;
1999 k < Nchips*2; ++k) {
2000 if (SCC_Info[k].init)
2001 return &SCC_Info[k];
2002 }
2003 return NULL;
2004 }
2005
2006 static void scc_net_seq_stop(struct seq_file *seq, void *v)
2007 {
2008 }
2009
2010 static int scc_net_seq_show(struct seq_file *seq, void *v)
2011 {
2012 if (v == SEQ_START_TOKEN) {
2013 seq_puts(seq, "z8530drv-"VERSION"\n");
2014 } else if (!Driver_Initialized) {
2015 seq_puts(seq, "not initialized\n");
2016 } else if (!Nchips) {
2017 seq_puts(seq, "chips missing\n");
2018 } else {
2019 const struct scc_channel *scc = v;
2020 const struct scc_stat *stat = &scc->stat;
2021 const struct scc_kiss *kiss = &scc->kiss;
2022
2023
2024 /* dev data ctrl irq clock brand enh vector special option
2025 * baud nrz clocksrc softdcd bufsize
2026 * rxints txints exints spints
2027 * rcvd rxerrs over / xmit txerrs under / nospace bufsize
2028 * txd pers slot tail ful wait min maxk idl defr txof grp
2029 * W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ##
2030 * R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ##
2031 */
2032
2033 seq_printf(seq, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n",
2034 scc->dev->name,
2035 scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,
2036 scc->enhanced, Vector_Latch, scc->special,
2037 scc->option);
2038 seq_printf(seq, "\t%lu %d %d %d %d\n",
2039 scc->modem.speed, scc->modem.nrz,
2040 scc->modem.clocksrc, kiss->softdcd,
2041 stat->bufsize);
2042 seq_printf(seq, "\t%lu %lu %lu %lu\n",
2043 stat->rxints, stat->txints, stat->exints, stat->spints);
2044 seq_printf(seq, "\t%lu %lu %d / %lu %lu %d / %d %d\n",
2045 stat->rxframes, stat->rxerrs, stat->rx_over,
2046 stat->txframes, stat->txerrs, stat->tx_under,
2047 stat->nospace, stat->tx_state);
2048
2049 #define K(x) kiss->x
2050 seq_printf(seq, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n",
2051 K(txdelay), K(persist), K(slottime), K(tailtime),
2052 K(fulldup), K(waittime), K(mintime), K(maxkeyup),
2053 K(idletime), K(maxdefer), K(tx_inhibit), K(group));
2054 #undef K
2055 #ifdef SCC_DEBUG
2056 {
2057 int reg;
2058
2059 seq_printf(seq, "\tW ");
2060 for (reg = 0; reg < 16; reg++)
2061 seq_printf(seq, "%2.2x ", scc->wreg[reg]);
2062 seq_printf(seq, "\n");
2063
2064 seq_printf(seq, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1));
2065 for (reg = 3; reg < 8; reg++)
2066 seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg));
2067 seq_printf(seq, "XX ");
2068 for (reg = 9; reg < 16; reg++)
2069 seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg));
2070 seq_printf(seq, "\n");
2071 }
2072 #endif
2073 seq_putc(seq, '\n');
2074 }
2075
2076 return 0;
2077 }
2078
2079 static const struct seq_operations scc_net_seq_ops = {
2080 .start = scc_net_seq_start,
2081 .next = scc_net_seq_next,
2082 .stop = scc_net_seq_stop,
2083 .show = scc_net_seq_show,
2084 };
2085
2086
2087 static int scc_net_seq_open(struct inode *inode, struct file *file)
2088 {
2089 return seq_open(file, &scc_net_seq_ops);
2090 }
2091
2092 static const struct file_operations scc_net_seq_fops = {
2093 .owner = THIS_MODULE,
2094 .open = scc_net_seq_open,
2095 .read = seq_read,
2096 .llseek = seq_lseek,
2097 .release = seq_release_private,
2098 };
2099
2100 #endif /* CONFIG_PROC_FS */
2101
2102
2103 /* ******************************************************************** */
2104 /* * Init SCC driver * */
2105 /* ******************************************************************** */
2106
2107 static int __init scc_init_driver (void)
2108 {
2109 char devname[IFNAMSIZ];
2110
2111 printk(banner);
2112
2113 sprintf(devname,"%s0", SCC_DriverName);
2114
2115 rtnl_lock();
2116 if (scc_net_alloc(devname, SCC_Info)) {
2117 rtnl_unlock();
2118 printk(KERN_ERR "z8530drv: cannot initialize module\n");
2119 return -EIO;
2120 }
2121 rtnl_unlock();
2122
2123 proc_net_fops_create(&init_net, "z8530drv", 0, &scc_net_seq_fops);
2124
2125 return 0;
2126 }
2127
2128 static void __exit scc_cleanup_driver(void)
2129 {
2130 io_port ctrl;
2131 int k;
2132 struct scc_channel *scc;
2133 struct net_device *dev;
2134
2135 if (Nchips == 0 && (dev = SCC_Info[0].dev))
2136 {
2137 unregister_netdev(dev);
2138 free_netdev(dev);
2139 }
2140
2141 /* Guard against chip prattle */
2142 local_irq_disable();
2143
2144 for (k = 0; k < Nchips; k++)
2145 if ( (ctrl = SCC_ctrl[k].chan_A) )
2146 {
2147 Outb(ctrl, 0);
2148 OutReg(ctrl,R9,FHWRES); /* force hardware reset */
2149 udelay(50);
2150 }
2151
2152 /* To unload the port must be closed so no real IRQ pending */
2153 for (k = 0; k < nr_irqs ; k++)
2154 if (Ivec[k].used) free_irq(k, NULL);
2155
2156 local_irq_enable();
2157
2158 /* Now clean up */
2159 for (k = 0; k < Nchips*2; k++)
2160 {
2161 scc = &SCC_Info[k];
2162 if (scc->ctrl)
2163 {
2164 release_region(scc->ctrl, 1);
2165 release_region(scc->data, 1);
2166 }
2167 if (scc->dev)
2168 {
2169 unregister_netdev(scc->dev);
2170 free_netdev(scc->dev);
2171 }
2172 }
2173
2174
2175 if (Vector_Latch)
2176 release_region(Vector_Latch, 1);
2177
2178 proc_net_remove(&init_net, "z8530drv");
2179 }
2180
2181 MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>");
2182 MODULE_DESCRIPTION("AX.25 Device Driver for Z8530 based HDLC cards");
2183 MODULE_SUPPORTED_DEVICE("Z8530 based SCC cards for Amateur Radio");
2184 MODULE_LICENSE("GPL");
2185 module_init(scc_init_driver);
2186 module_exit(scc_cleanup_driver);
kernel source for telekom puls (alcatel/mediatek)