1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35 #include <linux/crc32.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
64 #define SMSC_CHIPNAME "smsc911x"
65 #define SMSC_MDIONAME "smsc911x-mdio"
66 #define SMSC_DRV_VERSION "2008-10-21"
68 MODULE_LICENSE("GPL");
69 MODULE_VERSION(SMSC_DRV_VERSION
);
70 MODULE_ALIAS("platform:smsc911x");
73 static int debug
= 16;
78 module_param(debug
, int, 0);
79 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
84 u32 (*reg_read
)(struct smsc911x_data
*pdata
, u32 reg
);
85 void (*reg_write
)(struct smsc911x_data
*pdata
, u32 reg
, u32 val
);
86 void (*rx_readfifo
)(struct smsc911x_data
*pdata
,
87 unsigned int *buf
, unsigned int wordcount
);
88 void (*tx_writefifo
)(struct smsc911x_data
*pdata
,
89 unsigned int *buf
, unsigned int wordcount
);
92 #define SMSC911X_NUM_SUPPLIES 2
94 struct smsc911x_data
{
99 /* used to decide which workarounds apply */
100 unsigned int generation
;
102 /* device configuration (copied from platform_data during probe) */
103 struct smsc911x_platform_config config
;
105 /* This needs to be acquired before calling any of below:
106 * smsc911x_mac_read(), smsc911x_mac_write()
110 /* spinlock to ensure register accesses are serialised */
113 struct phy_device
*phy_dev
;
114 struct mii_bus
*mii_bus
;
115 int phy_irq
[PHY_MAX_ADDR
];
116 unsigned int using_extphy
;
121 unsigned int gpio_setting
;
122 unsigned int gpio_orig_setting
;
123 struct net_device
*dev
;
124 struct napi_struct napi
;
126 unsigned int software_irq_signal
;
128 #ifdef USE_PHY_WORK_AROUND
129 #define MIN_PACKET_SIZE (64)
130 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
131 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
132 unsigned int resetcount
;
135 /* Members for Multicast filter workaround */
136 unsigned int multicast_update_pending
;
137 unsigned int set_bits_mask
;
138 unsigned int clear_bits_mask
;
142 /* register access functions */
143 const struct smsc911x_ops
*ops
;
146 struct regulator_bulk_data supplies
[SMSC911X_NUM_SUPPLIES
];
149 /* Easy access to information */
150 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
152 static inline u32
__smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
154 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
155 return readl(pdata
->ioaddr
+ reg
);
157 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
)
158 return ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
159 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
166 __smsc911x_reg_read_shift(struct smsc911x_data
*pdata
, u32 reg
)
168 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
169 return readl(pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
171 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
)
172 return (readw(pdata
->ioaddr
+
173 __smsc_shift(pdata
, reg
)) & 0xFFFF) |
174 ((readw(pdata
->ioaddr
+
175 __smsc_shift(pdata
, reg
+ 2)) & 0xFFFF) << 16);
181 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
186 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
187 data
= pdata
->ops
->reg_read(pdata
, reg
);
188 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
193 static inline void __smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
196 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
197 writel(val
, pdata
->ioaddr
+ reg
);
201 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
202 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
203 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
211 __smsc911x_reg_write_shift(struct smsc911x_data
*pdata
, u32 reg
, u32 val
)
213 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
214 writel(val
, pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
218 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
220 pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
221 writew((val
>> 16) & 0xFFFF,
222 pdata
->ioaddr
+ __smsc_shift(pdata
, reg
+ 2));
229 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
234 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
235 pdata
->ops
->reg_write(pdata
, reg
, val
);
236 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
239 /* Writes a packet to the TX_DATA_FIFO */
241 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
242 unsigned int wordcount
)
246 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
248 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
250 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
,
255 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
256 writesl(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
260 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
262 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
268 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
271 /* Writes a packet to the TX_DATA_FIFO - shifted version */
273 smsc911x_tx_writefifo_shift(struct smsc911x_data
*pdata
, unsigned int *buf
,
274 unsigned int wordcount
)
278 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
280 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
282 __smsc911x_reg_write_shift(pdata
, TX_DATA_FIFO
,
287 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
288 writesl(pdata
->ioaddr
+ __smsc_shift(pdata
,
289 TX_DATA_FIFO
), buf
, wordcount
);
293 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
295 __smsc911x_reg_write_shift(pdata
,
296 TX_DATA_FIFO
, *buf
++);
302 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
305 /* Reads a packet out of the RX_DATA_FIFO */
307 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
308 unsigned int wordcount
)
312 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
314 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
316 *buf
++ = swab32(__smsc911x_reg_read(pdata
,
321 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
322 readsl(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
326 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
328 *buf
++ = __smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
334 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
337 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
339 smsc911x_rx_readfifo_shift(struct smsc911x_data
*pdata
, unsigned int *buf
,
340 unsigned int wordcount
)
344 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
346 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
348 *buf
++ = swab32(__smsc911x_reg_read_shift(pdata
,
353 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
354 readsl(pdata
->ioaddr
+ __smsc_shift(pdata
,
355 RX_DATA_FIFO
), buf
, wordcount
);
359 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
361 *buf
++ = __smsc911x_reg_read_shift(pdata
,
368 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
372 * enable resources, currently just regulators.
374 static int smsc911x_enable_resources(struct platform_device
*pdev
)
376 struct net_device
*ndev
= platform_get_drvdata(pdev
);
377 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
380 ret
= regulator_bulk_enable(ARRAY_SIZE(pdata
->supplies
),
383 netdev_err(ndev
, "failed to enable regulators %d\n",
389 * disable resources, currently just regulators.
391 static int smsc911x_disable_resources(struct platform_device
*pdev
)
393 struct net_device
*ndev
= platform_get_drvdata(pdev
);
394 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
397 ret
= regulator_bulk_disable(ARRAY_SIZE(pdata
->supplies
),
403 * Request resources, currently just regulators.
405 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
406 * these are not always-on we need to request regulators to be turned on
407 * before we can try to access the device registers.
409 static int smsc911x_request_resources(struct platform_device
*pdev
)
411 struct net_device
*ndev
= platform_get_drvdata(pdev
);
412 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
415 /* Request regulators */
416 pdata
->supplies
[0].supply
= "vdd33a";
417 pdata
->supplies
[1].supply
= "vddvario";
418 ret
= regulator_bulk_get(&pdev
->dev
,
419 ARRAY_SIZE(pdata
->supplies
),
422 netdev_err(ndev
, "couldn't get regulators %d\n",
428 * Free resources, currently just regulators.
431 static void smsc911x_free_resources(struct platform_device
*pdev
)
433 struct net_device
*ndev
= platform_get_drvdata(pdev
);
434 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
436 /* Free regulators */
437 regulator_bulk_free(ARRAY_SIZE(pdata
->supplies
),
441 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
442 * and smsc911x_mac_write, so assumes mac_lock is held */
443 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
448 SMSC_ASSERT_MAC_LOCK(pdata
);
450 for (i
= 0; i
< 40; i
++) {
451 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
452 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
455 SMSC_WARN(pdata
, hw
, "Timed out waiting for MAC not BUSY. "
456 "MAC_CSR_CMD: 0x%08X", val
);
460 /* Fetches a MAC register value. Assumes mac_lock is acquired */
461 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
465 SMSC_ASSERT_MAC_LOCK(pdata
);
467 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
468 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
469 SMSC_WARN(pdata
, hw
, "MAC busy at entry");
473 /* Send the MAC cmd */
474 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
475 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
477 /* Workaround for hardware read-after-write restriction */
478 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
480 /* Wait for the read to complete */
481 if (likely(smsc911x_mac_complete(pdata
) == 0))
482 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
484 SMSC_WARN(pdata
, hw
, "MAC busy after read");
488 /* Set a mac register, mac_lock must be acquired before calling */
489 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
490 unsigned int offset
, u32 val
)
494 SMSC_ASSERT_MAC_LOCK(pdata
);
496 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
497 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
499 "smsc911x_mac_write failed, MAC busy at entry");
503 /* Send data to write */
504 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
506 /* Write the actual data */
507 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
508 MAC_CSR_CMD_CSR_BUSY_
));
510 /* Workaround for hardware read-after-write restriction */
511 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
513 /* Wait for the write to complete */
514 if (likely(smsc911x_mac_complete(pdata
) == 0))
517 SMSC_WARN(pdata
, hw
, "smsc911x_mac_write failed, MAC busy after write");
520 /* Get a phy register */
521 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
523 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
528 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
530 /* Confirm MII not busy */
531 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
532 SMSC_WARN(pdata
, hw
, "MII is busy in smsc911x_mii_read???");
537 /* Set the address, index & direction (read from PHY) */
538 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
539 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
541 /* Wait for read to complete w/ timeout */
542 for (i
= 0; i
< 100; i
++)
543 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
544 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
548 SMSC_WARN(pdata
, hw
, "Timed out waiting for MII read to finish");
552 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
556 /* Set a phy register */
557 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
560 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
565 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
567 /* Confirm MII not busy */
568 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
569 SMSC_WARN(pdata
, hw
, "MII is busy in smsc911x_mii_write???");
574 /* Put the data to write in the MAC */
575 smsc911x_mac_write(pdata
, MII_DATA
, val
);
577 /* Set the address, index & direction (write to PHY) */
578 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
580 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
582 /* Wait for write to complete w/ timeout */
583 for (i
= 0; i
< 100; i
++)
584 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
589 SMSC_WARN(pdata
, hw
, "Timed out waiting for MII write to finish");
593 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
597 /* Switch to external phy. Assumes tx and rx are stopped. */
598 static void smsc911x_phy_enable_external(struct smsc911x_data
*pdata
)
600 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
602 /* Disable phy clocks to the MAC */
603 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
604 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
605 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
606 udelay(10); /* Enough time for clocks to stop */
608 /* Switch to external phy */
609 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
610 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
612 /* Enable phy clocks to the MAC */
613 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
614 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
615 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
616 udelay(10); /* Enough time for clocks to restart */
618 hwcfg
|= HW_CFG_SMI_SEL_
;
619 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
622 /* Autodetects and enables external phy if present on supported chips.
623 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
624 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
625 static void smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
627 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
629 if (pdata
->config
.flags
& SMSC911X_FORCE_INTERNAL_PHY
) {
630 SMSC_TRACE(pdata
, hw
, "Forcing internal PHY");
631 pdata
->using_extphy
= 0;
632 } else if (pdata
->config
.flags
& SMSC911X_FORCE_EXTERNAL_PHY
) {
633 SMSC_TRACE(pdata
, hw
, "Forcing external PHY");
634 smsc911x_phy_enable_external(pdata
);
635 pdata
->using_extphy
= 1;
636 } else if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
637 SMSC_TRACE(pdata
, hw
,
638 "HW_CFG EXT_PHY_DET set, using external PHY");
639 smsc911x_phy_enable_external(pdata
);
640 pdata
->using_extphy
= 1;
642 SMSC_TRACE(pdata
, hw
,
643 "HW_CFG EXT_PHY_DET clear, using internal PHY");
644 pdata
->using_extphy
= 0;
648 /* Fetches a tx status out of the status fifo */
649 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
651 unsigned int result
=
652 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
655 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
660 /* Fetches the next rx status */
661 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
663 unsigned int result
=
664 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
667 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
672 #ifdef USE_PHY_WORK_AROUND
673 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
680 for (tries
= 0; tries
< 10; tries
++) {
681 unsigned int txcmd_a
;
682 unsigned int txcmd_b
;
684 unsigned int pktlength
;
687 /* Zero-out rx packet memory */
688 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
690 /* Write tx packet to 118 */
691 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
692 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
693 txcmd_a
|= MIN_PACKET_SIZE
;
695 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
697 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
698 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
700 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
701 wrsz
= MIN_PACKET_SIZE
+ 3;
702 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
705 pdata
->ops
->tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
707 /* Wait till transmit is done */
711 status
= smsc911x_tx_get_txstatus(pdata
);
712 } while ((i
--) && (!status
));
716 "Failed to transmit during loopback test");
719 if (status
& TX_STS_ES_
) {
721 "Transmit encountered errors during loopback test");
725 /* Wait till receive is done */
729 status
= smsc911x_rx_get_rxstatus(pdata
);
730 } while ((i
--) && (!status
));
734 "Failed to receive during loopback test");
737 if (status
& RX_STS_ES_
) {
739 "Receive encountered errors during loopback test");
743 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
744 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
745 rdsz
= pktlength
+ 3;
746 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
749 pdata
->ops
->rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
751 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
752 SMSC_WARN(pdata
, hw
, "Unexpected packet size "
753 "during loop back test, size=%d, will retry",
758 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
759 if (pdata
->loopback_tx_pkt
[j
]
760 != pdata
->loopback_rx_pkt
[j
]) {
766 SMSC_TRACE(pdata
, hw
, "Successfully verified "
770 SMSC_WARN(pdata
, hw
, "Data mismatch "
771 "during loop back test, will retry");
779 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
781 struct phy_device
*phy_dev
= pdata
->phy_dev
;
783 unsigned int i
= 100000;
786 BUG_ON(!phy_dev
->bus
);
788 SMSC_TRACE(pdata
, hw
, "Performing PHY BCR Reset");
789 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, BMCR_RESET
);
792 temp
= smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
,
794 } while ((i
--) && (temp
& BMCR_RESET
));
796 if (temp
& BMCR_RESET
) {
797 SMSC_WARN(pdata
, hw
, "PHY reset failed to complete");
800 /* Extra delay required because the phy may not be completed with
801 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
802 * enough delay but using 1ms here to be safe */
808 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
810 struct smsc911x_data
*pdata
= netdev_priv(dev
);
811 struct phy_device
*phy_dev
= pdata
->phy_dev
;
816 /* Initialise tx packet using broadcast destination address */
817 memset(pdata
->loopback_tx_pkt
, 0xff, ETH_ALEN
);
819 /* Use incrementing source address */
820 for (i
= 6; i
< 12; i
++)
821 pdata
->loopback_tx_pkt
[i
] = (char)i
;
823 /* Set length type field */
824 pdata
->loopback_tx_pkt
[12] = 0x00;
825 pdata
->loopback_tx_pkt
[13] = 0x00;
827 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
828 pdata
->loopback_tx_pkt
[i
] = (char)i
;
830 val
= smsc911x_reg_read(pdata
, HW_CFG
);
831 val
&= HW_CFG_TX_FIF_SZ_
;
833 smsc911x_reg_write(pdata
, HW_CFG
, val
);
835 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
836 smsc911x_reg_write(pdata
, RX_CFG
,
837 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
839 for (i
= 0; i
< 10; i
++) {
840 /* Set PHY to 10/FD, no ANEG, and loopback mode */
841 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
,
842 BMCR_LOOPBACK
| BMCR_FULLDPLX
);
844 /* Enable MAC tx/rx, FD */
845 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
846 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
847 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
848 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
850 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
857 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
858 smsc911x_mac_write(pdata
, MAC_CR
, 0);
859 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
861 smsc911x_phy_reset(pdata
);
865 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
866 smsc911x_mac_write(pdata
, MAC_CR
, 0);
867 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
869 /* Cancel PHY loopback mode */
870 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, 0);
872 smsc911x_reg_write(pdata
, TX_CFG
, 0);
873 smsc911x_reg_write(pdata
, RX_CFG
, 0);
877 #endif /* USE_PHY_WORK_AROUND */
879 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
881 struct phy_device
*phy_dev
= pdata
->phy_dev
;
882 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
886 if (phy_dev
->duplex
== DUPLEX_FULL
) {
887 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
888 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
889 u8 cap
= mii_resolve_flowctrl_fdx(lcladv
, rmtadv
);
891 if (cap
& FLOW_CTRL_RX
)
896 if (cap
& FLOW_CTRL_TX
)
901 SMSC_TRACE(pdata
, hw
, "rx pause %s, tx pause %s",
902 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
903 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
905 SMSC_TRACE(pdata
, hw
, "half duplex");
910 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
911 smsc911x_mac_write(pdata
, FLOW
, flow
);
912 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
914 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
917 /* Update link mode if anything has changed. Called periodically when the
918 * PHY is in polling mode, even if nothing has changed. */
919 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
921 struct smsc911x_data
*pdata
= netdev_priv(dev
);
922 struct phy_device
*phy_dev
= pdata
->phy_dev
;
926 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
928 SMSC_TRACE(pdata
, hw
, "duplex state has changed");
930 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
931 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
932 if (phy_dev
->duplex
) {
933 SMSC_TRACE(pdata
, hw
,
934 "configuring for full duplex mode");
935 mac_cr
|= MAC_CR_FDPX_
;
937 SMSC_TRACE(pdata
, hw
,
938 "configuring for half duplex mode");
939 mac_cr
&= ~MAC_CR_FDPX_
;
941 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
942 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
944 smsc911x_phy_update_flowcontrol(pdata
);
945 pdata
->last_duplex
= phy_dev
->duplex
;
948 carrier
= netif_carrier_ok(dev
);
949 if (carrier
!= pdata
->last_carrier
) {
950 SMSC_TRACE(pdata
, hw
, "carrier state has changed");
952 SMSC_TRACE(pdata
, hw
, "configuring for carrier OK");
953 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
954 (!pdata
->using_extphy
)) {
955 /* Restore original GPIO configuration */
956 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
957 smsc911x_reg_write(pdata
, GPIO_CFG
,
958 pdata
->gpio_setting
);
961 SMSC_TRACE(pdata
, hw
, "configuring for no carrier");
962 /* Check global setting that LED1
963 * usage is 10/100 indicator */
964 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
966 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
) &&
967 (!pdata
->using_extphy
)) {
968 /* Force 10/100 LED off, after saving
969 * original GPIO configuration */
970 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
972 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
973 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
976 smsc911x_reg_write(pdata
, GPIO_CFG
,
977 pdata
->gpio_setting
);
980 pdata
->last_carrier
= carrier
;
984 static int smsc911x_mii_probe(struct net_device
*dev
)
986 struct smsc911x_data
*pdata
= netdev_priv(dev
);
987 struct phy_device
*phydev
= NULL
;
990 /* find the first phy */
991 phydev
= phy_find_first(pdata
->mii_bus
);
993 netdev_err(dev
, "no PHY found\n");
997 SMSC_TRACE(pdata
, probe
, "PHY: addr %d, phy_id 0x%08X",
998 phydev
->addr
, phydev
->phy_id
);
1000 ret
= phy_connect_direct(dev
, phydev
,
1001 &smsc911x_phy_adjust_link
, 0,
1002 pdata
->config
.phy_interface
);
1005 netdev_err(dev
, "Could not attach to PHY\n");
1010 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1011 phydev
->drv
->name
, dev_name(&phydev
->dev
), phydev
->irq
);
1013 /* mask with MAC supported features */
1014 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
1015 SUPPORTED_Asym_Pause
);
1016 phydev
->advertising
= phydev
->supported
;
1018 pdata
->phy_dev
= phydev
;
1019 pdata
->last_duplex
= -1;
1020 pdata
->last_carrier
= -1;
1022 #ifdef USE_PHY_WORK_AROUND
1023 if (smsc911x_phy_loopbacktest(dev
) < 0) {
1024 SMSC_WARN(pdata
, hw
, "Failed Loop Back Test");
1027 SMSC_TRACE(pdata
, hw
, "Passed Loop Back Test");
1028 #endif /* USE_PHY_WORK_AROUND */
1030 SMSC_TRACE(pdata
, hw
, "phy initialised successfully");
1034 static int __devinit
smsc911x_mii_init(struct platform_device
*pdev
,
1035 struct net_device
*dev
)
1037 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1038 int err
= -ENXIO
, i
;
1040 pdata
->mii_bus
= mdiobus_alloc();
1041 if (!pdata
->mii_bus
) {
1046 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
1047 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s-%x",
1048 pdev
->name
, pdev
->id
);
1049 pdata
->mii_bus
->priv
= pdata
;
1050 pdata
->mii_bus
->read
= smsc911x_mii_read
;
1051 pdata
->mii_bus
->write
= smsc911x_mii_write
;
1052 pdata
->mii_bus
->irq
= pdata
->phy_irq
;
1053 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
1054 pdata
->mii_bus
->irq
[i
] = PHY_POLL
;
1056 pdata
->mii_bus
->parent
= &pdev
->dev
;
1058 switch (pdata
->idrev
& 0xFFFF0000) {
1063 /* External PHY supported, try to autodetect */
1064 smsc911x_phy_initialise_external(pdata
);
1067 SMSC_TRACE(pdata
, hw
, "External PHY is not supported, "
1068 "using internal PHY");
1069 pdata
->using_extphy
= 0;
1073 if (!pdata
->using_extphy
) {
1074 /* Mask all PHYs except ID 1 (internal) */
1075 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
1078 if (mdiobus_register(pdata
->mii_bus
)) {
1079 SMSC_WARN(pdata
, probe
, "Error registering mii bus");
1080 goto err_out_free_bus_2
;
1083 if (smsc911x_mii_probe(dev
) < 0) {
1084 SMSC_WARN(pdata
, probe
, "Error registering mii bus");
1085 goto err_out_unregister_bus_3
;
1090 err_out_unregister_bus_3
:
1091 mdiobus_unregister(pdata
->mii_bus
);
1093 mdiobus_free(pdata
->mii_bus
);
1098 /* Gets the number of tx statuses in the fifo */
1099 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
1101 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
1102 & TX_FIFO_INF_TSUSED_
) >> 16;
1105 /* Reads tx statuses and increments counters where necessary */
1106 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
1108 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1109 unsigned int tx_stat
;
1111 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
1112 if (unlikely(tx_stat
& 0x80000000)) {
1113 /* In this driver the packet tag is used as the packet
1114 * length. Since a packet length can never reach the
1115 * size of 0x8000, this bit is reserved. It is worth
1116 * noting that the "reserved bit" in the warning above
1117 * does not reference a hardware defined reserved bit
1118 * but rather a driver defined one.
1120 SMSC_WARN(pdata
, hw
, "Packet tag reserved bit is high");
1122 if (unlikely(tx_stat
& TX_STS_ES_
)) {
1123 dev
->stats
.tx_errors
++;
1125 dev
->stats
.tx_packets
++;
1126 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
1128 if (unlikely(tx_stat
& TX_STS_EXCESS_COL_
)) {
1129 dev
->stats
.collisions
+= 16;
1130 dev
->stats
.tx_aborted_errors
+= 1;
1132 dev
->stats
.collisions
+=
1133 ((tx_stat
>> 3) & 0xF);
1135 if (unlikely(tx_stat
& TX_STS_LOST_CARRIER_
))
1136 dev
->stats
.tx_carrier_errors
+= 1;
1137 if (unlikely(tx_stat
& TX_STS_LATE_COL_
)) {
1138 dev
->stats
.collisions
++;
1139 dev
->stats
.tx_aborted_errors
++;
1145 /* Increments the Rx error counters */
1147 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
1151 if (unlikely(rxstat
& RX_STS_ES_
)) {
1152 dev
->stats
.rx_errors
++;
1153 if (unlikely(rxstat
& RX_STS_CRC_ERR_
)) {
1154 dev
->stats
.rx_crc_errors
++;
1158 if (likely(!crc_err
)) {
1159 if (unlikely((rxstat
& RX_STS_FRAME_TYPE_
) &&
1160 (rxstat
& RX_STS_LENGTH_ERR_
)))
1161 dev
->stats
.rx_length_errors
++;
1162 if (rxstat
& RX_STS_MCAST_
)
1163 dev
->stats
.multicast
++;
1167 /* Quickly dumps bad packets */
1169 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktbytes
)
1171 unsigned int pktwords
= (pktbytes
+ NET_IP_ALIGN
+ 3) >> 2;
1173 if (likely(pktwords
>= 4)) {
1174 unsigned int timeout
= 500;
1176 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
1179 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
1180 } while ((val
& RX_DP_CTRL_RX_FFWD_
) && --timeout
);
1182 if (unlikely(timeout
== 0))
1183 SMSC_WARN(pdata
, hw
, "Timed out waiting for "
1184 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
1188 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
1192 /* NAPI poll function */
1193 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
1195 struct smsc911x_data
*pdata
=
1196 container_of(napi
, struct smsc911x_data
, napi
);
1197 struct net_device
*dev
= pdata
->dev
;
1200 while (npackets
< budget
) {
1201 unsigned int pktlength
;
1202 unsigned int pktwords
;
1203 struct sk_buff
*skb
;
1204 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
1208 /* We processed all packets available. Tell NAPI it can
1209 * stop polling then re-enable rx interrupts */
1210 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
1211 napi_complete(napi
);
1212 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1213 temp
|= INT_EN_RSFL_EN_
;
1214 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1218 /* Count packet for NAPI scheduling, even if it has an error.
1219 * Error packets still require cycles to discard */
1222 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
1223 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1224 smsc911x_rx_counterrors(dev
, rxstat
);
1226 if (unlikely(rxstat
& RX_STS_ES_
)) {
1227 SMSC_WARN(pdata
, rx_err
,
1228 "Discarding packet with error bit set");
1229 /* Packet has an error, discard it and continue with
1231 smsc911x_rx_fastforward(pdata
, pktwords
);
1232 dev
->stats
.rx_dropped
++;
1236 skb
= netdev_alloc_skb(dev
, pktlength
+ NET_IP_ALIGN
);
1237 if (unlikely(!skb
)) {
1238 SMSC_WARN(pdata
, rx_err
,
1239 "Unable to allocate skb for rx packet");
1240 /* Drop the packet and stop this polling iteration */
1241 smsc911x_rx_fastforward(pdata
, pktwords
);
1242 dev
->stats
.rx_dropped
++;
1246 skb
->data
= skb
->head
;
1247 skb_reset_tail_pointer(skb
);
1249 /* Align IP on 16B boundary */
1250 skb_reserve(skb
, NET_IP_ALIGN
);
1251 skb_put(skb
, pktlength
- 4);
1252 pdata
->ops
->rx_readfifo(pdata
,
1253 (unsigned int *)skb
->head
, pktwords
);
1254 skb
->protocol
= eth_type_trans(skb
, dev
);
1255 skb_checksum_none_assert(skb
);
1256 netif_receive_skb(skb
);
1258 /* Update counters */
1259 dev
->stats
.rx_packets
++;
1260 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1263 /* Return total received packets */
1267 /* Returns hash bit number for given MAC address
1269 * 01 00 5E 00 00 01 -> returns bit number 31 */
1270 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1272 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1275 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1277 /* Performs the multicast & mac_cr update. This is called when
1278 * safe on the current hardware, and with the mac_lock held */
1279 unsigned int mac_cr
;
1281 SMSC_ASSERT_MAC_LOCK(pdata
);
1283 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1284 mac_cr
|= pdata
->set_bits_mask
;
1285 mac_cr
&= ~(pdata
->clear_bits_mask
);
1286 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1287 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1288 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1289 SMSC_TRACE(pdata
, hw
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1290 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1293 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1295 unsigned int mac_cr
;
1297 /* This function is only called for older LAN911x devices
1298 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1299 * be modified during Rx - newer devices immediately update the
1302 * This is called from interrupt context */
1304 spin_lock(&pdata
->mac_lock
);
1306 /* Check Rx has stopped */
1307 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1308 SMSC_WARN(pdata
, drv
, "Rx not stopped");
1310 /* Perform the update - safe to do now Rx has stopped */
1311 smsc911x_rx_multicast_update(pdata
);
1314 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1315 mac_cr
|= MAC_CR_RXEN_
;
1316 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1318 pdata
->multicast_update_pending
= 0;
1320 spin_unlock(&pdata
->mac_lock
);
1323 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data
*pdata
)
1327 if (!pdata
->phy_dev
)
1330 rc
= phy_read(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
);
1333 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1338 * If energy is detected the PHY is already awake so is not necessary
1339 * to disable the energy detect power-down mode.
1341 if ((rc
& MII_LAN83C185_EDPWRDOWN
) &&
1342 !(rc
& MII_LAN83C185_ENERGYON
)) {
1343 /* Disable energy detect mode for this SMSC Transceivers */
1344 rc
= phy_write(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
,
1345 rc
& (~MII_LAN83C185_EDPWRDOWN
));
1348 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1358 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data
*pdata
)
1362 if (!pdata
->phy_dev
)
1365 rc
= phy_read(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
);
1368 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1372 /* Only enable if energy detect mode is already disabled */
1373 if (!(rc
& MII_LAN83C185_EDPWRDOWN
)) {
1375 /* Enable energy detect mode for this SMSC Transceivers */
1376 rc
= phy_write(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
,
1377 rc
| MII_LAN83C185_EDPWRDOWN
);
1380 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1389 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1391 unsigned int timeout
;
1396 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1397 * are initialized in a Energy Detect Power-Down mode that prevents
1398 * the MAC chip to be software reseted. So we have to wakeup the PHY
1401 if (pdata
->generation
== 4) {
1402 ret
= smsc911x_phy_disable_energy_detect(pdata
);
1405 SMSC_WARN(pdata
, drv
, "Failed to wakeup the PHY chip");
1410 /* Reset the LAN911x */
1411 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1415 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1416 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1418 if (unlikely(temp
& HW_CFG_SRST_
)) {
1419 SMSC_WARN(pdata
, drv
, "Failed to complete reset");
1423 if (pdata
->generation
== 4) {
1424 ret
= smsc911x_phy_enable_energy_detect(pdata
);
1427 SMSC_WARN(pdata
, drv
, "Failed to wakeup the PHY chip");
1435 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1437 smsc911x_set_hw_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1439 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1440 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1441 (dev_addr
[1] << 8) | dev_addr
[0];
1443 SMSC_ASSERT_MAC_LOCK(pdata
);
1445 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1446 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1449 static int smsc911x_open(struct net_device
*dev
)
1451 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1452 unsigned int timeout
;
1454 unsigned int intcfg
;
1456 /* if the phy is not yet registered, retry later*/
1457 if (!pdata
->phy_dev
) {
1458 SMSC_WARN(pdata
, hw
, "phy_dev is NULL");
1462 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1463 SMSC_WARN(pdata
, hw
, "dev_addr is not a valid MAC address");
1464 return -EADDRNOTAVAIL
;
1467 /* Reset the LAN911x */
1468 if (smsc911x_soft_reset(pdata
)) {
1469 SMSC_WARN(pdata
, hw
, "soft reset failed");
1473 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1474 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1476 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1477 spin_lock_irq(&pdata
->mac_lock
);
1478 smsc911x_mac_write(pdata
, VLAN1
, ETH_P_8021Q
);
1479 spin_unlock_irq(&pdata
->mac_lock
);
1481 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1483 while ((smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) &&
1488 if (unlikely(timeout
== 0))
1489 SMSC_WARN(pdata
, ifup
,
1490 "Timed out waiting for EEPROM busy bit to clear");
1492 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1494 /* The soft reset above cleared the device's MAC address,
1495 * restore it from local copy (set in probe) */
1496 spin_lock_irq(&pdata
->mac_lock
);
1497 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1498 spin_unlock_irq(&pdata
->mac_lock
);
1500 /* Initialise irqs, but leave all sources disabled */
1501 smsc911x_reg_write(pdata
, INT_EN
, 0);
1502 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1504 /* Set interrupt deassertion to 100uS */
1505 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1507 if (pdata
->config
.irq_polarity
) {
1508 SMSC_TRACE(pdata
, ifup
, "irq polarity: active high");
1509 intcfg
|= INT_CFG_IRQ_POL_
;
1511 SMSC_TRACE(pdata
, ifup
, "irq polarity: active low");
1514 if (pdata
->config
.irq_type
) {
1515 SMSC_TRACE(pdata
, ifup
, "irq type: push-pull");
1516 intcfg
|= INT_CFG_IRQ_TYPE_
;
1518 SMSC_TRACE(pdata
, ifup
, "irq type: open drain");
1521 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1523 SMSC_TRACE(pdata
, ifup
, "Testing irq handler using IRQ %d", dev
->irq
);
1524 pdata
->software_irq_signal
= 0;
1527 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1528 temp
|= INT_EN_SW_INT_EN_
;
1529 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1533 if (pdata
->software_irq_signal
)
1538 if (!pdata
->software_irq_signal
) {
1539 netdev_warn(dev
, "ISR failed signaling test (IRQ %d)\n",
1543 SMSC_TRACE(pdata
, ifup
, "IRQ handler passed test using IRQ %d",
1546 netdev_info(dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1547 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1549 /* Reset the last known duplex and carrier */
1550 pdata
->last_duplex
= -1;
1551 pdata
->last_carrier
= -1;
1553 /* Bring the PHY up */
1554 phy_start(pdata
->phy_dev
);
1556 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1557 /* Preserve TX FIFO size and external PHY configuration */
1558 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1560 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1562 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1563 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1564 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1565 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1567 /* set RX Data offset to 2 bytes for alignment */
1568 smsc911x_reg_write(pdata
, RX_CFG
, (2 << 8));
1570 /* enable NAPI polling before enabling RX interrupts */
1571 napi_enable(&pdata
->napi
);
1573 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1574 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
| INT_EN_RXSTOP_INT_EN_
);
1575 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1577 spin_lock_irq(&pdata
->mac_lock
);
1578 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1579 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1580 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1581 spin_unlock_irq(&pdata
->mac_lock
);
1583 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1585 netif_start_queue(dev
);
1589 /* Entry point for stopping the interface */
1590 static int smsc911x_stop(struct net_device
*dev
)
1592 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1595 /* Disable all device interrupts */
1596 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1597 temp
&= ~INT_CFG_IRQ_EN_
;
1598 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1600 /* Stop Tx and Rx polling */
1601 netif_stop_queue(dev
);
1602 napi_disable(&pdata
->napi
);
1604 /* At this point all Rx and Tx activity is stopped */
1605 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1606 smsc911x_tx_update_txcounters(dev
);
1608 /* Bring the PHY down */
1610 phy_stop(pdata
->phy_dev
);
1612 SMSC_TRACE(pdata
, ifdown
, "Interface stopped");
1616 /* Entry point for transmitting a packet */
1617 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1619 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1620 unsigned int freespace
;
1621 unsigned int tx_cmd_a
;
1622 unsigned int tx_cmd_b
;
1627 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1629 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1630 SMSC_WARN(pdata
, tx_err
,
1631 "Tx data fifo low, space available: %d", freespace
);
1633 /* Word alignment adjustment */
1634 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1635 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1636 tx_cmd_a
|= (unsigned int)skb
->len
;
1638 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1639 tx_cmd_b
|= (unsigned int)skb
->len
;
1641 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1642 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1644 bufp
= (ulong
)skb
->data
& (~0x3);
1645 wrsz
= (u32
)skb
->len
+ 3;
1646 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1649 pdata
->ops
->tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1650 freespace
-= (skb
->len
+ 32);
1651 skb_tx_timestamp(skb
);
1654 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1655 smsc911x_tx_update_txcounters(dev
);
1657 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1658 netif_stop_queue(dev
);
1659 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1662 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1665 return NETDEV_TX_OK
;
1668 /* Entry point for getting status counters */
1669 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1671 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1672 smsc911x_tx_update_txcounters(dev
);
1673 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1677 /* Entry point for setting addressing modes */
1678 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1680 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1681 unsigned long flags
;
1683 if (dev
->flags
& IFF_PROMISC
) {
1684 /* Enabling promiscuous mode */
1685 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1686 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1689 } else if (dev
->flags
& IFF_ALLMULTI
) {
1690 /* Enabling all multicast mode */
1691 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1692 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1695 } else if (!netdev_mc_empty(dev
)) {
1696 /* Enabling specific multicast addresses */
1697 unsigned int hash_high
= 0;
1698 unsigned int hash_low
= 0;
1699 struct netdev_hw_addr
*ha
;
1701 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1702 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1704 netdev_for_each_mc_addr(ha
, dev
) {
1705 unsigned int bitnum
= smsc911x_hash(ha
->addr
);
1706 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1714 pdata
->hashhi
= hash_high
;
1715 pdata
->hashlo
= hash_low
;
1717 /* Enabling local MAC address only */
1718 pdata
->set_bits_mask
= 0;
1719 pdata
->clear_bits_mask
=
1720 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1725 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1727 if (pdata
->generation
<= 1) {
1728 /* Older hardware revision - cannot change these flags while
1730 if (!pdata
->multicast_update_pending
) {
1732 SMSC_TRACE(pdata
, hw
, "scheduling mcast update");
1733 pdata
->multicast_update_pending
= 1;
1735 /* Request the hardware to stop, then perform the
1736 * update when we get an RX_STOP interrupt */
1737 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1738 temp
&= ~(MAC_CR_RXEN_
);
1739 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1741 /* There is another update pending, this should now
1742 * use the newer values */
1745 /* Newer hardware revision - can write immediately */
1746 smsc911x_rx_multicast_update(pdata
);
1749 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1752 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1754 struct net_device
*dev
= dev_id
;
1755 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1756 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1757 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1758 int serviced
= IRQ_NONE
;
1761 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1762 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1763 temp
&= (~INT_EN_SW_INT_EN_
);
1764 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1765 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1766 pdata
->software_irq_signal
= 1;
1768 serviced
= IRQ_HANDLED
;
1771 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1772 /* Called when there is a multicast update scheduled and
1773 * it is now safe to complete the update */
1774 SMSC_TRACE(pdata
, intr
, "RX Stop interrupt");
1775 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1776 if (pdata
->multicast_update_pending
)
1777 smsc911x_rx_multicast_update_workaround(pdata
);
1778 serviced
= IRQ_HANDLED
;
1781 if (intsts
& inten
& INT_STS_TDFA_
) {
1782 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1783 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1784 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1785 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1786 netif_wake_queue(dev
);
1787 serviced
= IRQ_HANDLED
;
1790 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1791 SMSC_TRACE(pdata
, intr
, "RX Error interrupt");
1792 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1793 serviced
= IRQ_HANDLED
;
1796 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1797 if (likely(napi_schedule_prep(&pdata
->napi
))) {
1798 /* Disable Rx interrupts */
1799 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1800 temp
&= (~INT_EN_RSFL_EN_
);
1801 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1802 /* Schedule a NAPI poll */
1803 __napi_schedule(&pdata
->napi
);
1805 SMSC_WARN(pdata
, rx_err
, "napi_schedule_prep failed");
1807 serviced
= IRQ_HANDLED
;
1813 #ifdef CONFIG_NET_POLL_CONTROLLER
1814 static void smsc911x_poll_controller(struct net_device
*dev
)
1816 disable_irq(dev
->irq
);
1817 smsc911x_irqhandler(0, dev
);
1818 enable_irq(dev
->irq
);
1820 #endif /* CONFIG_NET_POLL_CONTROLLER */
1822 static int smsc911x_set_mac_address(struct net_device
*dev
, void *p
)
1824 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1825 struct sockaddr
*addr
= p
;
1827 /* On older hardware revisions we cannot change the mac address
1828 * registers while receiving data. Newer devices can safely change
1829 * this at any time. */
1830 if (pdata
->generation
<= 1 && netif_running(dev
))
1833 if (!is_valid_ether_addr(addr
->sa_data
))
1834 return -EADDRNOTAVAIL
;
1836 memcpy(dev
->dev_addr
, addr
->sa_data
, ETH_ALEN
);
1838 spin_lock_irq(&pdata
->mac_lock
);
1839 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1840 spin_unlock_irq(&pdata
->mac_lock
);
1842 netdev_info(dev
, "MAC Address: %pM\n", dev
->dev_addr
);
1847 /* Standard ioctls for mii-tool */
1848 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1850 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1852 if (!netif_running(dev
) || !pdata
->phy_dev
)
1855 return phy_mii_ioctl(pdata
->phy_dev
, ifr
, cmd
);
1859 smsc911x_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1861 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1865 return phy_ethtool_gset(pdata
->phy_dev
, cmd
);
1869 smsc911x_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1871 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1873 return phy_ethtool_sset(pdata
->phy_dev
, cmd
);
1876 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1877 struct ethtool_drvinfo
*info
)
1879 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1880 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1881 strlcpy(info
->bus_info
, dev_name(dev
->dev
.parent
),
1882 sizeof(info
->bus_info
));
1885 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1887 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1889 return phy_start_aneg(pdata
->phy_dev
);
1892 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1894 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1895 return pdata
->msg_enable
;
1898 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1900 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1901 pdata
->msg_enable
= level
;
1904 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1906 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1911 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1914 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1915 struct phy_device
*phy_dev
= pdata
->phy_dev
;
1916 unsigned long flags
;
1921 regs
->version
= pdata
->idrev
;
1922 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1923 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1925 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1926 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1927 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1928 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1931 for (i
= 0; i
<= 31; i
++)
1932 data
[j
++] = smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
, i
);
1935 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1937 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1938 temp
&= ~GPIO_CFG_EEPR_EN_
;
1939 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
1943 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
1948 SMSC_TRACE(pdata
, drv
, "op 0x%08x", op
);
1949 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
1950 SMSC_WARN(pdata
, drv
, "Busy at start");
1954 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
1955 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
1959 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
1960 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (--timeout
));
1963 SMSC_TRACE(pdata
, drv
, "TIMED OUT");
1967 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
1968 SMSC_TRACE(pdata
, drv
, "Error occurred during eeprom operation");
1975 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
1976 u8 address
, u8
*data
)
1978 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
1981 SMSC_TRACE(pdata
, drv
, "address 0x%x", address
);
1982 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1985 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
1990 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
1991 u8 address
, u8 data
)
1993 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
1997 SMSC_TRACE(pdata
, drv
, "address 0x%x, data 0x%x", address
, data
);
1998 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2001 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
2002 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
2004 /* Workaround for hardware read-after-write restriction */
2005 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2007 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2013 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
2015 return SMSC911X_EEPROM_SIZE
;
2018 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
2019 struct ethtool_eeprom
*eeprom
, u8
*data
)
2021 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2022 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
2026 smsc911x_eeprom_enable_access(pdata
);
2028 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
2029 for (i
= 0; i
< len
; i
++) {
2030 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
2037 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
2042 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
2043 struct ethtool_eeprom
*eeprom
, u8
*data
)
2046 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2048 smsc911x_eeprom_enable_access(pdata
);
2049 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
2050 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
2051 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
2053 /* Single byte write, according to man page */
2059 static const struct ethtool_ops smsc911x_ethtool_ops
= {
2060 .get_settings
= smsc911x_ethtool_getsettings
,
2061 .set_settings
= smsc911x_ethtool_setsettings
,
2062 .get_link
= ethtool_op_get_link
,
2063 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
2064 .nway_reset
= smsc911x_ethtool_nwayreset
,
2065 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
2066 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
2067 .get_regs_len
= smsc911x_ethtool_getregslen
,
2068 .get_regs
= smsc911x_ethtool_getregs
,
2069 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
2070 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
2071 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
2074 static const struct net_device_ops smsc911x_netdev_ops
= {
2075 .ndo_open
= smsc911x_open
,
2076 .ndo_stop
= smsc911x_stop
,
2077 .ndo_start_xmit
= smsc911x_hard_start_xmit
,
2078 .ndo_get_stats
= smsc911x_get_stats
,
2079 .ndo_set_rx_mode
= smsc911x_set_multicast_list
,
2080 .ndo_do_ioctl
= smsc911x_do_ioctl
,
2081 .ndo_change_mtu
= eth_change_mtu
,
2082 .ndo_validate_addr
= eth_validate_addr
,
2083 .ndo_set_mac_address
= smsc911x_set_mac_address
,
2084 #ifdef CONFIG_NET_POLL_CONTROLLER
2085 .ndo_poll_controller
= smsc911x_poll_controller
,
2089 /* copies the current mac address from hardware to dev->dev_addr */
2090 static void __devinit
smsc911x_read_mac_address(struct net_device
*dev
)
2092 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2093 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
2094 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
2096 dev
->dev_addr
[0] = (u8
)(mac_low32
);
2097 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
2098 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
2099 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
2100 dev
->dev_addr
[4] = (u8
)(mac_high16
);
2101 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
2104 /* Initializing private device structures, only called from probe */
2105 static int __devinit
smsc911x_init(struct net_device
*dev
)
2107 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2108 unsigned int byte_test
;
2109 unsigned int to
= 100;
2111 SMSC_TRACE(pdata
, probe
, "Driver Parameters:");
2112 SMSC_TRACE(pdata
, probe
, "LAN base: 0x%08lX",
2113 (unsigned long)pdata
->ioaddr
);
2114 SMSC_TRACE(pdata
, probe
, "IRQ: %d", dev
->irq
);
2115 SMSC_TRACE(pdata
, probe
, "PHY will be autodetected.");
2117 spin_lock_init(&pdata
->dev_lock
);
2118 spin_lock_init(&pdata
->mac_lock
);
2120 if (pdata
->ioaddr
== 0) {
2121 SMSC_WARN(pdata
, probe
, "pdata->ioaddr: 0x00000000");
2126 * poll the READY bit in PMT_CTRL. Any other access to the device is
2127 * forbidden while this bit isn't set. Try for 100ms
2129 while (!(smsc911x_reg_read(pdata
, PMT_CTRL
) & PMT_CTRL_READY_
) && --to
)
2132 pr_err("Device not READY in 100ms aborting\n");
2136 /* Check byte ordering */
2137 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2138 SMSC_TRACE(pdata
, probe
, "BYTE_TEST: 0x%08X", byte_test
);
2139 if (byte_test
== 0x43218765) {
2140 SMSC_TRACE(pdata
, probe
, "BYTE_TEST looks swapped, "
2141 "applying WORD_SWAP");
2142 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
2144 /* 1 dummy read of BYTE_TEST is needed after a write to
2145 * WORD_SWAP before its contents are valid */
2146 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2148 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2151 if (byte_test
!= 0x87654321) {
2152 SMSC_WARN(pdata
, drv
, "BYTE_TEST: 0x%08X", byte_test
);
2153 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
2154 SMSC_WARN(pdata
, probe
,
2155 "top 16 bits equal to bottom 16 bits");
2156 SMSC_TRACE(pdata
, probe
,
2157 "This may mean the chip is set "
2158 "for 32 bit while the bus is reading 16 bit");
2163 /* Default generation to zero (all workarounds apply) */
2164 pdata
->generation
= 0;
2166 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
2167 switch (pdata
->idrev
& 0xFFFF0000) {
2173 /* LAN911[5678] family */
2174 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
2181 /* LAN921[5678] family */
2182 pdata
->generation
= 3;
2189 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2190 pdata
->generation
= 4;
2194 SMSC_WARN(pdata
, probe
, "LAN911x not identified, idrev: 0x%08X",
2199 SMSC_TRACE(pdata
, probe
,
2200 "LAN911x identified, idrev: 0x%08X, generation: %d",
2201 pdata
->idrev
, pdata
->generation
);
2203 if (pdata
->generation
== 0)
2204 SMSC_WARN(pdata
, probe
,
2205 "This driver is not intended for this chip revision");
2207 /* workaround for platforms without an eeprom, where the mac address
2208 * is stored elsewhere and set by the bootloader. This saves the
2209 * mac address before resetting the device */
2210 if (pdata
->config
.flags
& SMSC911X_SAVE_MAC_ADDRESS
) {
2211 spin_lock_irq(&pdata
->mac_lock
);
2212 smsc911x_read_mac_address(dev
);
2213 spin_unlock_irq(&pdata
->mac_lock
);
2216 /* Reset the LAN911x */
2217 if (smsc911x_soft_reset(pdata
))
2220 /* Disable all interrupt sources until we bring the device up */
2221 smsc911x_reg_write(pdata
, INT_EN
, 0);
2224 dev
->flags
|= IFF_MULTICAST
;
2225 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
2226 dev
->netdev_ops
= &smsc911x_netdev_ops
;
2227 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
2232 static int __devexit
smsc911x_drv_remove(struct platform_device
*pdev
)
2234 struct net_device
*dev
;
2235 struct smsc911x_data
*pdata
;
2236 struct resource
*res
;
2238 dev
= platform_get_drvdata(pdev
);
2240 pdata
= netdev_priv(dev
);
2242 BUG_ON(!pdata
->ioaddr
);
2243 BUG_ON(!pdata
->phy_dev
);
2245 SMSC_TRACE(pdata
, ifdown
, "Stopping driver");
2247 phy_disconnect(pdata
->phy_dev
);
2248 pdata
->phy_dev
= NULL
;
2249 mdiobus_unregister(pdata
->mii_bus
);
2250 mdiobus_free(pdata
->mii_bus
);
2252 platform_set_drvdata(pdev
, NULL
);
2253 unregister_netdev(dev
);
2254 free_irq(dev
->irq
, dev
);
2255 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
2258 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2260 release_mem_region(res
->start
, resource_size(res
));
2262 iounmap(pdata
->ioaddr
);
2264 (void)smsc911x_disable_resources(pdev
);
2265 smsc911x_free_resources(pdev
);
2272 /* standard register acces */
2273 static const struct smsc911x_ops standard_smsc911x_ops
= {
2274 .reg_read
= __smsc911x_reg_read
,
2275 .reg_write
= __smsc911x_reg_write
,
2276 .rx_readfifo
= smsc911x_rx_readfifo
,
2277 .tx_writefifo
= smsc911x_tx_writefifo
,
2280 /* shifted register access */
2281 static const struct smsc911x_ops shifted_smsc911x_ops
= {
2282 .reg_read
= __smsc911x_reg_read_shift
,
2283 .reg_write
= __smsc911x_reg_write_shift
,
2284 .rx_readfifo
= smsc911x_rx_readfifo_shift
,
2285 .tx_writefifo
= smsc911x_tx_writefifo_shift
,
2289 static int __devinit
smsc911x_probe_config_dt(
2290 struct smsc911x_platform_config
*config
,
2291 struct device_node
*np
)
2299 config
->phy_interface
= of_get_phy_mode(np
);
2301 mac
= of_get_mac_address(np
);
2303 memcpy(config
->mac
, mac
, ETH_ALEN
);
2305 of_property_read_u32(np
, "reg-shift", &config
->shift
);
2307 of_property_read_u32(np
, "reg-io-width", &width
);
2309 config
->flags
|= SMSC911X_USE_32BIT
;
2311 config
->flags
|= SMSC911X_USE_16BIT
;
2313 if (of_get_property(np
, "smsc,irq-active-high", NULL
))
2314 config
->irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
;
2316 if (of_get_property(np
, "smsc,irq-push-pull", NULL
))
2317 config
->irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
;
2319 if (of_get_property(np
, "smsc,force-internal-phy", NULL
))
2320 config
->flags
|= SMSC911X_FORCE_INTERNAL_PHY
;
2322 if (of_get_property(np
, "smsc,force-external-phy", NULL
))
2323 config
->flags
|= SMSC911X_FORCE_EXTERNAL_PHY
;
2325 if (of_get_property(np
, "smsc,save-mac-address", NULL
))
2326 config
->flags
|= SMSC911X_SAVE_MAC_ADDRESS
;
2331 static inline int smsc911x_probe_config_dt(
2332 struct smsc911x_platform_config
*config
,
2333 struct device_node
*np
)
2337 #endif /* CONFIG_OF */
2339 static int __devinit
smsc911x_drv_probe(struct platform_device
*pdev
)
2341 struct device_node
*np
= pdev
->dev
.of_node
;
2342 struct net_device
*dev
;
2343 struct smsc911x_data
*pdata
;
2344 struct smsc911x_platform_config
*config
= pdev
->dev
.platform_data
;
2345 struct resource
*res
, *irq_res
;
2346 unsigned int intcfg
= 0;
2347 int res_size
, irq_flags
;
2350 pr_info("Driver version %s\n", SMSC_DRV_VERSION
);
2352 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
2355 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2357 pr_warn("Could not allocate resource\n");
2361 res_size
= resource_size(res
);
2363 irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
2365 pr_warn("Could not allocate irq resource\n");
2370 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
2375 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
2377 pr_warn("Could not allocate device\n");
2379 goto out_release_io_1
;
2382 SET_NETDEV_DEV(dev
, &pdev
->dev
);
2384 pdata
= netdev_priv(dev
);
2386 dev
->irq
= irq_res
->start
;
2387 irq_flags
= irq_res
->flags
& IRQF_TRIGGER_MASK
;
2388 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
2391 pdata
->msg_enable
= ((1 << debug
) - 1);
2393 platform_set_drvdata(pdev
, dev
);
2395 retval
= smsc911x_request_resources(pdev
);
2397 goto out_return_resources
;
2399 retval
= smsc911x_enable_resources(pdev
);
2401 goto out_disable_resources
;
2403 if (pdata
->ioaddr
== NULL
) {
2404 SMSC_WARN(pdata
, probe
, "Error smsc911x base address invalid");
2406 goto out_disable_resources
;
2409 retval
= smsc911x_probe_config_dt(&pdata
->config
, np
);
2410 if (retval
&& config
) {
2411 /* copy config parameters across to pdata */
2412 memcpy(&pdata
->config
, config
, sizeof(pdata
->config
));
2417 SMSC_WARN(pdata
, probe
, "Error smsc911x config not found");
2418 goto out_disable_resources
;
2421 /* assume standard, non-shifted, access to HW registers */
2422 pdata
->ops
= &standard_smsc911x_ops
;
2423 /* apply the right access if shifting is needed */
2424 if (pdata
->config
.shift
)
2425 pdata
->ops
= &shifted_smsc911x_ops
;
2427 retval
= smsc911x_init(dev
);
2429 goto out_disable_resources
;
2431 /* configure irq polarity and type before connecting isr */
2432 if (pdata
->config
.irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
2433 intcfg
|= INT_CFG_IRQ_POL_
;
2435 if (pdata
->config
.irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
2436 intcfg
|= INT_CFG_IRQ_TYPE_
;
2438 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
2440 /* Ensure interrupts are globally disabled before connecting ISR */
2441 smsc911x_reg_write(pdata
, INT_EN
, 0);
2442 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
2444 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
,
2445 irq_flags
| IRQF_SHARED
, dev
->name
, dev
);
2447 SMSC_WARN(pdata
, probe
,
2448 "Unable to claim requested irq: %d", dev
->irq
);
2452 retval
= register_netdev(dev
);
2454 SMSC_WARN(pdata
, probe
, "Error %i registering device", retval
);
2457 SMSC_TRACE(pdata
, probe
,
2458 "Network interface: \"%s\"", dev
->name
);
2461 retval
= smsc911x_mii_init(pdev
, dev
);
2463 SMSC_WARN(pdata
, probe
, "Error %i initialising mii", retval
);
2464 goto out_unregister_netdev_5
;
2467 spin_lock_irq(&pdata
->mac_lock
);
2469 /* Check if mac address has been specified when bringing interface up */
2470 if (is_valid_ether_addr(dev
->dev_addr
)) {
2471 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2472 SMSC_TRACE(pdata
, probe
,
2473 "MAC Address is specified by configuration");
2474 } else if (is_valid_ether_addr(pdata
->config
.mac
)) {
2475 memcpy(dev
->dev_addr
, pdata
->config
.mac
, 6);
2476 SMSC_TRACE(pdata
, probe
,
2477 "MAC Address specified by platform data");
2479 /* Try reading mac address from device. if EEPROM is present
2480 * it will already have been set */
2483 if (is_valid_ether_addr(dev
->dev_addr
)) {
2484 /* eeprom values are valid so use them */
2485 SMSC_TRACE(pdata
, probe
,
2486 "Mac Address is read from LAN911x EEPROM");
2488 /* eeprom values are invalid, generate random MAC */
2489 random_ether_addr(dev
->dev_addr
);
2490 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2491 SMSC_TRACE(pdata
, probe
,
2492 "MAC Address is set to random_ether_addr");
2496 spin_unlock_irq(&pdata
->mac_lock
);
2498 netdev_info(dev
, "MAC Address: %pM\n", dev
->dev_addr
);
2502 out_unregister_netdev_5
:
2503 unregister_netdev(dev
);
2505 free_irq(dev
->irq
, dev
);
2506 out_disable_resources
:
2507 (void)smsc911x_disable_resources(pdev
);
2508 out_return_resources
:
2509 smsc911x_free_resources(pdev
);
2510 platform_set_drvdata(pdev
, NULL
);
2511 iounmap(pdata
->ioaddr
);
2514 release_mem_region(res
->start
, resource_size(res
));
2520 /* This implementation assumes the devices remains powered on its VDDVARIO
2521 * pins during suspend. */
2523 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2525 static int smsc911x_suspend(struct device
*dev
)
2527 struct net_device
*ndev
= dev_get_drvdata(dev
);
2528 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2530 /* enable wake on LAN, energy detection and the external PME
2532 smsc911x_reg_write(pdata
, PMT_CTRL
,
2533 PMT_CTRL_PM_MODE_D1_
| PMT_CTRL_WOL_EN_
|
2534 PMT_CTRL_ED_EN_
| PMT_CTRL_PME_EN_
);
2539 static int smsc911x_resume(struct device
*dev
)
2541 struct net_device
*ndev
= dev_get_drvdata(dev
);
2542 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2543 unsigned int to
= 100;
2545 /* Note 3.11 from the datasheet:
2546 * "When the LAN9220 is in a power saving state, a write of any
2547 * data to the BYTE_TEST register will wake-up the device."
2549 smsc911x_reg_write(pdata
, BYTE_TEST
, 0);
2551 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2552 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2554 while (!(smsc911x_reg_read(pdata
, PMT_CTRL
) & PMT_CTRL_READY_
) && --to
)
2557 return (to
== 0) ? -EIO
: 0;
2560 static const struct dev_pm_ops smsc911x_pm_ops
= {
2561 .suspend
= smsc911x_suspend
,
2562 .resume
= smsc911x_resume
,
2565 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2568 #define SMSC911X_PM_OPS NULL
2571 static const struct of_device_id smsc911x_dt_ids
[] = {
2572 { .compatible
= "smsc,lan9115", },
2575 MODULE_DEVICE_TABLE(of
, smsc911x_dt_ids
);
2577 static struct platform_driver smsc911x_driver
= {
2578 .probe
= smsc911x_drv_probe
,
2579 .remove
= __devexit_p(smsc911x_drv_remove
),
2581 .name
= SMSC_CHIPNAME
,
2582 .owner
= THIS_MODULE
,
2583 .pm
= SMSC911X_PM_OPS
,
2584 .of_match_table
= smsc911x_dt_ids
,
2588 /* Entry point for loading the module */
2589 static int __init
smsc911x_init_module(void)
2592 return platform_driver_register(&smsc911x_driver
);
2595 /* entry point for unloading the module */
2596 static void __exit
smsc911x_cleanup_module(void)
2598 platform_driver_unregister(&smsc911x_driver
);
2601 module_init(smsc911x_init_module
);
2602 module_exit(smsc911x_cleanup_module
);