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xfs: remote attribute lookups require the value length
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic.h
1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #ifndef _QLCNIC_H_
9 #define _QLCNIC_H_
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ip.h>
19 #include <linux/in.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
23
24 #include <linux/ethtool.h>
25 #include <linux/mii.h>
26 #include <linux/timer.h>
27
28 #include <linux/vmalloc.h>
29
30 #include <linux/io.h>
31 #include <asm/byteorder.h>
32 #include <linux/bitops.h>
33 #include <linux/if_vlan.h>
34
35 #include "qlcnic_hdr.h"
36 #include "qlcnic_hw.h"
37 #include "qlcnic_83xx_hw.h"
38
39 #define _QLCNIC_LINUX_MAJOR 5
40 #define _QLCNIC_LINUX_MINOR 2
41 #define _QLCNIC_LINUX_SUBVERSION 42
42 #define QLCNIC_LINUX_VERSIONID "5.2.42"
43 #define QLCNIC_DRV_IDC_VER 0x01
44 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
45 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
46
47 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
48 #define _major(v) (((v) >> 24) & 0xff)
49 #define _minor(v) (((v) >> 16) & 0xff)
50 #define _build(v) ((v) & 0xffff)
51
52 /* version in image has weird encoding:
53 * 7:0 - major
54 * 15:8 - minor
55 * 31:16 - build (little endian)
56 */
57 #define QLCNIC_DECODE_VERSION(v) \
58 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
59
60 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
61 #define QLCNIC_NUM_FLASH_SECTORS (64)
62 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
63 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
64 * QLCNIC_FLASH_SECTOR_SIZE)
65
66 #define RCV_DESC_RINGSIZE(rds_ring) \
67 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
68 #define RCV_BUFF_RINGSIZE(rds_ring) \
69 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
70 #define STATUS_DESC_RINGSIZE(sds_ring) \
71 (sizeof(struct status_desc) * (sds_ring)->num_desc)
72 #define TX_BUFF_RINGSIZE(tx_ring) \
73 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
74 #define TX_DESC_RINGSIZE(tx_ring) \
75 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
76
77 #define QLCNIC_P3P_A0 0x50
78 #define QLCNIC_P3P_C0 0x58
79
80 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
81
82 #define FIRST_PAGE_GROUP_START 0
83 #define FIRST_PAGE_GROUP_END 0x100000
84
85 #define P3P_MAX_MTU (9600)
86 #define P3P_MIN_MTU (68)
87 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
88
89 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
90 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
91 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
92 #define QLCNIC_LRO_BUFFER_EXTRA 2048
93
94 /* Tx defines */
95 #define QLCNIC_MAX_FRAGS_PER_TX 14
96 #define MAX_TSO_HEADER_DESC 2
97 #define MGMT_CMD_DESC_RESV 4
98 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
99 + MGMT_CMD_DESC_RESV)
100 #define QLCNIC_MAX_TX_TIMEOUTS 2
101 /*
102 * Following are the states of the Phantom. Phantom will set them and
103 * Host will read to check if the fields are correct.
104 */
105 #define PHAN_INITIALIZE_FAILED 0xffff
106 #define PHAN_INITIALIZE_COMPLETE 0xff01
107
108 /* Host writes the following to notify that it has done the init-handshake */
109 #define PHAN_INITIALIZE_ACK 0xf00f
110 #define PHAN_PEG_RCV_INITIALIZED 0xff01
111
112 #define NUM_RCV_DESC_RINGS 3
113
114 #define RCV_RING_NORMAL 0
115 #define RCV_RING_JUMBO 1
116
117 #define MIN_CMD_DESCRIPTORS 64
118 #define MIN_RCV_DESCRIPTORS 64
119 #define MIN_JUMBO_DESCRIPTORS 32
120
121 #define MAX_CMD_DESCRIPTORS 1024
122 #define MAX_RCV_DESCRIPTORS_1G 4096
123 #define MAX_RCV_DESCRIPTORS_10G 8192
124 #define MAX_RCV_DESCRIPTORS_VF 2048
125 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
126 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
127
128 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
129 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
130 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
131 #define MAX_RDS_RINGS 2
132
133 #define get_next_index(index, length) \
134 (((index) + 1) & ((length) - 1))
135
136 /*
137 * Following data structures describe the descriptors that will be used.
138 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
139 * we are doing LSO (above the 1500 size packet) only.
140 */
141 struct cmd_desc_type0 {
142 u8 tcp_hdr_offset; /* For LSO only */
143 u8 ip_hdr_offset; /* For LSO only */
144 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
145 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
146
147 __le64 addr_buffer2;
148
149 __le16 reference_handle;
150 __le16 mss;
151 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
152 u8 total_hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
153 __le16 conn_id; /* IPSec offoad only */
154
155 __le64 addr_buffer3;
156 __le64 addr_buffer1;
157
158 __le16 buffer_length[4];
159
160 __le64 addr_buffer4;
161
162 u8 eth_addr[ETH_ALEN];
163 __le16 vlan_TCI;
164
165 } __attribute__ ((aligned(64)));
166
167 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
168 struct rcv_desc {
169 __le16 reference_handle;
170 __le16 reserved;
171 __le32 buffer_length; /* allocated buffer length (usually 2K) */
172 __le64 addr_buffer;
173 } __packed;
174
175 struct status_desc {
176 __le64 status_desc_data[2];
177 } __attribute__ ((aligned(16)));
178
179 /* UNIFIED ROMIMAGE */
180 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
181 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
182 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
183 #define QLCNIC_UNI_DIR_SECT_FW 0x7
184
185 /*Offsets */
186 #define QLCNIC_UNI_CHIP_REV_OFF 10
187 #define QLCNIC_UNI_FLAGS_OFF 11
188 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
189 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
190 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
191
192 struct uni_table_desc{
193 __le32 findex;
194 __le32 num_entries;
195 __le32 entry_size;
196 __le32 reserved[5];
197 };
198
199 struct uni_data_desc{
200 __le32 findex;
201 __le32 size;
202 __le32 reserved[5];
203 };
204
205 /* Flash Defines and Structures */
206 #define QLCNIC_FLT_LOCATION 0x3F1000
207 #define QLCNIC_FDT_LOCATION 0x3F0000
208 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
209 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
210 #define QLCNIC_BOOTLD_REGION 0X72
211 struct qlcnic_flt_header {
212 u16 version;
213 u16 len;
214 u16 checksum;
215 u16 reserved;
216 };
217
218 struct qlcnic_flt_entry {
219 u8 region;
220 u8 reserved0;
221 u8 attrib;
222 u8 reserved1;
223 u32 size;
224 u32 start_addr;
225 u32 end_addr;
226 };
227
228 /* Flash Descriptor Table */
229 struct qlcnic_fdt {
230 u32 valid;
231 u16 ver;
232 u16 len;
233 u16 cksum;
234 u16 unused;
235 u8 model[16];
236 u16 mfg_id;
237 u16 id;
238 u8 flag;
239 u8 erase_cmd;
240 u8 alt_erase_cmd;
241 u8 write_enable_cmd;
242 u8 write_enable_bits;
243 u8 write_statusreg_cmd;
244 u8 unprotected_sec_cmd;
245 u8 read_manuf_cmd;
246 u32 block_size;
247 u32 alt_block_size;
248 u32 flash_size;
249 u32 write_enable_data;
250 u8 readid_addr_len;
251 u8 write_disable_bits;
252 u8 read_dev_id_len;
253 u8 chip_erase_cmd;
254 u16 read_timeo;
255 u8 protected_sec_cmd;
256 u8 resvd[65];
257 };
258 /* Magic number to let user know flash is programmed */
259 #define QLCNIC_BDINFO_MAGIC 0x12345678
260
261 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
262 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
263 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
264 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
265 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
266 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
267 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
268 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
269 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
270 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
271 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
272 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
273 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
274 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
275
276 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
277
278 /* Flash memory map */
279 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
280 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
281 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
282 #define QLCNIC_USER_START 0x3E8000 /* Firmare info */
283
284 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
285 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
286 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
287 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
288
289 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
290 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
291
292 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
293 #define QLCNIC_UNIFIED_ROMIMAGE 0
294 #define QLCNIC_FLASH_ROMIMAGE 1
295 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
296
297 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
298 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
299
300 extern char qlcnic_driver_name[];
301
302 extern int qlcnic_use_msi;
303 extern int qlcnic_use_msi_x;
304 extern int qlcnic_auto_fw_reset;
305 extern int qlcnic_load_fw_file;
306 extern int qlcnic_config_npars;
307
308 /* Number of status descriptors to handle per interrupt */
309 #define MAX_STATUS_HANDLE (64)
310
311 /*
312 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
313 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
314 */
315 struct qlcnic_skb_frag {
316 u64 dma;
317 u64 length;
318 };
319
320 /* Following defines are for the state of the buffers */
321 #define QLCNIC_BUFFER_FREE 0
322 #define QLCNIC_BUFFER_BUSY 1
323
324 /*
325 * There will be one qlcnic_buffer per skb packet. These will be
326 * used to save the dma info for pci_unmap_page()
327 */
328 struct qlcnic_cmd_buffer {
329 struct sk_buff *skb;
330 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
331 u32 frag_count;
332 };
333
334 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
335 struct qlcnic_rx_buffer {
336 u16 ref_handle;
337 struct sk_buff *skb;
338 struct list_head list;
339 u64 dma;
340 };
341
342 /* Board types */
343 #define QLCNIC_GBE 0x01
344 #define QLCNIC_XGBE 0x02
345
346 /*
347 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
348 * adjusted based on configured MTU.
349 */
350 #define QLCNIC_INTR_COAL_TYPE_RX 1
351 #define QLCNIC_INTR_COAL_TYPE_TX 2
352
353 #define QLCNIC_DEF_INTR_COALESCE_RX_TIME_US 3
354 #define QLCNIC_DEF_INTR_COALESCE_RX_PACKETS 256
355
356 #define QLCNIC_DEF_INTR_COALESCE_TX_TIME_US 64
357 #define QLCNIC_DEF_INTR_COALESCE_TX_PACKETS 64
358
359 #define QLCNIC_INTR_DEFAULT 0x04
360 #define QLCNIC_CONFIG_INTR_COALESCE 3
361 #define QLCNIC_DEV_INFO_SIZE 1
362
363 struct qlcnic_nic_intr_coalesce {
364 u8 type;
365 u8 sts_ring_mask;
366 u16 rx_packets;
367 u16 rx_time_us;
368 u16 tx_packets;
369 u16 tx_time_us;
370 u16 flag;
371 u32 timer_out;
372 };
373
374 struct qlcnic_dump_template_hdr {
375 u32 type;
376 u32 offset;
377 u32 size;
378 u32 cap_mask;
379 u32 num_entries;
380 u32 version;
381 u32 timestamp;
382 u32 checksum;
383 u32 drv_cap_mask;
384 u32 sys_info[3];
385 u32 saved_state[16];
386 u32 cap_sizes[8];
387 u32 ocm_wnd_reg[16];
388 u32 rsvd[0];
389 };
390
391 struct qlcnic_fw_dump {
392 u8 clr; /* flag to indicate if dump is cleared */
393 u8 enable; /* enable/disable dump */
394 u32 size; /* total size of the dump */
395 void *data; /* dump data area */
396 struct qlcnic_dump_template_hdr *tmpl_hdr;
397 };
398
399 /*
400 * One hardware_context{} per adapter
401 * contains interrupt info as well shared hardware info.
402 */
403 struct qlcnic_hardware_context {
404 void __iomem *pci_base0;
405 void __iomem *ocm_win_crb;
406
407 unsigned long pci_len0;
408
409 rwlock_t crb_lock;
410 struct mutex mem_lock;
411
412 u8 revision_id;
413 u8 pci_func;
414 u8 linkup;
415 u8 loopback_state;
416 u8 beacon_state;
417 u8 has_link_events;
418 u8 fw_type;
419 u8 physical_port;
420 u8 reset_context;
421 u8 msix_supported;
422 u8 max_mac_filters;
423 u8 mc_enabled;
424 u8 max_mc_count;
425 u8 diag_test;
426 u8 num_msix;
427 u8 nic_mode;
428 char diag_cnt;
429
430 u16 port_type;
431 u16 board_type;
432
433 u16 link_speed;
434 u16 link_duplex;
435 u16 link_autoneg;
436 u16 module_type;
437
438 u16 op_mode;
439 u16 switch_mode;
440 u16 max_tx_ques;
441 u16 max_rx_ques;
442 u16 max_mtu;
443 u32 msg_enable;
444 u16 act_pci_func;
445
446 u32 capabilities;
447 u32 capabilities2;
448 u32 temp;
449 u32 int_vec_bit;
450 u32 fw_hal_version;
451 u32 port_config;
452 struct qlcnic_hardware_ops *hw_ops;
453 struct qlcnic_nic_intr_coalesce coal;
454 struct qlcnic_fw_dump fw_dump;
455 struct qlcnic_fdt fdt;
456 struct qlc_83xx_reset reset;
457 struct qlc_83xx_idc idc;
458 struct qlc_83xx_fw_info fw_info;
459 struct qlcnic_intrpt_config *intr_tbl;
460 struct qlcnic_sriov *sriov;
461 u32 *reg_tbl;
462 u32 *ext_reg_tbl;
463 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
464 u32 mbox_reg[4];
465 spinlock_t mbx_lock;
466 };
467
468 struct qlcnic_adapter_stats {
469 u64 xmitcalled;
470 u64 xmitfinished;
471 u64 rxdropped;
472 u64 txdropped;
473 u64 csummed;
474 u64 rx_pkts;
475 u64 lro_pkts;
476 u64 rxbytes;
477 u64 txbytes;
478 u64 lrobytes;
479 u64 lso_frames;
480 u64 xmit_on;
481 u64 xmit_off;
482 u64 skb_alloc_failure;
483 u64 null_rxbuf;
484 u64 rx_dma_map_error;
485 u64 tx_dma_map_error;
486 u64 spurious_intr;
487 u64 mac_filter_limit_overrun;
488 };
489
490 /*
491 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
492 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
493 */
494 struct qlcnic_host_rds_ring {
495 void __iomem *crb_rcv_producer;
496 struct rcv_desc *desc_head;
497 struct qlcnic_rx_buffer *rx_buf_arr;
498 u32 num_desc;
499 u32 producer;
500 u32 dma_size;
501 u32 skb_size;
502 u32 flags;
503 struct list_head free_list;
504 spinlock_t lock;
505 dma_addr_t phys_addr;
506 } ____cacheline_internodealigned_in_smp;
507
508 struct qlcnic_host_sds_ring {
509 u32 consumer;
510 u32 num_desc;
511 void __iomem *crb_sts_consumer;
512
513 struct status_desc *desc_head;
514 struct qlcnic_adapter *adapter;
515 struct napi_struct napi;
516 struct list_head free_list[NUM_RCV_DESC_RINGS];
517
518 void __iomem *crb_intr_mask;
519 int irq;
520
521 dma_addr_t phys_addr;
522 char name[IFNAMSIZ + 12];
523 } ____cacheline_internodealigned_in_smp;
524
525 struct qlcnic_host_tx_ring {
526 int irq;
527 void __iomem *crb_intr_mask;
528 char name[IFNAMSIZ + 12];
529 u16 ctx_id;
530 u32 producer;
531 u32 sw_consumer;
532 u32 num_desc;
533 void __iomem *crb_cmd_producer;
534 struct cmd_desc_type0 *desc_head;
535 struct qlcnic_adapter *adapter;
536 struct napi_struct napi;
537 struct qlcnic_cmd_buffer *cmd_buf_arr;
538 __le32 *hw_consumer;
539
540 dma_addr_t phys_addr;
541 dma_addr_t hw_cons_phys_addr;
542 struct netdev_queue *txq;
543 } ____cacheline_internodealigned_in_smp;
544
545 /*
546 * Receive context. There is one such structure per instance of the
547 * receive processing. Any state information that is relevant to
548 * the receive, and is must be in this structure. The global data may be
549 * present elsewhere.
550 */
551 struct qlcnic_recv_context {
552 struct qlcnic_host_rds_ring *rds_rings;
553 struct qlcnic_host_sds_ring *sds_rings;
554 u32 state;
555 u16 context_id;
556 u16 virt_port;
557
558 };
559
560 /* HW context creation */
561
562 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
563
564 #define QLCNIC_CDRP_CMD_BIT 0x80000000
565
566 /*
567 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
568 * in the crb QLCNIC_CDRP_CRB_OFFSET.
569 */
570 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
571 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
572
573 #define QLCNIC_CDRP_RSP_OK 0x00000001
574 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
575 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
576
577 /*
578 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
579 * the crb QLCNIC_CDRP_CRB_OFFSET.
580 */
581 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
582
583 #define QLCNIC_RCODE_SUCCESS 0
584 #define QLCNIC_RCODE_INVALID_ARGS 6
585 #define QLCNIC_RCODE_NOT_SUPPORTED 9
586 #define QLCNIC_RCODE_NOT_PERMITTED 10
587 #define QLCNIC_RCODE_NOT_IMPL 15
588 #define QLCNIC_RCODE_INVALID 16
589 #define QLCNIC_RCODE_TIMEOUT 17
590 #define QLCNIC_DESTROY_CTX_RESET 0
591
592 /*
593 * Capabilities Announced
594 */
595 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
596 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
597 #define QLCNIC_CAP0_LSO (1 << 6)
598 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
599 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
600 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
601 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
602
603 /*
604 * Context state
605 */
606 #define QLCNIC_HOST_CTX_STATE_FREED 0
607 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
608
609 /*
610 * Rx context
611 */
612
613 struct qlcnic_hostrq_sds_ring {
614 __le64 host_phys_addr; /* Ring base addr */
615 __le32 ring_size; /* Ring entries */
616 __le16 msi_index;
617 __le16 rsvd; /* Padding */
618 } __packed;
619
620 struct qlcnic_hostrq_rds_ring {
621 __le64 host_phys_addr; /* Ring base addr */
622 __le64 buff_size; /* Packet buffer size */
623 __le32 ring_size; /* Ring entries */
624 __le32 ring_kind; /* Class of ring */
625 } __packed;
626
627 struct qlcnic_hostrq_rx_ctx {
628 __le64 host_rsp_dma_addr; /* Response dma'd here */
629 __le32 capabilities[4]; /* Flag bit vector */
630 __le32 host_int_crb_mode; /* Interrupt crb usage */
631 __le32 host_rds_crb_mode; /* RDS crb usage */
632 /* These ring offsets are relative to data[0] below */
633 __le32 rds_ring_offset; /* Offset to RDS config */
634 __le32 sds_ring_offset; /* Offset to SDS config */
635 __le16 num_rds_rings; /* Count of RDS rings */
636 __le16 num_sds_rings; /* Count of SDS rings */
637 __le16 valid_field_offset;
638 u8 txrx_sds_binding;
639 u8 msix_handler;
640 u8 reserved[128]; /* reserve space for future expansion*/
641 /* MUST BE 64-bit aligned.
642 The following is packed:
643 - N hostrq_rds_rings
644 - N hostrq_sds_rings */
645 char data[0];
646 } __packed;
647
648 struct qlcnic_cardrsp_rds_ring{
649 __le32 host_producer_crb; /* Crb to use */
650 __le32 rsvd1; /* Padding */
651 } __packed;
652
653 struct qlcnic_cardrsp_sds_ring {
654 __le32 host_consumer_crb; /* Crb to use */
655 __le32 interrupt_crb; /* Crb to use */
656 } __packed;
657
658 struct qlcnic_cardrsp_rx_ctx {
659 /* These ring offsets are relative to data[0] below */
660 __le32 rds_ring_offset; /* Offset to RDS config */
661 __le32 sds_ring_offset; /* Offset to SDS config */
662 __le32 host_ctx_state; /* Starting State */
663 __le32 num_fn_per_port; /* How many PCI fn share the port */
664 __le16 num_rds_rings; /* Count of RDS rings */
665 __le16 num_sds_rings; /* Count of SDS rings */
666 __le16 context_id; /* Handle for context */
667 u8 phys_port; /* Physical id of port */
668 u8 virt_port; /* Virtual/Logical id of port */
669 u8 reserved[128]; /* save space for future expansion */
670 /* MUST BE 64-bit aligned.
671 The following is packed:
672 - N cardrsp_rds_rings
673 - N cardrs_sds_rings */
674 char data[0];
675 } __packed;
676
677 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
678 (sizeof(HOSTRQ_RX) + \
679 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
680 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
681
682 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
683 (sizeof(CARDRSP_RX) + \
684 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
685 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
686
687 /*
688 * Tx context
689 */
690
691 struct qlcnic_hostrq_cds_ring {
692 __le64 host_phys_addr; /* Ring base addr */
693 __le32 ring_size; /* Ring entries */
694 __le32 rsvd; /* Padding */
695 } __packed;
696
697 struct qlcnic_hostrq_tx_ctx {
698 __le64 host_rsp_dma_addr; /* Response dma'd here */
699 __le64 cmd_cons_dma_addr; /* */
700 __le64 dummy_dma_addr; /* */
701 __le32 capabilities[4]; /* Flag bit vector */
702 __le32 host_int_crb_mode; /* Interrupt crb usage */
703 __le32 rsvd1; /* Padding */
704 __le16 rsvd2; /* Padding */
705 __le16 interrupt_ctl;
706 __le16 msi_index;
707 __le16 rsvd3; /* Padding */
708 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
709 u8 reserved[128]; /* future expansion */
710 } __packed;
711
712 struct qlcnic_cardrsp_cds_ring {
713 __le32 host_producer_crb; /* Crb to use */
714 __le32 interrupt_crb; /* Crb to use */
715 } __packed;
716
717 struct qlcnic_cardrsp_tx_ctx {
718 __le32 host_ctx_state; /* Starting state */
719 __le16 context_id; /* Handle for context */
720 u8 phys_port; /* Physical id of port */
721 u8 virt_port; /* Virtual/Logical id of port */
722 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
723 u8 reserved[128]; /* future expansion */
724 } __packed;
725
726 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
727 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
728
729 /* CRB */
730
731 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
732 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
733 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
734 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
735
736 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
737 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
738 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
739 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
740 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
741
742
743 /* MAC */
744
745 #define MC_COUNT_P3P 38
746
747 #define QLCNIC_MAC_NOOP 0
748 #define QLCNIC_MAC_ADD 1
749 #define QLCNIC_MAC_DEL 2
750 #define QLCNIC_MAC_VLAN_ADD 3
751 #define QLCNIC_MAC_VLAN_DEL 4
752
753 struct qlcnic_mac_list_s {
754 struct list_head list;
755 uint8_t mac_addr[ETH_ALEN+2];
756 };
757
758 /* MAC Learn */
759 #define NO_MAC_LEARN 0
760 #define DRV_MAC_LEARN 1
761 #define FDB_MAC_LEARN 2
762
763 #define QLCNIC_HOST_REQUEST 0x13
764 #define QLCNIC_REQUEST 0x14
765
766 #define QLCNIC_MAC_EVENT 0x1
767
768 #define QLCNIC_IP_UP 2
769 #define QLCNIC_IP_DOWN 3
770
771 #define QLCNIC_ILB_MODE 0x1
772 #define QLCNIC_ELB_MODE 0x2
773
774 #define QLCNIC_LINKEVENT 0x1
775 #define QLCNIC_LB_RESPONSE 0x2
776 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
777 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
778
779 /*
780 * Driver --> Firmware
781 */
782 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
783 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
784 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
785 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
786 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
787 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
788
789 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
790 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
791 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
792 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
793
794 /*
795 * Firmware --> Driver
796 */
797
798 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
799 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
800
801 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
802 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
803 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
804
805 #define QLCNIC_LRO_REQUEST_CLEANUP 4
806
807 /* Capabilites received */
808 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
809 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
810 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
811 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
812 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
813 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
814
815 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
816 #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3
817 #define QLCNIC_FW_CAPABILITY_2_OCBB BIT_5
818
819 /* module types */
820 #define LINKEVENT_MODULE_NOT_PRESENT 1
821 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
822 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
823 #define LINKEVENT_MODULE_OPTICAL_LRM 4
824 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
825 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
826 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
827 #define LINKEVENT_MODULE_TWINAX 8
828
829 #define LINKSPEED_10GBPS 10000
830 #define LINKSPEED_1GBPS 1000
831 #define LINKSPEED_100MBPS 100
832 #define LINKSPEED_10MBPS 10
833
834 #define LINKSPEED_ENCODED_10MBPS 0
835 #define LINKSPEED_ENCODED_100MBPS 1
836 #define LINKSPEED_ENCODED_1GBPS 2
837
838 #define LINKEVENT_AUTONEG_DISABLED 0
839 #define LINKEVENT_AUTONEG_ENABLED 1
840
841 #define LINKEVENT_HALF_DUPLEX 0
842 #define LINKEVENT_FULL_DUPLEX 1
843
844 #define LINKEVENT_LINKSPEED_MBPS 0
845 #define LINKEVENT_LINKSPEED_ENCODED 1
846
847 /* firmware response header:
848 * 63:58 - message type
849 * 57:56 - owner
850 * 55:53 - desc count
851 * 52:48 - reserved
852 * 47:40 - completion id
853 * 39:32 - opcode
854 * 31:16 - error code
855 * 15:00 - reserved
856 */
857 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
858 ((msg_hdr >> 32) & 0xFF)
859
860 struct qlcnic_fw_msg {
861 union {
862 struct {
863 u64 hdr;
864 u64 body[7];
865 };
866 u64 words[8];
867 };
868 };
869
870 struct qlcnic_nic_req {
871 __le64 qhdr;
872 __le64 req_hdr;
873 __le64 words[6];
874 } __packed;
875
876 struct qlcnic_mac_req {
877 u8 op;
878 u8 tag;
879 u8 mac_addr[6];
880 };
881
882 struct qlcnic_vlan_req {
883 __le16 vlan_id;
884 __le16 rsvd[3];
885 } __packed;
886
887 struct qlcnic_ipaddr {
888 __be32 ipv4;
889 __be32 ipv6[4];
890 };
891
892 #define QLCNIC_MSI_ENABLED 0x02
893 #define QLCNIC_MSIX_ENABLED 0x04
894 #define QLCNIC_LRO_ENABLED 0x01
895 #define QLCNIC_LRO_DISABLED 0x00
896 #define QLCNIC_BRIDGE_ENABLED 0X10
897 #define QLCNIC_DIAG_ENABLED 0x20
898 #define QLCNIC_ESWITCH_ENABLED 0x40
899 #define QLCNIC_ADAPTER_INITIALIZED 0x80
900 #define QLCNIC_TAGGING_ENABLED 0x100
901 #define QLCNIC_MACSPOOF 0x200
902 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
903 #define QLCNIC_PROMISC_DISABLED 0x800
904 #define QLCNIC_NEED_FLR 0x1000
905 #define QLCNIC_FW_RESET_OWNER 0x2000
906 #define QLCNIC_FW_HANG 0x4000
907 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
908 #define QLCNIC_TX_INTR_SHARED 0x10000
909 #define QLCNIC_IS_MSI_FAMILY(adapter) \
910 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
911
912 #define QLCNIC_DEF_NUM_STS_DESC_RINGS 4
913 #define QLCNIC_MSIX_TBL_SPACE 8192
914 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
915 #define QLCNIC_MSIX_TBL_PGSIZE 4096
916
917 #define QLCNIC_NETDEV_WEIGHT 128
918 #define QLCNIC_ADAPTER_UP_MAGIC 777
919
920 #define __QLCNIC_FW_ATTACHED 0
921 #define __QLCNIC_DEV_UP 1
922 #define __QLCNIC_RESETTING 2
923 #define __QLCNIC_START_FW 4
924 #define __QLCNIC_AER 5
925 #define __QLCNIC_DIAG_RES_ALLOC 6
926 #define __QLCNIC_LED_ENABLE 7
927 #define __QLCNIC_ELB_INPROGRESS 8
928 #define __QLCNIC_SRIOV_ENABLE 10
929 #define __QLCNIC_SRIOV_CAPABLE 11
930 #define __QLCNIC_MBX_POLL_ENABLE 12
931
932 #define QLCNIC_INTERRUPT_TEST 1
933 #define QLCNIC_LOOPBACK_TEST 2
934 #define QLCNIC_LED_TEST 3
935
936 #define QLCNIC_FILTER_AGE 80
937 #define QLCNIC_READD_AGE 20
938 #define QLCNIC_LB_MAX_FILTERS 64
939 #define QLCNIC_LB_BUCKET_SIZE 32
940
941 /* QLCNIC Driver Error Code */
942 #define QLCNIC_FW_NOT_RESPOND 51
943 #define QLCNIC_TEST_IN_PROGRESS 52
944 #define QLCNIC_UNDEFINED_ERROR 53
945 #define QLCNIC_LB_CABLE_NOT_CONN 54
946 #define QLCNIC_ILB_MAX_RCV_LOOP 10
947
948 struct qlcnic_filter {
949 struct hlist_node fnode;
950 u8 faddr[ETH_ALEN];
951 u16 vlan_id;
952 unsigned long ftime;
953 };
954
955 struct qlcnic_filter_hash {
956 struct hlist_head *fhead;
957 u8 fnum;
958 u16 fmax;
959 u16 fbucket_size;
960 };
961
962 struct qlcnic_adapter {
963 struct qlcnic_hardware_context *ahw;
964 struct qlcnic_recv_context *recv_ctx;
965 struct qlcnic_host_tx_ring *tx_ring;
966 struct net_device *netdev;
967 struct pci_dev *pdev;
968
969 unsigned long state;
970 u32 flags;
971
972 int max_drv_tx_rings;
973 u16 num_txd;
974 u16 num_rxd;
975 u16 num_jumbo_rxd;
976 u16 max_rxd;
977 u16 max_jumbo_rxd;
978
979 u8 max_rds_rings;
980 u8 max_sds_rings;
981 u8 rx_csum;
982 u8 portnum;
983
984 u8 fw_wait_cnt;
985 u8 fw_fail_cnt;
986 u8 tx_timeo_cnt;
987 u8 need_fw_reset;
988 u8 reset_ctx_cnt;
989
990 u16 is_up;
991 u16 rx_pvid;
992 u16 tx_pvid;
993
994 u32 irq;
995 u32 heartbeat;
996
997 u8 dev_state;
998 u8 reset_ack_timeo;
999 u8 dev_init_timeo;
1000
1001 u8 mac_addr[ETH_ALEN];
1002
1003 u64 dev_rst_time;
1004 bool drv_mac_learn;
1005 bool fdb_mac_learn;
1006 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
1007 u8 flash_mfg_id;
1008 struct qlcnic_npar_info *npars;
1009 struct qlcnic_eswitch *eswitch;
1010 struct qlcnic_nic_template *nic_ops;
1011
1012 struct qlcnic_adapter_stats stats;
1013 struct list_head mac_list;
1014
1015 void __iomem *tgt_mask_reg;
1016 void __iomem *tgt_status_reg;
1017 void __iomem *crb_int_state_reg;
1018 void __iomem *isr_int_vec;
1019
1020 struct msix_entry *msix_entries;
1021 struct workqueue_struct *qlcnic_wq;
1022 struct delayed_work fw_work;
1023 struct delayed_work idc_aen_work;
1024 struct delayed_work mbx_poll_work;
1025
1026 struct qlcnic_filter_hash fhash;
1027 struct qlcnic_filter_hash rx_fhash;
1028 struct list_head vf_mc_list;
1029
1030 spinlock_t tx_clean_lock;
1031 spinlock_t mac_learn_lock;
1032 /* spinlock for catching rcv filters for eswitch traffic */
1033 spinlock_t rx_mac_learn_lock;
1034 u32 file_prd_off; /*File fw product offset*/
1035 u32 fw_version;
1036 const struct firmware *fw;
1037 };
1038
1039 struct qlcnic_info_le {
1040 __le16 pci_func;
1041 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1042 __le16 phys_port;
1043 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1044
1045 __le32 capabilities;
1046 u8 max_mac_filters;
1047 u8 reserved1;
1048 __le16 max_mtu;
1049
1050 __le16 max_tx_ques;
1051 __le16 max_rx_ques;
1052 __le16 min_tx_bw;
1053 __le16 max_tx_bw;
1054 __le32 op_type;
1055 __le16 max_bw_reg_offset;
1056 __le16 max_linkspeed_reg_offset;
1057 __le32 capability1;
1058 __le32 capability2;
1059 __le32 capability3;
1060 __le16 max_tx_mac_filters;
1061 __le16 max_rx_mcast_mac_filters;
1062 __le16 max_rx_ucast_mac_filters;
1063 __le16 max_rx_ip_addr;
1064 __le16 max_rx_lro_flow;
1065 __le16 max_rx_status_rings;
1066 __le16 max_rx_buf_rings;
1067 __le16 max_tx_vlan_keys;
1068 u8 total_pf;
1069 u8 total_rss_engines;
1070 __le16 max_vports;
1071 __le16 linkstate_reg_offset;
1072 __le16 bit_offsets;
1073 __le16 max_local_ipv6_addrs;
1074 __le16 max_remote_ipv6_addrs;
1075 u8 reserved2[56];
1076 } __packed;
1077
1078 struct qlcnic_info {
1079 u16 pci_func;
1080 u16 op_mode;
1081 u16 phys_port;
1082 u16 switch_mode;
1083 u32 capabilities;
1084 u8 max_mac_filters;
1085 u16 max_mtu;
1086 u16 max_tx_ques;
1087 u16 max_rx_ques;
1088 u16 min_tx_bw;
1089 u16 max_tx_bw;
1090 u32 op_type;
1091 u16 max_bw_reg_offset;
1092 u16 max_linkspeed_reg_offset;
1093 u32 capability1;
1094 u32 capability2;
1095 u32 capability3;
1096 u16 max_tx_mac_filters;
1097 u16 max_rx_mcast_mac_filters;
1098 u16 max_rx_ucast_mac_filters;
1099 u16 max_rx_ip_addr;
1100 u16 max_rx_lro_flow;
1101 u16 max_rx_status_rings;
1102 u16 max_rx_buf_rings;
1103 u16 max_tx_vlan_keys;
1104 u8 total_pf;
1105 u8 total_rss_engines;
1106 u16 max_vports;
1107 u16 linkstate_reg_offset;
1108 u16 bit_offsets;
1109 u16 max_local_ipv6_addrs;
1110 u16 max_remote_ipv6_addrs;
1111 };
1112
1113 struct qlcnic_pci_info_le {
1114 __le16 id; /* pci function id */
1115 __le16 active; /* 1 = Enabled */
1116 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1117 __le16 default_port; /* default port number */
1118
1119 __le16 tx_min_bw; /* Multiple of 100mbpc */
1120 __le16 tx_max_bw;
1121 __le16 reserved1[2];
1122
1123 u8 mac[ETH_ALEN];
1124 __le16 func_count;
1125 u8 reserved2[104];
1126
1127 } __packed;
1128
1129 struct qlcnic_pci_info {
1130 u16 id;
1131 u16 active;
1132 u16 type;
1133 u16 default_port;
1134 u16 tx_min_bw;
1135 u16 tx_max_bw;
1136 u8 mac[ETH_ALEN];
1137 u16 func_count;
1138 };
1139
1140 struct qlcnic_npar_info {
1141 u16 pvid;
1142 u16 min_bw;
1143 u16 max_bw;
1144 u8 phy_port;
1145 u8 type;
1146 u8 active;
1147 u8 enable_pm;
1148 u8 dest_npar;
1149 u8 discard_tagged;
1150 u8 mac_override;
1151 u8 mac_anti_spoof;
1152 u8 promisc_mode;
1153 u8 offload_flags;
1154 u8 pci_func;
1155 };
1156
1157 struct qlcnic_eswitch {
1158 u8 port;
1159 u8 active_vports;
1160 u8 active_vlans;
1161 u8 active_ucast_filters;
1162 u8 max_ucast_filters;
1163 u8 max_active_vlans;
1164
1165 u32 flags;
1166 #define QLCNIC_SWITCH_ENABLE BIT_1
1167 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1168 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1169 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1170 };
1171
1172
1173 /* Return codes for Error handling */
1174 #define QL_STATUS_INVALID_PARAM -1
1175
1176 #define MAX_BW 100 /* % of link speed */
1177 #define MAX_VLAN_ID 4095
1178 #define MIN_VLAN_ID 2
1179 #define DEFAULT_MAC_LEARN 1
1180
1181 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1182 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1183
1184 struct qlcnic_pci_func_cfg {
1185 u16 func_type;
1186 u16 min_bw;
1187 u16 max_bw;
1188 u16 port_num;
1189 u8 pci_func;
1190 u8 func_state;
1191 u8 def_mac_addr[6];
1192 };
1193
1194 struct qlcnic_npar_func_cfg {
1195 u32 fw_capab;
1196 u16 port_num;
1197 u16 min_bw;
1198 u16 max_bw;
1199 u16 max_tx_queues;
1200 u16 max_rx_queues;
1201 u8 pci_func;
1202 u8 op_mode;
1203 };
1204
1205 struct qlcnic_pm_func_cfg {
1206 u8 pci_func;
1207 u8 action;
1208 u8 dest_npar;
1209 u8 reserved[5];
1210 };
1211
1212 struct qlcnic_esw_func_cfg {
1213 u16 vlan_id;
1214 u8 op_mode;
1215 u8 op_type;
1216 u8 pci_func;
1217 u8 host_vlan_tag;
1218 u8 promisc_mode;
1219 u8 discard_tagged;
1220 u8 mac_override;
1221 u8 mac_anti_spoof;
1222 u8 offload_flags;
1223 u8 reserved[5];
1224 };
1225
1226 #define QLCNIC_STATS_VERSION 1
1227 #define QLCNIC_STATS_PORT 1
1228 #define QLCNIC_STATS_ESWITCH 2
1229 #define QLCNIC_QUERY_RX_COUNTER 0
1230 #define QLCNIC_QUERY_TX_COUNTER 1
1231 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1232 #define QLCNIC_FILL_STATS(VAL1) \
1233 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1234 #define QLCNIC_MAC_STATS 1
1235 #define QLCNIC_ESW_STATS 2
1236
1237 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1238 do { \
1239 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1240 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1241 (VAL1) = (VAL2); \
1242 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1243 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1244 (VAL1) += (VAL2); \
1245 } while (0)
1246
1247 struct qlcnic_mac_statistics_le {
1248 __le64 mac_tx_frames;
1249 __le64 mac_tx_bytes;
1250 __le64 mac_tx_mcast_pkts;
1251 __le64 mac_tx_bcast_pkts;
1252 __le64 mac_tx_pause_cnt;
1253 __le64 mac_tx_ctrl_pkt;
1254 __le64 mac_tx_lt_64b_pkts;
1255 __le64 mac_tx_lt_127b_pkts;
1256 __le64 mac_tx_lt_255b_pkts;
1257 __le64 mac_tx_lt_511b_pkts;
1258 __le64 mac_tx_lt_1023b_pkts;
1259 __le64 mac_tx_lt_1518b_pkts;
1260 __le64 mac_tx_gt_1518b_pkts;
1261 __le64 rsvd1[3];
1262
1263 __le64 mac_rx_frames;
1264 __le64 mac_rx_bytes;
1265 __le64 mac_rx_mcast_pkts;
1266 __le64 mac_rx_bcast_pkts;
1267 __le64 mac_rx_pause_cnt;
1268 __le64 mac_rx_ctrl_pkt;
1269 __le64 mac_rx_lt_64b_pkts;
1270 __le64 mac_rx_lt_127b_pkts;
1271 __le64 mac_rx_lt_255b_pkts;
1272 __le64 mac_rx_lt_511b_pkts;
1273 __le64 mac_rx_lt_1023b_pkts;
1274 __le64 mac_rx_lt_1518b_pkts;
1275 __le64 mac_rx_gt_1518b_pkts;
1276 __le64 rsvd2[3];
1277
1278 __le64 mac_rx_length_error;
1279 __le64 mac_rx_length_small;
1280 __le64 mac_rx_length_large;
1281 __le64 mac_rx_jabber;
1282 __le64 mac_rx_dropped;
1283 __le64 mac_rx_crc_error;
1284 __le64 mac_align_error;
1285 } __packed;
1286
1287 struct qlcnic_mac_statistics {
1288 u64 mac_tx_frames;
1289 u64 mac_tx_bytes;
1290 u64 mac_tx_mcast_pkts;
1291 u64 mac_tx_bcast_pkts;
1292 u64 mac_tx_pause_cnt;
1293 u64 mac_tx_ctrl_pkt;
1294 u64 mac_tx_lt_64b_pkts;
1295 u64 mac_tx_lt_127b_pkts;
1296 u64 mac_tx_lt_255b_pkts;
1297 u64 mac_tx_lt_511b_pkts;
1298 u64 mac_tx_lt_1023b_pkts;
1299 u64 mac_tx_lt_1518b_pkts;
1300 u64 mac_tx_gt_1518b_pkts;
1301 u64 rsvd1[3];
1302 u64 mac_rx_frames;
1303 u64 mac_rx_bytes;
1304 u64 mac_rx_mcast_pkts;
1305 u64 mac_rx_bcast_pkts;
1306 u64 mac_rx_pause_cnt;
1307 u64 mac_rx_ctrl_pkt;
1308 u64 mac_rx_lt_64b_pkts;
1309 u64 mac_rx_lt_127b_pkts;
1310 u64 mac_rx_lt_255b_pkts;
1311 u64 mac_rx_lt_511b_pkts;
1312 u64 mac_rx_lt_1023b_pkts;
1313 u64 mac_rx_lt_1518b_pkts;
1314 u64 mac_rx_gt_1518b_pkts;
1315 u64 rsvd2[3];
1316 u64 mac_rx_length_error;
1317 u64 mac_rx_length_small;
1318 u64 mac_rx_length_large;
1319 u64 mac_rx_jabber;
1320 u64 mac_rx_dropped;
1321 u64 mac_rx_crc_error;
1322 u64 mac_align_error;
1323 };
1324
1325 struct qlcnic_esw_stats_le {
1326 __le16 context_id;
1327 __le16 version;
1328 __le16 size;
1329 __le16 unused;
1330 __le64 unicast_frames;
1331 __le64 multicast_frames;
1332 __le64 broadcast_frames;
1333 __le64 dropped_frames;
1334 __le64 errors;
1335 __le64 local_frames;
1336 __le64 numbytes;
1337 __le64 rsvd[3];
1338 } __packed;
1339
1340 struct __qlcnic_esw_statistics {
1341 u16 context_id;
1342 u16 version;
1343 u16 size;
1344 u16 unused;
1345 u64 unicast_frames;
1346 u64 multicast_frames;
1347 u64 broadcast_frames;
1348 u64 dropped_frames;
1349 u64 errors;
1350 u64 local_frames;
1351 u64 numbytes;
1352 u64 rsvd[3];
1353 };
1354
1355 struct qlcnic_esw_statistics {
1356 struct __qlcnic_esw_statistics rx;
1357 struct __qlcnic_esw_statistics tx;
1358 };
1359
1360 #define QLCNIC_DUMP_MASK_DEF 0x1f
1361 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1362 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1363 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1364 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1365 #define QLCNIC_SET_QUIESCENT 0xadd00010
1366 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1367
1368 struct _cdrp_cmd {
1369 u32 num;
1370 u32 *arg;
1371 };
1372
1373 struct qlcnic_cmd_args {
1374 struct _cdrp_cmd req;
1375 struct _cdrp_cmd rsp;
1376 int op_type;
1377 };
1378
1379 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1380 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1381 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1382 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1383 void qlcnic_pci_camqm_read_2M(struct qlcnic_adapter *, u64, u64 *);
1384 void qlcnic_pci_camqm_write_2M(struct qlcnic_adapter *, u64, u64);
1385
1386 #define ADDR_IN_RANGE(addr, low, high) \
1387 (((addr) < (high)) && ((addr) >= (low)))
1388
1389 #define QLCRD32(adapter, off) \
1390 (adapter->ahw->hw_ops->read_reg)(adapter, off)
1391
1392 #define QLCWR32(adapter, off, val) \
1393 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1394
1395 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1396 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1397
1398 #define qlcnic_rom_lock(a) \
1399 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1400 #define qlcnic_rom_unlock(a) \
1401 qlcnic_pcie_sem_unlock((a), 2)
1402 #define qlcnic_phy_lock(a) \
1403 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1404 #define qlcnic_phy_unlock(a) \
1405 qlcnic_pcie_sem_unlock((a), 3)
1406 #define qlcnic_sw_lock(a) \
1407 qlcnic_pcie_sem_lock((a), 6, 0)
1408 #define qlcnic_sw_unlock(a) \
1409 qlcnic_pcie_sem_unlock((a), 6)
1410 #define crb_win_lock(a) \
1411 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1412 #define crb_win_unlock(a) \
1413 qlcnic_pcie_sem_unlock((a), 7)
1414
1415 #define __QLCNIC_MAX_LED_RATE 0xf
1416 #define __QLCNIC_MAX_LED_STATE 0x2
1417
1418 #define MAX_CTL_CHECK 1000
1419
1420 int qlcnic_wol_supported(struct qlcnic_adapter *adapter);
1421 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1422 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1423 int qlcnic_dump_fw(struct qlcnic_adapter *);
1424
1425 /* Functions from qlcnic_init.c */
1426 void qlcnic_schedule_work(struct qlcnic_adapter *, work_func_t, int);
1427 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1428 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1429 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1430 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1431 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1432 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1433 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1434
1435 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1436 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1437 u8 *bytes, size_t size);
1438 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1439 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1440
1441 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1442
1443 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1444 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1445
1446 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1447 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1448
1449 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1450 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1451 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter);
1452
1453 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1454 void qlcnic_watchdog_task(struct work_struct *work);
1455 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1456 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1457 int qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max);
1458 void qlcnic_set_multi(struct net_device *netdev);
1459 void __qlcnic_set_multi(struct net_device *, u16);
1460 int qlcnic_nic_add_mac(struct qlcnic_adapter *, const u8 *, u16);
1461 int qlcnic_nic_del_mac(struct qlcnic_adapter *, const u8 *);
1462 void qlcnic_82xx_free_mac_list(struct qlcnic_adapter *adapter);
1463
1464 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1465 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *);
1466 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1467 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1468 netdev_features_t features);
1469 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1470 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1471 int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter);
1472 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1473
1474 /* Functions from qlcnic_ethtool.c */
1475 int qlcnic_check_loopback_buff(unsigned char *, u8 []);
1476 int qlcnic_do_lb_test(struct qlcnic_adapter *, u8);
1477 int qlcnic_loopback_test(struct net_device *, u8);
1478
1479 /* Functions from qlcnic_main.c */
1480 int qlcnic_reset_context(struct qlcnic_adapter *);
1481 void qlcnic_diag_free_res(struct net_device *netdev, int max_sds_rings);
1482 int qlcnic_diag_alloc_res(struct net_device *netdev, int test);
1483 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
1484 int qlcnic_set_max_rss(struct qlcnic_adapter *, u8, size_t);
1485 int qlcnic_validate_max_rss(struct qlcnic_adapter *, __u32);
1486 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1487 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1488
1489 /* eSwitch management functions */
1490 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1491 struct qlcnic_esw_func_cfg *);
1492
1493 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1494 struct qlcnic_esw_func_cfg *);
1495 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1496 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1497 struct __qlcnic_esw_statistics *);
1498 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1499 struct __qlcnic_esw_statistics *);
1500 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1501 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1502
1503 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1504
1505 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1506 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1507 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1508 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1509 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1510
1511 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1512 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1513 void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter);
1514 void qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter);
1515 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1516 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1517
1518 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1519 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1520 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1521 struct qlcnic_esw_func_cfg *);
1522 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1523 struct qlcnic_esw_func_cfg *);
1524
1525 void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1526 int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1527 void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1528 void qlcnic_detach(struct qlcnic_adapter *);
1529 void qlcnic_teardown_intr(struct qlcnic_adapter *);
1530 int qlcnic_attach(struct qlcnic_adapter *);
1531 int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1532 void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1533
1534 int qlcnic_check_temp(struct qlcnic_adapter *);
1535 int qlcnic_init_pci_info(struct qlcnic_adapter *);
1536 int qlcnic_set_default_offload_settings(struct qlcnic_adapter *);
1537 int qlcnic_reset_npar_config(struct qlcnic_adapter *);
1538 int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *);
1539 void qlcnic_add_lb_filter(struct qlcnic_adapter *, struct sk_buff *, int, u16);
1540 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
1541 int qlcnic_read_mac_addr(struct qlcnic_adapter *);
1542 int qlcnic_setup_netdev(struct qlcnic_adapter *, struct net_device *, int);
1543 void qlcnic_sriov_vf_schedule_multi(struct net_device *);
1544 void qlcnic_vf_add_mc_list(struct net_device *, u16);
1545
1546 /*
1547 * QLOGIC Board information
1548 */
1549
1550 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1551 struct qlcnic_board_info {
1552 unsigned short vendor;
1553 unsigned short device;
1554 unsigned short sub_vendor;
1555 unsigned short sub_device;
1556 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1557 };
1558
1559 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1560 {
1561 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1562 return tx_ring->sw_consumer - tx_ring->producer;
1563 else
1564 return tx_ring->sw_consumer + tx_ring->num_desc -
1565 tx_ring->producer;
1566 }
1567
1568 struct qlcnic_nic_template {
1569 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1570 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1571 int (*start_firmware) (struct qlcnic_adapter *);
1572 int (*init_driver) (struct qlcnic_adapter *);
1573 void (*request_reset) (struct qlcnic_adapter *, u32);
1574 void (*cancel_idc_work) (struct qlcnic_adapter *);
1575 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1576 void (*napi_del)(struct qlcnic_adapter *);
1577 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1578 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1579 };
1580
1581 /* Adapter hardware abstraction */
1582 struct qlcnic_hardware_ops {
1583 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1584 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1585 int (*read_reg) (struct qlcnic_adapter *, ulong);
1586 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1587 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1588 int (*get_mac_address) (struct qlcnic_adapter *, u8 *);
1589 int (*setup_intr) (struct qlcnic_adapter *, u8);
1590 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1591 struct qlcnic_adapter *, u32);
1592 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1593 void (*get_func_no) (struct qlcnic_adapter *);
1594 int (*api_lock) (struct qlcnic_adapter *);
1595 void (*api_unlock) (struct qlcnic_adapter *);
1596 void (*add_sysfs) (struct qlcnic_adapter *);
1597 void (*remove_sysfs) (struct qlcnic_adapter *);
1598 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1599 int (*create_rx_ctx) (struct qlcnic_adapter *);
1600 int (*create_tx_ctx) (struct qlcnic_adapter *,
1601 struct qlcnic_host_tx_ring *, int);
1602 void (*del_rx_ctx) (struct qlcnic_adapter *);
1603 void (*del_tx_ctx) (struct qlcnic_adapter *,
1604 struct qlcnic_host_tx_ring *);
1605 int (*setup_link_event) (struct qlcnic_adapter *, int);
1606 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1607 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1608 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1609 int (*change_macvlan) (struct qlcnic_adapter *, u8*, u16, u8);
1610 void (*napi_enable) (struct qlcnic_adapter *);
1611 void (*napi_disable) (struct qlcnic_adapter *);
1612 void (*config_intr_coal) (struct qlcnic_adapter *);
1613 int (*config_rss) (struct qlcnic_adapter *, int);
1614 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1615 int (*config_loopback) (struct qlcnic_adapter *, u8);
1616 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1617 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1618 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, u16);
1619 int (*get_board_info) (struct qlcnic_adapter *);
1620 void (*free_mac_list) (struct qlcnic_adapter *);
1621 };
1622
1623 extern struct qlcnic_nic_template qlcnic_vf_ops;
1624
1625 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1626 {
1627 return adapter->nic_ops->start_firmware(adapter);
1628 }
1629
1630 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1631 loff_t offset, size_t size)
1632 {
1633 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1634 }
1635
1636 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1637 loff_t offset, size_t size)
1638 {
1639 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1640 }
1641
1642 static inline int qlcnic_hw_read_wx_2M(struct qlcnic_adapter *adapter,
1643 ulong off)
1644 {
1645 return adapter->ahw->hw_ops->read_reg(adapter, off);
1646 }
1647
1648 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1649 ulong off, u32 data)
1650 {
1651 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1652 }
1653
1654 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1655 u8 *mac)
1656 {
1657 return adapter->ahw->hw_ops->get_mac_address(adapter, mac);
1658 }
1659
1660 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter, u8 num_intr)
1661 {
1662 return adapter->ahw->hw_ops->setup_intr(adapter, num_intr);
1663 }
1664
1665 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1666 struct qlcnic_adapter *adapter, u32 arg)
1667 {
1668 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1669 }
1670
1671 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1672 struct qlcnic_cmd_args *cmd)
1673 {
1674 if (adapter->ahw->hw_ops->mbx_cmd)
1675 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1676
1677 return -EIO;
1678 }
1679
1680 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1681 {
1682 adapter->ahw->hw_ops->get_func_no(adapter);
1683 }
1684
1685 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1686 {
1687 return adapter->ahw->hw_ops->api_lock(adapter);
1688 }
1689
1690 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1691 {
1692 adapter->ahw->hw_ops->api_unlock(adapter);
1693 }
1694
1695 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1696 {
1697 if (adapter->ahw->hw_ops->add_sysfs)
1698 adapter->ahw->hw_ops->add_sysfs(adapter);
1699 }
1700
1701 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1702 {
1703 if (adapter->ahw->hw_ops->remove_sysfs)
1704 adapter->ahw->hw_ops->remove_sysfs(adapter);
1705 }
1706
1707 static inline void
1708 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1709 {
1710 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1711 }
1712
1713 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1714 {
1715 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1716 }
1717
1718 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1719 struct qlcnic_host_tx_ring *ptr,
1720 int ring)
1721 {
1722 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1723 }
1724
1725 static inline void qlcnic_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
1726 {
1727 return adapter->ahw->hw_ops->del_rx_ctx(adapter);
1728 }
1729
1730 static inline void qlcnic_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
1731 struct qlcnic_host_tx_ring *ptr)
1732 {
1733 return adapter->ahw->hw_ops->del_tx_ctx(adapter, ptr);
1734 }
1735
1736 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1737 int enable)
1738 {
1739 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1740 }
1741
1742 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1743 struct qlcnic_info *info, u8 id)
1744 {
1745 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1746 }
1747
1748 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1749 struct qlcnic_pci_info *info)
1750 {
1751 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1752 }
1753
1754 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1755 struct qlcnic_info *info)
1756 {
1757 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1758 }
1759
1760 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1761 u8 *addr, u16 id, u8 cmd)
1762 {
1763 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1764 }
1765
1766 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1767 struct net_device *netdev)
1768 {
1769 return adapter->nic_ops->napi_add(adapter, netdev);
1770 }
1771
1772 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1773 {
1774 adapter->nic_ops->napi_del(adapter);
1775 }
1776
1777 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1778 {
1779 adapter->ahw->hw_ops->napi_enable(adapter);
1780 }
1781
1782 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
1783 {
1784 adapter->ahw->hw_ops->napi_disable(adapter);
1785 }
1786
1787 static inline void qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter)
1788 {
1789 adapter->ahw->hw_ops->config_intr_coal(adapter);
1790 }
1791
1792 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
1793 {
1794 return adapter->ahw->hw_ops->config_rss(adapter, enable);
1795 }
1796
1797 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
1798 int enable)
1799 {
1800 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
1801 }
1802
1803 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1804 {
1805 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
1806 }
1807
1808 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1809 {
1810 return adapter->ahw->hw_ops->clear_loopback(adapter, mode);
1811 }
1812
1813 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
1814 u32 mode)
1815 {
1816 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
1817 }
1818
1819 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
1820 u64 *addr, u16 id)
1821 {
1822 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
1823 }
1824
1825 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
1826 {
1827 return adapter->ahw->hw_ops->get_board_info(adapter);
1828 }
1829
1830 static inline void qlcnic_free_mac_list(struct qlcnic_adapter *adapter)
1831 {
1832 return adapter->ahw->hw_ops->free_mac_list(adapter);
1833 }
1834
1835 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
1836 u32 key)
1837 {
1838 if (adapter->nic_ops->request_reset)
1839 adapter->nic_ops->request_reset(adapter, key);
1840 }
1841
1842 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
1843 {
1844 if (adapter->nic_ops->cancel_idc_work)
1845 adapter->nic_ops->cancel_idc_work(adapter);
1846 }
1847
1848 static inline irqreturn_t
1849 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
1850 {
1851 return adapter->nic_ops->clear_legacy_intr(adapter);
1852 }
1853
1854 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
1855 u32 rate)
1856 {
1857 return adapter->nic_ops->config_led(adapter, state, rate);
1858 }
1859
1860 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
1861 __be32 ip, int cmd)
1862 {
1863 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
1864 }
1865
1866 static inline void qlcnic_disable_int(struct qlcnic_host_sds_ring *sds_ring)
1867 {
1868 writel(0, sds_ring->crb_intr_mask);
1869 }
1870
1871 static inline void qlcnic_enable_int(struct qlcnic_host_sds_ring *sds_ring)
1872 {
1873 struct qlcnic_adapter *adapter = sds_ring->adapter;
1874
1875 writel(0x1, sds_ring->crb_intr_mask);
1876
1877 if (!QLCNIC_IS_MSI_FAMILY(adapter))
1878 writel(0xfbff, adapter->tgt_mask_reg);
1879 }
1880
1881 extern const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops;
1882 extern const struct ethtool_ops qlcnic_ethtool_ops;
1883 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
1884
1885 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
1886 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
1887 printk(KERN_INFO "%s: %s: " _fmt, \
1888 dev_name(&adapter->pdev->dev), \
1889 __func__, ##_args); \
1890 } while (0)
1891
1892 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
1893 #define PCI_DEVICE_ID_QLOGIC_VF_QLE834X 0x8430
1894 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
1895
1896 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
1897 {
1898 unsigned short device = adapter->pdev->device;
1899 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
1900 }
1901
1902 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
1903 {
1904 unsigned short device = adapter->pdev->device;
1905 bool status;
1906
1907 status = ((device == PCI_DEVICE_ID_QLOGIC_QLE834X) ||
1908 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X)) ? true : false;
1909
1910 return status;
1911 }
1912
1913 static inline bool qlcnic_sriov_pf_check(struct qlcnic_adapter *adapter)
1914 {
1915 return (adapter->ahw->op_mode == QLCNIC_SRIOV_PF_FUNC) ? true : false;
1916 }
1917
1918 static inline bool qlcnic_sriov_vf_check(struct qlcnic_adapter *adapter)
1919 {
1920 unsigned short device = adapter->pdev->device;
1921
1922 return (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ? true : false;
1923 }
1924 #endif /* __QLCNIC_H_ */
kernel source for telekom puls (alcatel/mediatek)