projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ethernet / intel / ixgbe / ixgbe_dcb_nl.c
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "ixgbe.h"
30 #include <linux/dcbnl.h>
31 #include "ixgbe_dcb_82598.h"
32 #include "ixgbe_dcb_82599.h"
33
34 /* Callbacks for DCB netlink in the kernel */
35 #define BIT_DCB_MODE 0x01
36 #define BIT_PFC 0x02
37 #define BIT_PG_RX 0x04
38 #define BIT_PG_TX 0x08
39 #define BIT_APP_UPCHG 0x10
40 #define BIT_LINKSPEED 0x80
41
42 /* Responses for the DCB_C_SET_ALL command */
43 #define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44 #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45 #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
47 int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49 {
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
102 return 0;
103 }
104
105 static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106 {
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
109 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
110 }
111
112 static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
113 {
114 int err = 0;
115 u8 prio_tc[MAX_USER_PRIORITY] = {0};
116 int i;
117 struct ixgbe_adapter *adapter = netdev_priv(netdev);
118
119 /* Fail command if not in CEE mode */
120 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
121 return 1;
122
123 /* verify there is something to do, if not then exit */
124 if (!!state != !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
125 goto out;
126
127 if (state > 0) {
128 err = ixgbe_setup_tc(netdev, adapter->dcb_cfg.num_tcs.pg_tcs);
129 ixgbe_dcb_unpack_map(&adapter->dcb_cfg, DCB_TX_CONFIG, prio_tc);
130 } else {
131 err = ixgbe_setup_tc(netdev, 0);
132 }
133
134 if (err)
135 goto out;
136
137 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
138 netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
139
140 out:
141 return err ? 1 : 0;
142 }
143
144 static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
145 u8 *perm_addr)
146 {
147 struct ixgbe_adapter *adapter = netdev_priv(netdev);
148 int i, j;
149
150 memset(perm_addr, 0xff, MAX_ADDR_LEN);
151
152 for (i = 0; i < netdev->addr_len; i++)
153 perm_addr[i] = adapter->hw.mac.perm_addr[i];
154
155 switch (adapter->hw.mac.type) {
156 case ixgbe_mac_82599EB:
157 case ixgbe_mac_X540:
158 for (j = 0; j < netdev->addr_len; j++, i++)
159 perm_addr[i] = adapter->hw.mac.san_addr[j];
160 break;
161 default:
162 break;
163 }
164 }
165
166 static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
167 u8 prio, u8 bwg_id, u8 bw_pct,
168 u8 up_map)
169 {
170 struct ixgbe_adapter *adapter = netdev_priv(netdev);
171
172 if (prio != DCB_ATTR_VALUE_UNDEFINED)
173 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
174 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
175 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
176 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
177 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
178 bw_pct;
179 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
180 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
181 up_map;
182
183 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
184 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
185 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
186 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
187 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
188 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
189 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
190 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap))
191 adapter->dcb_set_bitmap |= BIT_PG_TX;
192
193 if (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
194 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)
195 adapter->dcb_set_bitmap |= BIT_PFC | BIT_APP_UPCHG;
196 }
197
198 static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
199 u8 bw_pct)
200 {
201 struct ixgbe_adapter *adapter = netdev_priv(netdev);
202
203 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
204
205 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
206 adapter->dcb_cfg.bw_percentage[0][bwg_id])
207 adapter->dcb_set_bitmap |= BIT_PG_TX;
208 }
209
210 static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
211 u8 prio, u8 bwg_id, u8 bw_pct,
212 u8 up_map)
213 {
214 struct ixgbe_adapter *adapter = netdev_priv(netdev);
215
216 if (prio != DCB_ATTR_VALUE_UNDEFINED)
217 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
218 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
219 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
220 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
221 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
222 bw_pct;
223 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
224 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
225 up_map;
226
227 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
228 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
229 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
230 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
231 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
232 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
233 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
234 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap))
235 adapter->dcb_set_bitmap |= BIT_PG_RX;
236
237 if (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
238 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)
239 adapter->dcb_set_bitmap |= BIT_PFC;
240 }
241
242 static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
243 u8 bw_pct)
244 {
245 struct ixgbe_adapter *adapter = netdev_priv(netdev);
246
247 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
248
249 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
250 adapter->dcb_cfg.bw_percentage[1][bwg_id])
251 adapter->dcb_set_bitmap |= BIT_PG_RX;
252 }
253
254 static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
255 u8 *prio, u8 *bwg_id, u8 *bw_pct,
256 u8 *up_map)
257 {
258 struct ixgbe_adapter *adapter = netdev_priv(netdev);
259
260 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
261 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
262 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
263 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
264 }
265
266 static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
267 u8 *bw_pct)
268 {
269 struct ixgbe_adapter *adapter = netdev_priv(netdev);
270
271 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
272 }
273
274 static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
275 u8 *prio, u8 *bwg_id, u8 *bw_pct,
276 u8 *up_map)
277 {
278 struct ixgbe_adapter *adapter = netdev_priv(netdev);
279
280 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
281 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
282 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
283 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
284 }
285
286 static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
287 u8 *bw_pct)
288 {
289 struct ixgbe_adapter *adapter = netdev_priv(netdev);
290
291 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
292 }
293
294 static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
295 u8 setting)
296 {
297 struct ixgbe_adapter *adapter = netdev_priv(netdev);
298
299 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
300 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
301 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
302 adapter->dcb_set_bitmap |= BIT_PFC;
303 adapter->temp_dcb_cfg.pfc_mode_enable = true;
304 }
305 }
306
307 static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
308 u8 *setting)
309 {
310 struct ixgbe_adapter *adapter = netdev_priv(netdev);
311
312 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
313 }
314
315 #ifdef IXGBE_FCOE
316 static void ixgbe_dcbnl_devreset(struct net_device *dev)
317 {
318 struct ixgbe_adapter *adapter = netdev_priv(dev);
319
320 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
321 usleep_range(1000, 2000);
322
323 if (netif_running(dev))
324 dev->netdev_ops->ndo_stop(dev);
325
326 ixgbe_clear_interrupt_scheme(adapter);
327 ixgbe_init_interrupt_scheme(adapter);
328
329 if (netif_running(dev))
330 dev->netdev_ops->ndo_open(dev);
331
332 clear_bit(__IXGBE_RESETTING, &adapter->state);
333 }
334 #endif
335
336 static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
337 {
338 struct ixgbe_adapter *adapter = netdev_priv(netdev);
339 int ret, i;
340 #ifdef IXGBE_FCOE
341 struct dcb_app app = {
342 .selector = DCB_APP_IDTYPE_ETHTYPE,
343 .protocol = ETH_P_FCOE,
344 };
345 u8 up;
346
347 /* In IEEE mode, use the IEEE Ethertype selector value */
348 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) {
349 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
350 up = dcb_ieee_getapp_mask(netdev, &app);
351 } else {
352 up = dcb_getapp(netdev, &app);
353 }
354 #endif
355
356 /* Fail command if not in CEE mode */
357 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
358 return 1;
359
360 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
361 MAX_TRAFFIC_CLASS);
362 if (ret)
363 return DCB_NO_HW_CHG;
364
365 if (adapter->dcb_cfg.pfc_mode_enable) {
366 switch (adapter->hw.mac.type) {
367 case ixgbe_mac_82599EB:
368 case ixgbe_mac_X540:
369 if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
370 adapter->last_lfc_mode =
371 adapter->hw.fc.current_mode;
372 break;
373 default:
374 break;
375 }
376 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
377 } else {
378 switch (adapter->hw.mac.type) {
379 case ixgbe_mac_82598EB:
380 adapter->hw.fc.requested_mode = ixgbe_fc_none;
381 break;
382 case ixgbe_mac_82599EB:
383 case ixgbe_mac_X540:
384 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
385 break;
386 default:
387 break;
388 }
389 }
390
391 if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
392 u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
393 u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
394 /* Priority to TC mapping in CEE case default to 1:1 */
395 u8 prio_tc[MAX_USER_PRIORITY];
396 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
397
398 #ifdef IXGBE_FCOE
399 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
400 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
401 #endif
402
403 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
404 max_frame, DCB_TX_CONFIG);
405 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
406 max_frame, DCB_RX_CONFIG);
407
408 ixgbe_dcb_unpack_refill(&adapter->dcb_cfg,
409 DCB_TX_CONFIG, refill);
410 ixgbe_dcb_unpack_max(&adapter->dcb_cfg, max);
411 ixgbe_dcb_unpack_bwgid(&adapter->dcb_cfg,
412 DCB_TX_CONFIG, bwg_id);
413 ixgbe_dcb_unpack_prio(&adapter->dcb_cfg,
414 DCB_TX_CONFIG, prio_type);
415 ixgbe_dcb_unpack_map(&adapter->dcb_cfg,
416 DCB_TX_CONFIG, prio_tc);
417
418 ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
419 bwg_id, prio_type, prio_tc);
420
421 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
422 netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
423 }
424
425 if (adapter->dcb_set_bitmap & BIT_PFC) {
426 u8 pfc_en;
427 u8 prio_tc[MAX_USER_PRIORITY];
428
429 ixgbe_dcb_unpack_map(&adapter->dcb_cfg,
430 DCB_TX_CONFIG, prio_tc);
431 ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
432 ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en, prio_tc);
433 ret = DCB_HW_CHG;
434 }
435
436 if (adapter->dcb_cfg.pfc_mode_enable)
437 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
438
439 #ifdef IXGBE_FCOE
440 /* Reprogam FCoE hardware offloads when the traffic class
441 * FCoE is using changes. This happens if the APP info
442 * changes or the up2tc mapping is updated.
443 */
444 if ((up && !(up & (1 << adapter->fcoe.up))) ||
445 (adapter->dcb_set_bitmap & BIT_APP_UPCHG)) {
446 adapter->fcoe.up = ffs(up) - 1;
447 ixgbe_dcbnl_devreset(netdev);
448 ret = DCB_HW_CHG_RST;
449 }
450 #endif
451
452 adapter->dcb_set_bitmap = 0x00;
453 return ret;
454 }
455
456 static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
457 {
458 struct ixgbe_adapter *adapter = netdev_priv(netdev);
459
460 switch (capid) {
461 case DCB_CAP_ATTR_PG:
462 *cap = true;
463 break;
464 case DCB_CAP_ATTR_PFC:
465 *cap = true;
466 break;
467 case DCB_CAP_ATTR_UP2TC:
468 *cap = false;
469 break;
470 case DCB_CAP_ATTR_PG_TCS:
471 *cap = 0x80;
472 break;
473 case DCB_CAP_ATTR_PFC_TCS:
474 *cap = 0x80;
475 break;
476 case DCB_CAP_ATTR_GSP:
477 *cap = true;
478 break;
479 case DCB_CAP_ATTR_BCN:
480 *cap = false;
481 break;
482 case DCB_CAP_ATTR_DCBX:
483 *cap = adapter->dcbx_cap;
484 break;
485 default:
486 *cap = false;
487 break;
488 }
489
490 return 0;
491 }
492
493 static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
494 {
495 struct ixgbe_adapter *adapter = netdev_priv(netdev);
496 u8 rval = 0;
497
498 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
499 switch (tcid) {
500 case DCB_NUMTCS_ATTR_PG:
501 *num = adapter->dcb_cfg.num_tcs.pg_tcs;
502 break;
503 case DCB_NUMTCS_ATTR_PFC:
504 *num = adapter->dcb_cfg.num_tcs.pfc_tcs;
505 break;
506 default:
507 rval = -EINVAL;
508 break;
509 }
510 } else {
511 rval = -EINVAL;
512 }
513
514 return rval;
515 }
516
517 static int ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
518 {
519 return -EINVAL;
520 }
521
522 static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
523 {
524 struct ixgbe_adapter *adapter = netdev_priv(netdev);
525
526 return adapter->dcb_cfg.pfc_mode_enable;
527 }
528
529 static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
530 {
531 struct ixgbe_adapter *adapter = netdev_priv(netdev);
532
533 adapter->temp_dcb_cfg.pfc_mode_enable = state;
534 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
535 adapter->dcb_cfg.pfc_mode_enable)
536 adapter->dcb_set_bitmap |= BIT_PFC;
537 }
538
539 /**
540 * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
541 * @netdev : the corresponding netdev
542 * @idtype : identifies the id as ether type or TCP/UDP port number
543 * @id: id is either ether type or TCP/UDP port number
544 *
545 * Returns : on success, returns a non-zero 802.1p user priority bitmap
546 * otherwise returns 0 as the invalid user priority bitmap to indicate an
547 * error.
548 */
549 static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
550 {
551 struct ixgbe_adapter *adapter = netdev_priv(netdev);
552 struct dcb_app app = {
553 .selector = idtype,
554 .protocol = id,
555 };
556
557 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
558 return 0;
559
560 return dcb_getapp(netdev, &app);
561 }
562
563 static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
564 struct ieee_ets *ets)
565 {
566 struct ixgbe_adapter *adapter = netdev_priv(dev);
567 struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
568
569 ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs;
570
571 /* No IEEE PFC settings available */
572 if (!my_ets)
573 return 0;
574
575 ets->cbs = my_ets->cbs;
576 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
577 memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
578 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
579 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
580 return 0;
581 }
582
583 static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
584 struct ieee_ets *ets)
585 {
586 struct ixgbe_adapter *adapter = netdev_priv(dev);
587 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
588 int i, err = 0;
589 __u8 max_tc = 0;
590
591 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
592 return -EINVAL;
593
594 if (!adapter->ixgbe_ieee_ets) {
595 adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
596 GFP_KERNEL);
597 if (!adapter->ixgbe_ieee_ets)
598 return -ENOMEM;
599 }
600
601 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
602
603 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
604 if (ets->prio_tc[i] > max_tc)
605 max_tc = ets->prio_tc[i];
606 }
607
608 if (max_tc)
609 max_tc++;
610
611 if (max_tc > adapter->dcb_cfg.num_tcs.pg_tcs)
612 return -EINVAL;
613
614 if (max_tc != netdev_get_num_tc(dev))
615 err = ixgbe_setup_tc(dev, max_tc);
616
617 if (err)
618 goto err_out;
619
620 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
621 netdev_set_prio_tc_map(dev, i, ets->prio_tc[i]);
622
623 err = ixgbe_dcb_hw_ets(&adapter->hw, ets, max_frame);
624 err_out:
625 return err;
626 }
627
628 static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
629 struct ieee_pfc *pfc)
630 {
631 struct ixgbe_adapter *adapter = netdev_priv(dev);
632 struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
633 int i;
634
635 pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs;
636
637 /* No IEEE PFC settings available */
638 if (!my_pfc)
639 return 0;
640
641 pfc->pfc_en = my_pfc->pfc_en;
642 pfc->mbc = my_pfc->mbc;
643 pfc->delay = my_pfc->delay;
644
645 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
646 pfc->requests[i] = adapter->stats.pxoffrxc[i];
647 pfc->indications[i] = adapter->stats.pxofftxc[i];
648 }
649
650 return 0;
651 }
652
653 static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
654 struct ieee_pfc *pfc)
655 {
656 struct ixgbe_adapter *adapter = netdev_priv(dev);
657 u8 *prio_tc;
658
659 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
660 return -EINVAL;
661
662 if (!adapter->ixgbe_ieee_pfc) {
663 adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
664 GFP_KERNEL);
665 if (!adapter->ixgbe_ieee_pfc)
666 return -ENOMEM;
667 }
668
669 prio_tc = adapter->ixgbe_ieee_ets->prio_tc;
670 memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
671 return ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en, prio_tc);
672 }
673
674 static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,
675 struct dcb_app *app)
676 {
677 struct ixgbe_adapter *adapter = netdev_priv(dev);
678 int err = -EINVAL;
679
680 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
681 return err;
682
683 err = dcb_ieee_setapp(dev, app);
684
685 #ifdef IXGBE_FCOE
686 if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
687 app->protocol == ETH_P_FCOE) {
688 u8 app_mask = dcb_ieee_getapp_mask(dev, app);
689
690 if (app_mask & (1 << adapter->fcoe.up))
691 return err;
692
693 adapter->fcoe.up = app->priority;
694 ixgbe_dcbnl_devreset(dev);
695 }
696 #endif
697 return 0;
698 }
699
700 static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev,
701 struct dcb_app *app)
702 {
703 struct ixgbe_adapter *adapter = netdev_priv(dev);
704 int err;
705
706 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
707 return -EINVAL;
708
709 err = dcb_ieee_delapp(dev, app);
710
711 #ifdef IXGBE_FCOE
712 if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
713 app->protocol == ETH_P_FCOE) {
714 u8 app_mask = dcb_ieee_getapp_mask(dev, app);
715
716 if (app_mask & (1 << adapter->fcoe.up))
717 return err;
718
719 adapter->fcoe.up = app_mask ?
720 ffs(app_mask) - 1 : IXGBE_FCOE_DEFTC;
721 ixgbe_dcbnl_devreset(dev);
722 }
723 #endif
724 return err;
725 }
726
727 static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev)
728 {
729 struct ixgbe_adapter *adapter = netdev_priv(dev);
730 return adapter->dcbx_cap;
731 }
732
733 static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode)
734 {
735 struct ixgbe_adapter *adapter = netdev_priv(dev);
736 struct ieee_ets ets = {0};
737 struct ieee_pfc pfc = {0};
738 int err = 0;
739
740 /* no support for LLD_MANAGED modes or CEE+IEEE */
741 if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
742 ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) ||
743 !(mode & DCB_CAP_DCBX_HOST))
744 return 1;
745
746 if (mode == adapter->dcbx_cap)
747 return 0;
748
749 adapter->dcbx_cap = mode;
750
751 /* ETS and PFC defaults */
752 ets.ets_cap = 8;
753 pfc.pfc_cap = 8;
754
755 if (mode & DCB_CAP_DCBX_VER_IEEE) {
756 ixgbe_dcbnl_ieee_setets(dev, &ets);
757 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
758 } else if (mode & DCB_CAP_DCBX_VER_CEE) {
759 u8 mask = BIT_PFC | BIT_PG_TX | BIT_PG_RX | BIT_APP_UPCHG;
760
761 adapter->dcb_set_bitmap |= mask;
762 ixgbe_dcbnl_set_all(dev);
763 } else {
764 /* Drop into single TC mode strict priority as this
765 * indicates CEE and IEEE versions are disabled
766 */
767 ixgbe_dcbnl_ieee_setets(dev, &ets);
768 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
769 err = ixgbe_setup_tc(dev, 0);
770 }
771
772 return err ? 1 : 0;
773 }
774
775 const struct dcbnl_rtnl_ops dcbnl_ops = {
776 .ieee_getets = ixgbe_dcbnl_ieee_getets,
777 .ieee_setets = ixgbe_dcbnl_ieee_setets,
778 .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
779 .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
780 .ieee_setapp = ixgbe_dcbnl_ieee_setapp,
781 .ieee_delapp = ixgbe_dcbnl_ieee_delapp,
782 .getstate = ixgbe_dcbnl_get_state,
783 .setstate = ixgbe_dcbnl_set_state,
784 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
785 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
786 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
787 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
788 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
789 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
790 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
791 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
792 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
793 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
794 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
795 .setall = ixgbe_dcbnl_set_all,
796 .getcap = ixgbe_dcbnl_getcap,
797 .getnumtcs = ixgbe_dcbnl_getnumtcs,
798 .setnumtcs = ixgbe_dcbnl_setnumtcs,
799 .getpfcstate = ixgbe_dcbnl_getpfcstate,
800 .setpfcstate = ixgbe_dcbnl_setpfcstate,
801 .getapp = ixgbe_dcbnl_getapp,
802 .getdcbx = ixgbe_dcbnl_getdcbx,
803 .setdcbx = ixgbe_dcbnl_setdcbx,
804 };
kernel source for telekom puls (alcatel/mediatek)