Input: sur40 - skip all blobs that are not touches
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / ethernet / aquantia / atlantic / hw_atl / hw_atl_utils.h
1 /*
2 * aQuantia Corporation Network Driver
3 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 */
9
10 /* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware
11 * abstraction layer.
12 */
13
14 #ifndef HW_ATL_UTILS_H
15 #define HW_ATL_UTILS_H
16
17 #include "../aq_common.h"
18
19 #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
20
21 struct __packed hw_atl_stats_s {
22 u32 uprc;
23 u32 mprc;
24 u32 bprc;
25 u32 erpt;
26 u32 uptc;
27 u32 mptc;
28 u32 bptc;
29 u32 erpr;
30 u32 mbtc;
31 u32 bbtc;
32 u32 mbrc;
33 u32 bbrc;
34 u32 ubrc;
35 u32 ubtc;
36 u32 dpc;
37 };
38
39 union __packed ip_addr {
40 struct {
41 u8 addr[16];
42 } v6;
43 struct {
44 u8 padding[12];
45 u8 addr[4];
46 } v4;
47 };
48
49 struct __packed hw_aq_atl_utils_fw_rpc {
50 u32 msg_id;
51
52 union {
53 struct {
54 u32 pong;
55 } msg_ping;
56
57 struct {
58 u8 mac_addr[6];
59 u32 ip_addr_cnt;
60
61 struct {
62 union ip_addr addr;
63 union ip_addr mask;
64 } ip[1];
65 } msg_arp;
66
67 struct {
68 u32 len;
69 u8 packet[1514U];
70 } msg_inject;
71
72 struct {
73 u32 priority;
74 u32 wol_packet_type;
75 u16 friendly_name_len;
76 u16 friendly_name[65];
77 u32 pattern_id;
78 u32 next_wol_pattern_offset;
79
80 union {
81 struct {
82 u32 flags;
83 u8 ipv4_source_address[4];
84 u8 ipv4_dest_address[4];
85 u16 tcp_source_port_number;
86 u16 tcp_dest_port_number;
87 } ipv4_tcp_syn_parameters;
88
89 struct {
90 u32 flags;
91 u8 ipv6_source_address[16];
92 u8 ipv6_dest_address[16];
93 u16 tcp_source_port_number;
94 u16 tcp_dest_port_number;
95 } ipv6_tcp_syn_parameters;
96
97 struct {
98 u32 flags;
99 } eapol_request_id_message_parameters;
100
101 struct {
102 u32 flags;
103 u32 mask_offset;
104 u32 mask_size;
105 u32 pattern_offset;
106 u32 pattern_size;
107 } wol_bit_map_pattern;
108 } wol_pattern;
109 } msg_wol;
110
111 struct {
112 u32 is_wake_on_link_down;
113 u32 is_wake_on_link_up;
114 } msg_wolink;
115 };
116 };
117
118 struct __packed hw_aq_atl_utils_mbox {
119 u32 version;
120 u32 transaction_id;
121 int error;
122 struct hw_atl_stats_s stats;
123 };
124
125 struct __packed hw_atl_s {
126 struct aq_hw_s base;
127 struct hw_aq_atl_utils_mbox mbox;
128 u64 speed;
129 u32 itr_tx;
130 u32 itr_rx;
131 unsigned int chip_features;
132 u32 fw_ver_actual;
133 atomic_t dpc;
134 u32 mbox_addr;
135 u32 rpc_addr;
136 u32 rpc_tid;
137 struct hw_aq_atl_utils_fw_rpc rpc;
138 };
139
140 #define SELF ((struct hw_atl_s *)self)
141
142 #define PHAL_ATLANTIC ((struct hw_atl_s *)((void *)(self)))
143 #define PHAL_ATLANTIC_A0 ((struct hw_atl_s *)((void *)(self)))
144 #define PHAL_ATLANTIC_B0 ((struct hw_atl_s *)((void *)(self)))
145
146 #define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U
147 #define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U
148 #define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U
149 #define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ 0x00000010U
150 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 0x01000000U
151 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U
152
153 #define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
154 PHAL_ATLANTIC->chip_features)
155
156 enum hal_atl_utils_fw_state_e {
157 MPI_DEINIT = 0,
158 MPI_RESET = 1,
159 MPI_INIT = 2,
160 MPI_POWER = 4,
161 };
162
163 #define HAL_ATLANTIC_RATE_10G BIT(0)
164 #define HAL_ATLANTIC_RATE_5G BIT(1)
165 #define HAL_ATLANTIC_RATE_5GSR BIT(2)
166 #define HAL_ATLANTIC_RATE_2GS BIT(3)
167 #define HAL_ATLANTIC_RATE_1G BIT(4)
168 #define HAL_ATLANTIC_RATE_100M BIT(5)
169 #define HAL_ATLANTIC_RATE_INVALID BIT(6)
170
171 void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p);
172
173 void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
174 struct hw_aq_atl_utils_mbox *pmbox);
175
176 void hw_atl_utils_mpi_set(struct aq_hw_s *self,
177 enum hal_atl_utils_fw_state_e state,
178 u32 speed);
179
180 int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed,
181 enum hal_atl_utils_fw_state_e state);
182
183 int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self,
184 struct aq_hw_link_status_s *link_status);
185
186 int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
187 struct aq_hw_caps_s *aq_hw_caps,
188 u8 *mac);
189
190 unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);
191
192 int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,
193 struct aq_hw_caps_s *aq_hw_caps,
194 u32 *regs_buff);
195
196 int hw_atl_utils_hw_get_settings(struct aq_hw_s *self,
197 struct ethtool_cmd *cmd);
198
199 int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
200 unsigned int power_state);
201
202 int hw_atl_utils_hw_deinit(struct aq_hw_s *self);
203
204 int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version);
205
206 int hw_atl_utils_get_hw_stats(struct aq_hw_s *self,
207 u64 *data,
208 unsigned int *p_count);
209
210 #endif /* HW_ATL_UTILS_H */