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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 #ifdef CONFIG_PCI_MSI
162 static irqreturn_t e1000_intr_msi(int irq, void *data);
163 #endif
164 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
166 #ifdef CONFIG_E1000_NAPI
167 static int e1000_clean(struct net_device *poll_dev, int *budget);
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int *work_done, int work_to_do);
171 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring,
173 int *work_done, int work_to_do);
174 #else
175 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 #endif
180 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
183 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
186 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
189 void e1000_set_ethtool_ops(struct net_device *netdev);
190 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_tx_timeout(struct net_device *dev);
193 static void e1000_reset_task(struct work_struct *work);
194 static void e1000_smartspeed(struct e1000_adapter *adapter);
195 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
197
198 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
203 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
204 #ifdef CONFIG_PM
205 static int e1000_resume(struct pci_dev *pdev);
206 #endif
207 static void e1000_shutdown(struct pci_dev *pdev);
208
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void e1000_netpoll (struct net_device *netdev);
212 #endif
213
214 extern void e1000_check_options(struct e1000_adapter *adapter);
215
216 #define COPYBREAK_DEFAULT 256
217 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
218 module_param(copybreak, uint, 0644);
219 MODULE_PARM_DESC(copybreak,
220 "Maximum size of packet that is copied to a new buffer on receive");
221
222 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
223 pci_channel_state_t state);
224 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
225 static void e1000_io_resume(struct pci_dev *pdev);
226
227 static struct pci_error_handlers e1000_err_handler = {
228 .error_detected = e1000_io_error_detected,
229 .slot_reset = e1000_io_slot_reset,
230 .resume = e1000_io_resume,
231 };
232
233 static struct pci_driver e1000_driver = {
234 .name = e1000_driver_name,
235 .id_table = e1000_pci_tbl,
236 .probe = e1000_probe,
237 .remove = __devexit_p(e1000_remove),
238 #ifdef CONFIG_PM
239 /* Power Managment Hooks */
240 .suspend = e1000_suspend,
241 .resume = e1000_resume,
242 #endif
243 .shutdown = e1000_shutdown,
244 .err_handler = &e1000_err_handler
245 };
246
247 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
248 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
249 MODULE_LICENSE("GPL");
250 MODULE_VERSION(DRV_VERSION);
251
252 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
253 module_param(debug, int, 0);
254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
255
256 /**
257 * e1000_init_module - Driver Registration Routine
258 *
259 * e1000_init_module is the first routine called when the driver is
260 * loaded. All it does is register with the PCI subsystem.
261 **/
262
263 static int __init
264 e1000_init_module(void)
265 {
266 int ret;
267 printk(KERN_INFO "%s - version %s\n",
268 e1000_driver_string, e1000_driver_version);
269
270 printk(KERN_INFO "%s\n", e1000_copyright);
271
272 ret = pci_register_driver(&e1000_driver);
273 if (copybreak != COPYBREAK_DEFAULT) {
274 if (copybreak == 0)
275 printk(KERN_INFO "e1000: copybreak disabled\n");
276 else
277 printk(KERN_INFO "e1000: copybreak enabled for "
278 "packets <= %u bytes\n", copybreak);
279 }
280 return ret;
281 }
282
283 module_init(e1000_init_module);
284
285 /**
286 * e1000_exit_module - Driver Exit Cleanup Routine
287 *
288 * e1000_exit_module is called just before the driver is removed
289 * from memory.
290 **/
291
292 static void __exit
293 e1000_exit_module(void)
294 {
295 pci_unregister_driver(&e1000_driver);
296 }
297
298 module_exit(e1000_exit_module);
299
300 static int e1000_request_irq(struct e1000_adapter *adapter)
301 {
302 struct net_device *netdev = adapter->netdev;
303 int flags, err = 0;
304
305 flags = IRQF_SHARED;
306 #ifdef CONFIG_PCI_MSI
307 if (adapter->hw.mac_type >= e1000_82571) {
308 adapter->have_msi = TRUE;
309 if ((err = pci_enable_msi(adapter->pdev))) {
310 DPRINTK(PROBE, ERR,
311 "Unable to allocate MSI interrupt Error: %d\n", err);
312 adapter->have_msi = FALSE;
313 }
314 }
315 if (adapter->have_msi) {
316 flags &= ~IRQF_SHARED;
317 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
318 netdev->name, netdev);
319 if (err)
320 DPRINTK(PROBE, ERR,
321 "Unable to allocate interrupt Error: %d\n", err);
322 } else
323 #endif
324 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
325 netdev->name, netdev)))
326 DPRINTK(PROBE, ERR,
327 "Unable to allocate interrupt Error: %d\n", err);
328
329 return err;
330 }
331
332 static void e1000_free_irq(struct e1000_adapter *adapter)
333 {
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338 #ifdef CONFIG_PCI_MSI
339 if (adapter->have_msi)
340 pci_disable_msi(adapter->pdev);
341 #endif
342 }
343
344 /**
345 * e1000_irq_disable - Mask off interrupt generation on the NIC
346 * @adapter: board private structure
347 **/
348
349 static void
350 e1000_irq_disable(struct e1000_adapter *adapter)
351 {
352 atomic_inc(&adapter->irq_sem);
353 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
354 E1000_WRITE_FLUSH(&adapter->hw);
355 synchronize_irq(adapter->pdev->irq);
356 }
357
358 /**
359 * e1000_irq_enable - Enable default interrupt generation settings
360 * @adapter: board private structure
361 **/
362
363 static void
364 e1000_irq_enable(struct e1000_adapter *adapter)
365 {
366 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
367 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
368 E1000_WRITE_FLUSH(&adapter->hw);
369 }
370 }
371
372 static void
373 e1000_update_mng_vlan(struct e1000_adapter *adapter)
374 {
375 struct net_device *netdev = adapter->netdev;
376 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
377 uint16_t old_vid = adapter->mng_vlan_id;
378 if (adapter->vlgrp) {
379 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
380 if (adapter->hw.mng_cookie.status &
381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
382 e1000_vlan_rx_add_vid(netdev, vid);
383 adapter->mng_vlan_id = vid;
384 } else
385 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
386
387 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
388 (vid != old_vid) &&
389 !vlan_group_get_device(adapter->vlgrp, old_vid))
390 e1000_vlan_rx_kill_vid(netdev, old_vid);
391 } else
392 adapter->mng_vlan_id = vid;
393 }
394 }
395
396 /**
397 * e1000_release_hw_control - release control of the h/w to f/w
398 * @adapter: address of board private structure
399 *
400 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
401 * For ASF and Pass Through versions of f/w this means that the
402 * driver is no longer loaded. For AMT version (only with 82573) i
403 * of the f/w this means that the network i/f is closed.
404 *
405 **/
406
407 static void
408 e1000_release_hw_control(struct e1000_adapter *adapter)
409 {
410 uint32_t ctrl_ext;
411 uint32_t swsm;
412
413 /* Let firmware taken over control of h/w */
414 switch (adapter->hw.mac_type) {
415 case e1000_82573:
416 swsm = E1000_READ_REG(&adapter->hw, SWSM);
417 E1000_WRITE_REG(&adapter->hw, SWSM,
418 swsm & ~E1000_SWSM_DRV_LOAD);
419 break;
420 case e1000_82571:
421 case e1000_82572:
422 case e1000_80003es2lan:
423 case e1000_ich8lan:
424 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
425 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
426 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
427 break;
428 default:
429 break;
430 }
431 }
432
433 /**
434 * e1000_get_hw_control - get control of the h/w from f/w
435 * @adapter: address of board private structure
436 *
437 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
438 * For ASF and Pass Through versions of f/w this means that
439 * the driver is loaded. For AMT version (only with 82573)
440 * of the f/w this means that the network i/f is open.
441 *
442 **/
443
444 static void
445 e1000_get_hw_control(struct e1000_adapter *adapter)
446 {
447 uint32_t ctrl_ext;
448 uint32_t swsm;
449
450 /* Let firmware know the driver has taken over */
451 switch (adapter->hw.mac_type) {
452 case e1000_82573:
453 swsm = E1000_READ_REG(&adapter->hw, SWSM);
454 E1000_WRITE_REG(&adapter->hw, SWSM,
455 swsm | E1000_SWSM_DRV_LOAD);
456 break;
457 case e1000_82571:
458 case e1000_82572:
459 case e1000_80003es2lan:
460 case e1000_ich8lan:
461 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
462 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
463 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
464 break;
465 default:
466 break;
467 }
468 }
469
470 static void
471 e1000_init_manageability(struct e1000_adapter *adapter)
472 {
473 if (adapter->en_mng_pt) {
474 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
475
476 /* disable hardware interception of ARP */
477 manc &= ~(E1000_MANC_ARP_EN);
478
479 /* enable receiving management packets to the host */
480 /* this will probably generate destination unreachable messages
481 * from the host OS, but the packets will be handled on SMBUS */
482 if (adapter->hw.has_manc2h) {
483 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
484
485 manc |= E1000_MANC_EN_MNG2HOST;
486 #define E1000_MNG2HOST_PORT_623 (1 << 5)
487 #define E1000_MNG2HOST_PORT_664 (1 << 6)
488 manc2h |= E1000_MNG2HOST_PORT_623;
489 manc2h |= E1000_MNG2HOST_PORT_664;
490 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
491 }
492
493 E1000_WRITE_REG(&adapter->hw, MANC, manc);
494 }
495 }
496
497 static void
498 e1000_release_manageability(struct e1000_adapter *adapter)
499 {
500 if (adapter->en_mng_pt) {
501 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
502
503 /* re-enable hardware interception of ARP */
504 manc |= E1000_MANC_ARP_EN;
505
506 if (adapter->hw.has_manc2h)
507 manc &= ~E1000_MANC_EN_MNG2HOST;
508
509 /* don't explicitly have to mess with MANC2H since
510 * MANC has an enable disable that gates MANC2H */
511
512 E1000_WRITE_REG(&adapter->hw, MANC, manc);
513 }
514 }
515
516 /**
517 * e1000_configure - configure the hardware for RX and TX
518 * @adapter = private board structure
519 **/
520 static void e1000_configure(struct e1000_adapter *adapter)
521 {
522 struct net_device *netdev = adapter->netdev;
523 int i;
524
525 e1000_set_multi(netdev);
526
527 e1000_restore_vlan(adapter);
528 e1000_init_manageability(adapter);
529
530 e1000_configure_tx(adapter);
531 e1000_setup_rctl(adapter);
532 e1000_configure_rx(adapter);
533 /* call E1000_DESC_UNUSED which always leaves
534 * at least 1 descriptor unused to make sure
535 * next_to_use != next_to_clean */
536 for (i = 0; i < adapter->num_rx_queues; i++) {
537 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
538 adapter->alloc_rx_buf(adapter, ring,
539 E1000_DESC_UNUSED(ring));
540 }
541
542 adapter->tx_queue_len = netdev->tx_queue_len;
543 }
544
545 int e1000_up(struct e1000_adapter *adapter)
546 {
547 /* hardware has been reset, we need to reload some things */
548 e1000_configure(adapter);
549
550 clear_bit(__E1000_DOWN, &adapter->flags);
551
552 #ifdef CONFIG_E1000_NAPI
553 netif_poll_enable(adapter->netdev);
554 #endif
555 e1000_irq_enable(adapter);
556
557 /* fire a link change interrupt to start the watchdog */
558 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
559 return 0;
560 }
561
562 /**
563 * e1000_power_up_phy - restore link in case the phy was powered down
564 * @adapter: address of board private structure
565 *
566 * The phy may be powered down to save power and turn off link when the
567 * driver is unloaded and wake on lan is not enabled (among others)
568 * *** this routine MUST be followed by a call to e1000_reset ***
569 *
570 **/
571
572 void e1000_power_up_phy(struct e1000_adapter *adapter)
573 {
574 uint16_t mii_reg = 0;
575
576 /* Just clear the power down bit to wake the phy back up */
577 if (adapter->hw.media_type == e1000_media_type_copper) {
578 /* according to the manual, the phy will retain its
579 * settings across a power-down/up cycle */
580 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
581 mii_reg &= ~MII_CR_POWER_DOWN;
582 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
583 }
584 }
585
586 static void e1000_power_down_phy(struct e1000_adapter *adapter)
587 {
588 /* Power down the PHY so no link is implied when interface is down *
589 * The PHY cannot be powered down if any of the following is TRUE *
590 * (a) WoL is enabled
591 * (b) AMT is active
592 * (c) SoL/IDER session is active */
593 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
594 adapter->hw.media_type == e1000_media_type_copper) {
595 uint16_t mii_reg = 0;
596
597 switch (adapter->hw.mac_type) {
598 case e1000_82540:
599 case e1000_82545:
600 case e1000_82545_rev_3:
601 case e1000_82546:
602 case e1000_82546_rev_3:
603 case e1000_82541:
604 case e1000_82541_rev_2:
605 case e1000_82547:
606 case e1000_82547_rev_2:
607 if (E1000_READ_REG(&adapter->hw, MANC) &
608 E1000_MANC_SMBUS_EN)
609 goto out;
610 break;
611 case e1000_82571:
612 case e1000_82572:
613 case e1000_82573:
614 case e1000_80003es2lan:
615 case e1000_ich8lan:
616 if (e1000_check_mng_mode(&adapter->hw) ||
617 e1000_check_phy_reset_block(&adapter->hw))
618 goto out;
619 break;
620 default:
621 goto out;
622 }
623 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
624 mii_reg |= MII_CR_POWER_DOWN;
625 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
626 mdelay(1);
627 }
628 out:
629 return;
630 }
631
632 void
633 e1000_down(struct e1000_adapter *adapter)
634 {
635 struct net_device *netdev = adapter->netdev;
636
637 /* signal that we're down so the interrupt handler does not
638 * reschedule our watchdog timer */
639 set_bit(__E1000_DOWN, &adapter->flags);
640
641 #ifdef CONFIG_E1000_NAPI
642 netif_poll_disable(netdev);
643 #endif
644 e1000_irq_disable(adapter);
645
646 del_timer_sync(&adapter->tx_fifo_stall_timer);
647 del_timer_sync(&adapter->watchdog_timer);
648 del_timer_sync(&adapter->phy_info_timer);
649
650 netdev->tx_queue_len = adapter->tx_queue_len;
651 adapter->link_speed = 0;
652 adapter->link_duplex = 0;
653 netif_carrier_off(netdev);
654 netif_stop_queue(netdev);
655
656 e1000_reset(adapter);
657 e1000_clean_all_tx_rings(adapter);
658 e1000_clean_all_rx_rings(adapter);
659 }
660
661 void
662 e1000_reinit_locked(struct e1000_adapter *adapter)
663 {
664 WARN_ON(in_interrupt());
665 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
666 msleep(1);
667 e1000_down(adapter);
668 e1000_up(adapter);
669 clear_bit(__E1000_RESETTING, &adapter->flags);
670 }
671
672 void
673 e1000_reset(struct e1000_adapter *adapter)
674 {
675 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
676 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
677 boolean_t legacy_pba_adjust = FALSE;
678
679 /* Repartition Pba for greater than 9k mtu
680 * To take effect CTRL.RST is required.
681 */
682
683 switch (adapter->hw.mac_type) {
684 case e1000_82542_rev2_0:
685 case e1000_82542_rev2_1:
686 case e1000_82543:
687 case e1000_82544:
688 case e1000_82540:
689 case e1000_82541:
690 case e1000_82541_rev_2:
691 legacy_pba_adjust = TRUE;
692 pba = E1000_PBA_48K;
693 break;
694 case e1000_82545:
695 case e1000_82545_rev_3:
696 case e1000_82546:
697 case e1000_82546_rev_3:
698 pba = E1000_PBA_48K;
699 break;
700 case e1000_82547:
701 case e1000_82547_rev_2:
702 legacy_pba_adjust = TRUE;
703 pba = E1000_PBA_30K;
704 break;
705 case e1000_82571:
706 case e1000_82572:
707 case e1000_80003es2lan:
708 pba = E1000_PBA_38K;
709 break;
710 case e1000_82573:
711 pba = E1000_PBA_20K;
712 break;
713 case e1000_ich8lan:
714 pba = E1000_PBA_8K;
715 case e1000_undefined:
716 case e1000_num_macs:
717 break;
718 }
719
720 if (legacy_pba_adjust == TRUE) {
721 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
722 pba -= 8; /* allocate more FIFO for Tx */
723
724 if (adapter->hw.mac_type == e1000_82547) {
725 adapter->tx_fifo_head = 0;
726 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
727 adapter->tx_fifo_size =
728 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
729 atomic_set(&adapter->tx_fifo_stall, 0);
730 }
731 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
732 /* adjust PBA for jumbo frames */
733 E1000_WRITE_REG(&adapter->hw, PBA, pba);
734
735 /* To maintain wire speed transmits, the Tx FIFO should be
736 * large enough to accomodate two full transmit packets,
737 * rounded up to the next 1KB and expressed in KB. Likewise,
738 * the Rx FIFO should be large enough to accomodate at least
739 * one full receive packet and is similarly rounded up and
740 * expressed in KB. */
741 pba = E1000_READ_REG(&adapter->hw, PBA);
742 /* upper 16 bits has Tx packet buffer allocation size in KB */
743 tx_space = pba >> 16;
744 /* lower 16 bits has Rx packet buffer allocation size in KB */
745 pba &= 0xffff;
746 /* don't include ethernet FCS because hardware appends/strips */
747 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
748 VLAN_TAG_SIZE;
749 min_tx_space = min_rx_space;
750 min_tx_space *= 2;
751 E1000_ROUNDUP(min_tx_space, 1024);
752 min_tx_space >>= 10;
753 E1000_ROUNDUP(min_rx_space, 1024);
754 min_rx_space >>= 10;
755
756 /* If current Tx allocation is less than the min Tx FIFO size,
757 * and the min Tx FIFO size is less than the current Rx FIFO
758 * allocation, take space away from current Rx allocation */
759 if (tx_space < min_tx_space &&
760 ((min_tx_space - tx_space) < pba)) {
761 pba = pba - (min_tx_space - tx_space);
762
763 /* PCI/PCIx hardware has PBA alignment constraints */
764 switch (adapter->hw.mac_type) {
765 case e1000_82545 ... e1000_82546_rev_3:
766 pba &= ~(E1000_PBA_8K - 1);
767 break;
768 default:
769 break;
770 }
771
772 /* if short on rx space, rx wins and must trump tx
773 * adjustment or use Early Receive if available */
774 if (pba < min_rx_space) {
775 switch (adapter->hw.mac_type) {
776 case e1000_82573:
777 /* ERT enabled in e1000_configure_rx */
778 break;
779 default:
780 pba = min_rx_space;
781 break;
782 }
783 }
784 }
785 }
786
787 E1000_WRITE_REG(&adapter->hw, PBA, pba);
788
789 /* flow control settings */
790 /* Set the FC high water mark to 90% of the FIFO size.
791 * Required to clear last 3 LSB */
792 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
793 /* We can't use 90% on small FIFOs because the remainder
794 * would be less than 1 full frame. In this case, we size
795 * it to allow at least a full frame above the high water
796 * mark. */
797 if (pba < E1000_PBA_16K)
798 fc_high_water_mark = (pba * 1024) - 1600;
799
800 adapter->hw.fc_high_water = fc_high_water_mark;
801 adapter->hw.fc_low_water = fc_high_water_mark - 8;
802 if (adapter->hw.mac_type == e1000_80003es2lan)
803 adapter->hw.fc_pause_time = 0xFFFF;
804 else
805 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
806 adapter->hw.fc_send_xon = 1;
807 adapter->hw.fc = adapter->hw.original_fc;
808
809 /* Allow time for pending master requests to run */
810 e1000_reset_hw(&adapter->hw);
811 if (adapter->hw.mac_type >= e1000_82544)
812 E1000_WRITE_REG(&adapter->hw, WUC, 0);
813
814 if (e1000_init_hw(&adapter->hw))
815 DPRINTK(PROBE, ERR, "Hardware Error\n");
816 e1000_update_mng_vlan(adapter);
817
818 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
819 if (adapter->hw.mac_type >= e1000_82544 &&
820 adapter->hw.mac_type <= e1000_82547_rev_2 &&
821 adapter->hw.autoneg == 1 &&
822 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
823 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
824 /* clear phy power management bit if we are in gig only mode,
825 * which if enabled will attempt negotiation to 100Mb, which
826 * can cause a loss of link at power off or driver unload */
827 ctrl &= ~E1000_CTRL_SWDPIN3;
828 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
829 }
830
831 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
832 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
833
834 e1000_reset_adaptive(&adapter->hw);
835 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
836
837 if (!adapter->smart_power_down &&
838 (adapter->hw.mac_type == e1000_82571 ||
839 adapter->hw.mac_type == e1000_82572)) {
840 uint16_t phy_data = 0;
841 /* speed up time to link by disabling smart power down, ignore
842 * the return value of this function because there is nothing
843 * different we would do if it failed */
844 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
845 &phy_data);
846 phy_data &= ~IGP02E1000_PM_SPD;
847 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
848 phy_data);
849 }
850
851 e1000_release_manageability(adapter);
852 }
853
854 /**
855 * e1000_probe - Device Initialization Routine
856 * @pdev: PCI device information struct
857 * @ent: entry in e1000_pci_tbl
858 *
859 * Returns 0 on success, negative on failure
860 *
861 * e1000_probe initializes an adapter identified by a pci_dev structure.
862 * The OS initialization, configuring of the adapter private structure,
863 * and a hardware reset occur.
864 **/
865
866 static int __devinit
867 e1000_probe(struct pci_dev *pdev,
868 const struct pci_device_id *ent)
869 {
870 struct net_device *netdev;
871 struct e1000_adapter *adapter;
872 unsigned long mmio_start, mmio_len;
873 unsigned long flash_start, flash_len;
874
875 static int cards_found = 0;
876 static int global_quad_port_a = 0; /* global ksp3 port a indication */
877 int i, err, pci_using_dac;
878 uint16_t eeprom_data = 0;
879 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
880 if ((err = pci_enable_device(pdev)))
881 return err;
882
883 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
884 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
885 pci_using_dac = 1;
886 } else {
887 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
888 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
889 E1000_ERR("No usable DMA configuration, aborting\n");
890 goto err_dma;
891 }
892 pci_using_dac = 0;
893 }
894
895 if ((err = pci_request_regions(pdev, e1000_driver_name)))
896 goto err_pci_reg;
897
898 pci_set_master(pdev);
899
900 err = -ENOMEM;
901 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
902 if (!netdev)
903 goto err_alloc_etherdev;
904
905 SET_MODULE_OWNER(netdev);
906 SET_NETDEV_DEV(netdev, &pdev->dev);
907
908 pci_set_drvdata(pdev, netdev);
909 adapter = netdev_priv(netdev);
910 adapter->netdev = netdev;
911 adapter->pdev = pdev;
912 adapter->hw.back = adapter;
913 adapter->msg_enable = (1 << debug) - 1;
914
915 mmio_start = pci_resource_start(pdev, BAR_0);
916 mmio_len = pci_resource_len(pdev, BAR_0);
917
918 err = -EIO;
919 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
920 if (!adapter->hw.hw_addr)
921 goto err_ioremap;
922
923 for (i = BAR_1; i <= BAR_5; i++) {
924 if (pci_resource_len(pdev, i) == 0)
925 continue;
926 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
927 adapter->hw.io_base = pci_resource_start(pdev, i);
928 break;
929 }
930 }
931
932 netdev->open = &e1000_open;
933 netdev->stop = &e1000_close;
934 netdev->hard_start_xmit = &e1000_xmit_frame;
935 netdev->get_stats = &e1000_get_stats;
936 netdev->set_multicast_list = &e1000_set_multi;
937 netdev->set_mac_address = &e1000_set_mac;
938 netdev->change_mtu = &e1000_change_mtu;
939 netdev->do_ioctl = &e1000_ioctl;
940 e1000_set_ethtool_ops(netdev);
941 netdev->tx_timeout = &e1000_tx_timeout;
942 netdev->watchdog_timeo = 5 * HZ;
943 #ifdef CONFIG_E1000_NAPI
944 netdev->poll = &e1000_clean;
945 netdev->weight = 64;
946 #endif
947 netdev->vlan_rx_register = e1000_vlan_rx_register;
948 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
949 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
950 #ifdef CONFIG_NET_POLL_CONTROLLER
951 netdev->poll_controller = e1000_netpoll;
952 #endif
953 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
954
955 netdev->mem_start = mmio_start;
956 netdev->mem_end = mmio_start + mmio_len;
957 netdev->base_addr = adapter->hw.io_base;
958
959 adapter->bd_number = cards_found;
960
961 /* setup the private structure */
962
963 if ((err = e1000_sw_init(adapter)))
964 goto err_sw_init;
965
966 err = -EIO;
967 /* Flash BAR mapping must happen after e1000_sw_init
968 * because it depends on mac_type */
969 if ((adapter->hw.mac_type == e1000_ich8lan) &&
970 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
971 flash_start = pci_resource_start(pdev, 1);
972 flash_len = pci_resource_len(pdev, 1);
973 adapter->hw.flash_address = ioremap(flash_start, flash_len);
974 if (!adapter->hw.flash_address)
975 goto err_flashmap;
976 }
977
978 if (e1000_check_phy_reset_block(&adapter->hw))
979 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
980
981 if (adapter->hw.mac_type >= e1000_82543) {
982 netdev->features = NETIF_F_SG |
983 NETIF_F_HW_CSUM |
984 NETIF_F_HW_VLAN_TX |
985 NETIF_F_HW_VLAN_RX |
986 NETIF_F_HW_VLAN_FILTER;
987 if (adapter->hw.mac_type == e1000_ich8lan)
988 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
989 }
990
991 if ((adapter->hw.mac_type >= e1000_82544) &&
992 (adapter->hw.mac_type != e1000_82547))
993 netdev->features |= NETIF_F_TSO;
994
995 if (adapter->hw.mac_type > e1000_82547_rev_2)
996 netdev->features |= NETIF_F_TSO6;
997 if (pci_using_dac)
998 netdev->features |= NETIF_F_HIGHDMA;
999
1000 netdev->features |= NETIF_F_LLTX;
1001
1002 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1003
1004 /* initialize eeprom parameters */
1005
1006 if (e1000_init_eeprom_params(&adapter->hw)) {
1007 E1000_ERR("EEPROM initialization failed\n");
1008 goto err_eeprom;
1009 }
1010
1011 /* before reading the EEPROM, reset the controller to
1012 * put the device in a known good starting state */
1013
1014 e1000_reset_hw(&adapter->hw);
1015
1016 /* make sure the EEPROM is good */
1017
1018 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1019 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1020 goto err_eeprom;
1021 }
1022
1023 /* copy the MAC address out of the EEPROM */
1024
1025 if (e1000_read_mac_addr(&adapter->hw))
1026 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1027 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1028 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1029
1030 if (!is_valid_ether_addr(netdev->perm_addr)) {
1031 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1032 goto err_eeprom;
1033 }
1034
1035 e1000_get_bus_info(&adapter->hw);
1036
1037 init_timer(&adapter->tx_fifo_stall_timer);
1038 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1039 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1040
1041 init_timer(&adapter->watchdog_timer);
1042 adapter->watchdog_timer.function = &e1000_watchdog;
1043 adapter->watchdog_timer.data = (unsigned long) adapter;
1044
1045 init_timer(&adapter->phy_info_timer);
1046 adapter->phy_info_timer.function = &e1000_update_phy_info;
1047 adapter->phy_info_timer.data = (unsigned long) adapter;
1048
1049 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1050
1051 e1000_check_options(adapter);
1052
1053 /* Initial Wake on LAN setting
1054 * If APM wake is enabled in the EEPROM,
1055 * enable the ACPI Magic Packet filter
1056 */
1057
1058 switch (adapter->hw.mac_type) {
1059 case e1000_82542_rev2_0:
1060 case e1000_82542_rev2_1:
1061 case e1000_82543:
1062 break;
1063 case e1000_82544:
1064 e1000_read_eeprom(&adapter->hw,
1065 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1066 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1067 break;
1068 case e1000_ich8lan:
1069 e1000_read_eeprom(&adapter->hw,
1070 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1071 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1072 break;
1073 case e1000_82546:
1074 case e1000_82546_rev_3:
1075 case e1000_82571:
1076 case e1000_80003es2lan:
1077 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1078 e1000_read_eeprom(&adapter->hw,
1079 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1080 break;
1081 }
1082 /* Fall Through */
1083 default:
1084 e1000_read_eeprom(&adapter->hw,
1085 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1086 break;
1087 }
1088 if (eeprom_data & eeprom_apme_mask)
1089 adapter->eeprom_wol |= E1000_WUFC_MAG;
1090
1091 /* now that we have the eeprom settings, apply the special cases
1092 * where the eeprom may be wrong or the board simply won't support
1093 * wake on lan on a particular port */
1094 switch (pdev->device) {
1095 case E1000_DEV_ID_82546GB_PCIE:
1096 adapter->eeprom_wol = 0;
1097 break;
1098 case E1000_DEV_ID_82546EB_FIBER:
1099 case E1000_DEV_ID_82546GB_FIBER:
1100 case E1000_DEV_ID_82571EB_FIBER:
1101 /* Wake events only supported on port A for dual fiber
1102 * regardless of eeprom setting */
1103 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1104 adapter->eeprom_wol = 0;
1105 break;
1106 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1107 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1108 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1109 /* if quad port adapter, disable WoL on all but port A */
1110 if (global_quad_port_a != 0)
1111 adapter->eeprom_wol = 0;
1112 else
1113 adapter->quad_port_a = 1;
1114 /* Reset for multiple quad port adapters */
1115 if (++global_quad_port_a == 4)
1116 global_quad_port_a = 0;
1117 break;
1118 }
1119
1120 /* initialize the wol settings based on the eeprom settings */
1121 adapter->wol = adapter->eeprom_wol;
1122
1123 /* print bus type/speed/width info */
1124 {
1125 struct e1000_hw *hw = &adapter->hw;
1126 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1127 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1128 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1129 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1130 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1131 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1132 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1133 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1134 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1135 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1136 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1137 "32-bit"));
1138 }
1139
1140 for (i = 0; i < 6; i++)
1141 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1142
1143 /* reset the hardware with the new settings */
1144 e1000_reset(adapter);
1145
1146 /* If the controller is 82573 and f/w is AMT, do not set
1147 * DRV_LOAD until the interface is up. For all other cases,
1148 * let the f/w know that the h/w is now under the control
1149 * of the driver. */
1150 if (adapter->hw.mac_type != e1000_82573 ||
1151 !e1000_check_mng_mode(&adapter->hw))
1152 e1000_get_hw_control(adapter);
1153
1154 strcpy(netdev->name, "eth%d");
1155 if ((err = register_netdev(netdev)))
1156 goto err_register;
1157
1158 /* tell the stack to leave us alone until e1000_open() is called */
1159 netif_carrier_off(netdev);
1160 netif_stop_queue(netdev);
1161
1162 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1163
1164 cards_found++;
1165 return 0;
1166
1167 err_register:
1168 e1000_release_hw_control(adapter);
1169 err_eeprom:
1170 if (!e1000_check_phy_reset_block(&adapter->hw))
1171 e1000_phy_hw_reset(&adapter->hw);
1172
1173 if (adapter->hw.flash_address)
1174 iounmap(adapter->hw.flash_address);
1175 err_flashmap:
1176 #ifdef CONFIG_E1000_NAPI
1177 for (i = 0; i < adapter->num_rx_queues; i++)
1178 dev_put(&adapter->polling_netdev[i]);
1179 #endif
1180
1181 kfree(adapter->tx_ring);
1182 kfree(adapter->rx_ring);
1183 #ifdef CONFIG_E1000_NAPI
1184 kfree(adapter->polling_netdev);
1185 #endif
1186 err_sw_init:
1187 iounmap(adapter->hw.hw_addr);
1188 err_ioremap:
1189 free_netdev(netdev);
1190 err_alloc_etherdev:
1191 pci_release_regions(pdev);
1192 err_pci_reg:
1193 err_dma:
1194 pci_disable_device(pdev);
1195 return err;
1196 }
1197
1198 /**
1199 * e1000_remove - Device Removal Routine
1200 * @pdev: PCI device information struct
1201 *
1202 * e1000_remove is called by the PCI subsystem to alert the driver
1203 * that it should release a PCI device. The could be caused by a
1204 * Hot-Plug event, or because the driver is going to be removed from
1205 * memory.
1206 **/
1207
1208 static void __devexit
1209 e1000_remove(struct pci_dev *pdev)
1210 {
1211 struct net_device *netdev = pci_get_drvdata(pdev);
1212 struct e1000_adapter *adapter = netdev_priv(netdev);
1213 #ifdef CONFIG_E1000_NAPI
1214 int i;
1215 #endif
1216
1217 flush_scheduled_work();
1218
1219 e1000_release_manageability(adapter);
1220
1221 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1222 * would have already happened in close and is redundant. */
1223 e1000_release_hw_control(adapter);
1224
1225 unregister_netdev(netdev);
1226 #ifdef CONFIG_E1000_NAPI
1227 for (i = 0; i < adapter->num_rx_queues; i++)
1228 dev_put(&adapter->polling_netdev[i]);
1229 #endif
1230
1231 if (!e1000_check_phy_reset_block(&adapter->hw))
1232 e1000_phy_hw_reset(&adapter->hw);
1233
1234 kfree(adapter->tx_ring);
1235 kfree(adapter->rx_ring);
1236 #ifdef CONFIG_E1000_NAPI
1237 kfree(adapter->polling_netdev);
1238 #endif
1239
1240 iounmap(adapter->hw.hw_addr);
1241 if (adapter->hw.flash_address)
1242 iounmap(adapter->hw.flash_address);
1243 pci_release_regions(pdev);
1244
1245 free_netdev(netdev);
1246
1247 pci_disable_device(pdev);
1248 }
1249
1250 /**
1251 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1252 * @adapter: board private structure to initialize
1253 *
1254 * e1000_sw_init initializes the Adapter private data structure.
1255 * Fields are initialized based on PCI device information and
1256 * OS network device settings (MTU size).
1257 **/
1258
1259 static int __devinit
1260 e1000_sw_init(struct e1000_adapter *adapter)
1261 {
1262 struct e1000_hw *hw = &adapter->hw;
1263 struct net_device *netdev = adapter->netdev;
1264 struct pci_dev *pdev = adapter->pdev;
1265 #ifdef CONFIG_E1000_NAPI
1266 int i;
1267 #endif
1268
1269 /* PCI config space info */
1270
1271 hw->vendor_id = pdev->vendor;
1272 hw->device_id = pdev->device;
1273 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1274 hw->subsystem_id = pdev->subsystem_device;
1275
1276 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1277
1278 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1279
1280 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1281 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1282 hw->max_frame_size = netdev->mtu +
1283 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1284 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1285
1286 /* identify the MAC */
1287
1288 if (e1000_set_mac_type(hw)) {
1289 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1290 return -EIO;
1291 }
1292
1293 switch (hw->mac_type) {
1294 default:
1295 break;
1296 case e1000_82541:
1297 case e1000_82547:
1298 case e1000_82541_rev_2:
1299 case e1000_82547_rev_2:
1300 hw->phy_init_script = 1;
1301 break;
1302 }
1303
1304 e1000_set_media_type(hw);
1305
1306 hw->wait_autoneg_complete = FALSE;
1307 hw->tbi_compatibility_en = TRUE;
1308 hw->adaptive_ifs = TRUE;
1309
1310 /* Copper options */
1311
1312 if (hw->media_type == e1000_media_type_copper) {
1313 hw->mdix = AUTO_ALL_MODES;
1314 hw->disable_polarity_correction = FALSE;
1315 hw->master_slave = E1000_MASTER_SLAVE;
1316 }
1317
1318 adapter->num_tx_queues = 1;
1319 adapter->num_rx_queues = 1;
1320
1321 if (e1000_alloc_queues(adapter)) {
1322 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1323 return -ENOMEM;
1324 }
1325
1326 #ifdef CONFIG_E1000_NAPI
1327 for (i = 0; i < adapter->num_rx_queues; i++) {
1328 adapter->polling_netdev[i].priv = adapter;
1329 adapter->polling_netdev[i].poll = &e1000_clean;
1330 adapter->polling_netdev[i].weight = 64;
1331 dev_hold(&adapter->polling_netdev[i]);
1332 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1333 }
1334 spin_lock_init(&adapter->tx_queue_lock);
1335 #endif
1336
1337 atomic_set(&adapter->irq_sem, 1);
1338 spin_lock_init(&adapter->stats_lock);
1339
1340 set_bit(__E1000_DOWN, &adapter->flags);
1341
1342 return 0;
1343 }
1344
1345 /**
1346 * e1000_alloc_queues - Allocate memory for all rings
1347 * @adapter: board private structure to initialize
1348 *
1349 * We allocate one ring per queue at run-time since we don't know the
1350 * number of queues at compile-time. The polling_netdev array is
1351 * intended for Multiqueue, but should work fine with a single queue.
1352 **/
1353
1354 static int __devinit
1355 e1000_alloc_queues(struct e1000_adapter *adapter)
1356 {
1357 int size;
1358
1359 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1360 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1361 if (!adapter->tx_ring)
1362 return -ENOMEM;
1363 memset(adapter->tx_ring, 0, size);
1364
1365 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1366 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1367 if (!adapter->rx_ring) {
1368 kfree(adapter->tx_ring);
1369 return -ENOMEM;
1370 }
1371 memset(adapter->rx_ring, 0, size);
1372
1373 #ifdef CONFIG_E1000_NAPI
1374 size = sizeof(struct net_device) * adapter->num_rx_queues;
1375 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1376 if (!adapter->polling_netdev) {
1377 kfree(adapter->tx_ring);
1378 kfree(adapter->rx_ring);
1379 return -ENOMEM;
1380 }
1381 memset(adapter->polling_netdev, 0, size);
1382 #endif
1383
1384 return E1000_SUCCESS;
1385 }
1386
1387 /**
1388 * e1000_open - Called when a network interface is made active
1389 * @netdev: network interface device structure
1390 *
1391 * Returns 0 on success, negative value on failure
1392 *
1393 * The open entry point is called when a network interface is made
1394 * active by the system (IFF_UP). At this point all resources needed
1395 * for transmit and receive operations are allocated, the interrupt
1396 * handler is registered with the OS, the watchdog timer is started,
1397 * and the stack is notified that the interface is ready.
1398 **/
1399
1400 static int
1401 e1000_open(struct net_device *netdev)
1402 {
1403 struct e1000_adapter *adapter = netdev_priv(netdev);
1404 int err;
1405
1406 /* disallow open during test */
1407 if (test_bit(__E1000_TESTING, &adapter->flags))
1408 return -EBUSY;
1409
1410 /* allocate transmit descriptors */
1411 err = e1000_setup_all_tx_resources(adapter);
1412 if (err)
1413 goto err_setup_tx;
1414
1415 /* allocate receive descriptors */
1416 err = e1000_setup_all_rx_resources(adapter);
1417 if (err)
1418 goto err_setup_rx;
1419
1420 e1000_power_up_phy(adapter);
1421
1422 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1423 if ((adapter->hw.mng_cookie.status &
1424 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1425 e1000_update_mng_vlan(adapter);
1426 }
1427
1428 /* If AMT is enabled, let the firmware know that the network
1429 * interface is now open */
1430 if (adapter->hw.mac_type == e1000_82573 &&
1431 e1000_check_mng_mode(&adapter->hw))
1432 e1000_get_hw_control(adapter);
1433
1434 /* before we allocate an interrupt, we must be ready to handle it.
1435 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1436 * as soon as we call pci_request_irq, so we have to setup our
1437 * clean_rx handler before we do so. */
1438 e1000_configure(adapter);
1439
1440 err = e1000_request_irq(adapter);
1441 if (err)
1442 goto err_req_irq;
1443
1444 /* From here on the code is the same as e1000_up() */
1445 clear_bit(__E1000_DOWN, &adapter->flags);
1446
1447 #ifdef CONFIG_E1000_NAPI
1448 netif_poll_enable(netdev);
1449 #endif
1450
1451 e1000_irq_enable(adapter);
1452
1453 /* fire a link status change interrupt to start the watchdog */
1454 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1455
1456 return E1000_SUCCESS;
1457
1458 err_req_irq:
1459 e1000_release_hw_control(adapter);
1460 e1000_power_down_phy(adapter);
1461 e1000_free_all_rx_resources(adapter);
1462 err_setup_rx:
1463 e1000_free_all_tx_resources(adapter);
1464 err_setup_tx:
1465 e1000_reset(adapter);
1466
1467 return err;
1468 }
1469
1470 /**
1471 * e1000_close - Disables a network interface
1472 * @netdev: network interface device structure
1473 *
1474 * Returns 0, this is not allowed to fail
1475 *
1476 * The close entry point is called when an interface is de-activated
1477 * by the OS. The hardware is still under the drivers control, but
1478 * needs to be disabled. A global MAC reset is issued to stop the
1479 * hardware, and all transmit and receive resources are freed.
1480 **/
1481
1482 static int
1483 e1000_close(struct net_device *netdev)
1484 {
1485 struct e1000_adapter *adapter = netdev_priv(netdev);
1486
1487 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1488 e1000_down(adapter);
1489 e1000_power_down_phy(adapter);
1490 e1000_free_irq(adapter);
1491
1492 e1000_free_all_tx_resources(adapter);
1493 e1000_free_all_rx_resources(adapter);
1494
1495 /* kill manageability vlan ID if supported, but not if a vlan with
1496 * the same ID is registered on the host OS (let 8021q kill it) */
1497 if ((adapter->hw.mng_cookie.status &
1498 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1499 !(adapter->vlgrp &&
1500 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1501 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1502 }
1503
1504 /* If AMT is enabled, let the firmware know that the network
1505 * interface is now closed */
1506 if (adapter->hw.mac_type == e1000_82573 &&
1507 e1000_check_mng_mode(&adapter->hw))
1508 e1000_release_hw_control(adapter);
1509
1510 return 0;
1511 }
1512
1513 /**
1514 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1515 * @adapter: address of board private structure
1516 * @start: address of beginning of memory
1517 * @len: length of memory
1518 **/
1519 static boolean_t
1520 e1000_check_64k_bound(struct e1000_adapter *adapter,
1521 void *start, unsigned long len)
1522 {
1523 unsigned long begin = (unsigned long) start;
1524 unsigned long end = begin + len;
1525
1526 /* First rev 82545 and 82546 need to not allow any memory
1527 * write location to cross 64k boundary due to errata 23 */
1528 if (adapter->hw.mac_type == e1000_82545 ||
1529 adapter->hw.mac_type == e1000_82546) {
1530 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1531 }
1532
1533 return TRUE;
1534 }
1535
1536 /**
1537 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1538 * @adapter: board private structure
1539 * @txdr: tx descriptor ring (for a specific queue) to setup
1540 *
1541 * Return 0 on success, negative on failure
1542 **/
1543
1544 static int
1545 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1546 struct e1000_tx_ring *txdr)
1547 {
1548 struct pci_dev *pdev = adapter->pdev;
1549 int size;
1550
1551 size = sizeof(struct e1000_buffer) * txdr->count;
1552 txdr->buffer_info = vmalloc(size);
1553 if (!txdr->buffer_info) {
1554 DPRINTK(PROBE, ERR,
1555 "Unable to allocate memory for the transmit descriptor ring\n");
1556 return -ENOMEM;
1557 }
1558 memset(txdr->buffer_info, 0, size);
1559
1560 /* round up to nearest 4K */
1561
1562 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1563 E1000_ROUNDUP(txdr->size, 4096);
1564
1565 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1566 if (!txdr->desc) {
1567 setup_tx_desc_die:
1568 vfree(txdr->buffer_info);
1569 DPRINTK(PROBE, ERR,
1570 "Unable to allocate memory for the transmit descriptor ring\n");
1571 return -ENOMEM;
1572 }
1573
1574 /* Fix for errata 23, can't cross 64kB boundary */
1575 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1576 void *olddesc = txdr->desc;
1577 dma_addr_t olddma = txdr->dma;
1578 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1579 "at %p\n", txdr->size, txdr->desc);
1580 /* Try again, without freeing the previous */
1581 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1582 /* Failed allocation, critical failure */
1583 if (!txdr->desc) {
1584 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1585 goto setup_tx_desc_die;
1586 }
1587
1588 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1589 /* give up */
1590 pci_free_consistent(pdev, txdr->size, txdr->desc,
1591 txdr->dma);
1592 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1593 DPRINTK(PROBE, ERR,
1594 "Unable to allocate aligned memory "
1595 "for the transmit descriptor ring\n");
1596 vfree(txdr->buffer_info);
1597 return -ENOMEM;
1598 } else {
1599 /* Free old allocation, new allocation was successful */
1600 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1601 }
1602 }
1603 memset(txdr->desc, 0, txdr->size);
1604
1605 txdr->next_to_use = 0;
1606 txdr->next_to_clean = 0;
1607 spin_lock_init(&txdr->tx_lock);
1608
1609 return 0;
1610 }
1611
1612 /**
1613 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1614 * (Descriptors) for all queues
1615 * @adapter: board private structure
1616 *
1617 * Return 0 on success, negative on failure
1618 **/
1619
1620 int
1621 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1622 {
1623 int i, err = 0;
1624
1625 for (i = 0; i < adapter->num_tx_queues; i++) {
1626 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1627 if (err) {
1628 DPRINTK(PROBE, ERR,
1629 "Allocation for Tx Queue %u failed\n", i);
1630 for (i-- ; i >= 0; i--)
1631 e1000_free_tx_resources(adapter,
1632 &adapter->tx_ring[i]);
1633 break;
1634 }
1635 }
1636
1637 return err;
1638 }
1639
1640 /**
1641 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1642 * @adapter: board private structure
1643 *
1644 * Configure the Tx unit of the MAC after a reset.
1645 **/
1646
1647 static void
1648 e1000_configure_tx(struct e1000_adapter *adapter)
1649 {
1650 uint64_t tdba;
1651 struct e1000_hw *hw = &adapter->hw;
1652 uint32_t tdlen, tctl, tipg, tarc;
1653 uint32_t ipgr1, ipgr2;
1654
1655 /* Setup the HW Tx Head and Tail descriptor pointers */
1656
1657 switch (adapter->num_tx_queues) {
1658 case 1:
1659 default:
1660 tdba = adapter->tx_ring[0].dma;
1661 tdlen = adapter->tx_ring[0].count *
1662 sizeof(struct e1000_tx_desc);
1663 E1000_WRITE_REG(hw, TDLEN, tdlen);
1664 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1665 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1666 E1000_WRITE_REG(hw, TDT, 0);
1667 E1000_WRITE_REG(hw, TDH, 0);
1668 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1669 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1670 break;
1671 }
1672
1673 /* Set the default values for the Tx Inter Packet Gap timer */
1674 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1675 (hw->media_type == e1000_media_type_fiber ||
1676 hw->media_type == e1000_media_type_internal_serdes))
1677 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1678 else
1679 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1680
1681 switch (hw->mac_type) {
1682 case e1000_82542_rev2_0:
1683 case e1000_82542_rev2_1:
1684 tipg = DEFAULT_82542_TIPG_IPGT;
1685 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1686 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1687 break;
1688 case e1000_80003es2lan:
1689 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1690 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1691 break;
1692 default:
1693 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1694 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1695 break;
1696 }
1697 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1698 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1699 E1000_WRITE_REG(hw, TIPG, tipg);
1700
1701 /* Set the Tx Interrupt Delay register */
1702
1703 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1704 if (hw->mac_type >= e1000_82540)
1705 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1706
1707 /* Program the Transmit Control Register */
1708
1709 tctl = E1000_READ_REG(hw, TCTL);
1710 tctl &= ~E1000_TCTL_CT;
1711 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1712 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1713
1714 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1715 tarc = E1000_READ_REG(hw, TARC0);
1716 /* set the speed mode bit, we'll clear it if we're not at
1717 * gigabit link later */
1718 tarc |= (1 << 21);
1719 E1000_WRITE_REG(hw, TARC0, tarc);
1720 } else if (hw->mac_type == e1000_80003es2lan) {
1721 tarc = E1000_READ_REG(hw, TARC0);
1722 tarc |= 1;
1723 E1000_WRITE_REG(hw, TARC0, tarc);
1724 tarc = E1000_READ_REG(hw, TARC1);
1725 tarc |= 1;
1726 E1000_WRITE_REG(hw, TARC1, tarc);
1727 }
1728
1729 e1000_config_collision_dist(hw);
1730
1731 /* Setup Transmit Descriptor Settings for eop descriptor */
1732 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1733
1734 /* only set IDE if we are delaying interrupts using the timers */
1735 if (adapter->tx_int_delay)
1736 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1737
1738 if (hw->mac_type < e1000_82543)
1739 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1740 else
1741 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1742
1743 /* Cache if we're 82544 running in PCI-X because we'll
1744 * need this to apply a workaround later in the send path. */
1745 if (hw->mac_type == e1000_82544 &&
1746 hw->bus_type == e1000_bus_type_pcix)
1747 adapter->pcix_82544 = 1;
1748
1749 E1000_WRITE_REG(hw, TCTL, tctl);
1750
1751 }
1752
1753 /**
1754 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1755 * @adapter: board private structure
1756 * @rxdr: rx descriptor ring (for a specific queue) to setup
1757 *
1758 * Returns 0 on success, negative on failure
1759 **/
1760
1761 static int
1762 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1763 struct e1000_rx_ring *rxdr)
1764 {
1765 struct pci_dev *pdev = adapter->pdev;
1766 int size, desc_len;
1767
1768 size = sizeof(struct e1000_buffer) * rxdr->count;
1769 rxdr->buffer_info = vmalloc(size);
1770 if (!rxdr->buffer_info) {
1771 DPRINTK(PROBE, ERR,
1772 "Unable to allocate memory for the receive descriptor ring\n");
1773 return -ENOMEM;
1774 }
1775 memset(rxdr->buffer_info, 0, size);
1776
1777 size = sizeof(struct e1000_ps_page) * rxdr->count;
1778 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1779 if (!rxdr->ps_page) {
1780 vfree(rxdr->buffer_info);
1781 DPRINTK(PROBE, ERR,
1782 "Unable to allocate memory for the receive descriptor ring\n");
1783 return -ENOMEM;
1784 }
1785 memset(rxdr->ps_page, 0, size);
1786
1787 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1788 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1789 if (!rxdr->ps_page_dma) {
1790 vfree(rxdr->buffer_info);
1791 kfree(rxdr->ps_page);
1792 DPRINTK(PROBE, ERR,
1793 "Unable to allocate memory for the receive descriptor ring\n");
1794 return -ENOMEM;
1795 }
1796 memset(rxdr->ps_page_dma, 0, size);
1797
1798 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1799 desc_len = sizeof(struct e1000_rx_desc);
1800 else
1801 desc_len = sizeof(union e1000_rx_desc_packet_split);
1802
1803 /* Round up to nearest 4K */
1804
1805 rxdr->size = rxdr->count * desc_len;
1806 E1000_ROUNDUP(rxdr->size, 4096);
1807
1808 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1809
1810 if (!rxdr->desc) {
1811 DPRINTK(PROBE, ERR,
1812 "Unable to allocate memory for the receive descriptor ring\n");
1813 setup_rx_desc_die:
1814 vfree(rxdr->buffer_info);
1815 kfree(rxdr->ps_page);
1816 kfree(rxdr->ps_page_dma);
1817 return -ENOMEM;
1818 }
1819
1820 /* Fix for errata 23, can't cross 64kB boundary */
1821 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1822 void *olddesc = rxdr->desc;
1823 dma_addr_t olddma = rxdr->dma;
1824 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1825 "at %p\n", rxdr->size, rxdr->desc);
1826 /* Try again, without freeing the previous */
1827 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1828 /* Failed allocation, critical failure */
1829 if (!rxdr->desc) {
1830 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1831 DPRINTK(PROBE, ERR,
1832 "Unable to allocate memory "
1833 "for the receive descriptor ring\n");
1834 goto setup_rx_desc_die;
1835 }
1836
1837 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1838 /* give up */
1839 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1840 rxdr->dma);
1841 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1842 DPRINTK(PROBE, ERR,
1843 "Unable to allocate aligned memory "
1844 "for the receive descriptor ring\n");
1845 goto setup_rx_desc_die;
1846 } else {
1847 /* Free old allocation, new allocation was successful */
1848 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1849 }
1850 }
1851 memset(rxdr->desc, 0, rxdr->size);
1852
1853 rxdr->next_to_clean = 0;
1854 rxdr->next_to_use = 0;
1855
1856 return 0;
1857 }
1858
1859 /**
1860 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1861 * (Descriptors) for all queues
1862 * @adapter: board private structure
1863 *
1864 * Return 0 on success, negative on failure
1865 **/
1866
1867 int
1868 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1869 {
1870 int i, err = 0;
1871
1872 for (i = 0; i < adapter->num_rx_queues; i++) {
1873 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1874 if (err) {
1875 DPRINTK(PROBE, ERR,
1876 "Allocation for Rx Queue %u failed\n", i);
1877 for (i-- ; i >= 0; i--)
1878 e1000_free_rx_resources(adapter,
1879 &adapter->rx_ring[i]);
1880 break;
1881 }
1882 }
1883
1884 return err;
1885 }
1886
1887 /**
1888 * e1000_setup_rctl - configure the receive control registers
1889 * @adapter: Board private structure
1890 **/
1891 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1892 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1893 static void
1894 e1000_setup_rctl(struct e1000_adapter *adapter)
1895 {
1896 uint32_t rctl, rfctl;
1897 uint32_t psrctl = 0;
1898 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1899 uint32_t pages = 0;
1900 #endif
1901
1902 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1903
1904 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1905
1906 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1907 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1908 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1909
1910 if (adapter->hw.tbi_compatibility_on == 1)
1911 rctl |= E1000_RCTL_SBP;
1912 else
1913 rctl &= ~E1000_RCTL_SBP;
1914
1915 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1916 rctl &= ~E1000_RCTL_LPE;
1917 else
1918 rctl |= E1000_RCTL_LPE;
1919
1920 /* Setup buffer sizes */
1921 rctl &= ~E1000_RCTL_SZ_4096;
1922 rctl |= E1000_RCTL_BSEX;
1923 switch (adapter->rx_buffer_len) {
1924 case E1000_RXBUFFER_256:
1925 rctl |= E1000_RCTL_SZ_256;
1926 rctl &= ~E1000_RCTL_BSEX;
1927 break;
1928 case E1000_RXBUFFER_512:
1929 rctl |= E1000_RCTL_SZ_512;
1930 rctl &= ~E1000_RCTL_BSEX;
1931 break;
1932 case E1000_RXBUFFER_1024:
1933 rctl |= E1000_RCTL_SZ_1024;
1934 rctl &= ~E1000_RCTL_BSEX;
1935 break;
1936 case E1000_RXBUFFER_2048:
1937 default:
1938 rctl |= E1000_RCTL_SZ_2048;
1939 rctl &= ~E1000_RCTL_BSEX;
1940 break;
1941 case E1000_RXBUFFER_4096:
1942 rctl |= E1000_RCTL_SZ_4096;
1943 break;
1944 case E1000_RXBUFFER_8192:
1945 rctl |= E1000_RCTL_SZ_8192;
1946 break;
1947 case E1000_RXBUFFER_16384:
1948 rctl |= E1000_RCTL_SZ_16384;
1949 break;
1950 }
1951
1952 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1953 /* 82571 and greater support packet-split where the protocol
1954 * header is placed in skb->data and the packet data is
1955 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1956 * In the case of a non-split, skb->data is linearly filled,
1957 * followed by the page buffers. Therefore, skb->data is
1958 * sized to hold the largest protocol header.
1959 */
1960 /* allocations using alloc_page take too long for regular MTU
1961 * so only enable packet split for jumbo frames */
1962 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1963 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1964 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1965 adapter->rx_ps_pages = pages;
1966 else
1967 adapter->rx_ps_pages = 0;
1968 #endif
1969 if (adapter->rx_ps_pages) {
1970 /* Configure extra packet-split registers */
1971 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1972 rfctl |= E1000_RFCTL_EXTEN;
1973 /* disable packet split support for IPv6 extension headers,
1974 * because some malformed IPv6 headers can hang the RX */
1975 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1976 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1977
1978 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1979
1980 rctl |= E1000_RCTL_DTYP_PS;
1981
1982 psrctl |= adapter->rx_ps_bsize0 >>
1983 E1000_PSRCTL_BSIZE0_SHIFT;
1984
1985 switch (adapter->rx_ps_pages) {
1986 case 3:
1987 psrctl |= PAGE_SIZE <<
1988 E1000_PSRCTL_BSIZE3_SHIFT;
1989 case 2:
1990 psrctl |= PAGE_SIZE <<
1991 E1000_PSRCTL_BSIZE2_SHIFT;
1992 case 1:
1993 psrctl |= PAGE_SIZE >>
1994 E1000_PSRCTL_BSIZE1_SHIFT;
1995 break;
1996 }
1997
1998 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1999 }
2000
2001 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2002 }
2003
2004 /**
2005 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2006 * @adapter: board private structure
2007 *
2008 * Configure the Rx unit of the MAC after a reset.
2009 **/
2010
2011 static void
2012 e1000_configure_rx(struct e1000_adapter *adapter)
2013 {
2014 uint64_t rdba;
2015 struct e1000_hw *hw = &adapter->hw;
2016 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2017
2018 if (adapter->rx_ps_pages) {
2019 /* this is a 32 byte descriptor */
2020 rdlen = adapter->rx_ring[0].count *
2021 sizeof(union e1000_rx_desc_packet_split);
2022 adapter->clean_rx = e1000_clean_rx_irq_ps;
2023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2024 } else {
2025 rdlen = adapter->rx_ring[0].count *
2026 sizeof(struct e1000_rx_desc);
2027 adapter->clean_rx = e1000_clean_rx_irq;
2028 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2029 }
2030
2031 /* disable receives while setting up the descriptors */
2032 rctl = E1000_READ_REG(hw, RCTL);
2033 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2034
2035 /* set the Receive Delay Timer Register */
2036 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2037
2038 if (hw->mac_type >= e1000_82540) {
2039 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2040 if (adapter->itr_setting != 0)
2041 E1000_WRITE_REG(hw, ITR,
2042 1000000000 / (adapter->itr * 256));
2043 }
2044
2045 if (hw->mac_type >= e1000_82571) {
2046 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2047 /* Reset delay timers after every interrupt */
2048 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2049 #ifdef CONFIG_E1000_NAPI
2050 /* Auto-Mask interrupts upon ICR access */
2051 ctrl_ext |= E1000_CTRL_EXT_IAME;
2052 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2053 #endif
2054 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2055 E1000_WRITE_FLUSH(hw);
2056 }
2057
2058 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2059 * the Base and Length of the Rx Descriptor Ring */
2060 switch (adapter->num_rx_queues) {
2061 case 1:
2062 default:
2063 rdba = adapter->rx_ring[0].dma;
2064 E1000_WRITE_REG(hw, RDLEN, rdlen);
2065 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2066 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2067 E1000_WRITE_REG(hw, RDT, 0);
2068 E1000_WRITE_REG(hw, RDH, 0);
2069 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2070 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2071 break;
2072 }
2073
2074 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2075 if (hw->mac_type >= e1000_82543) {
2076 rxcsum = E1000_READ_REG(hw, RXCSUM);
2077 if (adapter->rx_csum == TRUE) {
2078 rxcsum |= E1000_RXCSUM_TUOFL;
2079
2080 /* Enable 82571 IPv4 payload checksum for UDP fragments
2081 * Must be used in conjunction with packet-split. */
2082 if ((hw->mac_type >= e1000_82571) &&
2083 (adapter->rx_ps_pages)) {
2084 rxcsum |= E1000_RXCSUM_IPPCSE;
2085 }
2086 } else {
2087 rxcsum &= ~E1000_RXCSUM_TUOFL;
2088 /* don't need to clear IPPCSE as it defaults to 0 */
2089 }
2090 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2091 }
2092
2093 /* enable early receives on 82573, only takes effect if using > 2048
2094 * byte total frame size. for example only for jumbo frames */
2095 #define E1000_ERT_2048 0x100
2096 if (hw->mac_type == e1000_82573)
2097 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2098
2099 /* Enable Receives */
2100 E1000_WRITE_REG(hw, RCTL, rctl);
2101 }
2102
2103 /**
2104 * e1000_free_tx_resources - Free Tx Resources per Queue
2105 * @adapter: board private structure
2106 * @tx_ring: Tx descriptor ring for a specific queue
2107 *
2108 * Free all transmit software resources
2109 **/
2110
2111 static void
2112 e1000_free_tx_resources(struct e1000_adapter *adapter,
2113 struct e1000_tx_ring *tx_ring)
2114 {
2115 struct pci_dev *pdev = adapter->pdev;
2116
2117 e1000_clean_tx_ring(adapter, tx_ring);
2118
2119 vfree(tx_ring->buffer_info);
2120 tx_ring->buffer_info = NULL;
2121
2122 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2123
2124 tx_ring->desc = NULL;
2125 }
2126
2127 /**
2128 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2129 * @adapter: board private structure
2130 *
2131 * Free all transmit software resources
2132 **/
2133
2134 void
2135 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2136 {
2137 int i;
2138
2139 for (i = 0; i < adapter->num_tx_queues; i++)
2140 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2141 }
2142
2143 static void
2144 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2145 struct e1000_buffer *buffer_info)
2146 {
2147 if (buffer_info->dma) {
2148 pci_unmap_page(adapter->pdev,
2149 buffer_info->dma,
2150 buffer_info->length,
2151 PCI_DMA_TODEVICE);
2152 buffer_info->dma = 0;
2153 }
2154 if (buffer_info->skb) {
2155 dev_kfree_skb_any(buffer_info->skb);
2156 buffer_info->skb = NULL;
2157 }
2158 /* buffer_info must be completely set up in the transmit path */
2159 }
2160
2161 /**
2162 * e1000_clean_tx_ring - Free Tx Buffers
2163 * @adapter: board private structure
2164 * @tx_ring: ring to be cleaned
2165 **/
2166
2167 static void
2168 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2169 struct e1000_tx_ring *tx_ring)
2170 {
2171 struct e1000_buffer *buffer_info;
2172 unsigned long size;
2173 unsigned int i;
2174
2175 /* Free all the Tx ring sk_buffs */
2176
2177 for (i = 0; i < tx_ring->count; i++) {
2178 buffer_info = &tx_ring->buffer_info[i];
2179 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2180 }
2181
2182 size = sizeof(struct e1000_buffer) * tx_ring->count;
2183 memset(tx_ring->buffer_info, 0, size);
2184
2185 /* Zero out the descriptor ring */
2186
2187 memset(tx_ring->desc, 0, tx_ring->size);
2188
2189 tx_ring->next_to_use = 0;
2190 tx_ring->next_to_clean = 0;
2191 tx_ring->last_tx_tso = 0;
2192
2193 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2194 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2195 }
2196
2197 /**
2198 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2199 * @adapter: board private structure
2200 **/
2201
2202 static void
2203 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2204 {
2205 int i;
2206
2207 for (i = 0; i < adapter->num_tx_queues; i++)
2208 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2209 }
2210
2211 /**
2212 * e1000_free_rx_resources - Free Rx Resources
2213 * @adapter: board private structure
2214 * @rx_ring: ring to clean the resources from
2215 *
2216 * Free all receive software resources
2217 **/
2218
2219 static void
2220 e1000_free_rx_resources(struct e1000_adapter *adapter,
2221 struct e1000_rx_ring *rx_ring)
2222 {
2223 struct pci_dev *pdev = adapter->pdev;
2224
2225 e1000_clean_rx_ring(adapter, rx_ring);
2226
2227 vfree(rx_ring->buffer_info);
2228 rx_ring->buffer_info = NULL;
2229 kfree(rx_ring->ps_page);
2230 rx_ring->ps_page = NULL;
2231 kfree(rx_ring->ps_page_dma);
2232 rx_ring->ps_page_dma = NULL;
2233
2234 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2235
2236 rx_ring->desc = NULL;
2237 }
2238
2239 /**
2240 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2241 * @adapter: board private structure
2242 *
2243 * Free all receive software resources
2244 **/
2245
2246 void
2247 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2248 {
2249 int i;
2250
2251 for (i = 0; i < adapter->num_rx_queues; i++)
2252 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2253 }
2254
2255 /**
2256 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2257 * @adapter: board private structure
2258 * @rx_ring: ring to free buffers from
2259 **/
2260
2261 static void
2262 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2263 struct e1000_rx_ring *rx_ring)
2264 {
2265 struct e1000_buffer *buffer_info;
2266 struct e1000_ps_page *ps_page;
2267 struct e1000_ps_page_dma *ps_page_dma;
2268 struct pci_dev *pdev = adapter->pdev;
2269 unsigned long size;
2270 unsigned int i, j;
2271
2272 /* Free all the Rx ring sk_buffs */
2273 for (i = 0; i < rx_ring->count; i++) {
2274 buffer_info = &rx_ring->buffer_info[i];
2275 if (buffer_info->skb) {
2276 pci_unmap_single(pdev,
2277 buffer_info->dma,
2278 buffer_info->length,
2279 PCI_DMA_FROMDEVICE);
2280
2281 dev_kfree_skb(buffer_info->skb);
2282 buffer_info->skb = NULL;
2283 }
2284 ps_page = &rx_ring->ps_page[i];
2285 ps_page_dma = &rx_ring->ps_page_dma[i];
2286 for (j = 0; j < adapter->rx_ps_pages; j++) {
2287 if (!ps_page->ps_page[j]) break;
2288 pci_unmap_page(pdev,
2289 ps_page_dma->ps_page_dma[j],
2290 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2291 ps_page_dma->ps_page_dma[j] = 0;
2292 put_page(ps_page->ps_page[j]);
2293 ps_page->ps_page[j] = NULL;
2294 }
2295 }
2296
2297 size = sizeof(struct e1000_buffer) * rx_ring->count;
2298 memset(rx_ring->buffer_info, 0, size);
2299 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2300 memset(rx_ring->ps_page, 0, size);
2301 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2302 memset(rx_ring->ps_page_dma, 0, size);
2303
2304 /* Zero out the descriptor ring */
2305
2306 memset(rx_ring->desc, 0, rx_ring->size);
2307
2308 rx_ring->next_to_clean = 0;
2309 rx_ring->next_to_use = 0;
2310
2311 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2312 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2313 }
2314
2315 /**
2316 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2317 * @adapter: board private structure
2318 **/
2319
2320 static void
2321 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2322 {
2323 int i;
2324
2325 for (i = 0; i < adapter->num_rx_queues; i++)
2326 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2327 }
2328
2329 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2330 * and memory write and invalidate disabled for certain operations
2331 */
2332 static void
2333 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2334 {
2335 struct net_device *netdev = adapter->netdev;
2336 uint32_t rctl;
2337
2338 e1000_pci_clear_mwi(&adapter->hw);
2339
2340 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2341 rctl |= E1000_RCTL_RST;
2342 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2343 E1000_WRITE_FLUSH(&adapter->hw);
2344 mdelay(5);
2345
2346 if (netif_running(netdev))
2347 e1000_clean_all_rx_rings(adapter);
2348 }
2349
2350 static void
2351 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2352 {
2353 struct net_device *netdev = adapter->netdev;
2354 uint32_t rctl;
2355
2356 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2357 rctl &= ~E1000_RCTL_RST;
2358 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2359 E1000_WRITE_FLUSH(&adapter->hw);
2360 mdelay(5);
2361
2362 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2363 e1000_pci_set_mwi(&adapter->hw);
2364
2365 if (netif_running(netdev)) {
2366 /* No need to loop, because 82542 supports only 1 queue */
2367 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2368 e1000_configure_rx(adapter);
2369 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2370 }
2371 }
2372
2373 /**
2374 * e1000_set_mac - Change the Ethernet Address of the NIC
2375 * @netdev: network interface device structure
2376 * @p: pointer to an address structure
2377 *
2378 * Returns 0 on success, negative on failure
2379 **/
2380
2381 static int
2382 e1000_set_mac(struct net_device *netdev, void *p)
2383 {
2384 struct e1000_adapter *adapter = netdev_priv(netdev);
2385 struct sockaddr *addr = p;
2386
2387 if (!is_valid_ether_addr(addr->sa_data))
2388 return -EADDRNOTAVAIL;
2389
2390 /* 82542 2.0 needs to be in reset to write receive address registers */
2391
2392 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2393 e1000_enter_82542_rst(adapter);
2394
2395 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2396 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2397
2398 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2399
2400 /* With 82571 controllers, LAA may be overwritten (with the default)
2401 * due to controller reset from the other port. */
2402 if (adapter->hw.mac_type == e1000_82571) {
2403 /* activate the work around */
2404 adapter->hw.laa_is_present = 1;
2405
2406 /* Hold a copy of the LAA in RAR[14] This is done so that
2407 * between the time RAR[0] gets clobbered and the time it
2408 * gets fixed (in e1000_watchdog), the actual LAA is in one
2409 * of the RARs and no incoming packets directed to this port
2410 * are dropped. Eventaully the LAA will be in RAR[0] and
2411 * RAR[14] */
2412 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2413 E1000_RAR_ENTRIES - 1);
2414 }
2415
2416 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2417 e1000_leave_82542_rst(adapter);
2418
2419 return 0;
2420 }
2421
2422 /**
2423 * e1000_set_multi - Multicast and Promiscuous mode set
2424 * @netdev: network interface device structure
2425 *
2426 * The set_multi entry point is called whenever the multicast address
2427 * list or the network interface flags are updated. This routine is
2428 * responsible for configuring the hardware for proper multicast,
2429 * promiscuous mode, and all-multi behavior.
2430 **/
2431
2432 static void
2433 e1000_set_multi(struct net_device *netdev)
2434 {
2435 struct e1000_adapter *adapter = netdev_priv(netdev);
2436 struct e1000_hw *hw = &adapter->hw;
2437 struct dev_mc_list *mc_ptr;
2438 uint32_t rctl;
2439 uint32_t hash_value;
2440 int i, rar_entries = E1000_RAR_ENTRIES;
2441 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2442 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2443 E1000_NUM_MTA_REGISTERS;
2444
2445 if (adapter->hw.mac_type == e1000_ich8lan)
2446 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2447
2448 /* reserve RAR[14] for LAA over-write work-around */
2449 if (adapter->hw.mac_type == e1000_82571)
2450 rar_entries--;
2451
2452 /* Check for Promiscuous and All Multicast modes */
2453
2454 rctl = E1000_READ_REG(hw, RCTL);
2455
2456 if (netdev->flags & IFF_PROMISC) {
2457 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2458 } else if (netdev->flags & IFF_ALLMULTI) {
2459 rctl |= E1000_RCTL_MPE;
2460 rctl &= ~E1000_RCTL_UPE;
2461 } else {
2462 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2463 }
2464
2465 E1000_WRITE_REG(hw, RCTL, rctl);
2466
2467 /* 82542 2.0 needs to be in reset to write receive address registers */
2468
2469 if (hw->mac_type == e1000_82542_rev2_0)
2470 e1000_enter_82542_rst(adapter);
2471
2472 /* load the first 14 multicast address into the exact filters 1-14
2473 * RAR 0 is used for the station MAC adddress
2474 * if there are not 14 addresses, go ahead and clear the filters
2475 * -- with 82571 controllers only 0-13 entries are filled here
2476 */
2477 mc_ptr = netdev->mc_list;
2478
2479 for (i = 1; i < rar_entries; i++) {
2480 if (mc_ptr) {
2481 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2482 mc_ptr = mc_ptr->next;
2483 } else {
2484 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2485 E1000_WRITE_FLUSH(hw);
2486 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2487 E1000_WRITE_FLUSH(hw);
2488 }
2489 }
2490
2491 /* clear the old settings from the multicast hash table */
2492
2493 for (i = 0; i < mta_reg_count; i++) {
2494 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2495 E1000_WRITE_FLUSH(hw);
2496 }
2497
2498 /* load any remaining addresses into the hash table */
2499
2500 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2501 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2502 e1000_mta_set(hw, hash_value);
2503 }
2504
2505 if (hw->mac_type == e1000_82542_rev2_0)
2506 e1000_leave_82542_rst(adapter);
2507 }
2508
2509 /* Need to wait a few seconds after link up to get diagnostic information from
2510 * the phy */
2511
2512 static void
2513 e1000_update_phy_info(unsigned long data)
2514 {
2515 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2516 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2517 }
2518
2519 /**
2520 * e1000_82547_tx_fifo_stall - Timer Call-back
2521 * @data: pointer to adapter cast into an unsigned long
2522 **/
2523
2524 static void
2525 e1000_82547_tx_fifo_stall(unsigned long data)
2526 {
2527 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2528 struct net_device *netdev = adapter->netdev;
2529 uint32_t tctl;
2530
2531 if (atomic_read(&adapter->tx_fifo_stall)) {
2532 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2533 E1000_READ_REG(&adapter->hw, TDH)) &&
2534 (E1000_READ_REG(&adapter->hw, TDFT) ==
2535 E1000_READ_REG(&adapter->hw, TDFH)) &&
2536 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2537 E1000_READ_REG(&adapter->hw, TDFHS))) {
2538 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2539 E1000_WRITE_REG(&adapter->hw, TCTL,
2540 tctl & ~E1000_TCTL_EN);
2541 E1000_WRITE_REG(&adapter->hw, TDFT,
2542 adapter->tx_head_addr);
2543 E1000_WRITE_REG(&adapter->hw, TDFH,
2544 adapter->tx_head_addr);
2545 E1000_WRITE_REG(&adapter->hw, TDFTS,
2546 adapter->tx_head_addr);
2547 E1000_WRITE_REG(&adapter->hw, TDFHS,
2548 adapter->tx_head_addr);
2549 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2550 E1000_WRITE_FLUSH(&adapter->hw);
2551
2552 adapter->tx_fifo_head = 0;
2553 atomic_set(&adapter->tx_fifo_stall, 0);
2554 netif_wake_queue(netdev);
2555 } else {
2556 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2557 }
2558 }
2559 }
2560
2561 /**
2562 * e1000_watchdog - Timer Call-back
2563 * @data: pointer to adapter cast into an unsigned long
2564 **/
2565 static void
2566 e1000_watchdog(unsigned long data)
2567 {
2568 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2569 struct net_device *netdev = adapter->netdev;
2570 struct e1000_tx_ring *txdr = adapter->tx_ring;
2571 uint32_t link, tctl;
2572 int32_t ret_val;
2573
2574 ret_val = e1000_check_for_link(&adapter->hw);
2575 if ((ret_val == E1000_ERR_PHY) &&
2576 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2577 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2578 /* See e1000_kumeran_lock_loss_workaround() */
2579 DPRINTK(LINK, INFO,
2580 "Gigabit has been disabled, downgrading speed\n");
2581 }
2582
2583 if (adapter->hw.mac_type == e1000_82573) {
2584 e1000_enable_tx_pkt_filtering(&adapter->hw);
2585 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2586 e1000_update_mng_vlan(adapter);
2587 }
2588
2589 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2590 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2591 link = !adapter->hw.serdes_link_down;
2592 else
2593 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2594
2595 if (link) {
2596 if (!netif_carrier_ok(netdev)) {
2597 uint32_t ctrl;
2598 boolean_t txb2b = 1;
2599 e1000_get_speed_and_duplex(&adapter->hw,
2600 &adapter->link_speed,
2601 &adapter->link_duplex);
2602
2603 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2604 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2605 "Flow Control: %s\n",
2606 adapter->link_speed,
2607 adapter->link_duplex == FULL_DUPLEX ?
2608 "Full Duplex" : "Half Duplex",
2609 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2610 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2611 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2612 E1000_CTRL_TFCE) ? "TX" : "None" )));
2613
2614 /* tweak tx_queue_len according to speed/duplex
2615 * and adjust the timeout factor */
2616 netdev->tx_queue_len = adapter->tx_queue_len;
2617 adapter->tx_timeout_factor = 1;
2618 switch (adapter->link_speed) {
2619 case SPEED_10:
2620 txb2b = 0;
2621 netdev->tx_queue_len = 10;
2622 adapter->tx_timeout_factor = 8;
2623 break;
2624 case SPEED_100:
2625 txb2b = 0;
2626 netdev->tx_queue_len = 100;
2627 /* maybe add some timeout factor ? */
2628 break;
2629 }
2630
2631 if ((adapter->hw.mac_type == e1000_82571 ||
2632 adapter->hw.mac_type == e1000_82572) &&
2633 txb2b == 0) {
2634 uint32_t tarc0;
2635 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2636 tarc0 &= ~(1 << 21);
2637 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2638 }
2639
2640 /* disable TSO for pcie and 10/100 speeds, to avoid
2641 * some hardware issues */
2642 if (!adapter->tso_force &&
2643 adapter->hw.bus_type == e1000_bus_type_pci_express){
2644 switch (adapter->link_speed) {
2645 case SPEED_10:
2646 case SPEED_100:
2647 DPRINTK(PROBE,INFO,
2648 "10/100 speed: disabling TSO\n");
2649 netdev->features &= ~NETIF_F_TSO;
2650 netdev->features &= ~NETIF_F_TSO6;
2651 break;
2652 case SPEED_1000:
2653 netdev->features |= NETIF_F_TSO;
2654 netdev->features |= NETIF_F_TSO6;
2655 break;
2656 default:
2657 /* oops */
2658 break;
2659 }
2660 }
2661
2662 /* enable transmits in the hardware, need to do this
2663 * after setting TARC0 */
2664 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2665 tctl |= E1000_TCTL_EN;
2666 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2667
2668 netif_carrier_on(netdev);
2669 netif_wake_queue(netdev);
2670 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2671 adapter->smartspeed = 0;
2672 } else {
2673 /* make sure the receive unit is started */
2674 if (adapter->hw.rx_needs_kicking) {
2675 struct e1000_hw *hw = &adapter->hw;
2676 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2677 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2678 }
2679 }
2680 } else {
2681 if (netif_carrier_ok(netdev)) {
2682 adapter->link_speed = 0;
2683 adapter->link_duplex = 0;
2684 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2685 netif_carrier_off(netdev);
2686 netif_stop_queue(netdev);
2687 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2688
2689 /* 80003ES2LAN workaround--
2690 * For packet buffer work-around on link down event;
2691 * disable receives in the ISR and
2692 * reset device here in the watchdog
2693 */
2694 if (adapter->hw.mac_type == e1000_80003es2lan)
2695 /* reset device */
2696 schedule_work(&adapter->reset_task);
2697 }
2698
2699 e1000_smartspeed(adapter);
2700 }
2701
2702 e1000_update_stats(adapter);
2703
2704 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2705 adapter->tpt_old = adapter->stats.tpt;
2706 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2707 adapter->colc_old = adapter->stats.colc;
2708
2709 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2710 adapter->gorcl_old = adapter->stats.gorcl;
2711 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2712 adapter->gotcl_old = adapter->stats.gotcl;
2713
2714 e1000_update_adaptive(&adapter->hw);
2715
2716 if (!netif_carrier_ok(netdev)) {
2717 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2718 /* We've lost link, so the controller stops DMA,
2719 * but we've got queued Tx work that's never going
2720 * to get done, so reset controller to flush Tx.
2721 * (Do the reset outside of interrupt context). */
2722 adapter->tx_timeout_count++;
2723 schedule_work(&adapter->reset_task);
2724 }
2725 }
2726
2727 /* Cause software interrupt to ensure rx ring is cleaned */
2728 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2729
2730 /* Force detection of hung controller every watchdog period */
2731 adapter->detect_tx_hung = TRUE;
2732
2733 /* With 82571 controllers, LAA may be overwritten due to controller
2734 * reset from the other port. Set the appropriate LAA in RAR[0] */
2735 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2736 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2737
2738 /* Reset the timer */
2739 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2740 }
2741
2742 enum latency_range {
2743 lowest_latency = 0,
2744 low_latency = 1,
2745 bulk_latency = 2,
2746 latency_invalid = 255
2747 };
2748
2749 /**
2750 * e1000_update_itr - update the dynamic ITR value based on statistics
2751 * Stores a new ITR value based on packets and byte
2752 * counts during the last interrupt. The advantage of per interrupt
2753 * computation is faster updates and more accurate ITR for the current
2754 * traffic pattern. Constants in this function were computed
2755 * based on theoretical maximum wire speed and thresholds were set based
2756 * on testing data as well as attempting to minimize response time
2757 * while increasing bulk throughput.
2758 * this functionality is controlled by the InterruptThrottleRate module
2759 * parameter (see e1000_param.c)
2760 * @adapter: pointer to adapter
2761 * @itr_setting: current adapter->itr
2762 * @packets: the number of packets during this measurement interval
2763 * @bytes: the number of bytes during this measurement interval
2764 **/
2765 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2766 uint16_t itr_setting,
2767 int packets,
2768 int bytes)
2769 {
2770 unsigned int retval = itr_setting;
2771 struct e1000_hw *hw = &adapter->hw;
2772
2773 if (unlikely(hw->mac_type < e1000_82540))
2774 goto update_itr_done;
2775
2776 if (packets == 0)
2777 goto update_itr_done;
2778
2779 switch (itr_setting) {
2780 case lowest_latency:
2781 /* jumbo frames get bulk treatment*/
2782 if (bytes/packets > 8000)
2783 retval = bulk_latency;
2784 else if ((packets < 5) && (bytes > 512))
2785 retval = low_latency;
2786 break;
2787 case low_latency: /* 50 usec aka 20000 ints/s */
2788 if (bytes > 10000) {
2789 /* jumbo frames need bulk latency setting */
2790 if (bytes/packets > 8000)
2791 retval = bulk_latency;
2792 else if ((packets < 10) || ((bytes/packets) > 1200))
2793 retval = bulk_latency;
2794 else if ((packets > 35))
2795 retval = lowest_latency;
2796 } else if (bytes/packets > 2000)
2797 retval = bulk_latency;
2798 else if (packets <= 2 && bytes < 512)
2799 retval = lowest_latency;
2800 break;
2801 case bulk_latency: /* 250 usec aka 4000 ints/s */
2802 if (bytes > 25000) {
2803 if (packets > 35)
2804 retval = low_latency;
2805 } else if (bytes < 6000) {
2806 retval = low_latency;
2807 }
2808 break;
2809 }
2810
2811 update_itr_done:
2812 return retval;
2813 }
2814
2815 static void e1000_set_itr(struct e1000_adapter *adapter)
2816 {
2817 struct e1000_hw *hw = &adapter->hw;
2818 uint16_t current_itr;
2819 uint32_t new_itr = adapter->itr;
2820
2821 if (unlikely(hw->mac_type < e1000_82540))
2822 return;
2823
2824 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2825 if (unlikely(adapter->link_speed != SPEED_1000)) {
2826 current_itr = 0;
2827 new_itr = 4000;
2828 goto set_itr_now;
2829 }
2830
2831 adapter->tx_itr = e1000_update_itr(adapter,
2832 adapter->tx_itr,
2833 adapter->total_tx_packets,
2834 adapter->total_tx_bytes);
2835 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2836 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2837 adapter->tx_itr = low_latency;
2838
2839 adapter->rx_itr = e1000_update_itr(adapter,
2840 adapter->rx_itr,
2841 adapter->total_rx_packets,
2842 adapter->total_rx_bytes);
2843 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2844 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2845 adapter->rx_itr = low_latency;
2846
2847 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2848
2849 switch (current_itr) {
2850 /* counts and packets in update_itr are dependent on these numbers */
2851 case lowest_latency:
2852 new_itr = 70000;
2853 break;
2854 case low_latency:
2855 new_itr = 20000; /* aka hwitr = ~200 */
2856 break;
2857 case bulk_latency:
2858 new_itr = 4000;
2859 break;
2860 default:
2861 break;
2862 }
2863
2864 set_itr_now:
2865 if (new_itr != adapter->itr) {
2866 /* this attempts to bias the interrupt rate towards Bulk
2867 * by adding intermediate steps when interrupt rate is
2868 * increasing */
2869 new_itr = new_itr > adapter->itr ?
2870 min(adapter->itr + (new_itr >> 2), new_itr) :
2871 new_itr;
2872 adapter->itr = new_itr;
2873 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2874 }
2875
2876 return;
2877 }
2878
2879 #define E1000_TX_FLAGS_CSUM 0x00000001
2880 #define E1000_TX_FLAGS_VLAN 0x00000002
2881 #define E1000_TX_FLAGS_TSO 0x00000004
2882 #define E1000_TX_FLAGS_IPV4 0x00000008
2883 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2884 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2885
2886 static int
2887 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2888 struct sk_buff *skb)
2889 {
2890 struct e1000_context_desc *context_desc;
2891 struct e1000_buffer *buffer_info;
2892 unsigned int i;
2893 uint32_t cmd_length = 0;
2894 uint16_t ipcse = 0, tucse, mss;
2895 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2896 int err;
2897
2898 if (skb_is_gso(skb)) {
2899 if (skb_header_cloned(skb)) {
2900 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2901 if (err)
2902 return err;
2903 }
2904
2905 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2906 mss = skb_shinfo(skb)->gso_size;
2907 if (skb->protocol == htons(ETH_P_IP)) {
2908 struct iphdr *iph = ip_hdr(skb);
2909 iph->tot_len = 0;
2910 iph->check = 0;
2911 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2912 iph->daddr, 0,
2913 IPPROTO_TCP,
2914 0);
2915 cmd_length = E1000_TXD_CMD_IP;
2916 ipcse = skb_transport_offset(skb) - 1;
2917 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2918 ipv6_hdr(skb)->payload_len = 0;
2919 tcp_hdr(skb)->check =
2920 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2921 &ipv6_hdr(skb)->daddr,
2922 0, IPPROTO_TCP, 0);
2923 ipcse = 0;
2924 }
2925 ipcss = skb_network_offset(skb);
2926 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2927 tucss = skb_transport_offset(skb);
2928 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2929 tucse = 0;
2930
2931 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2932 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2933
2934 i = tx_ring->next_to_use;
2935 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2936 buffer_info = &tx_ring->buffer_info[i];
2937
2938 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2939 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2940 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2941 context_desc->upper_setup.tcp_fields.tucss = tucss;
2942 context_desc->upper_setup.tcp_fields.tucso = tucso;
2943 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2944 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2945 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2946 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2947
2948 buffer_info->time_stamp = jiffies;
2949 buffer_info->next_to_watch = i;
2950
2951 if (++i == tx_ring->count) i = 0;
2952 tx_ring->next_to_use = i;
2953
2954 return TRUE;
2955 }
2956 return FALSE;
2957 }
2958
2959 static boolean_t
2960 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2961 struct sk_buff *skb)
2962 {
2963 struct e1000_context_desc *context_desc;
2964 struct e1000_buffer *buffer_info;
2965 unsigned int i;
2966 uint8_t css;
2967
2968 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2969 css = skb_transport_offset(skb);
2970
2971 i = tx_ring->next_to_use;
2972 buffer_info = &tx_ring->buffer_info[i];
2973 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2974
2975 context_desc->lower_setup.ip_config = 0;
2976 context_desc->upper_setup.tcp_fields.tucss = css;
2977 context_desc->upper_setup.tcp_fields.tucso =
2978 css + skb->csum_offset;
2979 context_desc->upper_setup.tcp_fields.tucse = 0;
2980 context_desc->tcp_seg_setup.data = 0;
2981 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2982
2983 buffer_info->time_stamp = jiffies;
2984 buffer_info->next_to_watch = i;
2985
2986 if (unlikely(++i == tx_ring->count)) i = 0;
2987 tx_ring->next_to_use = i;
2988
2989 return TRUE;
2990 }
2991
2992 return FALSE;
2993 }
2994
2995 #define E1000_MAX_TXD_PWR 12
2996 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2997
2998 static int
2999 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3000 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3001 unsigned int nr_frags, unsigned int mss)
3002 {
3003 struct e1000_buffer *buffer_info;
3004 unsigned int len = skb->len;
3005 unsigned int offset = 0, size, count = 0, i;
3006 unsigned int f;
3007 len -= skb->data_len;
3008
3009 i = tx_ring->next_to_use;
3010
3011 while (len) {
3012 buffer_info = &tx_ring->buffer_info[i];
3013 size = min(len, max_per_txd);
3014 /* Workaround for Controller erratum --
3015 * descriptor for non-tso packet in a linear SKB that follows a
3016 * tso gets written back prematurely before the data is fully
3017 * DMA'd to the controller */
3018 if (!skb->data_len && tx_ring->last_tx_tso &&
3019 !skb_is_gso(skb)) {
3020 tx_ring->last_tx_tso = 0;
3021 size -= 4;
3022 }
3023
3024 /* Workaround for premature desc write-backs
3025 * in TSO mode. Append 4-byte sentinel desc */
3026 if (unlikely(mss && !nr_frags && size == len && size > 8))
3027 size -= 4;
3028 /* work-around for errata 10 and it applies
3029 * to all controllers in PCI-X mode
3030 * The fix is to make sure that the first descriptor of a
3031 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3032 */
3033 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3034 (size > 2015) && count == 0))
3035 size = 2015;
3036
3037 /* Workaround for potential 82544 hang in PCI-X. Avoid
3038 * terminating buffers within evenly-aligned dwords. */
3039 if (unlikely(adapter->pcix_82544 &&
3040 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3041 size > 4))
3042 size -= 4;
3043
3044 buffer_info->length = size;
3045 buffer_info->dma =
3046 pci_map_single(adapter->pdev,
3047 skb->data + offset,
3048 size,
3049 PCI_DMA_TODEVICE);
3050 buffer_info->time_stamp = jiffies;
3051 buffer_info->next_to_watch = i;
3052
3053 len -= size;
3054 offset += size;
3055 count++;
3056 if (unlikely(++i == tx_ring->count)) i = 0;
3057 }
3058
3059 for (f = 0; f < nr_frags; f++) {
3060 struct skb_frag_struct *frag;
3061
3062 frag = &skb_shinfo(skb)->frags[f];
3063 len = frag->size;
3064 offset = frag->page_offset;
3065
3066 while (len) {
3067 buffer_info = &tx_ring->buffer_info[i];
3068 size = min(len, max_per_txd);
3069 /* Workaround for premature desc write-backs
3070 * in TSO mode. Append 4-byte sentinel desc */
3071 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3072 size -= 4;
3073 /* Workaround for potential 82544 hang in PCI-X.
3074 * Avoid terminating buffers within evenly-aligned
3075 * dwords. */
3076 if (unlikely(adapter->pcix_82544 &&
3077 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3078 size > 4))
3079 size -= 4;
3080
3081 buffer_info->length = size;
3082 buffer_info->dma =
3083 pci_map_page(adapter->pdev,
3084 frag->page,
3085 offset,
3086 size,
3087 PCI_DMA_TODEVICE);
3088 buffer_info->time_stamp = jiffies;
3089 buffer_info->next_to_watch = i;
3090
3091 len -= size;
3092 offset += size;
3093 count++;
3094 if (unlikely(++i == tx_ring->count)) i = 0;
3095 }
3096 }
3097
3098 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3099 tx_ring->buffer_info[i].skb = skb;
3100 tx_ring->buffer_info[first].next_to_watch = i;
3101
3102 return count;
3103 }
3104
3105 static void
3106 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3107 int tx_flags, int count)
3108 {
3109 struct e1000_tx_desc *tx_desc = NULL;
3110 struct e1000_buffer *buffer_info;
3111 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3112 unsigned int i;
3113
3114 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3115 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3116 E1000_TXD_CMD_TSE;
3117 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3118
3119 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3120 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3121 }
3122
3123 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3124 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3125 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3126 }
3127
3128 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3129 txd_lower |= E1000_TXD_CMD_VLE;
3130 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3131 }
3132
3133 i = tx_ring->next_to_use;
3134
3135 while (count--) {
3136 buffer_info = &tx_ring->buffer_info[i];
3137 tx_desc = E1000_TX_DESC(*tx_ring, i);
3138 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3139 tx_desc->lower.data =
3140 cpu_to_le32(txd_lower | buffer_info->length);
3141 tx_desc->upper.data = cpu_to_le32(txd_upper);
3142 if (unlikely(++i == tx_ring->count)) i = 0;
3143 }
3144
3145 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3146
3147 /* Force memory writes to complete before letting h/w
3148 * know there are new descriptors to fetch. (Only
3149 * applicable for weak-ordered memory model archs,
3150 * such as IA-64). */
3151 wmb();
3152
3153 tx_ring->next_to_use = i;
3154 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3155 /* we need this if more than one processor can write to our tail
3156 * at a time, it syncronizes IO on IA64/Altix systems */
3157 mmiowb();
3158 }
3159
3160 /**
3161 * 82547 workaround to avoid controller hang in half-duplex environment.
3162 * The workaround is to avoid queuing a large packet that would span
3163 * the internal Tx FIFO ring boundary by notifying the stack to resend
3164 * the packet at a later time. This gives the Tx FIFO an opportunity to
3165 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3166 * to the beginning of the Tx FIFO.
3167 **/
3168
3169 #define E1000_FIFO_HDR 0x10
3170 #define E1000_82547_PAD_LEN 0x3E0
3171
3172 static int
3173 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3174 {
3175 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3176 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3177
3178 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3179
3180 if (adapter->link_duplex != HALF_DUPLEX)
3181 goto no_fifo_stall_required;
3182
3183 if (atomic_read(&adapter->tx_fifo_stall))
3184 return 1;
3185
3186 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3187 atomic_set(&adapter->tx_fifo_stall, 1);
3188 return 1;
3189 }
3190
3191 no_fifo_stall_required:
3192 adapter->tx_fifo_head += skb_fifo_len;
3193 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3194 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3195 return 0;
3196 }
3197
3198 #define MINIMUM_DHCP_PACKET_SIZE 282
3199 static int
3200 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3201 {
3202 struct e1000_hw *hw = &adapter->hw;
3203 uint16_t length, offset;
3204 if (vlan_tx_tag_present(skb)) {
3205 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3206 ( adapter->hw.mng_cookie.status &
3207 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3208 return 0;
3209 }
3210 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3211 struct ethhdr *eth = (struct ethhdr *) skb->data;
3212 if ((htons(ETH_P_IP) == eth->h_proto)) {
3213 const struct iphdr *ip =
3214 (struct iphdr *)((uint8_t *)skb->data+14);
3215 if (IPPROTO_UDP == ip->protocol) {
3216 struct udphdr *udp =
3217 (struct udphdr *)((uint8_t *)ip +
3218 (ip->ihl << 2));
3219 if (ntohs(udp->dest) == 67) {
3220 offset = (uint8_t *)udp + 8 - skb->data;
3221 length = skb->len - offset;
3222
3223 return e1000_mng_write_dhcp_info(hw,
3224 (uint8_t *)udp + 8,
3225 length);
3226 }
3227 }
3228 }
3229 }
3230 return 0;
3231 }
3232
3233 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3234 {
3235 struct e1000_adapter *adapter = netdev_priv(netdev);
3236 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3237
3238 netif_stop_queue(netdev);
3239 /* Herbert's original patch had:
3240 * smp_mb__after_netif_stop_queue();
3241 * but since that doesn't exist yet, just open code it. */
3242 smp_mb();
3243
3244 /* We need to check again in a case another CPU has just
3245 * made room available. */
3246 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3247 return -EBUSY;
3248
3249 /* A reprieve! */
3250 netif_start_queue(netdev);
3251 ++adapter->restart_queue;
3252 return 0;
3253 }
3254
3255 static int e1000_maybe_stop_tx(struct net_device *netdev,
3256 struct e1000_tx_ring *tx_ring, int size)
3257 {
3258 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3259 return 0;
3260 return __e1000_maybe_stop_tx(netdev, size);
3261 }
3262
3263 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3264 static int
3265 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3266 {
3267 struct e1000_adapter *adapter = netdev_priv(netdev);
3268 struct e1000_tx_ring *tx_ring;
3269 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3270 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3271 unsigned int tx_flags = 0;
3272 unsigned int len = skb->len;
3273 unsigned long flags;
3274 unsigned int nr_frags = 0;
3275 unsigned int mss = 0;
3276 int count = 0;
3277 int tso;
3278 unsigned int f;
3279 len -= skb->data_len;
3280
3281 /* This goes back to the question of how to logically map a tx queue
3282 * to a flow. Right now, performance is impacted slightly negatively
3283 * if using multiple tx queues. If the stack breaks away from a
3284 * single qdisc implementation, we can look at this again. */
3285 tx_ring = adapter->tx_ring;
3286
3287 if (unlikely(skb->len <= 0)) {
3288 dev_kfree_skb_any(skb);
3289 return NETDEV_TX_OK;
3290 }
3291
3292 /* 82571 and newer doesn't need the workaround that limited descriptor
3293 * length to 4kB */
3294 if (adapter->hw.mac_type >= e1000_82571)
3295 max_per_txd = 8192;
3296
3297 mss = skb_shinfo(skb)->gso_size;
3298 /* The controller does a simple calculation to
3299 * make sure there is enough room in the FIFO before
3300 * initiating the DMA for each buffer. The calc is:
3301 * 4 = ceil(buffer len/mss). To make sure we don't
3302 * overrun the FIFO, adjust the max buffer len if mss
3303 * drops. */
3304 if (mss) {
3305 uint8_t hdr_len;
3306 max_per_txd = min(mss << 2, max_per_txd);
3307 max_txd_pwr = fls(max_per_txd) - 1;
3308
3309 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3310 * points to just header, pull a few bytes of payload from
3311 * frags into skb->data */
3312 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3313 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3314 switch (adapter->hw.mac_type) {
3315 unsigned int pull_size;
3316 case e1000_82544:
3317 /* Make sure we have room to chop off 4 bytes,
3318 * and that the end alignment will work out to
3319 * this hardware's requirements
3320 * NOTE: this is a TSO only workaround
3321 * if end byte alignment not correct move us
3322 * into the next dword */
3323 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3324 break;
3325 /* fall through */
3326 case e1000_82571:
3327 case e1000_82572:
3328 case e1000_82573:
3329 case e1000_ich8lan:
3330 pull_size = min((unsigned int)4, skb->data_len);
3331 if (!__pskb_pull_tail(skb, pull_size)) {
3332 DPRINTK(DRV, ERR,
3333 "__pskb_pull_tail failed.\n");
3334 dev_kfree_skb_any(skb);
3335 return NETDEV_TX_OK;
3336 }
3337 len = skb->len - skb->data_len;
3338 break;
3339 default:
3340 /* do nothing */
3341 break;
3342 }
3343 }
3344 }
3345
3346 /* reserve a descriptor for the offload context */
3347 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3348 count++;
3349 count++;
3350
3351 /* Controller Erratum workaround */
3352 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3353 count++;
3354
3355 count += TXD_USE_COUNT(len, max_txd_pwr);
3356
3357 if (adapter->pcix_82544)
3358 count++;
3359
3360 /* work-around for errata 10 and it applies to all controllers
3361 * in PCI-X mode, so add one more descriptor to the count
3362 */
3363 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3364 (len > 2015)))
3365 count++;
3366
3367 nr_frags = skb_shinfo(skb)->nr_frags;
3368 for (f = 0; f < nr_frags; f++)
3369 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3370 max_txd_pwr);
3371 if (adapter->pcix_82544)
3372 count += nr_frags;
3373
3374
3375 if (adapter->hw.tx_pkt_filtering &&
3376 (adapter->hw.mac_type == e1000_82573))
3377 e1000_transfer_dhcp_info(adapter, skb);
3378
3379 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3380 /* Collision - tell upper layer to requeue */
3381 return NETDEV_TX_LOCKED;
3382
3383 /* need: count + 2 desc gap to keep tail from touching
3384 * head, otherwise try next time */
3385 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3386 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3387 return NETDEV_TX_BUSY;
3388 }
3389
3390 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3391 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3392 netif_stop_queue(netdev);
3393 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3394 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3395 return NETDEV_TX_BUSY;
3396 }
3397 }
3398
3399 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3400 tx_flags |= E1000_TX_FLAGS_VLAN;
3401 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3402 }
3403
3404 first = tx_ring->next_to_use;
3405
3406 tso = e1000_tso(adapter, tx_ring, skb);
3407 if (tso < 0) {
3408 dev_kfree_skb_any(skb);
3409 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3410 return NETDEV_TX_OK;
3411 }
3412
3413 if (likely(tso)) {
3414 tx_ring->last_tx_tso = 1;
3415 tx_flags |= E1000_TX_FLAGS_TSO;
3416 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3417 tx_flags |= E1000_TX_FLAGS_CSUM;
3418
3419 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3420 * 82571 hardware supports TSO capabilities for IPv6 as well...
3421 * no longer assume, we must. */
3422 if (likely(skb->protocol == htons(ETH_P_IP)))
3423 tx_flags |= E1000_TX_FLAGS_IPV4;
3424
3425 e1000_tx_queue(adapter, tx_ring, tx_flags,
3426 e1000_tx_map(adapter, tx_ring, skb, first,
3427 max_per_txd, nr_frags, mss));
3428
3429 netdev->trans_start = jiffies;
3430
3431 /* Make sure there is space in the ring for the next send. */
3432 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3433
3434 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3435 return NETDEV_TX_OK;
3436 }
3437
3438 /**
3439 * e1000_tx_timeout - Respond to a Tx Hang
3440 * @netdev: network interface device structure
3441 **/
3442
3443 static void
3444 e1000_tx_timeout(struct net_device *netdev)
3445 {
3446 struct e1000_adapter *adapter = netdev_priv(netdev);
3447
3448 /* Do the reset outside of interrupt context */
3449 adapter->tx_timeout_count++;
3450 schedule_work(&adapter->reset_task);
3451 }
3452
3453 static void
3454 e1000_reset_task(struct work_struct *work)
3455 {
3456 struct e1000_adapter *adapter =
3457 container_of(work, struct e1000_adapter, reset_task);
3458
3459 e1000_reinit_locked(adapter);
3460 }
3461
3462 /**
3463 * e1000_get_stats - Get System Network Statistics
3464 * @netdev: network interface device structure
3465 *
3466 * Returns the address of the device statistics structure.
3467 * The statistics are actually updated from the timer callback.
3468 **/
3469
3470 static struct net_device_stats *
3471 e1000_get_stats(struct net_device *netdev)
3472 {
3473 struct e1000_adapter *adapter = netdev_priv(netdev);
3474
3475 /* only return the current stats */
3476 return &adapter->net_stats;
3477 }
3478
3479 /**
3480 * e1000_change_mtu - Change the Maximum Transfer Unit
3481 * @netdev: network interface device structure
3482 * @new_mtu: new value for maximum frame size
3483 *
3484 * Returns 0 on success, negative on failure
3485 **/
3486
3487 static int
3488 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3489 {
3490 struct e1000_adapter *adapter = netdev_priv(netdev);
3491 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3492 uint16_t eeprom_data = 0;
3493
3494 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3495 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3496 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3497 return -EINVAL;
3498 }
3499
3500 /* Adapter-specific max frame size limits. */
3501 switch (adapter->hw.mac_type) {
3502 case e1000_undefined ... e1000_82542_rev2_1:
3503 case e1000_ich8lan:
3504 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3505 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3506 return -EINVAL;
3507 }
3508 break;
3509 case e1000_82573:
3510 /* Jumbo Frames not supported if:
3511 * - this is not an 82573L device
3512 * - ASPM is enabled in any way (0x1A bits 3:2) */
3513 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3514 &eeprom_data);
3515 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3516 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3517 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3518 DPRINTK(PROBE, ERR,
3519 "Jumbo Frames not supported.\n");
3520 return -EINVAL;
3521 }
3522 break;
3523 }
3524 /* ERT will be enabled later to enable wire speed receives */
3525
3526 /* fall through to get support */
3527 case e1000_82571:
3528 case e1000_82572:
3529 case e1000_80003es2lan:
3530 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3531 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3532 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3533 return -EINVAL;
3534 }
3535 break;
3536 default:
3537 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3538 break;
3539 }
3540
3541 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3542 * means we reserve 2 more, this pushes us to allocate from the next
3543 * larger slab size
3544 * i.e. RXBUFFER_2048 --> size-4096 slab */
3545
3546 if (max_frame <= E1000_RXBUFFER_256)
3547 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3548 else if (max_frame <= E1000_RXBUFFER_512)
3549 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3550 else if (max_frame <= E1000_RXBUFFER_1024)
3551 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3552 else if (max_frame <= E1000_RXBUFFER_2048)
3553 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3554 else if (max_frame <= E1000_RXBUFFER_4096)
3555 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3556 else if (max_frame <= E1000_RXBUFFER_8192)
3557 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3558 else if (max_frame <= E1000_RXBUFFER_16384)
3559 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3560
3561 /* adjust allocation if LPE protects us, and we aren't using SBP */
3562 if (!adapter->hw.tbi_compatibility_on &&
3563 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3564 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3565 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3566
3567 netdev->mtu = new_mtu;
3568 adapter->hw.max_frame_size = max_frame;
3569
3570 if (netif_running(netdev))
3571 e1000_reinit_locked(adapter);
3572
3573 return 0;
3574 }
3575
3576 /**
3577 * e1000_update_stats - Update the board statistics counters
3578 * @adapter: board private structure
3579 **/
3580
3581 void
3582 e1000_update_stats(struct e1000_adapter *adapter)
3583 {
3584 struct e1000_hw *hw = &adapter->hw;
3585 struct pci_dev *pdev = adapter->pdev;
3586 unsigned long flags;
3587 uint16_t phy_tmp;
3588
3589 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3590
3591 /*
3592 * Prevent stats update while adapter is being reset, or if the pci
3593 * connection is down.
3594 */
3595 if (adapter->link_speed == 0)
3596 return;
3597 if (pci_channel_offline(pdev))
3598 return;
3599
3600 spin_lock_irqsave(&adapter->stats_lock, flags);
3601
3602 /* these counters are modified from e1000_adjust_tbi_stats,
3603 * called from the interrupt context, so they must only
3604 * be written while holding adapter->stats_lock
3605 */
3606
3607 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3608 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3609 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3610 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3611 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3612 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3613 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3614
3615 if (adapter->hw.mac_type != e1000_ich8lan) {
3616 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3617 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3618 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3619 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3620 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3621 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3622 }
3623
3624 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3625 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3626 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3627 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3628 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3629 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3630 adapter->stats.dc += E1000_READ_REG(hw, DC);
3631 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3632 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3633 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3634 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3635 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3636 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3637 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3638 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3639 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3640 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3641 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3642 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3643 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3644 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3645 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3646 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3647 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3648 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3649 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3650
3651 if (adapter->hw.mac_type != e1000_ich8lan) {
3652 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3653 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3654 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3655 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3656 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3657 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3658 }
3659
3660 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3661 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3662
3663 /* used for adaptive IFS */
3664
3665 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3666 adapter->stats.tpt += hw->tx_packet_delta;
3667 hw->collision_delta = E1000_READ_REG(hw, COLC);
3668 adapter->stats.colc += hw->collision_delta;
3669
3670 if (hw->mac_type >= e1000_82543) {
3671 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3672 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3673 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3674 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3675 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3676 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3677 }
3678 if (hw->mac_type > e1000_82547_rev_2) {
3679 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3680 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3681
3682 if (adapter->hw.mac_type != e1000_ich8lan) {
3683 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3684 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3685 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3686 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3687 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3688 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3689 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3690 }
3691 }
3692
3693 /* Fill out the OS statistics structure */
3694 adapter->net_stats.rx_packets = adapter->stats.gprc;
3695 adapter->net_stats.tx_packets = adapter->stats.gptc;
3696 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3697 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3698 adapter->net_stats.multicast = adapter->stats.mprc;
3699 adapter->net_stats.collisions = adapter->stats.colc;
3700
3701 /* Rx Errors */
3702
3703 /* RLEC on some newer hardware can be incorrect so build
3704 * our own version based on RUC and ROC */
3705 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3706 adapter->stats.crcerrs + adapter->stats.algnerrc +
3707 adapter->stats.ruc + adapter->stats.roc +
3708 adapter->stats.cexterr;
3709 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3710 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3711 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3712 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3713 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3714
3715 /* Tx Errors */
3716 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3717 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3718 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3719 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3720 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3721 if (adapter->hw.bad_tx_carr_stats_fd &&
3722 adapter->link_duplex == FULL_DUPLEX) {
3723 adapter->net_stats.tx_carrier_errors = 0;
3724 adapter->stats.tncrs = 0;
3725 }
3726
3727 /* Tx Dropped needs to be maintained elsewhere */
3728
3729 /* Phy Stats */
3730 if (hw->media_type == e1000_media_type_copper) {
3731 if ((adapter->link_speed == SPEED_1000) &&
3732 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3733 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3734 adapter->phy_stats.idle_errors += phy_tmp;
3735 }
3736
3737 if ((hw->mac_type <= e1000_82546) &&
3738 (hw->phy_type == e1000_phy_m88) &&
3739 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3740 adapter->phy_stats.receive_errors += phy_tmp;
3741 }
3742
3743 /* Management Stats */
3744 if (adapter->hw.has_smbus) {
3745 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3746 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3747 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3748 }
3749
3750 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3751 }
3752 #ifdef CONFIG_PCI_MSI
3753
3754 /**
3755 * e1000_intr_msi - Interrupt Handler
3756 * @irq: interrupt number
3757 * @data: pointer to a network interface device structure
3758 **/
3759
3760 static irqreturn_t
3761 e1000_intr_msi(int irq, void *data)
3762 {
3763 struct net_device *netdev = data;
3764 struct e1000_adapter *adapter = netdev_priv(netdev);
3765 struct e1000_hw *hw = &adapter->hw;
3766 #ifndef CONFIG_E1000_NAPI
3767 int i;
3768 #endif
3769 uint32_t icr = E1000_READ_REG(hw, ICR);
3770
3771 #ifdef CONFIG_E1000_NAPI
3772 /* read ICR disables interrupts using IAM, so keep up with our
3773 * enable/disable accounting */
3774 atomic_inc(&adapter->irq_sem);
3775 #endif
3776 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3777 hw->get_link_status = 1;
3778 /* 80003ES2LAN workaround-- For packet buffer work-around on
3779 * link down event; disable receives here in the ISR and reset
3780 * adapter in watchdog */
3781 if (netif_carrier_ok(netdev) &&
3782 (adapter->hw.mac_type == e1000_80003es2lan)) {
3783 /* disable receives */
3784 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3785 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3786 }
3787 /* guard against interrupt when we're going down */
3788 if (!test_bit(__E1000_DOWN, &adapter->flags))
3789 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3790 }
3791
3792 #ifdef CONFIG_E1000_NAPI
3793 if (likely(netif_rx_schedule_prep(netdev))) {
3794 adapter->total_tx_bytes = 0;
3795 adapter->total_tx_packets = 0;
3796 adapter->total_rx_bytes = 0;
3797 adapter->total_rx_packets = 0;
3798 __netif_rx_schedule(netdev);
3799 } else
3800 e1000_irq_enable(adapter);
3801 #else
3802 adapter->total_tx_bytes = 0;
3803 adapter->total_rx_bytes = 0;
3804 adapter->total_tx_packets = 0;
3805 adapter->total_rx_packets = 0;
3806
3807 for (i = 0; i < E1000_MAX_INTR; i++)
3808 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3809 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3810 break;
3811
3812 if (likely(adapter->itr_setting & 3))
3813 e1000_set_itr(adapter);
3814 #endif
3815
3816 return IRQ_HANDLED;
3817 }
3818 #endif
3819
3820 /**
3821 * e1000_intr - Interrupt Handler
3822 * @irq: interrupt number
3823 * @data: pointer to a network interface device structure
3824 **/
3825
3826 static irqreturn_t
3827 e1000_intr(int irq, void *data)
3828 {
3829 struct net_device *netdev = data;
3830 struct e1000_adapter *adapter = netdev_priv(netdev);
3831 struct e1000_hw *hw = &adapter->hw;
3832 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3833 #ifndef CONFIG_E1000_NAPI
3834 int i;
3835 #endif
3836 if (unlikely(!icr))
3837 return IRQ_NONE; /* Not our interrupt */
3838
3839 #ifdef CONFIG_E1000_NAPI
3840 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3841 * not set, then the adapter didn't send an interrupt */
3842 if (unlikely(hw->mac_type >= e1000_82571 &&
3843 !(icr & E1000_ICR_INT_ASSERTED)))
3844 return IRQ_NONE;
3845
3846 /* Interrupt Auto-Mask...upon reading ICR,
3847 * interrupts are masked. No need for the
3848 * IMC write, but it does mean we should
3849 * account for it ASAP. */
3850 if (likely(hw->mac_type >= e1000_82571))
3851 atomic_inc(&adapter->irq_sem);
3852 #endif
3853
3854 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3855 hw->get_link_status = 1;
3856 /* 80003ES2LAN workaround--
3857 * For packet buffer work-around on link down event;
3858 * disable receives here in the ISR and
3859 * reset adapter in watchdog
3860 */
3861 if (netif_carrier_ok(netdev) &&
3862 (adapter->hw.mac_type == e1000_80003es2lan)) {
3863 /* disable receives */
3864 rctl = E1000_READ_REG(hw, RCTL);
3865 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3866 }
3867 /* guard against interrupt when we're going down */
3868 if (!test_bit(__E1000_DOWN, &adapter->flags))
3869 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3870 }
3871
3872 #ifdef CONFIG_E1000_NAPI
3873 if (unlikely(hw->mac_type < e1000_82571)) {
3874 /* disable interrupts, without the synchronize_irq bit */
3875 atomic_inc(&adapter->irq_sem);
3876 E1000_WRITE_REG(hw, IMC, ~0);
3877 E1000_WRITE_FLUSH(hw);
3878 }
3879 if (likely(netif_rx_schedule_prep(netdev))) {
3880 adapter->total_tx_bytes = 0;
3881 adapter->total_tx_packets = 0;
3882 adapter->total_rx_bytes = 0;
3883 adapter->total_rx_packets = 0;
3884 __netif_rx_schedule(netdev);
3885 } else
3886 /* this really should not happen! if it does it is basically a
3887 * bug, but not a hard error, so enable ints and continue */
3888 e1000_irq_enable(adapter);
3889 #else
3890 /* Writing IMC and IMS is needed for 82547.
3891 * Due to Hub Link bus being occupied, an interrupt
3892 * de-assertion message is not able to be sent.
3893 * When an interrupt assertion message is generated later,
3894 * two messages are re-ordered and sent out.
3895 * That causes APIC to think 82547 is in de-assertion
3896 * state, while 82547 is in assertion state, resulting
3897 * in dead lock. Writing IMC forces 82547 into
3898 * de-assertion state.
3899 */
3900 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3901 atomic_inc(&adapter->irq_sem);
3902 E1000_WRITE_REG(hw, IMC, ~0);
3903 }
3904
3905 adapter->total_tx_bytes = 0;
3906 adapter->total_rx_bytes = 0;
3907 adapter->total_tx_packets = 0;
3908 adapter->total_rx_packets = 0;
3909
3910 for (i = 0; i < E1000_MAX_INTR; i++)
3911 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3912 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3913 break;
3914
3915 if (likely(adapter->itr_setting & 3))
3916 e1000_set_itr(adapter);
3917
3918 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3919 e1000_irq_enable(adapter);
3920
3921 #endif
3922 return IRQ_HANDLED;
3923 }
3924
3925 #ifdef CONFIG_E1000_NAPI
3926 /**
3927 * e1000_clean - NAPI Rx polling callback
3928 * @adapter: board private structure
3929 **/
3930
3931 static int
3932 e1000_clean(struct net_device *poll_dev, int *budget)
3933 {
3934 struct e1000_adapter *adapter;
3935 int work_to_do = min(*budget, poll_dev->quota);
3936 int tx_cleaned = 0, work_done = 0;
3937
3938 /* Must NOT use netdev_priv macro here. */
3939 adapter = poll_dev->priv;
3940
3941 /* Keep link state information with original netdev */
3942 if (!netif_carrier_ok(poll_dev))
3943 goto quit_polling;
3944
3945 /* e1000_clean is called per-cpu. This lock protects
3946 * tx_ring[0] from being cleaned by multiple cpus
3947 * simultaneously. A failure obtaining the lock means
3948 * tx_ring[0] is currently being cleaned anyway. */
3949 if (spin_trylock(&adapter->tx_queue_lock)) {
3950 tx_cleaned = e1000_clean_tx_irq(adapter,
3951 &adapter->tx_ring[0]);
3952 spin_unlock(&adapter->tx_queue_lock);
3953 }
3954
3955 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3956 &work_done, work_to_do);
3957
3958 *budget -= work_done;
3959 poll_dev->quota -= work_done;
3960
3961 /* If no Tx and not enough Rx work done, exit the polling mode */
3962 if ((!tx_cleaned && (work_done == 0)) ||
3963 !netif_running(poll_dev)) {
3964 quit_polling:
3965 if (likely(adapter->itr_setting & 3))
3966 e1000_set_itr(adapter);
3967 netif_rx_complete(poll_dev);
3968 e1000_irq_enable(adapter);
3969 return 0;
3970 }
3971
3972 return 1;
3973 }
3974
3975 #endif
3976 /**
3977 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3978 * @adapter: board private structure
3979 **/
3980
3981 static boolean_t
3982 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3983 struct e1000_tx_ring *tx_ring)
3984 {
3985 struct net_device *netdev = adapter->netdev;
3986 struct e1000_tx_desc *tx_desc, *eop_desc;
3987 struct e1000_buffer *buffer_info;
3988 unsigned int i, eop;
3989 #ifdef CONFIG_E1000_NAPI
3990 unsigned int count = 0;
3991 #endif
3992 boolean_t cleaned = FALSE;
3993 unsigned int total_tx_bytes=0, total_tx_packets=0;
3994
3995 i = tx_ring->next_to_clean;
3996 eop = tx_ring->buffer_info[i].next_to_watch;
3997 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3998
3999 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4000 for (cleaned = FALSE; !cleaned; ) {
4001 tx_desc = E1000_TX_DESC(*tx_ring, i);
4002 buffer_info = &tx_ring->buffer_info[i];
4003 cleaned = (i == eop);
4004
4005 if (cleaned) {
4006 struct sk_buff *skb = buffer_info->skb;
4007 unsigned int segs, bytecount;
4008 segs = skb_shinfo(skb)->gso_segs ?: 1;
4009 /* multiply data chunks by size of headers */
4010 bytecount = ((segs - 1) * skb_headlen(skb)) +
4011 skb->len;
4012 total_tx_packets += segs;
4013 total_tx_bytes += bytecount;
4014 }
4015 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4016 tx_desc->upper.data = 0;
4017
4018 if (unlikely(++i == tx_ring->count)) i = 0;
4019 }
4020
4021 eop = tx_ring->buffer_info[i].next_to_watch;
4022 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4023 #ifdef CONFIG_E1000_NAPI
4024 #define E1000_TX_WEIGHT 64
4025 /* weight of a sort for tx, to avoid endless transmit cleanup */
4026 if (count++ == E1000_TX_WEIGHT) break;
4027 #endif
4028 }
4029
4030 tx_ring->next_to_clean = i;
4031
4032 #define TX_WAKE_THRESHOLD 32
4033 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4034 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4035 /* Make sure that anybody stopping the queue after this
4036 * sees the new next_to_clean.
4037 */
4038 smp_mb();
4039 if (netif_queue_stopped(netdev)) {
4040 netif_wake_queue(netdev);
4041 ++adapter->restart_queue;
4042 }
4043 }
4044
4045 if (adapter->detect_tx_hung) {
4046 /* Detect a transmit hang in hardware, this serializes the
4047 * check with the clearing of time_stamp and movement of i */
4048 adapter->detect_tx_hung = FALSE;
4049 if (tx_ring->buffer_info[eop].dma &&
4050 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4051 (adapter->tx_timeout_factor * HZ))
4052 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4053 E1000_STATUS_TXOFF)) {
4054
4055 /* detected Tx unit hang */
4056 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4057 " Tx Queue <%lu>\n"
4058 " TDH <%x>\n"
4059 " TDT <%x>\n"
4060 " next_to_use <%x>\n"
4061 " next_to_clean <%x>\n"
4062 "buffer_info[next_to_clean]\n"
4063 " time_stamp <%lx>\n"
4064 " next_to_watch <%x>\n"
4065 " jiffies <%lx>\n"
4066 " next_to_watch.status <%x>\n",
4067 (unsigned long)((tx_ring - adapter->tx_ring) /
4068 sizeof(struct e1000_tx_ring)),
4069 readl(adapter->hw.hw_addr + tx_ring->tdh),
4070 readl(adapter->hw.hw_addr + tx_ring->tdt),
4071 tx_ring->next_to_use,
4072 tx_ring->next_to_clean,
4073 tx_ring->buffer_info[eop].time_stamp,
4074 eop,
4075 jiffies,
4076 eop_desc->upper.fields.status);
4077 netif_stop_queue(netdev);
4078 }
4079 }
4080 adapter->total_tx_bytes += total_tx_bytes;
4081 adapter->total_tx_packets += total_tx_packets;
4082 return cleaned;
4083 }
4084
4085 /**
4086 * e1000_rx_checksum - Receive Checksum Offload for 82543
4087 * @adapter: board private structure
4088 * @status_err: receive descriptor status and error fields
4089 * @csum: receive descriptor csum field
4090 * @sk_buff: socket buffer with received data
4091 **/
4092
4093 static void
4094 e1000_rx_checksum(struct e1000_adapter *adapter,
4095 uint32_t status_err, uint32_t csum,
4096 struct sk_buff *skb)
4097 {
4098 uint16_t status = (uint16_t)status_err;
4099 uint8_t errors = (uint8_t)(status_err >> 24);
4100 skb->ip_summed = CHECKSUM_NONE;
4101
4102 /* 82543 or newer only */
4103 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4104 /* Ignore Checksum bit is set */
4105 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4106 /* TCP/UDP checksum error bit is set */
4107 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4108 /* let the stack verify checksum errors */
4109 adapter->hw_csum_err++;
4110 return;
4111 }
4112 /* TCP/UDP Checksum has not been calculated */
4113 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4114 if (!(status & E1000_RXD_STAT_TCPCS))
4115 return;
4116 } else {
4117 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4118 return;
4119 }
4120 /* It must be a TCP or UDP packet with a valid checksum */
4121 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4122 /* TCP checksum is good */
4123 skb->ip_summed = CHECKSUM_UNNECESSARY;
4124 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4125 /* IP fragment with UDP payload */
4126 /* Hardware complements the payload checksum, so we undo it
4127 * and then put the value in host order for further stack use.
4128 */
4129 csum = ntohl(csum ^ 0xFFFF);
4130 skb->csum = csum;
4131 skb->ip_summed = CHECKSUM_COMPLETE;
4132 }
4133 adapter->hw_csum_good++;
4134 }
4135
4136 /**
4137 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4138 * @adapter: board private structure
4139 **/
4140
4141 static boolean_t
4142 #ifdef CONFIG_E1000_NAPI
4143 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4144 struct e1000_rx_ring *rx_ring,
4145 int *work_done, int work_to_do)
4146 #else
4147 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4148 struct e1000_rx_ring *rx_ring)
4149 #endif
4150 {
4151 struct net_device *netdev = adapter->netdev;
4152 struct pci_dev *pdev = adapter->pdev;
4153 struct e1000_rx_desc *rx_desc, *next_rxd;
4154 struct e1000_buffer *buffer_info, *next_buffer;
4155 unsigned long flags;
4156 uint32_t length;
4157 uint8_t last_byte;
4158 unsigned int i;
4159 int cleaned_count = 0;
4160 boolean_t cleaned = FALSE;
4161 unsigned int total_rx_bytes=0, total_rx_packets=0;
4162
4163 i = rx_ring->next_to_clean;
4164 rx_desc = E1000_RX_DESC(*rx_ring, i);
4165 buffer_info = &rx_ring->buffer_info[i];
4166
4167 while (rx_desc->status & E1000_RXD_STAT_DD) {
4168 struct sk_buff *skb;
4169 u8 status;
4170
4171 #ifdef CONFIG_E1000_NAPI
4172 if (*work_done >= work_to_do)
4173 break;
4174 (*work_done)++;
4175 #endif
4176 status = rx_desc->status;
4177 skb = buffer_info->skb;
4178 buffer_info->skb = NULL;
4179
4180 prefetch(skb->data - NET_IP_ALIGN);
4181
4182 if (++i == rx_ring->count) i = 0;
4183 next_rxd = E1000_RX_DESC(*rx_ring, i);
4184 prefetch(next_rxd);
4185
4186 next_buffer = &rx_ring->buffer_info[i];
4187
4188 cleaned = TRUE;
4189 cleaned_count++;
4190 pci_unmap_single(pdev,
4191 buffer_info->dma,
4192 buffer_info->length,
4193 PCI_DMA_FROMDEVICE);
4194
4195 length = le16_to_cpu(rx_desc->length);
4196
4197 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4198 /* All receives must fit into a single buffer */
4199 E1000_DBG("%s: Receive packet consumed multiple"
4200 " buffers\n", netdev->name);
4201 /* recycle */
4202 buffer_info->skb = skb;
4203 goto next_desc;
4204 }
4205
4206 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4207 last_byte = *(skb->data + length - 1);
4208 if (TBI_ACCEPT(&adapter->hw, status,
4209 rx_desc->errors, length, last_byte)) {
4210 spin_lock_irqsave(&adapter->stats_lock, flags);
4211 e1000_tbi_adjust_stats(&adapter->hw,
4212 &adapter->stats,
4213 length, skb->data);
4214 spin_unlock_irqrestore(&adapter->stats_lock,
4215 flags);
4216 length--;
4217 } else {
4218 /* recycle */
4219 buffer_info->skb = skb;
4220 goto next_desc;
4221 }
4222 }
4223
4224 /* adjust length to remove Ethernet CRC, this must be
4225 * done after the TBI_ACCEPT workaround above */
4226 length -= 4;
4227
4228 /* probably a little skewed due to removing CRC */
4229 total_rx_bytes += length;
4230 total_rx_packets++;
4231
4232 /* code added for copybreak, this should improve
4233 * performance for small packets with large amounts
4234 * of reassembly being done in the stack */
4235 if (length < copybreak) {
4236 struct sk_buff *new_skb =
4237 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4238 if (new_skb) {
4239 skb_reserve(new_skb, NET_IP_ALIGN);
4240 skb_copy_to_linear_data_offset(new_skb,
4241 -NET_IP_ALIGN,
4242 (skb->data -
4243 NET_IP_ALIGN),
4244 (length +
4245 NET_IP_ALIGN));
4246 /* save the skb in buffer_info as good */
4247 buffer_info->skb = skb;
4248 skb = new_skb;
4249 }
4250 /* else just continue with the old one */
4251 }
4252 /* end copybreak code */
4253 skb_put(skb, length);
4254
4255 /* Receive Checksum Offload */
4256 e1000_rx_checksum(adapter,
4257 (uint32_t)(status) |
4258 ((uint32_t)(rx_desc->errors) << 24),
4259 le16_to_cpu(rx_desc->csum), skb);
4260
4261 skb->protocol = eth_type_trans(skb, netdev);
4262 #ifdef CONFIG_E1000_NAPI
4263 if (unlikely(adapter->vlgrp &&
4264 (status & E1000_RXD_STAT_VP))) {
4265 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4266 le16_to_cpu(rx_desc->special) &
4267 E1000_RXD_SPC_VLAN_MASK);
4268 } else {
4269 netif_receive_skb(skb);
4270 }
4271 #else /* CONFIG_E1000_NAPI */
4272 if (unlikely(adapter->vlgrp &&
4273 (status & E1000_RXD_STAT_VP))) {
4274 vlan_hwaccel_rx(skb, adapter->vlgrp,
4275 le16_to_cpu(rx_desc->special) &
4276 E1000_RXD_SPC_VLAN_MASK);
4277 } else {
4278 netif_rx(skb);
4279 }
4280 #endif /* CONFIG_E1000_NAPI */
4281 netdev->last_rx = jiffies;
4282
4283 next_desc:
4284 rx_desc->status = 0;
4285
4286 /* return some buffers to hardware, one at a time is too slow */
4287 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4288 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4289 cleaned_count = 0;
4290 }
4291
4292 /* use prefetched values */
4293 rx_desc = next_rxd;
4294 buffer_info = next_buffer;
4295 }
4296 rx_ring->next_to_clean = i;
4297
4298 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4299 if (cleaned_count)
4300 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4301
4302 adapter->total_rx_packets += total_rx_packets;
4303 adapter->total_rx_bytes += total_rx_bytes;
4304 return cleaned;
4305 }
4306
4307 /**
4308 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4309 * @adapter: board private structure
4310 **/
4311
4312 static boolean_t
4313 #ifdef CONFIG_E1000_NAPI
4314 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4315 struct e1000_rx_ring *rx_ring,
4316 int *work_done, int work_to_do)
4317 #else
4318 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4319 struct e1000_rx_ring *rx_ring)
4320 #endif
4321 {
4322 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4323 struct net_device *netdev = adapter->netdev;
4324 struct pci_dev *pdev = adapter->pdev;
4325 struct e1000_buffer *buffer_info, *next_buffer;
4326 struct e1000_ps_page *ps_page;
4327 struct e1000_ps_page_dma *ps_page_dma;
4328 struct sk_buff *skb;
4329 unsigned int i, j;
4330 uint32_t length, staterr;
4331 int cleaned_count = 0;
4332 boolean_t cleaned = FALSE;
4333 unsigned int total_rx_bytes=0, total_rx_packets=0;
4334
4335 i = rx_ring->next_to_clean;
4336 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4337 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4338 buffer_info = &rx_ring->buffer_info[i];
4339
4340 while (staterr & E1000_RXD_STAT_DD) {
4341 ps_page = &rx_ring->ps_page[i];
4342 ps_page_dma = &rx_ring->ps_page_dma[i];
4343 #ifdef CONFIG_E1000_NAPI
4344 if (unlikely(*work_done >= work_to_do))
4345 break;
4346 (*work_done)++;
4347 #endif
4348 skb = buffer_info->skb;
4349
4350 /* in the packet split case this is header only */
4351 prefetch(skb->data - NET_IP_ALIGN);
4352
4353 if (++i == rx_ring->count) i = 0;
4354 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4355 prefetch(next_rxd);
4356
4357 next_buffer = &rx_ring->buffer_info[i];
4358
4359 cleaned = TRUE;
4360 cleaned_count++;
4361 pci_unmap_single(pdev, buffer_info->dma,
4362 buffer_info->length,
4363 PCI_DMA_FROMDEVICE);
4364
4365 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4366 E1000_DBG("%s: Packet Split buffers didn't pick up"
4367 " the full packet\n", netdev->name);
4368 dev_kfree_skb_irq(skb);
4369 goto next_desc;
4370 }
4371
4372 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4373 dev_kfree_skb_irq(skb);
4374 goto next_desc;
4375 }
4376
4377 length = le16_to_cpu(rx_desc->wb.middle.length0);
4378
4379 if (unlikely(!length)) {
4380 E1000_DBG("%s: Last part of the packet spanning"
4381 " multiple descriptors\n", netdev->name);
4382 dev_kfree_skb_irq(skb);
4383 goto next_desc;
4384 }
4385
4386 /* Good Receive */
4387 skb_put(skb, length);
4388
4389 {
4390 /* this looks ugly, but it seems compiler issues make it
4391 more efficient than reusing j */
4392 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4393
4394 /* page alloc/put takes too long and effects small packet
4395 * throughput, so unsplit small packets and save the alloc/put*/
4396 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4397 u8 *vaddr;
4398 /* there is no documentation about how to call
4399 * kmap_atomic, so we can't hold the mapping
4400 * very long */
4401 pci_dma_sync_single_for_cpu(pdev,
4402 ps_page_dma->ps_page_dma[0],
4403 PAGE_SIZE,
4404 PCI_DMA_FROMDEVICE);
4405 vaddr = kmap_atomic(ps_page->ps_page[0],
4406 KM_SKB_DATA_SOFTIRQ);
4407 memcpy(skb_tail_pointer(skb), vaddr, l1);
4408 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4409 pci_dma_sync_single_for_device(pdev,
4410 ps_page_dma->ps_page_dma[0],
4411 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4412 /* remove the CRC */
4413 l1 -= 4;
4414 skb_put(skb, l1);
4415 goto copydone;
4416 } /* if */
4417 }
4418
4419 for (j = 0; j < adapter->rx_ps_pages; j++) {
4420 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4421 break;
4422 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4423 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4424 ps_page_dma->ps_page_dma[j] = 0;
4425 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4426 length);
4427 ps_page->ps_page[j] = NULL;
4428 skb->len += length;
4429 skb->data_len += length;
4430 skb->truesize += length;
4431 }
4432
4433 /* strip the ethernet crc, problem is we're using pages now so
4434 * this whole operation can get a little cpu intensive */
4435 pskb_trim(skb, skb->len - 4);
4436
4437 copydone:
4438 total_rx_bytes += skb->len;
4439 total_rx_packets++;
4440
4441 e1000_rx_checksum(adapter, staterr,
4442 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4443 skb->protocol = eth_type_trans(skb, netdev);
4444
4445 if (likely(rx_desc->wb.upper.header_status &
4446 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4447 adapter->rx_hdr_split++;
4448 #ifdef CONFIG_E1000_NAPI
4449 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4450 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4451 le16_to_cpu(rx_desc->wb.middle.vlan) &
4452 E1000_RXD_SPC_VLAN_MASK);
4453 } else {
4454 netif_receive_skb(skb);
4455 }
4456 #else /* CONFIG_E1000_NAPI */
4457 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4458 vlan_hwaccel_rx(skb, adapter->vlgrp,
4459 le16_to_cpu(rx_desc->wb.middle.vlan) &
4460 E1000_RXD_SPC_VLAN_MASK);
4461 } else {
4462 netif_rx(skb);
4463 }
4464 #endif /* CONFIG_E1000_NAPI */
4465 netdev->last_rx = jiffies;
4466
4467 next_desc:
4468 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4469 buffer_info->skb = NULL;
4470
4471 /* return some buffers to hardware, one at a time is too slow */
4472 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4473 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4474 cleaned_count = 0;
4475 }
4476
4477 /* use prefetched values */
4478 rx_desc = next_rxd;
4479 buffer_info = next_buffer;
4480
4481 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4482 }
4483 rx_ring->next_to_clean = i;
4484
4485 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4486 if (cleaned_count)
4487 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4488
4489 adapter->total_rx_packets += total_rx_packets;
4490 adapter->total_rx_bytes += total_rx_bytes;
4491 return cleaned;
4492 }
4493
4494 /**
4495 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4496 * @adapter: address of board private structure
4497 **/
4498
4499 static void
4500 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4501 struct e1000_rx_ring *rx_ring,
4502 int cleaned_count)
4503 {
4504 struct net_device *netdev = adapter->netdev;
4505 struct pci_dev *pdev = adapter->pdev;
4506 struct e1000_rx_desc *rx_desc;
4507 struct e1000_buffer *buffer_info;
4508 struct sk_buff *skb;
4509 unsigned int i;
4510 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4511
4512 i = rx_ring->next_to_use;
4513 buffer_info = &rx_ring->buffer_info[i];
4514
4515 while (cleaned_count--) {
4516 skb = buffer_info->skb;
4517 if (skb) {
4518 skb_trim(skb, 0);
4519 goto map_skb;
4520 }
4521
4522 skb = netdev_alloc_skb(netdev, bufsz);
4523 if (unlikely(!skb)) {
4524 /* Better luck next round */
4525 adapter->alloc_rx_buff_failed++;
4526 break;
4527 }
4528
4529 /* Fix for errata 23, can't cross 64kB boundary */
4530 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4531 struct sk_buff *oldskb = skb;
4532 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4533 "at %p\n", bufsz, skb->data);
4534 /* Try again, without freeing the previous */
4535 skb = netdev_alloc_skb(netdev, bufsz);
4536 /* Failed allocation, critical failure */
4537 if (!skb) {
4538 dev_kfree_skb(oldskb);
4539 break;
4540 }
4541
4542 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4543 /* give up */
4544 dev_kfree_skb(skb);
4545 dev_kfree_skb(oldskb);
4546 break; /* while !buffer_info->skb */
4547 }
4548
4549 /* Use new allocation */
4550 dev_kfree_skb(oldskb);
4551 }
4552 /* Make buffer alignment 2 beyond a 16 byte boundary
4553 * this will result in a 16 byte aligned IP header after
4554 * the 14 byte MAC header is removed
4555 */
4556 skb_reserve(skb, NET_IP_ALIGN);
4557
4558 buffer_info->skb = skb;
4559 buffer_info->length = adapter->rx_buffer_len;
4560 map_skb:
4561 buffer_info->dma = pci_map_single(pdev,
4562 skb->data,
4563 adapter->rx_buffer_len,
4564 PCI_DMA_FROMDEVICE);
4565
4566 /* Fix for errata 23, can't cross 64kB boundary */
4567 if (!e1000_check_64k_bound(adapter,
4568 (void *)(unsigned long)buffer_info->dma,
4569 adapter->rx_buffer_len)) {
4570 DPRINTK(RX_ERR, ERR,
4571 "dma align check failed: %u bytes at %p\n",
4572 adapter->rx_buffer_len,
4573 (void *)(unsigned long)buffer_info->dma);
4574 dev_kfree_skb(skb);
4575 buffer_info->skb = NULL;
4576
4577 pci_unmap_single(pdev, buffer_info->dma,
4578 adapter->rx_buffer_len,
4579 PCI_DMA_FROMDEVICE);
4580
4581 break; /* while !buffer_info->skb */
4582 }
4583 rx_desc = E1000_RX_DESC(*rx_ring, i);
4584 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4585
4586 if (unlikely(++i == rx_ring->count))
4587 i = 0;
4588 buffer_info = &rx_ring->buffer_info[i];
4589 }
4590
4591 if (likely(rx_ring->next_to_use != i)) {
4592 rx_ring->next_to_use = i;
4593 if (unlikely(i-- == 0))
4594 i = (rx_ring->count - 1);
4595
4596 /* Force memory writes to complete before letting h/w
4597 * know there are new descriptors to fetch. (Only
4598 * applicable for weak-ordered memory model archs,
4599 * such as IA-64). */
4600 wmb();
4601 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4602 }
4603 }
4604
4605 /**
4606 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4607 * @adapter: address of board private structure
4608 **/
4609
4610 static void
4611 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4612 struct e1000_rx_ring *rx_ring,
4613 int cleaned_count)
4614 {
4615 struct net_device *netdev = adapter->netdev;
4616 struct pci_dev *pdev = adapter->pdev;
4617 union e1000_rx_desc_packet_split *rx_desc;
4618 struct e1000_buffer *buffer_info;
4619 struct e1000_ps_page *ps_page;
4620 struct e1000_ps_page_dma *ps_page_dma;
4621 struct sk_buff *skb;
4622 unsigned int i, j;
4623
4624 i = rx_ring->next_to_use;
4625 buffer_info = &rx_ring->buffer_info[i];
4626 ps_page = &rx_ring->ps_page[i];
4627 ps_page_dma = &rx_ring->ps_page_dma[i];
4628
4629 while (cleaned_count--) {
4630 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4631
4632 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4633 if (j < adapter->rx_ps_pages) {
4634 if (likely(!ps_page->ps_page[j])) {
4635 ps_page->ps_page[j] =
4636 alloc_page(GFP_ATOMIC);
4637 if (unlikely(!ps_page->ps_page[j])) {
4638 adapter->alloc_rx_buff_failed++;
4639 goto no_buffers;
4640 }
4641 ps_page_dma->ps_page_dma[j] =
4642 pci_map_page(pdev,
4643 ps_page->ps_page[j],
4644 0, PAGE_SIZE,
4645 PCI_DMA_FROMDEVICE);
4646 }
4647 /* Refresh the desc even if buffer_addrs didn't
4648 * change because each write-back erases
4649 * this info.
4650 */
4651 rx_desc->read.buffer_addr[j+1] =
4652 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4653 } else
4654 rx_desc->read.buffer_addr[j+1] = ~0;
4655 }
4656
4657 skb = netdev_alloc_skb(netdev,
4658 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4659
4660 if (unlikely(!skb)) {
4661 adapter->alloc_rx_buff_failed++;
4662 break;
4663 }
4664
4665 /* Make buffer alignment 2 beyond a 16 byte boundary
4666 * this will result in a 16 byte aligned IP header after
4667 * the 14 byte MAC header is removed
4668 */
4669 skb_reserve(skb, NET_IP_ALIGN);
4670
4671 buffer_info->skb = skb;
4672 buffer_info->length = adapter->rx_ps_bsize0;
4673 buffer_info->dma = pci_map_single(pdev, skb->data,
4674 adapter->rx_ps_bsize0,
4675 PCI_DMA_FROMDEVICE);
4676
4677 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4678
4679 if (unlikely(++i == rx_ring->count)) i = 0;
4680 buffer_info = &rx_ring->buffer_info[i];
4681 ps_page = &rx_ring->ps_page[i];
4682 ps_page_dma = &rx_ring->ps_page_dma[i];
4683 }
4684
4685 no_buffers:
4686 if (likely(rx_ring->next_to_use != i)) {
4687 rx_ring->next_to_use = i;
4688 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4689
4690 /* Force memory writes to complete before letting h/w
4691 * know there are new descriptors to fetch. (Only
4692 * applicable for weak-ordered memory model archs,
4693 * such as IA-64). */
4694 wmb();
4695 /* Hardware increments by 16 bytes, but packet split
4696 * descriptors are 32 bytes...so we increment tail
4697 * twice as much.
4698 */
4699 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4700 }
4701 }
4702
4703 /**
4704 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4705 * @adapter:
4706 **/
4707
4708 static void
4709 e1000_smartspeed(struct e1000_adapter *adapter)
4710 {
4711 uint16_t phy_status;
4712 uint16_t phy_ctrl;
4713
4714 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4715 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4716 return;
4717
4718 if (adapter->smartspeed == 0) {
4719 /* If Master/Slave config fault is asserted twice,
4720 * we assume back-to-back */
4721 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4722 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4723 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4724 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4725 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4726 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4727 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4728 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4729 phy_ctrl);
4730 adapter->smartspeed++;
4731 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4732 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4733 &phy_ctrl)) {
4734 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4735 MII_CR_RESTART_AUTO_NEG);
4736 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4737 phy_ctrl);
4738 }
4739 }
4740 return;
4741 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4742 /* If still no link, perhaps using 2/3 pair cable */
4743 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4744 phy_ctrl |= CR_1000T_MS_ENABLE;
4745 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4746 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4747 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4748 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4749 MII_CR_RESTART_AUTO_NEG);
4750 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4751 }
4752 }
4753 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4754 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4755 adapter->smartspeed = 0;
4756 }
4757
4758 /**
4759 * e1000_ioctl -
4760 * @netdev:
4761 * @ifreq:
4762 * @cmd:
4763 **/
4764
4765 static int
4766 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4767 {
4768 switch (cmd) {
4769 case SIOCGMIIPHY:
4770 case SIOCGMIIREG:
4771 case SIOCSMIIREG:
4772 return e1000_mii_ioctl(netdev, ifr, cmd);
4773 default:
4774 return -EOPNOTSUPP;
4775 }
4776 }
4777
4778 /**
4779 * e1000_mii_ioctl -
4780 * @netdev:
4781 * @ifreq:
4782 * @cmd:
4783 **/
4784
4785 static int
4786 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4787 {
4788 struct e1000_adapter *adapter = netdev_priv(netdev);
4789 struct mii_ioctl_data *data = if_mii(ifr);
4790 int retval;
4791 uint16_t mii_reg;
4792 uint16_t spddplx;
4793 unsigned long flags;
4794
4795 if (adapter->hw.media_type != e1000_media_type_copper)
4796 return -EOPNOTSUPP;
4797
4798 switch (cmd) {
4799 case SIOCGMIIPHY:
4800 data->phy_id = adapter->hw.phy_addr;
4801 break;
4802 case SIOCGMIIREG:
4803 if (!capable(CAP_NET_ADMIN))
4804 return -EPERM;
4805 spin_lock_irqsave(&adapter->stats_lock, flags);
4806 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4807 &data->val_out)) {
4808 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4809 return -EIO;
4810 }
4811 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4812 break;
4813 case SIOCSMIIREG:
4814 if (!capable(CAP_NET_ADMIN))
4815 return -EPERM;
4816 if (data->reg_num & ~(0x1F))
4817 return -EFAULT;
4818 mii_reg = data->val_in;
4819 spin_lock_irqsave(&adapter->stats_lock, flags);
4820 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4821 mii_reg)) {
4822 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4823 return -EIO;
4824 }
4825 if (adapter->hw.media_type == e1000_media_type_copper) {
4826 switch (data->reg_num) {
4827 case PHY_CTRL:
4828 if (mii_reg & MII_CR_POWER_DOWN)
4829 break;
4830 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4831 adapter->hw.autoneg = 1;
4832 adapter->hw.autoneg_advertised = 0x2F;
4833 } else {
4834 if (mii_reg & 0x40)
4835 spddplx = SPEED_1000;
4836 else if (mii_reg & 0x2000)
4837 spddplx = SPEED_100;
4838 else
4839 spddplx = SPEED_10;
4840 spddplx += (mii_reg & 0x100)
4841 ? DUPLEX_FULL :
4842 DUPLEX_HALF;
4843 retval = e1000_set_spd_dplx(adapter,
4844 spddplx);
4845 if (retval) {
4846 spin_unlock_irqrestore(
4847 &adapter->stats_lock,
4848 flags);
4849 return retval;
4850 }
4851 }
4852 if (netif_running(adapter->netdev))
4853 e1000_reinit_locked(adapter);
4854 else
4855 e1000_reset(adapter);
4856 break;
4857 case M88E1000_PHY_SPEC_CTRL:
4858 case M88E1000_EXT_PHY_SPEC_CTRL:
4859 if (e1000_phy_reset(&adapter->hw)) {
4860 spin_unlock_irqrestore(
4861 &adapter->stats_lock, flags);
4862 return -EIO;
4863 }
4864 break;
4865 }
4866 } else {
4867 switch (data->reg_num) {
4868 case PHY_CTRL:
4869 if (mii_reg & MII_CR_POWER_DOWN)
4870 break;
4871 if (netif_running(adapter->netdev))
4872 e1000_reinit_locked(adapter);
4873 else
4874 e1000_reset(adapter);
4875 break;
4876 }
4877 }
4878 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4879 break;
4880 default:
4881 return -EOPNOTSUPP;
4882 }
4883 return E1000_SUCCESS;
4884 }
4885
4886 void
4887 e1000_pci_set_mwi(struct e1000_hw *hw)
4888 {
4889 struct e1000_adapter *adapter = hw->back;
4890 int ret_val = pci_set_mwi(adapter->pdev);
4891
4892 if (ret_val)
4893 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4894 }
4895
4896 void
4897 e1000_pci_clear_mwi(struct e1000_hw *hw)
4898 {
4899 struct e1000_adapter *adapter = hw->back;
4900
4901 pci_clear_mwi(adapter->pdev);
4902 }
4903
4904 void
4905 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4906 {
4907 struct e1000_adapter *adapter = hw->back;
4908
4909 pci_read_config_word(adapter->pdev, reg, value);
4910 }
4911
4912 void
4913 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4914 {
4915 struct e1000_adapter *adapter = hw->back;
4916
4917 pci_write_config_word(adapter->pdev, reg, *value);
4918 }
4919
4920 int32_t
4921 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4922 {
4923 struct e1000_adapter *adapter = hw->back;
4924 uint16_t cap_offset;
4925
4926 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4927 if (!cap_offset)
4928 return -E1000_ERR_CONFIG;
4929
4930 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4931
4932 return E1000_SUCCESS;
4933 }
4934
4935 void
4936 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4937 {
4938 outl(value, port);
4939 }
4940
4941 static void
4942 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4943 {
4944 struct e1000_adapter *adapter = netdev_priv(netdev);
4945 uint32_t ctrl, rctl;
4946
4947 e1000_irq_disable(adapter);
4948 adapter->vlgrp = grp;
4949
4950 if (grp) {
4951 /* enable VLAN tag insert/strip */
4952 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4953 ctrl |= E1000_CTRL_VME;
4954 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4955
4956 if (adapter->hw.mac_type != e1000_ich8lan) {
4957 /* enable VLAN receive filtering */
4958 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4959 rctl |= E1000_RCTL_VFE;
4960 rctl &= ~E1000_RCTL_CFIEN;
4961 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4962 e1000_update_mng_vlan(adapter);
4963 }
4964 } else {
4965 /* disable VLAN tag insert/strip */
4966 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4967 ctrl &= ~E1000_CTRL_VME;
4968 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4969
4970 if (adapter->hw.mac_type != e1000_ich8lan) {
4971 /* disable VLAN filtering */
4972 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4973 rctl &= ~E1000_RCTL_VFE;
4974 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4975 if (adapter->mng_vlan_id !=
4976 (uint16_t)E1000_MNG_VLAN_NONE) {
4977 e1000_vlan_rx_kill_vid(netdev,
4978 adapter->mng_vlan_id);
4979 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4980 }
4981 }
4982 }
4983
4984 e1000_irq_enable(adapter);
4985 }
4986
4987 static void
4988 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4989 {
4990 struct e1000_adapter *adapter = netdev_priv(netdev);
4991 uint32_t vfta, index;
4992
4993 if ((adapter->hw.mng_cookie.status &
4994 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4995 (vid == adapter->mng_vlan_id))
4996 return;
4997 /* add VID to filter table */
4998 index = (vid >> 5) & 0x7F;
4999 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5000 vfta |= (1 << (vid & 0x1F));
5001 e1000_write_vfta(&adapter->hw, index, vfta);
5002 }
5003
5004 static void
5005 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5006 {
5007 struct e1000_adapter *adapter = netdev_priv(netdev);
5008 uint32_t vfta, index;
5009
5010 e1000_irq_disable(adapter);
5011 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5012 e1000_irq_enable(adapter);
5013
5014 if ((adapter->hw.mng_cookie.status &
5015 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5016 (vid == adapter->mng_vlan_id)) {
5017 /* release control to f/w */
5018 e1000_release_hw_control(adapter);
5019 return;
5020 }
5021
5022 /* remove VID from filter table */
5023 index = (vid >> 5) & 0x7F;
5024 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5025 vfta &= ~(1 << (vid & 0x1F));
5026 e1000_write_vfta(&adapter->hw, index, vfta);
5027 }
5028
5029 static void
5030 e1000_restore_vlan(struct e1000_adapter *adapter)
5031 {
5032 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5033
5034 if (adapter->vlgrp) {
5035 uint16_t vid;
5036 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5037 if (!vlan_group_get_device(adapter->vlgrp, vid))
5038 continue;
5039 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5040 }
5041 }
5042 }
5043
5044 int
5045 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5046 {
5047 adapter->hw.autoneg = 0;
5048
5049 /* Fiber NICs only allow 1000 gbps Full duplex */
5050 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5051 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5052 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5053 return -EINVAL;
5054 }
5055
5056 switch (spddplx) {
5057 case SPEED_10 + DUPLEX_HALF:
5058 adapter->hw.forced_speed_duplex = e1000_10_half;
5059 break;
5060 case SPEED_10 + DUPLEX_FULL:
5061 adapter->hw.forced_speed_duplex = e1000_10_full;
5062 break;
5063 case SPEED_100 + DUPLEX_HALF:
5064 adapter->hw.forced_speed_duplex = e1000_100_half;
5065 break;
5066 case SPEED_100 + DUPLEX_FULL:
5067 adapter->hw.forced_speed_duplex = e1000_100_full;
5068 break;
5069 case SPEED_1000 + DUPLEX_FULL:
5070 adapter->hw.autoneg = 1;
5071 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5072 break;
5073 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5074 default:
5075 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5076 return -EINVAL;
5077 }
5078 return 0;
5079 }
5080
5081 static int
5082 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5083 {
5084 struct net_device *netdev = pci_get_drvdata(pdev);
5085 struct e1000_adapter *adapter = netdev_priv(netdev);
5086 uint32_t ctrl, ctrl_ext, rctl, status;
5087 uint32_t wufc = adapter->wol;
5088 #ifdef CONFIG_PM
5089 int retval = 0;
5090 #endif
5091
5092 netif_device_detach(netdev);
5093
5094 if (netif_running(netdev)) {
5095 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5096 e1000_down(adapter);
5097 }
5098
5099 #ifdef CONFIG_PM
5100 retval = pci_save_state(pdev);
5101 if (retval)
5102 return retval;
5103 #endif
5104
5105 status = E1000_READ_REG(&adapter->hw, STATUS);
5106 if (status & E1000_STATUS_LU)
5107 wufc &= ~E1000_WUFC_LNKC;
5108
5109 if (wufc) {
5110 e1000_setup_rctl(adapter);
5111 e1000_set_multi(netdev);
5112
5113 /* turn on all-multi mode if wake on multicast is enabled */
5114 if (wufc & E1000_WUFC_MC) {
5115 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5116 rctl |= E1000_RCTL_MPE;
5117 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5118 }
5119
5120 if (adapter->hw.mac_type >= e1000_82540) {
5121 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5122 /* advertise wake from D3Cold */
5123 #define E1000_CTRL_ADVD3WUC 0x00100000
5124 /* phy power management enable */
5125 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5126 ctrl |= E1000_CTRL_ADVD3WUC |
5127 E1000_CTRL_EN_PHY_PWR_MGMT;
5128 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5129 }
5130
5131 if (adapter->hw.media_type == e1000_media_type_fiber ||
5132 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5133 /* keep the laser running in D3 */
5134 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5135 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5136 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5137 }
5138
5139 /* Allow time for pending master requests to run */
5140 e1000_disable_pciex_master(&adapter->hw);
5141
5142 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5143 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5144 pci_enable_wake(pdev, PCI_D3hot, 1);
5145 pci_enable_wake(pdev, PCI_D3cold, 1);
5146 } else {
5147 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5148 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5149 pci_enable_wake(pdev, PCI_D3hot, 0);
5150 pci_enable_wake(pdev, PCI_D3cold, 0);
5151 }
5152
5153 e1000_release_manageability(adapter);
5154
5155 /* make sure adapter isn't asleep if manageability is enabled */
5156 if (adapter->en_mng_pt) {
5157 pci_enable_wake(pdev, PCI_D3hot, 1);
5158 pci_enable_wake(pdev, PCI_D3cold, 1);
5159 }
5160
5161 if (adapter->hw.phy_type == e1000_phy_igp_3)
5162 e1000_phy_powerdown_workaround(&adapter->hw);
5163
5164 if (netif_running(netdev))
5165 e1000_free_irq(adapter);
5166
5167 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5168 * would have already happened in close and is redundant. */
5169 e1000_release_hw_control(adapter);
5170
5171 pci_disable_device(pdev);
5172
5173 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5174
5175 return 0;
5176 }
5177
5178 #ifdef CONFIG_PM
5179 static int
5180 e1000_resume(struct pci_dev *pdev)
5181 {
5182 struct net_device *netdev = pci_get_drvdata(pdev);
5183 struct e1000_adapter *adapter = netdev_priv(netdev);
5184 uint32_t err;
5185
5186 pci_set_power_state(pdev, PCI_D0);
5187 pci_restore_state(pdev);
5188 if ((err = pci_enable_device(pdev))) {
5189 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5190 return err;
5191 }
5192 pci_set_master(pdev);
5193
5194 pci_enable_wake(pdev, PCI_D3hot, 0);
5195 pci_enable_wake(pdev, PCI_D3cold, 0);
5196
5197 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5198 return err;
5199
5200 e1000_power_up_phy(adapter);
5201 e1000_reset(adapter);
5202 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5203
5204 e1000_init_manageability(adapter);
5205
5206 if (netif_running(netdev))
5207 e1000_up(adapter);
5208
5209 netif_device_attach(netdev);
5210
5211 /* If the controller is 82573 and f/w is AMT, do not set
5212 * DRV_LOAD until the interface is up. For all other cases,
5213 * let the f/w know that the h/w is now under the control
5214 * of the driver. */
5215 if (adapter->hw.mac_type != e1000_82573 ||
5216 !e1000_check_mng_mode(&adapter->hw))
5217 e1000_get_hw_control(adapter);
5218
5219 return 0;
5220 }
5221 #endif
5222
5223 static void e1000_shutdown(struct pci_dev *pdev)
5224 {
5225 e1000_suspend(pdev, PMSG_SUSPEND);
5226 }
5227
5228 #ifdef CONFIG_NET_POLL_CONTROLLER
5229 /*
5230 * Polling 'interrupt' - used by things like netconsole to send skbs
5231 * without having to re-enable interrupts. It's not called while
5232 * the interrupt routine is executing.
5233 */
5234 static void
5235 e1000_netpoll(struct net_device *netdev)
5236 {
5237 struct e1000_adapter *adapter = netdev_priv(netdev);
5238
5239 disable_irq(adapter->pdev->irq);
5240 e1000_intr(adapter->pdev->irq, netdev);
5241 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5242 #ifndef CONFIG_E1000_NAPI
5243 adapter->clean_rx(adapter, adapter->rx_ring);
5244 #endif
5245 enable_irq(adapter->pdev->irq);
5246 }
5247 #endif
5248
5249 /**
5250 * e1000_io_error_detected - called when PCI error is detected
5251 * @pdev: Pointer to PCI device
5252 * @state: The current pci conneection state
5253 *
5254 * This function is called after a PCI bus error affecting
5255 * this device has been detected.
5256 */
5257 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5258 {
5259 struct net_device *netdev = pci_get_drvdata(pdev);
5260 struct e1000_adapter *adapter = netdev->priv;
5261
5262 netif_device_detach(netdev);
5263
5264 if (netif_running(netdev))
5265 e1000_down(adapter);
5266 pci_disable_device(pdev);
5267
5268 /* Request a slot slot reset. */
5269 return PCI_ERS_RESULT_NEED_RESET;
5270 }
5271
5272 /**
5273 * e1000_io_slot_reset - called after the pci bus has been reset.
5274 * @pdev: Pointer to PCI device
5275 *
5276 * Restart the card from scratch, as if from a cold-boot. Implementation
5277 * resembles the first-half of the e1000_resume routine.
5278 */
5279 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5280 {
5281 struct net_device *netdev = pci_get_drvdata(pdev);
5282 struct e1000_adapter *adapter = netdev->priv;
5283
5284 if (pci_enable_device(pdev)) {
5285 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5286 return PCI_ERS_RESULT_DISCONNECT;
5287 }
5288 pci_set_master(pdev);
5289
5290 pci_enable_wake(pdev, PCI_D3hot, 0);
5291 pci_enable_wake(pdev, PCI_D3cold, 0);
5292
5293 e1000_reset(adapter);
5294 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5295
5296 return PCI_ERS_RESULT_RECOVERED;
5297 }
5298
5299 /**
5300 * e1000_io_resume - called when traffic can start flowing again.
5301 * @pdev: Pointer to PCI device
5302 *
5303 * This callback is called when the error recovery driver tells us that
5304 * its OK to resume normal operation. Implementation resembles the
5305 * second-half of the e1000_resume routine.
5306 */
5307 static void e1000_io_resume(struct pci_dev *pdev)
5308 {
5309 struct net_device *netdev = pci_get_drvdata(pdev);
5310 struct e1000_adapter *adapter = netdev->priv;
5311
5312 e1000_init_manageability(adapter);
5313
5314 if (netif_running(netdev)) {
5315 if (e1000_up(adapter)) {
5316 printk("e1000: can't bring device back up after reset\n");
5317 return;
5318 }
5319 }
5320
5321 netif_device_attach(netdev);
5322
5323 /* If the controller is 82573 and f/w is AMT, do not set
5324 * DRV_LOAD until the interface is up. For all other cases,
5325 * let the f/w know that the h/w is now under the control
5326 * of the driver. */
5327 if (adapter->hw.mac_type != e1000_82573 ||
5328 !e1000_check_mng_mode(&adapter->hw))
5329 e1000_get_hw_control(adapter);
5330
5331 }
5332
5333 /* e1000_main.c */