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PCI: Change all drivers to use pci_device->revision
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 static irqreturn_t e1000_intr_msi(int irq, void *data);
162 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
163 struct e1000_tx_ring *tx_ring);
164 #ifdef CONFIG_E1000_NAPI
165 static int e1000_clean(struct net_device *poll_dev, int *budget);
166 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
167 struct e1000_rx_ring *rx_ring,
168 int *work_done, int work_to_do);
169 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
170 struct e1000_rx_ring *rx_ring,
171 int *work_done, int work_to_do);
172 #else
173 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
175 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 #endif
178 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
179 struct e1000_rx_ring *rx_ring,
180 int cleaned_count);
181 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
182 struct e1000_rx_ring *rx_ring,
183 int cleaned_count);
184 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
185 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
186 int cmd);
187 void e1000_set_ethtool_ops(struct net_device *netdev);
188 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
189 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
190 static void e1000_tx_timeout(struct net_device *dev);
191 static void e1000_reset_task(struct work_struct *work);
192 static void e1000_smartspeed(struct e1000_adapter *adapter);
193 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
194 struct sk_buff *skb);
195
196 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
197 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
198 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
199 static void e1000_restore_vlan(struct e1000_adapter *adapter);
200
201 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
202 #ifdef CONFIG_PM
203 static int e1000_resume(struct pci_dev *pdev);
204 #endif
205 static void e1000_shutdown(struct pci_dev *pdev);
206
207 #ifdef CONFIG_NET_POLL_CONTROLLER
208 /* for netdump / net console */
209 static void e1000_netpoll (struct net_device *netdev);
210 #endif
211
212 extern void e1000_check_options(struct e1000_adapter *adapter);
213
214 #define COPYBREAK_DEFAULT 256
215 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
216 module_param(copybreak, uint, 0644);
217 MODULE_PARM_DESC(copybreak,
218 "Maximum size of packet that is copied to a new buffer on receive");
219
220 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
221 pci_channel_state_t state);
222 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
223 static void e1000_io_resume(struct pci_dev *pdev);
224
225 static struct pci_error_handlers e1000_err_handler = {
226 .error_detected = e1000_io_error_detected,
227 .slot_reset = e1000_io_slot_reset,
228 .resume = e1000_io_resume,
229 };
230
231 static struct pci_driver e1000_driver = {
232 .name = e1000_driver_name,
233 .id_table = e1000_pci_tbl,
234 .probe = e1000_probe,
235 .remove = __devexit_p(e1000_remove),
236 #ifdef CONFIG_PM
237 /* Power Managment Hooks */
238 .suspend = e1000_suspend,
239 .resume = e1000_resume,
240 #endif
241 .shutdown = e1000_shutdown,
242 .err_handler = &e1000_err_handler
243 };
244
245 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
246 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
247 MODULE_LICENSE("GPL");
248 MODULE_VERSION(DRV_VERSION);
249
250 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
251 module_param(debug, int, 0);
252 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
253
254 /**
255 * e1000_init_module - Driver Registration Routine
256 *
257 * e1000_init_module is the first routine called when the driver is
258 * loaded. All it does is register with the PCI subsystem.
259 **/
260
261 static int __init
262 e1000_init_module(void)
263 {
264 int ret;
265 printk(KERN_INFO "%s - version %s\n",
266 e1000_driver_string, e1000_driver_version);
267
268 printk(KERN_INFO "%s\n", e1000_copyright);
269
270 ret = pci_register_driver(&e1000_driver);
271 if (copybreak != COPYBREAK_DEFAULT) {
272 if (copybreak == 0)
273 printk(KERN_INFO "e1000: copybreak disabled\n");
274 else
275 printk(KERN_INFO "e1000: copybreak enabled for "
276 "packets <= %u bytes\n", copybreak);
277 }
278 return ret;
279 }
280
281 module_init(e1000_init_module);
282
283 /**
284 * e1000_exit_module - Driver Exit Cleanup Routine
285 *
286 * e1000_exit_module is called just before the driver is removed
287 * from memory.
288 **/
289
290 static void __exit
291 e1000_exit_module(void)
292 {
293 pci_unregister_driver(&e1000_driver);
294 }
295
296 module_exit(e1000_exit_module);
297
298 static int e1000_request_irq(struct e1000_adapter *adapter)
299 {
300 struct net_device *netdev = adapter->netdev;
301 void (*handler) = &e1000_intr;
302 int irq_flags = IRQF_SHARED;
303 int err;
304
305 if (adapter->hw.mac_type >= e1000_82571) {
306 adapter->have_msi = !pci_enable_msi(adapter->pdev);
307 if (adapter->have_msi) {
308 handler = &e1000_intr_msi;
309 irq_flags = 0;
310 }
311 }
312
313 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
314 netdev);
315 if (err) {
316 if (adapter->have_msi)
317 pci_disable_msi(adapter->pdev);
318 DPRINTK(PROBE, ERR,
319 "Unable to allocate interrupt Error: %d\n", err);
320 }
321
322 return err;
323 }
324
325 static void e1000_free_irq(struct e1000_adapter *adapter)
326 {
327 struct net_device *netdev = adapter->netdev;
328
329 free_irq(adapter->pdev->irq, netdev);
330
331 if (adapter->have_msi)
332 pci_disable_msi(adapter->pdev);
333 }
334
335 /**
336 * e1000_irq_disable - Mask off interrupt generation on the NIC
337 * @adapter: board private structure
338 **/
339
340 static void
341 e1000_irq_disable(struct e1000_adapter *adapter)
342 {
343 atomic_inc(&adapter->irq_sem);
344 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
345 E1000_WRITE_FLUSH(&adapter->hw);
346 synchronize_irq(adapter->pdev->irq);
347 }
348
349 /**
350 * e1000_irq_enable - Enable default interrupt generation settings
351 * @adapter: board private structure
352 **/
353
354 static void
355 e1000_irq_enable(struct e1000_adapter *adapter)
356 {
357 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
358 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
359 E1000_WRITE_FLUSH(&adapter->hw);
360 }
361 }
362
363 static void
364 e1000_update_mng_vlan(struct e1000_adapter *adapter)
365 {
366 struct net_device *netdev = adapter->netdev;
367 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
368 uint16_t old_vid = adapter->mng_vlan_id;
369 if (adapter->vlgrp) {
370 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
371 if (adapter->hw.mng_cookie.status &
372 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
373 e1000_vlan_rx_add_vid(netdev, vid);
374 adapter->mng_vlan_id = vid;
375 } else
376 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
377
378 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
379 (vid != old_vid) &&
380 !vlan_group_get_device(adapter->vlgrp, old_vid))
381 e1000_vlan_rx_kill_vid(netdev, old_vid);
382 } else
383 adapter->mng_vlan_id = vid;
384 }
385 }
386
387 /**
388 * e1000_release_hw_control - release control of the h/w to f/w
389 * @adapter: address of board private structure
390 *
391 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
392 * For ASF and Pass Through versions of f/w this means that the
393 * driver is no longer loaded. For AMT version (only with 82573) i
394 * of the f/w this means that the network i/f is closed.
395 *
396 **/
397
398 static void
399 e1000_release_hw_control(struct e1000_adapter *adapter)
400 {
401 uint32_t ctrl_ext;
402 uint32_t swsm;
403
404 /* Let firmware taken over control of h/w */
405 switch (adapter->hw.mac_type) {
406 case e1000_82573:
407 swsm = E1000_READ_REG(&adapter->hw, SWSM);
408 E1000_WRITE_REG(&adapter->hw, SWSM,
409 swsm & ~E1000_SWSM_DRV_LOAD);
410 break;
411 case e1000_82571:
412 case e1000_82572:
413 case e1000_80003es2lan:
414 case e1000_ich8lan:
415 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
416 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
417 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
418 break;
419 default:
420 break;
421 }
422 }
423
424 /**
425 * e1000_get_hw_control - get control of the h/w from f/w
426 * @adapter: address of board private structure
427 *
428 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
429 * For ASF and Pass Through versions of f/w this means that
430 * the driver is loaded. For AMT version (only with 82573)
431 * of the f/w this means that the network i/f is open.
432 *
433 **/
434
435 static void
436 e1000_get_hw_control(struct e1000_adapter *adapter)
437 {
438 uint32_t ctrl_ext;
439 uint32_t swsm;
440
441 /* Let firmware know the driver has taken over */
442 switch (adapter->hw.mac_type) {
443 case e1000_82573:
444 swsm = E1000_READ_REG(&adapter->hw, SWSM);
445 E1000_WRITE_REG(&adapter->hw, SWSM,
446 swsm | E1000_SWSM_DRV_LOAD);
447 break;
448 case e1000_82571:
449 case e1000_82572:
450 case e1000_80003es2lan:
451 case e1000_ich8lan:
452 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
453 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
454 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
455 break;
456 default:
457 break;
458 }
459 }
460
461 static void
462 e1000_init_manageability(struct e1000_adapter *adapter)
463 {
464 if (adapter->en_mng_pt) {
465 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
466
467 /* disable hardware interception of ARP */
468 manc &= ~(E1000_MANC_ARP_EN);
469
470 /* enable receiving management packets to the host */
471 /* this will probably generate destination unreachable messages
472 * from the host OS, but the packets will be handled on SMBUS */
473 if (adapter->hw.has_manc2h) {
474 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
475
476 manc |= E1000_MANC_EN_MNG2HOST;
477 #define E1000_MNG2HOST_PORT_623 (1 << 5)
478 #define E1000_MNG2HOST_PORT_664 (1 << 6)
479 manc2h |= E1000_MNG2HOST_PORT_623;
480 manc2h |= E1000_MNG2HOST_PORT_664;
481 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
482 }
483
484 E1000_WRITE_REG(&adapter->hw, MANC, manc);
485 }
486 }
487
488 static void
489 e1000_release_manageability(struct e1000_adapter *adapter)
490 {
491 if (adapter->en_mng_pt) {
492 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
493
494 /* re-enable hardware interception of ARP */
495 manc |= E1000_MANC_ARP_EN;
496
497 if (adapter->hw.has_manc2h)
498 manc &= ~E1000_MANC_EN_MNG2HOST;
499
500 /* don't explicitly have to mess with MANC2H since
501 * MANC has an enable disable that gates MANC2H */
502
503 E1000_WRITE_REG(&adapter->hw, MANC, manc);
504 }
505 }
506
507 /**
508 * e1000_configure - configure the hardware for RX and TX
509 * @adapter = private board structure
510 **/
511 static void e1000_configure(struct e1000_adapter *adapter)
512 {
513 struct net_device *netdev = adapter->netdev;
514 int i;
515
516 e1000_set_multi(netdev);
517
518 e1000_restore_vlan(adapter);
519 e1000_init_manageability(adapter);
520
521 e1000_configure_tx(adapter);
522 e1000_setup_rctl(adapter);
523 e1000_configure_rx(adapter);
524 /* call E1000_DESC_UNUSED which always leaves
525 * at least 1 descriptor unused to make sure
526 * next_to_use != next_to_clean */
527 for (i = 0; i < adapter->num_rx_queues; i++) {
528 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
529 adapter->alloc_rx_buf(adapter, ring,
530 E1000_DESC_UNUSED(ring));
531 }
532
533 adapter->tx_queue_len = netdev->tx_queue_len;
534 }
535
536 int e1000_up(struct e1000_adapter *adapter)
537 {
538 /* hardware has been reset, we need to reload some things */
539 e1000_configure(adapter);
540
541 clear_bit(__E1000_DOWN, &adapter->flags);
542
543 #ifdef CONFIG_E1000_NAPI
544 netif_poll_enable(adapter->netdev);
545 #endif
546 e1000_irq_enable(adapter);
547
548 /* fire a link change interrupt to start the watchdog */
549 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
550 return 0;
551 }
552
553 /**
554 * e1000_power_up_phy - restore link in case the phy was powered down
555 * @adapter: address of board private structure
556 *
557 * The phy may be powered down to save power and turn off link when the
558 * driver is unloaded and wake on lan is not enabled (among others)
559 * *** this routine MUST be followed by a call to e1000_reset ***
560 *
561 **/
562
563 void e1000_power_up_phy(struct e1000_adapter *adapter)
564 {
565 uint16_t mii_reg = 0;
566
567 /* Just clear the power down bit to wake the phy back up */
568 if (adapter->hw.media_type == e1000_media_type_copper) {
569 /* according to the manual, the phy will retain its
570 * settings across a power-down/up cycle */
571 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
572 mii_reg &= ~MII_CR_POWER_DOWN;
573 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
574 }
575 }
576
577 static void e1000_power_down_phy(struct e1000_adapter *adapter)
578 {
579 /* Power down the PHY so no link is implied when interface is down *
580 * The PHY cannot be powered down if any of the following is TRUE *
581 * (a) WoL is enabled
582 * (b) AMT is active
583 * (c) SoL/IDER session is active */
584 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
585 adapter->hw.media_type == e1000_media_type_copper) {
586 uint16_t mii_reg = 0;
587
588 switch (adapter->hw.mac_type) {
589 case e1000_82540:
590 case e1000_82545:
591 case e1000_82545_rev_3:
592 case e1000_82546:
593 case e1000_82546_rev_3:
594 case e1000_82541:
595 case e1000_82541_rev_2:
596 case e1000_82547:
597 case e1000_82547_rev_2:
598 if (E1000_READ_REG(&adapter->hw, MANC) &
599 E1000_MANC_SMBUS_EN)
600 goto out;
601 break;
602 case e1000_82571:
603 case e1000_82572:
604 case e1000_82573:
605 case e1000_80003es2lan:
606 case e1000_ich8lan:
607 if (e1000_check_mng_mode(&adapter->hw) ||
608 e1000_check_phy_reset_block(&adapter->hw))
609 goto out;
610 break;
611 default:
612 goto out;
613 }
614 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
615 mii_reg |= MII_CR_POWER_DOWN;
616 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
617 mdelay(1);
618 }
619 out:
620 return;
621 }
622
623 void
624 e1000_down(struct e1000_adapter *adapter)
625 {
626 struct net_device *netdev = adapter->netdev;
627
628 /* signal that we're down so the interrupt handler does not
629 * reschedule our watchdog timer */
630 set_bit(__E1000_DOWN, &adapter->flags);
631
632 #ifdef CONFIG_E1000_NAPI
633 netif_poll_disable(netdev);
634 #endif
635 e1000_irq_disable(adapter);
636
637 del_timer_sync(&adapter->tx_fifo_stall_timer);
638 del_timer_sync(&adapter->watchdog_timer);
639 del_timer_sync(&adapter->phy_info_timer);
640
641 netdev->tx_queue_len = adapter->tx_queue_len;
642 adapter->link_speed = 0;
643 adapter->link_duplex = 0;
644 netif_carrier_off(netdev);
645 netif_stop_queue(netdev);
646
647 e1000_reset(adapter);
648 e1000_clean_all_tx_rings(adapter);
649 e1000_clean_all_rx_rings(adapter);
650 }
651
652 void
653 e1000_reinit_locked(struct e1000_adapter *adapter)
654 {
655 WARN_ON(in_interrupt());
656 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
657 msleep(1);
658 e1000_down(adapter);
659 e1000_up(adapter);
660 clear_bit(__E1000_RESETTING, &adapter->flags);
661 }
662
663 void
664 e1000_reset(struct e1000_adapter *adapter)
665 {
666 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
667 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
668 boolean_t legacy_pba_adjust = FALSE;
669
670 /* Repartition Pba for greater than 9k mtu
671 * To take effect CTRL.RST is required.
672 */
673
674 switch (adapter->hw.mac_type) {
675 case e1000_82542_rev2_0:
676 case e1000_82542_rev2_1:
677 case e1000_82543:
678 case e1000_82544:
679 case e1000_82540:
680 case e1000_82541:
681 case e1000_82541_rev_2:
682 legacy_pba_adjust = TRUE;
683 pba = E1000_PBA_48K;
684 break;
685 case e1000_82545:
686 case e1000_82545_rev_3:
687 case e1000_82546:
688 case e1000_82546_rev_3:
689 pba = E1000_PBA_48K;
690 break;
691 case e1000_82547:
692 case e1000_82547_rev_2:
693 legacy_pba_adjust = TRUE;
694 pba = E1000_PBA_30K;
695 break;
696 case e1000_82571:
697 case e1000_82572:
698 case e1000_80003es2lan:
699 pba = E1000_PBA_38K;
700 break;
701 case e1000_82573:
702 pba = E1000_PBA_20K;
703 break;
704 case e1000_ich8lan:
705 pba = E1000_PBA_8K;
706 case e1000_undefined:
707 case e1000_num_macs:
708 break;
709 }
710
711 if (legacy_pba_adjust == TRUE) {
712 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
713 pba -= 8; /* allocate more FIFO for Tx */
714
715 if (adapter->hw.mac_type == e1000_82547) {
716 adapter->tx_fifo_head = 0;
717 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
718 adapter->tx_fifo_size =
719 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
720 atomic_set(&adapter->tx_fifo_stall, 0);
721 }
722 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
723 /* adjust PBA for jumbo frames */
724 E1000_WRITE_REG(&adapter->hw, PBA, pba);
725
726 /* To maintain wire speed transmits, the Tx FIFO should be
727 * large enough to accomodate two full transmit packets,
728 * rounded up to the next 1KB and expressed in KB. Likewise,
729 * the Rx FIFO should be large enough to accomodate at least
730 * one full receive packet and is similarly rounded up and
731 * expressed in KB. */
732 pba = E1000_READ_REG(&adapter->hw, PBA);
733 /* upper 16 bits has Tx packet buffer allocation size in KB */
734 tx_space = pba >> 16;
735 /* lower 16 bits has Rx packet buffer allocation size in KB */
736 pba &= 0xffff;
737 /* don't include ethernet FCS because hardware appends/strips */
738 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
739 VLAN_TAG_SIZE;
740 min_tx_space = min_rx_space;
741 min_tx_space *= 2;
742 min_tx_space = ALIGN(min_tx_space, 1024);
743 min_tx_space >>= 10;
744 min_rx_space = ALIGN(min_rx_space, 1024);
745 min_rx_space >>= 10;
746
747 /* If current Tx allocation is less than the min Tx FIFO size,
748 * and the min Tx FIFO size is less than the current Rx FIFO
749 * allocation, take space away from current Rx allocation */
750 if (tx_space < min_tx_space &&
751 ((min_tx_space - tx_space) < pba)) {
752 pba = pba - (min_tx_space - tx_space);
753
754 /* PCI/PCIx hardware has PBA alignment constraints */
755 switch (adapter->hw.mac_type) {
756 case e1000_82545 ... e1000_82546_rev_3:
757 pba &= ~(E1000_PBA_8K - 1);
758 break;
759 default:
760 break;
761 }
762
763 /* if short on rx space, rx wins and must trump tx
764 * adjustment or use Early Receive if available */
765 if (pba < min_rx_space) {
766 switch (adapter->hw.mac_type) {
767 case e1000_82573:
768 /* ERT enabled in e1000_configure_rx */
769 break;
770 default:
771 pba = min_rx_space;
772 break;
773 }
774 }
775 }
776 }
777
778 E1000_WRITE_REG(&adapter->hw, PBA, pba);
779
780 /* flow control settings */
781 /* Set the FC high water mark to 90% of the FIFO size.
782 * Required to clear last 3 LSB */
783 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
784 /* We can't use 90% on small FIFOs because the remainder
785 * would be less than 1 full frame. In this case, we size
786 * it to allow at least a full frame above the high water
787 * mark. */
788 if (pba < E1000_PBA_16K)
789 fc_high_water_mark = (pba * 1024) - 1600;
790
791 adapter->hw.fc_high_water = fc_high_water_mark;
792 adapter->hw.fc_low_water = fc_high_water_mark - 8;
793 if (adapter->hw.mac_type == e1000_80003es2lan)
794 adapter->hw.fc_pause_time = 0xFFFF;
795 else
796 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
797 adapter->hw.fc_send_xon = 1;
798 adapter->hw.fc = adapter->hw.original_fc;
799
800 /* Allow time for pending master requests to run */
801 e1000_reset_hw(&adapter->hw);
802 if (adapter->hw.mac_type >= e1000_82544)
803 E1000_WRITE_REG(&adapter->hw, WUC, 0);
804
805 if (e1000_init_hw(&adapter->hw))
806 DPRINTK(PROBE, ERR, "Hardware Error\n");
807 e1000_update_mng_vlan(adapter);
808
809 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
810 if (adapter->hw.mac_type >= e1000_82544 &&
811 adapter->hw.mac_type <= e1000_82547_rev_2 &&
812 adapter->hw.autoneg == 1 &&
813 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
814 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
815 /* clear phy power management bit if we are in gig only mode,
816 * which if enabled will attempt negotiation to 100Mb, which
817 * can cause a loss of link at power off or driver unload */
818 ctrl &= ~E1000_CTRL_SWDPIN3;
819 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
820 }
821
822 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
823 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
824
825 e1000_reset_adaptive(&adapter->hw);
826 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
827
828 if (!adapter->smart_power_down &&
829 (adapter->hw.mac_type == e1000_82571 ||
830 adapter->hw.mac_type == e1000_82572)) {
831 uint16_t phy_data = 0;
832 /* speed up time to link by disabling smart power down, ignore
833 * the return value of this function because there is nothing
834 * different we would do if it failed */
835 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
836 &phy_data);
837 phy_data &= ~IGP02E1000_PM_SPD;
838 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
839 phy_data);
840 }
841
842 e1000_release_manageability(adapter);
843 }
844
845 /**
846 * e1000_probe - Device Initialization Routine
847 * @pdev: PCI device information struct
848 * @ent: entry in e1000_pci_tbl
849 *
850 * Returns 0 on success, negative on failure
851 *
852 * e1000_probe initializes an adapter identified by a pci_dev structure.
853 * The OS initialization, configuring of the adapter private structure,
854 * and a hardware reset occur.
855 **/
856
857 static int __devinit
858 e1000_probe(struct pci_dev *pdev,
859 const struct pci_device_id *ent)
860 {
861 struct net_device *netdev;
862 struct e1000_adapter *adapter;
863 unsigned long mmio_start, mmio_len;
864 unsigned long flash_start, flash_len;
865
866 static int cards_found = 0;
867 static int global_quad_port_a = 0; /* global ksp3 port a indication */
868 int i, err, pci_using_dac;
869 uint16_t eeprom_data = 0;
870 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
871 if ((err = pci_enable_device(pdev)))
872 return err;
873
874 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
875 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
876 pci_using_dac = 1;
877 } else {
878 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
879 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
880 E1000_ERR("No usable DMA configuration, aborting\n");
881 goto err_dma;
882 }
883 pci_using_dac = 0;
884 }
885
886 if ((err = pci_request_regions(pdev, e1000_driver_name)))
887 goto err_pci_reg;
888
889 pci_set_master(pdev);
890
891 err = -ENOMEM;
892 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
893 if (!netdev)
894 goto err_alloc_etherdev;
895
896 SET_MODULE_OWNER(netdev);
897 SET_NETDEV_DEV(netdev, &pdev->dev);
898
899 pci_set_drvdata(pdev, netdev);
900 adapter = netdev_priv(netdev);
901 adapter->netdev = netdev;
902 adapter->pdev = pdev;
903 adapter->hw.back = adapter;
904 adapter->msg_enable = (1 << debug) - 1;
905
906 mmio_start = pci_resource_start(pdev, BAR_0);
907 mmio_len = pci_resource_len(pdev, BAR_0);
908
909 err = -EIO;
910 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
911 if (!adapter->hw.hw_addr)
912 goto err_ioremap;
913
914 for (i = BAR_1; i <= BAR_5; i++) {
915 if (pci_resource_len(pdev, i) == 0)
916 continue;
917 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
918 adapter->hw.io_base = pci_resource_start(pdev, i);
919 break;
920 }
921 }
922
923 netdev->open = &e1000_open;
924 netdev->stop = &e1000_close;
925 netdev->hard_start_xmit = &e1000_xmit_frame;
926 netdev->get_stats = &e1000_get_stats;
927 netdev->set_multicast_list = &e1000_set_multi;
928 netdev->set_mac_address = &e1000_set_mac;
929 netdev->change_mtu = &e1000_change_mtu;
930 netdev->do_ioctl = &e1000_ioctl;
931 e1000_set_ethtool_ops(netdev);
932 netdev->tx_timeout = &e1000_tx_timeout;
933 netdev->watchdog_timeo = 5 * HZ;
934 #ifdef CONFIG_E1000_NAPI
935 netdev->poll = &e1000_clean;
936 netdev->weight = 64;
937 #endif
938 netdev->vlan_rx_register = e1000_vlan_rx_register;
939 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
940 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
941 #ifdef CONFIG_NET_POLL_CONTROLLER
942 netdev->poll_controller = e1000_netpoll;
943 #endif
944 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
945
946 netdev->mem_start = mmio_start;
947 netdev->mem_end = mmio_start + mmio_len;
948 netdev->base_addr = adapter->hw.io_base;
949
950 adapter->bd_number = cards_found;
951
952 /* setup the private structure */
953
954 if ((err = e1000_sw_init(adapter)))
955 goto err_sw_init;
956
957 err = -EIO;
958 /* Flash BAR mapping must happen after e1000_sw_init
959 * because it depends on mac_type */
960 if ((adapter->hw.mac_type == e1000_ich8lan) &&
961 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
962 flash_start = pci_resource_start(pdev, 1);
963 flash_len = pci_resource_len(pdev, 1);
964 adapter->hw.flash_address = ioremap(flash_start, flash_len);
965 if (!adapter->hw.flash_address)
966 goto err_flashmap;
967 }
968
969 if (e1000_check_phy_reset_block(&adapter->hw))
970 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
971
972 if (adapter->hw.mac_type >= e1000_82543) {
973 netdev->features = NETIF_F_SG |
974 NETIF_F_HW_CSUM |
975 NETIF_F_HW_VLAN_TX |
976 NETIF_F_HW_VLAN_RX |
977 NETIF_F_HW_VLAN_FILTER;
978 if (adapter->hw.mac_type == e1000_ich8lan)
979 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
980 }
981
982 if ((adapter->hw.mac_type >= e1000_82544) &&
983 (adapter->hw.mac_type != e1000_82547))
984 netdev->features |= NETIF_F_TSO;
985
986 if (adapter->hw.mac_type > e1000_82547_rev_2)
987 netdev->features |= NETIF_F_TSO6;
988 if (pci_using_dac)
989 netdev->features |= NETIF_F_HIGHDMA;
990
991 netdev->features |= NETIF_F_LLTX;
992
993 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
994
995 /* initialize eeprom parameters */
996
997 if (e1000_init_eeprom_params(&adapter->hw)) {
998 E1000_ERR("EEPROM initialization failed\n");
999 goto err_eeprom;
1000 }
1001
1002 /* before reading the EEPROM, reset the controller to
1003 * put the device in a known good starting state */
1004
1005 e1000_reset_hw(&adapter->hw);
1006
1007 /* make sure the EEPROM is good */
1008
1009 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1010 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1011 goto err_eeprom;
1012 }
1013
1014 /* copy the MAC address out of the EEPROM */
1015
1016 if (e1000_read_mac_addr(&adapter->hw))
1017 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1018 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1019 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1020
1021 if (!is_valid_ether_addr(netdev->perm_addr)) {
1022 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1023 goto err_eeprom;
1024 }
1025
1026 e1000_get_bus_info(&adapter->hw);
1027
1028 init_timer(&adapter->tx_fifo_stall_timer);
1029 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1030 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1031
1032 init_timer(&adapter->watchdog_timer);
1033 adapter->watchdog_timer.function = &e1000_watchdog;
1034 adapter->watchdog_timer.data = (unsigned long) adapter;
1035
1036 init_timer(&adapter->phy_info_timer);
1037 adapter->phy_info_timer.function = &e1000_update_phy_info;
1038 adapter->phy_info_timer.data = (unsigned long) adapter;
1039
1040 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1041
1042 e1000_check_options(adapter);
1043
1044 /* Initial Wake on LAN setting
1045 * If APM wake is enabled in the EEPROM,
1046 * enable the ACPI Magic Packet filter
1047 */
1048
1049 switch (adapter->hw.mac_type) {
1050 case e1000_82542_rev2_0:
1051 case e1000_82542_rev2_1:
1052 case e1000_82543:
1053 break;
1054 case e1000_82544:
1055 e1000_read_eeprom(&adapter->hw,
1056 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1057 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1058 break;
1059 case e1000_ich8lan:
1060 e1000_read_eeprom(&adapter->hw,
1061 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1062 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1063 break;
1064 case e1000_82546:
1065 case e1000_82546_rev_3:
1066 case e1000_82571:
1067 case e1000_80003es2lan:
1068 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1069 e1000_read_eeprom(&adapter->hw,
1070 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1071 break;
1072 }
1073 /* Fall Through */
1074 default:
1075 e1000_read_eeprom(&adapter->hw,
1076 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1077 break;
1078 }
1079 if (eeprom_data & eeprom_apme_mask)
1080 adapter->eeprom_wol |= E1000_WUFC_MAG;
1081
1082 /* now that we have the eeprom settings, apply the special cases
1083 * where the eeprom may be wrong or the board simply won't support
1084 * wake on lan on a particular port */
1085 switch (pdev->device) {
1086 case E1000_DEV_ID_82546GB_PCIE:
1087 adapter->eeprom_wol = 0;
1088 break;
1089 case E1000_DEV_ID_82546EB_FIBER:
1090 case E1000_DEV_ID_82546GB_FIBER:
1091 case E1000_DEV_ID_82571EB_FIBER:
1092 /* Wake events only supported on port A for dual fiber
1093 * regardless of eeprom setting */
1094 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1095 adapter->eeprom_wol = 0;
1096 break;
1097 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1098 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1099 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1100 /* if quad port adapter, disable WoL on all but port A */
1101 if (global_quad_port_a != 0)
1102 adapter->eeprom_wol = 0;
1103 else
1104 adapter->quad_port_a = 1;
1105 /* Reset for multiple quad port adapters */
1106 if (++global_quad_port_a == 4)
1107 global_quad_port_a = 0;
1108 break;
1109 }
1110
1111 /* initialize the wol settings based on the eeprom settings */
1112 adapter->wol = adapter->eeprom_wol;
1113
1114 /* print bus type/speed/width info */
1115 {
1116 struct e1000_hw *hw = &adapter->hw;
1117 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1118 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1119 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1120 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1121 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1122 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1123 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1124 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1125 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1126 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1127 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1128 "32-bit"));
1129 }
1130
1131 for (i = 0; i < 6; i++)
1132 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1133
1134 /* reset the hardware with the new settings */
1135 e1000_reset(adapter);
1136
1137 /* If the controller is 82573 and f/w is AMT, do not set
1138 * DRV_LOAD until the interface is up. For all other cases,
1139 * let the f/w know that the h/w is now under the control
1140 * of the driver. */
1141 if (adapter->hw.mac_type != e1000_82573 ||
1142 !e1000_check_mng_mode(&adapter->hw))
1143 e1000_get_hw_control(adapter);
1144
1145 /* tell the stack to leave us alone until e1000_open() is called */
1146 netif_carrier_off(netdev);
1147 netif_stop_queue(netdev);
1148 #ifdef CONFIG_E1000_NAPI
1149 netif_poll_disable(netdev);
1150 #endif
1151
1152 strcpy(netdev->name, "eth%d");
1153 if ((err = register_netdev(netdev)))
1154 goto err_register;
1155
1156 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1157
1158 cards_found++;
1159 return 0;
1160
1161 err_register:
1162 e1000_release_hw_control(adapter);
1163 err_eeprom:
1164 if (!e1000_check_phy_reset_block(&adapter->hw))
1165 e1000_phy_hw_reset(&adapter->hw);
1166
1167 if (adapter->hw.flash_address)
1168 iounmap(adapter->hw.flash_address);
1169 err_flashmap:
1170 #ifdef CONFIG_E1000_NAPI
1171 for (i = 0; i < adapter->num_rx_queues; i++)
1172 dev_put(&adapter->polling_netdev[i]);
1173 #endif
1174
1175 kfree(adapter->tx_ring);
1176 kfree(adapter->rx_ring);
1177 #ifdef CONFIG_E1000_NAPI
1178 kfree(adapter->polling_netdev);
1179 #endif
1180 err_sw_init:
1181 iounmap(adapter->hw.hw_addr);
1182 err_ioremap:
1183 free_netdev(netdev);
1184 err_alloc_etherdev:
1185 pci_release_regions(pdev);
1186 err_pci_reg:
1187 err_dma:
1188 pci_disable_device(pdev);
1189 return err;
1190 }
1191
1192 /**
1193 * e1000_remove - Device Removal Routine
1194 * @pdev: PCI device information struct
1195 *
1196 * e1000_remove is called by the PCI subsystem to alert the driver
1197 * that it should release a PCI device. The could be caused by a
1198 * Hot-Plug event, or because the driver is going to be removed from
1199 * memory.
1200 **/
1201
1202 static void __devexit
1203 e1000_remove(struct pci_dev *pdev)
1204 {
1205 struct net_device *netdev = pci_get_drvdata(pdev);
1206 struct e1000_adapter *adapter = netdev_priv(netdev);
1207 #ifdef CONFIG_E1000_NAPI
1208 int i;
1209 #endif
1210
1211 cancel_work_sync(&adapter->reset_task);
1212
1213 e1000_release_manageability(adapter);
1214
1215 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1216 * would have already happened in close and is redundant. */
1217 e1000_release_hw_control(adapter);
1218
1219 unregister_netdev(netdev);
1220 #ifdef CONFIG_E1000_NAPI
1221 for (i = 0; i < adapter->num_rx_queues; i++)
1222 dev_put(&adapter->polling_netdev[i]);
1223 #endif
1224
1225 if (!e1000_check_phy_reset_block(&adapter->hw))
1226 e1000_phy_hw_reset(&adapter->hw);
1227
1228 kfree(adapter->tx_ring);
1229 kfree(adapter->rx_ring);
1230 #ifdef CONFIG_E1000_NAPI
1231 kfree(adapter->polling_netdev);
1232 #endif
1233
1234 iounmap(adapter->hw.hw_addr);
1235 if (adapter->hw.flash_address)
1236 iounmap(adapter->hw.flash_address);
1237 pci_release_regions(pdev);
1238
1239 free_netdev(netdev);
1240
1241 pci_disable_device(pdev);
1242 }
1243
1244 /**
1245 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1246 * @adapter: board private structure to initialize
1247 *
1248 * e1000_sw_init initializes the Adapter private data structure.
1249 * Fields are initialized based on PCI device information and
1250 * OS network device settings (MTU size).
1251 **/
1252
1253 static int __devinit
1254 e1000_sw_init(struct e1000_adapter *adapter)
1255 {
1256 struct e1000_hw *hw = &adapter->hw;
1257 struct net_device *netdev = adapter->netdev;
1258 struct pci_dev *pdev = adapter->pdev;
1259 #ifdef CONFIG_E1000_NAPI
1260 int i;
1261 #endif
1262
1263 /* PCI config space info */
1264
1265 hw->vendor_id = pdev->vendor;
1266 hw->device_id = pdev->device;
1267 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1268 hw->subsystem_id = pdev->subsystem_device;
1269 hw->revision_id = pdev->revision;
1270
1271 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1272
1273 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1274 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1275 hw->max_frame_size = netdev->mtu +
1276 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1277 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1278
1279 /* identify the MAC */
1280
1281 if (e1000_set_mac_type(hw)) {
1282 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1283 return -EIO;
1284 }
1285
1286 switch (hw->mac_type) {
1287 default:
1288 break;
1289 case e1000_82541:
1290 case e1000_82547:
1291 case e1000_82541_rev_2:
1292 case e1000_82547_rev_2:
1293 hw->phy_init_script = 1;
1294 break;
1295 }
1296
1297 e1000_set_media_type(hw);
1298
1299 hw->wait_autoneg_complete = FALSE;
1300 hw->tbi_compatibility_en = TRUE;
1301 hw->adaptive_ifs = TRUE;
1302
1303 /* Copper options */
1304
1305 if (hw->media_type == e1000_media_type_copper) {
1306 hw->mdix = AUTO_ALL_MODES;
1307 hw->disable_polarity_correction = FALSE;
1308 hw->master_slave = E1000_MASTER_SLAVE;
1309 }
1310
1311 adapter->num_tx_queues = 1;
1312 adapter->num_rx_queues = 1;
1313
1314 if (e1000_alloc_queues(adapter)) {
1315 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1316 return -ENOMEM;
1317 }
1318
1319 #ifdef CONFIG_E1000_NAPI
1320 for (i = 0; i < adapter->num_rx_queues; i++) {
1321 adapter->polling_netdev[i].priv = adapter;
1322 adapter->polling_netdev[i].poll = &e1000_clean;
1323 adapter->polling_netdev[i].weight = 64;
1324 dev_hold(&adapter->polling_netdev[i]);
1325 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1326 }
1327 spin_lock_init(&adapter->tx_queue_lock);
1328 #endif
1329
1330 /* Explicitly disable IRQ since the NIC can be in any state. */
1331 atomic_set(&adapter->irq_sem, 0);
1332 e1000_irq_disable(adapter);
1333
1334 spin_lock_init(&adapter->stats_lock);
1335
1336 set_bit(__E1000_DOWN, &adapter->flags);
1337
1338 return 0;
1339 }
1340
1341 /**
1342 * e1000_alloc_queues - Allocate memory for all rings
1343 * @adapter: board private structure to initialize
1344 *
1345 * We allocate one ring per queue at run-time since we don't know the
1346 * number of queues at compile-time. The polling_netdev array is
1347 * intended for Multiqueue, but should work fine with a single queue.
1348 **/
1349
1350 static int __devinit
1351 e1000_alloc_queues(struct e1000_adapter *adapter)
1352 {
1353 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1354 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1355 if (!adapter->tx_ring)
1356 return -ENOMEM;
1357
1358 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1359 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1360 if (!adapter->rx_ring) {
1361 kfree(adapter->tx_ring);
1362 return -ENOMEM;
1363 }
1364
1365 #ifdef CONFIG_E1000_NAPI
1366 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1367 sizeof(struct net_device),
1368 GFP_KERNEL);
1369 if (!adapter->polling_netdev) {
1370 kfree(adapter->tx_ring);
1371 kfree(adapter->rx_ring);
1372 return -ENOMEM;
1373 }
1374 #endif
1375
1376 return E1000_SUCCESS;
1377 }
1378
1379 /**
1380 * e1000_open - Called when a network interface is made active
1381 * @netdev: network interface device structure
1382 *
1383 * Returns 0 on success, negative value on failure
1384 *
1385 * The open entry point is called when a network interface is made
1386 * active by the system (IFF_UP). At this point all resources needed
1387 * for transmit and receive operations are allocated, the interrupt
1388 * handler is registered with the OS, the watchdog timer is started,
1389 * and the stack is notified that the interface is ready.
1390 **/
1391
1392 static int
1393 e1000_open(struct net_device *netdev)
1394 {
1395 struct e1000_adapter *adapter = netdev_priv(netdev);
1396 int err;
1397
1398 /* disallow open during test */
1399 if (test_bit(__E1000_TESTING, &adapter->flags))
1400 return -EBUSY;
1401
1402 /* allocate transmit descriptors */
1403 err = e1000_setup_all_tx_resources(adapter);
1404 if (err)
1405 goto err_setup_tx;
1406
1407 /* allocate receive descriptors */
1408 err = e1000_setup_all_rx_resources(adapter);
1409 if (err)
1410 goto err_setup_rx;
1411
1412 e1000_power_up_phy(adapter);
1413
1414 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1415 if ((adapter->hw.mng_cookie.status &
1416 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1417 e1000_update_mng_vlan(adapter);
1418 }
1419
1420 /* If AMT is enabled, let the firmware know that the network
1421 * interface is now open */
1422 if (adapter->hw.mac_type == e1000_82573 &&
1423 e1000_check_mng_mode(&adapter->hw))
1424 e1000_get_hw_control(adapter);
1425
1426 /* before we allocate an interrupt, we must be ready to handle it.
1427 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1428 * as soon as we call pci_request_irq, so we have to setup our
1429 * clean_rx handler before we do so. */
1430 e1000_configure(adapter);
1431
1432 err = e1000_request_irq(adapter);
1433 if (err)
1434 goto err_req_irq;
1435
1436 /* From here on the code is the same as e1000_up() */
1437 clear_bit(__E1000_DOWN, &adapter->flags);
1438
1439 #ifdef CONFIG_E1000_NAPI
1440 netif_poll_enable(netdev);
1441 #endif
1442
1443 e1000_irq_enable(adapter);
1444
1445 /* fire a link status change interrupt to start the watchdog */
1446 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1447
1448 return E1000_SUCCESS;
1449
1450 err_req_irq:
1451 e1000_release_hw_control(adapter);
1452 e1000_power_down_phy(adapter);
1453 e1000_free_all_rx_resources(adapter);
1454 err_setup_rx:
1455 e1000_free_all_tx_resources(adapter);
1456 err_setup_tx:
1457 e1000_reset(adapter);
1458
1459 return err;
1460 }
1461
1462 /**
1463 * e1000_close - Disables a network interface
1464 * @netdev: network interface device structure
1465 *
1466 * Returns 0, this is not allowed to fail
1467 *
1468 * The close entry point is called when an interface is de-activated
1469 * by the OS. The hardware is still under the drivers control, but
1470 * needs to be disabled. A global MAC reset is issued to stop the
1471 * hardware, and all transmit and receive resources are freed.
1472 **/
1473
1474 static int
1475 e1000_close(struct net_device *netdev)
1476 {
1477 struct e1000_adapter *adapter = netdev_priv(netdev);
1478
1479 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1480 e1000_down(adapter);
1481 e1000_power_down_phy(adapter);
1482 e1000_free_irq(adapter);
1483
1484 e1000_free_all_tx_resources(adapter);
1485 e1000_free_all_rx_resources(adapter);
1486
1487 /* kill manageability vlan ID if supported, but not if a vlan with
1488 * the same ID is registered on the host OS (let 8021q kill it) */
1489 if ((adapter->hw.mng_cookie.status &
1490 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1491 !(adapter->vlgrp &&
1492 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1493 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1494 }
1495
1496 /* If AMT is enabled, let the firmware know that the network
1497 * interface is now closed */
1498 if (adapter->hw.mac_type == e1000_82573 &&
1499 e1000_check_mng_mode(&adapter->hw))
1500 e1000_release_hw_control(adapter);
1501
1502 return 0;
1503 }
1504
1505 /**
1506 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1507 * @adapter: address of board private structure
1508 * @start: address of beginning of memory
1509 * @len: length of memory
1510 **/
1511 static boolean_t
1512 e1000_check_64k_bound(struct e1000_adapter *adapter,
1513 void *start, unsigned long len)
1514 {
1515 unsigned long begin = (unsigned long) start;
1516 unsigned long end = begin + len;
1517
1518 /* First rev 82545 and 82546 need to not allow any memory
1519 * write location to cross 64k boundary due to errata 23 */
1520 if (adapter->hw.mac_type == e1000_82545 ||
1521 adapter->hw.mac_type == e1000_82546) {
1522 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1523 }
1524
1525 return TRUE;
1526 }
1527
1528 /**
1529 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1530 * @adapter: board private structure
1531 * @txdr: tx descriptor ring (for a specific queue) to setup
1532 *
1533 * Return 0 on success, negative on failure
1534 **/
1535
1536 static int
1537 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1538 struct e1000_tx_ring *txdr)
1539 {
1540 struct pci_dev *pdev = adapter->pdev;
1541 int size;
1542
1543 size = sizeof(struct e1000_buffer) * txdr->count;
1544 txdr->buffer_info = vmalloc(size);
1545 if (!txdr->buffer_info) {
1546 DPRINTK(PROBE, ERR,
1547 "Unable to allocate memory for the transmit descriptor ring\n");
1548 return -ENOMEM;
1549 }
1550 memset(txdr->buffer_info, 0, size);
1551
1552 /* round up to nearest 4K */
1553
1554 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1555 txdr->size = ALIGN(txdr->size, 4096);
1556
1557 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1558 if (!txdr->desc) {
1559 setup_tx_desc_die:
1560 vfree(txdr->buffer_info);
1561 DPRINTK(PROBE, ERR,
1562 "Unable to allocate memory for the transmit descriptor ring\n");
1563 return -ENOMEM;
1564 }
1565
1566 /* Fix for errata 23, can't cross 64kB boundary */
1567 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1568 void *olddesc = txdr->desc;
1569 dma_addr_t olddma = txdr->dma;
1570 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1571 "at %p\n", txdr->size, txdr->desc);
1572 /* Try again, without freeing the previous */
1573 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1574 /* Failed allocation, critical failure */
1575 if (!txdr->desc) {
1576 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1577 goto setup_tx_desc_die;
1578 }
1579
1580 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1581 /* give up */
1582 pci_free_consistent(pdev, txdr->size, txdr->desc,
1583 txdr->dma);
1584 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1585 DPRINTK(PROBE, ERR,
1586 "Unable to allocate aligned memory "
1587 "for the transmit descriptor ring\n");
1588 vfree(txdr->buffer_info);
1589 return -ENOMEM;
1590 } else {
1591 /* Free old allocation, new allocation was successful */
1592 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1593 }
1594 }
1595 memset(txdr->desc, 0, txdr->size);
1596
1597 txdr->next_to_use = 0;
1598 txdr->next_to_clean = 0;
1599 spin_lock_init(&txdr->tx_lock);
1600
1601 return 0;
1602 }
1603
1604 /**
1605 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1606 * (Descriptors) for all queues
1607 * @adapter: board private structure
1608 *
1609 * Return 0 on success, negative on failure
1610 **/
1611
1612 int
1613 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1614 {
1615 int i, err = 0;
1616
1617 for (i = 0; i < adapter->num_tx_queues; i++) {
1618 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1619 if (err) {
1620 DPRINTK(PROBE, ERR,
1621 "Allocation for Tx Queue %u failed\n", i);
1622 for (i-- ; i >= 0; i--)
1623 e1000_free_tx_resources(adapter,
1624 &adapter->tx_ring[i]);
1625 break;
1626 }
1627 }
1628
1629 return err;
1630 }
1631
1632 /**
1633 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1634 * @adapter: board private structure
1635 *
1636 * Configure the Tx unit of the MAC after a reset.
1637 **/
1638
1639 static void
1640 e1000_configure_tx(struct e1000_adapter *adapter)
1641 {
1642 uint64_t tdba;
1643 struct e1000_hw *hw = &adapter->hw;
1644 uint32_t tdlen, tctl, tipg, tarc;
1645 uint32_t ipgr1, ipgr2;
1646
1647 /* Setup the HW Tx Head and Tail descriptor pointers */
1648
1649 switch (adapter->num_tx_queues) {
1650 case 1:
1651 default:
1652 tdba = adapter->tx_ring[0].dma;
1653 tdlen = adapter->tx_ring[0].count *
1654 sizeof(struct e1000_tx_desc);
1655 E1000_WRITE_REG(hw, TDLEN, tdlen);
1656 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1657 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1658 E1000_WRITE_REG(hw, TDT, 0);
1659 E1000_WRITE_REG(hw, TDH, 0);
1660 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1661 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1662 break;
1663 }
1664
1665 /* Set the default values for the Tx Inter Packet Gap timer */
1666 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1667 (hw->media_type == e1000_media_type_fiber ||
1668 hw->media_type == e1000_media_type_internal_serdes))
1669 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1670 else
1671 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1672
1673 switch (hw->mac_type) {
1674 case e1000_82542_rev2_0:
1675 case e1000_82542_rev2_1:
1676 tipg = DEFAULT_82542_TIPG_IPGT;
1677 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1678 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1679 break;
1680 case e1000_80003es2lan:
1681 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1682 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1683 break;
1684 default:
1685 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1686 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1687 break;
1688 }
1689 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1690 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1691 E1000_WRITE_REG(hw, TIPG, tipg);
1692
1693 /* Set the Tx Interrupt Delay register */
1694
1695 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1696 if (hw->mac_type >= e1000_82540)
1697 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1698
1699 /* Program the Transmit Control Register */
1700
1701 tctl = E1000_READ_REG(hw, TCTL);
1702 tctl &= ~E1000_TCTL_CT;
1703 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1704 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1705
1706 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1707 tarc = E1000_READ_REG(hw, TARC0);
1708 /* set the speed mode bit, we'll clear it if we're not at
1709 * gigabit link later */
1710 tarc |= (1 << 21);
1711 E1000_WRITE_REG(hw, TARC0, tarc);
1712 } else if (hw->mac_type == e1000_80003es2lan) {
1713 tarc = E1000_READ_REG(hw, TARC0);
1714 tarc |= 1;
1715 E1000_WRITE_REG(hw, TARC0, tarc);
1716 tarc = E1000_READ_REG(hw, TARC1);
1717 tarc |= 1;
1718 E1000_WRITE_REG(hw, TARC1, tarc);
1719 }
1720
1721 e1000_config_collision_dist(hw);
1722
1723 /* Setup Transmit Descriptor Settings for eop descriptor */
1724 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1725
1726 /* only set IDE if we are delaying interrupts using the timers */
1727 if (adapter->tx_int_delay)
1728 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1729
1730 if (hw->mac_type < e1000_82543)
1731 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1732 else
1733 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1734
1735 /* Cache if we're 82544 running in PCI-X because we'll
1736 * need this to apply a workaround later in the send path. */
1737 if (hw->mac_type == e1000_82544 &&
1738 hw->bus_type == e1000_bus_type_pcix)
1739 adapter->pcix_82544 = 1;
1740
1741 E1000_WRITE_REG(hw, TCTL, tctl);
1742
1743 }
1744
1745 /**
1746 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1747 * @adapter: board private structure
1748 * @rxdr: rx descriptor ring (for a specific queue) to setup
1749 *
1750 * Returns 0 on success, negative on failure
1751 **/
1752
1753 static int
1754 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1755 struct e1000_rx_ring *rxdr)
1756 {
1757 struct pci_dev *pdev = adapter->pdev;
1758 int size, desc_len;
1759
1760 size = sizeof(struct e1000_buffer) * rxdr->count;
1761 rxdr->buffer_info = vmalloc(size);
1762 if (!rxdr->buffer_info) {
1763 DPRINTK(PROBE, ERR,
1764 "Unable to allocate memory for the receive descriptor ring\n");
1765 return -ENOMEM;
1766 }
1767 memset(rxdr->buffer_info, 0, size);
1768
1769 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1770 GFP_KERNEL);
1771 if (!rxdr->ps_page) {
1772 vfree(rxdr->buffer_info);
1773 DPRINTK(PROBE, ERR,
1774 "Unable to allocate memory for the receive descriptor ring\n");
1775 return -ENOMEM;
1776 }
1777
1778 rxdr->ps_page_dma = kcalloc(rxdr->count,
1779 sizeof(struct e1000_ps_page_dma),
1780 GFP_KERNEL);
1781 if (!rxdr->ps_page_dma) {
1782 vfree(rxdr->buffer_info);
1783 kfree(rxdr->ps_page);
1784 DPRINTK(PROBE, ERR,
1785 "Unable to allocate memory for the receive descriptor ring\n");
1786 return -ENOMEM;
1787 }
1788
1789 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1790 desc_len = sizeof(struct e1000_rx_desc);
1791 else
1792 desc_len = sizeof(union e1000_rx_desc_packet_split);
1793
1794 /* Round up to nearest 4K */
1795
1796 rxdr->size = rxdr->count * desc_len;
1797 rxdr->size = ALIGN(rxdr->size, 4096);
1798
1799 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1800
1801 if (!rxdr->desc) {
1802 DPRINTK(PROBE, ERR,
1803 "Unable to allocate memory for the receive descriptor ring\n");
1804 setup_rx_desc_die:
1805 vfree(rxdr->buffer_info);
1806 kfree(rxdr->ps_page);
1807 kfree(rxdr->ps_page_dma);
1808 return -ENOMEM;
1809 }
1810
1811 /* Fix for errata 23, can't cross 64kB boundary */
1812 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1813 void *olddesc = rxdr->desc;
1814 dma_addr_t olddma = rxdr->dma;
1815 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1816 "at %p\n", rxdr->size, rxdr->desc);
1817 /* Try again, without freeing the previous */
1818 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1819 /* Failed allocation, critical failure */
1820 if (!rxdr->desc) {
1821 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1822 DPRINTK(PROBE, ERR,
1823 "Unable to allocate memory "
1824 "for the receive descriptor ring\n");
1825 goto setup_rx_desc_die;
1826 }
1827
1828 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1829 /* give up */
1830 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1831 rxdr->dma);
1832 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1833 DPRINTK(PROBE, ERR,
1834 "Unable to allocate aligned memory "
1835 "for the receive descriptor ring\n");
1836 goto setup_rx_desc_die;
1837 } else {
1838 /* Free old allocation, new allocation was successful */
1839 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1840 }
1841 }
1842 memset(rxdr->desc, 0, rxdr->size);
1843
1844 rxdr->next_to_clean = 0;
1845 rxdr->next_to_use = 0;
1846
1847 return 0;
1848 }
1849
1850 /**
1851 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1852 * (Descriptors) for all queues
1853 * @adapter: board private structure
1854 *
1855 * Return 0 on success, negative on failure
1856 **/
1857
1858 int
1859 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1860 {
1861 int i, err = 0;
1862
1863 for (i = 0; i < adapter->num_rx_queues; i++) {
1864 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1865 if (err) {
1866 DPRINTK(PROBE, ERR,
1867 "Allocation for Rx Queue %u failed\n", i);
1868 for (i-- ; i >= 0; i--)
1869 e1000_free_rx_resources(adapter,
1870 &adapter->rx_ring[i]);
1871 break;
1872 }
1873 }
1874
1875 return err;
1876 }
1877
1878 /**
1879 * e1000_setup_rctl - configure the receive control registers
1880 * @adapter: Board private structure
1881 **/
1882 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1883 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1884 static void
1885 e1000_setup_rctl(struct e1000_adapter *adapter)
1886 {
1887 uint32_t rctl, rfctl;
1888 uint32_t psrctl = 0;
1889 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1890 uint32_t pages = 0;
1891 #endif
1892
1893 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1894
1895 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1896
1897 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1898 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1899 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1900
1901 if (adapter->hw.tbi_compatibility_on == 1)
1902 rctl |= E1000_RCTL_SBP;
1903 else
1904 rctl &= ~E1000_RCTL_SBP;
1905
1906 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1907 rctl &= ~E1000_RCTL_LPE;
1908 else
1909 rctl |= E1000_RCTL_LPE;
1910
1911 /* Setup buffer sizes */
1912 rctl &= ~E1000_RCTL_SZ_4096;
1913 rctl |= E1000_RCTL_BSEX;
1914 switch (adapter->rx_buffer_len) {
1915 case E1000_RXBUFFER_256:
1916 rctl |= E1000_RCTL_SZ_256;
1917 rctl &= ~E1000_RCTL_BSEX;
1918 break;
1919 case E1000_RXBUFFER_512:
1920 rctl |= E1000_RCTL_SZ_512;
1921 rctl &= ~E1000_RCTL_BSEX;
1922 break;
1923 case E1000_RXBUFFER_1024:
1924 rctl |= E1000_RCTL_SZ_1024;
1925 rctl &= ~E1000_RCTL_BSEX;
1926 break;
1927 case E1000_RXBUFFER_2048:
1928 default:
1929 rctl |= E1000_RCTL_SZ_2048;
1930 rctl &= ~E1000_RCTL_BSEX;
1931 break;
1932 case E1000_RXBUFFER_4096:
1933 rctl |= E1000_RCTL_SZ_4096;
1934 break;
1935 case E1000_RXBUFFER_8192:
1936 rctl |= E1000_RCTL_SZ_8192;
1937 break;
1938 case E1000_RXBUFFER_16384:
1939 rctl |= E1000_RCTL_SZ_16384;
1940 break;
1941 }
1942
1943 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1944 /* 82571 and greater support packet-split where the protocol
1945 * header is placed in skb->data and the packet data is
1946 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1947 * In the case of a non-split, skb->data is linearly filled,
1948 * followed by the page buffers. Therefore, skb->data is
1949 * sized to hold the largest protocol header.
1950 */
1951 /* allocations using alloc_page take too long for regular MTU
1952 * so only enable packet split for jumbo frames */
1953 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1954 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1955 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1956 adapter->rx_ps_pages = pages;
1957 else
1958 adapter->rx_ps_pages = 0;
1959 #endif
1960 if (adapter->rx_ps_pages) {
1961 /* Configure extra packet-split registers */
1962 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1963 rfctl |= E1000_RFCTL_EXTEN;
1964 /* disable packet split support for IPv6 extension headers,
1965 * because some malformed IPv6 headers can hang the RX */
1966 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1967 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1968
1969 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1970
1971 rctl |= E1000_RCTL_DTYP_PS;
1972
1973 psrctl |= adapter->rx_ps_bsize0 >>
1974 E1000_PSRCTL_BSIZE0_SHIFT;
1975
1976 switch (adapter->rx_ps_pages) {
1977 case 3:
1978 psrctl |= PAGE_SIZE <<
1979 E1000_PSRCTL_BSIZE3_SHIFT;
1980 case 2:
1981 psrctl |= PAGE_SIZE <<
1982 E1000_PSRCTL_BSIZE2_SHIFT;
1983 case 1:
1984 psrctl |= PAGE_SIZE >>
1985 E1000_PSRCTL_BSIZE1_SHIFT;
1986 break;
1987 }
1988
1989 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1990 }
1991
1992 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1993 }
1994
1995 /**
1996 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1997 * @adapter: board private structure
1998 *
1999 * Configure the Rx unit of the MAC after a reset.
2000 **/
2001
2002 static void
2003 e1000_configure_rx(struct e1000_adapter *adapter)
2004 {
2005 uint64_t rdba;
2006 struct e1000_hw *hw = &adapter->hw;
2007 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2008
2009 if (adapter->rx_ps_pages) {
2010 /* this is a 32 byte descriptor */
2011 rdlen = adapter->rx_ring[0].count *
2012 sizeof(union e1000_rx_desc_packet_split);
2013 adapter->clean_rx = e1000_clean_rx_irq_ps;
2014 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2015 } else {
2016 rdlen = adapter->rx_ring[0].count *
2017 sizeof(struct e1000_rx_desc);
2018 adapter->clean_rx = e1000_clean_rx_irq;
2019 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2020 }
2021
2022 /* disable receives while setting up the descriptors */
2023 rctl = E1000_READ_REG(hw, RCTL);
2024 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2025
2026 /* set the Receive Delay Timer Register */
2027 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2028
2029 if (hw->mac_type >= e1000_82540) {
2030 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2031 if (adapter->itr_setting != 0)
2032 E1000_WRITE_REG(hw, ITR,
2033 1000000000 / (adapter->itr * 256));
2034 }
2035
2036 if (hw->mac_type >= e1000_82571) {
2037 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2038 /* Reset delay timers after every interrupt */
2039 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2040 #ifdef CONFIG_E1000_NAPI
2041 /* Auto-Mask interrupts upon ICR access */
2042 ctrl_ext |= E1000_CTRL_EXT_IAME;
2043 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2044 #endif
2045 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2046 E1000_WRITE_FLUSH(hw);
2047 }
2048
2049 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2050 * the Base and Length of the Rx Descriptor Ring */
2051 switch (adapter->num_rx_queues) {
2052 case 1:
2053 default:
2054 rdba = adapter->rx_ring[0].dma;
2055 E1000_WRITE_REG(hw, RDLEN, rdlen);
2056 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2057 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2058 E1000_WRITE_REG(hw, RDT, 0);
2059 E1000_WRITE_REG(hw, RDH, 0);
2060 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2061 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2062 break;
2063 }
2064
2065 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2066 if (hw->mac_type >= e1000_82543) {
2067 rxcsum = E1000_READ_REG(hw, RXCSUM);
2068 if (adapter->rx_csum == TRUE) {
2069 rxcsum |= E1000_RXCSUM_TUOFL;
2070
2071 /* Enable 82571 IPv4 payload checksum for UDP fragments
2072 * Must be used in conjunction with packet-split. */
2073 if ((hw->mac_type >= e1000_82571) &&
2074 (adapter->rx_ps_pages)) {
2075 rxcsum |= E1000_RXCSUM_IPPCSE;
2076 }
2077 } else {
2078 rxcsum &= ~E1000_RXCSUM_TUOFL;
2079 /* don't need to clear IPPCSE as it defaults to 0 */
2080 }
2081 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2082 }
2083
2084 /* enable early receives on 82573, only takes effect if using > 2048
2085 * byte total frame size. for example only for jumbo frames */
2086 #define E1000_ERT_2048 0x100
2087 if (hw->mac_type == e1000_82573)
2088 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2089
2090 /* Enable Receives */
2091 E1000_WRITE_REG(hw, RCTL, rctl);
2092 }
2093
2094 /**
2095 * e1000_free_tx_resources - Free Tx Resources per Queue
2096 * @adapter: board private structure
2097 * @tx_ring: Tx descriptor ring for a specific queue
2098 *
2099 * Free all transmit software resources
2100 **/
2101
2102 static void
2103 e1000_free_tx_resources(struct e1000_adapter *adapter,
2104 struct e1000_tx_ring *tx_ring)
2105 {
2106 struct pci_dev *pdev = adapter->pdev;
2107
2108 e1000_clean_tx_ring(adapter, tx_ring);
2109
2110 vfree(tx_ring->buffer_info);
2111 tx_ring->buffer_info = NULL;
2112
2113 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2114
2115 tx_ring->desc = NULL;
2116 }
2117
2118 /**
2119 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2120 * @adapter: board private structure
2121 *
2122 * Free all transmit software resources
2123 **/
2124
2125 void
2126 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2127 {
2128 int i;
2129
2130 for (i = 0; i < adapter->num_tx_queues; i++)
2131 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2132 }
2133
2134 static void
2135 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2136 struct e1000_buffer *buffer_info)
2137 {
2138 if (buffer_info->dma) {
2139 pci_unmap_page(adapter->pdev,
2140 buffer_info->dma,
2141 buffer_info->length,
2142 PCI_DMA_TODEVICE);
2143 buffer_info->dma = 0;
2144 }
2145 if (buffer_info->skb) {
2146 dev_kfree_skb_any(buffer_info->skb);
2147 buffer_info->skb = NULL;
2148 }
2149 /* buffer_info must be completely set up in the transmit path */
2150 }
2151
2152 /**
2153 * e1000_clean_tx_ring - Free Tx Buffers
2154 * @adapter: board private structure
2155 * @tx_ring: ring to be cleaned
2156 **/
2157
2158 static void
2159 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2160 struct e1000_tx_ring *tx_ring)
2161 {
2162 struct e1000_buffer *buffer_info;
2163 unsigned long size;
2164 unsigned int i;
2165
2166 /* Free all the Tx ring sk_buffs */
2167
2168 for (i = 0; i < tx_ring->count; i++) {
2169 buffer_info = &tx_ring->buffer_info[i];
2170 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2171 }
2172
2173 size = sizeof(struct e1000_buffer) * tx_ring->count;
2174 memset(tx_ring->buffer_info, 0, size);
2175
2176 /* Zero out the descriptor ring */
2177
2178 memset(tx_ring->desc, 0, tx_ring->size);
2179
2180 tx_ring->next_to_use = 0;
2181 tx_ring->next_to_clean = 0;
2182 tx_ring->last_tx_tso = 0;
2183
2184 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2185 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2186 }
2187
2188 /**
2189 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2190 * @adapter: board private structure
2191 **/
2192
2193 static void
2194 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2195 {
2196 int i;
2197
2198 for (i = 0; i < adapter->num_tx_queues; i++)
2199 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2200 }
2201
2202 /**
2203 * e1000_free_rx_resources - Free Rx Resources
2204 * @adapter: board private structure
2205 * @rx_ring: ring to clean the resources from
2206 *
2207 * Free all receive software resources
2208 **/
2209
2210 static void
2211 e1000_free_rx_resources(struct e1000_adapter *adapter,
2212 struct e1000_rx_ring *rx_ring)
2213 {
2214 struct pci_dev *pdev = adapter->pdev;
2215
2216 e1000_clean_rx_ring(adapter, rx_ring);
2217
2218 vfree(rx_ring->buffer_info);
2219 rx_ring->buffer_info = NULL;
2220 kfree(rx_ring->ps_page);
2221 rx_ring->ps_page = NULL;
2222 kfree(rx_ring->ps_page_dma);
2223 rx_ring->ps_page_dma = NULL;
2224
2225 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2226
2227 rx_ring->desc = NULL;
2228 }
2229
2230 /**
2231 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2232 * @adapter: board private structure
2233 *
2234 * Free all receive software resources
2235 **/
2236
2237 void
2238 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2239 {
2240 int i;
2241
2242 for (i = 0; i < adapter->num_rx_queues; i++)
2243 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2244 }
2245
2246 /**
2247 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2248 * @adapter: board private structure
2249 * @rx_ring: ring to free buffers from
2250 **/
2251
2252 static void
2253 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2254 struct e1000_rx_ring *rx_ring)
2255 {
2256 struct e1000_buffer *buffer_info;
2257 struct e1000_ps_page *ps_page;
2258 struct e1000_ps_page_dma *ps_page_dma;
2259 struct pci_dev *pdev = adapter->pdev;
2260 unsigned long size;
2261 unsigned int i, j;
2262
2263 /* Free all the Rx ring sk_buffs */
2264 for (i = 0; i < rx_ring->count; i++) {
2265 buffer_info = &rx_ring->buffer_info[i];
2266 if (buffer_info->skb) {
2267 pci_unmap_single(pdev,
2268 buffer_info->dma,
2269 buffer_info->length,
2270 PCI_DMA_FROMDEVICE);
2271
2272 dev_kfree_skb(buffer_info->skb);
2273 buffer_info->skb = NULL;
2274 }
2275 ps_page = &rx_ring->ps_page[i];
2276 ps_page_dma = &rx_ring->ps_page_dma[i];
2277 for (j = 0; j < adapter->rx_ps_pages; j++) {
2278 if (!ps_page->ps_page[j]) break;
2279 pci_unmap_page(pdev,
2280 ps_page_dma->ps_page_dma[j],
2281 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2282 ps_page_dma->ps_page_dma[j] = 0;
2283 put_page(ps_page->ps_page[j]);
2284 ps_page->ps_page[j] = NULL;
2285 }
2286 }
2287
2288 size = sizeof(struct e1000_buffer) * rx_ring->count;
2289 memset(rx_ring->buffer_info, 0, size);
2290 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2291 memset(rx_ring->ps_page, 0, size);
2292 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2293 memset(rx_ring->ps_page_dma, 0, size);
2294
2295 /* Zero out the descriptor ring */
2296
2297 memset(rx_ring->desc, 0, rx_ring->size);
2298
2299 rx_ring->next_to_clean = 0;
2300 rx_ring->next_to_use = 0;
2301
2302 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2303 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2304 }
2305
2306 /**
2307 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2308 * @adapter: board private structure
2309 **/
2310
2311 static void
2312 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2313 {
2314 int i;
2315
2316 for (i = 0; i < adapter->num_rx_queues; i++)
2317 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2318 }
2319
2320 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2321 * and memory write and invalidate disabled for certain operations
2322 */
2323 static void
2324 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2325 {
2326 struct net_device *netdev = adapter->netdev;
2327 uint32_t rctl;
2328
2329 e1000_pci_clear_mwi(&adapter->hw);
2330
2331 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2332 rctl |= E1000_RCTL_RST;
2333 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2334 E1000_WRITE_FLUSH(&adapter->hw);
2335 mdelay(5);
2336
2337 if (netif_running(netdev))
2338 e1000_clean_all_rx_rings(adapter);
2339 }
2340
2341 static void
2342 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2343 {
2344 struct net_device *netdev = adapter->netdev;
2345 uint32_t rctl;
2346
2347 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2348 rctl &= ~E1000_RCTL_RST;
2349 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2350 E1000_WRITE_FLUSH(&adapter->hw);
2351 mdelay(5);
2352
2353 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2354 e1000_pci_set_mwi(&adapter->hw);
2355
2356 if (netif_running(netdev)) {
2357 /* No need to loop, because 82542 supports only 1 queue */
2358 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2359 e1000_configure_rx(adapter);
2360 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2361 }
2362 }
2363
2364 /**
2365 * e1000_set_mac - Change the Ethernet Address of the NIC
2366 * @netdev: network interface device structure
2367 * @p: pointer to an address structure
2368 *
2369 * Returns 0 on success, negative on failure
2370 **/
2371
2372 static int
2373 e1000_set_mac(struct net_device *netdev, void *p)
2374 {
2375 struct e1000_adapter *adapter = netdev_priv(netdev);
2376 struct sockaddr *addr = p;
2377
2378 if (!is_valid_ether_addr(addr->sa_data))
2379 return -EADDRNOTAVAIL;
2380
2381 /* 82542 2.0 needs to be in reset to write receive address registers */
2382
2383 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2384 e1000_enter_82542_rst(adapter);
2385
2386 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2387 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2388
2389 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2390
2391 /* With 82571 controllers, LAA may be overwritten (with the default)
2392 * due to controller reset from the other port. */
2393 if (adapter->hw.mac_type == e1000_82571) {
2394 /* activate the work around */
2395 adapter->hw.laa_is_present = 1;
2396
2397 /* Hold a copy of the LAA in RAR[14] This is done so that
2398 * between the time RAR[0] gets clobbered and the time it
2399 * gets fixed (in e1000_watchdog), the actual LAA is in one
2400 * of the RARs and no incoming packets directed to this port
2401 * are dropped. Eventaully the LAA will be in RAR[0] and
2402 * RAR[14] */
2403 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2404 E1000_RAR_ENTRIES - 1);
2405 }
2406
2407 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2408 e1000_leave_82542_rst(adapter);
2409
2410 return 0;
2411 }
2412
2413 /**
2414 * e1000_set_multi - Multicast and Promiscuous mode set
2415 * @netdev: network interface device structure
2416 *
2417 * The set_multi entry point is called whenever the multicast address
2418 * list or the network interface flags are updated. This routine is
2419 * responsible for configuring the hardware for proper multicast,
2420 * promiscuous mode, and all-multi behavior.
2421 **/
2422
2423 static void
2424 e1000_set_multi(struct net_device *netdev)
2425 {
2426 struct e1000_adapter *adapter = netdev_priv(netdev);
2427 struct e1000_hw *hw = &adapter->hw;
2428 struct dev_mc_list *mc_ptr;
2429 uint32_t rctl;
2430 uint32_t hash_value;
2431 int i, rar_entries = E1000_RAR_ENTRIES;
2432 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2433 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2434 E1000_NUM_MTA_REGISTERS;
2435
2436 if (adapter->hw.mac_type == e1000_ich8lan)
2437 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2438
2439 /* reserve RAR[14] for LAA over-write work-around */
2440 if (adapter->hw.mac_type == e1000_82571)
2441 rar_entries--;
2442
2443 /* Check for Promiscuous and All Multicast modes */
2444
2445 rctl = E1000_READ_REG(hw, RCTL);
2446
2447 if (netdev->flags & IFF_PROMISC) {
2448 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2449 } else if (netdev->flags & IFF_ALLMULTI) {
2450 rctl |= E1000_RCTL_MPE;
2451 rctl &= ~E1000_RCTL_UPE;
2452 } else {
2453 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2454 }
2455
2456 E1000_WRITE_REG(hw, RCTL, rctl);
2457
2458 /* 82542 2.0 needs to be in reset to write receive address registers */
2459
2460 if (hw->mac_type == e1000_82542_rev2_0)
2461 e1000_enter_82542_rst(adapter);
2462
2463 /* load the first 14 multicast address into the exact filters 1-14
2464 * RAR 0 is used for the station MAC adddress
2465 * if there are not 14 addresses, go ahead and clear the filters
2466 * -- with 82571 controllers only 0-13 entries are filled here
2467 */
2468 mc_ptr = netdev->mc_list;
2469
2470 for (i = 1; i < rar_entries; i++) {
2471 if (mc_ptr) {
2472 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2473 mc_ptr = mc_ptr->next;
2474 } else {
2475 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2476 E1000_WRITE_FLUSH(hw);
2477 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2478 E1000_WRITE_FLUSH(hw);
2479 }
2480 }
2481
2482 /* clear the old settings from the multicast hash table */
2483
2484 for (i = 0; i < mta_reg_count; i++) {
2485 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2486 E1000_WRITE_FLUSH(hw);
2487 }
2488
2489 /* load any remaining addresses into the hash table */
2490
2491 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2492 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2493 e1000_mta_set(hw, hash_value);
2494 }
2495
2496 if (hw->mac_type == e1000_82542_rev2_0)
2497 e1000_leave_82542_rst(adapter);
2498 }
2499
2500 /* Need to wait a few seconds after link up to get diagnostic information from
2501 * the phy */
2502
2503 static void
2504 e1000_update_phy_info(unsigned long data)
2505 {
2506 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2507 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2508 }
2509
2510 /**
2511 * e1000_82547_tx_fifo_stall - Timer Call-back
2512 * @data: pointer to adapter cast into an unsigned long
2513 **/
2514
2515 static void
2516 e1000_82547_tx_fifo_stall(unsigned long data)
2517 {
2518 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2519 struct net_device *netdev = adapter->netdev;
2520 uint32_t tctl;
2521
2522 if (atomic_read(&adapter->tx_fifo_stall)) {
2523 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2524 E1000_READ_REG(&adapter->hw, TDH)) &&
2525 (E1000_READ_REG(&adapter->hw, TDFT) ==
2526 E1000_READ_REG(&adapter->hw, TDFH)) &&
2527 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2528 E1000_READ_REG(&adapter->hw, TDFHS))) {
2529 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2530 E1000_WRITE_REG(&adapter->hw, TCTL,
2531 tctl & ~E1000_TCTL_EN);
2532 E1000_WRITE_REG(&adapter->hw, TDFT,
2533 adapter->tx_head_addr);
2534 E1000_WRITE_REG(&adapter->hw, TDFH,
2535 adapter->tx_head_addr);
2536 E1000_WRITE_REG(&adapter->hw, TDFTS,
2537 adapter->tx_head_addr);
2538 E1000_WRITE_REG(&adapter->hw, TDFHS,
2539 adapter->tx_head_addr);
2540 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2541 E1000_WRITE_FLUSH(&adapter->hw);
2542
2543 adapter->tx_fifo_head = 0;
2544 atomic_set(&adapter->tx_fifo_stall, 0);
2545 netif_wake_queue(netdev);
2546 } else {
2547 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2548 }
2549 }
2550 }
2551
2552 /**
2553 * e1000_watchdog - Timer Call-back
2554 * @data: pointer to adapter cast into an unsigned long
2555 **/
2556 static void
2557 e1000_watchdog(unsigned long data)
2558 {
2559 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2560 struct net_device *netdev = adapter->netdev;
2561 struct e1000_tx_ring *txdr = adapter->tx_ring;
2562 uint32_t link, tctl;
2563 int32_t ret_val;
2564
2565 ret_val = e1000_check_for_link(&adapter->hw);
2566 if ((ret_val == E1000_ERR_PHY) &&
2567 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2568 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2569 /* See e1000_kumeran_lock_loss_workaround() */
2570 DPRINTK(LINK, INFO,
2571 "Gigabit has been disabled, downgrading speed\n");
2572 }
2573
2574 if (adapter->hw.mac_type == e1000_82573) {
2575 e1000_enable_tx_pkt_filtering(&adapter->hw);
2576 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2577 e1000_update_mng_vlan(adapter);
2578 }
2579
2580 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2581 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2582 link = !adapter->hw.serdes_link_down;
2583 else
2584 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2585
2586 if (link) {
2587 if (!netif_carrier_ok(netdev)) {
2588 uint32_t ctrl;
2589 boolean_t txb2b = 1;
2590 e1000_get_speed_and_duplex(&adapter->hw,
2591 &adapter->link_speed,
2592 &adapter->link_duplex);
2593
2594 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2595 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2596 "Flow Control: %s\n",
2597 adapter->link_speed,
2598 adapter->link_duplex == FULL_DUPLEX ?
2599 "Full Duplex" : "Half Duplex",
2600 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2601 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2602 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2603 E1000_CTRL_TFCE) ? "TX" : "None" )));
2604
2605 /* tweak tx_queue_len according to speed/duplex
2606 * and adjust the timeout factor */
2607 netdev->tx_queue_len = adapter->tx_queue_len;
2608 adapter->tx_timeout_factor = 1;
2609 switch (adapter->link_speed) {
2610 case SPEED_10:
2611 txb2b = 0;
2612 netdev->tx_queue_len = 10;
2613 adapter->tx_timeout_factor = 8;
2614 break;
2615 case SPEED_100:
2616 txb2b = 0;
2617 netdev->tx_queue_len = 100;
2618 /* maybe add some timeout factor ? */
2619 break;
2620 }
2621
2622 if ((adapter->hw.mac_type == e1000_82571 ||
2623 adapter->hw.mac_type == e1000_82572) &&
2624 txb2b == 0) {
2625 uint32_t tarc0;
2626 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2627 tarc0 &= ~(1 << 21);
2628 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2629 }
2630
2631 /* disable TSO for pcie and 10/100 speeds, to avoid
2632 * some hardware issues */
2633 if (!adapter->tso_force &&
2634 adapter->hw.bus_type == e1000_bus_type_pci_express){
2635 switch (adapter->link_speed) {
2636 case SPEED_10:
2637 case SPEED_100:
2638 DPRINTK(PROBE,INFO,
2639 "10/100 speed: disabling TSO\n");
2640 netdev->features &= ~NETIF_F_TSO;
2641 netdev->features &= ~NETIF_F_TSO6;
2642 break;
2643 case SPEED_1000:
2644 netdev->features |= NETIF_F_TSO;
2645 netdev->features |= NETIF_F_TSO6;
2646 break;
2647 default:
2648 /* oops */
2649 break;
2650 }
2651 }
2652
2653 /* enable transmits in the hardware, need to do this
2654 * after setting TARC0 */
2655 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2656 tctl |= E1000_TCTL_EN;
2657 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2658
2659 netif_carrier_on(netdev);
2660 netif_wake_queue(netdev);
2661 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2662 adapter->smartspeed = 0;
2663 } else {
2664 /* make sure the receive unit is started */
2665 if (adapter->hw.rx_needs_kicking) {
2666 struct e1000_hw *hw = &adapter->hw;
2667 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2668 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2669 }
2670 }
2671 } else {
2672 if (netif_carrier_ok(netdev)) {
2673 adapter->link_speed = 0;
2674 adapter->link_duplex = 0;
2675 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2676 netif_carrier_off(netdev);
2677 netif_stop_queue(netdev);
2678 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2679
2680 /* 80003ES2LAN workaround--
2681 * For packet buffer work-around on link down event;
2682 * disable receives in the ISR and
2683 * reset device here in the watchdog
2684 */
2685 if (adapter->hw.mac_type == e1000_80003es2lan)
2686 /* reset device */
2687 schedule_work(&adapter->reset_task);
2688 }
2689
2690 e1000_smartspeed(adapter);
2691 }
2692
2693 e1000_update_stats(adapter);
2694
2695 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2696 adapter->tpt_old = adapter->stats.tpt;
2697 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2698 adapter->colc_old = adapter->stats.colc;
2699
2700 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2701 adapter->gorcl_old = adapter->stats.gorcl;
2702 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2703 adapter->gotcl_old = adapter->stats.gotcl;
2704
2705 e1000_update_adaptive(&adapter->hw);
2706
2707 if (!netif_carrier_ok(netdev)) {
2708 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2709 /* We've lost link, so the controller stops DMA,
2710 * but we've got queued Tx work that's never going
2711 * to get done, so reset controller to flush Tx.
2712 * (Do the reset outside of interrupt context). */
2713 adapter->tx_timeout_count++;
2714 schedule_work(&adapter->reset_task);
2715 }
2716 }
2717
2718 /* Cause software interrupt to ensure rx ring is cleaned */
2719 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2720
2721 /* Force detection of hung controller every watchdog period */
2722 adapter->detect_tx_hung = TRUE;
2723
2724 /* With 82571 controllers, LAA may be overwritten due to controller
2725 * reset from the other port. Set the appropriate LAA in RAR[0] */
2726 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2727 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2728
2729 /* Reset the timer */
2730 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2731 }
2732
2733 enum latency_range {
2734 lowest_latency = 0,
2735 low_latency = 1,
2736 bulk_latency = 2,
2737 latency_invalid = 255
2738 };
2739
2740 /**
2741 * e1000_update_itr - update the dynamic ITR value based on statistics
2742 * Stores a new ITR value based on packets and byte
2743 * counts during the last interrupt. The advantage of per interrupt
2744 * computation is faster updates and more accurate ITR for the current
2745 * traffic pattern. Constants in this function were computed
2746 * based on theoretical maximum wire speed and thresholds were set based
2747 * on testing data as well as attempting to minimize response time
2748 * while increasing bulk throughput.
2749 * this functionality is controlled by the InterruptThrottleRate module
2750 * parameter (see e1000_param.c)
2751 * @adapter: pointer to adapter
2752 * @itr_setting: current adapter->itr
2753 * @packets: the number of packets during this measurement interval
2754 * @bytes: the number of bytes during this measurement interval
2755 **/
2756 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2757 uint16_t itr_setting,
2758 int packets,
2759 int bytes)
2760 {
2761 unsigned int retval = itr_setting;
2762 struct e1000_hw *hw = &adapter->hw;
2763
2764 if (unlikely(hw->mac_type < e1000_82540))
2765 goto update_itr_done;
2766
2767 if (packets == 0)
2768 goto update_itr_done;
2769
2770 switch (itr_setting) {
2771 case lowest_latency:
2772 /* jumbo frames get bulk treatment*/
2773 if (bytes/packets > 8000)
2774 retval = bulk_latency;
2775 else if ((packets < 5) && (bytes > 512))
2776 retval = low_latency;
2777 break;
2778 case low_latency: /* 50 usec aka 20000 ints/s */
2779 if (bytes > 10000) {
2780 /* jumbo frames need bulk latency setting */
2781 if (bytes/packets > 8000)
2782 retval = bulk_latency;
2783 else if ((packets < 10) || ((bytes/packets) > 1200))
2784 retval = bulk_latency;
2785 else if ((packets > 35))
2786 retval = lowest_latency;
2787 } else if (bytes/packets > 2000)
2788 retval = bulk_latency;
2789 else if (packets <= 2 && bytes < 512)
2790 retval = lowest_latency;
2791 break;
2792 case bulk_latency: /* 250 usec aka 4000 ints/s */
2793 if (bytes > 25000) {
2794 if (packets > 35)
2795 retval = low_latency;
2796 } else if (bytes < 6000) {
2797 retval = low_latency;
2798 }
2799 break;
2800 }
2801
2802 update_itr_done:
2803 return retval;
2804 }
2805
2806 static void e1000_set_itr(struct e1000_adapter *adapter)
2807 {
2808 struct e1000_hw *hw = &adapter->hw;
2809 uint16_t current_itr;
2810 uint32_t new_itr = adapter->itr;
2811
2812 if (unlikely(hw->mac_type < e1000_82540))
2813 return;
2814
2815 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2816 if (unlikely(adapter->link_speed != SPEED_1000)) {
2817 current_itr = 0;
2818 new_itr = 4000;
2819 goto set_itr_now;
2820 }
2821
2822 adapter->tx_itr = e1000_update_itr(adapter,
2823 adapter->tx_itr,
2824 adapter->total_tx_packets,
2825 adapter->total_tx_bytes);
2826 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2827 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2828 adapter->tx_itr = low_latency;
2829
2830 adapter->rx_itr = e1000_update_itr(adapter,
2831 adapter->rx_itr,
2832 adapter->total_rx_packets,
2833 adapter->total_rx_bytes);
2834 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2835 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2836 adapter->rx_itr = low_latency;
2837
2838 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2839
2840 switch (current_itr) {
2841 /* counts and packets in update_itr are dependent on these numbers */
2842 case lowest_latency:
2843 new_itr = 70000;
2844 break;
2845 case low_latency:
2846 new_itr = 20000; /* aka hwitr = ~200 */
2847 break;
2848 case bulk_latency:
2849 new_itr = 4000;
2850 break;
2851 default:
2852 break;
2853 }
2854
2855 set_itr_now:
2856 if (new_itr != adapter->itr) {
2857 /* this attempts to bias the interrupt rate towards Bulk
2858 * by adding intermediate steps when interrupt rate is
2859 * increasing */
2860 new_itr = new_itr > adapter->itr ?
2861 min(adapter->itr + (new_itr >> 2), new_itr) :
2862 new_itr;
2863 adapter->itr = new_itr;
2864 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2865 }
2866
2867 return;
2868 }
2869
2870 #define E1000_TX_FLAGS_CSUM 0x00000001
2871 #define E1000_TX_FLAGS_VLAN 0x00000002
2872 #define E1000_TX_FLAGS_TSO 0x00000004
2873 #define E1000_TX_FLAGS_IPV4 0x00000008
2874 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2875 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2876
2877 static int
2878 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2879 struct sk_buff *skb)
2880 {
2881 struct e1000_context_desc *context_desc;
2882 struct e1000_buffer *buffer_info;
2883 unsigned int i;
2884 uint32_t cmd_length = 0;
2885 uint16_t ipcse = 0, tucse, mss;
2886 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2887 int err;
2888
2889 if (skb_is_gso(skb)) {
2890 if (skb_header_cloned(skb)) {
2891 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2892 if (err)
2893 return err;
2894 }
2895
2896 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2897 mss = skb_shinfo(skb)->gso_size;
2898 if (skb->protocol == htons(ETH_P_IP)) {
2899 struct iphdr *iph = ip_hdr(skb);
2900 iph->tot_len = 0;
2901 iph->check = 0;
2902 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2903 iph->daddr, 0,
2904 IPPROTO_TCP,
2905 0);
2906 cmd_length = E1000_TXD_CMD_IP;
2907 ipcse = skb_transport_offset(skb) - 1;
2908 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2909 ipv6_hdr(skb)->payload_len = 0;
2910 tcp_hdr(skb)->check =
2911 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2912 &ipv6_hdr(skb)->daddr,
2913 0, IPPROTO_TCP, 0);
2914 ipcse = 0;
2915 }
2916 ipcss = skb_network_offset(skb);
2917 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2918 tucss = skb_transport_offset(skb);
2919 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2920 tucse = 0;
2921
2922 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2923 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2924
2925 i = tx_ring->next_to_use;
2926 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2927 buffer_info = &tx_ring->buffer_info[i];
2928
2929 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2930 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2931 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2932 context_desc->upper_setup.tcp_fields.tucss = tucss;
2933 context_desc->upper_setup.tcp_fields.tucso = tucso;
2934 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2935 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2936 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2937 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2938
2939 buffer_info->time_stamp = jiffies;
2940 buffer_info->next_to_watch = i;
2941
2942 if (++i == tx_ring->count) i = 0;
2943 tx_ring->next_to_use = i;
2944
2945 return TRUE;
2946 }
2947 return FALSE;
2948 }
2949
2950 static boolean_t
2951 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2952 struct sk_buff *skb)
2953 {
2954 struct e1000_context_desc *context_desc;
2955 struct e1000_buffer *buffer_info;
2956 unsigned int i;
2957 uint8_t css;
2958
2959 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2960 css = skb_transport_offset(skb);
2961
2962 i = tx_ring->next_to_use;
2963 buffer_info = &tx_ring->buffer_info[i];
2964 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2965
2966 context_desc->lower_setup.ip_config = 0;
2967 context_desc->upper_setup.tcp_fields.tucss = css;
2968 context_desc->upper_setup.tcp_fields.tucso =
2969 css + skb->csum_offset;
2970 context_desc->upper_setup.tcp_fields.tucse = 0;
2971 context_desc->tcp_seg_setup.data = 0;
2972 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2973
2974 buffer_info->time_stamp = jiffies;
2975 buffer_info->next_to_watch = i;
2976
2977 if (unlikely(++i == tx_ring->count)) i = 0;
2978 tx_ring->next_to_use = i;
2979
2980 return TRUE;
2981 }
2982
2983 return FALSE;
2984 }
2985
2986 #define E1000_MAX_TXD_PWR 12
2987 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2988
2989 static int
2990 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2991 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2992 unsigned int nr_frags, unsigned int mss)
2993 {
2994 struct e1000_buffer *buffer_info;
2995 unsigned int len = skb->len;
2996 unsigned int offset = 0, size, count = 0, i;
2997 unsigned int f;
2998 len -= skb->data_len;
2999
3000 i = tx_ring->next_to_use;
3001
3002 while (len) {
3003 buffer_info = &tx_ring->buffer_info[i];
3004 size = min(len, max_per_txd);
3005 /* Workaround for Controller erratum --
3006 * descriptor for non-tso packet in a linear SKB that follows a
3007 * tso gets written back prematurely before the data is fully
3008 * DMA'd to the controller */
3009 if (!skb->data_len && tx_ring->last_tx_tso &&
3010 !skb_is_gso(skb)) {
3011 tx_ring->last_tx_tso = 0;
3012 size -= 4;
3013 }
3014
3015 /* Workaround for premature desc write-backs
3016 * in TSO mode. Append 4-byte sentinel desc */
3017 if (unlikely(mss && !nr_frags && size == len && size > 8))
3018 size -= 4;
3019 /* work-around for errata 10 and it applies
3020 * to all controllers in PCI-X mode
3021 * The fix is to make sure that the first descriptor of a
3022 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3023 */
3024 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3025 (size > 2015) && count == 0))
3026 size = 2015;
3027
3028 /* Workaround for potential 82544 hang in PCI-X. Avoid
3029 * terminating buffers within evenly-aligned dwords. */
3030 if (unlikely(adapter->pcix_82544 &&
3031 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3032 size > 4))
3033 size -= 4;
3034
3035 buffer_info->length = size;
3036 buffer_info->dma =
3037 pci_map_single(adapter->pdev,
3038 skb->data + offset,
3039 size,
3040 PCI_DMA_TODEVICE);
3041 buffer_info->time_stamp = jiffies;
3042 buffer_info->next_to_watch = i;
3043
3044 len -= size;
3045 offset += size;
3046 count++;
3047 if (unlikely(++i == tx_ring->count)) i = 0;
3048 }
3049
3050 for (f = 0; f < nr_frags; f++) {
3051 struct skb_frag_struct *frag;
3052
3053 frag = &skb_shinfo(skb)->frags[f];
3054 len = frag->size;
3055 offset = frag->page_offset;
3056
3057 while (len) {
3058 buffer_info = &tx_ring->buffer_info[i];
3059 size = min(len, max_per_txd);
3060 /* Workaround for premature desc write-backs
3061 * in TSO mode. Append 4-byte sentinel desc */
3062 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3063 size -= 4;
3064 /* Workaround for potential 82544 hang in PCI-X.
3065 * Avoid terminating buffers within evenly-aligned
3066 * dwords. */
3067 if (unlikely(adapter->pcix_82544 &&
3068 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3069 size > 4))
3070 size -= 4;
3071
3072 buffer_info->length = size;
3073 buffer_info->dma =
3074 pci_map_page(adapter->pdev,
3075 frag->page,
3076 offset,
3077 size,
3078 PCI_DMA_TODEVICE);
3079 buffer_info->time_stamp = jiffies;
3080 buffer_info->next_to_watch = i;
3081
3082 len -= size;
3083 offset += size;
3084 count++;
3085 if (unlikely(++i == tx_ring->count)) i = 0;
3086 }
3087 }
3088
3089 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3090 tx_ring->buffer_info[i].skb = skb;
3091 tx_ring->buffer_info[first].next_to_watch = i;
3092
3093 return count;
3094 }
3095
3096 static void
3097 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3098 int tx_flags, int count)
3099 {
3100 struct e1000_tx_desc *tx_desc = NULL;
3101 struct e1000_buffer *buffer_info;
3102 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3103 unsigned int i;
3104
3105 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3106 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3107 E1000_TXD_CMD_TSE;
3108 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3109
3110 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3111 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3112 }
3113
3114 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3115 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3116 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3117 }
3118
3119 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3120 txd_lower |= E1000_TXD_CMD_VLE;
3121 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3122 }
3123
3124 i = tx_ring->next_to_use;
3125
3126 while (count--) {
3127 buffer_info = &tx_ring->buffer_info[i];
3128 tx_desc = E1000_TX_DESC(*tx_ring, i);
3129 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3130 tx_desc->lower.data =
3131 cpu_to_le32(txd_lower | buffer_info->length);
3132 tx_desc->upper.data = cpu_to_le32(txd_upper);
3133 if (unlikely(++i == tx_ring->count)) i = 0;
3134 }
3135
3136 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3137
3138 /* Force memory writes to complete before letting h/w
3139 * know there are new descriptors to fetch. (Only
3140 * applicable for weak-ordered memory model archs,
3141 * such as IA-64). */
3142 wmb();
3143
3144 tx_ring->next_to_use = i;
3145 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3146 /* we need this if more than one processor can write to our tail
3147 * at a time, it syncronizes IO on IA64/Altix systems */
3148 mmiowb();
3149 }
3150
3151 /**
3152 * 82547 workaround to avoid controller hang in half-duplex environment.
3153 * The workaround is to avoid queuing a large packet that would span
3154 * the internal Tx FIFO ring boundary by notifying the stack to resend
3155 * the packet at a later time. This gives the Tx FIFO an opportunity to
3156 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3157 * to the beginning of the Tx FIFO.
3158 **/
3159
3160 #define E1000_FIFO_HDR 0x10
3161 #define E1000_82547_PAD_LEN 0x3E0
3162
3163 static int
3164 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3165 {
3166 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3167 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3168
3169 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3170
3171 if (adapter->link_duplex != HALF_DUPLEX)
3172 goto no_fifo_stall_required;
3173
3174 if (atomic_read(&adapter->tx_fifo_stall))
3175 return 1;
3176
3177 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3178 atomic_set(&adapter->tx_fifo_stall, 1);
3179 return 1;
3180 }
3181
3182 no_fifo_stall_required:
3183 adapter->tx_fifo_head += skb_fifo_len;
3184 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3185 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3186 return 0;
3187 }
3188
3189 #define MINIMUM_DHCP_PACKET_SIZE 282
3190 static int
3191 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3192 {
3193 struct e1000_hw *hw = &adapter->hw;
3194 uint16_t length, offset;
3195 if (vlan_tx_tag_present(skb)) {
3196 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3197 ( adapter->hw.mng_cookie.status &
3198 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3199 return 0;
3200 }
3201 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3202 struct ethhdr *eth = (struct ethhdr *) skb->data;
3203 if ((htons(ETH_P_IP) == eth->h_proto)) {
3204 const struct iphdr *ip =
3205 (struct iphdr *)((uint8_t *)skb->data+14);
3206 if (IPPROTO_UDP == ip->protocol) {
3207 struct udphdr *udp =
3208 (struct udphdr *)((uint8_t *)ip +
3209 (ip->ihl << 2));
3210 if (ntohs(udp->dest) == 67) {
3211 offset = (uint8_t *)udp + 8 - skb->data;
3212 length = skb->len - offset;
3213
3214 return e1000_mng_write_dhcp_info(hw,
3215 (uint8_t *)udp + 8,
3216 length);
3217 }
3218 }
3219 }
3220 }
3221 return 0;
3222 }
3223
3224 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3225 {
3226 struct e1000_adapter *adapter = netdev_priv(netdev);
3227 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3228
3229 netif_stop_queue(netdev);
3230 /* Herbert's original patch had:
3231 * smp_mb__after_netif_stop_queue();
3232 * but since that doesn't exist yet, just open code it. */
3233 smp_mb();
3234
3235 /* We need to check again in a case another CPU has just
3236 * made room available. */
3237 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3238 return -EBUSY;
3239
3240 /* A reprieve! */
3241 netif_start_queue(netdev);
3242 ++adapter->restart_queue;
3243 return 0;
3244 }
3245
3246 static int e1000_maybe_stop_tx(struct net_device *netdev,
3247 struct e1000_tx_ring *tx_ring, int size)
3248 {
3249 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3250 return 0;
3251 return __e1000_maybe_stop_tx(netdev, size);
3252 }
3253
3254 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3255 static int
3256 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3257 {
3258 struct e1000_adapter *adapter = netdev_priv(netdev);
3259 struct e1000_tx_ring *tx_ring;
3260 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3261 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3262 unsigned int tx_flags = 0;
3263 unsigned int len = skb->len;
3264 unsigned long flags;
3265 unsigned int nr_frags = 0;
3266 unsigned int mss = 0;
3267 int count = 0;
3268 int tso;
3269 unsigned int f;
3270 len -= skb->data_len;
3271
3272 /* This goes back to the question of how to logically map a tx queue
3273 * to a flow. Right now, performance is impacted slightly negatively
3274 * if using multiple tx queues. If the stack breaks away from a
3275 * single qdisc implementation, we can look at this again. */
3276 tx_ring = adapter->tx_ring;
3277
3278 if (unlikely(skb->len <= 0)) {
3279 dev_kfree_skb_any(skb);
3280 return NETDEV_TX_OK;
3281 }
3282
3283 /* 82571 and newer doesn't need the workaround that limited descriptor
3284 * length to 4kB */
3285 if (adapter->hw.mac_type >= e1000_82571)
3286 max_per_txd = 8192;
3287
3288 mss = skb_shinfo(skb)->gso_size;
3289 /* The controller does a simple calculation to
3290 * make sure there is enough room in the FIFO before
3291 * initiating the DMA for each buffer. The calc is:
3292 * 4 = ceil(buffer len/mss). To make sure we don't
3293 * overrun the FIFO, adjust the max buffer len if mss
3294 * drops. */
3295 if (mss) {
3296 uint8_t hdr_len;
3297 max_per_txd = min(mss << 2, max_per_txd);
3298 max_txd_pwr = fls(max_per_txd) - 1;
3299
3300 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3301 * points to just header, pull a few bytes of payload from
3302 * frags into skb->data */
3303 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3304 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3305 switch (adapter->hw.mac_type) {
3306 unsigned int pull_size;
3307 case e1000_82544:
3308 /* Make sure we have room to chop off 4 bytes,
3309 * and that the end alignment will work out to
3310 * this hardware's requirements
3311 * NOTE: this is a TSO only workaround
3312 * if end byte alignment not correct move us
3313 * into the next dword */
3314 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3315 break;
3316 /* fall through */
3317 case e1000_82571:
3318 case e1000_82572:
3319 case e1000_82573:
3320 case e1000_ich8lan:
3321 pull_size = min((unsigned int)4, skb->data_len);
3322 if (!__pskb_pull_tail(skb, pull_size)) {
3323 DPRINTK(DRV, ERR,
3324 "__pskb_pull_tail failed.\n");
3325 dev_kfree_skb_any(skb);
3326 return NETDEV_TX_OK;
3327 }
3328 len = skb->len - skb->data_len;
3329 break;
3330 default:
3331 /* do nothing */
3332 break;
3333 }
3334 }
3335 }
3336
3337 /* reserve a descriptor for the offload context */
3338 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3339 count++;
3340 count++;
3341
3342 /* Controller Erratum workaround */
3343 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3344 count++;
3345
3346 count += TXD_USE_COUNT(len, max_txd_pwr);
3347
3348 if (adapter->pcix_82544)
3349 count++;
3350
3351 /* work-around for errata 10 and it applies to all controllers
3352 * in PCI-X mode, so add one more descriptor to the count
3353 */
3354 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3355 (len > 2015)))
3356 count++;
3357
3358 nr_frags = skb_shinfo(skb)->nr_frags;
3359 for (f = 0; f < nr_frags; f++)
3360 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3361 max_txd_pwr);
3362 if (adapter->pcix_82544)
3363 count += nr_frags;
3364
3365
3366 if (adapter->hw.tx_pkt_filtering &&
3367 (adapter->hw.mac_type == e1000_82573))
3368 e1000_transfer_dhcp_info(adapter, skb);
3369
3370 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3371 /* Collision - tell upper layer to requeue */
3372 return NETDEV_TX_LOCKED;
3373
3374 /* need: count + 2 desc gap to keep tail from touching
3375 * head, otherwise try next time */
3376 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3377 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3378 return NETDEV_TX_BUSY;
3379 }
3380
3381 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3382 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3383 netif_stop_queue(netdev);
3384 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3385 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3386 return NETDEV_TX_BUSY;
3387 }
3388 }
3389
3390 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3391 tx_flags |= E1000_TX_FLAGS_VLAN;
3392 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3393 }
3394
3395 first = tx_ring->next_to_use;
3396
3397 tso = e1000_tso(adapter, tx_ring, skb);
3398 if (tso < 0) {
3399 dev_kfree_skb_any(skb);
3400 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3401 return NETDEV_TX_OK;
3402 }
3403
3404 if (likely(tso)) {
3405 tx_ring->last_tx_tso = 1;
3406 tx_flags |= E1000_TX_FLAGS_TSO;
3407 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3408 tx_flags |= E1000_TX_FLAGS_CSUM;
3409
3410 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3411 * 82571 hardware supports TSO capabilities for IPv6 as well...
3412 * no longer assume, we must. */
3413 if (likely(skb->protocol == htons(ETH_P_IP)))
3414 tx_flags |= E1000_TX_FLAGS_IPV4;
3415
3416 e1000_tx_queue(adapter, tx_ring, tx_flags,
3417 e1000_tx_map(adapter, tx_ring, skb, first,
3418 max_per_txd, nr_frags, mss));
3419
3420 netdev->trans_start = jiffies;
3421
3422 /* Make sure there is space in the ring for the next send. */
3423 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3424
3425 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3426 return NETDEV_TX_OK;
3427 }
3428
3429 /**
3430 * e1000_tx_timeout - Respond to a Tx Hang
3431 * @netdev: network interface device structure
3432 **/
3433
3434 static void
3435 e1000_tx_timeout(struct net_device *netdev)
3436 {
3437 struct e1000_adapter *adapter = netdev_priv(netdev);
3438
3439 /* Do the reset outside of interrupt context */
3440 adapter->tx_timeout_count++;
3441 schedule_work(&adapter->reset_task);
3442 }
3443
3444 static void
3445 e1000_reset_task(struct work_struct *work)
3446 {
3447 struct e1000_adapter *adapter =
3448 container_of(work, struct e1000_adapter, reset_task);
3449
3450 e1000_reinit_locked(adapter);
3451 }
3452
3453 /**
3454 * e1000_get_stats - Get System Network Statistics
3455 * @netdev: network interface device structure
3456 *
3457 * Returns the address of the device statistics structure.
3458 * The statistics are actually updated from the timer callback.
3459 **/
3460
3461 static struct net_device_stats *
3462 e1000_get_stats(struct net_device *netdev)
3463 {
3464 struct e1000_adapter *adapter = netdev_priv(netdev);
3465
3466 /* only return the current stats */
3467 return &adapter->net_stats;
3468 }
3469
3470 /**
3471 * e1000_change_mtu - Change the Maximum Transfer Unit
3472 * @netdev: network interface device structure
3473 * @new_mtu: new value for maximum frame size
3474 *
3475 * Returns 0 on success, negative on failure
3476 **/
3477
3478 static int
3479 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3480 {
3481 struct e1000_adapter *adapter = netdev_priv(netdev);
3482 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3483 uint16_t eeprom_data = 0;
3484
3485 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3486 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3487 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3488 return -EINVAL;
3489 }
3490
3491 /* Adapter-specific max frame size limits. */
3492 switch (adapter->hw.mac_type) {
3493 case e1000_undefined ... e1000_82542_rev2_1:
3494 case e1000_ich8lan:
3495 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3496 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3497 return -EINVAL;
3498 }
3499 break;
3500 case e1000_82573:
3501 /* Jumbo Frames not supported if:
3502 * - this is not an 82573L device
3503 * - ASPM is enabled in any way (0x1A bits 3:2) */
3504 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3505 &eeprom_data);
3506 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3507 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3508 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3509 DPRINTK(PROBE, ERR,
3510 "Jumbo Frames not supported.\n");
3511 return -EINVAL;
3512 }
3513 break;
3514 }
3515 /* ERT will be enabled later to enable wire speed receives */
3516
3517 /* fall through to get support */
3518 case e1000_82571:
3519 case e1000_82572:
3520 case e1000_80003es2lan:
3521 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3522 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3523 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3524 return -EINVAL;
3525 }
3526 break;
3527 default:
3528 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3529 break;
3530 }
3531
3532 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3533 * means we reserve 2 more, this pushes us to allocate from the next
3534 * larger slab size
3535 * i.e. RXBUFFER_2048 --> size-4096 slab */
3536
3537 if (max_frame <= E1000_RXBUFFER_256)
3538 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3539 else if (max_frame <= E1000_RXBUFFER_512)
3540 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3541 else if (max_frame <= E1000_RXBUFFER_1024)
3542 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3543 else if (max_frame <= E1000_RXBUFFER_2048)
3544 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3545 else if (max_frame <= E1000_RXBUFFER_4096)
3546 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3547 else if (max_frame <= E1000_RXBUFFER_8192)
3548 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3549 else if (max_frame <= E1000_RXBUFFER_16384)
3550 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3551
3552 /* adjust allocation if LPE protects us, and we aren't using SBP */
3553 if (!adapter->hw.tbi_compatibility_on &&
3554 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3555 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3556 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3557
3558 netdev->mtu = new_mtu;
3559 adapter->hw.max_frame_size = max_frame;
3560
3561 if (netif_running(netdev))
3562 e1000_reinit_locked(adapter);
3563
3564 return 0;
3565 }
3566
3567 /**
3568 * e1000_update_stats - Update the board statistics counters
3569 * @adapter: board private structure
3570 **/
3571
3572 void
3573 e1000_update_stats(struct e1000_adapter *adapter)
3574 {
3575 struct e1000_hw *hw = &adapter->hw;
3576 struct pci_dev *pdev = adapter->pdev;
3577 unsigned long flags;
3578 uint16_t phy_tmp;
3579
3580 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3581
3582 /*
3583 * Prevent stats update while adapter is being reset, or if the pci
3584 * connection is down.
3585 */
3586 if (adapter->link_speed == 0)
3587 return;
3588 if (pci_channel_offline(pdev))
3589 return;
3590
3591 spin_lock_irqsave(&adapter->stats_lock, flags);
3592
3593 /* these counters are modified from e1000_adjust_tbi_stats,
3594 * called from the interrupt context, so they must only
3595 * be written while holding adapter->stats_lock
3596 */
3597
3598 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3599 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3600 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3601 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3602 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3603 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3604 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3605
3606 if (adapter->hw.mac_type != e1000_ich8lan) {
3607 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3608 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3609 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3610 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3611 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3612 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3613 }
3614
3615 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3616 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3617 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3618 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3619 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3620 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3621 adapter->stats.dc += E1000_READ_REG(hw, DC);
3622 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3623 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3624 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3625 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3626 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3627 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3628 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3629 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3630 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3631 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3632 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3633 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3634 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3635 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3636 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3637 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3638 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3639 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3640 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3641
3642 if (adapter->hw.mac_type != e1000_ich8lan) {
3643 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3644 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3645 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3646 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3647 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3648 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3649 }
3650
3651 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3652 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3653
3654 /* used for adaptive IFS */
3655
3656 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3657 adapter->stats.tpt += hw->tx_packet_delta;
3658 hw->collision_delta = E1000_READ_REG(hw, COLC);
3659 adapter->stats.colc += hw->collision_delta;
3660
3661 if (hw->mac_type >= e1000_82543) {
3662 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3663 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3664 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3665 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3666 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3667 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3668 }
3669 if (hw->mac_type > e1000_82547_rev_2) {
3670 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3671 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3672
3673 if (adapter->hw.mac_type != e1000_ich8lan) {
3674 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3675 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3676 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3677 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3678 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3679 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3680 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3681 }
3682 }
3683
3684 /* Fill out the OS statistics structure */
3685 adapter->net_stats.rx_packets = adapter->stats.gprc;
3686 adapter->net_stats.tx_packets = adapter->stats.gptc;
3687 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3688 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3689 adapter->net_stats.multicast = adapter->stats.mprc;
3690 adapter->net_stats.collisions = adapter->stats.colc;
3691
3692 /* Rx Errors */
3693
3694 /* RLEC on some newer hardware can be incorrect so build
3695 * our own version based on RUC and ROC */
3696 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3697 adapter->stats.crcerrs + adapter->stats.algnerrc +
3698 adapter->stats.ruc + adapter->stats.roc +
3699 adapter->stats.cexterr;
3700 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3701 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3702 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3703 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3704 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3705
3706 /* Tx Errors */
3707 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3708 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3709 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3710 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3711 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3712 if (adapter->hw.bad_tx_carr_stats_fd &&
3713 adapter->link_duplex == FULL_DUPLEX) {
3714 adapter->net_stats.tx_carrier_errors = 0;
3715 adapter->stats.tncrs = 0;
3716 }
3717
3718 /* Tx Dropped needs to be maintained elsewhere */
3719
3720 /* Phy Stats */
3721 if (hw->media_type == e1000_media_type_copper) {
3722 if ((adapter->link_speed == SPEED_1000) &&
3723 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3724 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3725 adapter->phy_stats.idle_errors += phy_tmp;
3726 }
3727
3728 if ((hw->mac_type <= e1000_82546) &&
3729 (hw->phy_type == e1000_phy_m88) &&
3730 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3731 adapter->phy_stats.receive_errors += phy_tmp;
3732 }
3733
3734 /* Management Stats */
3735 if (adapter->hw.has_smbus) {
3736 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3737 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3738 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3739 }
3740
3741 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3742 }
3743
3744 /**
3745 * e1000_intr_msi - Interrupt Handler
3746 * @irq: interrupt number
3747 * @data: pointer to a network interface device structure
3748 **/
3749
3750 static irqreturn_t
3751 e1000_intr_msi(int irq, void *data)
3752 {
3753 struct net_device *netdev = data;
3754 struct e1000_adapter *adapter = netdev_priv(netdev);
3755 struct e1000_hw *hw = &adapter->hw;
3756 #ifndef CONFIG_E1000_NAPI
3757 int i;
3758 #endif
3759 uint32_t icr = E1000_READ_REG(hw, ICR);
3760
3761 #ifdef CONFIG_E1000_NAPI
3762 /* read ICR disables interrupts using IAM, so keep up with our
3763 * enable/disable accounting */
3764 atomic_inc(&adapter->irq_sem);
3765 #endif
3766 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3767 hw->get_link_status = 1;
3768 /* 80003ES2LAN workaround-- For packet buffer work-around on
3769 * link down event; disable receives here in the ISR and reset
3770 * adapter in watchdog */
3771 if (netif_carrier_ok(netdev) &&
3772 (adapter->hw.mac_type == e1000_80003es2lan)) {
3773 /* disable receives */
3774 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3775 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3776 }
3777 /* guard against interrupt when we're going down */
3778 if (!test_bit(__E1000_DOWN, &adapter->flags))
3779 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3780 }
3781
3782 #ifdef CONFIG_E1000_NAPI
3783 if (likely(netif_rx_schedule_prep(netdev))) {
3784 adapter->total_tx_bytes = 0;
3785 adapter->total_tx_packets = 0;
3786 adapter->total_rx_bytes = 0;
3787 adapter->total_rx_packets = 0;
3788 __netif_rx_schedule(netdev);
3789 } else
3790 e1000_irq_enable(adapter);
3791 #else
3792 adapter->total_tx_bytes = 0;
3793 adapter->total_rx_bytes = 0;
3794 adapter->total_tx_packets = 0;
3795 adapter->total_rx_packets = 0;
3796
3797 for (i = 0; i < E1000_MAX_INTR; i++)
3798 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3799 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3800 break;
3801
3802 if (likely(adapter->itr_setting & 3))
3803 e1000_set_itr(adapter);
3804 #endif
3805
3806 return IRQ_HANDLED;
3807 }
3808
3809 /**
3810 * e1000_intr - Interrupt Handler
3811 * @irq: interrupt number
3812 * @data: pointer to a network interface device structure
3813 **/
3814
3815 static irqreturn_t
3816 e1000_intr(int irq, void *data)
3817 {
3818 struct net_device *netdev = data;
3819 struct e1000_adapter *adapter = netdev_priv(netdev);
3820 struct e1000_hw *hw = &adapter->hw;
3821 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3822 #ifndef CONFIG_E1000_NAPI
3823 int i;
3824 #endif
3825 if (unlikely(!icr))
3826 return IRQ_NONE; /* Not our interrupt */
3827
3828 #ifdef CONFIG_E1000_NAPI
3829 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3830 * not set, then the adapter didn't send an interrupt */
3831 if (unlikely(hw->mac_type >= e1000_82571 &&
3832 !(icr & E1000_ICR_INT_ASSERTED)))
3833 return IRQ_NONE;
3834
3835 /* Interrupt Auto-Mask...upon reading ICR,
3836 * interrupts are masked. No need for the
3837 * IMC write, but it does mean we should
3838 * account for it ASAP. */
3839 if (likely(hw->mac_type >= e1000_82571))
3840 atomic_inc(&adapter->irq_sem);
3841 #endif
3842
3843 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3844 hw->get_link_status = 1;
3845 /* 80003ES2LAN workaround--
3846 * For packet buffer work-around on link down event;
3847 * disable receives here in the ISR and
3848 * reset adapter in watchdog
3849 */
3850 if (netif_carrier_ok(netdev) &&
3851 (adapter->hw.mac_type == e1000_80003es2lan)) {
3852 /* disable receives */
3853 rctl = E1000_READ_REG(hw, RCTL);
3854 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3855 }
3856 /* guard against interrupt when we're going down */
3857 if (!test_bit(__E1000_DOWN, &adapter->flags))
3858 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3859 }
3860
3861 #ifdef CONFIG_E1000_NAPI
3862 if (unlikely(hw->mac_type < e1000_82571)) {
3863 /* disable interrupts, without the synchronize_irq bit */
3864 atomic_inc(&adapter->irq_sem);
3865 E1000_WRITE_REG(hw, IMC, ~0);
3866 E1000_WRITE_FLUSH(hw);
3867 }
3868 if (likely(netif_rx_schedule_prep(netdev))) {
3869 adapter->total_tx_bytes = 0;
3870 adapter->total_tx_packets = 0;
3871 adapter->total_rx_bytes = 0;
3872 adapter->total_rx_packets = 0;
3873 __netif_rx_schedule(netdev);
3874 } else
3875 /* this really should not happen! if it does it is basically a
3876 * bug, but not a hard error, so enable ints and continue */
3877 e1000_irq_enable(adapter);
3878 #else
3879 /* Writing IMC and IMS is needed for 82547.
3880 * Due to Hub Link bus being occupied, an interrupt
3881 * de-assertion message is not able to be sent.
3882 * When an interrupt assertion message is generated later,
3883 * two messages are re-ordered and sent out.
3884 * That causes APIC to think 82547 is in de-assertion
3885 * state, while 82547 is in assertion state, resulting
3886 * in dead lock. Writing IMC forces 82547 into
3887 * de-assertion state.
3888 */
3889 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3890 atomic_inc(&adapter->irq_sem);
3891 E1000_WRITE_REG(hw, IMC, ~0);
3892 }
3893
3894 adapter->total_tx_bytes = 0;
3895 adapter->total_rx_bytes = 0;
3896 adapter->total_tx_packets = 0;
3897 adapter->total_rx_packets = 0;
3898
3899 for (i = 0; i < E1000_MAX_INTR; i++)
3900 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3901 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3902 break;
3903
3904 if (likely(adapter->itr_setting & 3))
3905 e1000_set_itr(adapter);
3906
3907 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3908 e1000_irq_enable(adapter);
3909
3910 #endif
3911 return IRQ_HANDLED;
3912 }
3913
3914 #ifdef CONFIG_E1000_NAPI
3915 /**
3916 * e1000_clean - NAPI Rx polling callback
3917 * @adapter: board private structure
3918 **/
3919
3920 static int
3921 e1000_clean(struct net_device *poll_dev, int *budget)
3922 {
3923 struct e1000_adapter *adapter;
3924 int work_to_do = min(*budget, poll_dev->quota);
3925 int tx_cleaned = 0, work_done = 0;
3926
3927 /* Must NOT use netdev_priv macro here. */
3928 adapter = poll_dev->priv;
3929
3930 /* Keep link state information with original netdev */
3931 if (!netif_carrier_ok(poll_dev))
3932 goto quit_polling;
3933
3934 /* e1000_clean is called per-cpu. This lock protects
3935 * tx_ring[0] from being cleaned by multiple cpus
3936 * simultaneously. A failure obtaining the lock means
3937 * tx_ring[0] is currently being cleaned anyway. */
3938 if (spin_trylock(&adapter->tx_queue_lock)) {
3939 tx_cleaned = e1000_clean_tx_irq(adapter,
3940 &adapter->tx_ring[0]);
3941 spin_unlock(&adapter->tx_queue_lock);
3942 }
3943
3944 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3945 &work_done, work_to_do);
3946
3947 *budget -= work_done;
3948 poll_dev->quota -= work_done;
3949
3950 /* If no Tx and not enough Rx work done, exit the polling mode */
3951 if ((!tx_cleaned && (work_done == 0)) ||
3952 !netif_running(poll_dev)) {
3953 quit_polling:
3954 if (likely(adapter->itr_setting & 3))
3955 e1000_set_itr(adapter);
3956 netif_rx_complete(poll_dev);
3957 e1000_irq_enable(adapter);
3958 return 0;
3959 }
3960
3961 return 1;
3962 }
3963
3964 #endif
3965 /**
3966 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3967 * @adapter: board private structure
3968 **/
3969
3970 static boolean_t
3971 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3972 struct e1000_tx_ring *tx_ring)
3973 {
3974 struct net_device *netdev = adapter->netdev;
3975 struct e1000_tx_desc *tx_desc, *eop_desc;
3976 struct e1000_buffer *buffer_info;
3977 unsigned int i, eop;
3978 #ifdef CONFIG_E1000_NAPI
3979 unsigned int count = 0;
3980 #endif
3981 boolean_t cleaned = FALSE;
3982 unsigned int total_tx_bytes=0, total_tx_packets=0;
3983
3984 i = tx_ring->next_to_clean;
3985 eop = tx_ring->buffer_info[i].next_to_watch;
3986 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3987
3988 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3989 for (cleaned = FALSE; !cleaned; ) {
3990 tx_desc = E1000_TX_DESC(*tx_ring, i);
3991 buffer_info = &tx_ring->buffer_info[i];
3992 cleaned = (i == eop);
3993
3994 if (cleaned) {
3995 struct sk_buff *skb = buffer_info->skb;
3996 unsigned int segs, bytecount;
3997 segs = skb_shinfo(skb)->gso_segs ?: 1;
3998 /* multiply data chunks by size of headers */
3999 bytecount = ((segs - 1) * skb_headlen(skb)) +
4000 skb->len;
4001 total_tx_packets += segs;
4002 total_tx_bytes += bytecount;
4003 }
4004 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4005 tx_desc->upper.data = 0;
4006
4007 if (unlikely(++i == tx_ring->count)) i = 0;
4008 }
4009
4010 eop = tx_ring->buffer_info[i].next_to_watch;
4011 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4012 #ifdef CONFIG_E1000_NAPI
4013 #define E1000_TX_WEIGHT 64
4014 /* weight of a sort for tx, to avoid endless transmit cleanup */
4015 if (count++ == E1000_TX_WEIGHT) break;
4016 #endif
4017 }
4018
4019 tx_ring->next_to_clean = i;
4020
4021 #define TX_WAKE_THRESHOLD 32
4022 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4023 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4024 /* Make sure that anybody stopping the queue after this
4025 * sees the new next_to_clean.
4026 */
4027 smp_mb();
4028 if (netif_queue_stopped(netdev)) {
4029 netif_wake_queue(netdev);
4030 ++adapter->restart_queue;
4031 }
4032 }
4033
4034 if (adapter->detect_tx_hung) {
4035 /* Detect a transmit hang in hardware, this serializes the
4036 * check with the clearing of time_stamp and movement of i */
4037 adapter->detect_tx_hung = FALSE;
4038 if (tx_ring->buffer_info[eop].dma &&
4039 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4040 (adapter->tx_timeout_factor * HZ))
4041 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4042 E1000_STATUS_TXOFF)) {
4043
4044 /* detected Tx unit hang */
4045 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4046 " Tx Queue <%lu>\n"
4047 " TDH <%x>\n"
4048 " TDT <%x>\n"
4049 " next_to_use <%x>\n"
4050 " next_to_clean <%x>\n"
4051 "buffer_info[next_to_clean]\n"
4052 " time_stamp <%lx>\n"
4053 " next_to_watch <%x>\n"
4054 " jiffies <%lx>\n"
4055 " next_to_watch.status <%x>\n",
4056 (unsigned long)((tx_ring - adapter->tx_ring) /
4057 sizeof(struct e1000_tx_ring)),
4058 readl(adapter->hw.hw_addr + tx_ring->tdh),
4059 readl(adapter->hw.hw_addr + tx_ring->tdt),
4060 tx_ring->next_to_use,
4061 tx_ring->next_to_clean,
4062 tx_ring->buffer_info[eop].time_stamp,
4063 eop,
4064 jiffies,
4065 eop_desc->upper.fields.status);
4066 netif_stop_queue(netdev);
4067 }
4068 }
4069 adapter->total_tx_bytes += total_tx_bytes;
4070 adapter->total_tx_packets += total_tx_packets;
4071 return cleaned;
4072 }
4073
4074 /**
4075 * e1000_rx_checksum - Receive Checksum Offload for 82543
4076 * @adapter: board private structure
4077 * @status_err: receive descriptor status and error fields
4078 * @csum: receive descriptor csum field
4079 * @sk_buff: socket buffer with received data
4080 **/
4081
4082 static void
4083 e1000_rx_checksum(struct e1000_adapter *adapter,
4084 uint32_t status_err, uint32_t csum,
4085 struct sk_buff *skb)
4086 {
4087 uint16_t status = (uint16_t)status_err;
4088 uint8_t errors = (uint8_t)(status_err >> 24);
4089 skb->ip_summed = CHECKSUM_NONE;
4090
4091 /* 82543 or newer only */
4092 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4093 /* Ignore Checksum bit is set */
4094 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4095 /* TCP/UDP checksum error bit is set */
4096 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4097 /* let the stack verify checksum errors */
4098 adapter->hw_csum_err++;
4099 return;
4100 }
4101 /* TCP/UDP Checksum has not been calculated */
4102 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4103 if (!(status & E1000_RXD_STAT_TCPCS))
4104 return;
4105 } else {
4106 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4107 return;
4108 }
4109 /* It must be a TCP or UDP packet with a valid checksum */
4110 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4111 /* TCP checksum is good */
4112 skb->ip_summed = CHECKSUM_UNNECESSARY;
4113 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4114 /* IP fragment with UDP payload */
4115 /* Hardware complements the payload checksum, so we undo it
4116 * and then put the value in host order for further stack use.
4117 */
4118 csum = ntohl(csum ^ 0xFFFF);
4119 skb->csum = csum;
4120 skb->ip_summed = CHECKSUM_COMPLETE;
4121 }
4122 adapter->hw_csum_good++;
4123 }
4124
4125 /**
4126 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4127 * @adapter: board private structure
4128 **/
4129
4130 static boolean_t
4131 #ifdef CONFIG_E1000_NAPI
4132 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4133 struct e1000_rx_ring *rx_ring,
4134 int *work_done, int work_to_do)
4135 #else
4136 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4137 struct e1000_rx_ring *rx_ring)
4138 #endif
4139 {
4140 struct net_device *netdev = adapter->netdev;
4141 struct pci_dev *pdev = adapter->pdev;
4142 struct e1000_rx_desc *rx_desc, *next_rxd;
4143 struct e1000_buffer *buffer_info, *next_buffer;
4144 unsigned long flags;
4145 uint32_t length;
4146 uint8_t last_byte;
4147 unsigned int i;
4148 int cleaned_count = 0;
4149 boolean_t cleaned = FALSE;
4150 unsigned int total_rx_bytes=0, total_rx_packets=0;
4151
4152 i = rx_ring->next_to_clean;
4153 rx_desc = E1000_RX_DESC(*rx_ring, i);
4154 buffer_info = &rx_ring->buffer_info[i];
4155
4156 while (rx_desc->status & E1000_RXD_STAT_DD) {
4157 struct sk_buff *skb;
4158 u8 status;
4159
4160 #ifdef CONFIG_E1000_NAPI
4161 if (*work_done >= work_to_do)
4162 break;
4163 (*work_done)++;
4164 #endif
4165 status = rx_desc->status;
4166 skb = buffer_info->skb;
4167 buffer_info->skb = NULL;
4168
4169 prefetch(skb->data - NET_IP_ALIGN);
4170
4171 if (++i == rx_ring->count) i = 0;
4172 next_rxd = E1000_RX_DESC(*rx_ring, i);
4173 prefetch(next_rxd);
4174
4175 next_buffer = &rx_ring->buffer_info[i];
4176
4177 cleaned = TRUE;
4178 cleaned_count++;
4179 pci_unmap_single(pdev,
4180 buffer_info->dma,
4181 buffer_info->length,
4182 PCI_DMA_FROMDEVICE);
4183
4184 length = le16_to_cpu(rx_desc->length);
4185
4186 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4187 /* All receives must fit into a single buffer */
4188 E1000_DBG("%s: Receive packet consumed multiple"
4189 " buffers\n", netdev->name);
4190 /* recycle */
4191 buffer_info->skb = skb;
4192 goto next_desc;
4193 }
4194
4195 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4196 last_byte = *(skb->data + length - 1);
4197 if (TBI_ACCEPT(&adapter->hw, status,
4198 rx_desc->errors, length, last_byte)) {
4199 spin_lock_irqsave(&adapter->stats_lock, flags);
4200 e1000_tbi_adjust_stats(&adapter->hw,
4201 &adapter->stats,
4202 length, skb->data);
4203 spin_unlock_irqrestore(&adapter->stats_lock,
4204 flags);
4205 length--;
4206 } else {
4207 /* recycle */
4208 buffer_info->skb = skb;
4209 goto next_desc;
4210 }
4211 }
4212
4213 /* adjust length to remove Ethernet CRC, this must be
4214 * done after the TBI_ACCEPT workaround above */
4215 length -= 4;
4216
4217 /* probably a little skewed due to removing CRC */
4218 total_rx_bytes += length;
4219 total_rx_packets++;
4220
4221 /* code added for copybreak, this should improve
4222 * performance for small packets with large amounts
4223 * of reassembly being done in the stack */
4224 if (length < copybreak) {
4225 struct sk_buff *new_skb =
4226 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4227 if (new_skb) {
4228 skb_reserve(new_skb, NET_IP_ALIGN);
4229 skb_copy_to_linear_data_offset(new_skb,
4230 -NET_IP_ALIGN,
4231 (skb->data -
4232 NET_IP_ALIGN),
4233 (length +
4234 NET_IP_ALIGN));
4235 /* save the skb in buffer_info as good */
4236 buffer_info->skb = skb;
4237 skb = new_skb;
4238 }
4239 /* else just continue with the old one */
4240 }
4241 /* end copybreak code */
4242 skb_put(skb, length);
4243
4244 /* Receive Checksum Offload */
4245 e1000_rx_checksum(adapter,
4246 (uint32_t)(status) |
4247 ((uint32_t)(rx_desc->errors) << 24),
4248 le16_to_cpu(rx_desc->csum), skb);
4249
4250 skb->protocol = eth_type_trans(skb, netdev);
4251 #ifdef CONFIG_E1000_NAPI
4252 if (unlikely(adapter->vlgrp &&
4253 (status & E1000_RXD_STAT_VP))) {
4254 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4255 le16_to_cpu(rx_desc->special) &
4256 E1000_RXD_SPC_VLAN_MASK);
4257 } else {
4258 netif_receive_skb(skb);
4259 }
4260 #else /* CONFIG_E1000_NAPI */
4261 if (unlikely(adapter->vlgrp &&
4262 (status & E1000_RXD_STAT_VP))) {
4263 vlan_hwaccel_rx(skb, adapter->vlgrp,
4264 le16_to_cpu(rx_desc->special) &
4265 E1000_RXD_SPC_VLAN_MASK);
4266 } else {
4267 netif_rx(skb);
4268 }
4269 #endif /* CONFIG_E1000_NAPI */
4270 netdev->last_rx = jiffies;
4271
4272 next_desc:
4273 rx_desc->status = 0;
4274
4275 /* return some buffers to hardware, one at a time is too slow */
4276 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4277 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4278 cleaned_count = 0;
4279 }
4280
4281 /* use prefetched values */
4282 rx_desc = next_rxd;
4283 buffer_info = next_buffer;
4284 }
4285 rx_ring->next_to_clean = i;
4286
4287 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4288 if (cleaned_count)
4289 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4290
4291 adapter->total_rx_packets += total_rx_packets;
4292 adapter->total_rx_bytes += total_rx_bytes;
4293 return cleaned;
4294 }
4295
4296 /**
4297 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4298 * @adapter: board private structure
4299 **/
4300
4301 static boolean_t
4302 #ifdef CONFIG_E1000_NAPI
4303 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4304 struct e1000_rx_ring *rx_ring,
4305 int *work_done, int work_to_do)
4306 #else
4307 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4308 struct e1000_rx_ring *rx_ring)
4309 #endif
4310 {
4311 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4312 struct net_device *netdev = adapter->netdev;
4313 struct pci_dev *pdev = adapter->pdev;
4314 struct e1000_buffer *buffer_info, *next_buffer;
4315 struct e1000_ps_page *ps_page;
4316 struct e1000_ps_page_dma *ps_page_dma;
4317 struct sk_buff *skb;
4318 unsigned int i, j;
4319 uint32_t length, staterr;
4320 int cleaned_count = 0;
4321 boolean_t cleaned = FALSE;
4322 unsigned int total_rx_bytes=0, total_rx_packets=0;
4323
4324 i = rx_ring->next_to_clean;
4325 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4326 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4327 buffer_info = &rx_ring->buffer_info[i];
4328
4329 while (staterr & E1000_RXD_STAT_DD) {
4330 ps_page = &rx_ring->ps_page[i];
4331 ps_page_dma = &rx_ring->ps_page_dma[i];
4332 #ifdef CONFIG_E1000_NAPI
4333 if (unlikely(*work_done >= work_to_do))
4334 break;
4335 (*work_done)++;
4336 #endif
4337 skb = buffer_info->skb;
4338
4339 /* in the packet split case this is header only */
4340 prefetch(skb->data - NET_IP_ALIGN);
4341
4342 if (++i == rx_ring->count) i = 0;
4343 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4344 prefetch(next_rxd);
4345
4346 next_buffer = &rx_ring->buffer_info[i];
4347
4348 cleaned = TRUE;
4349 cleaned_count++;
4350 pci_unmap_single(pdev, buffer_info->dma,
4351 buffer_info->length,
4352 PCI_DMA_FROMDEVICE);
4353
4354 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4355 E1000_DBG("%s: Packet Split buffers didn't pick up"
4356 " the full packet\n", netdev->name);
4357 dev_kfree_skb_irq(skb);
4358 goto next_desc;
4359 }
4360
4361 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4362 dev_kfree_skb_irq(skb);
4363 goto next_desc;
4364 }
4365
4366 length = le16_to_cpu(rx_desc->wb.middle.length0);
4367
4368 if (unlikely(!length)) {
4369 E1000_DBG("%s: Last part of the packet spanning"
4370 " multiple descriptors\n", netdev->name);
4371 dev_kfree_skb_irq(skb);
4372 goto next_desc;
4373 }
4374
4375 /* Good Receive */
4376 skb_put(skb, length);
4377
4378 {
4379 /* this looks ugly, but it seems compiler issues make it
4380 more efficient than reusing j */
4381 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4382
4383 /* page alloc/put takes too long and effects small packet
4384 * throughput, so unsplit small packets and save the alloc/put*/
4385 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4386 u8 *vaddr;
4387 /* there is no documentation about how to call
4388 * kmap_atomic, so we can't hold the mapping
4389 * very long */
4390 pci_dma_sync_single_for_cpu(pdev,
4391 ps_page_dma->ps_page_dma[0],
4392 PAGE_SIZE,
4393 PCI_DMA_FROMDEVICE);
4394 vaddr = kmap_atomic(ps_page->ps_page[0],
4395 KM_SKB_DATA_SOFTIRQ);
4396 memcpy(skb_tail_pointer(skb), vaddr, l1);
4397 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4398 pci_dma_sync_single_for_device(pdev,
4399 ps_page_dma->ps_page_dma[0],
4400 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4401 /* remove the CRC */
4402 l1 -= 4;
4403 skb_put(skb, l1);
4404 goto copydone;
4405 } /* if */
4406 }
4407
4408 for (j = 0; j < adapter->rx_ps_pages; j++) {
4409 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4410 break;
4411 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4412 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4413 ps_page_dma->ps_page_dma[j] = 0;
4414 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4415 length);
4416 ps_page->ps_page[j] = NULL;
4417 skb->len += length;
4418 skb->data_len += length;
4419 skb->truesize += length;
4420 }
4421
4422 /* strip the ethernet crc, problem is we're using pages now so
4423 * this whole operation can get a little cpu intensive */
4424 pskb_trim(skb, skb->len - 4);
4425
4426 copydone:
4427 total_rx_bytes += skb->len;
4428 total_rx_packets++;
4429
4430 e1000_rx_checksum(adapter, staterr,
4431 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4432 skb->protocol = eth_type_trans(skb, netdev);
4433
4434 if (likely(rx_desc->wb.upper.header_status &
4435 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4436 adapter->rx_hdr_split++;
4437 #ifdef CONFIG_E1000_NAPI
4438 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4439 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4440 le16_to_cpu(rx_desc->wb.middle.vlan) &
4441 E1000_RXD_SPC_VLAN_MASK);
4442 } else {
4443 netif_receive_skb(skb);
4444 }
4445 #else /* CONFIG_E1000_NAPI */
4446 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4447 vlan_hwaccel_rx(skb, adapter->vlgrp,
4448 le16_to_cpu(rx_desc->wb.middle.vlan) &
4449 E1000_RXD_SPC_VLAN_MASK);
4450 } else {
4451 netif_rx(skb);
4452 }
4453 #endif /* CONFIG_E1000_NAPI */
4454 netdev->last_rx = jiffies;
4455
4456 next_desc:
4457 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4458 buffer_info->skb = NULL;
4459
4460 /* return some buffers to hardware, one at a time is too slow */
4461 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4462 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4463 cleaned_count = 0;
4464 }
4465
4466 /* use prefetched values */
4467 rx_desc = next_rxd;
4468 buffer_info = next_buffer;
4469
4470 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4471 }
4472 rx_ring->next_to_clean = i;
4473
4474 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4475 if (cleaned_count)
4476 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4477
4478 adapter->total_rx_packets += total_rx_packets;
4479 adapter->total_rx_bytes += total_rx_bytes;
4480 return cleaned;
4481 }
4482
4483 /**
4484 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4485 * @adapter: address of board private structure
4486 **/
4487
4488 static void
4489 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4490 struct e1000_rx_ring *rx_ring,
4491 int cleaned_count)
4492 {
4493 struct net_device *netdev = adapter->netdev;
4494 struct pci_dev *pdev = adapter->pdev;
4495 struct e1000_rx_desc *rx_desc;
4496 struct e1000_buffer *buffer_info;
4497 struct sk_buff *skb;
4498 unsigned int i;
4499 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4500
4501 i = rx_ring->next_to_use;
4502 buffer_info = &rx_ring->buffer_info[i];
4503
4504 while (cleaned_count--) {
4505 skb = buffer_info->skb;
4506 if (skb) {
4507 skb_trim(skb, 0);
4508 goto map_skb;
4509 }
4510
4511 skb = netdev_alloc_skb(netdev, bufsz);
4512 if (unlikely(!skb)) {
4513 /* Better luck next round */
4514 adapter->alloc_rx_buff_failed++;
4515 break;
4516 }
4517
4518 /* Fix for errata 23, can't cross 64kB boundary */
4519 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4520 struct sk_buff *oldskb = skb;
4521 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4522 "at %p\n", bufsz, skb->data);
4523 /* Try again, without freeing the previous */
4524 skb = netdev_alloc_skb(netdev, bufsz);
4525 /* Failed allocation, critical failure */
4526 if (!skb) {
4527 dev_kfree_skb(oldskb);
4528 break;
4529 }
4530
4531 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4532 /* give up */
4533 dev_kfree_skb(skb);
4534 dev_kfree_skb(oldskb);
4535 break; /* while !buffer_info->skb */
4536 }
4537
4538 /* Use new allocation */
4539 dev_kfree_skb(oldskb);
4540 }
4541 /* Make buffer alignment 2 beyond a 16 byte boundary
4542 * this will result in a 16 byte aligned IP header after
4543 * the 14 byte MAC header is removed
4544 */
4545 skb_reserve(skb, NET_IP_ALIGN);
4546
4547 buffer_info->skb = skb;
4548 buffer_info->length = adapter->rx_buffer_len;
4549 map_skb:
4550 buffer_info->dma = pci_map_single(pdev,
4551 skb->data,
4552 adapter->rx_buffer_len,
4553 PCI_DMA_FROMDEVICE);
4554
4555 /* Fix for errata 23, can't cross 64kB boundary */
4556 if (!e1000_check_64k_bound(adapter,
4557 (void *)(unsigned long)buffer_info->dma,
4558 adapter->rx_buffer_len)) {
4559 DPRINTK(RX_ERR, ERR,
4560 "dma align check failed: %u bytes at %p\n",
4561 adapter->rx_buffer_len,
4562 (void *)(unsigned long)buffer_info->dma);
4563 dev_kfree_skb(skb);
4564 buffer_info->skb = NULL;
4565
4566 pci_unmap_single(pdev, buffer_info->dma,
4567 adapter->rx_buffer_len,
4568 PCI_DMA_FROMDEVICE);
4569
4570 break; /* while !buffer_info->skb */
4571 }
4572 rx_desc = E1000_RX_DESC(*rx_ring, i);
4573 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4574
4575 if (unlikely(++i == rx_ring->count))
4576 i = 0;
4577 buffer_info = &rx_ring->buffer_info[i];
4578 }
4579
4580 if (likely(rx_ring->next_to_use != i)) {
4581 rx_ring->next_to_use = i;
4582 if (unlikely(i-- == 0))
4583 i = (rx_ring->count - 1);
4584
4585 /* Force memory writes to complete before letting h/w
4586 * know there are new descriptors to fetch. (Only
4587 * applicable for weak-ordered memory model archs,
4588 * such as IA-64). */
4589 wmb();
4590 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4591 }
4592 }
4593
4594 /**
4595 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4596 * @adapter: address of board private structure
4597 **/
4598
4599 static void
4600 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4601 struct e1000_rx_ring *rx_ring,
4602 int cleaned_count)
4603 {
4604 struct net_device *netdev = adapter->netdev;
4605 struct pci_dev *pdev = adapter->pdev;
4606 union e1000_rx_desc_packet_split *rx_desc;
4607 struct e1000_buffer *buffer_info;
4608 struct e1000_ps_page *ps_page;
4609 struct e1000_ps_page_dma *ps_page_dma;
4610 struct sk_buff *skb;
4611 unsigned int i, j;
4612
4613 i = rx_ring->next_to_use;
4614 buffer_info = &rx_ring->buffer_info[i];
4615 ps_page = &rx_ring->ps_page[i];
4616 ps_page_dma = &rx_ring->ps_page_dma[i];
4617
4618 while (cleaned_count--) {
4619 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4620
4621 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4622 if (j < adapter->rx_ps_pages) {
4623 if (likely(!ps_page->ps_page[j])) {
4624 ps_page->ps_page[j] =
4625 alloc_page(GFP_ATOMIC);
4626 if (unlikely(!ps_page->ps_page[j])) {
4627 adapter->alloc_rx_buff_failed++;
4628 goto no_buffers;
4629 }
4630 ps_page_dma->ps_page_dma[j] =
4631 pci_map_page(pdev,
4632 ps_page->ps_page[j],
4633 0, PAGE_SIZE,
4634 PCI_DMA_FROMDEVICE);
4635 }
4636 /* Refresh the desc even if buffer_addrs didn't
4637 * change because each write-back erases
4638 * this info.
4639 */
4640 rx_desc->read.buffer_addr[j+1] =
4641 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4642 } else
4643 rx_desc->read.buffer_addr[j+1] = ~0;
4644 }
4645
4646 skb = netdev_alloc_skb(netdev,
4647 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4648
4649 if (unlikely(!skb)) {
4650 adapter->alloc_rx_buff_failed++;
4651 break;
4652 }
4653
4654 /* Make buffer alignment 2 beyond a 16 byte boundary
4655 * this will result in a 16 byte aligned IP header after
4656 * the 14 byte MAC header is removed
4657 */
4658 skb_reserve(skb, NET_IP_ALIGN);
4659
4660 buffer_info->skb = skb;
4661 buffer_info->length = adapter->rx_ps_bsize0;
4662 buffer_info->dma = pci_map_single(pdev, skb->data,
4663 adapter->rx_ps_bsize0,
4664 PCI_DMA_FROMDEVICE);
4665
4666 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4667
4668 if (unlikely(++i == rx_ring->count)) i = 0;
4669 buffer_info = &rx_ring->buffer_info[i];
4670 ps_page = &rx_ring->ps_page[i];
4671 ps_page_dma = &rx_ring->ps_page_dma[i];
4672 }
4673
4674 no_buffers:
4675 if (likely(rx_ring->next_to_use != i)) {
4676 rx_ring->next_to_use = i;
4677 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4678
4679 /* Force memory writes to complete before letting h/w
4680 * know there are new descriptors to fetch. (Only
4681 * applicable for weak-ordered memory model archs,
4682 * such as IA-64). */
4683 wmb();
4684 /* Hardware increments by 16 bytes, but packet split
4685 * descriptors are 32 bytes...so we increment tail
4686 * twice as much.
4687 */
4688 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4689 }
4690 }
4691
4692 /**
4693 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4694 * @adapter:
4695 **/
4696
4697 static void
4698 e1000_smartspeed(struct e1000_adapter *adapter)
4699 {
4700 uint16_t phy_status;
4701 uint16_t phy_ctrl;
4702
4703 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4704 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4705 return;
4706
4707 if (adapter->smartspeed == 0) {
4708 /* If Master/Slave config fault is asserted twice,
4709 * we assume back-to-back */
4710 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4711 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4712 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4713 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4714 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4715 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4716 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4717 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4718 phy_ctrl);
4719 adapter->smartspeed++;
4720 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4721 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4722 &phy_ctrl)) {
4723 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4724 MII_CR_RESTART_AUTO_NEG);
4725 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4726 phy_ctrl);
4727 }
4728 }
4729 return;
4730 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4731 /* If still no link, perhaps using 2/3 pair cable */
4732 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4733 phy_ctrl |= CR_1000T_MS_ENABLE;
4734 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4735 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4736 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4737 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4738 MII_CR_RESTART_AUTO_NEG);
4739 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4740 }
4741 }
4742 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4743 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4744 adapter->smartspeed = 0;
4745 }
4746
4747 /**
4748 * e1000_ioctl -
4749 * @netdev:
4750 * @ifreq:
4751 * @cmd:
4752 **/
4753
4754 static int
4755 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4756 {
4757 switch (cmd) {
4758 case SIOCGMIIPHY:
4759 case SIOCGMIIREG:
4760 case SIOCSMIIREG:
4761 return e1000_mii_ioctl(netdev, ifr, cmd);
4762 default:
4763 return -EOPNOTSUPP;
4764 }
4765 }
4766
4767 /**
4768 * e1000_mii_ioctl -
4769 * @netdev:
4770 * @ifreq:
4771 * @cmd:
4772 **/
4773
4774 static int
4775 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4776 {
4777 struct e1000_adapter *adapter = netdev_priv(netdev);
4778 struct mii_ioctl_data *data = if_mii(ifr);
4779 int retval;
4780 uint16_t mii_reg;
4781 uint16_t spddplx;
4782 unsigned long flags;
4783
4784 if (adapter->hw.media_type != e1000_media_type_copper)
4785 return -EOPNOTSUPP;
4786
4787 switch (cmd) {
4788 case SIOCGMIIPHY:
4789 data->phy_id = adapter->hw.phy_addr;
4790 break;
4791 case SIOCGMIIREG:
4792 if (!capable(CAP_NET_ADMIN))
4793 return -EPERM;
4794 spin_lock_irqsave(&adapter->stats_lock, flags);
4795 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4796 &data->val_out)) {
4797 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4798 return -EIO;
4799 }
4800 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4801 break;
4802 case SIOCSMIIREG:
4803 if (!capable(CAP_NET_ADMIN))
4804 return -EPERM;
4805 if (data->reg_num & ~(0x1F))
4806 return -EFAULT;
4807 mii_reg = data->val_in;
4808 spin_lock_irqsave(&adapter->stats_lock, flags);
4809 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4810 mii_reg)) {
4811 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4812 return -EIO;
4813 }
4814 if (adapter->hw.media_type == e1000_media_type_copper) {
4815 switch (data->reg_num) {
4816 case PHY_CTRL:
4817 if (mii_reg & MII_CR_POWER_DOWN)
4818 break;
4819 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4820 adapter->hw.autoneg = 1;
4821 adapter->hw.autoneg_advertised = 0x2F;
4822 } else {
4823 if (mii_reg & 0x40)
4824 spddplx = SPEED_1000;
4825 else if (mii_reg & 0x2000)
4826 spddplx = SPEED_100;
4827 else
4828 spddplx = SPEED_10;
4829 spddplx += (mii_reg & 0x100)
4830 ? DUPLEX_FULL :
4831 DUPLEX_HALF;
4832 retval = e1000_set_spd_dplx(adapter,
4833 spddplx);
4834 if (retval) {
4835 spin_unlock_irqrestore(
4836 &adapter->stats_lock,
4837 flags);
4838 return retval;
4839 }
4840 }
4841 if (netif_running(adapter->netdev))
4842 e1000_reinit_locked(adapter);
4843 else
4844 e1000_reset(adapter);
4845 break;
4846 case M88E1000_PHY_SPEC_CTRL:
4847 case M88E1000_EXT_PHY_SPEC_CTRL:
4848 if (e1000_phy_reset(&adapter->hw)) {
4849 spin_unlock_irqrestore(
4850 &adapter->stats_lock, flags);
4851 return -EIO;
4852 }
4853 break;
4854 }
4855 } else {
4856 switch (data->reg_num) {
4857 case PHY_CTRL:
4858 if (mii_reg & MII_CR_POWER_DOWN)
4859 break;
4860 if (netif_running(adapter->netdev))
4861 e1000_reinit_locked(adapter);
4862 else
4863 e1000_reset(adapter);
4864 break;
4865 }
4866 }
4867 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4868 break;
4869 default:
4870 return -EOPNOTSUPP;
4871 }
4872 return E1000_SUCCESS;
4873 }
4874
4875 void
4876 e1000_pci_set_mwi(struct e1000_hw *hw)
4877 {
4878 struct e1000_adapter *adapter = hw->back;
4879 int ret_val = pci_set_mwi(adapter->pdev);
4880
4881 if (ret_val)
4882 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4883 }
4884
4885 void
4886 e1000_pci_clear_mwi(struct e1000_hw *hw)
4887 {
4888 struct e1000_adapter *adapter = hw->back;
4889
4890 pci_clear_mwi(adapter->pdev);
4891 }
4892
4893 void
4894 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4895 {
4896 struct e1000_adapter *adapter = hw->back;
4897
4898 pci_read_config_word(adapter->pdev, reg, value);
4899 }
4900
4901 void
4902 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4903 {
4904 struct e1000_adapter *adapter = hw->back;
4905
4906 pci_write_config_word(adapter->pdev, reg, *value);
4907 }
4908
4909 int32_t
4910 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4911 {
4912 struct e1000_adapter *adapter = hw->back;
4913 uint16_t cap_offset;
4914
4915 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4916 if (!cap_offset)
4917 return -E1000_ERR_CONFIG;
4918
4919 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4920
4921 return E1000_SUCCESS;
4922 }
4923
4924 void
4925 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4926 {
4927 outl(value, port);
4928 }
4929
4930 static void
4931 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4932 {
4933 struct e1000_adapter *adapter = netdev_priv(netdev);
4934 uint32_t ctrl, rctl;
4935
4936 e1000_irq_disable(adapter);
4937 adapter->vlgrp = grp;
4938
4939 if (grp) {
4940 /* enable VLAN tag insert/strip */
4941 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4942 ctrl |= E1000_CTRL_VME;
4943 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4944
4945 if (adapter->hw.mac_type != e1000_ich8lan) {
4946 /* enable VLAN receive filtering */
4947 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4948 rctl |= E1000_RCTL_VFE;
4949 rctl &= ~E1000_RCTL_CFIEN;
4950 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4951 e1000_update_mng_vlan(adapter);
4952 }
4953 } else {
4954 /* disable VLAN tag insert/strip */
4955 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4956 ctrl &= ~E1000_CTRL_VME;
4957 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4958
4959 if (adapter->hw.mac_type != e1000_ich8lan) {
4960 /* disable VLAN filtering */
4961 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4962 rctl &= ~E1000_RCTL_VFE;
4963 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4964 if (adapter->mng_vlan_id !=
4965 (uint16_t)E1000_MNG_VLAN_NONE) {
4966 e1000_vlan_rx_kill_vid(netdev,
4967 adapter->mng_vlan_id);
4968 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4969 }
4970 }
4971 }
4972
4973 e1000_irq_enable(adapter);
4974 }
4975
4976 static void
4977 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4978 {
4979 struct e1000_adapter *adapter = netdev_priv(netdev);
4980 uint32_t vfta, index;
4981
4982 if ((adapter->hw.mng_cookie.status &
4983 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4984 (vid == adapter->mng_vlan_id))
4985 return;
4986 /* add VID to filter table */
4987 index = (vid >> 5) & 0x7F;
4988 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4989 vfta |= (1 << (vid & 0x1F));
4990 e1000_write_vfta(&adapter->hw, index, vfta);
4991 }
4992
4993 static void
4994 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4995 {
4996 struct e1000_adapter *adapter = netdev_priv(netdev);
4997 uint32_t vfta, index;
4998
4999 e1000_irq_disable(adapter);
5000 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5001 e1000_irq_enable(adapter);
5002
5003 if ((adapter->hw.mng_cookie.status &
5004 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5005 (vid == adapter->mng_vlan_id)) {
5006 /* release control to f/w */
5007 e1000_release_hw_control(adapter);
5008 return;
5009 }
5010
5011 /* remove VID from filter table */
5012 index = (vid >> 5) & 0x7F;
5013 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5014 vfta &= ~(1 << (vid & 0x1F));
5015 e1000_write_vfta(&adapter->hw, index, vfta);
5016 }
5017
5018 static void
5019 e1000_restore_vlan(struct e1000_adapter *adapter)
5020 {
5021 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5022
5023 if (adapter->vlgrp) {
5024 uint16_t vid;
5025 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5026 if (!vlan_group_get_device(adapter->vlgrp, vid))
5027 continue;
5028 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5029 }
5030 }
5031 }
5032
5033 int
5034 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5035 {
5036 adapter->hw.autoneg = 0;
5037
5038 /* Fiber NICs only allow 1000 gbps Full duplex */
5039 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5040 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5041 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5042 return -EINVAL;
5043 }
5044
5045 switch (spddplx) {
5046 case SPEED_10 + DUPLEX_HALF:
5047 adapter->hw.forced_speed_duplex = e1000_10_half;
5048 break;
5049 case SPEED_10 + DUPLEX_FULL:
5050 adapter->hw.forced_speed_duplex = e1000_10_full;
5051 break;
5052 case SPEED_100 + DUPLEX_HALF:
5053 adapter->hw.forced_speed_duplex = e1000_100_half;
5054 break;
5055 case SPEED_100 + DUPLEX_FULL:
5056 adapter->hw.forced_speed_duplex = e1000_100_full;
5057 break;
5058 case SPEED_1000 + DUPLEX_FULL:
5059 adapter->hw.autoneg = 1;
5060 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5061 break;
5062 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5063 default:
5064 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5065 return -EINVAL;
5066 }
5067 return 0;
5068 }
5069
5070 static int
5071 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5072 {
5073 struct net_device *netdev = pci_get_drvdata(pdev);
5074 struct e1000_adapter *adapter = netdev_priv(netdev);
5075 uint32_t ctrl, ctrl_ext, rctl, status;
5076 uint32_t wufc = adapter->wol;
5077 #ifdef CONFIG_PM
5078 int retval = 0;
5079 #endif
5080
5081 netif_device_detach(netdev);
5082
5083 if (netif_running(netdev)) {
5084 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5085 e1000_down(adapter);
5086 }
5087
5088 #ifdef CONFIG_PM
5089 retval = pci_save_state(pdev);
5090 if (retval)
5091 return retval;
5092 #endif
5093
5094 status = E1000_READ_REG(&adapter->hw, STATUS);
5095 if (status & E1000_STATUS_LU)
5096 wufc &= ~E1000_WUFC_LNKC;
5097
5098 if (wufc) {
5099 e1000_setup_rctl(adapter);
5100 e1000_set_multi(netdev);
5101
5102 /* turn on all-multi mode if wake on multicast is enabled */
5103 if (wufc & E1000_WUFC_MC) {
5104 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5105 rctl |= E1000_RCTL_MPE;
5106 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5107 }
5108
5109 if (adapter->hw.mac_type >= e1000_82540) {
5110 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5111 /* advertise wake from D3Cold */
5112 #define E1000_CTRL_ADVD3WUC 0x00100000
5113 /* phy power management enable */
5114 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5115 ctrl |= E1000_CTRL_ADVD3WUC |
5116 E1000_CTRL_EN_PHY_PWR_MGMT;
5117 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5118 }
5119
5120 if (adapter->hw.media_type == e1000_media_type_fiber ||
5121 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5122 /* keep the laser running in D3 */
5123 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5124 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5125 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5126 }
5127
5128 /* Allow time for pending master requests to run */
5129 e1000_disable_pciex_master(&adapter->hw);
5130
5131 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5132 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5133 pci_enable_wake(pdev, PCI_D3hot, 1);
5134 pci_enable_wake(pdev, PCI_D3cold, 1);
5135 } else {
5136 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5137 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5138 pci_enable_wake(pdev, PCI_D3hot, 0);
5139 pci_enable_wake(pdev, PCI_D3cold, 0);
5140 }
5141
5142 e1000_release_manageability(adapter);
5143
5144 /* make sure adapter isn't asleep if manageability is enabled */
5145 if (adapter->en_mng_pt) {
5146 pci_enable_wake(pdev, PCI_D3hot, 1);
5147 pci_enable_wake(pdev, PCI_D3cold, 1);
5148 }
5149
5150 if (adapter->hw.phy_type == e1000_phy_igp_3)
5151 e1000_phy_powerdown_workaround(&adapter->hw);
5152
5153 if (netif_running(netdev))
5154 e1000_free_irq(adapter);
5155
5156 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5157 * would have already happened in close and is redundant. */
5158 e1000_release_hw_control(adapter);
5159
5160 pci_disable_device(pdev);
5161
5162 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5163
5164 return 0;
5165 }
5166
5167 #ifdef CONFIG_PM
5168 static int
5169 e1000_resume(struct pci_dev *pdev)
5170 {
5171 struct net_device *netdev = pci_get_drvdata(pdev);
5172 struct e1000_adapter *adapter = netdev_priv(netdev);
5173 uint32_t err;
5174
5175 pci_set_power_state(pdev, PCI_D0);
5176 pci_restore_state(pdev);
5177 if ((err = pci_enable_device(pdev))) {
5178 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5179 return err;
5180 }
5181 pci_set_master(pdev);
5182
5183 pci_enable_wake(pdev, PCI_D3hot, 0);
5184 pci_enable_wake(pdev, PCI_D3cold, 0);
5185
5186 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5187 return err;
5188
5189 e1000_power_up_phy(adapter);
5190 e1000_reset(adapter);
5191 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5192
5193 e1000_init_manageability(adapter);
5194
5195 if (netif_running(netdev))
5196 e1000_up(adapter);
5197
5198 netif_device_attach(netdev);
5199
5200 /* If the controller is 82573 and f/w is AMT, do not set
5201 * DRV_LOAD until the interface is up. For all other cases,
5202 * let the f/w know that the h/w is now under the control
5203 * of the driver. */
5204 if (adapter->hw.mac_type != e1000_82573 ||
5205 !e1000_check_mng_mode(&adapter->hw))
5206 e1000_get_hw_control(adapter);
5207
5208 return 0;
5209 }
5210 #endif
5211
5212 static void e1000_shutdown(struct pci_dev *pdev)
5213 {
5214 e1000_suspend(pdev, PMSG_SUSPEND);
5215 }
5216
5217 #ifdef CONFIG_NET_POLL_CONTROLLER
5218 /*
5219 * Polling 'interrupt' - used by things like netconsole to send skbs
5220 * without having to re-enable interrupts. It's not called while
5221 * the interrupt routine is executing.
5222 */
5223 static void
5224 e1000_netpoll(struct net_device *netdev)
5225 {
5226 struct e1000_adapter *adapter = netdev_priv(netdev);
5227
5228 disable_irq(adapter->pdev->irq);
5229 e1000_intr(adapter->pdev->irq, netdev);
5230 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5231 #ifndef CONFIG_E1000_NAPI
5232 adapter->clean_rx(adapter, adapter->rx_ring);
5233 #endif
5234 enable_irq(adapter->pdev->irq);
5235 }
5236 #endif
5237
5238 /**
5239 * e1000_io_error_detected - called when PCI error is detected
5240 * @pdev: Pointer to PCI device
5241 * @state: The current pci conneection state
5242 *
5243 * This function is called after a PCI bus error affecting
5244 * this device has been detected.
5245 */
5246 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5247 {
5248 struct net_device *netdev = pci_get_drvdata(pdev);
5249 struct e1000_adapter *adapter = netdev->priv;
5250
5251 netif_device_detach(netdev);
5252
5253 if (netif_running(netdev))
5254 e1000_down(adapter);
5255 pci_disable_device(pdev);
5256
5257 /* Request a slot slot reset. */
5258 return PCI_ERS_RESULT_NEED_RESET;
5259 }
5260
5261 /**
5262 * e1000_io_slot_reset - called after the pci bus has been reset.
5263 * @pdev: Pointer to PCI device
5264 *
5265 * Restart the card from scratch, as if from a cold-boot. Implementation
5266 * resembles the first-half of the e1000_resume routine.
5267 */
5268 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5269 {
5270 struct net_device *netdev = pci_get_drvdata(pdev);
5271 struct e1000_adapter *adapter = netdev->priv;
5272
5273 if (pci_enable_device(pdev)) {
5274 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5275 return PCI_ERS_RESULT_DISCONNECT;
5276 }
5277 pci_set_master(pdev);
5278
5279 pci_enable_wake(pdev, PCI_D3hot, 0);
5280 pci_enable_wake(pdev, PCI_D3cold, 0);
5281
5282 e1000_reset(adapter);
5283 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5284
5285 return PCI_ERS_RESULT_RECOVERED;
5286 }
5287
5288 /**
5289 * e1000_io_resume - called when traffic can start flowing again.
5290 * @pdev: Pointer to PCI device
5291 *
5292 * This callback is called when the error recovery driver tells us that
5293 * its OK to resume normal operation. Implementation resembles the
5294 * second-half of the e1000_resume routine.
5295 */
5296 static void e1000_io_resume(struct pci_dev *pdev)
5297 {
5298 struct net_device *netdev = pci_get_drvdata(pdev);
5299 struct e1000_adapter *adapter = netdev->priv;
5300
5301 e1000_init_manageability(adapter);
5302
5303 if (netif_running(netdev)) {
5304 if (e1000_up(adapter)) {
5305 printk("e1000: can't bring device back up after reset\n");
5306 return;
5307 }
5308 }
5309
5310 netif_device_attach(netdev);
5311
5312 /* If the controller is 82573 and f/w is AMT, do not set
5313 * DRV_LOAD until the interface is up. For all other cases,
5314 * let the f/w know that the h/w is now under the control
5315 * of the driver. */
5316 if (adapter->hw.mac_type != e1000_82573 ||
5317 !e1000_check_mng_mode(&adapter->hw))
5318 e1000_get_hw_control(adapter);
5319
5320 }
5321
5322 /* e1000_main.c */