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[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / e1000 / e1000_ethtool.c
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28 *******************************************************************************/
29
30 /* ethtool support for e1000 */
31
32 #include "e1000.h"
33
34 #include <asm/uaccess.h>
35
36 struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
38 int sizeof_stat;
39 int stat_offset;
40 };
41
42 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
43 offsetof(struct e1000_adapter, m)
44 static const struct e1000_stats e1000_gstrings_stats[] = {
45 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
46 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
47 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
48 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
49 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
50 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
51 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
52 { "multicast", E1000_STAT(net_stats.multicast) },
53 { "collisions", E1000_STAT(net_stats.collisions) },
54 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
55 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
56 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
57 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
58 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
59 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
60 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
61 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
62 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
63 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
64 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
65 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
66 { "tx_deferred_ok", E1000_STAT(stats.dc) },
67 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
68 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
69 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
70 { "rx_long_length_errors", E1000_STAT(stats.roc) },
71 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
72 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
73 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
74 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
75 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
76 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
77 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
78 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
79 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
80 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
81 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
82 { "rx_header_split", E1000_STAT(rx_hdr_split) },
83 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
84 };
85
86 #define E1000_QUEUE_STATS_LEN 0
87 #define E1000_GLOBAL_STATS_LEN \
88 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
89 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
90 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
91 "Register test (offline)", "Eeprom test (offline)",
92 "Interrupt test (offline)", "Loopback test (offline)",
93 "Link test (on/offline)"
94 };
95 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
96
97 static int
98 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
99 {
100 struct e1000_adapter *adapter = netdev_priv(netdev);
101 struct e1000_hw *hw = &adapter->hw;
102
103 if (hw->media_type == e1000_media_type_copper) {
104
105 ecmd->supported = (SUPPORTED_10baseT_Half |
106 SUPPORTED_10baseT_Full |
107 SUPPORTED_100baseT_Half |
108 SUPPORTED_100baseT_Full |
109 SUPPORTED_1000baseT_Full|
110 SUPPORTED_Autoneg |
111 SUPPORTED_TP);
112
113 ecmd->advertising = ADVERTISED_TP;
114
115 if (hw->autoneg == 1) {
116 ecmd->advertising |= ADVERTISED_Autoneg;
117
118 /* the e1000 autoneg seems to match ethtool nicely */
119
120 ecmd->advertising |= hw->autoneg_advertised;
121 }
122
123 ecmd->port = PORT_TP;
124 ecmd->phy_address = hw->phy_addr;
125
126 if (hw->mac_type == e1000_82543)
127 ecmd->transceiver = XCVR_EXTERNAL;
128 else
129 ecmd->transceiver = XCVR_INTERNAL;
130
131 } else {
132 ecmd->supported = (SUPPORTED_1000baseT_Full |
133 SUPPORTED_FIBRE |
134 SUPPORTED_Autoneg);
135
136 ecmd->advertising = (ADVERTISED_1000baseT_Full |
137 ADVERTISED_FIBRE |
138 ADVERTISED_Autoneg);
139
140 ecmd->port = PORT_FIBRE;
141
142 if (hw->mac_type >= e1000_82545)
143 ecmd->transceiver = XCVR_INTERNAL;
144 else
145 ecmd->transceiver = XCVR_EXTERNAL;
146 }
147
148 if (netif_carrier_ok(adapter->netdev)) {
149
150 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
151 &adapter->link_duplex);
152 ecmd->speed = adapter->link_speed;
153
154 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
155 * and HALF_DUPLEX != DUPLEX_HALF */
156
157 if (adapter->link_duplex == FULL_DUPLEX)
158 ecmd->duplex = DUPLEX_FULL;
159 else
160 ecmd->duplex = DUPLEX_HALF;
161 } else {
162 ecmd->speed = -1;
163 ecmd->duplex = -1;
164 }
165
166 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
167 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
168 return 0;
169 }
170
171 static int
172 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
173 {
174 struct e1000_adapter *adapter = netdev_priv(netdev);
175 struct e1000_hw *hw = &adapter->hw;
176
177 /* When SoL/IDER sessions are active, autoneg/speed/duplex
178 * cannot be changed */
179 if (e1000_check_phy_reset_block(hw)) {
180 DPRINTK(DRV, ERR, "Cannot change link characteristics "
181 "when SoL/IDER is active.\n");
182 return -EINVAL;
183 }
184
185 if (ecmd->autoneg == AUTONEG_ENABLE) {
186 hw->autoneg = 1;
187 if (hw->media_type == e1000_media_type_fiber)
188 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
189 ADVERTISED_FIBRE |
190 ADVERTISED_Autoneg;
191 else
192 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
193 ADVERTISED_10baseT_Full |
194 ADVERTISED_100baseT_Half |
195 ADVERTISED_100baseT_Full |
196 ADVERTISED_1000baseT_Full|
197 ADVERTISED_Autoneg |
198 ADVERTISED_TP;
199 ecmd->advertising = hw->autoneg_advertised;
200 } else
201 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
202 return -EINVAL;
203
204 /* reset the link */
205
206 if (netif_running(adapter->netdev)) {
207 e1000_down(adapter);
208 e1000_reset(adapter);
209 e1000_up(adapter);
210 } else
211 e1000_reset(adapter);
212
213 return 0;
214 }
215
216 static void
217 e1000_get_pauseparam(struct net_device *netdev,
218 struct ethtool_pauseparam *pause)
219 {
220 struct e1000_adapter *adapter = netdev_priv(netdev);
221 struct e1000_hw *hw = &adapter->hw;
222
223 pause->autoneg =
224 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
225
226 if (hw->fc == e1000_fc_rx_pause)
227 pause->rx_pause = 1;
228 else if (hw->fc == e1000_fc_tx_pause)
229 pause->tx_pause = 1;
230 else if (hw->fc == e1000_fc_full) {
231 pause->rx_pause = 1;
232 pause->tx_pause = 1;
233 }
234 }
235
236 static int
237 e1000_set_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
239 {
240 struct e1000_adapter *adapter = netdev_priv(netdev);
241 struct e1000_hw *hw = &adapter->hw;
242
243 adapter->fc_autoneg = pause->autoneg;
244
245 if (pause->rx_pause && pause->tx_pause)
246 hw->fc = e1000_fc_full;
247 else if (pause->rx_pause && !pause->tx_pause)
248 hw->fc = e1000_fc_rx_pause;
249 else if (!pause->rx_pause && pause->tx_pause)
250 hw->fc = e1000_fc_tx_pause;
251 else if (!pause->rx_pause && !pause->tx_pause)
252 hw->fc = e1000_fc_none;
253
254 hw->original_fc = hw->fc;
255
256 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
257 if (netif_running(adapter->netdev)) {
258 e1000_down(adapter);
259 e1000_up(adapter);
260 } else
261 e1000_reset(adapter);
262 } else
263 return ((hw->media_type == e1000_media_type_fiber) ?
264 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
265
266 return 0;
267 }
268
269 static uint32_t
270 e1000_get_rx_csum(struct net_device *netdev)
271 {
272 struct e1000_adapter *adapter = netdev_priv(netdev);
273 return adapter->rx_csum;
274 }
275
276 static int
277 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
278 {
279 struct e1000_adapter *adapter = netdev_priv(netdev);
280 adapter->rx_csum = data;
281
282 if (netif_running(netdev)) {
283 e1000_down(adapter);
284 e1000_up(adapter);
285 } else
286 e1000_reset(adapter);
287 return 0;
288 }
289
290 static uint32_t
291 e1000_get_tx_csum(struct net_device *netdev)
292 {
293 return (netdev->features & NETIF_F_HW_CSUM) != 0;
294 }
295
296 static int
297 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
298 {
299 struct e1000_adapter *adapter = netdev_priv(netdev);
300
301 if (adapter->hw.mac_type < e1000_82543) {
302 if (!data)
303 return -EINVAL;
304 return 0;
305 }
306
307 if (data)
308 netdev->features |= NETIF_F_HW_CSUM;
309 else
310 netdev->features &= ~NETIF_F_HW_CSUM;
311
312 return 0;
313 }
314
315 #ifdef NETIF_F_TSO
316 static int
317 e1000_set_tso(struct net_device *netdev, uint32_t data)
318 {
319 struct e1000_adapter *adapter = netdev_priv(netdev);
320 if ((adapter->hw.mac_type < e1000_82544) ||
321 (adapter->hw.mac_type == e1000_82547))
322 return data ? -EINVAL : 0;
323
324 if (data)
325 netdev->features |= NETIF_F_TSO;
326 else
327 netdev->features &= ~NETIF_F_TSO;
328
329 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
330 adapter->tso_force = TRUE;
331 return 0;
332 }
333 #endif /* NETIF_F_TSO */
334
335 static uint32_t
336 e1000_get_msglevel(struct net_device *netdev)
337 {
338 struct e1000_adapter *adapter = netdev_priv(netdev);
339 return adapter->msg_enable;
340 }
341
342 static void
343 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
344 {
345 struct e1000_adapter *adapter = netdev_priv(netdev);
346 adapter->msg_enable = data;
347 }
348
349 static int
350 e1000_get_regs_len(struct net_device *netdev)
351 {
352 #define E1000_REGS_LEN 32
353 return E1000_REGS_LEN * sizeof(uint32_t);
354 }
355
356 static void
357 e1000_get_regs(struct net_device *netdev,
358 struct ethtool_regs *regs, void *p)
359 {
360 struct e1000_adapter *adapter = netdev_priv(netdev);
361 struct e1000_hw *hw = &adapter->hw;
362 uint32_t *regs_buff = p;
363 uint16_t phy_data;
364
365 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
366
367 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
368
369 regs_buff[0] = E1000_READ_REG(hw, CTRL);
370 regs_buff[1] = E1000_READ_REG(hw, STATUS);
371
372 regs_buff[2] = E1000_READ_REG(hw, RCTL);
373 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
374 regs_buff[4] = E1000_READ_REG(hw, RDH);
375 regs_buff[5] = E1000_READ_REG(hw, RDT);
376 regs_buff[6] = E1000_READ_REG(hw, RDTR);
377
378 regs_buff[7] = E1000_READ_REG(hw, TCTL);
379 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
380 regs_buff[9] = E1000_READ_REG(hw, TDH);
381 regs_buff[10] = E1000_READ_REG(hw, TDT);
382 regs_buff[11] = E1000_READ_REG(hw, TIDV);
383
384 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
385 if (hw->phy_type == e1000_phy_igp) {
386 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
387 IGP01E1000_PHY_AGC_A);
388 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
389 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
390 regs_buff[13] = (uint32_t)phy_data; /* cable length */
391 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
392 IGP01E1000_PHY_AGC_B);
393 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
394 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
395 regs_buff[14] = (uint32_t)phy_data; /* cable length */
396 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
397 IGP01E1000_PHY_AGC_C);
398 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
399 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
400 regs_buff[15] = (uint32_t)phy_data; /* cable length */
401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_AGC_D);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
405 regs_buff[16] = (uint32_t)phy_data; /* cable length */
406 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
407 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
408 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
409 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
410 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
411 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
412 IGP01E1000_PHY_PCS_INIT_REG);
413 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
414 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
415 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
416 regs_buff[20] = 0; /* polarity correction enabled (always) */
417 regs_buff[22] = 0; /* phy receive errors (unavailable) */
418 regs_buff[23] = regs_buff[18]; /* mdix mode */
419 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
420 } else {
421 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
422 regs_buff[13] = (uint32_t)phy_data; /* cable length */
423 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
424 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
425 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
426 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
427 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
428 regs_buff[18] = regs_buff[13]; /* cable polarity */
429 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
430 regs_buff[20] = regs_buff[17]; /* polarity correction */
431 /* phy receive errors */
432 regs_buff[22] = adapter->phy_stats.receive_errors;
433 regs_buff[23] = regs_buff[13]; /* mdix mode */
434 }
435 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
436 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
437 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
438 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
439 if (hw->mac_type >= e1000_82540 &&
440 hw->media_type == e1000_media_type_copper) {
441 regs_buff[26] = E1000_READ_REG(hw, MANC);
442 }
443 }
444
445 static int
446 e1000_get_eeprom_len(struct net_device *netdev)
447 {
448 struct e1000_adapter *adapter = netdev_priv(netdev);
449 return adapter->hw.eeprom.word_size * 2;
450 }
451
452 static int
453 e1000_get_eeprom(struct net_device *netdev,
454 struct ethtool_eeprom *eeprom, uint8_t *bytes)
455 {
456 struct e1000_adapter *adapter = netdev_priv(netdev);
457 struct e1000_hw *hw = &adapter->hw;
458 uint16_t *eeprom_buff;
459 int first_word, last_word;
460 int ret_val = 0;
461 uint16_t i;
462
463 if (eeprom->len == 0)
464 return -EINVAL;
465
466 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
467
468 first_word = eeprom->offset >> 1;
469 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
470
471 eeprom_buff = kmalloc(sizeof(uint16_t) *
472 (last_word - first_word + 1), GFP_KERNEL);
473 if (!eeprom_buff)
474 return -ENOMEM;
475
476 if (hw->eeprom.type == e1000_eeprom_spi)
477 ret_val = e1000_read_eeprom(hw, first_word,
478 last_word - first_word + 1,
479 eeprom_buff);
480 else {
481 for (i = 0; i < last_word - first_word + 1; i++)
482 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
483 &eeprom_buff[i])))
484 break;
485 }
486
487 /* Device's eeprom is always little-endian, word addressable */
488 for (i = 0; i < last_word - first_word + 1; i++)
489 le16_to_cpus(&eeprom_buff[i]);
490
491 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
492 eeprom->len);
493 kfree(eeprom_buff);
494
495 return ret_val;
496 }
497
498 static int
499 e1000_set_eeprom(struct net_device *netdev,
500 struct ethtool_eeprom *eeprom, uint8_t *bytes)
501 {
502 struct e1000_adapter *adapter = netdev_priv(netdev);
503 struct e1000_hw *hw = &adapter->hw;
504 uint16_t *eeprom_buff;
505 void *ptr;
506 int max_len, first_word, last_word, ret_val = 0;
507 uint16_t i;
508
509 if (eeprom->len == 0)
510 return -EOPNOTSUPP;
511
512 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
513 return -EFAULT;
514
515 max_len = hw->eeprom.word_size * 2;
516
517 first_word = eeprom->offset >> 1;
518 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
519 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
520 if (!eeprom_buff)
521 return -ENOMEM;
522
523 ptr = (void *)eeprom_buff;
524
525 if (eeprom->offset & 1) {
526 /* need read/modify/write of first changed EEPROM word */
527 /* only the second byte of the word is being modified */
528 ret_val = e1000_read_eeprom(hw, first_word, 1,
529 &eeprom_buff[0]);
530 ptr++;
531 }
532 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
533 /* need read/modify/write of last changed EEPROM word */
534 /* only the first byte of the word is being modified */
535 ret_val = e1000_read_eeprom(hw, last_word, 1,
536 &eeprom_buff[last_word - first_word]);
537 }
538
539 /* Device's eeprom is always little-endian, word addressable */
540 for (i = 0; i < last_word - first_word + 1; i++)
541 le16_to_cpus(&eeprom_buff[i]);
542
543 memcpy(ptr, bytes, eeprom->len);
544
545 for (i = 0; i < last_word - first_word + 1; i++)
546 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
547
548 ret_val = e1000_write_eeprom(hw, first_word,
549 last_word - first_word + 1, eeprom_buff);
550
551 /* Update the checksum over the first part of the EEPROM if needed
552 * and flush shadow RAM for 82573 conrollers */
553 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
554 (hw->mac_type == e1000_82573)))
555 e1000_update_eeprom_checksum(hw);
556
557 kfree(eeprom_buff);
558 return ret_val;
559 }
560
561 static void
562 e1000_get_drvinfo(struct net_device *netdev,
563 struct ethtool_drvinfo *drvinfo)
564 {
565 struct e1000_adapter *adapter = netdev_priv(netdev);
566 char firmware_version[32];
567 uint16_t eeprom_data;
568
569 strncpy(drvinfo->driver, e1000_driver_name, 32);
570 strncpy(drvinfo->version, e1000_driver_version, 32);
571
572 /* EEPROM image version # is reported as firmware version # for
573 * 8257{1|2|3} controllers */
574 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
575 switch (adapter->hw.mac_type) {
576 case e1000_82571:
577 case e1000_82572:
578 case e1000_82573:
579 case e1000_80003es2lan:
580 sprintf(firmware_version, "%d.%d-%d",
581 (eeprom_data & 0xF000) >> 12,
582 (eeprom_data & 0x0FF0) >> 4,
583 eeprom_data & 0x000F);
584 break;
585 default:
586 sprintf(firmware_version, "N/A");
587 }
588
589 strncpy(drvinfo->fw_version, firmware_version, 32);
590 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
591 drvinfo->n_stats = E1000_STATS_LEN;
592 drvinfo->testinfo_len = E1000_TEST_LEN;
593 drvinfo->regdump_len = e1000_get_regs_len(netdev);
594 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
595 }
596
597 static void
598 e1000_get_ringparam(struct net_device *netdev,
599 struct ethtool_ringparam *ring)
600 {
601 struct e1000_adapter *adapter = netdev_priv(netdev);
602 e1000_mac_type mac_type = adapter->hw.mac_type;
603 struct e1000_tx_ring *txdr = adapter->tx_ring;
604 struct e1000_rx_ring *rxdr = adapter->rx_ring;
605
606 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
607 E1000_MAX_82544_RXD;
608 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
609 E1000_MAX_82544_TXD;
610 ring->rx_mini_max_pending = 0;
611 ring->rx_jumbo_max_pending = 0;
612 ring->rx_pending = rxdr->count;
613 ring->tx_pending = txdr->count;
614 ring->rx_mini_pending = 0;
615 ring->rx_jumbo_pending = 0;
616 }
617
618 static int
619 e1000_set_ringparam(struct net_device *netdev,
620 struct ethtool_ringparam *ring)
621 {
622 struct e1000_adapter *adapter = netdev_priv(netdev);
623 e1000_mac_type mac_type = adapter->hw.mac_type;
624 struct e1000_tx_ring *txdr, *tx_old, *tx_new;
625 struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
626 int i, err, tx_ring_size, rx_ring_size;
627
628 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
629 return -EINVAL;
630
631 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
632 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
633
634 if (netif_running(adapter->netdev))
635 e1000_down(adapter);
636
637 tx_old = adapter->tx_ring;
638 rx_old = adapter->rx_ring;
639
640 adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
641 if (!adapter->tx_ring) {
642 err = -ENOMEM;
643 goto err_setup_rx;
644 }
645 memset(adapter->tx_ring, 0, tx_ring_size);
646
647 adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
648 if (!adapter->rx_ring) {
649 kfree(adapter->tx_ring);
650 err = -ENOMEM;
651 goto err_setup_rx;
652 }
653 memset(adapter->rx_ring, 0, rx_ring_size);
654
655 txdr = adapter->tx_ring;
656 rxdr = adapter->rx_ring;
657
658 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
659 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
660 E1000_MAX_RXD : E1000_MAX_82544_RXD));
661 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
662
663 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
664 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
665 E1000_MAX_TXD : E1000_MAX_82544_TXD));
666 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
667
668 for (i = 0; i < adapter->num_tx_queues; i++)
669 txdr[i].count = txdr->count;
670 for (i = 0; i < adapter->num_rx_queues; i++)
671 rxdr[i].count = rxdr->count;
672
673 if (netif_running(adapter->netdev)) {
674 /* Try to get new resources before deleting old */
675 if ((err = e1000_setup_all_rx_resources(adapter)))
676 goto err_setup_rx;
677 if ((err = e1000_setup_all_tx_resources(adapter)))
678 goto err_setup_tx;
679
680 /* save the new, restore the old in order to free it,
681 * then restore the new back again */
682
683 rx_new = adapter->rx_ring;
684 tx_new = adapter->tx_ring;
685 adapter->rx_ring = rx_old;
686 adapter->tx_ring = tx_old;
687 e1000_free_all_rx_resources(adapter);
688 e1000_free_all_tx_resources(adapter);
689 kfree(tx_old);
690 kfree(rx_old);
691 adapter->rx_ring = rx_new;
692 adapter->tx_ring = tx_new;
693 if ((err = e1000_up(adapter)))
694 return err;
695 }
696
697 return 0;
698 err_setup_tx:
699 e1000_free_all_rx_resources(adapter);
700 err_setup_rx:
701 adapter->rx_ring = rx_old;
702 adapter->tx_ring = tx_old;
703 e1000_up(adapter);
704 return err;
705 }
706
707 #define REG_PATTERN_TEST(R, M, W) \
708 { \
709 uint32_t pat, value; \
710 uint32_t test[] = \
711 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
712 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
713 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
714 value = E1000_READ_REG(&adapter->hw, R); \
715 if (value != (test[pat] & W & M)) { \
716 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
717 "0x%08X expected 0x%08X\n", \
718 E1000_##R, value, (test[pat] & W & M)); \
719 *data = (adapter->hw.mac_type < e1000_82543) ? \
720 E1000_82542_##R : E1000_##R; \
721 return 1; \
722 } \
723 } \
724 }
725
726 #define REG_SET_AND_CHECK(R, M, W) \
727 { \
728 uint32_t value; \
729 E1000_WRITE_REG(&adapter->hw, R, W & M); \
730 value = E1000_READ_REG(&adapter->hw, R); \
731 if ((W & M) != (value & M)) { \
732 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
733 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
734 *data = (adapter->hw.mac_type < e1000_82543) ? \
735 E1000_82542_##R : E1000_##R; \
736 return 1; \
737 } \
738 }
739
740 static int
741 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
742 {
743 uint32_t value, before, after;
744 uint32_t i, toggle;
745
746 /* The status register is Read Only, so a write should fail.
747 * Some bits that get toggled are ignored.
748 */
749 switch (adapter->hw.mac_type) {
750 /* there are several bits on newer hardware that are r/w */
751 case e1000_82571:
752 case e1000_82572:
753 case e1000_80003es2lan:
754 toggle = 0x7FFFF3FF;
755 break;
756 case e1000_82573:
757 toggle = 0x7FFFF033;
758 break;
759 default:
760 toggle = 0xFFFFF833;
761 break;
762 }
763
764 before = E1000_READ_REG(&adapter->hw, STATUS);
765 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
766 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
767 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
768 if (value != after) {
769 DPRINTK(DRV, ERR, "failed STATUS register test got: "
770 "0x%08X expected: 0x%08X\n", after, value);
771 *data = 1;
772 return 1;
773 }
774 /* restore previous status */
775 E1000_WRITE_REG(&adapter->hw, STATUS, before);
776
777 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
778 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
779 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
780 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
781 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
782 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
783 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
784 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
785 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
786 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
787 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
788 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
789 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
790 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
791
792 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
793 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
794 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
795
796 if (adapter->hw.mac_type >= e1000_82543) {
797
798 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
799 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
800 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
801 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
802 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
803
804 for (i = 0; i < E1000_RAR_ENTRIES; i++) {
805 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
806 0xFFFFFFFF);
807 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
808 0xFFFFFFFF);
809 }
810
811 } else {
812
813 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
814 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
815 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
816 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
817
818 }
819
820 for (i = 0; i < E1000_MC_TBL_SIZE; i++)
821 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
822
823 *data = 0;
824 return 0;
825 }
826
827 static int
828 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
829 {
830 uint16_t temp;
831 uint16_t checksum = 0;
832 uint16_t i;
833
834 *data = 0;
835 /* Read and add up the contents of the EEPROM */
836 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
837 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
838 *data = 1;
839 break;
840 }
841 checksum += temp;
842 }
843
844 /* If Checksum is not Correct return error else test passed */
845 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
846 *data = 2;
847
848 return *data;
849 }
850
851 static irqreturn_t
852 e1000_test_intr(int irq,
853 void *data,
854 struct pt_regs *regs)
855 {
856 struct net_device *netdev = (struct net_device *) data;
857 struct e1000_adapter *adapter = netdev_priv(netdev);
858
859 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
860
861 return IRQ_HANDLED;
862 }
863
864 static int
865 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
866 {
867 struct net_device *netdev = adapter->netdev;
868 uint32_t mask, i=0, shared_int = TRUE;
869 uint32_t irq = adapter->pdev->irq;
870
871 *data = 0;
872
873 /* Hook up test interrupt handler just for this test */
874 if (!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
875 shared_int = FALSE;
876 } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
877 netdev->name, netdev)){
878 *data = 1;
879 return -1;
880 }
881
882 /* Disable all the interrupts */
883 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
884 msec_delay(10);
885
886 /* Test each interrupt */
887 for (; i < 10; i++) {
888
889 /* Interrupt to test */
890 mask = 1 << i;
891
892 if (!shared_int) {
893 /* Disable the interrupt to be reported in
894 * the cause register and then force the same
895 * interrupt and see if one gets posted. If
896 * an interrupt was posted to the bus, the
897 * test failed.
898 */
899 adapter->test_icr = 0;
900 E1000_WRITE_REG(&adapter->hw, IMC, mask);
901 E1000_WRITE_REG(&adapter->hw, ICS, mask);
902 msec_delay(10);
903
904 if (adapter->test_icr & mask) {
905 *data = 3;
906 break;
907 }
908 }
909
910 /* Enable the interrupt to be reported in
911 * the cause register and then force the same
912 * interrupt and see if one gets posted. If
913 * an interrupt was not posted to the bus, the
914 * test failed.
915 */
916 adapter->test_icr = 0;
917 E1000_WRITE_REG(&adapter->hw, IMS, mask);
918 E1000_WRITE_REG(&adapter->hw, ICS, mask);
919 msec_delay(10);
920
921 if (!(adapter->test_icr & mask)) {
922 *data = 4;
923 break;
924 }
925
926 if (!shared_int) {
927 /* Disable the other interrupts to be reported in
928 * the cause register and then force the other
929 * interrupts and see if any get posted. If
930 * an interrupt was posted to the bus, the
931 * test failed.
932 */
933 adapter->test_icr = 0;
934 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
935 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
936 msec_delay(10);
937
938 if (adapter->test_icr) {
939 *data = 5;
940 break;
941 }
942 }
943 }
944
945 /* Disable all the interrupts */
946 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
947 msec_delay(10);
948
949 /* Unhook test interrupt handler */
950 free_irq(irq, netdev);
951
952 return *data;
953 }
954
955 static void
956 e1000_free_desc_rings(struct e1000_adapter *adapter)
957 {
958 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
959 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
960 struct pci_dev *pdev = adapter->pdev;
961 int i;
962
963 if (txdr->desc && txdr->buffer_info) {
964 for (i = 0; i < txdr->count; i++) {
965 if (txdr->buffer_info[i].dma)
966 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
967 txdr->buffer_info[i].length,
968 PCI_DMA_TODEVICE);
969 if (txdr->buffer_info[i].skb)
970 dev_kfree_skb(txdr->buffer_info[i].skb);
971 }
972 }
973
974 if (rxdr->desc && rxdr->buffer_info) {
975 for (i = 0; i < rxdr->count; i++) {
976 if (rxdr->buffer_info[i].dma)
977 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
978 rxdr->buffer_info[i].length,
979 PCI_DMA_FROMDEVICE);
980 if (rxdr->buffer_info[i].skb)
981 dev_kfree_skb(rxdr->buffer_info[i].skb);
982 }
983 }
984
985 if (txdr->desc) {
986 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
987 txdr->desc = NULL;
988 }
989 if (rxdr->desc) {
990 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
991 rxdr->desc = NULL;
992 }
993
994 kfree(txdr->buffer_info);
995 txdr->buffer_info = NULL;
996 kfree(rxdr->buffer_info);
997 rxdr->buffer_info = NULL;
998
999 return;
1000 }
1001
1002 static int
1003 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1004 {
1005 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1006 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1007 struct pci_dev *pdev = adapter->pdev;
1008 uint32_t rctl;
1009 int size, i, ret_val;
1010
1011 /* Setup Tx descriptor ring and Tx buffers */
1012
1013 if (!txdr->count)
1014 txdr->count = E1000_DEFAULT_TXD;
1015
1016 size = txdr->count * sizeof(struct e1000_buffer);
1017 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1018 ret_val = 1;
1019 goto err_nomem;
1020 }
1021 memset(txdr->buffer_info, 0, size);
1022
1023 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1024 E1000_ROUNDUP(txdr->size, 4096);
1025 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1026 ret_val = 2;
1027 goto err_nomem;
1028 }
1029 memset(txdr->desc, 0, txdr->size);
1030 txdr->next_to_use = txdr->next_to_clean = 0;
1031
1032 E1000_WRITE_REG(&adapter->hw, TDBAL,
1033 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1034 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1035 E1000_WRITE_REG(&adapter->hw, TDLEN,
1036 txdr->count * sizeof(struct e1000_tx_desc));
1037 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1038 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1039 E1000_WRITE_REG(&adapter->hw, TCTL,
1040 E1000_TCTL_PSP | E1000_TCTL_EN |
1041 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1042 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1043
1044 for (i = 0; i < txdr->count; i++) {
1045 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1046 struct sk_buff *skb;
1047 unsigned int size = 1024;
1048
1049 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1050 ret_val = 3;
1051 goto err_nomem;
1052 }
1053 skb_put(skb, size);
1054 txdr->buffer_info[i].skb = skb;
1055 txdr->buffer_info[i].length = skb->len;
1056 txdr->buffer_info[i].dma =
1057 pci_map_single(pdev, skb->data, skb->len,
1058 PCI_DMA_TODEVICE);
1059 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1060 tx_desc->lower.data = cpu_to_le32(skb->len);
1061 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1062 E1000_TXD_CMD_IFCS |
1063 E1000_TXD_CMD_RPS);
1064 tx_desc->upper.data = 0;
1065 }
1066
1067 /* Setup Rx descriptor ring and Rx buffers */
1068
1069 if (!rxdr->count)
1070 rxdr->count = E1000_DEFAULT_RXD;
1071
1072 size = rxdr->count * sizeof(struct e1000_buffer);
1073 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1074 ret_val = 4;
1075 goto err_nomem;
1076 }
1077 memset(rxdr->buffer_info, 0, size);
1078
1079 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1080 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1081 ret_val = 5;
1082 goto err_nomem;
1083 }
1084 memset(rxdr->desc, 0, rxdr->size);
1085 rxdr->next_to_use = rxdr->next_to_clean = 0;
1086
1087 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1088 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1089 E1000_WRITE_REG(&adapter->hw, RDBAL,
1090 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1091 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1092 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1093 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1094 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1095 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1096 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1097 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1098 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1099
1100 for (i = 0; i < rxdr->count; i++) {
1101 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1102 struct sk_buff *skb;
1103
1104 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1105 GFP_KERNEL))) {
1106 ret_val = 6;
1107 goto err_nomem;
1108 }
1109 skb_reserve(skb, NET_IP_ALIGN);
1110 rxdr->buffer_info[i].skb = skb;
1111 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1112 rxdr->buffer_info[i].dma =
1113 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1114 PCI_DMA_FROMDEVICE);
1115 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1116 memset(skb->data, 0x00, skb->len);
1117 }
1118
1119 return 0;
1120
1121 err_nomem:
1122 e1000_free_desc_rings(adapter);
1123 return ret_val;
1124 }
1125
1126 static void
1127 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1128 {
1129 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1130 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1131 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1132 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1133 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1134 }
1135
1136 static void
1137 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1138 {
1139 uint16_t phy_reg;
1140
1141 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1142 * Extended PHY Specific Control Register to 25MHz clock. This
1143 * value defaults back to a 2.5MHz clock when the PHY is reset.
1144 */
1145 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1146 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1147 e1000_write_phy_reg(&adapter->hw,
1148 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1149
1150 /* In addition, because of the s/w reset above, we need to enable
1151 * CRS on TX. This must be set for both full and half duplex
1152 * operation.
1153 */
1154 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1155 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1156 e1000_write_phy_reg(&adapter->hw,
1157 M88E1000_PHY_SPEC_CTRL, phy_reg);
1158 }
1159
1160 static int
1161 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1162 {
1163 uint32_t ctrl_reg;
1164 uint16_t phy_reg;
1165
1166 /* Setup the Device Control Register for PHY loopback test. */
1167
1168 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1169 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1170 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1171 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1172 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1173 E1000_CTRL_FD); /* Force Duplex to FULL */
1174
1175 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1176
1177 /* Read the PHY Specific Control Register (0x10) */
1178 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1179
1180 /* Clear Auto-Crossover bits in PHY Specific Control Register
1181 * (bits 6:5).
1182 */
1183 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1184 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1185
1186 /* Perform software reset on the PHY */
1187 e1000_phy_reset(&adapter->hw);
1188
1189 /* Have to setup TX_CLK and TX_CRS after software reset */
1190 e1000_phy_reset_clk_and_crs(adapter);
1191
1192 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1193
1194 /* Wait for reset to complete. */
1195 udelay(500);
1196
1197 /* Have to setup TX_CLK and TX_CRS after software reset */
1198 e1000_phy_reset_clk_and_crs(adapter);
1199
1200 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1201 e1000_phy_disable_receiver(adapter);
1202
1203 /* Set the loopback bit in the PHY control register. */
1204 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1205 phy_reg |= MII_CR_LOOPBACK;
1206 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1207
1208 /* Setup TX_CLK and TX_CRS one more time. */
1209 e1000_phy_reset_clk_and_crs(adapter);
1210
1211 /* Check Phy Configuration */
1212 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1213 if (phy_reg != 0x4100)
1214 return 9;
1215
1216 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1217 if (phy_reg != 0x0070)
1218 return 10;
1219
1220 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1221 if (phy_reg != 0x001A)
1222 return 11;
1223
1224 return 0;
1225 }
1226
1227 static int
1228 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1229 {
1230 uint32_t ctrl_reg = 0;
1231 uint32_t stat_reg = 0;
1232
1233 adapter->hw.autoneg = FALSE;
1234
1235 if (adapter->hw.phy_type == e1000_phy_m88) {
1236 /* Auto-MDI/MDIX Off */
1237 e1000_write_phy_reg(&adapter->hw,
1238 M88E1000_PHY_SPEC_CTRL, 0x0808);
1239 /* reset to update Auto-MDI/MDIX */
1240 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1241 /* autoneg off */
1242 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1243 } else if (adapter->hw.phy_type == e1000_phy_gg82563) {
1244 e1000_write_phy_reg(&adapter->hw,
1245 GG82563_PHY_KMRN_MODE_CTRL,
1246 0x1CE);
1247 }
1248 /* force 1000, set loopback */
1249 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1250
1251 /* Now set up the MAC to the same speed/duplex as the PHY. */
1252 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1253 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1254 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1255 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1256 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1257 E1000_CTRL_FD); /* Force Duplex to FULL */
1258
1259 if (adapter->hw.media_type == e1000_media_type_copper &&
1260 adapter->hw.phy_type == e1000_phy_m88) {
1261 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1262 } else {
1263 /* Set the ILOS bit on the fiber Nic is half
1264 * duplex link is detected. */
1265 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1266 if ((stat_reg & E1000_STATUS_FD) == 0)
1267 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1268 }
1269
1270 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1271
1272 /* Disable the receiver on the PHY so when a cable is plugged in, the
1273 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1274 */
1275 if (adapter->hw.phy_type == e1000_phy_m88)
1276 e1000_phy_disable_receiver(adapter);
1277
1278 udelay(500);
1279
1280 return 0;
1281 }
1282
1283 static int
1284 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1285 {
1286 uint16_t phy_reg = 0;
1287 uint16_t count = 0;
1288
1289 switch (adapter->hw.mac_type) {
1290 case e1000_82543:
1291 if (adapter->hw.media_type == e1000_media_type_copper) {
1292 /* Attempt to setup Loopback mode on Non-integrated PHY.
1293 * Some PHY registers get corrupted at random, so
1294 * attempt this 10 times.
1295 */
1296 while (e1000_nonintegrated_phy_loopback(adapter) &&
1297 count++ < 10);
1298 if (count < 11)
1299 return 0;
1300 }
1301 break;
1302
1303 case e1000_82544:
1304 case e1000_82540:
1305 case e1000_82545:
1306 case e1000_82545_rev_3:
1307 case e1000_82546:
1308 case e1000_82546_rev_3:
1309 case e1000_82541:
1310 case e1000_82541_rev_2:
1311 case e1000_82547:
1312 case e1000_82547_rev_2:
1313 case e1000_82571:
1314 case e1000_82572:
1315 case e1000_82573:
1316 case e1000_80003es2lan:
1317 return e1000_integrated_phy_loopback(adapter);
1318 break;
1319
1320 default:
1321 /* Default PHY loopback work is to read the MII
1322 * control register and assert bit 14 (loopback mode).
1323 */
1324 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1325 phy_reg |= MII_CR_LOOPBACK;
1326 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1327 return 0;
1328 break;
1329 }
1330
1331 return 8;
1332 }
1333
1334 static int
1335 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1336 {
1337 struct e1000_hw *hw = &adapter->hw;
1338 uint32_t rctl;
1339
1340 if (hw->media_type == e1000_media_type_fiber ||
1341 hw->media_type == e1000_media_type_internal_serdes) {
1342 switch (hw->mac_type) {
1343 case e1000_82545:
1344 case e1000_82546:
1345 case e1000_82545_rev_3:
1346 case e1000_82546_rev_3:
1347 return e1000_set_phy_loopback(adapter);
1348 break;
1349 case e1000_82571:
1350 case e1000_82572:
1351 #define E1000_SERDES_LB_ON 0x410
1352 e1000_set_phy_loopback(adapter);
1353 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1354 msec_delay(10);
1355 return 0;
1356 break;
1357 default:
1358 rctl = E1000_READ_REG(hw, RCTL);
1359 rctl |= E1000_RCTL_LBM_TCVR;
1360 E1000_WRITE_REG(hw, RCTL, rctl);
1361 return 0;
1362 }
1363 } else if (hw->media_type == e1000_media_type_copper)
1364 return e1000_set_phy_loopback(adapter);
1365
1366 return 7;
1367 }
1368
1369 static void
1370 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1371 {
1372 struct e1000_hw *hw = &adapter->hw;
1373 uint32_t rctl;
1374 uint16_t phy_reg;
1375
1376 rctl = E1000_READ_REG(hw, RCTL);
1377 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1378 E1000_WRITE_REG(hw, RCTL, rctl);
1379
1380 switch (hw->mac_type) {
1381 case e1000_82571:
1382 case e1000_82572:
1383 if (hw->media_type == e1000_media_type_fiber ||
1384 hw->media_type == e1000_media_type_internal_serdes) {
1385 #define E1000_SERDES_LB_OFF 0x400
1386 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1387 msec_delay(10);
1388 break;
1389 }
1390 /* Fall Through */
1391 case e1000_82545:
1392 case e1000_82546:
1393 case e1000_82545_rev_3:
1394 case e1000_82546_rev_3:
1395 default:
1396 hw->autoneg = TRUE;
1397 if (hw->phy_type == e1000_phy_gg82563) {
1398 e1000_write_phy_reg(hw,
1399 GG82563_PHY_KMRN_MODE_CTRL,
1400 0x180);
1401 }
1402 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1403 if (phy_reg & MII_CR_LOOPBACK) {
1404 phy_reg &= ~MII_CR_LOOPBACK;
1405 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1406 e1000_phy_reset(hw);
1407 }
1408 break;
1409 }
1410 }
1411
1412 static void
1413 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1414 {
1415 memset(skb->data, 0xFF, frame_size);
1416 frame_size &= ~1;
1417 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1418 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1419 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1420 }
1421
1422 static int
1423 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1424 {
1425 frame_size &= ~1;
1426 if (*(skb->data + 3) == 0xFF) {
1427 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1428 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1429 return 0;
1430 }
1431 }
1432 return 13;
1433 }
1434
1435 static int
1436 e1000_run_loopback_test(struct e1000_adapter *adapter)
1437 {
1438 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1439 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1440 struct pci_dev *pdev = adapter->pdev;
1441 int i, j, k, l, lc, good_cnt, ret_val=0;
1442 unsigned long time;
1443
1444 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1445
1446 /* Calculate the loop count based on the largest descriptor ring
1447 * The idea is to wrap the largest ring a number of times using 64
1448 * send/receive pairs during each loop
1449 */
1450
1451 if (rxdr->count <= txdr->count)
1452 lc = ((txdr->count / 64) * 2) + 1;
1453 else
1454 lc = ((rxdr->count / 64) * 2) + 1;
1455
1456 k = l = 0;
1457 for (j = 0; j <= lc; j++) { /* loop count loop */
1458 for (i = 0; i < 64; i++) { /* send the packets */
1459 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1460 1024);
1461 pci_dma_sync_single_for_device(pdev,
1462 txdr->buffer_info[k].dma,
1463 txdr->buffer_info[k].length,
1464 PCI_DMA_TODEVICE);
1465 if (unlikely(++k == txdr->count)) k = 0;
1466 }
1467 E1000_WRITE_REG(&adapter->hw, TDT, k);
1468 msec_delay(200);
1469 time = jiffies; /* set the start time for the receive */
1470 good_cnt = 0;
1471 do { /* receive the sent packets */
1472 pci_dma_sync_single_for_cpu(pdev,
1473 rxdr->buffer_info[l].dma,
1474 rxdr->buffer_info[l].length,
1475 PCI_DMA_FROMDEVICE);
1476
1477 ret_val = e1000_check_lbtest_frame(
1478 rxdr->buffer_info[l].skb,
1479 1024);
1480 if (!ret_val)
1481 good_cnt++;
1482 if (unlikely(++l == rxdr->count)) l = 0;
1483 /* time + 20 msecs (200 msecs on 2.4) is more than
1484 * enough time to complete the receives, if it's
1485 * exceeded, break and error off
1486 */
1487 } while (good_cnt < 64 && jiffies < (time + 20));
1488 if (good_cnt != 64) {
1489 ret_val = 13; /* ret_val is the same as mis-compare */
1490 break;
1491 }
1492 if (jiffies >= (time + 2)) {
1493 ret_val = 14; /* error code for time out error */
1494 break;
1495 }
1496 } /* end loop count loop */
1497 return ret_val;
1498 }
1499
1500 static int
1501 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1502 {
1503 /* PHY loopback cannot be performed if SoL/IDER
1504 * sessions are active */
1505 if (e1000_check_phy_reset_block(&adapter->hw)) {
1506 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1507 "when SoL/IDER is active.\n");
1508 *data = 0;
1509 goto out;
1510 }
1511
1512 if ((*data = e1000_setup_desc_rings(adapter)))
1513 goto out;
1514 if ((*data = e1000_setup_loopback_test(adapter)))
1515 goto err_loopback;
1516 *data = e1000_run_loopback_test(adapter);
1517 e1000_loopback_cleanup(adapter);
1518
1519 err_loopback:
1520 e1000_free_desc_rings(adapter);
1521 out:
1522 return *data;
1523 }
1524
1525 static int
1526 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1527 {
1528 *data = 0;
1529 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1530 int i = 0;
1531 adapter->hw.serdes_link_down = TRUE;
1532
1533 /* On some blade server designs, link establishment
1534 * could take as long as 2-3 minutes */
1535 do {
1536 e1000_check_for_link(&adapter->hw);
1537 if (adapter->hw.serdes_link_down == FALSE)
1538 return *data;
1539 msec_delay(20);
1540 } while (i++ < 3750);
1541
1542 *data = 1;
1543 } else {
1544 e1000_check_for_link(&adapter->hw);
1545 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
1546 msec_delay(4000);
1547
1548 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1549 *data = 1;
1550 }
1551 }
1552 return *data;
1553 }
1554
1555 static int
1556 e1000_diag_test_count(struct net_device *netdev)
1557 {
1558 return E1000_TEST_LEN;
1559 }
1560
1561 static void
1562 e1000_diag_test(struct net_device *netdev,
1563 struct ethtool_test *eth_test, uint64_t *data)
1564 {
1565 struct e1000_adapter *adapter = netdev_priv(netdev);
1566 boolean_t if_running = netif_running(netdev);
1567
1568 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1569 /* Offline tests */
1570
1571 /* save speed, duplex, autoneg settings */
1572 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1573 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1574 uint8_t autoneg = adapter->hw.autoneg;
1575
1576 /* Link test performed before hardware reset so autoneg doesn't
1577 * interfere with test result */
1578 if (e1000_link_test(adapter, &data[4]))
1579 eth_test->flags |= ETH_TEST_FL_FAILED;
1580
1581 if (if_running)
1582 e1000_down(adapter);
1583 else
1584 e1000_reset(adapter);
1585
1586 if (e1000_reg_test(adapter, &data[0]))
1587 eth_test->flags |= ETH_TEST_FL_FAILED;
1588
1589 e1000_reset(adapter);
1590 if (e1000_eeprom_test(adapter, &data[1]))
1591 eth_test->flags |= ETH_TEST_FL_FAILED;
1592
1593 e1000_reset(adapter);
1594 if (e1000_intr_test(adapter, &data[2]))
1595 eth_test->flags |= ETH_TEST_FL_FAILED;
1596
1597 e1000_reset(adapter);
1598 if (e1000_loopback_test(adapter, &data[3]))
1599 eth_test->flags |= ETH_TEST_FL_FAILED;
1600
1601 /* restore speed, duplex, autoneg settings */
1602 adapter->hw.autoneg_advertised = autoneg_advertised;
1603 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1604 adapter->hw.autoneg = autoneg;
1605
1606 e1000_reset(adapter);
1607 if (if_running)
1608 e1000_up(adapter);
1609 } else {
1610 /* Online tests */
1611 if (e1000_link_test(adapter, &data[4]))
1612 eth_test->flags |= ETH_TEST_FL_FAILED;
1613
1614 /* Offline tests aren't run; pass by default */
1615 data[0] = 0;
1616 data[1] = 0;
1617 data[2] = 0;
1618 data[3] = 0;
1619 }
1620 msleep_interruptible(4 * 1000);
1621 }
1622
1623 static void
1624 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1625 {
1626 struct e1000_adapter *adapter = netdev_priv(netdev);
1627 struct e1000_hw *hw = &adapter->hw;
1628
1629 switch (adapter->hw.device_id) {
1630 case E1000_DEV_ID_82542:
1631 case E1000_DEV_ID_82543GC_FIBER:
1632 case E1000_DEV_ID_82543GC_COPPER:
1633 case E1000_DEV_ID_82544EI_FIBER:
1634 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1635 case E1000_DEV_ID_82545EM_FIBER:
1636 case E1000_DEV_ID_82545EM_COPPER:
1637 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1638 wol->supported = 0;
1639 wol->wolopts = 0;
1640 return;
1641
1642 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1643 /* device id 10B5 port-A supports wol */
1644 if (!adapter->ksp3_port_a) {
1645 wol->supported = 0;
1646 return;
1647 }
1648 /* KSP3 does not suppport UCAST wake-ups for any interface */
1649 wol->supported = WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
1650
1651 if (adapter->wol & E1000_WUFC_EX)
1652 DPRINTK(DRV, ERR, "Interface does not support "
1653 "directed (unicast) frame wake-up packets\n");
1654 wol->wolopts = 0;
1655 goto do_defaults;
1656
1657 case E1000_DEV_ID_82546EB_FIBER:
1658 case E1000_DEV_ID_82546GB_FIBER:
1659 case E1000_DEV_ID_82571EB_FIBER:
1660 /* Wake events only supported on port A for dual fiber */
1661 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1662 wol->supported = 0;
1663 wol->wolopts = 0;
1664 return;
1665 }
1666 /* Fall Through */
1667
1668 default:
1669 wol->supported = WAKE_UCAST | WAKE_MCAST |
1670 WAKE_BCAST | WAKE_MAGIC;
1671 wol->wolopts = 0;
1672
1673 do_defaults:
1674 if (adapter->wol & E1000_WUFC_EX)
1675 wol->wolopts |= WAKE_UCAST;
1676 if (adapter->wol & E1000_WUFC_MC)
1677 wol->wolopts |= WAKE_MCAST;
1678 if (adapter->wol & E1000_WUFC_BC)
1679 wol->wolopts |= WAKE_BCAST;
1680 if (adapter->wol & E1000_WUFC_MAG)
1681 wol->wolopts |= WAKE_MAGIC;
1682 return;
1683 }
1684 }
1685
1686 static int
1687 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1688 {
1689 struct e1000_adapter *adapter = netdev_priv(netdev);
1690 struct e1000_hw *hw = &adapter->hw;
1691
1692 switch (adapter->hw.device_id) {
1693 case E1000_DEV_ID_82542:
1694 case E1000_DEV_ID_82543GC_FIBER:
1695 case E1000_DEV_ID_82543GC_COPPER:
1696 case E1000_DEV_ID_82544EI_FIBER:
1697 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1698 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1699 case E1000_DEV_ID_82545EM_FIBER:
1700 case E1000_DEV_ID_82545EM_COPPER:
1701 return wol->wolopts ? -EOPNOTSUPP : 0;
1702
1703 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1704 /* device id 10B5 port-A supports wol */
1705 if (!adapter->ksp3_port_a)
1706 return wol->wolopts ? -EOPNOTSUPP : 0;
1707
1708 if (wol->wolopts & WAKE_UCAST) {
1709 DPRINTK(DRV, ERR, "Interface does not support "
1710 "directed (unicast) frame wake-up packets\n");
1711 return -EOPNOTSUPP;
1712 }
1713
1714 case E1000_DEV_ID_82546EB_FIBER:
1715 case E1000_DEV_ID_82546GB_FIBER:
1716 case E1000_DEV_ID_82571EB_FIBER:
1717 /* Wake events only supported on port A for dual fiber */
1718 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1719 return wol->wolopts ? -EOPNOTSUPP : 0;
1720 /* Fall Through */
1721
1722 default:
1723 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1724 return -EOPNOTSUPP;
1725
1726 adapter->wol = 0;
1727
1728 if (wol->wolopts & WAKE_UCAST)
1729 adapter->wol |= E1000_WUFC_EX;
1730 if (wol->wolopts & WAKE_MCAST)
1731 adapter->wol |= E1000_WUFC_MC;
1732 if (wol->wolopts & WAKE_BCAST)
1733 adapter->wol |= E1000_WUFC_BC;
1734 if (wol->wolopts & WAKE_MAGIC)
1735 adapter->wol |= E1000_WUFC_MAG;
1736 }
1737
1738 return 0;
1739 }
1740
1741 /* toggle LED 4 times per second = 2 "blinks" per second */
1742 #define E1000_ID_INTERVAL (HZ/4)
1743
1744 /* bit defines for adapter->led_status */
1745 #define E1000_LED_ON 0
1746
1747 static void
1748 e1000_led_blink_callback(unsigned long data)
1749 {
1750 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1751
1752 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1753 e1000_led_off(&adapter->hw);
1754 else
1755 e1000_led_on(&adapter->hw);
1756
1757 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1758 }
1759
1760 static int
1761 e1000_phys_id(struct net_device *netdev, uint32_t data)
1762 {
1763 struct e1000_adapter *adapter = netdev_priv(netdev);
1764
1765 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1766 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1767
1768 if (adapter->hw.mac_type < e1000_82571) {
1769 if (!adapter->blink_timer.function) {
1770 init_timer(&adapter->blink_timer);
1771 adapter->blink_timer.function = e1000_led_blink_callback;
1772 adapter->blink_timer.data = (unsigned long) adapter;
1773 }
1774 e1000_setup_led(&adapter->hw);
1775 mod_timer(&adapter->blink_timer, jiffies);
1776 msleep_interruptible(data * 1000);
1777 del_timer_sync(&adapter->blink_timer);
1778 } else if (adapter->hw.mac_type < e1000_82573) {
1779 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1780 (E1000_LEDCTL_LED2_BLINK_RATE |
1781 E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
1782 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1783 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
1784 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
1785 msleep_interruptible(data * 1000);
1786 } else {
1787 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1788 (E1000_LEDCTL_LED2_BLINK_RATE |
1789 E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
1790 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1791 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
1792 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
1793 msleep_interruptible(data * 1000);
1794 }
1795
1796 e1000_led_off(&adapter->hw);
1797 clear_bit(E1000_LED_ON, &adapter->led_status);
1798 e1000_cleanup_led(&adapter->hw);
1799
1800 return 0;
1801 }
1802
1803 static int
1804 e1000_nway_reset(struct net_device *netdev)
1805 {
1806 struct e1000_adapter *adapter = netdev_priv(netdev);
1807 if (netif_running(netdev)) {
1808 e1000_down(adapter);
1809 e1000_up(adapter);
1810 }
1811 return 0;
1812 }
1813
1814 static int
1815 e1000_get_stats_count(struct net_device *netdev)
1816 {
1817 return E1000_STATS_LEN;
1818 }
1819
1820 static void
1821 e1000_get_ethtool_stats(struct net_device *netdev,
1822 struct ethtool_stats *stats, uint64_t *data)
1823 {
1824 struct e1000_adapter *adapter = netdev_priv(netdev);
1825 int i;
1826
1827 e1000_update_stats(adapter);
1828 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1829 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1830 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1831 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1832 }
1833 /* BUG_ON(i != E1000_STATS_LEN); */
1834 }
1835
1836 static void
1837 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1838 {
1839 uint8_t *p = data;
1840 int i;
1841
1842 switch (stringset) {
1843 case ETH_SS_TEST:
1844 memcpy(data, *e1000_gstrings_test,
1845 E1000_TEST_LEN*ETH_GSTRING_LEN);
1846 break;
1847 case ETH_SS_STATS:
1848 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1849 memcpy(p, e1000_gstrings_stats[i].stat_string,
1850 ETH_GSTRING_LEN);
1851 p += ETH_GSTRING_LEN;
1852 }
1853 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1854 break;
1855 }
1856 }
1857
1858 static struct ethtool_ops e1000_ethtool_ops = {
1859 .get_settings = e1000_get_settings,
1860 .set_settings = e1000_set_settings,
1861 .get_drvinfo = e1000_get_drvinfo,
1862 .get_regs_len = e1000_get_regs_len,
1863 .get_regs = e1000_get_regs,
1864 .get_wol = e1000_get_wol,
1865 .set_wol = e1000_set_wol,
1866 .get_msglevel = e1000_get_msglevel,
1867 .set_msglevel = e1000_set_msglevel,
1868 .nway_reset = e1000_nway_reset,
1869 .get_link = ethtool_op_get_link,
1870 .get_eeprom_len = e1000_get_eeprom_len,
1871 .get_eeprom = e1000_get_eeprom,
1872 .set_eeprom = e1000_set_eeprom,
1873 .get_ringparam = e1000_get_ringparam,
1874 .set_ringparam = e1000_set_ringparam,
1875 .get_pauseparam = e1000_get_pauseparam,
1876 .set_pauseparam = e1000_set_pauseparam,
1877 .get_rx_csum = e1000_get_rx_csum,
1878 .set_rx_csum = e1000_set_rx_csum,
1879 .get_tx_csum = e1000_get_tx_csum,
1880 .set_tx_csum = e1000_set_tx_csum,
1881 .get_sg = ethtool_op_get_sg,
1882 .set_sg = ethtool_op_set_sg,
1883 #ifdef NETIF_F_TSO
1884 .get_tso = ethtool_op_get_tso,
1885 .set_tso = e1000_set_tso,
1886 #endif
1887 .self_test_count = e1000_diag_test_count,
1888 .self_test = e1000_diag_test,
1889 .get_strings = e1000_get_strings,
1890 .phys_id = e1000_phys_id,
1891 .get_stats_count = e1000_get_stats_count,
1892 .get_ethtool_stats = e1000_get_ethtool_stats,
1893 .get_perm_addr = ethtool_op_get_perm_addr,
1894 };
1895
1896 void e1000_set_ethtool_ops(struct net_device *netdev)
1897 {
1898 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1899 }